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CPU cores now compile cleanly.

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This commit is contained in:
Aaron Giles 2009-03-15 17:12:40 +00:00
parent d0527ba566
commit 46494694d1
87 changed files with 1207 additions and 656 deletions
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2
src/emu/cpu/cdp1802/cdp1802.c
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@ -9,7 +9,6 @@
#define CDP1802_CYCLES_DMA 8
#define CDP1802_CYCLES_INTERRUPT 8
typedef enum _cdp1802_cpu_state cdp1802_cpu_state;
enum _cdp1802_cpu_state
{
CDP1802_STATE_0_FETCH,
@ -20,6 +19,7 @@ enum _cdp1802_cpu_state
CDP1802_STATE_2_DMA_OUT,
CDP1802_STATE_3_INT
};
typedef enum _cdp1802_cpu_state cdp1802_cpu_state;
typedef struct _cdp1802_state cdp1802_state;
struct _cdp1802_state

8
src/emu/cpu/cop400/cop400.c
View File

@ -148,9 +148,11 @@ struct _cop400_state
emu_timer *microbus_timer;
};
typedef void (*cop400_opcode_func) (cop400_state *cpustate, UINT8 opcode);
struct _cop400_opcode_map {
unsigned cycles;
void (*function) (cop400_state *cpustate, UINT8 opcode);
cop400_opcode_func function;
};
/***************************************************************************
@ -1206,7 +1208,7 @@ static CPU_EXECUTE( cop400 )
if (BIT(EN, 1) && BIT(IL, 1))
{
void *function = cpustate->opcode_map[ROM(PC)].function;
cop400_opcode_func function = cpustate->opcode_map[ROM(PC)].function;
if ((function != jp) && (function != jmp) && (function != jsr))
{
@ -1231,7 +1233,7 @@ static CPU_EXECUTE( cop400 )
if (cpustate->skip)
{
void *function = cpustate->opcode_map[ROM(PC)].function;
cop400_opcode_func function = cpustate->opcode_map[ROM(PC)].function;
opcode = ROM(PC);

6
src/emu/cpu/cop400/cop400.h
View File

@ -73,16 +73,15 @@ enum
};
/* CKI bonding options */
typedef enum _cop400_cki_bond cop400_cki_bond;
enum _cop400_cki_bond {
COP400_CKI_DIVISOR_4 = 4,
COP400_CKI_DIVISOR_8 = 8,
COP400_CKI_DIVISOR_16 = 16,
COP400_CKI_DIVISOR_32 = 32
};
typedef enum _cop400_cki_bond cop400_cki_bond;
/* CKO bonding options */
typedef enum _cop400_cko_bond cop400_cko_bond;
enum _cop400_cko_bond {
COP400_CKO_OSCILLATOR_OUTPUT = 0,
COP400_CKO_RAM_POWER_SUPPLY,
@ -90,13 +89,14 @@ enum _cop400_cko_bond {
COP400_CKO_SYNC_INPUT,
COP400_CKO_GENERAL_PURPOSE_INPUT
};
typedef enum _cop400_cko_bond cop400_cko_bond;
/* microbus bonding options */
typedef enum _cop400_microbus cop400_microbus;
enum _cop400_microbus {
COP400_MICROBUS_DISABLED = 0,
COP400_MICROBUS_ENABLED
};
typedef enum _cop400_microbus cop400_microbus;
/* interface */
typedef struct _cop400_interface cop400_interface;

2
src/emu/cpu/drcbeut.c
View File

@ -589,7 +589,7 @@ drccodeptr drclabel_get_codeptr(drclabel_list *list, drcuml_codelabel label, drc
/* if no code pointer, request an OOB callback */
if (curlabel->codeptr == NULL && fixup != NULL)
drccache_request_oob_codegen(list->cache, label_oob_callback, curlabel, fixup, param);
drccache_request_oob_codegen(list->cache, label_oob_callback, curlabel, (void *)fixup, param);
return curlabel->codeptr;
}

38
src/emu/cpu/drcbex86.c
View File

@ -538,7 +538,7 @@ static drcbe_state *drcbex86_alloc(drcuml_state *drcuml, drccache *cache, const
drcbe_state *drcbe;
/* allocate space in the cache for our state */
drcbe = drccache_memory_alloc(cache, sizeof(*drcbe));
drcbe = (drcbe_state *)drccache_memory_alloc(cache, sizeof(*drcbe));
if (drcbe == NULL)
return NULL;
memset(drcbe, 0, sizeof(*drcbe));
@ -700,22 +700,26 @@ static void drcbex86_reset(drcbe_state *drcbe)
emit_mov_m32_r32(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, exp)), REG_EAX); // mov state->exp,eax
for (regnum = 0; regnum < ARRAY_LENGTH(drcbe->state.r); regnum++)
{
int regoffsl = (int)&((drcuml_machine_state *)NULL)->r[regnum].w.l;
int regoffsh = (int)&((drcuml_machine_state *)NULL)->r[regnum].w.h;
if (int_register_map[regnum] != 0)
emit_mov_m32_r32(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, r[regnum].w.l)), int_register_map[regnum]);
emit_mov_m32_r32(dst, MBD(REG_ECX, regoffsl), int_register_map[regnum]);
else
{
emit_mov_r32_m32(dst, REG_EAX, MABS(&drcbe->state.r[regnum].w.l));
emit_mov_m32_r32(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, r[regnum].w.l)), REG_EAX);
emit_mov_m32_r32(dst, MBD(REG_ECX, regoffsl), REG_EAX);
}
emit_mov_r32_m32(dst, REG_EAX, MABS(&drcbe->state.r[regnum].w.h));
emit_mov_m32_r32(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, r[regnum].w.h)), REG_EAX);
emit_mov_m32_r32(dst, MBD(REG_ECX, regoffsh), REG_EAX);
}
for (regnum = 0; regnum < ARRAY_LENGTH(drcbe->state.f); regnum++)
{
int regoffsl = (int)&((drcuml_machine_state *)NULL)->f[regnum].s.l;
int regoffsh = (int)&((drcuml_machine_state *)NULL)->f[regnum].s.h;
emit_mov_r32_m32(dst, REG_EAX, MABS(&drcbe->state.f[regnum].s.l));
emit_mov_m32_r32(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, f[regnum].s.l)), REG_EAX);
emit_mov_m32_r32(dst, MBD(REG_ECX, regoffsl), REG_EAX);
emit_mov_r32_m32(dst, REG_EAX, MABS(&drcbe->state.f[regnum].s.h));
emit_mov_m32_r32(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, f[regnum].s.h)), REG_EAX);
emit_mov_m32_r32(dst, MBD(REG_ECX, regoffsh), REG_EAX);
}
emit_ret(dst); // ret
if (drcbe->log != NULL && !drcbe->logged_common)
@ -725,21 +729,25 @@ static void drcbex86_reset(drcbe_state *drcbe)
drcbe->restore = *dst;
for (regnum = 0; regnum < ARRAY_LENGTH(drcbe->state.r); regnum++)
{
int regoffsl = (int)&((drcuml_machine_state *)NULL)->r[regnum].w.l;
int regoffsh = (int)&((drcuml_machine_state *)NULL)->r[regnum].w.h;
if (int_register_map[regnum] != 0)
emit_mov_r32_m32(dst, int_register_map[regnum], MBD(REG_ECX, offsetof(drcuml_machine_state, r[regnum].w.l)));
emit_mov_r32_m32(dst, int_register_map[regnum], MBD(REG_ECX, regoffsl));
else
{
emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ECX, offsetof(drcuml_machine_state, r[regnum].w.l)));
emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ECX, regoffsl));
emit_mov_m32_r32(dst, MABS(&drcbe->state.r[regnum].w.l), REG_EAX);
}
emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ECX, offsetof(drcuml_machine_state, r[regnum].w.h)));
emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ECX, regoffsh));
emit_mov_m32_r32(dst, MABS(&drcbe->state.r[regnum].w.h), REG_EAX);
}
for (regnum = 0; regnum < ARRAY_LENGTH(drcbe->state.f); regnum++)
{
emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ECX, offsetof(drcuml_machine_state, f[regnum].s.l)));
int regoffsl = (int)&((drcuml_machine_state *)NULL)->f[regnum].s.l;
int regoffsh = (int)&((drcuml_machine_state *)NULL)->f[regnum].s.h;
emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ECX, regoffsl));
emit_mov_m32_r32(dst, MABS(&drcbe->state.f[regnum].s.l), REG_EAX);
emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ECX, offsetof(drcuml_machine_state, f[regnum].s.h)));
emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ECX, regoffsh));
emit_mov_m32_r32(dst, MABS(&drcbe->state.f[regnum].s.h), REG_EAX);
}
emit_movzx_r32_m8(dst, REG_EAX, MBD(REG_ECX, offsetof(drcuml_machine_state, fmod)));// movzx eax,state->fmod
@ -3014,7 +3022,7 @@ static void emit_fstp_p(x86code **dst, int size, const drcuml_parameter *param)
static void fixup_label(void *parameter, drccodeptr labelcodeptr)
{
drccodeptr src = parameter;
drccodeptr src = (drccodeptr)parameter;
/* find the end of the instruction */
if (src[0] == 0xe3)
@ -3045,9 +3053,9 @@ static void fixup_label(void *parameter, drccodeptr labelcodeptr)
static void fixup_exception(drccodeptr *codeptr, void *param1, void *param2, void *param3)
{
drcuml_parameter handp, exp;
drcbe_state *drcbe = param1;
drccodeptr src = param2;
const drcuml_instruction *inst = param3;
drcbe_state *drcbe = (drcbe_state *)param1;
drccodeptr src = (drccodeptr)param2;
const drcuml_instruction *inst = (const drcuml_instruction *)param3;
drccodeptr dst = *codeptr;
drccodeptr *targetptr;

9
src/emu/cpu/dsp56k/dsp56def.h
View File

@ -393,3 +393,12 @@ static void PCDDR_set(dsp56k_core* cpustate, UINT16 value);
/* Port C Dtaa Register (PCD) */
static void PCD_set(dsp56k_core* cpustate, UINT16 value);
INLINE dsp56k_core *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_DSP56156);
return (dsp56k_core *)device->token;
}

12
src/emu/cpu/dsp56k/dsp56k.c
View File

@ -74,7 +74,7 @@ static DIRECT_UPDATE_HANDLER( dsp56k_direct_handler )
{
if (address >= (0x0000<<1) && address <= (0x07ff<<1))
{
direct->raw = direct->decrypted = (void*)(dsp56k_program_ram - (0x0000<<1));
direct->raw = direct->decrypted = (UINT8 *)(dsp56k_program_ram - (0x0000<<1));
return ~0;
}
@ -166,7 +166,7 @@ static void set_irq_line(dsp56k_core* cpustate, int irqline, int state)
***************************************************************************/
static CPU_INIT( dsp56k )
{
dsp56k_core* cpustate = device->token;
dsp56k_core* cpustate = get_safe_token(device);
// Call specific module inits
pcu_init(cpustate);
@ -228,7 +228,7 @@ static void alu_reset(dsp56k_core* cpustate)
static CPU_RESET( dsp56k )
{
dsp56k_core* cpustate = device->token;
dsp56k_core* cpustate = get_safe_token(device);
logerror("Dsp56k reset\n");
cpustate->interrupt_cycles = 0;
@ -266,7 +266,7 @@ static CPU_EXIT( dsp56k )
static CPU_EXECUTE( dsp56k )
{
dsp56k_core* cpustate = device->token;
dsp56k_core* cpustate = get_safe_token(device);
/* If reset line is asserted, do nothing */
if (cpustate->reset_state)
@ -320,7 +320,7 @@ ADDRESS_MAP_END
static CPU_SET_INFO( dsp56k )
{
dsp56k_core* cpustate = device->token;
dsp56k_core* cpustate = get_safe_token(device);
switch (state)
{
@ -388,7 +388,7 @@ static CPU_SET_INFO( dsp56k )
CPU_GET_INFO( dsp56k )
{
dsp56k_core* cpustate = (device != NULL) ? device->token : NULL;
dsp56k_core* cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

6
src/emu/cpu/dsp56k/dsp56mem.c
View File

@ -612,7 +612,7 @@ static void dsp56k_host_interface_reset(dsp56k_core* cpustate)
/* They represent the host side of the dsp56k's host interface */
void dsp56k_host_interface_write(device_config* device, UINT8 offset, UINT8 data)
{
dsp56k_core* cpustate = device->token;
dsp56k_core* cpustate = get_safe_token(device);
/* Not exactly correct since the bootstrap hack doesn't need this to be true */
/*
@ -708,7 +708,7 @@ void dsp56k_host_interface_write(device_config* device, UINT8 offset, UINT8 data
UINT8 dsp56k_host_interface_read(device_config* device, UINT8 offset)
{
dsp56k_core* cpustate = device->token;
dsp56k_core* cpustate = get_safe_token(device);
/* Not exactly correct since the bootstrap hack doesn't need this to be true */
/*
@ -936,6 +936,6 @@ static void dsp56k_io_reset(dsp56k_core* cpustate)
/* MISC*/
UINT16 dsp56k_get_peripheral_memory(device_config* device, UINT16 addr)
{
// TODO // THIS COMES BACK dsp56k_core* cpustate = device->token;
// TODO // THIS COMES BACK dsp56k_core* cpustate = get_safe_token(device);
return dsp56k_peripheral_ram[A2O(addr)];
}

4
src/emu/cpu/dsp56k/dsp56ops.c
View File

@ -1874,7 +1874,7 @@ static size_t dsp56k_op_cmpm(dsp56k_core* cpustate, const UINT16 op_byte, typed_
if (absS & U64(0x0000000080000000))
absS |= U64(0xffffffff80000000);
}
absS = abs(absS);
absS = (absS < 0) ? -absS : absS;
/* Sign extend and get absolute value of the destination */
if (D.addr == &A || D.addr == &B)
@ -1889,7 +1889,7 @@ static size_t dsp56k_op_cmpm(dsp56k_core* cpustate, const UINT16 op_byte, typed_
if (absS & U64(0x0000000080000000))
absS |= U64(0xffffffff80000000);
}
absD = abs(absD);
absD = (absD < 0) ? -absD : absD;
/* Compare */
absResult = absD - absS;

4
src/emu/cpu/e132xs/32xsdasm.c
View File

@ -514,12 +514,12 @@ unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, unsigned
lim = op & 0xfff;
}
sprintf(buffer, "XM%x %s, %s, $%x", (UINT8)(float) pow(2, xcode), dest, source, lim);
sprintf(buffer, "XM%x %s, %s, $%x", (UINT8)(float) pow(2.0, xcode), dest, source, lim);
}
else
{
sprintf(buffer, "XX%x %s, %s, 0", (UINT8)(float) pow(2, (xcode - 4)), dest, source);
sprintf(buffer, "XX%x %s, %s, 0", (UINT8)(float) pow(2.0, (xcode - 4)), dest, source);
}
break;

3
src/emu/cpu/h6280/h6280.c
View File

@ -190,7 +190,6 @@ static CPU_RESET( h6280 )
/* read the reset vector into PC */
PCL = RDMEM(cpustate, H6280_RESET_VEC);
PCH = RDMEM(cpustate, (H6280_RESET_VEC+1));
CHANGE_PC;
/* CPU starts in low speed mode */
cpustate->clocks_per_cycle = 4;
@ -226,8 +225,6 @@ static CPU_EXECUTE( h6280 )
/* Execute instructions */
do
{
if ((cpustate->ppc.w.l ^ cpustate->pc.w.l) & 0xe000)
CHANGE_PC;
cpustate->ppc = cpustate->pc;
debugger_instruction_hook(device, PCW);

1
src/emu/cpu/h6280/h6280ops.h
View File

@ -28,7 +28,6 @@
#define S cpustate->sp.b.l
#define TRANSLATED(addr) ((cpustate->mmr[(addr)>>13] << 13) | ((addr)&0x1fff))
#define CHANGE_PC
#define H6280_CYCLES(cyc) \
{ \
cpustate->ICount -= ((cyc) * cpustate->clocks_per_cycle); \

48
src/emu/cpu/i386/i386.c
View File

@ -396,8 +396,8 @@ static void build_cycle_table(void)
int i, j;
for (j=0; j < X86_NUM_CPUS; j++)
{
cycle_table_rm[j] = auto_malloc(sizeof(UINT8) * CYCLES_NUM_OPCODES);
cycle_table_pm[j] = auto_malloc(sizeof(UINT8) * CYCLES_NUM_OPCODES);
cycle_table_rm[j] = (UINT8 *)auto_malloc(sizeof(UINT8) * CYCLES_NUM_OPCODES);
cycle_table_pm[j] = (UINT8 *)auto_malloc(sizeof(UINT8) * CYCLES_NUM_OPCODES);
for (i=0; i < sizeof(x86_cycle_table)/sizeof(X86_CYCLE_TABLE); i++)
{
@ -445,8 +445,8 @@ static void I386OP(decode_two_byte)(i386_state *cpustate)
static UINT64 i386_debug_segbase(void *globalref, void *ref, UINT32 params, const UINT64 *param)
{
const device_config *device = ref;
i386_state *cpustate = device->token;
const device_config *device = (const device_config *)ref;
i386_state *cpustate = get_safe_token(device);
UINT32 result;
I386_SREG seg;
@ -466,8 +466,8 @@ static UINT64 i386_debug_segbase(void *globalref, void *ref, UINT32 params, cons
static UINT64 i386_debug_seglimit(void *globalref, void *ref, UINT32 params, const UINT64 *param)
{
const device_config *device = ref;
i386_state *cpustate = device->token;
const device_config *device = (const device_config *)ref;
i386_state *cpustate = get_safe_token(device);
UINT32 result = 0;
I386_SREG seg;
@ -491,8 +491,8 @@ static CPU_DEBUG_INIT( i386 )
static STATE_POSTLOAD( i386_postload )
{
const device_config *device = param;
i386_state *cpustate = device->token;
const device_config *device = (const device_config *)param;
i386_state *cpustate = get_safe_token(device);
int i;
for (i = 0; i < 6; i++)
i386_load_segment_descriptor(cpustate,i);
@ -505,7 +505,7 @@ static CPU_INIT( i386 )
static const int regs8[8] = {AL,CL,DL,BL,AH,CH,DH,BH};
static const int regs16[8] = {AX,CX,DX,BX,SP,BP,SI,DI};
static const int regs32[8] = {EAX,ECX,EDX,EBX,ESP,EBP,ESI,EDI};
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
build_cycle_table();
@ -622,7 +622,7 @@ static void build_opcode_table(i386_state *cpustate, UINT32 features)
static CPU_RESET( i386 )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
cpu_irq_callback save_irqcallback;
save_irqcallback = cpustate->irq_callback;
@ -692,7 +692,7 @@ static void i386_set_a20_line(i386_state *cpustate,int state)
static CPU_EXECUTE( i386 )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
cpustate->cycles = cycles;
cpustate->base_cycles = cycles;
@ -726,7 +726,7 @@ static CPU_EXECUTE( i386 )
static CPU_TRANSLATE( i386 )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
int result = 1;
if (space == ADDRESS_SPACE_PROGRAM)
{
@ -739,13 +739,13 @@ static CPU_TRANSLATE( i386 )
static CPU_DISASSEMBLE( i386 )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
return i386_dasm_one(buffer, pc, oprom, cpustate->sreg[CS].d ? 32 : 16);
}
static CPU_SET_INFO( i386 )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
if (state == CPUINFO_INT_INPUT_STATE+INPUT_LINE_A20)
{
@ -846,7 +846,7 @@ static CPU_SET_INFO( i386 )
CPU_GET_INFO( i386 )
{
i386_state *cpustate = (device != NULL) ? device->token : NULL;
i386_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
@ -1071,7 +1071,7 @@ static CPU_INIT( i486 )
static CPU_RESET( i486 )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
cpu_irq_callback save_irqcallback;
save_irqcallback = cpustate->irq_callback;
@ -1115,7 +1115,7 @@ static CPU_EXIT( i486 )
static CPU_SET_INFO( i486 )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
switch (state)
{
case CPUINFO_INT_REGISTER + X87_CTRL: cpustate->fpu_control_word = info->i; break;
@ -1135,7 +1135,7 @@ static CPU_SET_INFO( i486 )
CPU_GET_INFO( i486 )
{
i386_state *cpustate = (device != NULL) ? device->token : NULL;
i386_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i486);break;
@ -1184,7 +1184,7 @@ static CPU_INIT( pentium )
static CPU_RESET( pentium )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
cpu_irq_callback save_irqcallback;
save_irqcallback = cpustate->irq_callback;
@ -1248,7 +1248,7 @@ static CPU_EXIT( pentium )
static CPU_SET_INFO( pentium )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
switch (state)
{
case CPUINFO_INT_REGISTER + X87_CTRL: cpustate->fpu_control_word = info->i; break;
@ -1268,7 +1268,7 @@ static CPU_SET_INFO( pentium )
CPU_GET_INFO( pentium )
{
i386_state *cpustate = (device != NULL) ? device->token : NULL;
i386_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium); break;
@ -1317,7 +1317,7 @@ static CPU_INIT( mediagx )
static CPU_RESET( mediagx )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
cpu_irq_callback save_irqcallback;
save_irqcallback = cpustate->irq_callback;
@ -1381,7 +1381,7 @@ static CPU_EXIT( mediagx )
static CPU_SET_INFO( mediagx )
{
i386_state *cpustate = device->token;
i386_state *cpustate = get_safe_token(device);
switch (state)
{
case CPUINFO_INT_REGISTER + X87_CTRL: cpustate->fpu_control_word = info->i; break;
@ -1401,7 +1401,7 @@ static CPU_SET_INFO( mediagx )
CPU_GET_INFO( mediagx )
{
i386_state *cpustate = (device != NULL) ? device->token : NULL;
i386_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mediagx); break;

12
src/emu/cpu/i386/i386priv.h
View File

@ -3,6 +3,7 @@
#ifndef __I386_H__
#define __I386_H__
#include "i386.h"
#include "cpuintrf.h"
#define I386OP(XX) i386_##XX
@ -280,6 +281,17 @@ struct _i386_state
UINT8 *cycle_table_rm;
};
INLINE i386_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_I386 ||
cpu_get_type(device) == CPU_I486 ||
cpu_get_type(device) == CPU_PENTIUM ||
cpu_get_type(device) == CPU_MEDIAGX);
return (i386_state *)device->token;
}
extern int i386_parity_table[256];

19
src/emu/cpu/i86/i286.c
View File

@ -78,6 +78,15 @@ struct _i80286_state
UINT16 eo; /* HJB 12/13/98 effective offset of the address (before segment is added) */
};
INLINE i80286_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_I80286);
return (i80286_state *)device->token;
}
#define INT_IRQ 0x01
#define NMI_IRQ 0x02
@ -138,7 +147,7 @@ static void i80286_set_a20_line(i80286_state *cpustate, int state)
static CPU_RESET( i80286 )
{
i80286_state *cpustate = device->token;
i80286_state *cpustate = get_safe_token(device);
static int urinit=1;
/* in my docu not all registers are initialized! */
@ -194,7 +203,7 @@ static void set_irq_line(i80286_state *cpustate, int irqline, int state)
static CPU_EXECUTE( i80286 )
{
i80286_state *cpustate = device->token;
i80286_state *cpustate = get_safe_token(device);
/* copy over the cycle counts if they're not correct */
if (timing.id != 80286)
@ -233,7 +242,7 @@ static CPU_DISASSEMBLE( i80286 )
static CPU_INIT( i80286 )
{
i80286_state *cpustate = device->token;
i80286_state *cpustate = get_safe_token(device);
state_save_register_device_item_array(device, 0, cpustate->regs.w);
state_save_register_device_item(device, 0, cpustate->amask);
@ -295,7 +304,7 @@ static CPU_INIT( i80286 )
static CPU_SET_INFO( i80286 )
{
i80286_state *cpustate = device->token;
i80286_state *cpustate = get_safe_token(device);
switch (state)
{
@ -368,7 +377,7 @@ static CPU_SET_INFO( i80286 )
CPU_GET_INFO( i80286 )
{
i80286_state *cpustate = (device != NULL) ? device->token : NULL;
i80286_state *cpustate = (device != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

32
src/emu/cpu/i86/i86.c
View File

@ -69,6 +69,16 @@ struct _i8086_state
UINT16 eo; /* HJB 12/13/98 effective offset of the address (before segment is added) */
};
INLINE i8086_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_I8086 ||
cpu_get_type(device) == CPU_I8088 ||
cpu_get_type(device) == CPU_I80186);
return (i8086_state *)device->token;
}
/***************************************************************************
CPU STATE DESCRIPTION
@ -151,7 +161,7 @@ static UINT8 parity_table[256];
/***************************************************************************/
static void i8086_state_register(const device_config *device)
{
i8086_state *cpustate = device->token;
i8086_state *cpustate = get_safe_token(device);
state_save_register_device_item_array(device, 0, cpustate->regs.w);
state_save_register_device_item(device, 0, cpustate->pc);
state_save_register_device_item(device, 0, cpustate->prevpc);
@ -178,7 +188,7 @@ static void i8086_state_register(const device_config *device)
static CPU_INIT( i8086 )
{
i8086_state *cpustate = device->token;
i8086_state *cpustate = get_safe_token(device);
unsigned int i, j, c;
static const BREGS reg_name[8] = {AL, CL, DL, BL, AH, CH, DH, BH};
for (i = 0; i < 256; i++)
@ -219,7 +229,7 @@ static CPU_INIT( i8086 )
#if (HAS_I8088||HAS_I80188)
static CPU_INIT( i8088 )
{
i8086_state *cpustate = device->token;
i8086_state *cpustate = get_safe_token(device);
CPU_INIT_CALL(i8086);
configure_memory_8bit(cpustate);
}
@ -227,7 +237,7 @@ static CPU_INIT( i8088 )
static CPU_RESET( i8086 )
{
i8086_state *cpustate = device->token;
i8086_state *cpustate = get_safe_token(device);
cpu_irq_callback save_irqcallback;
memory_interface save_mem;
cpu_state_table save_state;
@ -286,7 +296,7 @@ static void set_test_line(i8086_state *cpustate, int state)
static CPU_EXECUTE( i8086 )
{
i8086_state *cpustate = device->token;
i8086_state *cpustate = get_safe_token(device);
/* copy over the cycle counts if they're not correct */
if (timing.id != 8086)
@ -342,7 +352,7 @@ static CPU_DISASSEMBLE( i8086 )
static CPU_EXECUTE( i80186 )
{
i8086_state *cpustate = device->token;
i8086_state *cpustate = get_safe_token(device);
/* copy over the cycle counts if they're not correct */
if (timing.id != 80186)
@ -382,7 +392,7 @@ static CPU_EXECUTE( i80186 )
static CPU_IMPORT_STATE( i8086 )
{
i8086_state *cpustate = device->token;
i8086_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -436,7 +446,7 @@ static CPU_IMPORT_STATE( i8086 )
static CPU_EXPORT_STATE( i8086 )
{
i8086_state *cpustate = device->token;
i8086_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -461,7 +471,7 @@ static CPU_EXPORT_STATE( i8086 )
static CPU_EXPORT_STRING( i8086 )
{
i8086_state *cpustate = device->token;
i8086_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -486,7 +496,7 @@ static CPU_EXPORT_STRING( i8086 )
static CPU_SET_INFO( i8086 )
{
i8086_state *cpustate = device->token;
i8086_state *cpustate = get_safe_token(device);
switch (state)
{
@ -505,7 +515,7 @@ static CPU_SET_INFO( i8086 )
CPU_GET_INFO( i8086 )
{
i8086_state *cpustate = (device != NULL) ? device->token : NULL;
i8086_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

8
src/emu/cpu/i860/i860.c
View File

@ -27,7 +27,7 @@ TODO: Separate out i860XR and i860XP (make different types, etc).
static CPU_INIT( i860 )
{
i860_state_t *cpustate = device->token;
i860_state_t *cpustate = get_safe_token(device);
cpustate->device = device;
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
reset_i860(cpustate);
@ -43,7 +43,7 @@ static CPU_INIT( i860 )
static CPU_RESET( i860 )
{
i860_state_t *cpustate = device->token;
i860_state_t *cpustate = get_safe_token(device);
reset_i860(cpustate);
}
@ -81,7 +81,7 @@ static CPU_DISASSEMBLE( i860 )
static CPU_SET_INFO( i860 )
{
i860_state_t *cpustate = device->token;
i860_state_t *cpustate = get_safe_token(device);
switch(state)
{
@ -175,7 +175,7 @@ static CPU_SET_INFO( i860 )
CPU_GET_INFO( i860 )
{
i860_state_t *cpustate = (device != NULL) ? device->token : NULL;
i860_state_t *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

9
src/emu/cpu/i860/i860.h
View File

@ -177,6 +177,15 @@ typedef struct {
} i860_state_t;
INLINE i860_state_t *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_I860);
return (i860_state_t *)device->token;
}
/***************************************************************************
PUBLIC FUNCTIONS

2
src/emu/cpu/i860/i860dec.c
View File

@ -4440,7 +4440,7 @@ void reset_i860 (i860s *cpustate)
static CPU_EXECUTE( i860 )
{
i860_state_t *cpustate = device->token;
i860_state_t *cpustate = get_safe_token(device);
/* Check if the data bus is held by another device, and bail if so.
Also check for reset. */

23
src/emu/cpu/i960/i960.c
View File

@ -39,6 +39,15 @@ struct _i960_state_t {
int icount;
};
INLINE i960_state_t *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_I960);
return (i960_state_t *)device->token;
}
static void do_call(i960_state_t *i960, UINT32 adr, int type, UINT32 stack);
INLINE UINT32 i960_read_dword_unaligned(i960_state_t *i960, UINT32 address)
@ -1946,7 +1955,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
static CPU_EXECUTE( i960 )
{
i960_state_t *i960 = device->token;
i960_state_t *i960 = get_safe_token(device);
UINT32 opcode;
i960->icount = cycles;
@ -2035,7 +2044,7 @@ static void set_irq_line(i960_state_t *i960, int irqline, int state)
static CPU_SET_INFO( i960 )
{
i960_state_t *i960 = device->token;
i960_state_t *i960 = get_safe_token(device);
if(state >= CPUINFO_INT_REGISTER+I960_R0 && state <= CPUINFO_INT_REGISTER + I960_G15) {
i960->r[state - (CPUINFO_INT_REGISTER + I960_R0)] = info->i;
@ -2057,7 +2066,7 @@ static CPU_SET_INFO( i960 )
static CPU_INIT( i960 )
{
i960_state_t *i960 = device->token;
i960_state_t *i960 = get_safe_token(device);
i960->irq_cb = irqcallback;
i960->device = device;
@ -2090,7 +2099,7 @@ static CPU_DISASSEMBLE( i960 )
static CPU_RESET( i960 )
{
i960_state_t *i960 = device->token;
i960_state_t *i960 = get_safe_token(device);
i960->SAT = memory_read_dword_32le(i960->program, 0);
i960->PRCB = memory_read_dword_32le(i960->program, 4);
@ -2111,7 +2120,7 @@ static CPU_RESET( i960 )
CPU_GET_INFO( i960 )
{
i960_state_t *i960 = (device != NULL) ? device->token : NULL;
i960_state_t *i960 = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
if(state >= CPUINFO_INT_REGISTER+I960_R0 && state <= CPUINFO_INT_REGISTER + I960_G15) {
info->i = i960->r[state - (CPUINFO_INT_REGISTER + I960_R0)];
@ -2224,12 +2233,12 @@ CPU_GET_INFO( i960 )
// on the real hardware (e.g. Model 2's interrupt control registers)
void i960_noburst(const device_config *device)
{
i960_state_t *i960 = device->token;
i960_state_t *i960 = get_safe_token(device);
i960->bursting = 0;
}
void i960_stall(const device_config *device)
{
i960_state_t *i960 = device->token;
i960_state_t *i960 = get_safe_token(device);
i960->IP = i960->PIP;
}

19
src/emu/cpu/konami/konami.c
View File

@ -65,6 +65,15 @@ struct _konami_state
konami_set_lines_func setlines_callback;
};
INLINE konami_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_KONAMI);
return (konami_state *)device->token;
}
/* flag bits in the cc register */
#define CC_C 0x01 /* Carry */
#define CC_V 0x02 /* Overflow */
@ -391,7 +400,7 @@ static void check_irq_lines(konami_state *cpustate)
/****************************************************************************/
static CPU_INIT( konami )
{
konami_state *cpustate = device->token;
konami_state *cpustate = get_safe_token(device);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
@ -414,7 +423,7 @@ static CPU_INIT( konami )
static CPU_RESET( konami )
{
konami_state *cpustate = device->token;
konami_state *cpustate = get_safe_token(device);
cpustate->int_state = 0;
cpustate->nmi_state = CLEAR_LINE;
@ -462,7 +471,7 @@ static void set_irq_line(konami_state *cpustate, int irqline, int state)
/* execute instructions on this CPU until icount expires */
static CPU_EXECUTE( konami )
{
konami_state *cpustate = device->token;
konami_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
check_irq_lines(cpustate);
@ -501,7 +510,7 @@ static CPU_EXECUTE( konami )
static CPU_SET_INFO( konami )
{
konami_state *cpustate = device->token;
konami_state *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -534,7 +543,7 @@ static CPU_SET_INFO( konami )
CPU_GET_INFO( konami )
{
konami_state *cpustate = (device != NULL) ? device->token : NULL;
konami_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

19
src/emu/cpu/lh5801/lh5801.c
View File

@ -67,6 +67,15 @@ struct _lh5810_state
int icount;
};
INLINE lh5801_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_LH5801);
return (lh5801_state *)device->token;
}
#define P cpustate->p.w.l
#define S cpustate->s.w.l
#define U cpustate->u.w.l
@ -92,7 +101,7 @@ struct _lh5810_state
static CPU_INIT( lh5801 )
{
lh5801_state *cpustate = device->token;
lh5801_state *cpustate = get_safe_token(device);
memset(cpustate, 0, sizeof(*cpustate));
cpustate->config = (const lh5801_cpu_core *) device->static_config;
@ -102,7 +111,7 @@ static CPU_INIT( lh5801 )
static CPU_RESET( lh5801 )
{
lh5801_state *cpustate = device->token;
lh5801_state *cpustate = get_safe_token(device);
P = (memory_read_byte(cpustate->program, 0xfffe)<<8) | memory_read_byte(cpustate->program, 0xffff);
@ -111,7 +120,7 @@ static CPU_RESET( lh5801 )
static CPU_EXECUTE( lh5801 )
{
lh5801_state *cpustate = device->token;
lh5801_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -144,7 +153,7 @@ static void set_irq_line(lh5801_state *cpustate, int irqline, int state)
static CPU_SET_INFO( lh5801 )
{
lh5801_state *cpustate = device->token;
lh5801_state *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -174,7 +183,7 @@ static CPU_SET_INFO( lh5801 )
CPU_GET_INFO( lh5801 )
{
lh5801_state *cpustate = (device != NULL) ? device->token : NULL;
lh5801_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

21
src/emu/cpu/lr35902/lr35902.c
View File

@ -113,6 +113,15 @@ union _lr35902_state {
lr35902_8BitRegs b;
};
INLINE lr35902_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_LR35902);
return (lr35902_state *)device->token;
}
typedef int (*OpcodeEmulator) (lr35902_state *cpustate);
#define IME 0x01
@ -180,7 +189,7 @@ static const int CyclesCB[256] =
static CPU_INIT( lr35902 )
{
lr35902_state *cpustate = device->token;
lr35902_state *cpustate = get_safe_token(device);
cpustate->w.config = (const lr35902_cpu_core *) device->static_config;
cpustate->w.irq_callback = irqcallback;
@ -195,7 +204,7 @@ static CPU_INIT( lr35902 )
/************************************************************/
static CPU_RESET( lr35902 )
{
lr35902_state *cpustate = device->token;
lr35902_state *cpustate = get_safe_token(device);
cpustate->w.AF = 0x0000;
cpustate->w.BC = 0x0000;
@ -300,7 +309,7 @@ INLINE void lr35902_ProcessInterrupts (lr35902_state *cpustate)
/************************************************************/
static CPU_EXECUTE( lr35902 )
{
lr35902_state *cpustate = device->token;
lr35902_state *cpustate = get_safe_token(device);
cpustate->w.icount = cycles;
@ -336,7 +345,7 @@ static CPU_EXECUTE( lr35902 )
static CPU_BURN( lr35902 )
{
lr35902_state *cpustate = device->token;
lr35902_state *cpustate = get_safe_token(device);
if( cycles > 0 )
{
@ -378,7 +387,7 @@ static void lr35902_clear_pending_interrupts (lr35902_state *cpustate)
static CPU_SET_INFO( lr35902 )
{
lr35902_state *cpustate = device->token;
lr35902_state *cpustate = get_safe_token(device);
switch (state)
{
@ -406,7 +415,7 @@ static CPU_SET_INFO( lr35902 )
CPU_GET_INFO( lr35902 )
{
lr35902_state *cpustate = (device != NULL) ? device->token : NULL;
lr35902_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

15
src/emu/cpu/m37710/m37710.c
View File

@ -53,6 +53,7 @@
#include "debugger.h"
#include "cpuexec.h"
#include "m37710.h"
#include "m37710cm.h"
#define M37710_DEBUG (0) // enables verbose logging for peripherals, etc.
@ -260,7 +261,7 @@ static const char *const m37710_tnames[8] =
static TIMER_CALLBACK( m37710_timer_cb )
{
m37710i_cpu_struct *cpustate = ptr;
m37710i_cpu_struct *cpustate = (m37710i_cpu_struct *)ptr;
int which = param;
int curirq = M37710_LINE_TIMERA0 - which;
@ -763,7 +764,7 @@ void m37710i_update_irqs(m37710i_cpu_struct *cpustate)
static CPU_RESET( m37710 )
{
m37710i_cpu_struct *cpustate = device->token;
m37710i_cpu_struct *cpustate = get_safe_token(device);
/* Start the CPU */
CPU_STOPPED = 0;
@ -811,7 +812,7 @@ static CPU_EXIT( m37710 )
/* Execute some instructions */
static CPU_EXECUTE( m37710 )
{
m37710i_cpu_struct *m37710 = device->token;
m37710i_cpu_struct *m37710 = get_safe_token(device);
m37710i_update_irqs(m37710);
@ -869,7 +870,7 @@ void m37710_set_irq_callback(cpu_irq_callback callback)
static CPU_DISASSEMBLE( m37710 )
{
m37710i_cpu_struct *cpustate = device->token;
m37710i_cpu_struct *cpustate = get_safe_token(device);
return m7700_disassemble(buffer, (pc&0xffff), pc>>16, oprom, FLAG_M, FLAG_X);
}
@ -887,7 +888,7 @@ static STATE_POSTLOAD( m37710_restore_state )
static CPU_INIT( m37710 )
{
m37710i_cpu_struct *cpustate = device->token;
m37710i_cpu_struct *cpustate = get_safe_token(device);
int i;
memset(cpustate, 0, sizeof(cpustate));
@ -963,7 +964,7 @@ static CPU_INIT( m37710 )
static CPU_SET_INFO( m37710 )
{
m37710i_cpu_struct *cpustate = device->token;
m37710i_cpu_struct *cpustate = get_safe_token(device);
switch (state)
{
@ -1012,7 +1013,7 @@ ADDRESS_MAP_END
CPU_GET_INFO( m37710 )
{
m37710i_cpu_struct *cpustate = (device != NULL) ? device->token : NULL;
m37710i_cpu_struct *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

9
src/emu/cpu/m37710/m37710cm.h
View File

@ -129,6 +129,15 @@ struct _m37710i_cpu_struct
emu_timer *timers[8];
};
INLINE m37710i_cpu_struct *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_M37710 ||
cpu_get_type(device) == CPU_M37702);
return (m37710i_cpu_struct *)device->token;
}
extern uint m37710i_adc_tbl[];
extern uint m37710i_sbc_tbl[];

98
src/emu/cpu/m6502/6502dasm.c
View File

@ -66,7 +66,7 @@ enum addr_mode {
};
enum opcodes {
adc, and, asl, bcc, bcs, beq, bit, bmi,
adc, and_,asl, bcc, bcs, beq, bit, bmi,
bne, bpl, m6502_brk, bvc, bvs, clc, cld, cli,
clv, cmp, cpx, cpy, dec, dex, dey, eor,
inc, inx, iny, jmp, jsr, lda, ldx, ldy,
@ -148,14 +148,14 @@ static const struct op6502_info op6502[256] = {
{nop,zpx},{ora,zpx},{asl,zpx},{slo,zpx},
{clc,imp},{ora,aby},{nop,imp},{slo,aby},
{nop,abx},{ora,abx},{asl,abx},{slo,abx},
{jsr,adr},{and,idx},{kil,non},{rla,idx},/* 20 */
{bit,zpg},{and,zpg},{rol,zpg},{rla,zpg},
{plp,imp},{and,imm},{rol,acc},{anc,imm},
{bit,aba},{and,aba},{rol,aba},{rla,aba},
{bmi,rel},{and,idy},{kil,non},{rla,idy},/* 30 */
{nop,zpx},{and,zpx},{rol,zpx},{rla,zpx},
{sec,imp},{and,aby},{nop,imp},{rla,aby},
{nop,abx},{and,abx},{rol,abx},{rla,abx},
{jsr,adr},{and_,idx},{kil,non},{rla,idx},/* 20 */
{bit,zpg},{and_,zpg},{rol,zpg},{rla,zpg},
{plp,imp},{and_,imm},{rol,acc},{anc,imm},
{bit,aba},{and_,aba},{rol,aba},{rla,aba},
{bmi,rel},{and_,idy},{kil,non},{rla,idy},/* 30 */
{nop,zpx},{and_,zpx},{rol,zpx},{rla,zpx},
{sec,imp},{and_,aby},{nop,imp},{rla,aby},
{nop,abx},{and_,abx},{rol,abx},{rla,abx},
{rti,imp},{eor,idx},{kil,non},{sre,idx},/* 40 */
{nop,zpg},{eor,zpg},{lsr,zpg},{sre,zpg},
{pha,imp},{eor,imm},{lsr,acc},{asr,imm},
@ -215,14 +215,14 @@ static const struct op6502_info op65c02[256] = {
{trb,zpg},{ora,zpx},{asl,zpx},{rmb,zpg},
{clc,imp},{ora,aby},{ina,imp},{ill,non},
{trb,aba},{ora,abx},{asl,abx},{bbr,zpb},
{jsr,adr},{and,idx},{ill,non},{ill,non},/* 20 */
{bit,zpg},{and,zpg},{rol,zpg},{rmb,zpg},
{plp,imp},{and,imm},{rol,acc},{ill,non},
{bit,aba},{and,aba},{rol,aba},{bbr,zpb},
{bmi,rel},{and,idy},{and,zpi},{ill,non},/* 30 */
{bit,zpx},{and,zpx},{rol,zpx},{rmb,zpg},
{sec,imp},{and,aby},{dea,imp},{ill,non},
{bit,abx},{and,abx},{rol,abx},{bbr,zpb},
{jsr,adr},{and_,idx},{ill,non},{ill,non},/* 20 */
{bit,zpg},{and_,zpg},{rol,zpg},{rmb,zpg},
{plp,imp},{and_,imm},{rol,acc},{ill,non},
{bit,aba},{and_,aba},{rol,aba},{bbr,zpb},
{bmi,rel},{and_,idy},{and_,zpi},{ill,non},/* 30 */
{bit,zpx},{and_,zpx},{rol,zpx},{rmb,zpg},
{sec,imp},{and_,aby},{dea,imp},{ill,non},
{bit,abx},{and_,abx},{rol,abx},{bbr,zpb},
{rti,imp},{eor,idx},{ill,non},{ill,non},/* 40 */
{ill,non},{eor,zpg},{lsr,zpg},{rmb,zpg},
{pha,imp},{eor,imm},{lsr,acc},{ill,non},
@ -283,14 +283,14 @@ static const struct op6502_info op65sc02[256] = {
{trb,zpg},{ora,zpx},{asl,zpx},{rmb,zpg},
{clc,imp},{ora,aby},{ina,imp},{ill,non},
{trb,aba},{ora,abx},{asl,abx},{bbr,zpb},
{jsr,adr},{and,idx},{ill,non},{ill,non},/* 20 */
{bit,zpg},{and,zpg},{rol,zpg},{rmb,zpg},
{plp,imp},{and,imm},{rol,acc},{ill,non},
{bit,aba},{and,aba},{rol,aba},{bbr,zpb},
{bmi,rel},{and,idy},{and,zpi},{ill,non},/* 30 */
{bit,zpx},{and,zpx},{rol,zpx},{rmb,zpg},
{sec,imp},{and,aby},{dea,imp},{ill,non},
{bit,abx},{and,abx},{rol,abx},{bbr,zpb},
{jsr,adr},{and_,idx},{ill,non},{ill,non},/* 20 */
{bit,zpg},{and_,zpg},{rol,zpg},{rmb,zpg},
{plp,imp},{and_,imm},{rol,acc},{ill,non},
{bit,aba},{and_,aba},{rol,aba},{bbr,zpb},
{bmi,rel},{and_,idy},{and_,zpi},{ill,non},/* 30 */
{bit,zpx},{and_,zpx},{rol,zpx},{rmb,zpg},
{sec,imp},{and_,aby},{dea,imp},{ill,non},
{bit,abx},{and_,abx},{rol,abx},{bbr,zpb},
{rti,imp},{eor,idx},{ill,non},{ill,non},/* 40 */
{ill,non},{eor,zpg},{lsr,zpg},{rmb,zpg},
{pha,imp},{eor,imm},{lsr,acc},{ill,non},
@ -351,14 +351,14 @@ static const struct op6502_info op65ce02[256] = {
{trb,zpg},{ora,zpx},{asl,zpx},{rmb,zpg},
{clc,imp},{ora,aby},{ina,imp},{inz,imp},
{trb,aba},{ora,abx},{asl,abx},{bbr,zpb},
{jsr,adr},{and,idx},{jsr,ind},{jsr,iax},/* 20 */
{bit,zpg},{and,zpg},{rol,zpg},{rmb,zpg},
{plp,imp},{and,imm},{rol,acc},{tys,imp},
{bit,aba},{and,aba},{rol,aba},{bbr,zpb},
{bmi,rel},{and,idz},{and,zpi},{bmi,rw2},/* 30 */
{bit,zpx},{and,zpx},{rol,zpx},{rmb,zpg},
{sec,imp},{and,aby},{dea,imp},{dez,imp},
{bit,abx},{and,abx},{rol,abx},{bbr,zpb},
{jsr,adr},{and_,idx},{jsr,ind},{jsr,iax},/* 20 */
{bit,zpg},{and_,zpg},{rol,zpg},{rmb,zpg},
{plp,imp},{and_,imm},{rol,acc},{tys,imp},
{bit,aba},{and_,aba},{rol,aba},{bbr,zpb},
{bmi,rel},{and_,idz},{and_,zpi},{bmi,rw2},/* 30 */
{bit,zpx},{and_,zpx},{rol,zpx},{rmb,zpg},
{sec,imp},{and_,aby},{dea,imp},{dez,imp},
{bit,abx},{and_,abx},{rol,abx},{bbr,zpb},
{rti,imp},{eor,idx},{neg,imp},{asr2,imp},/* 40 */
{asr2,zpg},{eor,zpg},{lsr,zpg},{rmb,zpg},
{pha,imp},{eor,imm},{lsr,acc},{taz,imp},
@ -421,14 +421,14 @@ static const struct op6502_info op4510[256] = {
{trb,zpg},{ora,zpx},{asl,zpx},{rmb,zpg},
{clc,imp},{ora,aby},{ina,imp},{inz,imp},
{trb,aba},{ora,abx},{asl,abx},{bbr,zpb},
{jsr,adr},{and,idx},{jsr,ind},{jsr,iax},/* 20 */
{bit,zpg},{and,zpg},{rol,zpg},{rmb,zpg},
{plp,imp},{and,imm},{rol,acc},{tys,imp},
{bit,aba},{and,aba},{rol,aba},{bbr,zpb},
{bmi,rel},{and,idz},{and,zpi},{bmi,rw2},/* 30 */
{bit,zpx},{and,zpx},{rol,zpx},{rmb,zpg},
{sec,imp},{and,aby},{dea,imp},{dez,imp},
{bit,abx},{and,abx},{rol,abx},{bbr,zpb},
{jsr,adr},{and_,idx},{jsr,ind},{jsr,iax},/* 20 */
{bit,zpg},{and_,zpg},{rol,zpg},{rmb,zpg},
{plp,imp},{and_,imm},{rol,acc},{tys,imp},
{bit,aba},{and_,aba},{rol,aba},{bbr,zpb},
{bmi,rel},{and_,idz},{and_,zpi},{bmi,rw2},/* 30 */
{bit,zpx},{and_,zpx},{rol,zpx},{rmb,zpg},
{sec,imp},{and_,aby},{dea,imp},{dez,imp},
{bit,abx},{and_,abx},{rol,abx},{bbr,zpb},
{rti,imp},{eor,idx},{neg,imp},{asr2,imp},/* 40 */
{asr2,zpg},{eor,zpg},{lsr,zpg},{rmb,zpg},
{pha,imp},{eor,imm},{lsr,acc},{taz,imp},
@ -491,14 +491,14 @@ static const struct op6502_info opdeco16[256] =
{ill,non},{ora,zpx},{asl,zpx},{ill,non},
{clc,imp},{ora,aby},{ill,non},{ill,non},
{ill,non},{ora,abx},{asl,abx},{ill,non},
{jsr,adr},{and,idx},{ill,non},{u23,zpg},/* 20 */
{bit,zpg},{and,zpg},{rol,zpg},{ill,non},
{plp,imp},{and,imm},{rol,acc},{ill,non},
{bit,aba},{and,aba},{rol,aba},{ill,non},
{bmi,rel},{and,idy},{ill,non},{ill,non},/* 30 */
{ill,non},{and,zpx},{rol,zpx},{ill,non},
{sec,imp},{and,aby},{ill,non},{ill,non},
{ill,non},{and,abx},{rol,abx},{u3F,zpg},
{jsr,adr},{and_,idx},{ill,non},{u23,zpg},/* 20 */
{bit,zpg},{and_,zpg},{rol,zpg},{ill,non},
{plp,imp},{and_,imm},{rol,acc},{ill,non},
{bit,aba},{and_,aba},{rol,aba},{ill,non},
{bmi,rel},{and_,idy},{ill,non},{ill,non},/* 30 */
{ill,non},{and_,zpx},{rol,zpx},{ill,non},
{sec,imp},{and_,aby},{ill,non},{ill,non},
{ill,non},{and_,abx},{rol,abx},{u3F,zpg},
{rti,imp},{eor,idx},{ill,non},{ill,non},/* 40 */
{ill,non},{eor,zpg},{lsr,zpg},{ill,non},
{pha,imp},{eor,imm},{lsr,acc},{u4B,zpg},

29
src/emu/cpu/m6502/m4510.c
View File

@ -155,6 +155,15 @@ struct _m4510_Regs {
m6510_port_write_func port_write;
};
INLINE m4510_Regs *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_M4510);
return (m4510_Regs *)device->token;
}
/***************************************************************
* include the opcode macros, functions and tables
***************************************************************/
@ -176,18 +185,18 @@ INLINE int m4510_cpu_readop_arg(m4510_Regs *cpustate)
static UINT8 default_rdmem_id(const address_space *space, offs_t address)
{
m4510_Regs *cpustate = space->cpu->token;
m4510_Regs *cpustate = get_safe_token(space->cpu);
return memory_read_byte_8le(space, M4510_MEM(address));
}
static void default_wrmem_id(const address_space *space, offs_t address, UINT8 data)
{
m4510_Regs *cpustate = space->cpu->token;
m4510_Regs *cpustate = get_safe_token(space->cpu);
memory_write_byte_8le(space, M4510_MEM(address), data);
}
static CPU_INIT( m4510 )
{
m4510_Regs *cpustate = device->token;
m4510_Regs *cpustate = get_safe_token(device);
cpustate->interrupt_inhibit = 0;
cpustate->rdmem_id = default_rdmem_id;
@ -199,7 +208,7 @@ static CPU_INIT( m4510 )
static CPU_RESET( m4510 )
{
m4510_Regs *cpustate = device->token;
m4510_Regs *cpustate = get_safe_token(device);
cpustate->insn = insn4510;
@ -253,7 +262,7 @@ INLINE void m4510_take_irq(m4510_Regs *cpustate)
static CPU_EXECUTE( m4510 )
{
m4510_Regs *cpustate = device->token;
m4510_Regs *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -334,7 +343,7 @@ static UINT8 m4510_get_port(m4510_Regs *cpustate)
static READ8_HANDLER( m4510_read_0000 )
{
UINT8 result = 0x00;
m4510_Regs *cpustate = space->cpu->token;
m4510_Regs *cpustate = get_safe_token(space->cpu);
switch(offset)
{
@ -352,7 +361,7 @@ static READ8_HANDLER( m4510_read_0000 )
static WRITE8_HANDLER( m4510_write_0000 )
{
m4510_Regs *cpustate = space->cpu->token;
m4510_Regs *cpustate = get_safe_token(space->cpu);
switch(offset)
{
@ -374,7 +383,7 @@ ADDRESS_MAP_END
static CPU_TRANSLATE( m4510 )
{
m4510_Regs *cpustate = device->token;
m4510_Regs *cpustate = get_safe_token(device);
if (space == ADDRESS_SPACE_PROGRAM)
*address = M4510_MEM(*address);
@ -387,7 +396,7 @@ static CPU_TRANSLATE( m4510 )
static CPU_SET_INFO( m4510 )
{
m4510_Regs *cpustate = device->token;
m4510_Regs *cpustate = get_safe_token(device);
switch (state)
{
@ -434,7 +443,7 @@ static CPU_SET_INFO( m4510 )
CPU_GET_INFO( m4510 )
{
m4510_Regs *cpustate = (device != NULL) ? device->token : NULL;
m4510_Regs *cpustate = (device != NULL && device != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

52
src/emu/cpu/m6502/m6502.c
View File

@ -91,6 +91,22 @@ struct _m6502_Regs
};
INLINE m6502_Regs *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_M6502 ||
cpu_get_type(device) == CPU_M6510 ||
cpu_get_type(device) == CPU_M6510T ||
cpu_get_type(device) == CPU_M7501 ||
cpu_get_type(device) == CPU_M8502 ||
cpu_get_type(device) == CPU_N2A03 ||
cpu_get_type(device) == CPU_M65C02 ||
cpu_get_type(device) == CPU_M65SC02 ||
cpu_get_type(device) == CPU_DECO16);
return (m6502_Regs *)device->token;
}
static UINT8 default_rdmem_id(const address_space *space, offs_t offset) { return memory_read_byte_8le(space, offset); }
static void default_wdmem_id(const address_space *space, offs_t offset, UINT8 data) { memory_write_byte_8le(space, offset, data); }
@ -132,7 +148,7 @@ static void default_wdmem_id(const address_space *space, offs_t offset, UINT8 da
static void m6502_common_init(const device_config *device, cpu_irq_callback irqcallback, UINT8 subtype, void (*const *insn)(m6502_Regs *cpustate), const char *type)
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
@ -170,7 +186,7 @@ static CPU_INIT( m6502 )
static CPU_RESET( m6502 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
/* wipe out the rest of the m6502 structure */
/* read the reset vector into PC */
PCL = RDMEM(M6502_RST_VEC);
@ -210,7 +226,7 @@ INLINE void m6502_take_irq(m6502_Regs *cpustate)
static CPU_EXECUTE( m6502 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -322,7 +338,7 @@ static CPU_INIT( n2a03 )
from the PSG core when such an occasion arises. */
void n2a03_irq(const device_config *device)
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
m6502_take_irq(cpustate);
}
@ -341,7 +357,7 @@ static CPU_INIT( m6510 )
static CPU_RESET( m6510 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
CPU_RESET_CALL(m6502);
cpustate->port = 0xff;
@ -355,7 +371,7 @@ static UINT8 m6510_get_port(m6502_Regs *cpustate)
static READ8_HANDLER( m6510_read_0000 )
{
m6502_Regs *cpustate = space->cpu->token;
m6502_Regs *cpustate = get_safe_token(space->cpu);
UINT8 result = 0x00;
switch(offset)
@ -374,7 +390,7 @@ static READ8_HANDLER( m6510_read_0000 )
static WRITE8_HANDLER( m6510_write_0000 )
{
m6502_Regs *cpustate = space->cpu->token;
m6502_Regs *cpustate = get_safe_token(space->cpu);
switch(offset)
{
@ -409,7 +425,7 @@ static CPU_INIT( m65c02 )
static CPU_RESET( m65c02 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
CPU_RESET_CALL(m6502);
P &=~F_D;
@ -436,7 +452,7 @@ INLINE void m65c02_take_irq(m6502_Regs *cpustate)
static CPU_EXECUTE( m65c02 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -521,7 +537,7 @@ static CPU_INIT( m65sc02 )
static CPU_INIT( deco16 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
m6502_common_init(device, irqcallback, SUBTYPE_DECO16, insndeco16, "deco16");
cpustate->io = memory_find_address_space(device, ADDRESS_SPACE_IO);
}
@ -529,7 +545,7 @@ static CPU_INIT( deco16 )
static CPU_RESET( deco16 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
CPU_RESET_CALL(m6502);
cpustate->subtype = SUBTYPE_DECO16;
@ -606,7 +622,7 @@ static void deco16_set_irq_line(m6502_Regs *cpustate, int irqline, int state)
static CPU_EXECUTE( deco16 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -659,7 +675,7 @@ static CPU_EXECUTE( deco16 )
static CPU_SET_INFO( m6502 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
switch (state)
{
@ -693,7 +709,7 @@ static CPU_SET_INFO( m6502 )
CPU_GET_INFO( m6502 )
{
m6502_Regs *cpustate = (device != NULL) ? device->token : NULL;
m6502_Regs *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
@ -808,7 +824,7 @@ CPU_GET_INFO( n2a03 )
static CPU_SET_INFO( m6510 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
switch (state)
{
@ -822,7 +838,7 @@ static CPU_SET_INFO( m6510 )
CPU_GET_INFO( m6510 )
{
m6502_Regs *cpustate = (device != NULL) ? device->token : NULL;
m6502_Regs *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
@ -908,7 +924,7 @@ CPU_GET_INFO( m8502 )
static CPU_SET_INFO( m65c02 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
switch (state)
{
@ -972,7 +988,7 @@ CPU_GET_INFO( m65sc02 )
static CPU_SET_INFO( deco16 )
{
m6502_Regs *cpustate = device->token;
m6502_Regs *cpustate = get_safe_token(device);
switch (state)
{

18
src/emu/cpu/m6502/m6509.c
View File

@ -86,6 +86,14 @@ struct _m6509_Regs {
m6502_write_indexed_func wrmem_id; /* writemem callback for indexed instructions */
};
INLINE m6509_Regs *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_M6509);
return (m6509_Regs *)device->token;
}
/***************************************************************
* include the opcode macros, functions and tables
@ -132,7 +140,7 @@ static void default_wdmem_id(const address_space *space, offs_t address, UINT8 d
static CPU_INIT( m6509 )
{
m6509_Regs *cpustate = device->token;
m6509_Regs *cpustate = get_safe_token(device);
cpustate->rdmem_id = default_rdmem_id;
cpustate->wrmem_id = default_wdmem_id;
@ -143,7 +151,7 @@ static CPU_INIT( m6509 )
static CPU_RESET( m6509 )
{
m6509_Regs *cpustate = device->token;
m6509_Regs *cpustate = get_safe_token(device);
cpustate->insn = insn6509;
@ -190,7 +198,7 @@ INLINE void m6509_take_irq( m6509_Regs *cpustate)
static CPU_EXECUTE( m6509 )
{
m6509_Regs *cpustate = device->token;
m6509_Regs *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -280,7 +288,7 @@ static void m6509_set_irq_line(m6509_Regs *cpustate, int irqline, int state)
static CPU_SET_INFO( m6509 )
{
m6509_Regs *cpustate = device->token;
m6509_Regs *cpustate = get_safe_token(device);
switch (state)
{
@ -316,7 +324,7 @@ static CPU_SET_INFO( m6509 )
CPU_GET_INFO( m6509 )
{
m6509_Regs *cpustate = (device != NULL) ? device->token : NULL;
m6509_Regs *cpustate = (device != NULL && device != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

19
src/emu/cpu/m6502/m65ce02.c
View File

@ -80,6 +80,15 @@ struct _m65ce02_Regs {
m6502_write_indexed_func wrmem_id; /* writemem callback for indexed instructions */
};
INLINE m65ce02_Regs *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_M65CE02);
return (m65ce02_Regs *)device->token;
}
/***************************************************************
* include the opcode macros, functions and tables
***************************************************************/
@ -91,7 +100,7 @@ static void default_wdmem_id(const address_space *space, offs_t address, UINT8 d
static CPU_INIT( m65ce02 )
{
m65ce02_Regs *cpustate = device->token;
m65ce02_Regs *cpustate = get_safe_token(device);
cpustate->rdmem_id = default_rdmem_id;
cpustate->wrmem_id = default_wdmem_id;
@ -102,7 +111,7 @@ static CPU_INIT( m65ce02 )
static CPU_RESET( m65ce02 )
{
m65ce02_Regs *cpustate = device->token;
m65ce02_Regs *cpustate = get_safe_token(device);
cpustate->insn = insn65ce02;
@ -148,7 +157,7 @@ INLINE void m65ce02_take_irq(m65ce02_Regs *cpustate)
static CPU_EXECUTE( m65ce02 )
{
m65ce02_Regs *cpustate = device->token;
m65ce02_Regs *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -227,7 +236,7 @@ static void m65ce02_set_irq_line(m65ce02_Regs *cpustate, int irqline, int state)
static CPU_SET_INFO( m65ce02 )
{
m65ce02_Regs *cpustate = device->token;
m65ce02_Regs *cpustate = get_safe_token(device);
switch( state )
{
@ -260,7 +269,7 @@ static CPU_SET_INFO( m65ce02 )
CPU_GET_INFO( m65ce02 )
{
m65ce02_Regs *cpustate = (device != NULL) ? device->token : NULL;
m65ce02_Regs *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch( state )
{

10
src/emu/cpu/m6800/6800dasm.c
View File

@ -47,7 +47,7 @@ enum op_names {
oim, ora, orb, psha, pshb, pshx, pula, pulb,
pulx, rol, rola, rolb, ror, rora, rorb, rti,
rts, sba, sbca, sbcb, sec, sev, sta, stb,
std, sei, sts, stx, suba, subb, subd, swi,
_std, sei, sts, stx, suba, subb, subd, swi,
wai, tab, tap, tba, tim, tpa, tst, tsta,
tstb, tsx, txs, asx1, asx2, xgdx, addx, adcx
};
@ -131,19 +131,19 @@ static const UINT8 table[0x102][3] = {
{subb,imb,0},{cmpb,imb,0},{sbcb,imb,0},{addd,imw,1},/* c0 */
{andb,imb,0},{bitb,imb,0},{ldb, imb,0},{stb, imb,0},
{eorb,imb,0},{adcb,imb,0},{orb, imb,0},{addb,imb,0},
{ldd, imw,1},{std, imw,1},{ldx, imw,0},{stx, imw,0},
{ldd, imw,1},{_std,imw,1},{ldx, imw,0},{stx, imw,0},
{subb,dir,0},{cmpb,dir,0},{sbcb,dir,0},{addd,dir,1},/* d0 */
{andb,dir,0},{bitb,dir,0},{ldb, dir,0},{stb, dir,0},
{eorb,dir,0},{adcb,dir,0},{orb, dir,0},{addb,dir,0},
{ldd, dir,1},{std, dir,1},{ldx, dir,0},{stx, dir,0},
{ldd, dir,1},{_std,dir,1},{ldx, dir,0},{stx, dir,0},
{subb,idx,0},{cmpb,idx,0},{sbcb,idx,0},{addd,idx,1},/* e0 */
{andb,idx,0},{bitb,idx,0},{ldb, idx,0},{stb, idx,0},
{eorb,idx,0},{adcb,idx,0},{orb, idx,0},{addb,idx,0},
{ldd, idx,1},{std, idx,1},{ldx, idx,0},{stx, idx,0},
{ldd, idx,1},{_std,idx,1},{ldx, idx,0},{stx, idx,0},
{subb,ext,0},{cmpb,ext,0},{sbcb,ext,0},{addd,ext,1},/* f0 */
{andb,ext,0},{bitb,ext,0},{ldb, ext,0},{stb, ext,0},
{eorb,ext,0},{adcb,ext,0},{orb, ext,0},{addb,ext,0},
{ldd, ext,1},{std, ext,1},{ldx, ext,0},{stx, ext,0},
{ldd, ext,1},{_std,ext,1},{ldx, ext,0},{stx, ext,0},
/* extra instruction $fc for NSC-8105 */
{addx,ext,0},

51
src/emu/cpu/m6800/m6800.c
View File

@ -152,7 +152,20 @@ struct _m6800_state
};
//static void *token; /* for READ8/WRITE8 handlers */
INLINE m6800_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_M6800 ||
cpu_get_type(device) == CPU_M6801 ||
cpu_get_type(device) == CPU_M6802 ||
cpu_get_type(device) == CPU_M6803 ||
cpu_get_type(device) == CPU_M6808 ||
cpu_get_type(device) == CPU_HD63701 ||
cpu_get_type(device) == CPU_NSC8105);
return (m6800_state *)device->token;
}
#if 0
static void hd63701_trap_pc(m6800_state *cpustate);
@ -663,7 +676,7 @@ static int m6800_rx(m6800_state *cpustate)
static TIMER_CALLBACK(m6800_tx_tick)
{
m6800_state *cpustate = ptr;
m6800_state *cpustate = (m6800_state *)ptr;
if (cpustate->trcsr & M6800_TRCSR_TE)
{
@ -737,7 +750,7 @@ static TIMER_CALLBACK(m6800_tx_tick)
static TIMER_CALLBACK(m6800_rx_tick)
{
m6800_state *cpustate =ptr;
m6800_state *cpustate = (m6800_state *)ptr;
if (cpustate->trcsr & M6800_TRCSR_RE)
{
@ -884,7 +897,7 @@ static void state_register(m6800_state *cpustate, const char *type)
static CPU_INIT( m6800 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
cpustate->data = memory_find_address_space(device, ADDRESS_SPACE_DATA);
@ -900,7 +913,7 @@ static CPU_INIT( m6800 )
static CPU_RESET( m6800 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
SEI; /* IRQ disabled */
PCD = RM16(cpustate, 0xfffe );
@ -1242,7 +1255,7 @@ INLINE void m6800_execute_one(m6800_state *cpustate, UINT8 ireg)
****************************************************************************/
static CPU_EXECUTE( m6800 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
UINT8 ireg;
cpustate->icount = cycles;
@ -1276,7 +1289,7 @@ static CPU_EXECUTE( m6800 )
#if (HAS_M6801)
static CPU_INIT( m6801 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
// cpustate->subtype = SUBTYPE_M6801;
cpustate->insn = m6803_insn;
cpustate->cycles = cycles_6803;
@ -1301,7 +1314,7 @@ static CPU_INIT( m6801 )
#if (HAS_M6802)
static CPU_INIT( m6802 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
// cpustate->subtype = SUBTYPE_M6802;
cpustate->insn = m6800_insn;
cpustate->cycles = cycles_6800;
@ -1322,7 +1335,7 @@ static CPU_INIT( m6802 )
#if (HAS_M6803)
static CPU_INIT( m6803 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
// cpustate->subtype = SUBTYPE_M6803;
cpustate->insn = m6803_insn;
cpustate->cycles = cycles_6803;
@ -1614,7 +1627,7 @@ INLINE void m6803_execute_one(m6800_state *cpustate, UINT8 ireg)
#if (HAS_M6803||HAS_M6801)
static CPU_EXECUTE( m6803 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
UINT8 ireg;
cpustate->icount = cycles;
@ -1662,7 +1675,7 @@ ADDRESS_MAP_END
#if (HAS_M6808)
static CPU_INIT( m6808 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
// cpustate->subtype = SUBTYPE_M6808;
cpustate->insn = m6800_insn;
cpustate->cycles = cycles_6800;
@ -1684,7 +1697,7 @@ static CPU_INIT( m6808 )
static CPU_INIT( hd63701 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
// cpustate->subtype = SUBTYPE_HD63701;
cpustate->insn = hd63701_insn;
cpustate->cycles = cycles_63701;
@ -1974,7 +1987,7 @@ INLINE void hd63071_execute_one(m6800_state *cpustate, UINT8 ireg)
****************************************************************************/
static CPU_EXECUTE( hd63701 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
UINT8 ireg;
cpustate->icount = cycles;
@ -2037,7 +2050,7 @@ WRITE8_HANDLER( hd63701_internal_registers_w )
#if (HAS_NSC8105)
static CPU_INIT( nsc8105 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
// cpustate->subtype = SUBTYPE_NSC8105;
cpustate->device = device;
@ -2322,7 +2335,7 @@ INLINE void nsc8105_execute_one(m6800_state *cpustate, UINT8 ireg)
****************************************************************************/
static CPU_EXECUTE( nsc8105 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
UINT8 ireg;
cpustate->icount = cycles;
@ -2356,7 +2369,7 @@ static CPU_EXECUTE( nsc8105 )
static READ8_HANDLER( m6803_internal_registers_r )
{
m6800_state *cpustate = space->cpu->token;
m6800_state *cpustate = get_safe_token(space->cpu);
switch (offset)
{
@ -2454,7 +2467,7 @@ static READ8_HANDLER( m6803_internal_registers_r )
static WRITE8_HANDLER( m6803_internal_registers_w )
{
m6800_state *cpustate = space->cpu->token;
m6800_state *cpustate = get_safe_token(space->cpu);
switch (offset)
{
@ -2650,7 +2663,7 @@ static WRITE8_HANDLER( m6803_internal_registers_w )
static CPU_SET_INFO( m6800 )
{
m6800_state *cpustate = device->token;
m6800_state *cpustate = get_safe_token(device);
switch (state)
{
@ -2678,7 +2691,7 @@ static CPU_SET_INFO( m6800 )
CPU_GET_INFO( m6800 )
{
m6800_state *cpustate = device ? device->token : NULL;
m6800_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

54
src/emu/cpu/m68000/m68kcpu.c
View File

@ -474,6 +474,20 @@ static const cpu_state_table state_table_template =
INLINE m68ki_cpu_core *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_M68000 ||
cpu_get_type(device) == CPU_M68008 ||
cpu_get_type(device) == CPU_M68010 ||
cpu_get_type(device) == CPU_M68EC020 ||
cpu_get_type(device) == CPU_M68020 ||
cpu_get_type(device) == CPU_M68040);
return (m68ki_cpu_core *)device->token;
}
/* ======================================================================== */
/* ================================= API ================================== */
/* ======================================================================== */
@ -504,7 +518,7 @@ static void set_irq_line(m68ki_cpu_core *m68k, int irqline, int state)
static void m68k_presave(running_machine *machine, void *param)
{
m68ki_cpu_core *m68k = param;
m68ki_cpu_core *m68k = (m68ki_cpu_core *)param;
m68k->save_sr = m68ki_get_sr(m68k);
m68k->save_stopped = (m68k->stopped & STOP_LEVEL_STOP) != 0;
m68k->save_halted = (m68k->stopped & STOP_LEVEL_HALT) != 0;
@ -512,7 +526,7 @@ static void m68k_presave(running_machine *machine, void *param)
static void m68k_postload(running_machine *machine, void *param)
{
m68ki_cpu_core *m68k = param;
m68ki_cpu_core *m68k = (m68ki_cpu_core *)param;
m68ki_set_sr_noint_nosp(m68k, m68k->save_sr);
m68k->stopped = m68k->save_stopped ? STOP_LEVEL_STOP : 0
| m68k->save_halted ? STOP_LEVEL_HALT : 0;
@ -523,7 +537,7 @@ static void m68k_postload(running_machine *machine, void *param)
/* Execute some instructions until we use up cycles clock cycles */
static CPU_EXECUTE( m68k )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
/* Set our pool of clock cycles available */
m68k->remaining_cycles = cycles;
@ -572,7 +586,7 @@ static CPU_EXECUTE( m68k )
static CPU_INIT( m68k )
{
static UINT32 emulation_initialized = 0;
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
m68k->device = device;
m68k->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -614,7 +628,7 @@ static CPU_INIT( m68k )
/* Pulse the RESET line on the CPU */
static CPU_RESET( m68k )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
/* Clear all stop levels and eat up all remaining cycles */
m68k->stopped = 0;
@ -650,7 +664,7 @@ static CPU_RESET( m68k )
static CPU_DISASSEMBLE( m68k )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
return m68k_disassemble_raw(buffer, pc, oprom, opram, m68k->dasm_type);
}
@ -662,7 +676,7 @@ static CPU_DISASSEMBLE( m68k )
static CPU_IMPORT_STATE( m68k )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
switch (entry->index)
{
@ -700,7 +714,7 @@ static CPU_IMPORT_STATE( m68k )
static CPU_EXPORT_STATE( m68k )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
switch (entry->index)
{
@ -728,7 +742,7 @@ static CPU_EXPORT_STATE( m68k )
static CPU_SET_INFO( m68k )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -754,7 +768,7 @@ static CPU_SET_INFO( m68k )
static CPU_GET_INFO( m68k )
{
m68ki_cpu_core *m68k = (device != NULL) ? device->token : NULL;
m68ki_cpu_core *m68k = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
int sr;
switch (state)
@ -832,7 +846,7 @@ static CPU_GET_INFO( m68k )
void m68k_set_encrypted_opcode_range(const device_config *device, offs_t start, offs_t end)
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
m68k->encrypted_start = start;
m68k->encrypted_end = end;
}
@ -866,7 +880,7 @@ static const m68k_memory_interface interface_d8 =
static UINT16 read_immediate_16(const address_space *space, offs_t address)
{
m68ki_cpu_core *m68k = space->cpu->token;
m68ki_cpu_core *m68k = get_safe_token(space->cpu);
return memory_decrypted_read_word(space, (address) ^ m68k->memory.opcode_xor);
}
@ -972,7 +986,7 @@ static const m68k_memory_interface interface_d32 =
static CPU_INIT( m68000 )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
CPU_INIT_CALL(m68k);
@ -1015,7 +1029,7 @@ CPU_GET_INFO( m68000 )
static CPU_INIT( m68008 )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
CPU_INIT_CALL(m68k);
@ -1062,7 +1076,7 @@ CPU_GET_INFO( m68008 )
static CPU_INIT( m68010 )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
CPU_INIT_CALL(m68k);
@ -1105,7 +1119,7 @@ CPU_GET_INFO( m68010 )
static CPU_INIT( m68020 )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
CPU_INIT_CALL(m68k);
@ -1129,7 +1143,7 @@ static CPU_INIT( m68020 )
CPU_GET_INFO( m68020 )
{
m68ki_cpu_core *m68k = (device != NULL) ? device->token : NULL;
m68ki_cpu_core *m68k = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
int sr;
switch (state)
@ -1180,7 +1194,7 @@ CPU_GET_INFO( m68020 )
static CPU_INIT( m68ec020 )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
CPU_INIT_CALL(m68k);
@ -1225,7 +1239,7 @@ CPU_GET_INFO( m68ec020 )
static CPU_INIT( m68040 )
{
m68ki_cpu_core *m68k = device->token;
m68ki_cpu_core *m68k = get_safe_token(device);
CPU_INIT_CALL(m68k);
@ -1249,7 +1263,7 @@ static CPU_INIT( m68040 )
CPU_GET_INFO( m68040 )
{
m68ki_cpu_core *m68k = (device != NULL) ? device->token : NULL;
m68ki_cpu_core *m68k = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
int sr;
switch (state)

1
src/emu/cpu/m68000/m68kcpu.h
View File

@ -564,7 +564,6 @@ struct _m68ki_cpu_core
int initial_cycles;
int remaining_cycles; /* Number of clocks remaining */
UINT32 tracing;
UINT32 address_space;
jmp_buf aerr_trap;
UINT32 aerr_address;

2
src/emu/cpu/m68000/m68kmake.c
View File

@ -1213,7 +1213,7 @@ static void read_insert(char* insert)
/* ============================= MAIN FUNCTION ============================ */
/* ======================================================================== */
int main(int argc, char **argv)
int main(int argc, char *argv[])
{
/* File stuff */
char output_path[M68K_MAX_DIR] = "";

37
src/emu/cpu/m6805/m6805.c
View File

@ -66,6 +66,17 @@ typedef struct
int nmi_state;
} m6805_Regs;
INLINE m6805_Regs *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_M6805 ||
cpu_get_type(device) == CPU_M68705 ||
cpu_get_type(device) == CPU_HD63705);
return (m6805_Regs *)device->token;
}
/****************************************************************************/
/* Read a byte from given memory location */
/****************************************************************************/
@ -452,7 +463,7 @@ static void state_register(m6805_Regs *cpustate, const char *type, const device_
static CPU_INIT( m6805 )
{
m6805_Regs *cpustate = device->token;
m6805_Regs *cpustate = get_safe_token(device);
state_register(cpustate, "m6805", device);
cpustate->irq_callback = irqcallback;
@ -462,7 +473,7 @@ static CPU_INIT( m6805 )
static CPU_RESET( m6805 )
{
m6805_Regs *cpustate = device->token;
m6805_Regs *cpustate = get_safe_token(device);
cpu_irq_callback save_irqcallback = cpustate->irq_callback;
memset(cpustate, 0, sizeof(m6805_Regs));
@ -509,7 +520,7 @@ static void set_irq_line( m6805_Regs *cpustate, int irqline, int state )
static CPU_EXECUTE( m6805 )
{
UINT8 ireg;
m6805_Regs *cpustate = device->token;
m6805_Regs *cpustate = get_safe_token(device);
S = SP_ADJUST( S ); /* Taken from CPU_SET_CONTEXT when pointer'afying */
cpustate->iCount = cycles;
@ -809,7 +820,7 @@ static CPU_EXECUTE( m6805 )
#if (HAS_M68705)
static CPU_INIT( m68705 )
{
m6805_Regs *cpustate = device->token;
m6805_Regs *cpustate = get_safe_token(device);
state_register(cpustate, "m68705", device);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
@ -817,7 +828,7 @@ static CPU_INIT( m68705 )
static CPU_RESET( m68705 )
{
m6805_Regs *cpustate = device->token;
m6805_Regs *cpustate = get_safe_token(device);
CPU_RESET_CALL(m6805);
/* Overide default 6805 type */
@ -840,7 +851,7 @@ static void m68705_set_irq_line(m6805_Regs *cpustate, int irqline, int state)
#if (HAS_HD63705)
static CPU_INIT( hd63705 )
{
m6805_Regs *cpustate = device->token;
m6805_Regs *cpustate = get_safe_token(device);
state_register(cpustate, "hd63705", device);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
@ -848,7 +859,7 @@ static CPU_INIT( hd63705 )
static CPU_RESET( hd63705 )
{
m6805_Regs *cpustate = device->token;
m6805_Regs *cpustate = get_safe_token(device);
CPU_RESET_CALL(m6805);
/* Overide default 6805 types */
@ -886,7 +897,7 @@ static void hd63705_set_irq_line(m6805_Regs *cpustate, int irqline, int state)
static CPU_SET_INFO( m6805 )
{
m6805_Regs *cpustate = device->token;
m6805_Regs *cpustate = get_safe_token(device);
switch (state)
{
@ -911,7 +922,7 @@ static CPU_SET_INFO( m6805 )
CPU_GET_INFO( m6805 )
{
m6805_Regs *cpustate = (device != NULL) ? device->token : NULL;
m6805_Regs *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
@ -993,7 +1004,7 @@ CPU_GET_INFO( m6805 )
**************************************************************************/
static CPU_SET_INFO( m68705 )
{
m6805_Regs *cpustate = device->token;
m6805_Regs *cpustate = get_safe_token(device);
switch(state)
{
@ -1006,7 +1017,7 @@ static CPU_SET_INFO( m68705 )
CPU_GET_INFO( m68705 )
{
m6805_Regs *cpustate = (device != NULL) ? device->token : NULL;
m6805_Regs *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
@ -1034,7 +1045,7 @@ CPU_GET_INFO( m68705 )
static CPU_SET_INFO( hd63705 )
{
m6805_Regs *cpustate = device->token;
m6805_Regs *cpustate = get_safe_token(device);
switch (state)
{
@ -1055,7 +1066,7 @@ static CPU_SET_INFO( hd63705 )
CPU_GET_INFO( hd63705 )
{
m6805_Regs *cpustate = (device != NULL) ? device->token : NULL;
m6805_Regs *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

2
src/emu/cpu/m6809/6809dasm.c
View File

@ -368,7 +368,7 @@ CPU_DISASSEMBLE( m6809 )
const UINT8 *operandarray;
unsigned int ea, flags;
int numoperands, offset, indirect;
const m6809_config *configdata = device ? device->static_config : NULL;
const m6809_config *configdata = device ? (const m6809_config *)device->static_config : NULL;
int encrypt_only_first_byte = configdata ? configdata->encrypt_only_first_byte : 0;
int i, p = 0, page = 0, opcode_found = FALSE;

22
src/emu/cpu/m6809/m6809.c
View File

@ -110,6 +110,16 @@ struct _m68_state_t
UINT8 nmi_state;
};
INLINE m68_state_t *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_M6809 ||
cpu_get_type(device) == CPU_M6809E);
return (m68_state_t *)device->token;
}
static void check_irq_lines( m68_state_t *m68_state );
static void IIError(m68_state_t *m68_state);
@ -366,8 +376,8 @@ static CPU_INIT( m6809 )
0
};
const m6809_config *configdata = device->static_config ? device->static_config : &default_config;
m68_state_t *m68_state = device->token;
const m6809_config *configdata = device->static_config ? (const m6809_config *)device->static_config : &default_config;
m68_state_t *m68_state = get_safe_token(device);
m68_state->config = configdata;
m68_state->irq_callback = irqcallback;
@ -397,7 +407,7 @@ static CPU_INIT( m6809 )
/****************************************************************************/
static CPU_RESET( m6809 )
{
m68_state_t *m68_state = device->token;
m68_state_t *m68_state = get_safe_token(device);
m68_state->int_state = 0;
m68_state->nmi_state = CLEAR_LINE;
@ -475,7 +485,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
/* execute instructions on this CPU until icount expires */
static CPU_EXECUTE( m6809 ) /* NS 970908 */
{
m68_state_t *m68_state = device->token;
m68_state_t *m68_state = get_safe_token(device);
m68_state->icount = cycles - m68_state->extra_cycles;
m68_state->extra_cycles = 0;
@ -1060,7 +1070,7 @@ INLINE void fetch_effective_address( m68_state_t *m68_state )
static CPU_SET_INFO( m6809 )
{
m68_state_t *m68_state = device->token;
m68_state_t *m68_state = get_safe_token(device);
switch (state)
{
@ -1091,7 +1101,7 @@ static CPU_SET_INFO( m6809 )
CPU_GET_INFO( m6809 )
{
m68_state_t *m68_state = (device != NULL) ? device->token : NULL;
m68_state_t *m68_state = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

21
src/emu/cpu/mb86233/mb86233.c
View File

@ -62,6 +62,15 @@ struct _mb86233_state
UINT32 *Tables;
};
INLINE mb86233_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_MB86233);
return (mb86233_state *)device->token;
}
/***************************************************************************
MACROS
***************************************************************************/
@ -95,7 +104,7 @@ struct _mb86233_state
static CPU_INIT( mb86233 )
{
mb86233_state *cpustate = device->token;
mb86233_state *cpustate = get_safe_token(device);
mb86233_cpu_core * _config = (mb86233_cpu_core *)device->static_config;
(void)irqcallback;
@ -109,7 +118,7 @@ static CPU_INIT( mb86233 )
cpustate->fifo_write_cb = _config->fifo_write_cb;
}
cpustate->RAM = auto_malloc(2 * 0x200 * sizeof(UINT32)); /* 2x 2KB */
cpustate->RAM = (UINT32 *)auto_malloc(2 * 0x200 * sizeof(UINT32)); /* 2x 2KB */
memset( cpustate->RAM, 0, 2 * 0x200 * sizeof(UINT32) );
cpustate->ARAM = &cpustate->RAM[0];
cpustate->BRAM = &cpustate->RAM[0x200];
@ -120,7 +129,7 @@ static CPU_INIT( mb86233 )
static CPU_RESET( mb86233 )
{
mb86233_state *cpustate = device->token;
mb86233_state *cpustate = get_safe_token(device);
/* zero registers and flags */
cpustate->pc = 0;
@ -928,7 +937,7 @@ static UINT32 INDIRECT( mb86233_state *cpustate, UINT32 reg, int source )
static CPU_EXECUTE( mb86233 )
{
mb86233_state *cpustate = device->token;
mb86233_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -1568,7 +1577,7 @@ static CPU_DISASSEMBLE( mb86233 )
static CPU_SET_INFO( mb86233 )
{
mb86233_state *cpustate = device->token;
mb86233_state *cpustate = get_safe_token(device);
switch (state)
{
@ -1609,7 +1618,7 @@ static CPU_SET_INFO( mb86233 )
CPU_GET_INFO( mb86233 )
{
mb86233_state *cpustate = (device != NULL) ? device->token : NULL;
mb86233_state *cpustate = (device != NULL && device != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

23
src/emu/cpu/mb88xx/mb88xx.c
View File

@ -60,6 +60,19 @@ struct _mb88_state
int icount;
};
INLINE mb88_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_MB88 ||
cpu_get_type(device) == CPU_MB8841 ||
cpu_get_type(device) == CPU_MB8842 ||
cpu_get_type(device) == CPU_MB8843 ||
cpu_get_type(device) == CPU_MB8844);
return (mb88_state *)device->token;
}
/***************************************************************************
MACROS
***************************************************************************/
@ -99,7 +112,7 @@ struct _mb88_state
static CPU_INIT( mb88 )
{
mb88_state *cpustate = device->token;
mb88_state *cpustate = get_safe_token(device);
if ( device->static_config )
{
@ -138,7 +151,7 @@ static CPU_INIT( mb88 )
static CPU_RESET( mb88 )
{
mb88_state *cpustate = device->token;
mb88_state *cpustate = get_safe_token(device);
/* zero registers and flags */
cpustate->PC = 0;
@ -216,7 +229,7 @@ static void update_pio( mb88_state *cpustate )
static CPU_EXECUTE( mb88 )
{
mb88_state *cpustate = device->token;
mb88_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -737,7 +750,7 @@ static CPU_EXECUTE( mb88 )
static CPU_SET_INFO( mb88 )
{
mb88_state *cpustate = device->token;
mb88_state *cpustate = get_safe_token(device);
switch (state)
{
@ -776,7 +789,7 @@ static CPU_SET_INFO( mb88 )
CPU_GET_INFO( mb88 )
{
mb88_state *cpustate = (device != NULL) ? device->token : NULL;
mb88_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

21
src/emu/cpu/mc68hc11/mc68hc11.c
View File

@ -63,6 +63,15 @@ struct _hc11_state
int internal_ram_size;
};
INLINE hc11_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_MC68HC11);
return (hc11_state *)device->token;
}
#define HC11OP(XX) hc11_##XX
/*****************************************************************************/
@ -316,7 +325,7 @@ static void (*hc11_optable_page4[256])(hc11_state *cpustate);
static CPU_INIT( hc11 )
{
hc11_state *cpustate = device->token;
hc11_state *cpustate = get_safe_token(device);
int i;
/* clear the opcode tables */
@ -347,7 +356,7 @@ static CPU_INIT( hc11 )
}
cpustate->internal_ram_size = 1280; /* FIXME: this is for MC68HC11M0 */
cpustate->internal_ram = auto_malloc(cpustate->internal_ram_size);
cpustate->internal_ram = (UINT8 *)auto_malloc(cpustate->internal_ram_size);
cpustate->reg_position = 0;
cpustate->ram_position = 0x100;
@ -359,7 +368,7 @@ static CPU_INIT( hc11 )
static CPU_RESET( hc11 )
{
hc11_state *cpustate = device->token;
hc11_state *cpustate = get_safe_token(device);
cpustate->pc = READ16(cpustate, 0xfffe);
}
@ -370,7 +379,7 @@ static CPU_EXIT( hc11 )
static CPU_EXECUTE( hc11 )
{
hc11_state *cpustate = device->token;
hc11_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -392,7 +401,7 @@ static CPU_EXECUTE( hc11 )
static CPU_SET_INFO( mc68hc11 )
{
hc11_state *cpustate = device->token;
hc11_state *cpustate = get_safe_token(device);
switch (state)
{
@ -409,7 +418,7 @@ static CPU_SET_INFO( mc68hc11 )
CPU_GET_INFO( mc68hc11 )
{
hc11_state *cpustate = (device != NULL) ? device->token : NULL;
hc11_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch(state)
{

2
src/emu/cpu/mcs48/mcs48.c
View File

@ -323,7 +323,7 @@ INLINE UINT8 argument_fetch(mcs48_state *cpustate)
INLINE void update_regptr(mcs48_state *cpustate)
{
cpustate->regptr = memory_get_write_ptr(cpustate->data, (cpustate->psw & B_FLAG) ? 24 : 0);
cpustate->regptr = (UINT8 *)memory_get_write_ptr(cpustate->data, (cpustate->psw & B_FLAG) ? 24 : 0);
}

6
src/emu/cpu/mcs51/mcs51.c
View File

@ -687,8 +687,8 @@ INLINE UINT8 r_psw(mcs51_state_t *mcs51_state) { return SFR_A(ADDR_PSW); }
INLINE void update_ptrs(mcs51_state_t *mcs51_state)
{
mcs51_state->internal_ram = memory_get_write_ptr(mcs51_state->data, 0x00);
mcs51_state->sfr_ram = memory_get_write_ptr(mcs51_state->data, 0x100);
mcs51_state->internal_ram = (UINT8 *)memory_get_write_ptr(mcs51_state->data, 0x00);
mcs51_state->sfr_ram = (UINT8 *)memory_get_write_ptr(mcs51_state->data, 0x100);
}
@ -2381,7 +2381,7 @@ static CPU_INIT( ds5002fp )
{
/* default configuration */
static const ds5002fp_config default_config = { 0x00, 0x00, 0x00 };
const ds5002fp_config *sconfig = device->static_config ? device->static_config : &default_config;
const ds5002fp_config *sconfig = device->static_config ? (const ds5002fp_config *)device->static_config : &default_config;
mcs51_state_t *mcs51_state = get_safe_token(device);
CPU_INIT_CALL( mcs51 );

2
src/emu/cpu/mips/mips3com.c
View File

@ -72,7 +72,7 @@ INLINE int tlb_entry_is_global(const mips3_tlb_entry *entry)
void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, const device_config *device, cpu_irq_callback irqcallback)
{
const mips3_config *config = device->static_config;
const mips3_config *config = (const mips3_config *)device->static_config;
int tlbindex;
/* initialize based on the config */

61
src/emu/cpu/mips/mips3drc.c
View File

@ -274,6 +274,31 @@ static const UINT8 fpmode_source[4] =
INLINE FUNCTIONS
***************************************************************************/
INLINE mips3_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_VR4300BE ||
cpu_get_type(device) == CPU_VR4300LE ||
cpu_get_type(device) == CPU_VR4310BE ||
cpu_get_type(device) == CPU_VR4310LE ||
cpu_get_type(device) == CPU_R4600BE ||
cpu_get_type(device) == CPU_R4600LE ||
cpu_get_type(device) == CPU_R4650BE ||
cpu_get_type(device) == CPU_R4650LE ||
cpu_get_type(device) == CPU_R4700BE ||
cpu_get_type(device) == CPU_R4700LE ||
cpu_get_type(device) == CPU_R5000BE ||
cpu_get_type(device) == CPU_R5000LE ||
cpu_get_type(device) == CPU_QED5271BE ||
cpu_get_type(device) == CPU_QED5271LE ||
cpu_get_type(device) == CPU_RM7000BE ||
cpu_get_type(device) == CPU_RM7000LE);
return *(mips3_state **)device->token;
}
/*-------------------------------------------------
epc - compute the exception PC from a
descriptor
@ -352,19 +377,19 @@ static void mips3_init(mips3_flavor flavor, int bigendian, const device_config *
int regnum;
/* allocate enough space for the cache and the core */
cache = drccache_alloc(CACHE_SIZE + sizeof(*mips3));
cache = (drccache *)drccache_alloc(CACHE_SIZE + sizeof(*mips3));
if (cache == NULL)
fatalerror("Unable to allocate cache of size %d", (UINT32)(CACHE_SIZE + sizeof(*mips3)));
/* allocate the core memory */
*(mips3_state **)device->token = mips3 = drccache_memory_alloc_near(cache, sizeof(*mips3));
*(mips3_state **)device->token = mips3 = (mips3_state *)drccache_memory_alloc_near(cache, sizeof(*mips3));
memset(mips3, 0, sizeof(*mips3));
/* initialize the core */
mips3com_init(mips3, flavor, bigendian, device, irqcallback);
/* allocate the implementation-specific state from the full cache */
mips3->impstate = drccache_memory_alloc_near(cache, sizeof(*mips3->impstate));
mips3->impstate = (mips3imp_state *)drccache_memory_alloc_near(cache, sizeof(*mips3->impstate));
memset(mips3->impstate, 0, sizeof(*mips3->impstate));
mips3->impstate->cache = cache;
@ -471,7 +496,7 @@ static void mips3_init(mips3_flavor flavor, int bigendian, const device_config *
static CPU_RESET( mips3 )
{
mips3_state *mips3 = *(mips3_state **)device->token;
mips3_state *mips3 = get_safe_token(device);
/* reset the common code and mark the cache dirty */
mips3com_reset(mips3);
@ -487,7 +512,7 @@ static CPU_RESET( mips3 )
static CPU_EXECUTE( mips3 )
{
mips3_state *mips3 = *(mips3_state **)device->token;
mips3_state *mips3 = get_safe_token(device);
drcuml_state *drcuml = mips3->impstate->drcuml;
int execute_result;
@ -524,7 +549,7 @@ static CPU_EXECUTE( mips3 )
static CPU_EXIT( mips3 )
{
mips3_state *mips3 = *(mips3_state **)device->token;
mips3_state *mips3 = get_safe_token(device);
mips3com_exit(mips3);
/* clean up the DRC */
@ -541,7 +566,7 @@ static CPU_EXIT( mips3 )
static CPU_TRANSLATE( mips3 )
{
mips3_state *mips3 = *(mips3_state **)device->token;
mips3_state *mips3 = get_safe_token(device);
return mips3com_translate_address(mips3, space, intention, address);
}
@ -552,7 +577,7 @@ static CPU_TRANSLATE( mips3 )
static CPU_DISASSEMBLE( mips3 )
{
mips3_state *mips3 = *(mips3_state **)device->token;
mips3_state *mips3 = get_safe_token(device);
return mips3com_dasm(mips3, buffer, pc, oprom, opram);
}
@ -564,7 +589,7 @@ static CPU_DISASSEMBLE( mips3 )
static CPU_SET_INFO( mips3 )
{
mips3_state *mips3 = *(mips3_state **)device->token;
mips3_state *mips3 = get_safe_token(device);
/* --- everything is handled generically --- */
mips3com_set_info(mips3, state, info);
@ -578,7 +603,7 @@ static CPU_SET_INFO( mips3 )
static CPU_GET_INFO( mips3 )
{
mips3_state *mips3 = (device != NULL && device->token != NULL) ? *(mips3_state **)device->token : NULL;
mips3_state *mips3 = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
@ -609,7 +634,7 @@ static CPU_GET_INFO( mips3 )
void mips3drc_set_options(const device_config *device, UINT32 options)
{
mips3_state *mips3 = *(mips3_state **)device->token;
mips3_state *mips3 = get_safe_token(device);
mips3->impstate->drcoptions = options;
}
@ -621,7 +646,7 @@ void mips3drc_set_options(const device_config *device, UINT32 options)
void mips3drc_add_fastram(const device_config *device, offs_t start, offs_t end, UINT8 readonly, void *base)
{
mips3_state *mips3 = *(mips3_state **)device->token;
mips3_state *mips3 = get_safe_token(device);
if (mips3->impstate->fastram_select < ARRAY_LENGTH(mips3->impstate->fastram))
{
mips3->impstate->fastram[mips3->impstate->fastram_select].start = start;
@ -639,7 +664,7 @@ void mips3drc_add_fastram(const device_config *device, offs_t start, offs_t end,
void mips3drc_add_hotspot(const device_config *device, offs_t pc, UINT32 opcode, UINT32 cycles)
{
mips3_state *mips3 = *(mips3_state **)device->token;
mips3_state *mips3 = get_safe_token(device);
if (mips3->impstate->hotspot_select < ARRAY_LENGTH(mips3->impstate->hotspot))
{
mips3->impstate->hotspot[mips3->impstate->hotspot_select].pc = pc;
@ -822,7 +847,7 @@ static void code_compile_block(mips3_state *mips3, UINT8 mode, offs_t pc)
static void cfunc_get_cycles(void *param)
{
mips3_state *mips3 = param;
mips3_state *mips3 = (mips3_state *)param;
mips3->impstate->numcycles = cpu_get_total_cycles(mips3->device);
}
@ -834,7 +859,7 @@ static void cfunc_get_cycles(void *param)
static void cfunc_printf_exception(void *param)
{
mips3_state *mips3 = param;
mips3_state *mips3 = (mips3_state *)param;
printf("Exception: EPC=%08X Cause=%08X BadVAddr=%08X Jmp=%08X\n", (UINT32)mips3->cpr[0][COP0_EPC], (UINT32)mips3->cpr[0][COP0_Cause], (UINT32)mips3->cpr[0][COP0_BadVAddr], mips3->pc);
cfunc_printf_probe(mips3);
}
@ -847,7 +872,7 @@ static void cfunc_printf_exception(void *param)
static void cfunc_printf_debug(void *param)
{
mips3_state *mips3 = param;
mips3_state *mips3 = (mips3_state *)param;
printf(mips3->impstate->format, mips3->impstate->arg0, mips3->impstate->arg1);
}
@ -859,7 +884,7 @@ static void cfunc_printf_debug(void *param)
static void cfunc_printf_probe(void *param)
{
mips3_state *mips3 = param;
mips3_state *mips3 = (mips3_state *)param;
printf(" PC=%08X r1=%08X%08X r2=%08X%08X r3=%08X%08X\n",
mips3->pc,
@ -914,7 +939,7 @@ static void cfunc_printf_probe(void *param)
static void cfunc_unimplemented(void *param)
{
mips3_state *mips3 = param;
mips3_state *mips3 = (mips3_state *)param;
UINT32 opcode = mips3->impstate->arg0;
fatalerror("PC=%08X: Unimplemented op %08X (%02X,%02X)", mips3->pc, opcode, opcode >> 26, opcode & 0x3f);
}

2
src/emu/cpu/mips/mips3fe.c
View File

@ -41,7 +41,7 @@ static int describe_instruction_cop2(mips3_state *mips, UINT32 op, opcode_desc *
int mips3fe_describe(void *param, opcode_desc *desc, const opcode_desc *prev)
{
mips3_state *mips = param;
mips3_state *mips = (mips3_state *)param;
UINT32 op, opswitch;
/* compute the physical PC */

39
src/emu/cpu/mips/psx.c
View File

@ -193,6 +193,15 @@ struct _psxcpu_state
UINT32 bad_word_address_mask;
};
INLINE psxcpu_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_PSXCPU);
return (psxcpu_state *)device->token;
}
static const UINT32 mips_mtc0_writemask[]=
{
0x00000000, /* !INDEX */
@ -1278,7 +1287,7 @@ static void mips_update_address_masks( psxcpu_state *psxcpu )
static READ32_HANDLER( psx_berr_r )
{
psxcpu_state *psxcpu = space->cpu->token;
psxcpu_state *psxcpu = get_safe_token(space->cpu);
psxcpu->berr = 1;
@ -1287,14 +1296,14 @@ static READ32_HANDLER( psx_berr_r )
static WRITE32_HANDLER( psx_berr_w )
{
psxcpu_state *psxcpu = space->cpu->token;
psxcpu_state *psxcpu = get_safe_token(space->cpu);
psxcpu->berr = 1;
}
static void mips_update_scratchpad( const address_space *space )
{
psxcpu_state *psxcpu = space->cpu->token;
psxcpu_state *psxcpu = get_safe_token(space->cpu);
if( ( psxcpu->biu & BIU_RAM ) == 0 )
{
@ -1302,11 +1311,11 @@ static void mips_update_scratchpad( const address_space *space )
}
else if( ( psxcpu->biu & BIU_DS ) == 0 )
{
memory_install_readwrite32_handler( space, 0x1f800000, 0x1f8003ff, 0, 0, psx_berr_r, SMH_NOP );
memory_install_readwrite32_handler( space, 0x1f800000, 0x1f8003ff, 0, 0, psx_berr_r, (write32_space_func)SMH_NOP );
}
else
{
memory_install_readwrite32_handler( space, 0x1f800000, 0x1f8003ff, 0, 0, SMH_BANK32, SMH_BANK32 );
memory_install_readwrite32_handler( space, 0x1f800000, 0x1f8003ff, 0, 0, (read32_space_func)SMH_BANK32, (write32_space_func)SMH_BANK32 );
memory_set_bankptr(space->machine, 32, psxcpu->dcache );
}
@ -1590,7 +1599,7 @@ INLINE int mips_store_data_address_breakpoint( psxcpu_state *psxcpu, UINT32 addr
static STATE_POSTLOAD( mips_postload )
{
psxcpu_state *psxcpu = param;
psxcpu_state *psxcpu = (psxcpu_state *)param;
mips_update_memory_handlers( psxcpu );
mips_update_address_masks( psxcpu );
@ -1599,7 +1608,7 @@ static STATE_POSTLOAD( mips_postload )
static void mips_state_register( const char *type, const device_config *device )
{
psxcpu_state *psxcpu = device->token;
psxcpu_state *psxcpu = get_safe_token(device);
state_save_register_device_item( device, 0, psxcpu->op );
state_save_register_device_item( device, 0, psxcpu->pc );
@ -1623,7 +1632,7 @@ static void mips_state_register( const char *type, const device_config *device )
static CPU_INIT( psxcpu )
{
psxcpu_state *psxcpu = device->token;
psxcpu_state *psxcpu = get_safe_token(device);
// psxcpu->intf = (psxcpu_interface *) device->static_config;
psxcpu->irq_callback = irqcallback;
@ -1635,7 +1644,7 @@ static CPU_INIT( psxcpu )
static CPU_RESET( psxcpu )
{
psxcpu_state *psxcpu = device->token;
psxcpu_state *psxcpu = get_safe_token(device);
psxcpu->delayr = 0;
psxcpu->delayv = 0;
@ -1838,7 +1847,7 @@ static void mips_bc( psxcpu_state *psxcpu, int cop, int sr_cu, int condition )
static CPU_EXECUTE( psxcpu )
{
psxcpu_state *psxcpu = device->token;
psxcpu_state *psxcpu = get_safe_token(device);
psxcpu->icount = cycles;
@ -2896,14 +2905,14 @@ static void set_irq_line( psxcpu_state *psxcpu, int irqline, int state )
static READ32_HANDLER( psx_biu_r )
{
psxcpu_state *psxcpu = space->cpu->token;
psxcpu_state *psxcpu = get_safe_token(space->cpu);
return psxcpu->biu;
}
static WRITE32_HANDLER( psx_biu_w )
{
psxcpu_state *psxcpu = space->cpu->token;
psxcpu_state *psxcpu = get_safe_token(space->cpu);
UINT32 old = psxcpu->biu;
COMBINE_DATA( &psxcpu->biu );
@ -2941,7 +2950,7 @@ ADDRESS_MAP_END
static CPU_DISASSEMBLE( psxcpu )
{
psxcpu_state *psxcpu = device->token;
psxcpu_state *psxcpu = get_safe_token(device);
DasmPSXCPU_state state;
state.pc = psxcpu->pc;
@ -5960,7 +5969,7 @@ static void docop2( psxcpu_state *psxcpu, int gteop )
static CPU_SET_INFO( psxcpu )
{
psxcpu_state *psxcpu = device->token;
psxcpu_state *psxcpu = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -6102,7 +6111,7 @@ static CPU_SET_INFO( psxcpu )
CPU_GET_INFO( psxcpu )
{
psxcpu_state *psxcpu = (device != NULL) ? device->token : NULL;
psxcpu_state *psxcpu = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

53
src/emu/cpu/mips/r3000.c
View File

@ -159,6 +159,17 @@ struct _r3000_state
size_t dcache_size;
};
INLINE r3000_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_R3000BE ||
cpu_get_type(device) == CPU_R3000LE ||
cpu_get_type(device) == CPU_R3041BE ||
cpu_get_type(device) == CPU_R3041LE);
return (r3000_state *)device->token;
}
/***************************************************************************
@ -286,12 +297,12 @@ static void set_irq_line(r3000_state *r3000, int irqline, int state)
static CPU_INIT( r3000 )
{
const r3000_cpu_core *configdata = device->static_config;
r3000_state *r3000 = device->token;
const r3000_cpu_core *configdata = (const r3000_cpu_core *)device->static_config;
r3000_state *r3000 = get_safe_token(device);
/* allocate memory */
r3000->icache = auto_malloc(configdata->icache);
r3000->dcache = auto_malloc(configdata->dcache);
r3000->icache = (UINT32 *)auto_malloc(configdata->icache);
r3000->dcache = (UINT32 *)auto_malloc(configdata->dcache);
r3000->icache_size = configdata->icache;
r3000->dcache_size = configdata->dcache;
@ -340,12 +351,12 @@ static void r3000_reset(r3000_state *r3000, int bigendian)
static CPU_RESET( r3000be )
{
r3000_reset(device->token, 1);
r3000_reset(get_safe_token(device), 1);
}
static CPU_RESET( r3000le )
{
r3000_reset(device->token, 0);
r3000_reset(get_safe_token(device), 0);
}
@ -677,7 +688,7 @@ INLINE void handle_cop3(r3000_state *r3000, UINT32 op)
static CPU_EXECUTE( r3000 )
{
r3000_state *r3000 = device->token;
r3000_state *r3000 = get_safe_token(device);
/* count cycles and interrupt cycles */
r3000->icount = cycles;
@ -902,84 +913,84 @@ static CPU_DISASSEMBLE( r3000le )
static UINT8 readcache_be(const address_space *space, offs_t offset)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? r3000->cache[BYTE4_XOR_BE(offset)] : 0xff;
}
static UINT16 readcache_be_word(const address_space *space, offs_t offset)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? *(UINT16 *)&r3000->cache[WORD_XOR_BE(offset)] : 0xffff;
}
static UINT32 readcache_be_dword(const address_space *space, offs_t offset)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? *(UINT32 *)&r3000->cache[offset] : 0xffffffff;
}
static void writecache_be(const address_space *space, offs_t offset, UINT8 data)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) r3000->cache[BYTE4_XOR_BE(offset)] = data;
}
static void writecache_be_word(const address_space *space, offs_t offset, UINT16 data)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) *(UINT16 *)&r3000->cache[WORD_XOR_BE(offset)] = data;
}
static void writecache_be_dword(const address_space *space, offs_t offset, UINT32 data)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) *(UINT32 *)&r3000->cache[offset] = data;
}
static UINT8 readcache_le(const address_space *space, offs_t offset)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? r3000->cache[BYTE4_XOR_LE(offset)] : 0xff;
}
static UINT16 readcache_le_word(const address_space *space, offs_t offset)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? *(UINT16 *)&r3000->cache[WORD_XOR_LE(offset)] : 0xffff;
}
static UINT32 readcache_le_dword(const address_space *space, offs_t offset)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
return (offset * 4 < r3000->cache_size) ? *(UINT32 *)&r3000->cache[offset] : 0xffffffff;
}
static void writecache_le(const address_space *space, offs_t offset, UINT8 data)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) r3000->cache[BYTE4_XOR_LE(offset)] = data;
}
static void writecache_le_word(const address_space *space, offs_t offset, UINT16 data)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) *(UINT16 *)&r3000->cache[WORD_XOR_LE(offset)] = data;
}
static void writecache_le_dword(const address_space *space, offs_t offset, UINT32 data)
{
r3000_state *r3000 = space->cpu->token;
r3000_state *r3000 = get_safe_token(space->cpu);
offset &= 0x1fffffff;
if (offset * 4 < r3000->cache_size) *(UINT32 *)&r3000->cache[offset] = data;
}
@ -1109,7 +1120,7 @@ static void swr_le(r3000_state *r3000, UINT32 op)
static CPU_SET_INFO( r3000 )
{
r3000_state *r3000 = device->token;
r3000_state *r3000 = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -1168,7 +1179,7 @@ static CPU_SET_INFO( r3000 )
static CPU_GET_INFO( r3000 )
{
r3000_state *r3000 = (device != NULL) ? device->token : NULL;
r3000_state *r3000 = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

33
src/emu/cpu/nec/nec.c
View File

@ -180,6 +180,19 @@ struct _nec_state_t
};
INLINE nec_state_t *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_V20 ||
cpu_get_type(device) == CPU_V25 ||
cpu_get_type(device) == CPU_V30 ||
cpu_get_type(device) == CPU_V33 ||
cpu_get_type(device) == CPU_V35);
return (nec_state_t *)device->token;
}
/* The interrupt number of a pending external interrupt pending NMI is 2. */
/* For INTR interrupts, the level is caught on the bus during an INTA cycle */
@ -267,7 +280,7 @@ static UINT8 fetchop(nec_state_t *nec_state)
static CPU_RESET( nec )
{
nec_state_t *nec_state = device->token;
nec_state_t *nec_state = get_safe_token(device);
unsigned int i,j,c;
static const BREGS reg_name[8]={ AL, CL, DL, BL, AH, CH, DH, BH };
@ -1082,15 +1095,15 @@ static void set_poll_line(nec_state_t *nec_state, int state)
static CPU_DISASSEMBLE( nec )
{
nec_state_t *nec_state = device->token;
nec_state_t *nec_state = get_safe_token(device);
return necv_dasm_one(buffer, pc, oprom, nec_state->config);
}
static void nec_init(const device_config *device, cpu_irq_callback irqcallback, int type)
{
const nec_config *config = device->static_config ? device->static_config : &default_config;
nec_state_t *nec_state = device->token;
const nec_config *config = device->static_config ? (const nec_config *)device->static_config : &default_config;
nec_state_t *nec_state = get_safe_token(device);
nec_state->config = config;
@ -1179,7 +1192,7 @@ static void configure_memory_16bit(nec_state_t *nec_state)
static CPU_EXECUTE( necv )
{
nec_state_t *nec_state = device->token;
nec_state_t *nec_state = get_safe_token(device);
int prev_ICount;
nec_state->icount=cycles;
@ -1210,7 +1223,7 @@ static CPU_EXECUTE( necv )
#if (HAS_V20||HAS_V25)
static CPU_INIT( v20 )
{
nec_state_t *nec_state = device->token;
nec_state_t *nec_state = get_safe_token(device);
nec_init(device, irqcallback, 0);
configure_memory_8bit(nec_state);
@ -1223,7 +1236,7 @@ static CPU_INIT( v20 )
#if (HAS_V30||HAS_V35)
static CPU_INIT( v30 )
{
nec_state_t *nec_state = device->token;
nec_state_t *nec_state = get_safe_token(device);
nec_init(device, irqcallback, 1);
configure_memory_16bit(nec_state);
@ -1237,7 +1250,7 @@ static CPU_INIT( v30 )
#if (HAS_V33)
static CPU_INIT( v33 )
{
nec_state_t *nec_state = device->token;
nec_state_t *nec_state = get_safe_token(device);
nec_init(device, irqcallback, 2);
nec_state->chip_type=V33;
@ -1259,7 +1272,7 @@ static CPU_INIT( v33 )
static CPU_SET_INFO( nec )
{
nec_state_t *nec_state = device->token;
nec_state_t *nec_state = get_safe_token(device);
switch (state)
{
@ -1317,7 +1330,7 @@ static CPU_SET_INFO( nec )
static CPU_GET_INFO( nec )
{
nec_state_t *nec_state = (device != NULL) ? device->token : NULL;
nec_state_t *nec_state = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
int flags;
switch (state)

27
src/emu/cpu/pdp1/pdp1.c
View File

@ -421,6 +421,15 @@ struct _pdp1_state
int icount;
};
INLINE pdp1_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_PDP1);
return (pdp1_state *)device->token;
}
static void execute_instruction(pdp1_state *cpustate);
static void null_iot (const device_config *device, int op2, int nac, int mb, int *io, int ac);
static void lem_eem_iot(const device_config *device, int op2, int nac, int mb, int *io, int ac);
@ -529,8 +538,8 @@ static void pdp1_set_irq_line (pdp1_state *cpustate, int irqline, int state)
static CPU_INIT( pdp1 )
{
const pdp1_reset_param_t *param = device->static_config;
pdp1_state *cpustate = device->token;
const pdp1_reset_param_t *param = (const pdp1_reset_param_t *)device->static_config;
pdp1_state *cpustate = get_safe_token(device);
int i;
/* clean-up */
@ -611,7 +620,7 @@ static const char instruction_kind[32] =
/* execute instructions on this CPU until icount expires */
static CPU_EXECUTE( pdp1 )
{
pdp1_state *cpustate = device->token;
pdp1_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -859,7 +868,7 @@ static CPU_EXECUTE( pdp1 )
static CPU_SET_INFO( pdp1 )
{
pdp1_state *cpustate = device->token;
pdp1_state *cpustate = get_safe_token(device);
switch (state)
{
@ -927,7 +936,7 @@ static CPU_SET_INFO( pdp1 )
CPU_GET_INFO( pdp1 )
{
pdp1_state *cpustate = (device != NULL) ? device->token : NULL;
pdp1_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
@ -1696,7 +1705,7 @@ no_fetch:
*/
static void null_iot(const device_config *device, int op2, int nac, int mb, int *io, int ac)
{
pdp1_state *cpustate = device->token;
pdp1_state *cpustate = get_safe_token(device);
/* Note that the dummy IOT 0 is used to wait for the completion pulse
generated by the a pending IOT (IOT with completion pulse but no IO wait) */
if (LOG_IOT_EXTRA)
@ -1719,7 +1728,7 @@ static void null_iot(const device_config *device, int op2, int nac, int mb, int
*/
static void lem_eem_iot(const device_config *device, int op2, int nac, int mb, int *io, int ac)
{
pdp1_state *cpustate = device->token;
pdp1_state *cpustate = get_safe_token(device);
if (! cpustate->extend_support) /* extend mode supported? */
{
if (LOG)
@ -1743,7 +1752,7 @@ static void lem_eem_iot(const device_config *device, int op2, int nac, int mb, i
*/
static void sbs_iot(const device_config *device, int op2, int nac, int mb, int *io, int ac)
{
pdp1_state *cpustate = device->token;
pdp1_state *cpustate = get_safe_token(device);
switch (op2)
{
case 054: /* LSM */
@ -1787,7 +1796,7 @@ static void sbs_iot(const device_config *device, int op2, int nac, int mb, int *
*/
static void type_20_sbs_iot(const device_config *device, int op2, int nac, int mb, int *io, int ac)
{
pdp1_state *cpustate = device->token;
pdp1_state *cpustate = get_safe_token(device);
int channel, mask;
if (! cpustate->type_20_sbs) /* type 20 sequence break system supported? */
{

37
src/emu/cpu/pdp1/tx0.c
View File

@ -68,6 +68,15 @@ struct _tx0_state
const address_space *program;
};
INLINE tx0_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_TX0_64KW ||
cpu_get_type(device) == CPU_TX0_8KW);
return (tx0_state *)device->token;
}
#define READ_TX0_18BIT(A) ((signed)memory_read_dword_32be(cpustate->program, (A)<<2))
#define WRITE_TX0_18BIT(A,V) (memory_write_dword_32be(cpustate->program, (A)<<2,(V)))
@ -120,10 +129,10 @@ static void tx0_write(tx0_state *cpustate, offs_t address, int data)
static void tx0_init_common(int is_64kw, const device_config *device, cpu_irq_callback irqcallback)
{
tx0_state *cpustate = device->token;
tx0_state *cpustate = get_safe_token(device);
/* clean-up */
cpustate->iface = device->static_config;
cpustate->iface = (const tx0_reset_param_t *)device->static_config;
cpustate->address_mask = is_64kw ? ADDRESS_MASK_64KW : ADDRESS_MASK_8KW;
cpustate->ir_mask = is_64kw ? 03 : 037;
@ -144,7 +153,7 @@ static CPU_INIT( tx0_8kw)
static CPU_RESET( tx0 )
{
tx0_state *cpustate = device->token;
tx0_state *cpustate = get_safe_token(device);
/* reset CPU flip-flops */
pulse_reset(device);
@ -155,7 +164,7 @@ static CPU_RESET( tx0 )
/* execute instructions on this CPU until icount expires */
static CPU_EXECUTE( tx0_64kw )
{
tx0_state *cpustate = device->token;
tx0_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -265,7 +274,7 @@ static CPU_EXECUTE( tx0_64kw )
/* execute instructions on this CPU until icount expires */
static CPU_EXECUTE( tx0_8kw )
{
tx0_state *cpustate = device->token;
tx0_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -375,7 +384,7 @@ static CPU_EXECUTE( tx0_8kw )
static CPU_SET_INFO( tx0 )
{
tx0_state *cpustate = device->token;
tx0_state *cpustate = get_safe_token(device);
switch (state)
{
@ -426,7 +435,7 @@ static CPU_SET_INFO( tx0 )
CPU_GET_INFO( tx0_64kw )
{
tx0_state *cpustate = ( device != NULL ) ? device->token : NULL;
tx0_state *cpustate = ( device != NULL && device->token != NULL ) ? get_safe_token(device) : NULL;
switch (state)
{
@ -552,7 +561,7 @@ CPU_GET_INFO( tx0_64kw )
CPU_GET_INFO( tx0_8kw )
{
tx0_state *cpustate = ( device != NULL ) ? device->token : NULL;
tx0_state *cpustate = ( device != NULL && device->token != NULL ) ? get_safe_token(device) : NULL;
switch (state)
{
@ -680,7 +689,7 @@ CPU_GET_INFO( tx0_8kw )
/* execute one instruction */
static void execute_instruction_64kw(const device_config *device)
{
tx0_state *cpustate = device->token;
tx0_state *cpustate = get_safe_token(device);
if (! cpustate->cycle)
{
@ -779,13 +788,13 @@ static void execute_instruction_64kw(const device_config *device)
if ((MAR & 0000104) == 0000100)
/* (1.1) PEN = Read the light pen flip-flops 1 and 2 into AC(0) and
AC(1). */
/*...*/;
/*...*/{ }
if ((MAR & 0000104) == 0000004)
/* (1.1) TAC = Insert a one in each digital position of the AC
wherever there is a one in the corresponding digital position
of the TAC. */
/*...*/;
/*...*/ { }
if (MAR & 0000040)
/* (1.2) COM = Complement every digit in the accumulator */
@ -797,7 +806,7 @@ static void execute_instruction_64kw(const device_config *device)
if ((MAR & 0000003) == 3)
/* (1.2) TBR = Store the contents of the TBR in the MBR. */
/*...*/;
/*...*/ { }
if ((MAR & 0000003) == 2)
/* (1.3) LMB = Store the contents of the LR in the MBR. */
@ -871,7 +880,7 @@ static void indexed_address_eval(tx0_state *cpustate)
/* execute one instruction */
static void execute_instruction_8kw(const device_config *device)
{
tx0_state *cpustate = device->token;
tx0_state *cpustate = get_safe_token(device);
if (! cpustate->cycle)
{
@ -1277,7 +1286,7 @@ static void execute_instruction_8kw(const device_config *device)
*/
static void pulse_reset(const device_config *device)
{
tx0_state *cpustate = device->token;
tx0_state *cpustate = get_safe_token(device);
/* processor registers */
PC = 0; /* ??? */

32
src/emu/cpu/pic16c5x/pic16c5x.c
View File

@ -104,6 +104,18 @@ struct _pic16c5x_state
const address_space *io;
};
INLINE pic16c5x_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_PIC16C54 ||
cpu_get_type(device) == CPU_PIC16C55 ||
cpu_get_type(device) == CPU_PIC16C56 ||
cpu_get_type(device) == CPU_PIC16C57 ||
cpu_get_type(device) == CPU_PIC16C58);
return (pic16c5x_state *)device->token;
}
/* opcode table entry */
typedef struct _pic16c5x_opcode pic16c5x_opcode;
@ -734,7 +746,7 @@ static const pic16c5x_opcode_00x opcode_00x[16]=
static CPU_INIT( pic16c5x )
{
pic16c5x_state *cpustate = device->token;
pic16c5x_state *cpustate = get_safe_token(device);
state_save_register_device_item(device, 0, cpustate->W);
state_save_register_device_item(device, 0, cpustate->ALU);
@ -805,7 +817,7 @@ static void pic16c5x_soft_reset(pic16c5x_state *cpustate)
void pic16c5x_set_config(const device_config *cpu, int data)
{
pic16c5x_state *cpustate = cpu->token;
pic16c5x_state *cpustate = get_safe_token(cpu);
logerror("Writing %04x to the PIC16C5x config register\n",data);
cpustate->temp_config = (data & 0xfff);
@ -889,7 +901,7 @@ static void pic16c5x_update_timer(pic16c5x_state *cpustate, int counts)
static CPU_EXECUTE( pic16c5x )
{
pic16c5x_state *cpustate = device->token;
pic16c5x_state *cpustate = get_safe_token(device);
int T0_in;
cpustate->icount = cycles;
@ -964,7 +976,7 @@ static CPU_EXECUTE( pic16c5x )
static CPU_SET_INFO( pic16c5x )
{
pic16c5x_state *cpustate = device->token;
pic16c5x_state *cpustate = get_safe_token(device);
switch (state)
{
@ -998,7 +1010,7 @@ static CPU_SET_INFO( pic16c5x )
static CPU_GET_INFO( pic16c5x )
{
pic16c5x_state *cpustate = (device != NULL) ? device->token : NULL;
pic16c5x_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
@ -1118,7 +1130,7 @@ ADDRESS_MAP_END
static CPU_RESET( pic16c54 )
{
pic16c5x_state *cpustate = device->token;
pic16c5x_state *cpustate = get_safe_token(device);
cpustate->picmodel = 0x16C54;
cpustate->picRAMmask = 0x1f;
@ -1172,7 +1184,7 @@ ADDRESS_MAP_END
static CPU_RESET( pic16c55 )
{
pic16c5x_state *cpustate = device->token;
pic16c5x_state *cpustate = get_safe_token(device);
cpustate->picmodel = 0x16C55;
cpustate->picRAMmask = 0x1f;
@ -1226,7 +1238,7 @@ ADDRESS_MAP_END
static CPU_RESET( pic16c56 )
{
pic16c5x_state *cpustate = device->token;
pic16c5x_state *cpustate = get_safe_token(device);
cpustate->picmodel = 0x16C56;
cpustate->picRAMmask = 0x1f;
@ -1285,7 +1297,7 @@ ADDRESS_MAP_END
static CPU_RESET( pic16c57 )
{
pic16c5x_state *cpustate = device->token;
pic16c5x_state *cpustate = get_safe_token(device);
cpustate->picmodel = 0x16C57;
cpustate->picRAMmask = 0x7f;
@ -1345,7 +1357,7 @@ ADDRESS_MAP_END
static CPU_RESET( pic16c58 )
{
pic16c5x_state *cpustate = device->token;
pic16c5x_state *cpustate = get_safe_token(device);
cpustate->picmodel = 0x16C58;
cpustate->picRAMmask = 0x7f;

12
src/emu/cpu/powerpc/ppccom.c
View File

@ -186,7 +186,7 @@ INLINE void set_decrementer(powerpc_state *ppc, UINT32 newdec)
void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_divisor, const device_config *device, cpu_irq_callback irqcallback)
{
const powerpc_config *config = device->static_config;
const powerpc_config *config = (const powerpc_config *)device->static_config;
/* initialize based on the config */
memset(ppc, 0, sizeof(*ppc));
@ -429,7 +429,7 @@ static UINT32 ppccom_translate_address_internal(powerpc_state *ppc, int intentio
for (hashnum = 0; hashnum < 2; hashnum++)
{
offs_t ptegaddr = hashbase | ((hash << 6) & hashmask);
UINT32 *ptegptr = memory_get_read_ptr(ppc->program, ptegaddr);
UINT32 *ptegptr = (UINT32 *)memory_get_read_ptr(ppc->program, ptegaddr);
/* should only have valid memory here, but make sure */
if (ptegptr != NULL)
@ -1246,7 +1246,7 @@ void ppccom_get_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
static TIMER_CALLBACK( decrementer_int_callback )
{
powerpc_state *ppc = ptr;
powerpc_state *ppc = (powerpc_state *)ptr;
UINT64 cycles_until_next;
/* set the decrementer IRQ state */
@ -1506,7 +1506,7 @@ static void ppc4xx_dma_exec(powerpc_state *ppc, int dmachan)
static TIMER_CALLBACK( ppc4xx_fit_callback )
{
powerpc_state *ppc = ptr;
powerpc_state *ppc = (powerpc_state *)ptr;
/* if this is a real callback and we are enabled, signal an interrupt */
if (param)
@ -1536,7 +1536,7 @@ static TIMER_CALLBACK( ppc4xx_fit_callback )
static TIMER_CALLBACK( ppc4xx_pit_callback )
{
powerpc_state *ppc = ptr;
powerpc_state *ppc = (powerpc_state *)ptr;
/* if this is a real callback and we are enabled, signal an interrupt */
if (param)
@ -1647,7 +1647,7 @@ static void ppc4xx_spu_timer_reset(powerpc_state *ppc)
static TIMER_CALLBACK( ppc4xx_spu_callback )
{
powerpc_state *ppc = ptr;
powerpc_state *ppc = (powerpc_state *)ptr;
/* transmit enabled? */
if (ppc->spu.regs[SPU4XX_TX_COMMAND] & 0x80)

55
src/emu/cpu/powerpc/ppcdrc.c
View File

@ -435,6 +435,23 @@ static const UINT8 fcmp_cr_table_source[32] =
INLINE FUNCTIONS
***************************************************************************/
INLINE powerpc_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_PPC403GA ||
cpu_get_type(device) == CPU_PPC403GCX ||
cpu_get_type(device) == CPU_PPC601 ||
cpu_get_type(device) == CPU_PPC602 ||
cpu_get_type(device) == CPU_PPC603 ||
cpu_get_type(device) == CPU_PPC603E ||
cpu_get_type(device) == CPU_PPC603R ||
cpu_get_type(device) == CPU_PPC604 ||
cpu_get_type(device) == CPU_MPC8240);
return *(powerpc_state **)device->token;
}
/*-------------------------------------------------
alloc_handle - allocate a handle if not
already allocated
@ -552,14 +569,14 @@ static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, const
fatalerror("Unable to allocate cache of size %d", (UINT32)(CACHE_SIZE + sizeof(*ppc)));
/* allocate the core from the near cache */
*(powerpc_state **)device->token = ppc = drccache_memory_alloc_near(cache, sizeof(*ppc));
*(powerpc_state **)device->token = ppc = (powerpc_state *)drccache_memory_alloc_near(cache, sizeof(*ppc));
memset(ppc, 0, sizeof(*ppc));
/* initialize the core */
ppccom_init(ppc, flavor, cap, tb_divisor, device, irqcallback);
/* allocate the implementation-specific state from the full cache */
ppc->impstate = drccache_memory_alloc_near(cache, sizeof(*ppc->impstate));
ppc->impstate = (ppcimp_state *)drccache_memory_alloc_near(cache, sizeof(*ppc->impstate));
memset(ppc->impstate, 0, sizeof(*ppc->impstate));
ppc->impstate->cache = cache;
@ -670,7 +687,7 @@ static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, const
static CPU_RESET( ppcdrc )
{
powerpc_state *ppc = *(powerpc_state **)device->token;
powerpc_state *ppc = get_safe_token(device);
/* reset the common code and mark the cache dirty */
ppccom_reset(ppc);
@ -686,7 +703,7 @@ static CPU_RESET( ppcdrc )
static CPU_EXECUTE( ppcdrc )
{
powerpc_state *ppc = *(powerpc_state **)device->token;
powerpc_state *ppc = get_safe_token(device);
drcuml_state *drcuml = ppc->impstate->drcuml;
int execute_result;
@ -723,7 +740,7 @@ static CPU_EXECUTE( ppcdrc )
static CPU_EXIT( ppcdrc )
{
powerpc_state *ppc = *(powerpc_state **)device->token;
powerpc_state *ppc = get_safe_token(device);
ppccom_exit(ppc);
/* clean up the DRC */
@ -740,7 +757,7 @@ static CPU_EXIT( ppcdrc )
static CPU_TRANSLATE( ppcdrc )
{
powerpc_state *ppc = *(powerpc_state **)device->token;
powerpc_state *ppc = get_safe_token(device);
return ppccom_translate_address(ppc, space, intention, address);
}
@ -751,7 +768,7 @@ static CPU_TRANSLATE( ppcdrc )
static CPU_DISASSEMBLE( ppcdrc )
{
powerpc_state *ppc = *(powerpc_state **)device->token;
powerpc_state *ppc = get_safe_token(device);
return ppccom_dasm(ppc, buffer, pc, oprom, opram);
}
@ -763,7 +780,7 @@ static CPU_DISASSEMBLE( ppcdrc )
static CPU_SET_INFO( ppcdrc )
{
powerpc_state *ppc = *(powerpc_state **)device->token;
powerpc_state *ppc = get_safe_token(device);
/* --- everything is handled generically --- */
ppccom_set_info(ppc, state, info);
@ -777,7 +794,7 @@ static CPU_SET_INFO( ppcdrc )
static CPU_GET_INFO( ppcdrc )
{
powerpc_state *ppc = (device != NULL && device->token != NULL) ? *(powerpc_state **)device->token : NULL;
powerpc_state *ppc = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
@ -808,7 +825,7 @@ static CPU_GET_INFO( ppcdrc )
void ppcdrc_set_options(const device_config *device, UINT32 options)
{
powerpc_state *ppc = *(powerpc_state **)device->token;
powerpc_state *ppc = get_safe_token(device);
ppc->impstate->drcoptions = options;
}
@ -820,7 +837,7 @@ void ppcdrc_set_options(const device_config *device, UINT32 options)
void ppcdrc_add_fastram(const device_config *device, offs_t start, offs_t end, UINT8 readonly, void *base)
{
powerpc_state *ppc = *(powerpc_state **)device->token;
powerpc_state *ppc = get_safe_token(device);
if (ppc->impstate->fastram_select < ARRAY_LENGTH(ppc->impstate->fastram))
{
ppc->impstate->fastram[ppc->impstate->fastram_select].start = start;
@ -838,7 +855,7 @@ void ppcdrc_add_fastram(const device_config *device, offs_t start, offs_t end, U
void ppcdrc_add_hotspot(const device_config *device, offs_t pc, UINT32 opcode, UINT32 cycles)
{
powerpc_state *ppc = *(powerpc_state **)device->token;
powerpc_state *ppc = get_safe_token(device);
if (ppc->impstate->hotspot_select < ARRAY_LENGTH(ppc->impstate->hotspot))
{
ppc->impstate->hotspot[ppc->impstate->hotspot_select].pc = pc;
@ -1032,7 +1049,7 @@ static void code_compile_block(powerpc_state *ppc, UINT8 mode, offs_t pc)
static void cfunc_printf_exception(void *param)
{
powerpc_state *ppc = param;
powerpc_state *ppc = (powerpc_state *)param;
printf("Exception: type=%2d EPC=%08X MSR=%08X\n", ppc->param0, ppc->spr[SPROEA_SRR0], ppc->spr[SPROEA_SRR1]);
cfunc_printf_probe(ppc);
}
@ -1045,7 +1062,7 @@ static void cfunc_printf_exception(void *param)
static void cfunc_printf_debug(void *param)
{
powerpc_state *ppc = param;
powerpc_state *ppc = (powerpc_state *)param;
printf(ppc->impstate->format, ppc->impstate->arg0, ppc->impstate->arg1);
}
@ -1057,7 +1074,7 @@ static void cfunc_printf_debug(void *param)
static void cfunc_printf_probe(void *param)
{
powerpc_state *ppc = param;
powerpc_state *ppc = (powerpc_state *)param;
UINT32 pc = (UINT32)(FPTR)param;
printf(" PC=%08X\n", pc);
@ -1087,7 +1104,7 @@ static void cfunc_printf_probe(void *param)
static void cfunc_unimplemented(void *param)
{
powerpc_state *ppc = param;
powerpc_state *ppc = (powerpc_state *)param;
UINT32 opcode = ppc->impstate->arg0;
fatalerror("PC=%08X: Unimplemented op %08X", ppc->pc, opcode);
}
@ -1459,7 +1476,7 @@ static void static_generate_memory_accessor(powerpc_state *ppc, int mode, int si
/* on exit, read result is in I0 */
/* routine trashes I0-I3 */
drcuml_state *drcuml = ppc->impstate->drcuml;
int fastxor = BYTE8_XOR_BE(0) >> (cpu_get_databus_width(ppc->device, ADDRESS_SPACE_PROGRAM) < 64);
int fastxor = BYTE8_XOR_BE(0) >> (int)(cpu_get_databus_width(ppc->device, ADDRESS_SPACE_PROGRAM) < 64);
drcuml_block *block;
jmp_buf errorbuf;
int translate_type;
@ -4237,7 +4254,7 @@ static void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, i
static CPU_GET_INFO( ppcdrc4xx )
{
powerpc_state *ppc = (device != NULL && device->token != NULL) ? *(powerpc_state **)device->token : NULL;
powerpc_state *ppc = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
CPU_GET_INFO_CALL(ppcdrc);
ppc4xx_get_info(ppc, state, info);
}
@ -4250,7 +4267,7 @@ static CPU_GET_INFO( ppcdrc4xx )
static CPU_SET_INFO( ppcdrc4xx )
{
powerpc_state *ppc = *(powerpc_state **)device->token;
powerpc_state *ppc = get_safe_token(device);
CPU_SET_INFO_CALL(ppcdrc);
ppc4xx_set_info(ppc, state, info);
}

2
src/emu/cpu/powerpc/ppcfe.c
View File

@ -129,7 +129,7 @@ INLINE int is_603_class(const powerpc_state *ppc)
int ppcfe_describe(void *param, opcode_desc *desc, const opcode_desc *prev)
{
powerpc_state *ppc = param;
powerpc_state *ppc = (powerpc_state *)param;
UINT32 op, opswitch;
int regnum;

24
src/emu/cpu/rsp/rsp.c
View File

@ -63,6 +63,14 @@ struct _rsp_state
int icount;
};
INLINE rsp_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_RSP);
return (rsp_state *)device->token;
}
#define RSREG ((op >> 21) & 0x1f)
@ -343,10 +351,10 @@ static const int vector_elements_2[16][8] =
static CPU_INIT( rsp )
{
rsp_state *cpustate = device->token;
rsp_state *cpustate = get_safe_token(device);
int regIdx;
int accumIdx;
cpustate->config = device->static_config;
cpustate->config = (const rsp_config *)device->static_config;
if (LOG_INSTRUCTION_EXECUTION)
cpustate->exec_output = fopen("rsp_execute.txt", "wt");
@ -387,7 +395,7 @@ static CPU_INIT( rsp )
static CPU_EXIT( rsp )
{
rsp_state *cpustate = device->token;
rsp_state *cpustate = get_safe_token(device);
#if SAVE_DISASM
{
@ -435,7 +443,7 @@ static CPU_EXIT( rsp )
static CPU_RESET( rsp )
{
rsp_state *cpustate = device->token;
rsp_state *cpustate = get_safe_token(device);
cpustate->nextpc = ~0;
}
@ -2528,7 +2536,7 @@ static void handle_vector_ops(rsp_state *cpustate, UINT32 op)
i = 0;
}
}
sqr = (INT32)(0x7fffffff / sqrt(sqr));
sqr = (INT32)(0x7fffffff / sqrt((double)sqr));
for (i = 31; i > 0; i--)
{
if (sqr & (1 << i))
@ -2585,7 +2593,7 @@ static void handle_vector_ops(rsp_state *cpustate, UINT32 op)
static CPU_EXECUTE( rsp )
{
rsp_state *cpustate = device->token;
rsp_state *cpustate = get_safe_token(device);
UINT32 op;
cpustate->icount = cycles;
@ -2869,7 +2877,7 @@ static CPU_DISASSEMBLE( rsp )
static CPU_SET_INFO( rsp )
{
rsp_state *cpustate = device->token;
rsp_state *cpustate = get_safe_token(device);
switch (state)
{
@ -2917,7 +2925,7 @@ static CPU_SET_INFO( rsp )
CPU_GET_INFO( rsp )
{
rsp_state *cpustate = (device != NULL) ? device->token : NULL;
rsp_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch(state)
{

19
src/emu/cpu/s2650/s2650.c
View File

@ -46,6 +46,15 @@ struct _s2650_regs {
const address_space *io;
};
INLINE s2650_regs *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_S2650);
return (s2650_regs *)device->token;
}
/* condition code changes for a byte */
static const UINT8 ccc[0x200] = {
0x00,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
@ -759,7 +768,7 @@ static void BRA_EA(void) _BRA_EA()
static CPU_INIT( s2650 )
{
s2650_regs *s2650c = device->token;
s2650_regs *s2650c = get_safe_token(device);
s2650c->irq_callback = irqcallback;
s2650c->device = device;
@ -782,7 +791,7 @@ static CPU_INIT( s2650 )
static CPU_RESET( s2650 )
{
s2650_regs *s2650c = device->token;
s2650_regs *s2650c = get_safe_token(device);
s2650c->ppc = 0;
s2650c->page = 0,
@ -851,7 +860,7 @@ static int s2650_get_sense(s2650_regs *s2650c)
static CPU_EXECUTE( s2650 )
{
s2650_regs *s2650c = device->token;
s2650_regs *s2650c = get_safe_token(device);
s2650c->icount = cycles;
do
@ -1470,7 +1479,7 @@ static CPU_EXECUTE( s2650 )
static CPU_SET_INFO( s2650 )
{
s2650_regs *s2650c = device->token;
s2650_regs *s2650c = get_safe_token(device);
switch (state)
{
@ -1507,7 +1516,7 @@ static CPU_SET_INFO( s2650 )
CPU_GET_INFO( s2650 )
{
s2650_regs *s2650c = device ? device->token : NULL;
s2650_regs *s2650c = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

19
src/emu/cpu/saturn/saturn.c
View File

@ -86,6 +86,15 @@ struct _saturn_state
int icount;
};
INLINE saturn_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_SATURN);
return (saturn_state *)device->token;
}
/***************************************************************
* include the opcode macros, functions and tables
***************************************************************/
@ -101,7 +110,7 @@ struct _saturn_state
static CPU_INIT( saturn )
{
saturn_state *cpustate = device->token;
saturn_state *cpustate = get_safe_token(device);
cpustate->config = (saturn_cpu_core *) device->static_config;
cpustate->irq_callback = irqcallback;
@ -135,7 +144,7 @@ static CPU_INIT( saturn )
static CPU_RESET( saturn )
{
saturn_state *cpustate = device->token;
saturn_state *cpustate = get_safe_token(device);
cpustate->pc=0;
cpustate->sleeping = 0;
@ -159,7 +168,7 @@ INLINE void saturn_take_irq(saturn_state *cpustate)
static CPU_EXECUTE( saturn )
{
saturn_state *cpustate = device->token;
saturn_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -238,7 +247,7 @@ static void IntReg64(Saturn64 r, INT64 d)
static CPU_SET_INFO( saturn )
{
saturn_state *cpustate = device->token;
saturn_state *cpustate = get_safe_token(device);
switch (state)
{
@ -295,7 +304,7 @@ static INT64 Reg64Int(Saturn64 r)
CPU_GET_INFO( saturn )
{
saturn_state *cpustate = (device != NULL) ? device->token : NULL;
saturn_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

23
src/emu/cpu/sc61860/sc61860.c
View File

@ -59,15 +59,24 @@ struct _sc61860_state
int icount;
};
INLINE sc61860_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_SC61860);
return (sc61860_state *)device->token;
}
UINT8 *sc61860_internal_ram(const device_config *device)
{
sc61860_state *cpustate = device->token;
sc61860_state *cpustate = get_safe_token(device);
return cpustate->ram;
}
static TIMER_CALLBACK(sc61860_2ms_tick)
{
sc61860_state *cpustate = ptr;
sc61860_state *cpustate = (sc61860_state *)ptr;
if (--cpustate->timer.count == 0)
{
cpustate->timer.count = 128;
@ -84,7 +93,7 @@ static TIMER_CALLBACK(sc61860_2ms_tick)
static CPU_RESET( sc61860 )
{
sc61860_state *cpustate = device->token;
sc61860_state *cpustate = get_safe_token(device);
cpustate->timer.t2ms=0;
cpustate->timer.t512ms=0;
cpustate->timer.count=256;
@ -93,7 +102,7 @@ static CPU_RESET( sc61860 )
static CPU_INIT( sc61860 )
{
sc61860_state *cpustate = device->token;
sc61860_state *cpustate = get_safe_token(device);
cpustate->config = (sc61860_cpu_core *) device->static_config;
timer_pulse(device->machine, ATTOTIME_IN_HZ(500), cpustate, 0, sc61860_2ms_tick);
cpustate->device = device;
@ -102,7 +111,7 @@ static CPU_INIT( sc61860 )
static CPU_EXECUTE( sc61860 )
{
sc61860_state *cpustate = device->token;
sc61860_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -140,7 +149,7 @@ static CPU_EXECUTE( sc61860 )
static CPU_SET_INFO( sc61860 )
{
sc61860_state *cpustate = device->token;
sc61860_state *cpustate = get_safe_token(device);
switch (state)
{
@ -164,7 +173,7 @@ static CPU_SET_INFO( sc61860 )
CPU_GET_INFO( sc61860 )
{
sc61860_state *cpustate = (device != NULL) ? device->token : NULL;
sc61860_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

2
src/emu/cpu/sh4/sh4.c
View File

@ -3245,7 +3245,7 @@ INLINE void op1111(SH4 *sh4, UINT16 opcode)
static CPU_RESET( sh4 )
{
SH4 *sh4 = get_safe_token(device);
void *tsaved[4];
emu_timer *tsaved[4];
emu_timer *tsave[5];
UINT32 *m;
int save_is_slave;

29
src/emu/cpu/sh4/sh4comn.c
View File

@ -30,6 +30,15 @@ static const UINT16 tcnt[] = { TCNT0, TCNT1, TCNT2 };
static const UINT16 tcor[] = { TCOR0, TCOR1, TCOR2 };
static const UINT16 tcr[] = { TCR0, TCR1, TCR2 };
INLINE SH4 *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_SH4);
return (SH4 *)device->token;
}
void sh4_change_register_bank(SH4 *sh4, int to)
{
int s;
@ -254,7 +263,7 @@ static void sh4_timer_recompute(SH4 *sh4, int which)
static TIMER_CALLBACK( sh4_refresh_timer_callback )
{
SH4 *sh4 = ptr;
SH4 *sh4 = (SH4 *)ptr;
sh4->m[RTCNT] = 0;
sh4_refresh_timer_recompute(sh4);
@ -365,7 +374,7 @@ static void increment_rtc_time(SH4 *sh4, int mode)
static TIMER_CALLBACK( sh4_rtc_timer_callback )
{
SH4 *sh4 = ptr;
SH4 *sh4 = (SH4 *)ptr;
timer_adjust_oneshot(sh4->rtc_timer, ATTOTIME_IN_HZ(128), 0);
sh4->m[R64CNT] = (sh4->m[R64CNT]+1) & 0x7f;
@ -380,7 +389,7 @@ static TIMER_CALLBACK( sh4_rtc_timer_callback )
static TIMER_CALLBACK( sh4_timer_callback )
{
static const UINT16 tuni[] = { SH4_INTC_TUNI0, SH4_INTC_TUNI1, SH4_INTC_TUNI2 };
SH4 *sh4 = ptr;
SH4 *sh4 = (SH4 *)ptr;
int which = param;
int idx = tcr[which];
@ -393,7 +402,7 @@ static TIMER_CALLBACK( sh4_timer_callback )
static TIMER_CALLBACK( sh4_dmac_callback )
{
SH4 *sh4 = ptr;
SH4 *sh4 = (SH4 *)ptr;
int channel = param;
LOG(("SH4 '%s': DMA %d complete\n", sh4->device->tag, channel));
@ -623,7 +632,7 @@ int s;
WRITE32_HANDLER( sh4_internal_w )
{
SH4 *sh4 = space->cpu->token;
SH4 *sh4 = get_safe_token(space->cpu);
int a;
UINT32 old = sh4->m[offset];
COMBINE_DATA(sh4->m+offset);
@ -909,7 +918,7 @@ WRITE32_HANDLER( sh4_internal_w )
READ32_HANDLER( sh4_internal_r )
{
SH4 *sh4 = space->cpu->token;
SH4 *sh4 = get_safe_token(space->cpu);
// logerror("sh4_internal_r: Read %08x (%x) @ %08x\n", 0xfe000000+((offset & 0x3fc0) << 11)+((offset & 0x3f) << 2), offset, mem_mask);
switch( offset )
{
@ -958,7 +967,7 @@ READ32_HANDLER( sh4_internal_r )
void sh4_set_frt_input(const device_config *device, int state)
{
SH4 *sh4 = device->token;
SH4 *sh4 = get_safe_token(device);
if(state == PULSE_LINE)
{
@ -994,7 +1003,7 @@ void sh4_set_frt_input(const device_config *device, int state)
void sh4_set_irln_input(const device_config *device, int value)
{
SH4 *sh4 = device->token;
SH4 *sh4 = get_safe_token(device);
if (sh4->irln == value)
return;
@ -1123,7 +1132,7 @@ void sh4_parse_configuration(SH4 *sh4, const struct sh4_config *conf)
void sh4_common_init(const device_config *device)
{
SH4 *sh4 = device->token;
SH4 *sh4 = get_safe_token(device);
int i;
for (i=0; i<3; i++)
@ -1145,7 +1154,7 @@ void sh4_common_init(const device_config *device)
sh4->rtc_timer = timer_alloc(device->machine, sh4_rtc_timer_callback, sh4);
timer_adjust_oneshot(sh4->rtc_timer, attotime_never, 0);
sh4->m = auto_malloc(16384*4);
sh4->m = (UINT32 *)auto_malloc(16384*4);
}
void sh4_dma_ddt(SH4 *sh4, struct sh4_ddt_dma *s)

21
src/emu/cpu/sm8500/sm8500.c
View File

@ -55,6 +55,15 @@ struct _sm8500_state
UINT8 internal_ram[0x500];
};
INLINE sm8500_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_SM8500);
return (sm8500_state *)device->token;
}
static const UINT8 sm8500_b2w[8] = {
0, 8, 2, 10, 4, 12, 6, 14
};
@ -86,7 +95,7 @@ INLINE void sm85cpu_mem_writeword( sm8500_state *cpustate, UINT32 address, UINT1
static CPU_INIT( sm8500 )
{
sm8500_state *cpustate = device->token;
sm8500_state *cpustate = get_safe_token(device);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
@ -103,7 +112,7 @@ static CPU_INIT( sm8500 )
static CPU_RESET( sm8500 )
{
sm8500_state *cpustate = device->token;
sm8500_state *cpustate = get_safe_token(device);
cpustate->PC = 0x1020;
cpustate->IE0 = 0;
@ -217,7 +226,7 @@ INLINE void sm8500_process_interrupts(sm8500_state *cpustate) {
static CPU_EXECUTE( sm8500 )
{
sm8500_state *cpustate = device->token;
sm8500_state *cpustate = get_safe_token(device);
UINT8 op;
UINT16 oldpc;
int mycycles;
@ -258,7 +267,7 @@ static CPU_EXECUTE( sm8500 )
static CPU_BURN( sm8500 )
{
sm8500_state *cpustate = device->token;
sm8500_state *cpustate = get_safe_token(device);
if ( cycles > 0 ) {
/* burn a number of 4 cycles */
@ -381,7 +390,7 @@ static void sm8500_set_irq_line( sm8500_state *cpustate, int irqline, int state
static CPU_SET_INFO( sm8500 )
{
sm8500_state *cpustate = device->token;
sm8500_state *cpustate = get_safe_token(device);
switch(state)
{
@ -435,7 +444,7 @@ static CPU_SET_INFO( sm8500 )
CPU_GET_INFO( sm8500 )
{
sm8500_state *cpustate = (device != NULL) ? device->token : NULL;
sm8500_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch(state)
{

19
src/emu/cpu/spc700/spc700.c
View File

@ -97,6 +97,15 @@ typedef struct
int spc_int32;
} spc700i_cpu;
INLINE spc700i_cpu *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_SPC700);
return (spc700i_cpu *)device->token;
}
/* ======================================================================== */
/* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */
/* ======================================================================== */
@ -1239,7 +1248,7 @@ INLINE void SET_FLAG_I(spc700i_cpu *cpustate, uint value)
static CPU_INIT( spc700 )
{
spc700i_cpu *cpustate = device->token;
spc700i_cpu *cpustate = get_safe_token(device);
INT_ACK = irqcallback;
cpustate->device = device;
@ -1249,7 +1258,7 @@ static CPU_INIT( spc700 )
static CPU_RESET( spc700 )
{
spc700i_cpu *cpustate = device->token;
spc700i_cpu *cpustate = get_safe_token(device);
CPU_STOPPED = 0;
#if !SPC700_OPTIMIZE_SNES
@ -1307,7 +1316,7 @@ static void spc700_set_irq_line(spc700i_cpu *cpustate,int line, int state)
/* Execute instructions for <clocks> cycles */
static CPU_EXECUTE( spc700 )
{
spc700i_cpu *cpustate = device->token;
spc700i_cpu *cpustate = get_safe_token(device);
CLOCKS = CPU_STOPPED ? 0 : cycles;
while(CLOCKS > 0)
@ -1586,7 +1595,7 @@ static CPU_EXECUTE( spc700 )
static CPU_SET_INFO( spc700 )
{
spc700i_cpu *cpustate = device->token;
spc700i_cpu *cpustate = get_safe_token(device);
switch (state)
{
@ -1613,7 +1622,7 @@ static CPU_SET_INFO( spc700 )
CPU_GET_INFO( spc700 )
{
spc700i_cpu *cpustate = (device != NULL) ? device->token : NULL;
spc700i_cpu *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
uint p = 0;
if (cpustate != NULL)

20
src/emu/cpu/ssp1601/ssp1601.c
View File

@ -55,6 +55,14 @@ struct _ssp1601_state_t
const address_space *io;
};
INLINE ssp1601_state_t *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_SSP1601);
return (ssp1601_state_t *)device->token;
}
@ -502,7 +510,7 @@ static UINT32 ptr2_read(ssp1601_state_t *ssp1601_state, int op)
static CPU_INIT( ssp1601 )
{
ssp1601_state_t *ssp1601_state = device->token;
ssp1601_state_t *ssp1601_state = get_safe_token(device);
state_save_register_device_item(device, 0, rX);
state_save_register_device_item(device, 0, rY);
@ -532,7 +540,7 @@ static CPU_EXIT( ssp1601 )
static CPU_RESET( ssp1601 )
{
ssp1601_state_t *ssp1601_state = device->token;
ssp1601_state_t *ssp1601_state = get_safe_token(device);
rPC = 0x400;
rSTACK = 0; // ? using ascending stack
@ -542,7 +550,7 @@ static CPU_RESET( ssp1601 )
static CPU_EXECUTE( ssp1601 )
{
ssp1601_state_t *ssp1601_state = device->token;
ssp1601_state_t *ssp1601_state = get_safe_token(device);
ssp1601_state->g_cycles = cycles;
@ -758,7 +766,7 @@ static CPU_EXECUTE( ssp1601 )
static CPU_DISASSEMBLE( ssp1601 )
{
//ssp1601_state_t *ssp1601_state = device->token;
//ssp1601_state_t *ssp1601_state = get_safe_token(device);
return dasm_ssp1601(buffer, pc, oprom);
}
@ -767,7 +775,7 @@ static CPU_DISASSEMBLE( ssp1601 )
static CPU_SET_INFO( ssp1601 )
{
ssp1601_state_t *ssp1601_state = device->token;
ssp1601_state_t *ssp1601_state = get_safe_token(device);
switch (state)
{
@ -808,7 +816,7 @@ static CPU_SET_INFO( ssp1601 )
CPU_GET_INFO( ssp1601 )
{
ssp1601_state_t *ssp1601_state = (device != NULL) ? device->token : NULL;
ssp1601_state_t *ssp1601_state = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

38
src/emu/cpu/tlcs90/tlcs90.c
View File

@ -10,7 +10,8 @@
#include "cpuexec.h"
#include "tlcs90.h"
typedef enum { UNKNOWN, NOP, EX, EXX, LD, LDW, LDA, LDI, LDIR, LDD, LDDR, CPI, CPIR, CPD, CPDR, PUSH, POP, JP, JR, CALL, CALLR, RET, RETI, HALT, DI, EI, SWI, DAA, CPL, NEG, LDAR, RCF, SCF, CCF, TSET, BIT, SET, RES, INC, DEC, INCX, DECX, INCW, DECW, ADD, ADC, SUB, SBC, AND, XOR, OR, CP, RLC, RRC, RL, RR, SLA, SRA, SLL, SRL, RLD, RRD, DJNZ, MUL, DIV } e_op;
typedef enum { UNKNOWN, NOP, EX, EXX, LD, LDW, LDA, LDI, LDIR, LDD, LDDR, CPI, CPIR, CPD, CPDR, PUSH, POP, JP, JR, CALL, CALLR, RET, RETI, HALT, DI, EI, SWI, DAA, CPL, NEG, LDAR, RCF, SCF, CCF, TSET, BIT, SET, RES, INC, DEC, INCX, DECX, INCW, DECW, ADD, ADC, SUB, SBC, AND, XOR, OR, CP, RLC, RRC, RL, RR, SLA, SRA, SLL, SRL, RLD, RRD, DJNZ, MUL, DIV } _e_op;
typedef UINT8 e_op;
static const char *const op_names[] = { "??", "nop", "ex", "exx", "ld", "ldw", "lda", "ldi", "ldir", "ldd", "lddr", "cpi", "cpir", "cpd", "cpdr", "push", "pop", "jp", "jr", "call", "callr", "ret", "reti", "halt", "di", "ei", "swi", "daa", "cpl", "neg", "ldar", "rcf", "scf", "ccf", "tset", "bit", "set", "res", "inc", "dec", "incx", "decx", "incw", "decw", "add", "adc", "sub", "sbc", "and", "xor", "or", "cp", "rlc", "rrc", "rl", "rr", "sla", "sra", "sll", "srl", "rld", "rrd", "djnz", "mul", "div" };
typedef enum {
@ -59,6 +60,18 @@ typedef struct
} t90_Regs;
INLINE t90_Regs *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_TMP90840 ||
cpu_get_type(device) == CPU_TMP90841 ||
cpu_get_type(device) == CPU_TMP91640 ||
cpu_get_type(device) == CPU_TMP91641);
return (t90_Regs *)device->token;
}
enum {
T90_B, T90_C, T90_D, T90_E, T90_H, T90_L, T90_A,
T90_BC, T90_DE, T90_HL, T90_XX, T90_IX, T90_IY, T90_SP,
@ -997,7 +1010,7 @@ static int sprint_arg(char *buffer, UINT32 pc, const char *pre, const e_mode mod
CPU_DISASSEMBLE( t90 )
{
t90_Regs *cpustate = device->token;
t90_Regs *cpustate = get_safe_token(device);
int len;
cpustate->addr = pc;
@ -1268,6 +1281,7 @@ INT2 P82 Rising Edge -
*************************************************************************************************************/
typedef enum { INTSWI = 0, INTNMI, INTWD, INT0, INTT0, INTT1, INTT2, INTT3, INTT4, INT1, INTT5, INT2, INTRX, INTTX, INTMAX } e_irq;
DECLARE_ENUM_OPERATORS(e_irq)
INLINE void leave_halt(t90_Regs *cpustate)
{
@ -1326,7 +1340,7 @@ INLINE void Cyc_f(t90_Regs *cpustate) { cpustate->icount -= cpustate->cyc_f; }
static CPU_EXECUTE( t90 )
{
t90_Regs *cpustate = device->token;
t90_Regs *cpustate = get_safe_token(device);
UINT8 a8,b8;
UINT16 a16,b16;
unsigned a32;
@ -1968,7 +1982,7 @@ static CPU_EXECUTE( t90 )
static CPU_RESET( t90 )
{
t90_Regs *cpustate = device->token;
t90_Regs *cpustate = get_safe_token(device);
cpustate->irq_state = 0;
cpustate->irq_mask = 0;
cpustate->pc.d = 0x0000;
@ -1988,7 +2002,7 @@ static CPU_EXIT( t90 )
static CPU_BURN( t90 )
{
t90_Regs *cpustate = device->token;
t90_Regs *cpustate = get_safe_token(device);
cpustate->icount -= 4 * ((cycles + 3) / 4);
}
@ -2266,7 +2280,7 @@ FFED BX R/W Reset Description
static READ8_HANDLER( t90_internal_registers_r )
{
t90_Regs *cpustate = space->cpu->token;
t90_Regs *cpustate = get_safe_token(space->cpu);
#define RIO memory_read_byte_8le( cpustate->io, T90_IOBASE+offset )
@ -2378,7 +2392,7 @@ static void t90_stop_timer4(t90_Regs *cpustate)
static TIMER_CALLBACK( t90_timer_callback )
{
t90_Regs *cpustate = ptr;
t90_Regs *cpustate = (t90_Regs *)ptr;
int is16bit;
int i = param;
@ -2450,7 +2464,7 @@ static TIMER_CALLBACK( t90_timer4_callback )
{
// logerror("CPU Timer 4 fired! value = %d\n", (unsigned)cpustate->timer_value[4]);
t90_Regs *cpustate = ptr;
t90_Regs *cpustate = (t90_Regs *)ptr;
cpustate->timer4_value++;
// Match
@ -2480,7 +2494,7 @@ static WRITE8_HANDLER( t90_internal_registers_w )
{
#define WIO memory_write_byte_8le( cpustate->io, T90_IOBASE+offset, data )
t90_Regs *cpustate = space->cpu->token;
t90_Regs *cpustate = get_safe_token(space->cpu);
UINT8 out_mask;
UINT8 old = cpustate->internal_registers[offset];
switch ( T90_IOBASE + offset )
@ -2617,7 +2631,7 @@ static WRITE8_HANDLER( t90_internal_registers_w )
static CPU_INIT( t90 )
{
t90_Regs *cpustate = device->token;
t90_Regs *cpustate = get_safe_token(device);
int i, p;
// state_save_register_device_item(device, 0, Z80.prvpc.w.l);
@ -2691,7 +2705,7 @@ ADDRESS_MAP_END
static CPU_SET_INFO( t90 )
{
t90_Regs *cpustate = device->token;
t90_Regs *cpustate = get_safe_token(device);
switch (state)
{
@ -2724,7 +2738,7 @@ static CPU_SET_INFO( t90 )
CPU_GET_INFO( tmp90840 )
{
t90_Regs *cpustate = (device != NULL) ? device->token : NULL;
t90_Regs *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

26
src/emu/cpu/tms32010/tms32010.c
View File

@ -96,6 +96,14 @@ struct _tms32010_state
const address_space *io;
};
INLINE tms32010_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_TMS32010);
return (tms32010_state *)device->token;
}
/* opcode table entry */
typedef struct _tms32010_opcode tms32010_opcode;
@ -377,7 +385,7 @@ static void adds(tms32010_state *cpustate)
cpustate->ACC.d += cpustate->ALU.d;
CALCULATE_ADD_OVERFLOW(cpustate, cpustate->ALU.d);
}
static void and(tms32010_state *cpustate)
static void and_(tms32010_state *cpustate)
{
getdata(cpustate, 0,0);
cpustate->ACC.d &= cpustate->ALU.d;
@ -583,7 +591,7 @@ static void nop(tms32010_state *cpustate)
{
/* Nothing to do */
}
static void or(tms32010_state *cpustate)
static void or_(tms32010_state *cpustate)
{
getdata(cpustate, 0,0);
cpustate->ACC.w.l |= cpustate->ALU.w.l;
@ -690,7 +698,7 @@ static void tblw(tms32010_state *cpustate)
M_WRTROM(((cpustate->ACC.w.l & cpustate->addr_mask)),cpustate->ALU.w.l);
cpustate->STACK[0] = cpustate->STACK[1];
}
static void xor(tms32010_state *cpustate)
static void xor_(tms32010_state *cpustate)
{
getdata(cpustate, 0,0);
cpustate->ACC.w.l ^= cpustate->ALU.w.l;
@ -735,7 +743,7 @@ static const tms32010_opcode opcode_main[256]=
/*60*/ {1, addh },{1, adds },{1, subh },{1, subs },{1, subc },{1, zalh },{1, zals },{3, tblr },
/*68*/ {1, larp_mar},{1, dmov },{1, lt },{1, ltd },{1, lta },{1, mpy },{1, ldpk },{1, ldp },
/*70*/ {1, lark_ar0},{1, lark_ar1 },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
/*78*/ {1, xor },{1, and },{1, or },{1, lst },{1, sst },{3, tblw },{1, lack },{0, opcodes_7F },
/*78*/ {1, xor_ },{1, and_ },{1, or_ },{1, lst },{1, sst },{3, tblw },{1, lack },{0, opcodes_7F },
/*80*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
/*88*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
/*90*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
@ -769,7 +777,7 @@ static const tms32010_opcode_7F opcode_7F[32]=
****************************************************************************/
static CPU_INIT( tms32010 )
{
tms32010_state *cpustate = device->token;
tms32010_state *cpustate = get_safe_token(device);
state_save_register_device_item(device, 0, cpustate->PC);
state_save_register_device_item(device, 0, cpustate->PREVPC);
@ -803,7 +811,7 @@ static CPU_INIT( tms32010 )
****************************************************************************/
static CPU_RESET( tms32010 )
{
tms32010_state *cpustate = device->token;
tms32010_state *cpustate = get_safe_token(device);
cpustate->PC = 0;
cpustate->STR = 0x7efe; // OV cleared
@ -846,7 +854,7 @@ static int Ext_IRQ(tms32010_state *cpustate)
****************************************************************************/
static CPU_EXECUTE( tms32010 )
{
tms32010_state *cpustate = device->token;
tms32010_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
do
@ -905,7 +913,7 @@ ADDRESS_MAP_END
static CPU_SET_INFO( tms32010 )
{
tms32010_state *cpustate = device->token;
tms32010_state *cpustate = get_safe_token(device);
switch (state)
{
@ -935,7 +943,7 @@ static CPU_SET_INFO( tms32010 )
CPU_GET_INFO( tms32010 )
{
tms32010_state *cpustate = (device != NULL) ? device->token : NULL;
tms32010_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

37
src/emu/cpu/tms32025/tms32025.c
View File

@ -180,6 +180,15 @@ struct _tms32025_state
UINT16 *datamap[0x200];
};
INLINE tms32025_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_TMS32025 ||
cpu_get_type(device) == CPU_TMS32026);
return (tms32025_state *)device->token;
}
/* opcode table entry */
typedef struct _tms32025_opcode tms32025_opcode;
@ -643,7 +652,7 @@ static void adrk(tms32025_state *cpustate)
{
cpustate->AR[ARP] += cpustate->opcode.b.l;
}
static void and(tms32025_state *cpustate)
static void and_(tms32025_state *cpustate)
{
GETDATA(cpustate, 0, 0);
cpustate->ACC.d &= cpustate->ALU.d;
@ -1223,7 +1232,7 @@ static void norm(tms32025_state *cpustate)
MODIFY_AR_ARP(cpustate);
}
}
static void or(tms32025_state *cpustate)
static void or_(tms32025_state *cpustate)
{
GETDATA(cpustate, 0, 0);
cpustate->ACC.w.l |= cpustate->ALU.w.l;
@ -1577,7 +1586,7 @@ static void trap(tms32025_state *cpustate)
PUSH_STACK(cpustate, cpustate->PC);
SET_PC(0x001E); /* Trap vector */
}
static void xor(tms32025_state *cpustate)
static void xor_(tms32025_state *cpustate)
{
GETDATA(cpustate, 0, 0);
cpustate->ACC.w.l ^= cpustate->ALU.w.l;
@ -1626,7 +1635,7 @@ static const tms32025_opcode opcode_main[256]=
/*30*/ {1*CLK, lar_ar0 },{1*CLK, lar_ar1 },{1*CLK, lar_ar2 },{1*CLK, lar_ar3 },{1*CLK, lar_ar4 },{1*CLK, lar_ar5 },{1*CLK, lar_ar6 },{1*CLK, lar_ar7 },
/*38*/ {1*CLK, mpy },{1*CLK, sqra },{1*CLK, mpya },{1*CLK, mpys },{1*CLK, lt },{1*CLK, lta },{1*CLK, ltp },{1*CLK, ltd },
/*40*/ {1*CLK, zalh },{1*CLK, zals },{1*CLK, lact },{1*CLK, addc },{1*CLK, subh },{1*CLK, subs },{1*CLK, subt },{1*CLK, subc },
/*48*/ {1*CLK, addh },{1*CLK, adds },{1*CLK, addt },{1*CLK, rpt },{1*CLK, xor },{1*CLK, or },{1*CLK, and },{1*CLK, subb },
/*48*/ {1*CLK, addh },{1*CLK, adds },{1*CLK, addt },{1*CLK, rpt },{1*CLK, xor_ },{1*CLK, or_ },{1*CLK, and_ },{1*CLK, subb },
/*50*/ {1*CLK, lst },{1*CLK, lst1 },{1*CLK, ldp },{1*CLK, lph },{1*CLK, pshd },{1*CLK, mar },{1*CLK, dmov },{1*CLK, bitt },
/*58*/ {3*CLK, tblr },{2*CLK, tblw },{1*CLK, sqrs },{1*CLK, lts },{2*CLK, macd },{2*CLK, mac },{2*CLK, bc },{2*CLK, bnc },
/*60*/ {1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },
@ -1699,9 +1708,9 @@ static const tms32025_opcode_Dx opcode_Dx_subset[8]= /* Instructions living unde
****************************************************************************/
static CPU_INIT( tms32025 )
{
tms32025_state *cpustate = device->token;
tms32025_state *cpustate = get_safe_token(device);
cpustate->intRAM = auto_malloc(0x800*2);
cpustate->intRAM = (UINT16 *)auto_malloc(0x800*2);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -1754,7 +1763,7 @@ static CPU_INIT( tms32025 )
****************************************************************************/
static CPU_RESET( tms32025 )
{
tms32025_state *cpustate = device->token;
tms32025_state *cpustate = get_safe_token(device);
SET_PC(0); /* Starting address on a reset */
cpustate->STR0 |= 0x0600; /* INTM and unused bit set to 1 */
@ -1790,7 +1799,7 @@ static CPU_RESET( tms32025 )
#if (HAS_TMS32026)
static CPU_RESET( tms32026 )
{
tms32025_state *cpustate = device->token;
tms32025_state *cpustate = get_safe_token(device);
CPU_RESET_CALL(tms32025);
@ -1941,7 +1950,7 @@ again:
****************************************************************************/
static CPU_EXECUTE( tms32025 )
{
tms32025_state *cpustate = device->token;
tms32025_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -2097,7 +2106,7 @@ static void set_irq_line(tms32025_state *cpustate, int irqline, int state)
****************************************************************************/
static CPU_READOP( tms32025 )
{
tms32025_state *cpustate = device->token;
tms32025_state *cpustate = get_safe_token(device);
void *ptr;
@ -2122,7 +2131,7 @@ static CPU_READOP( tms32025 )
****************************************************************************/
static CPU_READ( tms32025 )
{
tms32025_state *cpustate = device->token;
tms32025_state *cpustate = get_safe_token(device);
void *ptr = NULL;
UINT64 temp = 0;
@ -2175,7 +2184,7 @@ static CPU_READ( tms32025 )
****************************************************************************/
static CPU_WRITE( tms32025 )
{
tms32025_state *cpustate = device->token;
tms32025_state *cpustate = get_safe_token(device);
void *ptr = NULL;
@ -2224,7 +2233,7 @@ static CPU_WRITE( tms32025 )
static CPU_SET_INFO( tms32025 )
{
tms32025_state *cpustate = device->token;
tms32025_state *cpustate = get_safe_token(device);
switch (state)
{
@ -2280,7 +2289,7 @@ static CPU_SET_INFO( tms32025 )
CPU_GET_INFO( tms32025 )
{
tms32025_state *cpustate = (device != NULL) ? device->token : NULL;
tms32025_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

2
src/emu/cpu/tms32031/32031ops.c
View File

@ -67,7 +67,7 @@
FORWARD DECLARATIONS
***************************************************************************/
void (*const tms32031ops[])(tms32031_state *tms, UINT32 op);
extern void (*const tms32031ops[])(tms32031_state *tms, UINT32 op);

23
src/emu/cpu/tms32031/tms32031.c
View File

@ -122,6 +122,15 @@ struct _tms32031_state
const address_space *program;
};
INLINE tms32031_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_TMS32031);
return (tms32031_state *)device->token;
}
/***************************************************************************
@ -358,8 +367,8 @@ static void set_irq_line(tms32031_state *tms, int irqline, int state)
static CPU_INIT( tms32031 )
{
const tms32031_config *configdata = device->static_config;
tms32031_state *tms = device->token;
const tms32031_config *configdata = (const tms32031_config *)device->static_config;
tms32031_state *tms = get_safe_token(device);
int i;
tms->irq_callback = irqcallback;
@ -388,7 +397,7 @@ static CPU_INIT( tms32031 )
static CPU_RESET( tms32031 )
{
tms32031_state *tms = device->token;
tms32031_state *tms = get_safe_token(device);
/* if we have a config struct, get the boot ROM address */
if (tms->bootoffset)
@ -416,7 +425,7 @@ static CPU_RESET( tms32031 )
static CPU_RESET( tms32032 )
{
tms32031_state *tms = device->token;
tms32031_state *tms = get_safe_token(device);
CPU_RESET_CALL(tms32031);
tms->is_32032 = TRUE;
}
@ -452,7 +461,7 @@ static CPU_EXIT( tms32031 )
static CPU_EXECUTE( tms32031 )
{
tms32031_state *tms = device->token;
tms32031_state *tms = get_safe_token(device);
/* check IRQs up front */
tms->icount = cycles;
@ -612,7 +621,7 @@ static UINT32 boot_loader(tms32031_state *tms, UINT32 boot_rom_addr)
static CPU_SET_INFO( tms32031 )
{
tms32031_state *tms = device->token;
tms32031_state *tms = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -691,7 +700,7 @@ ADDRESS_MAP_END
CPU_GET_INFO( tms32031 )
{
tms32031_state *tms = (device != NULL) ? device->token : NULL;
tms32031_state *tms = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
float ftemp;
switch (state)

27
src/emu/cpu/tms32051/tms32051.c
View File

@ -149,6 +149,15 @@ struct _tms32051_state
int icount;
};
INLINE tms32051_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_TMS32051);
return (tms32051_state *)device->token;
}
static void delay_slot(tms32051_state *cpustate, UINT16 startpc);
static void save_interrupt_context(tms32051_state *cpustate);
static void restore_interrupt_context(tms32051_state *cpustate);
@ -213,7 +222,7 @@ static void delay_slot(tms32051_state *cpustate, UINT16 startpc)
static CPU_INIT( tms )
{
tms32051_state *cpustate = device->token;
tms32051_state *cpustate = get_safe_token(device);
cpustate->device = device;
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -222,7 +231,7 @@ static CPU_INIT( tms )
static CPU_RESET( tms )
{
tms32051_state *cpustate = device->token;
tms32051_state *cpustate = get_safe_token(device);
int i;
UINT16 src, dst, length;
@ -328,7 +337,7 @@ static CPU_EXIT( tms )
static CPU_EXECUTE( tms )
{
tms32051_state *cpustate = device->token;
tms32051_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -396,7 +405,7 @@ static CPU_EXECUTE( tms )
static READ16_HANDLER( cpuregs_r )
{
tms32051_state *cpustate = space->cpu->token;
tms32051_state *cpustate = get_safe_token(space->cpu);
switch (offset)
{
@ -448,7 +457,7 @@ static READ16_HANDLER( cpuregs_r )
static WRITE16_HANDLER( cpuregs_w )
{
tms32051_state *cpustate = space->cpu->token;
tms32051_state *cpustate = get_safe_token(space->cpu);
switch (offset)
{
@ -542,7 +551,7 @@ ADDRESS_MAP_END
static CPU_SET_INFO( tms )
{
tms32051_state *cpustate = device->token;
tms32051_state *cpustate = get_safe_token(device);
switch (state)
{
@ -553,7 +562,7 @@ static CPU_SET_INFO( tms )
static CPU_READ( tms )
{
tms32051_state *cpustate = device->token;
tms32051_state *cpustate = get_safe_token(device);
if (space == ADDRESS_SPACE_PROGRAM)
{
*value = (PM_READ16(cpustate, offset>>1) >> ((offset & 1) ? 0 : 8)) & 0xff;
@ -567,7 +576,7 @@ static CPU_READ( tms )
static CPU_GET_INFO( tms )
{
tms32051_state *cpustate = (device != NULL) ? device->token : NULL;
tms32051_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch(state)
{
@ -673,7 +682,7 @@ static CPU_GET_INFO( tms )
#if (HAS_TMS32051)
static CPU_SET_INFO( tms32051 )
{
tms32051_state *cpustate = device->token;
tms32051_state *cpustate = get_safe_token(device);
if (state >= CPUINFO_INT_INPUT_STATE && state <= CPUINFO_INT_INPUT_STATE + 5)
{

6
src/emu/cpu/tms34010/34010gfx.c
View File

@ -203,7 +203,7 @@ static int compute_pixblt_b_cycles(int left_partials, int right_partials, int fu
/* Shift register handling */
static void shiftreg_w(const address_space *space, offs_t offset,UINT16 data)
{
tms34010_state *tms = space->cpu->token;
tms34010_state *tms = get_safe_token(space->cpu);
if (tms->config->from_shiftreg)
(*tms->config->from_shiftreg)(space, (UINT32)(offset << 3) & ~15, &tms->shiftreg[0]);
else
@ -212,7 +212,7 @@ static void shiftreg_w(const address_space *space, offs_t offset,UINT16 data)
static UINT16 shiftreg_r(const address_space *space, offs_t offset)
{
tms34010_state *tms = space->cpu->token;
tms34010_state *tms = get_safe_token(space->cpu);
if (tms->config->to_shiftreg)
(*tms->config->to_shiftreg)(space, (UINT32)(offset << 3) & ~15, &tms->shiftreg[0]);
else
@ -222,7 +222,7 @@ static UINT16 shiftreg_r(const address_space *space, offs_t offset)
static UINT16 dummy_shiftreg_r(const address_space *space, offs_t offset)
{
tms34010_state *tms = space->cpu->token;
tms34010_state *tms = get_safe_token(space->cpu);
return tms->shiftreg[0];
}

50
src/emu/cpu/tms34010/tms34010.c
View File

@ -82,6 +82,16 @@ struct _tms34010_state
cpu_state_table state;
};
INLINE tms34010_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_TMS34010 ||
cpu_get_type(device) == CPU_TMS34020);
return (tms34010_state *)device->token;
}
#include "34010ops.h"
@ -673,8 +683,8 @@ static void check_interrupt(tms34010_state *tms)
static CPU_INIT( tms34010 )
{
const tms34010_config *configdata = device->static_config ? device->static_config : &default_config;
tms34010_state *tms = device->token;
const tms34010_config *configdata = device->static_config ? (const tms34010_config *)device->static_config : &default_config;
tms34010_state *tms = get_safe_token(device);
tms->external_host_access = FALSE;
@ -694,7 +704,7 @@ static CPU_INIT( tms34010 )
timer_adjust_oneshot(tms->scantimer, attotime_zero, 0);
/* allocate the shiftreg */
tms->shiftreg = auto_malloc(SHIFTREG_SIZE);
tms->shiftreg = (UINT16 *)auto_malloc(SHIFTREG_SIZE);
state_save_register_device_item(device, 0, tms->pc);
state_save_register_device_item(device, 0, tms->st);
@ -713,7 +723,7 @@ static CPU_INIT( tms34010 )
static CPU_RESET( tms34010 )
{
/* zap the state and copy in the config pointer */
tms34010_state *tms = device->token;
tms34010_state *tms = get_safe_token(device);
const tms34010_config *config = tms->config;
const device_config *screen = tms->screen;
UINT16 *shiftreg = tms->shiftreg;
@ -746,7 +756,7 @@ static CPU_RESET( tms34010 )
static CPU_RESET( tms34020 )
{
tms34010_state *tms = device->token;
tms34010_state *tms = get_safe_token(device);
CPU_RESET_CALL(tms34010);
tms->is_34020 = 1;
}
@ -759,7 +769,7 @@ static CPU_RESET( tms34020 )
static CPU_EXIT( tms34010 )
{
tms34010_state *tms = device->token;
tms34010_state *tms = get_safe_token(device);
tms->shiftreg = NULL;
}
@ -800,7 +810,7 @@ static void set_irq_line(tms34010_state *tms, int irqline, int linestate)
static TIMER_CALLBACK( internal_interrupt_callback )
{
tms34010_state *tms = ptr;
tms34010_state *tms = (tms34010_state *)ptr;
int type = param;
/* call through to the CPU to generate the int */
@ -819,7 +829,7 @@ static TIMER_CALLBACK( internal_interrupt_callback )
static CPU_EXECUTE( tms34010 )
{
tms34010_state *tms = device->token;
tms34010_state *tms = get_safe_token(device);
/* Get out if CPU is halted. Absolutely no interrupts must be taken!!! */
if (IOREG(tms, REG_HSTCTLH) & 0x8000)
@ -948,7 +958,7 @@ static void set_raster_op(tms34010_state *tms)
static TIMER_CALLBACK( scanline_callback )
{
tms34010_state *tms = ptr;
tms34010_state *tms = (tms34010_state *)ptr;
const rectangle *current_visarea;
int vsblnk, veblnk, vtotal;
int vcount = param;
@ -1088,7 +1098,7 @@ static TIMER_CALLBACK( scanline_callback )
void tms34010_get_display_params(const device_config *cpu, tms34010_display_params *params)
{
tms34010_state *tms = cpu->token;
tms34010_state *tms = get_safe_token(cpu);
params->enabled = ((SMART_IOREG(tms, DPYCTL) & 0x8000) != 0);
params->vcount = SMART_IOREG(tms, VCOUNT);
@ -1134,7 +1144,7 @@ VIDEO_UPDATE( tms340x0 )
cpu_type type = cpu_get_type(cpu);
if (type == CPU_TMS34010 || type == CPU_TMS34020)
{
tms = cpu->token;
tms = get_safe_token(cpu);
if (tms->config != NULL && tms->config->scanline_callback != NULL && tms->screen == screen)
break;
tms = NULL;
@ -1198,7 +1208,7 @@ static const char *const ioreg_name[] =
WRITE16_HANDLER( tms34010_io_register_w )
{
tms34010_state *tms = space->cpu->token;
tms34010_state *tms = get_safe_token(space->cpu);
int oldreg, newreg;
/* Set register */
@ -1341,7 +1351,7 @@ static const char *const ioreg020_name[] =
WRITE16_HANDLER( tms34020_io_register_w )
{
tms34010_state *tms = space->cpu->token;
tms34010_state *tms = get_safe_token(space->cpu);
int oldreg, newreg;
/* Set register */
@ -1504,7 +1514,7 @@ WRITE16_HANDLER( tms34020_io_register_w )
READ16_HANDLER( tms34010_io_register_r )
{
tms34010_state *tms = space->cpu->token;
tms34010_state *tms = get_safe_token(space->cpu);
int result, total;
// if (LOG_CONTROL_REGS)
@ -1547,7 +1557,7 @@ READ16_HANDLER( tms34010_io_register_r )
READ16_HANDLER( tms34020_io_register_r )
{
tms34010_state *tms = space->cpu->token;
tms34010_state *tms = get_safe_token(space->cpu);
int result, total;
// if (LOG_CONTROL_REGS)
@ -1589,7 +1599,7 @@ READ16_HANDLER( tms34020_io_register_r )
static STATE_POSTLOAD( tms34010_state_postload )
{
tms34010_state *tms = param;
tms34010_state *tms = (tms34010_state *)param;
set_raster_op(tms);
set_pixel_function(tms);
}
@ -1602,7 +1612,7 @@ static STATE_POSTLOAD( tms34010_state_postload )
void tms34010_host_w(const device_config *cpu, int reg, int data)
{
const address_space *space;
tms34010_state *tms = cpu->token;
tms34010_state *tms = get_safe_token(cpu);
unsigned int addr;
switch (reg)
@ -1657,7 +1667,7 @@ void tms34010_host_w(const device_config *cpu, int reg, int data)
int tms34010_host_r(const device_config *cpu, int reg)
{
tms34010_state *tms = cpu->token;
tms34010_state *tms = get_safe_token(cpu);
unsigned int addr;
int result = 0;
@ -1714,7 +1724,7 @@ int tms34010_host_r(const device_config *cpu, int reg)
static CPU_SET_INFO( tms34010 )
{
tms34010_state *tms = device->token;
tms34010_state *tms = get_safe_token(device);
switch (state)
{
@ -1732,7 +1742,7 @@ static CPU_SET_INFO( tms34010 )
CPU_GET_INFO( tms34010 )
{
tms34010_state *tms = (device != NULL) ? device->token : NULL;
tms34010_state *tms = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

29
src/emu/cpu/tms57002/tms57002.c
View File

@ -106,6 +106,15 @@ typedef struct {
int unsupported_inst_warning;
} tms57002_t;
INLINE tms57002_t *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_TMS57002);
return (tms57002_t *)device->token;
}
static void tms57002_cache_flush(tms57002_t *s);
static const char *tms57002_get_memadr(UINT32 opcode, char type)
@ -191,7 +200,7 @@ static CPU_DISASSEMBLE(tms57002)
WRITE8_DEVICE_HANDLER(tms57002_pload_w)
{
tms57002_t *s = device->token;
tms57002_t *s = get_safe_token(device);
UINT8 olds = s->sti;
if(data)
@ -205,7 +214,7 @@ WRITE8_DEVICE_HANDLER(tms57002_pload_w)
WRITE8_DEVICE_HANDLER(tms57002_cload_w)
{
tms57002_t *s = device->token;
tms57002_t *s = get_safe_token(device);
UINT8 olds = s->sti;
if(data)
s->sti &= ~IN_CLOAD;
@ -217,7 +226,7 @@ WRITE8_DEVICE_HANDLER(tms57002_cload_w)
static CPU_RESET(tms57002)
{
tms57002_t *s = device->token;
tms57002_t *s = get_safe_token(device);
s->sti = (s->sti & ~(SU_MASK|S_READ|S_WRITE|S_BRANCH|S_HOST)) | (SU_ST0|S_IDLE);
s->pc = 0;
@ -240,7 +249,7 @@ static CPU_RESET(tms57002)
WRITE8_DEVICE_HANDLER(tms57002_data_w)
{
tms57002_t *s = device->token;
tms57002_t *s = get_safe_token(device);
switch(s->sti & (IN_PLOAD|IN_CLOAD)) {
case 0:
@ -297,7 +306,7 @@ WRITE8_DEVICE_HANDLER(tms57002_data_w)
READ8_DEVICE_HANDLER(tms57002_data_r)
{
tms57002_t *s = device->token;
tms57002_t *s = get_safe_token(device);
UINT8 res;
if(!(s->sti & S_HOST))
return 0xff;
@ -319,13 +328,13 @@ READ8_DEVICE_HANDLER(tms57002_empty_r)
READ8_DEVICE_HANDLER(tms57002_dready_r)
{
tms57002_t *s = device->token;
tms57002_t *s = get_safe_token(device);
return s->sti & S_HOST ? 0 : 1;
}
void tms57002_sync(const device_config *device)
{
tms57002_t *s = device->token;
tms57002_t *s = get_safe_token(device);
if(s->sti & (IN_PLOAD | IN_CLOAD))
return;
@ -1345,7 +1354,7 @@ static int tms57002_decode_get_pc(tms57002_t *s)
static CPU_EXECUTE(tms57002)
{
tms57002_t *s = device->token;
tms57002_t *s = get_safe_token(device);
int initial_cycles = cycles;
int ipc = -1;
@ -1409,7 +1418,7 @@ static CPU_EXECUTE(tms57002)
static CPU_INIT(tms57002)
{
tms57002_t *s = device->token;
tms57002_t *s = get_safe_token(device);
tms57002_cache_flush(s);
s->sti = S_IDLE;
s->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -1427,7 +1436,7 @@ ADDRESS_MAP_END
CPU_GET_INFO(tms57002)
{
tms57002_t *s = (device != NULL) ? device->token : NULL;
tms57002_t *s = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch(state) {
case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms57002_t); break;

2
src/emu/cpu/tms57002/tmsmake.c
View File

@ -928,7 +928,7 @@ static void clear(void)
clear_cat(cat3, 0x80);
}
int main(int argc, char **argv)
int main(int argc, char *argv[])
{
if(argc != 3) {
fprintf(stderr, "Usage:\n%s tmsinstr.lst tms57002.inc\n", argv[0]);

34
src/emu/cpu/tms7000/tms7000.c
View File

@ -86,6 +86,16 @@ struct _tms7000_state
UINT8 idle_state; /* Set after the execution of an idle instruction */
};
INLINE tms7000_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_TMS7000 ||
cpu_get_type(device) == CPU_TMS7000_EXL);
return (tms7000_state *)device->token;
}
#define pPC cpustate->pc.w.l
#define PC cpustate->pc
#define pSP cpustate->sp
@ -153,7 +163,7 @@ INLINE void WRF16( tms7000_state *cpustate, UINT32 mAddr, PAIR p ) /*Write regis
static CPU_INIT( tms7000 )
{
tms7000_state *cpustate = device->token;
tms7000_state *cpustate = get_safe_token(device);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
@ -185,7 +195,7 @@ static CPU_INIT( tms7000 )
static CPU_RESET( tms7000 )
{
tms7000_state *cpustate = device->token;
tms7000_state *cpustate = get_safe_token(device);
// cpustate->architecture = (int)param;
@ -229,7 +239,7 @@ static CPU_RESET( tms7000 )
static CPU_SET_INFO( tms7000 )
{
tms7000_state *cpustate = device->token;
tms7000_state *cpustate = get_safe_token(device);
switch (state)
{
@ -256,7 +266,7 @@ static CPU_SET_INFO( tms7000 )
CPU_GET_INFO( tms7000 )
{
tms7000_state *cpustate = (device != NULL) ? device->token : NULL;
tms7000_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch( state )
{
@ -434,7 +444,7 @@ static void tms7000_do_interrupt( tms7000_state *cpustate, UINT16 address, UINT8
static CPU_EXECUTE( tms7000 )
{
tms7000_state *cpustate = device->token;
tms7000_state *cpustate = get_safe_token(device);
int op;
cpustate->icount = cycles;
@ -476,7 +486,7 @@ static CPU_EXECUTE( tms7000 )
static CPU_EXECUTE( tms7000_exl )
{
tms7000_state *cpustate = device->token;
tms7000_state *cpustate = get_safe_token(device);
int op;
cpustate->icount = cycles;
@ -522,7 +532,7 @@ static CPU_EXECUTE( tms7000_exl )
****************************************************************************/
void tms7000_A6EC1( const device_config *device )
{
tms7000_state *cpustate = device->token;
tms7000_state *cpustate = get_safe_token(device);
if( (cpustate->pf[0x03] & 0x80) == 0x80 ) /* Is timer system active? */
{
if( (cpustate->pf[0x03] & 0x40) == 0x40) /* Is event counter the timer source? */
@ -532,7 +542,7 @@ void tms7000_A6EC1( const device_config *device )
static void tms7000_service_timer1( const device_config *device )
{
tms7000_state *cpustate = device->token;
tms7000_state *cpustate = get_safe_token(device);
if( --cpustate->t1_prescaler < 0 ) /* Decrement prescaler and check for underflow */
{
cpustate->t1_prescaler = cpustate->pf[3] & 0x1f; /* Reload prescaler (5 bit) */
@ -552,7 +562,7 @@ static void tms7000_service_timer1( const device_config *device )
static WRITE8_HANDLER( tms70x0_pf_w ) /* Perpherial file write */
{
tms7000_state *cpustate = space->cpu->token;
tms7000_state *cpustate = get_safe_token(space->cpu);
UINT8 temp1, temp2, temp3;
switch( offset )
@ -621,7 +631,7 @@ static WRITE8_HANDLER( tms70x0_pf_w ) /* Perpherial file write */
static READ8_HANDLER( tms70x0_pf_r ) /* Perpherial file read */
{
tms7000_state *cpustate = space->cpu->token;
tms7000_state *cpustate = get_safe_token(space->cpu);
UINT8 result;
UINT8 temp1, temp2, temp3;
@ -714,11 +724,11 @@ static UINT16 bcd_sub( UINT16 a, UINT16 b)
}
static WRITE8_HANDLER( tms7000_internal_w ) {
tms7000_state *cpustate = space->cpu->token;
tms7000_state *cpustate = get_safe_token(space->cpu);
cpustate->rf[ offset ] = data;
}
static READ8_HANDLER( tms7000_internal_r ) {
tms7000_state *cpustate = space->cpu->token;
tms7000_state *cpustate = get_safe_token(space->cpu);
return cpustate->rf[ offset ];
}

43
src/emu/cpu/tms9900/99xxcore.h
View File

@ -511,6 +511,15 @@ struct _tms99xx_state
int extra_byte; /* buffer holding the unused byte in a word read */
};
INLINE tms99xx_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == TMS99XX_GET_INFO);
return (tms99xx_state *)device->token;
}
#if (TMS99XX_MODEL == TMS9995_ID)
static void reset_decrementer(tms99xx_state *cpustate);
#endif
@ -536,13 +545,13 @@ READ16_HANDLER(ti990_10_internal_r)
*/
READ8_HANDLER(tms9995_internal1_r)
{
tms99xx_state *cpustate = space->cpu->token;
tms99xx_state *cpustate = get_safe_token(space->cpu);
return cpustate->RAM[offset];
}
WRITE8_HANDLER(tms9995_internal1_w)
{
tms99xx_state *cpustate = space->cpu->token;
tms99xx_state *cpustate = get_safe_token(space->cpu);
cpustate->RAM[offset]=data;
}
@ -551,13 +560,13 @@ WRITE8_HANDLER(tms9995_internal1_w)
*/
READ8_HANDLER(tms9995_internal2_r)
{
tms99xx_state *cpustate = space->cpu->token;
tms99xx_state *cpustate = get_safe_token(space->cpu);
return cpustate->RAM[offset+0xfc];
}
WRITE8_HANDLER(tms9995_internal2_w)
{
tms99xx_state *cpustate = space->cpu->token;
tms99xx_state *cpustate = get_safe_token(space->cpu);
cpustate->RAM[offset+0xfc]=data;
}
@ -928,7 +937,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
/* read decrementer */
if (cpustate->decrementer_enabled && !(cpustate->flag & 1))
/* timer mode, timer enabled */
return ceil(cpu_attotime_to_clocks(cpustate->device, attotime_div(timer_timeleft(cpustate->timer), 16)));
return cpu_attotime_to_clocks(cpustate->device, attotime_div(timer_timeleft(cpustate->timer), 16));
else
/* event counter mode or timer mode, timer disabled */
return cpustate->decrementer_count;
@ -992,7 +1001,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
if (cpustate->decrementer_enabled && !(cpustate->flag & 1))
/* timer mode, timer enabled */
value = ceil(cpu_attotime_to_clocks(cpustate->device, attotime_div(timer_timeleft(cpustate->timer), 16)));
value = cpu_attotime_to_clocks(cpustate->device, attotime_div(timer_timeleft(cpustate->timer), 16));
else
/* event counter mode or timer mode, timer disabled */
value = cpustate->decrementer_count;
@ -1071,7 +1080,7 @@ INLINE void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, UINT16 data)
#if (TMS99XX_MODEL == TI990_10_ID)
READ8_HANDLER(ti990_10_mapper_cru_r)
{
tms99xx_state *cpustate = space->cpu->token;
tms99xx_state *cpustate = get_safe_token(space->cpu);
int reply = 0;
switch(cpustate->mapper_cru_read_register)
@ -1110,7 +1119,7 @@ INLINE void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, UINT16 data)
WRITE8_HANDLER(ti990_10_mapper_cru_w)
{
tms99xx_state *cpustate = space->cpu->token;
tms99xx_state *cpustate = get_safe_token(space->cpu);
switch (offset)
{
case 0:
@ -1152,13 +1161,13 @@ INLINE void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, UINT16 data)
READ8_HANDLER(ti990_10_eir_cru_r)
{
tms99xx_state *cpustate = space->cpu->token;
tms99xx_state *cpustate = get_safe_token(space->cpu);
return (offset == 1) ? (cpustate->error_interrupt_register & 0xff) : 0;
}
WRITE8_HANDLER(ti990_10_eir_cru_w)
{
tms99xx_state *cpustate = space->cpu->token;
tms99xx_state *cpustate = get_safe_token(space->cpu);
if (offset < 4) /* does not work for EIR_MAPERR */
{
cpustate->error_interrupt_register &= ~ (1 << offset);
@ -1205,7 +1214,7 @@ static void set_flag1(tms99xx_state *cpustate, int val);
static void register_for_save_state(const device_config *device)
{
tms99xx_state *cpustate = device->token;
tms99xx_state *cpustate = get_safe_token(device);
state_save_register_device_item(device, 0, cpustate->WP);
state_save_register_device_item(device, 0, cpustate->PC);
state_save_register_device_item(device, 0, cpustate->STATUS);
@ -1282,7 +1291,7 @@ static void register_for_save_state(const device_config *device)
static CPU_INIT( tms99xx )
{
const TMS99XX_RESET_PARAM *param = (const TMS99XX_RESET_PARAM *) device->static_config;
tms99xx_state *cpustate = device->token;
tms99xx_state *cpustate = get_safe_token(device);
register_for_save_state(device);
@ -1328,7 +1337,7 @@ static CPU_INIT( tms99xx )
*/
static CPU_RESET( tms99xx )
{
tms99xx_state *cpustate = device->token;
tms99xx_state *cpustate = get_safe_token(device);
cpustate->STATUS = 0; /* TMS9980 and TMS9995 Data Books say so */
getstat(cpustate);
@ -1397,7 +1406,7 @@ INLINE UINT16 fetch(tms99xx_state *cpustate)
static CPU_EXECUTE( tms99xx )
{
tms99xx_state *cpustate = device->token;
tms99xx_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
cpustate->lds_flag = 0;
@ -1776,7 +1785,7 @@ static void tms99xx_set_irq_line(tms99xx_state *cpustate, int irqline, int state
*/
static TIMER_CALLBACK( decrementer_callback )
{
tms99xx_state *cpustate = ptr;
tms99xx_state *cpustate = (tms99xx_state *)ptr;
/* request decrementer interrupt */
cpustate->int_latch |= 0x8;
@ -4576,7 +4585,7 @@ INLINE void execute(tms99xx_state *cpustate, UINT16 opcode)
static CPU_SET_INFO( tms99xx )
{
tms99xx_state *cpustate = device->token;
tms99xx_state *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -4658,7 +4667,7 @@ static CPU_SET_INFO( tms99xx )
void TMS99XX_GET_INFO(const device_config *device, UINT32 state, cpuinfo *info)
{
tms99xx_state *cpustate = (device != NULL) ? device->token : NULL;
tms99xx_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

4
src/emu/cpu/upd7810/7810dasm.c
View File

@ -5369,7 +5369,7 @@ static offs_t Dasm( char *buffer, offs_t pc, const struct dasm_s *dasmXX, const
UINT32 flags = 0;
t = dasmXX[op].token;
a = dasmXX[op].args;
a = (const char *)dasmXX[op].args;
/* 0 token means prefix opcode (use table from args) */
if (0 == t)
@ -5378,7 +5378,7 @@ static offs_t Dasm( char *buffer, offs_t pc, const struct dasm_s *dasmXX, const
op2 = oprom[idx++];
t = p_dasm[op2].token;
a = p_dasm[op2].args;
a = (const char *)p_dasm[op2].args;
}
buffer += sprintf(buffer, "%-8.8s", token[t]);

31
src/emu/cpu/upd7810/upd7810.c
View File

@ -502,6 +502,19 @@ struct _upd7810_state
int icount;
};
INLINE upd7810_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_UPD7810 ||
cpu_get_type(device) == CPU_UPD7807 ||
cpu_get_type(device) == CPU_UPD7801 ||
cpu_get_type(device) == CPU_UPD78C05 ||
cpu_get_type(device) == CPU_UPD78C06);
return (upd7810_state *)device->token;
}
#define CY 0x01
#define F1 0x02
#define L0 0x04
@ -1621,7 +1634,7 @@ static void upd78c05_timers(upd7810_state *cpustate, int cycles)
static CPU_INIT( upd7810 )
{
upd7810_state *cpustate = device->token;
upd7810_state *cpustate = get_safe_token(device);
cpustate->config = *(const UPD7810_CONFIG*) device->static_config;
cpustate->irq_callback = irqcallback;
@ -1698,7 +1711,7 @@ static CPU_INIT( upd7810 )
static CPU_RESET( upd7810 )
{
upd7810_state *cpustate = device->token;
upd7810_state *cpustate = get_safe_token(device);
UPD7810_CONFIG save_config;
cpu_irq_callback save_irqcallback;
@ -1743,14 +1756,14 @@ static CPU_RESET( upd7810 )
static CPU_RESET( upd7807 )
{
upd7810_state *cpustate = device->token;
upd7810_state *cpustate = get_safe_token(device);
CPU_RESET_CALL(upd7810);
cpustate->opXX = opXX_7807;
}
static CPU_RESET( upd7801 )
{
upd7810_state *cpustate = device->token;
upd7810_state *cpustate = get_safe_token(device);
CPU_RESET_CALL(upd7810);
cpustate->op48 = op48_7801;
cpustate->op4C = op4C_7801;
@ -1764,7 +1777,7 @@ static CPU_RESET( upd7801 )
static CPU_RESET( upd78c05 )
{
upd7810_state *cpustate = device->token;
upd7810_state *cpustate = get_safe_token(device);
CPU_RESET_CALL(upd7810);
cpustate->op48 = op48_78c05;
cpustate->op4C = op4C_78c05;
@ -1784,7 +1797,7 @@ static CPU_RESET( upd78c05 )
static CPU_RESET( upd78c06 )
{
upd7810_state *cpustate = device->token;
upd7810_state *cpustate = get_safe_token(device);
CPU_RESET_CALL(upd78c05);
cpustate->op48 = op48_78c06;
cpustate->op4C = op4C_78c06;
@ -1802,7 +1815,7 @@ static CPU_EXIT( upd7810 )
static CPU_EXECUTE( upd7810 )
{
upd7810_state *cpustate = device->token;
upd7810_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
do
@ -1927,7 +1940,7 @@ static void set_irq_line(upd7810_state *cpustate, int irqline, int state)
static CPU_SET_INFO( upd7810 )
{
upd7810_state *cpustate = device->token;
upd7810_state *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -2001,7 +2014,7 @@ static CPU_SET_INFO( upd7810 )
CPU_GET_INFO( upd7810 )
{
upd7810_state *cpustate = (device != NULL) ? device->token : NULL;
upd7810_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

19
src/emu/cpu/v30mz/v30mz.c
View File

@ -92,6 +92,15 @@ struct _v30mz_state
UINT16 e16;
};
INLINE v30mz_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_V30MZ);
return (v30mz_state *)device->token;
}
/***************************************************************************/
/* cpu state */
/***************************************************************************/
@ -113,7 +122,7 @@ static UINT8 parity_table[256];
static CPU_RESET( nec )
{
v30mz_state *cpustate = device->token;
v30mz_state *cpustate = get_safe_token(device);
unsigned int i,j,c;
static const BREGS reg_name[8]={ AL, CL, DL, BL, AH, CH, DH, BH };
cpu_irq_callback save_irqcallback;
@ -915,7 +924,7 @@ static CPU_DISASSEMBLE( nec )
static void nec_init(const device_config *device, cpu_irq_callback irqcallback, int type)
{
v30mz_state *cpustate = device->token;
v30mz_state *cpustate = get_safe_token(device);
state_save_register_device_item_array(device, 0, cpustate->regs.w);
state_save_register_device_item_array(device, 0, cpustate->sregs);
@ -945,7 +954,7 @@ static void nec_init(const device_config *device, cpu_irq_callback irqcallback,
static CPU_INIT( v30mz ) { nec_init(device, irqcallback, 3); }
static CPU_EXECUTE( v30mz )
{
v30mz_state *cpustate = device->token;
v30mz_state *cpustate = get_safe_token(device);
cpustate->icount=cycles;
@ -977,7 +986,7 @@ static CPU_EXECUTE( v30mz )
static CPU_SET_INFO( nec )
{
v30mz_state *cpustate = device->token;
v30mz_state *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -1033,7 +1042,7 @@ static CPU_SET_INFO( nec )
CPU_GET_INFO( v30mz )
{
v30mz_state *cpustate = (device != NULL) ? device->token : NULL;
v30mz_state *cpustate = (device != NULL && device != NULL) ? get_safe_token(device) : NULL;
int flags;
switch (state)

26
src/emu/cpu/v60/v60.c
View File

@ -110,6 +110,16 @@ struct _v60_state
UINT8 moddim;
};
INLINE v60_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_V60 ||
cpu_get_type(device) == CPU_V70);
return (v60_state *)device->token;
}
/*
* Prevent warnings on NetBSD. All identifiers beginning with an underscore
* followed by an uppercase letter are reserved by the C standard (ISO / IEC
@ -324,7 +334,7 @@ static UINT32 opUNHANDLED(v60_state *cpustate)
static void base_init(const device_config *device, cpu_irq_callback irqcallback)
{
v60_state *cpustate = device->token;
v60_state *cpustate = get_safe_token(device);
cpustate->stall_io = 0;
cpustate->irq_cb = irqcallback;
@ -344,7 +354,7 @@ static void base_init(const device_config *device, cpu_irq_callback irqcallback)
static CPU_INIT( v60 )
{
v60_state *cpustate = device->token;
v60_state *cpustate = get_safe_token(device);
base_init(device, irqcallback);
// Set cpustate->PIR (Processor ID) for NEC cpustate-> LSB is reserved to NEC,
@ -358,7 +368,7 @@ static CPU_INIT( v60 )
static CPU_INIT( v70 )
{
v60_state *cpustate = device->token;
v60_state *cpustate = get_safe_token(device);
base_init(device, irqcallback);
// Set cpustate->PIR (Processor ID) for NEC v70. LSB is reserved to NEC,
@ -372,7 +382,7 @@ static CPU_INIT( v70 )
static CPU_RESET( v60 )
{
v60_state *cpustate = device->token;
v60_state *cpustate = get_safe_token(device);
cpustate->PSW = 0x10000000;
cpustate->PC = cpustate->info.start_pc;
@ -393,7 +403,7 @@ static CPU_EXIT( v60 )
void v60_stall(const device_config *device)
{
v60_state *cpustate = device->token;
v60_state *cpustate = get_safe_token(device);
cpustate->stall_io = 1;
}
@ -450,7 +460,7 @@ static void set_irq_line(v60_state *cpustate, int irqline, int state)
static CPU_EXECUTE( v60 )
{
v60_state *cpustate = device->token;
v60_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
if (cpustate->irq_line != CLEAR_LINE)
@ -482,7 +492,7 @@ CPU_DISASSEMBLE( v70 );
static CPU_SET_INFO( v60 )
{
v60_state *cpustate = device->token;
v60_state *cpustate = get_safe_token(device);
switch (state)
{
@ -562,7 +572,7 @@ static CPU_SET_INFO( v60 )
CPU_GET_INFO( v60 )
{
v60_state *cpustate = (device != NULL) ? device->token : NULL;
v60_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

19
src/emu/cpu/v810/v810.c
View File

@ -36,6 +36,15 @@ struct _v810_state
int icount;
};
INLINE v810_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_V810);
return (v810_state *)device->token;
}
#define R0 reg[0]
#define R1 reg[1]
#define R2 reg[2]
@ -987,7 +996,7 @@ static UINT32 (*const OpCodeTable[64])(v810_state *cpustate,UINT32 op) =
static CPU_INIT( v810 )
{
v810_state *cpustate = device->token;
v810_state *cpustate = get_safe_token(device);
cpustate->irq_line = CLEAR_LINE;
cpustate->nmi_line = CLEAR_LINE;
@ -1005,7 +1014,7 @@ static CPU_INIT( v810 )
static CPU_RESET( v810 )
{
v810_state *cpustate = device->token;
v810_state *cpustate = get_safe_token(device);
int i;
for(i=0;i<64;i++) cpustate->reg[i]=0;
cpustate->PC = 0xfffffff0;
@ -1015,7 +1024,7 @@ static CPU_RESET( v810 )
static CPU_EXECUTE( v810 )
{
v810_state *cpustate = device->token;
v810_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
while(cpustate->icount>0)
@ -1042,7 +1051,7 @@ static void set_irq_line(v810_state *cpustate, int irqline, int state)
static CPU_SET_INFO( v810 )
{
v810_state *cpustate = device->token;
v810_state *cpustate = get_safe_token(device);
switch (state)
{
@ -1125,7 +1134,7 @@ static CPU_SET_INFO( v810 )
CPU_GET_INFO( v810 )
{
v810_state *cpustate = (device != NULL) ? device->token : NULL;
v810_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{

12
src/emu/cpu/x86log.c
View File

@ -42,8 +42,8 @@ struct _log_comment
/* data ranges */
typedef struct _data_range data_range;
struct _data_range
typedef struct _data_range_t data_range_t;
struct _data_range_t
{
x86code * base;
x86code * end;
@ -57,7 +57,7 @@ struct _x86log_context
astring * filename; /* name of the file */
FILE * file; /* file we are logging to */
data_range data_range[MAX_DATA_RANGES]; /* list of data ranges */
data_range_t data_range[MAX_DATA_RANGES]; /* list of data ranges */
int data_range_count; /* number of data ranges */
log_comment comment_list[MAX_COMMENTS]; /* list of comments */
@ -161,7 +161,7 @@ void x86log_add_comment(x86log_context *log, x86code *base, const char *format,
void x86log_mark_as_data(x86log_context *log, x86code *base, x86code *end, int size)
{
data_range *data;
data_range_t *data;
assert(log->data_range_count < MAX_DATA_RANGES);
assert(end >= base);
@ -191,8 +191,8 @@ void x86log_disasm_code_range(x86log_context *log, const char *label, x86code *s
{
const log_comment *lastcomment = &log->comment_list[log->comment_count];
const log_comment *curcomment = &log->comment_list[0];
const data_range *lastdata = &log->data_range[log->data_range_count];
const data_range *curdata = &log->data_range[0];
const data_range_t *lastdata = &log->data_range[log->data_range_count];
const data_range_t *curdata = &log->data_range[0];
x86code *cur = start;
/* print the optional label */

41
src/emu/cpu/z180/z180.c
View File

@ -124,6 +124,15 @@ struct _z180_state
int icount;
};
INLINE z180_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_Z180);
return (z180_state *)device->token;
}
static void set_irq_line(z180_state *cpustate, int irqline, int state);
#define CF 0x01
@ -2004,10 +2013,10 @@ static void z180_write_iolines(z180_state *cpustate, UINT32 data)
static CPU_INIT( z180 )
{
z180_state *cpustate = device->token;
z180_state *cpustate = get_safe_token(device);
cpustate->daisy = NULL;
if (device->static_config)
cpustate->daisy = z80daisy_init(device, device->static_config);
cpustate->daisy = z80daisy_init(device, (const z80_daisy_chain *)device->static_config);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -2050,7 +2059,7 @@ static CPU_INIT( z180 )
****************************************************************************/
static CPU_RESET( z180 )
{
z180_state *cpustate = device->token;
z180_state *cpustate = get_safe_token(device);
z80_daisy_state *save_daisy;
cpu_irq_callback save_irqcallback;
cpu_state_table save_table;
@ -2303,7 +2312,7 @@ static void check_interrupts(z180_state *cpustate)
****************************************************************************/
static CPU_EXECUTE( z180 )
{
z180_state *cpustate = device->token;
z180_state *cpustate = get_safe_token(device);
int old_icount = cycles;
cpustate->icount = cycles;
@ -2394,7 +2403,7 @@ again:
****************************************************************************/
static CPU_BURN( z180 )
{
z180_state *cpustate = device->token;
z180_state *cpustate = get_safe_token(device);
if( cycles > 0 )
{
/* NOP takes 3 cycles per instruction */
@ -2434,7 +2443,7 @@ static CPU_TRANSLATE( z180 )
{
if (space == ADDRESS_SPACE_PROGRAM)
{
z180_state *cpustate = device->token;
z180_state *cpustate = get_safe_token(device);
*address = MMU_REMAP_ADDR(cpustate, *address);
}
return TRUE;
@ -2447,7 +2456,7 @@ static CPU_TRANSLATE( z180 )
static CPU_IMPORT_STATE( z180 )
{
z180_state *cpustate = device->token;
z180_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -2475,7 +2484,7 @@ static CPU_IMPORT_STATE( z180 )
static CPU_EXPORT_STATE( z180 )
{
z180_state *cpustate = device->token;
z180_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -2500,7 +2509,7 @@ static CPU_EXPORT_STATE( z180 )
static CPU_SET_INFO( z180 )
{
z180_state *cpustate = device->token;
z180_state *cpustate = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -2508,12 +2517,12 @@ static CPU_SET_INFO( z180 )
case CPUINFO_INT_INPUT_STATE + Z180_INT0: set_irq_line(cpustate, Z180_INT0, info->i); break;
/* --- the following bits of info are set as pointers to data or functions --- */
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: cc[Z180_TABLE_op] = info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: cc[Z180_TABLE_cb] = info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: cc[Z180_TABLE_ed] = info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: cc[Z180_TABLE_xy] = info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: cc[Z180_TABLE_xycb] = info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: cc[Z180_TABLE_ex] = info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: cc[Z180_TABLE_op] = (const UINT8 *)info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: cc[Z180_TABLE_cb] = (const UINT8 *)info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: cc[Z180_TABLE_ed] = (const UINT8 *)info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: cc[Z180_TABLE_xy] = (const UINT8 *)info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: cc[Z180_TABLE_xycb] = (const UINT8 *)info->p; break;
case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: cc[Z180_TABLE_ex] = (const UINT8 *)info->p; break;
}
}
@ -2524,7 +2533,7 @@ static CPU_SET_INFO( z180 )
CPU_GET_INFO( z180 )
{
z180_state *cpustate = (device != NULL) ? device->token : NULL;
z180_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

4
src/emu/cpu/z180/z180ops.h
View File

@ -71,7 +71,7 @@ INLINE void z180_mmu(z180_state *cpustate)
#define RM(cs,addr) memory_read_byte_8le((cs)->program, MMU_REMAP_ADDR(cs,addr))
UINT8 z180_readmem(const device_config *device, offs_t offset)
{
z180_state *cpustate = device->token;
z180_state *cpustate = get_safe_token(device);
return RM(cpustate, offset);
}
@ -81,7 +81,7 @@ UINT8 z180_readmem(const device_config *device, offs_t offset)
#define WM(cs,addr,value) memory_write_byte_8le((cs)->program, MMU_REMAP_ADDR(cs,addr),value)
void z180_writemem(const device_config *device, offs_t offset, UINT8 data)
{
z180_state *cpustate = device->token;
z180_state *cpustate = get_safe_token(device);
WM(cpustate, offset, data);
}

39
src/emu/cpu/z80/z80.c
View File

@ -138,6 +138,15 @@ struct _z80_state
UINT8 rtemp;
};
INLINE z80_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_Z80);
return (z80_state *)device->token;
}
#define CF 0x01
#define NF 0x02
#define PF 0x04
@ -3322,7 +3331,7 @@ static void take_interrupt(z80_state *z80)
****************************************************************************/
static CPU_INIT( z80 )
{
z80_state *z80 = device->token;
z80_state *z80 = get_safe_token(device);
int i, p;
/* setup cycle tables */
@ -3444,7 +3453,7 @@ static CPU_INIT( z80 )
/* Reset registers to their initial values */
memset(z80, 0, sizeof(*z80));
if (device->static_config != NULL)
z80->daisy = z80daisy_init(device, device->static_config);
z80->daisy = z80daisy_init(device, (const z80_daisy_chain *)device->static_config);
z80->irq_callback = irqcallback;
z80->device = device;
z80->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -3463,7 +3472,7 @@ static CPU_INIT( z80 )
****************************************************************************/
static CPU_RESET( z80 )
{
z80_state *z80 = device->token;
z80_state *z80 = get_safe_token(device);
z80->PC = 0x0000;
z80->i = 0;
@ -3493,7 +3502,7 @@ static CPU_EXIT( z80 )
****************************************************************************/
static CPU_EXECUTE( z80 )
{
z80_state *z80 = device->token;
z80_state *z80 = get_safe_token(device);
z80->icount = cycles;
@ -3535,7 +3544,7 @@ static CPU_EXECUTE( z80 )
****************************************************************************/
static CPU_BURN( z80 )
{
z80_state *z80 = device->token;
z80_state *z80 = get_safe_token(device);
if( cycles > 0 )
{
@ -3577,7 +3586,7 @@ static void set_irq_line(z80_state *z80, int irqline, int state)
static CPU_IMPORT_STATE( z80 )
{
z80_state *cpustate = device->token;
z80_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -3595,7 +3604,7 @@ static CPU_IMPORT_STATE( z80 )
static CPU_EXPORT_STATE( z80 )
{
z80_state *cpustate = device->token;
z80_state *cpustate = get_safe_token(device);
switch (entry->index)
{
@ -3616,7 +3625,7 @@ static CPU_EXPORT_STATE( z80 )
static CPU_SET_INFO( z80 )
{
z80_state *z80 = device->token;
z80_state *z80 = get_safe_token(device);
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -3624,12 +3633,12 @@ static CPU_SET_INFO( z80 )
case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(z80, 0, info->i); break;
/* --- the following bits of info are set as pointers to data or functions --- */
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_op: cc[Z80_TABLE_op] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_cb: cc[Z80_TABLE_cb] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ed: cc[Z80_TABLE_ed] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_xy: cc[Z80_TABLE_xy] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_xycb: cc[Z80_TABLE_xycb] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ex: cc[Z80_TABLE_ex] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_op: cc[Z80_TABLE_op] = (const UINT8 *)info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_cb: cc[Z80_TABLE_cb] = (const UINT8 *)info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ed: cc[Z80_TABLE_ed] = (const UINT8 *)info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_xy: cc[Z80_TABLE_xy] = (const UINT8 *)info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_xycb: cc[Z80_TABLE_xycb] = (const UINT8 *)info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ex: cc[Z80_TABLE_ex] = (const UINT8 *)info->p; break;
}
}
@ -3641,7 +3650,7 @@ static CPU_SET_INFO( z80 )
CPU_GET_INFO( z80 )
{
z80_state *z80 = (device != NULL) ? device->token : NULL;
z80_state *z80 = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

2
src/emu/cpu/z80/z80daisy.c
View File

@ -29,7 +29,7 @@ z80_daisy_state *z80daisy_init(const device_config *cpudevice, const z80_daisy_c
/* create a linked list of devices */
for ( ; daisy->devname != NULL; daisy++)
{
*tailptr = auto_malloc(sizeof(**tailptr));
*tailptr = (z80_daisy_state *)auto_malloc(sizeof(**tailptr));
(*tailptr)->next = NULL;
(*tailptr)->device = devtag_get_device(cpudevice->machine, device_inherit_tag(tempstring, cpudevice->tag, daisy->devname));
if ((*tailptr)->device == NULL)

19
src/emu/cpu/z8000/z8000.c
View File

@ -86,6 +86,15 @@ struct _z8000_state
#include "z8000cpu.h"
INLINE z8000_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == CPU);
assert(cpu_get_type(device) == CPU_Z8000);
return (z8000_state *)device->token;
}
/* opcode execution table */
Z8000_exec *z8000_exec = NULL;
@ -335,7 +344,7 @@ INLINE void Interrupt(z8000_state *cpustate)
static CPU_INIT( z8000 )
{
z8000_state *cpustate = device->token;
z8000_state *cpustate = get_safe_token(device);
cpustate->irq_callback = irqcallback;
cpustate->device = device;
@ -349,7 +358,7 @@ static CPU_INIT( z8000 )
static CPU_RESET( z8000 )
{
z8000_state *cpustate = device->token;
z8000_state *cpustate = get_safe_token(device);
cpu_irq_callback save_irqcallback = cpustate->irq_callback;
memset(cpustate, 0, sizeof(*cpustate));
@ -368,7 +377,7 @@ static CPU_EXIT( z8000 )
static CPU_EXECUTE( z8000 )
{
z8000_state *cpustate = device->token;
z8000_state *cpustate = get_safe_token(device);
cpustate->icount = cycles;
@ -461,7 +470,7 @@ static void set_irq_line(z8000_state *cpustate, int irqline, int state)
static CPU_SET_INFO( z8000 )
{
z8000_state *cpustate = device->token;
z8000_state *cpustate = get_safe_token(device);
switch (state)
{
@ -507,7 +516,7 @@ static CPU_SET_INFO( z8000 )
CPU_GET_INFO( z8000 )
{
z8000_state *cpustate = (device != NULL) ? device->token : NULL;
z8000_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
switch (state)
{