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https://github.com/holub/mame
synced 2025-04-22 08:22:15 +03:00
gts80.c : WIP
This commit is contained in:
parent
eadd1b3ac6
commit
479454ad8f
@ -5,7 +5,10 @@
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ToDO:
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- Everything
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- Switches
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- Outputs
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- Mechanical sounds
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- Sound
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************************************************************************************************************/
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@ -33,6 +36,10 @@ public:
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DECLARE_WRITE8_MEMBER(port3a_w);
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DECLARE_WRITE8_MEMBER(port3b_w);
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private:
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UINT8 m_port2;
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UINT8 m_segment;
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UINT8 m_row;
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UINT8 m_kbdrow;
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virtual void machine_reset();
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required_device<cpu_device> m_maincpu;
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};
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@ -44,37 +51,256 @@ static ADDRESS_MAP_START( gts80_map, AS_PROGRAM, 8, gts80_state )
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AM_RANGE(0x0280, 0x02ff) AM_DEVREADWRITE("riot2", riot6532_device, read, write)
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AM_RANGE(0x0300, 0x037f) AM_DEVREADWRITE("riot3", riot6532_device, read, write)
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AM_RANGE(0x1000, 0x17ff) AM_ROM
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AM_RANGE(0x1800, 0x18ff) AM_RAM AM_MIRROR(0x700) // the existence of this ram isn't confirmed yet
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AM_RANGE(0x1800, 0x18ff) AM_RAM AM_SHARE("nvram") // 5101L-1 256x4
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AM_RANGE(0x2000, 0x2fff) AM_ROM
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AM_RANGE(0x3000, 0x3fff) AM_ROM
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ADDRESS_MAP_END
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static INPUT_PORTS_START( gts80 )
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PORT_START("DSW.0")
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PORT_DIPNAME( 0x80, 0x00, "SW 1")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x80, DEF_STR(On))
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PORT_DIPNAME( 0x40, 0x00, "SW 2")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x40, DEF_STR(On))
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PORT_DIPNAME( 0x20, 0x00, "SW 3")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x20, DEF_STR(On))
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PORT_DIPNAME( 0x10, 0x00, "SW 4")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x10, DEF_STR(On))
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PORT_DIPNAME( 0x08, 0x00, "SW 5")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x08, DEF_STR(On))
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PORT_DIPNAME( 0x04, 0x00, "SW 6")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x04, DEF_STR(On))
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PORT_DIPNAME( 0x02, 0x00, "SW 7")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x02, DEF_STR(On))
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PORT_DIPNAME( 0x01, 0x00, "SW 8")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x01, DEF_STR(On))
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PORT_START("DSW.1")
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PORT_DIPNAME( 0x80, 0x00, "SW 9")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x80, DEF_STR(On))
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PORT_DIPNAME( 0x40, 0x00, "SW 10")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x40, DEF_STR(On))
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PORT_DIPNAME( 0x20, 0x00, "SW 11")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x20, DEF_STR(On))
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PORT_DIPNAME( 0x10, 0x00, "SW 12")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x10, DEF_STR(On))
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PORT_DIPNAME( 0x08, 0x00, "SW 13")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x08, DEF_STR(On))
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PORT_DIPNAME( 0x04, 0x00, "SW 14")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x04, DEF_STR(On))
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PORT_DIPNAME( 0x02, 0x02, "SW 15")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x02, DEF_STR(On))
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PORT_DIPNAME( 0x01, 0x00, "SW 16")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x01, DEF_STR(On))
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PORT_START("DSW.2")
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PORT_DIPNAME( 0x80, 0x80, "SW 17")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x80, DEF_STR(On))
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PORT_DIPNAME( 0x40, 0x40, "SW 18")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x40, DEF_STR(On))
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PORT_DIPNAME( 0x20, 0x00, "SW 19")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x20, DEF_STR(On))
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PORT_DIPNAME( 0x10, 0x00, "SW 20")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x10, DEF_STR(On))
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PORT_DIPNAME( 0x08, 0x00, "SW 21")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x08, DEF_STR(On))
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PORT_DIPNAME( 0x04, 0x00, "SW 22")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x04, DEF_STR(On))
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PORT_DIPNAME( 0x02, 0x02, "SW 23")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x02, DEF_STR(On))
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PORT_DIPNAME( 0x01, 0x01, "SW 24")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x01, DEF_STR(On))
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PORT_START("DSW.3")
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PORT_DIPNAME( 0x80, 0x80, "SW 25")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x80, DEF_STR(On))
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PORT_DIPNAME( 0x40, 0x40, "SW 26")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x40, DEF_STR(On))
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PORT_DIPNAME( 0x20, 0x20, "SW 27")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x20, DEF_STR(On))
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PORT_DIPNAME( 0x10, 0x10, "SW 28")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x10, DEF_STR(On))
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PORT_DIPNAME( 0x08, 0x08, "SW 29")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x08, DEF_STR(On))
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PORT_DIPNAME( 0x04, 0x04, "SW 30")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x04, DEF_STR(On))
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PORT_DIPNAME( 0x02, 0x00, "SW 31")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x02, DEF_STR(On))
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PORT_DIPNAME( 0x01, 0x00, "SW 32")
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PORT_DIPSETTING( 0x00, DEF_STR(Off))
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PORT_DIPSETTING( 0x01, DEF_STR(On))
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PORT_START("X0")
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PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_START("X1")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_TILT )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START )
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER )
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PORT_START("X2")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_X)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_F)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_G)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_H)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_J)
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_K)
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PORT_START("X4")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Z)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_C)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_V)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_B)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M)
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_COMMA)
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PORT_START("X8")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_STOP)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_SLASH)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_COLON)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_QUOTE)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_A)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_MINUS)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_EQUALS)
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_BACKSPACE)
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PORT_START("X10")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_OPENBRACE)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_CLOSEBRACE)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_BACKSLASH)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_ENTER)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_LEFT)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_RIGHT)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_UP)
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_DOWN)
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PORT_START("X20")
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// PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q)
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// PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W)
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// PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_E)
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// PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_R)
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// PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Y)
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// PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U)
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// PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I)
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// PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_O)
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PORT_START("X40")
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// PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q)
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// PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W)
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// PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_E)
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// PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_R)
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// PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Y)
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// PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U)
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// PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I)
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// PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_O)
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PORT_START("X80")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q)
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_E)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_R)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Y)
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_U)
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_I)
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_O)
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INPUT_PORTS_END
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READ8_MEMBER( gts80_state::port1a_r )
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{
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return 0xff;
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char kbdrow[8];
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if ((m_row < 4) && (m_segment==0x80))
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{
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sprintf(kbdrow,"DSW.%d",m_row);
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return ioport(kbdrow)->read();
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}
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else
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{
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sprintf(kbdrow,"X%X",m_kbdrow);
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return ioport(kbdrow)->read() ^ 0xff; // inverted through 7404
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}
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return 0;
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}
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READ8_MEMBER( gts80_state::port2a_r )
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{
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return 0xff;
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return m_port2 | 0x80; // slam tilt off
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}
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WRITE8_MEMBER( gts80_state::port1b_w )
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{
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m_kbdrow = data & 15;//printf("%X ",data);
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}
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// schematic and pinmame say '1' is indicated by m_segment !bits 4,5,6, but it is !bit 7
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WRITE8_MEMBER( gts80_state::port2a_w )
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{
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//printf("A:%X ",data);
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m_port2 = data;
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static const UINT8 patterns[16] = { 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7c,0x07,0x7f,0x67,0x58,0x4c,0x62,0x69,0x78,0 }; // 7448
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UINT16 seg1 = (UINT16)patterns[m_segment & 15];
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UINT16 seg2 = BITSWAP16(seg1, 8, 8, 8, 8, 8, 8, 7, 7, 6, 6, 5, 4, 3, 2, 1, 0);
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switch (data & 0x70)
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{
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case 0x10: // player 1&2
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if (!BIT(m_segment, 7)) seg2 |= 0x300; // put '1' in the middle
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output_set_digit_value(data & 15, seg2);
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break;
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case 0x20: // player 3&4
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if (!BIT(m_segment, 7)) seg2 |= 0x300; // put '1' in the middle
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output_set_digit_value((data & 15)+20, seg2);
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break;
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case 0x40: // credits & balls
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if (!BIT(m_segment, 7)) m_segment = 1; // turn '1' back to normal
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output_set_digit_value((data & 15)+40, patterns[m_segment & 15]);
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break;
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}
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}
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//d0-3 bcd data; d4-6 = centre segment; d7 = dipsw enable
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WRITE8_MEMBER( gts80_state::port2b_w )
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{
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//printf("B:%X ",data);
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m_segment = data;//printf("%s:%X ",machine().describe_context(),data);
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}
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WRITE8_MEMBER( gts80_state::port3a_w )
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@ -83,6 +309,7 @@ WRITE8_MEMBER( gts80_state::port3a_w )
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WRITE8_MEMBER( gts80_state::port3b_w )
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{
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m_row = data >> 4;
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}
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void gts80_state::machine_reset()
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@ -96,14 +323,16 @@ DRIVER_INIT_MEMBER( gts80_state, gts80 )
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/* with Sound Board */
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static MACHINE_CONFIG_START( gts80_s, gts80_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M6502, 850000) // xtal frequency not shown
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MCFG_CPU_ADD("maincpu", M6502, XTAL_3_579545MHz/4)
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MCFG_CPU_PROGRAM_MAP(gts80_map)
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MCFG_NVRAM_ADD_1FILL("nvram") // must be 1
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/* Video */
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MCFG_DEFAULT_LAYOUT(layout_gts80)
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/* Devices */
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MCFG_DEVICE_ADD("riot1", RIOT6532, 850000)
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MCFG_DEVICE_ADD("riot1", RIOT6532, XTAL_3_579545MHz/4)
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MCFG_RIOT6532_IN_PA_CB(READ8(gts80_state, port1a_r)) // sw_r
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//MCFG_RIOT6532_OUT_PA_CB(WRITE8(gts80_state, port1a_w))
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//MCFG_RIOT6532_IN_PB_CB(READ8(gts80_state, port1b_r))
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@ -248,10 +248,10 @@ static const sn76477_interface sn76477_intf =
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static MACHINE_CONFIG_START( spectra, spectra_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", M6502, 3579545/4) // actually a M6503
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MCFG_CPU_ADD("maincpu", M6502, XTAL_3_579545MHz/4) // actually a M6503
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MCFG_CPU_PROGRAM_MAP(spectra_map)
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MCFG_DEVICE_ADD("riot", RIOT6532, 3579545/4)
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MCFG_DEVICE_ADD("riot", RIOT6532, XTAL_3_579545MHz/4)
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MCFG_RIOT6532_IN_PA_CB(READ8(spectra_state, porta_r))
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MCFG_RIOT6532_OUT_PA_CB(WRITE8(spectra_state, porta_w))
|
||||
MCFG_RIOT6532_IN_PB_CB(READ8(spectra_state, portb_r))
|
||||
|
@ -9,6 +9,11 @@
|
||||
<color red="0.0" green="0.75" blue="1.0" />
|
||||
</led14seg>
|
||||
</element>
|
||||
<element name="digit7" defstate="0">
|
||||
<led7seg>
|
||||
<color red="0.0" green="0.75" blue="1.0" />
|
||||
</led7seg>
|
||||
</element>
|
||||
<element name="red_led">
|
||||
<disk><color red="1.0" green="0.0" blue="0.0" /></disk>
|
||||
</element>
|
||||
@ -56,22 +61,22 @@
|
||||
</bezel>
|
||||
|
||||
<!-- Player 2 Score -->
|
||||
<bezel name="digit15" element="digit">
|
||||
<bezel name="digit11" element="digit">
|
||||
<bounds left="10" top="105" right="44" bottom="144" />
|
||||
</bezel>
|
||||
<bezel name="digit14" element="digit">
|
||||
<bezel name="digit10" element="digit">
|
||||
<bounds left="54" top="105" right="88" bottom="144" />
|
||||
</bezel>
|
||||
<bezel name="digit13" element="digit">
|
||||
<bezel name="digit9" element="digit">
|
||||
<bounds left="98" top="105" right="132" bottom="144" />
|
||||
</bezel>
|
||||
<bezel name="digit12" element="digit">
|
||||
<bezel name="digit8" element="digit">
|
||||
<bounds left="142" top="105" right="176" bottom="144" />
|
||||
</bezel>
|
||||
<bezel name="digit11" element="digit">
|
||||
<bezel name="digit7" element="digit">
|
||||
<bounds left="186" top="105" right="220" bottom="144" />
|
||||
</bezel>
|
||||
<bezel name="digit10" element="digit">
|
||||
<bezel name="digit6" element="digit">
|
||||
<bounds left="230" top="105" right="264" bottom="144" />
|
||||
</bezel>
|
||||
|
||||
@ -96,36 +101,36 @@
|
||||
</bezel>
|
||||
|
||||
<!-- Player 4 Score -->
|
||||
<bezel name="digit35" element="digit">
|
||||
<bezel name="digit31" element="digit">
|
||||
<bounds left="10" top="225" right="44" bottom="264" />
|
||||
</bezel>
|
||||
<bezel name="digit34" element="digit">
|
||||
<bezel name="digit30" element="digit">
|
||||
<bounds left="54" top="225" right="88" bottom="264" />
|
||||
</bezel>
|
||||
<bezel name="digit33" element="digit">
|
||||
<bezel name="digit29" element="digit">
|
||||
<bounds left="98" top="225" right="132" bottom="264" />
|
||||
</bezel>
|
||||
<bezel name="digit32" element="digit">
|
||||
<bezel name="digit28" element="digit">
|
||||
<bounds left="142" top="225" right="176" bottom="264" />
|
||||
</bezel>
|
||||
<bezel name="digit31" element="digit">
|
||||
<bezel name="digit27" element="digit">
|
||||
<bounds left="186" top="225" right="220" bottom="264" />
|
||||
</bezel>
|
||||
<bezel name="digit30" element="digit">
|
||||
<bezel name="digit26" element="digit">
|
||||
<bounds left="230" top="225" right="264" bottom="264" />
|
||||
</bezel>
|
||||
|
||||
<!-- Credits and Balls -->
|
||||
<bezel name="digit41" element="digit">
|
||||
<bezel name="digit41" element="digit7">
|
||||
<bounds left="30" top="345" right="64" bottom="384" />
|
||||
</bezel>
|
||||
<bezel name="digit40" element="digit">
|
||||
<bezel name="digit40" element="digit7">
|
||||
<bounds left="69" top="345" right="103" bottom="384" />
|
||||
</bezel>
|
||||
<bezel name="digit44" element="digit">
|
||||
<bezel name="digit44" element="digit7">
|
||||
<bounds left="171" top="345" right="205" bottom="384" />
|
||||
</bezel>
|
||||
<bezel name="digit43" element="digit">
|
||||
<bezel name="digit43" element="digit7">
|
||||
<bounds left="210" top="345" right="244" bottom="384" />
|
||||
</bezel>
|
||||
<bezel element="P1"><bounds left="200" right="258" top="330" bottom="342" /></bezel>
|
||||
@ -134,7 +139,5 @@
|
||||
<bezel name="text2" element="P4"><bounds left="100" right="180" top="90" bottom="102" /></bezel>
|
||||
<bezel name="text1" element="P5"><bounds left="100" right="180" top="150" bottom="162" /></bezel>
|
||||
<bezel name="text0" element="P6"><bounds left="100" right="180" top="210" bottom="222" /></bezel>
|
||||
<bezel name="led0" element="red_led">
|
||||
<bounds left="10" right="25" top="360" bottom="375" /></bezel>
|
||||
</view>
|
||||
</mamelayout>
|
||||
|
Loading…
Reference in New Issue
Block a user