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readability cleanup in opcode table

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This commit is contained in:
Michaël Banaan Ananas 2014-02-05 22:26:32 +00:00
parent 2a290bccf6
commit 49121f9998
2 changed files with 809 additions and 783 deletions
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232
src/emu/cpu/mn10200/mn10200.c
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@ -49,6 +49,7 @@ mn10200_device::mn10200_device(const machine_config &mconfig, const char *tag, d
UINT8 mn10200_device::read_arg8(UINT32 address) UINT8 mn10200_device::read_arg8(UINT32 address)
{ {
address &= 0xffffff;
if (address >= 0xfc00 && address < 0x10000) if (address >= 0xfc00 && address < 0x10000)
{ {
return mn10200_r(address-0xfc00, MEM_BYTE); return mn10200_r(address-0xfc00, MEM_BYTE);
@ -59,6 +60,7 @@ UINT8 mn10200_device::read_arg8(UINT32 address)
UINT16 mn10200_device::read_arg16(UINT32 address) UINT16 mn10200_device::read_arg16(UINT32 address)
{ {
address &= 0xffffff;
if (address >= 0xfc00 && address < 0x10000) if (address >= 0xfc00 && address < 0x10000)
{ {
return mn10200_r(address-0xfc00, MEM_WORD); return mn10200_r(address-0xfc00, MEM_WORD);
@ -74,6 +76,7 @@ UINT16 mn10200_device::read_arg16(UINT32 address)
void mn10200_device::write_mem8(UINT32 address, UINT8 data) void mn10200_device::write_mem8(UINT32 address, UINT8 data)
{ {
address &= 0xffffff;
if (address >= 0xfc00 && address < 0x10000) if (address >= 0xfc00 && address < 0x10000)
{ {
mn10200_w(address-0xfc00, data, MEM_BYTE); mn10200_w(address-0xfc00, data, MEM_BYTE);
@ -85,6 +88,7 @@ void mn10200_device::write_mem8(UINT32 address, UINT8 data)
void mn10200_device::write_mem16(UINT32 address, UINT16 data) void mn10200_device::write_mem16(UINT32 address, UINT16 data)
{ {
address &= 0xffffff;
if (address >= 0xfc00 && address < 0x10000) if (address >= 0xfc00 && address < 0x10000)
{ {
mn10200_w(address-0xfc00, data, MEM_WORD); mn10200_w(address-0xfc00, data, MEM_WORD);
@ -101,23 +105,26 @@ void mn10200_device::write_mem16(UINT32 address, UINT16 data)
m_program->write_word(address, data); m_program->write_word(address, data);
} }
INT32 mn10200_device::read_arg24(offs_t adr) UINT32 mn10200_device::read_arg24(UINT32 address)
{ {
return read_arg16(adr)|(read_arg8(adr+2)<<16); address &= 0xffffff;
return read_arg16(address)|(read_arg8(address+2)<<16);
} }
void mn10200_device::write_mem24(offs_t adr, UINT32 val) void mn10200_device::write_mem24(UINT32 address, UINT32 data)
{ {
address &= 0xffffff;
/* if(adr == 0x4075aa || adr == 0x40689a || adr == 0x4075a2) { /* if(adr == 0x4075aa || adr == 0x40689a || adr == 0x4075a2) {
log_write("TRACE", adr, val, MEM_LONG); log_write("TRACE", adr, val, MEM_LONG);
}*/ }*/
write_mem8(adr, val); write_mem8(address, data);
write_mem8(adr+1, val>>8); write_mem8(address+1, data>>8);
write_mem8(adr+2, val>>16); write_mem8(address+2, data>>16);
} }
UINT8 mn10200_device::read_mem8(UINT32 address) UINT8 mn10200_device::read_mem8(UINT32 address)
{ {
address &= 0xffffff;
if (address >= 0xfc00 && address < 0x10000) if (address >= 0xfc00 && address < 0x10000)
{ {
return mn10200_r(address-0xfc00, MEM_BYTE); return mn10200_r(address-0xfc00, MEM_BYTE);
@ -128,6 +135,7 @@ UINT8 mn10200_device::read_mem8(UINT32 address)
UINT16 mn10200_device::read_mem16(UINT32 address) UINT16 mn10200_device::read_mem16(UINT32 address)
{ {
address &= 0xffffff;
if (address >= 0xfc00 && address < 0x10000) if (address >= 0xfc00 && address < 0x10000)
{ {
return mn10200_r(address-0xfc00, MEM_WORD); return mn10200_r(address-0xfc00, MEM_WORD);
@ -141,9 +149,10 @@ UINT16 mn10200_device::read_mem16(UINT32 address)
return m_program->read_word(address); return m_program->read_word(address);
} }
INT32 mn10200_device::read_mem24(offs_t adr) UINT32 mn10200_device::read_mem24(UINT32 address)
{ {
return read_mem16(adr)|(read_mem8(adr+2)<<16); address &= 0xffffff;
return read_mem16(address)|(read_mem8(address+2)<<16);
} }
void mn10200_device::mn102_change_pc(UINT32 pc) void mn10200_device::mn102_change_pc(UINT32 pc)
@ -466,7 +475,7 @@ void mn10200_device::device_reset()
memset(m_d, 0, sizeof(m_d)); memset(m_d, 0, sizeof(m_d));
memset(m_a, 0, sizeof(m_a)); memset(m_a, 0, sizeof(m_a));
m_pc = 0x80000; mn102_change_pc(0x80000);
m_psw = 0; m_psw = 0;
m_nmicr = 0; m_nmicr = 0;
memset(m_icrl, 0, sizeof(m_icrl)); memset(m_icrl, 0, sizeof(m_icrl));
@ -515,7 +524,8 @@ UINT32 mn10200_device::do_add(UINT32 a, UINT32 b, UINT32 c)
m_psw |= FLAG_NF; m_psw |= FLAG_NF;
if ((r & 0x0000ffff) == 0) if ((r & 0x0000ffff) == 0)
m_psw |= FLAG_ZF; m_psw |= FLAG_ZF;
return r & 0xffffff;
return r;
} }
UINT32 mn10200_device::do_sub(UINT32 a, UINT32 b, UINT32 c) UINT32 mn10200_device::do_sub(UINT32 a, UINT32 b, UINT32 c)
@ -539,7 +549,8 @@ UINT32 mn10200_device::do_sub(UINT32 a, UINT32 b, UINT32 c)
m_psw |= FLAG_NF; m_psw |= FLAG_NF;
if ((r & 0x0000ffff) == 0) if ((r & 0x0000ffff) == 0)
m_psw |= FLAG_ZF; m_psw |= FLAG_ZF;
return r & 0xffffff;
return r;
} }
void mn10200_device::test_nz16(UINT16 v) void mn10200_device::test_nz16(UINT16 v)
@ -553,7 +564,7 @@ void mn10200_device::test_nz16(UINT16 v)
void mn10200_device::do_jsr(UINT32 to, UINT32 ret) void mn10200_device::do_jsr(UINT32 to, UINT32 ret)
{ {
mn102_change_pc(to & 0xffffff); mn102_change_pc(to);
m_a[3] -= 4; m_a[3] -= 4;
write_mem24(m_a[3], ret); write_mem24(m_a[3], ret);
} }
@ -592,12 +603,13 @@ void mn10200_device::execute_run()
debugger_instruction_hook(this, m_pc); debugger_instruction_hook(this, m_pc);
opcode = read_arg8(m_pc); opcode = read_arg8(m_pc);
switch(opcode) { switch (opcode)
{
// mov dm, (an) // mov dm, (an)
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
m_cycles -= 1; m_cycles -= 1;
write_mem16(m_a[(opcode>>2)&3], (UINT16)m_d[opcode & 3]); write_mem16(m_a[opcode >> 2 & 3], (UINT16)m_d[opcode & 3]);
m_pc += 1; m_pc += 1;
break; break;
@ -605,7 +617,7 @@ void mn10200_device::execute_run()
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
m_cycles -= 1; m_cycles -= 1;
write_mem8(m_a[(opcode>>2)&3], (UINT8)m_d[opcode & 3]); // note: typo in manual write_mem8(m_a[opcode >> 2 & 3], (UINT8)m_d[opcode & 3]); // note: typo in manual
m_pc += 1; m_pc += 1;
break; break;
@ -613,7 +625,7 @@ void mn10200_device::execute_run()
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
m_cycles -= 1; m_cycles -= 1;
m_d[opcode & 3] = (INT16)read_mem16(m_a[(opcode>>2)&3]); m_d[opcode & 3] = (INT16)read_mem16(m_a[opcode >> 2 & 3]);
m_pc += 1; m_pc += 1;
break; break;
@ -621,7 +633,7 @@ void mn10200_device::execute_run()
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
m_cycles -= 1; m_cycles -= 1;
m_d[opcode & 3] = read_mem8(m_a[(opcode>>2)&3]); m_d[opcode & 3] = read_mem8(m_a[opcode >> 2 & 3]);
m_pc += 1; m_pc += 1;
break; break;
@ -629,7 +641,7 @@ void mn10200_device::execute_run()
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
m_cycles -= 1; m_cycles -= 1;
write_mem16((m_a[(opcode>>2)&3]+(INT8)read_arg8(m_pc+1)) & 0xffffff, (UINT16)m_d[opcode & 3]); write_mem16((m_a[opcode >> 2 & 3] + (INT8)read_arg8(m_pc + 1)), m_d[opcode & 3]);
m_pc += 2; m_pc += 2;
break; break;
@ -637,7 +649,7 @@ void mn10200_device::execute_run()
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57: case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f: case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
m_cycles -= 2; m_cycles -= 2;
write_mem24((m_a[(opcode>>2)&3]+(INT8)read_arg8(m_pc+1)) & 0xffffff, m_a[opcode & 3]); write_mem24((m_a[opcode >> 2 & 3] + (INT8)read_arg8(m_pc + 1)), m_a[opcode & 3]);
m_pc += 2; m_pc += 2;
break; break;
@ -645,7 +657,7 @@ void mn10200_device::execute_run()
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67: case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f: case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
m_cycles -= 1; m_cycles -= 1;
m_d[opcode & 3] = (INT16)read_mem16((m_a[(opcode>>2) & 3] + (INT8)read_arg8(m_pc+1)) & 0xffffff); m_d[opcode & 3] = (INT16)read_mem16(m_a[opcode >> 2 & 3] + (INT8)read_arg8(m_pc + 1));
m_pc += 2; m_pc += 2;
break; break;
@ -653,7 +665,7 @@ void mn10200_device::execute_run()
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77: case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
m_cycles -= 2; m_cycles -= 2;
m_a[opcode & 3] = read_mem24((m_a[(opcode>>2) & 3] + (INT8)read_arg8(m_pc+1)) & 0xffffff); m_a[opcode & 3] = read_mem24(m_a[opcode >> 2 & 3] + (INT8)read_arg8(m_pc + 1));
m_pc += 2; m_pc += 2;
break; break;
@ -661,7 +673,7 @@ void mn10200_device::execute_run()
case 0x81: case 0x82: case 0x83: case 0x84: case 0x86: case 0x87: case 0x81: case 0x82: case 0x83: case 0x84: case 0x86: case 0x87:
case 0x88: case 0x89: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x88: case 0x89: case 0x8b: case 0x8c: case 0x8d: case 0x8e:
m_cycles -= 1; m_cycles -= 1;
m_d[opcode & 3] = m_d[(opcode>>2) & 3]; m_d[opcode & 3] = m_d[opcode >> 2 & 3];
m_pc += 1; m_pc += 1;
break; break;
@ -676,7 +688,7 @@ void mn10200_device::execute_run()
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97: case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f: case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f:
m_cycles -= 1; m_cycles -= 1;
m_d[opcode & 3] = do_add(m_d[opcode & 3], m_d[(opcode >> 2) & 3], 0); m_d[opcode & 3] = do_add(m_d[opcode & 3], m_d[opcode >> 2 & 3], 0);
m_pc += 1; m_pc += 1;
break; break;
@ -684,14 +696,14 @@ void mn10200_device::execute_run()
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7: case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf: case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
m_cycles -= 1; m_cycles -= 1;
m_d[opcode & 3] = do_sub(m_d[opcode & 3], m_d[(opcode >> 2) & 3], 0); m_d[opcode & 3] = do_sub(m_d[opcode & 3], m_d[opcode >> 2 & 3], 0);
m_pc += 1; m_pc += 1;
break; break;
// extx dn // extx dn
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb0: case 0xb1: case 0xb2: case 0xb3:
m_cycles -= 1; m_cycles -= 1;
m_d[opcode & 3] = (INT16)m_d[opcode & 3] & 0xffffff; m_d[opcode & 3] = (INT16)m_d[opcode & 3];
m_pc += 1; m_pc += 1;
break; break;
@ -705,7 +717,7 @@ void mn10200_device::execute_run()
// extxb dn // extxb dn
case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xb8: case 0xb9: case 0xba: case 0xbb:
m_cycles -= 1; m_cycles -= 1;
m_d[opcode & 3] = (INT8)m_d[opcode & 3] & 0xffffff; m_d[opcode & 3] = (INT8)m_d[opcode & 3];
m_pc += 1; m_pc += 1;
break; break;
@ -719,14 +731,14 @@ void mn10200_device::execute_run()
// mov dn, (imm16) // mov dn, (imm16)
case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc0: case 0xc1: case 0xc2: case 0xc3:
m_cycles -= 1; m_cycles -= 1;
write_mem16(read_arg16(m_pc+1), (UINT16)m_d[opcode & 3]); write_mem16(read_arg16(m_pc + 1), m_d[opcode & 3]);
m_pc += 3; m_pc += 3;
break; break;
// movb dn, (imm16) // movb dn, (imm16)
case 0xc4: case 0xc5: case 0xc6: case 0xc7: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
m_cycles -= 1; m_cycles -= 1;
write_mem8(read_arg16(m_pc+1), (UINT8)m_d[opcode & 3]); write_mem8(read_arg16(m_pc + 1), m_d[opcode & 3]);
m_pc += 3; m_pc += 3;
break; break;
@ -936,37 +948,40 @@ void mn10200_device::execute_run()
// extended code f0 (2 bytes) // extended code f0 (2 bytes)
case 0xf0: case 0xf0:
opcode = read_arg8(m_pc + 1); opcode = read_arg8(m_pc + 1);
switch(opcode) { switch (opcode)
{
// jmp (an) // jmp (an)
case 0x00: case 0x04: case 0x08: case 0x0c: case 0x00: case 0x04: case 0x08: case 0x0c:
m_cycles -= 3; m_cycles -= 3;
mn102_change_pc(m_a[(opcode>>2) & 3]); mn102_change_pc(m_a[opcode >> 2 & 3]);
break; break;
// jsr (an) // jsr (an)
case 0x01: case 0x05: case 0x09: case 0x0d: case 0x01: case 0x05: case 0x09: case 0x0d:
m_cycles -= 5; m_cycles -= 5;
do_jsr(m_a[(opcode>>2) & 3], m_pc+2); do_jsr(m_a[opcode >> 2 & 3], m_pc + 2);
break; break;
// bset dm, (an) // bset dm, (an)
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: { case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
{
m_cycles -= 5; m_cycles -= 5;
UINT8 v = read_mem8(m_a[(opcode>>2) & 3]); UINT8 v = read_mem8(m_a[opcode >> 2 & 3]);
test_nz16(v & m_d[opcode & 3]); test_nz16(v & m_d[opcode & 3]);
write_mem8(m_a[(opcode>>2) & 3], v | m_d[opcode & 3]); write_mem8(m_a[opcode >> 2 & 3], v | m_d[opcode & 3]);
m_pc += 2; m_pc += 2;
break; break;
} }
// bclr dm, (an) // bclr dm, (an)
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: { case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
{
m_cycles -= 5; m_cycles -= 5;
UINT8 v = read_mem8(m_a[(opcode>>2) & 3]); UINT8 v = read_mem8(m_a[opcode >> 2 & 3]);
test_nz16(v & m_d[opcode & 3]); test_nz16(v & m_d[opcode & 3]);
write_mem8(m_a[(opcode>>2) & 3], v & ~m_d[opcode & 3]); write_mem8(m_a[opcode >> 2 & 3], v & ~m_d[opcode & 3]);
m_pc += 2; m_pc += 2;
break; break;
} }
@ -981,7 +996,7 @@ void mn10200_device::execute_run()
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77: case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = (INT8)read_mem8((m_a[(opcode>>2) & 3] + m_d[(opcode>>4) & 3]) & 0xffffff); m_d[opcode & 3] = (INT8)read_mem8(m_a[opcode >> 2 & 3] + m_d[opcode >> 4 & 3]);
m_pc += 2; m_pc += 2;
break; break;
@ -995,7 +1010,7 @@ void mn10200_device::execute_run()
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7: case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf: case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = read_mem8((m_a[(opcode>>2) & 3] + m_d[(opcode>>4) & 3]) & 0xffffff); m_d[opcode & 3] = read_mem8(m_a[opcode >> 2 & 3] + m_d[opcode >> 4 & 3]);
m_pc += 2; m_pc += 2;
break; break;
@ -1009,7 +1024,7 @@ void mn10200_device::execute_run()
case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7:
case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff:
m_cycles -= 2; m_cycles -= 2;
write_mem8((m_a[(opcode>>2) & 3] + m_d[(opcode>>4) & 3]) & 0xffffff, m_d[opcode & 3]); write_mem8(m_a[opcode >> 2 & 3] + m_d[opcode >> 4 & 3], m_d[opcode & 3]);
m_pc += 2; m_pc += 2;
break; break;
@ -1022,32 +1037,33 @@ void mn10200_device::execute_run()
// extended code f1 (2 bytes) // extended code f1 (2 bytes)
case 0xf1: case 0xf1:
opcode = read_arg8(m_pc + 1); opcode = read_arg8(m_pc + 1);
switch(opcode>>6) { switch (opcode >> 6)
{
// mov (di, an), am // mov (di, an), am
case 0: case 0:
m_cycles -= 3; m_cycles -= 3;
m_a[opcode & 3] = read_mem24((m_a[(opcode>>2) & 3] + m_d[(opcode>>4) & 3]) & 0xffffff); m_a[opcode & 3] = read_mem24(m_a[opcode >> 2 & 3] + m_d[opcode >> 4 & 3]);
m_pc += 2; m_pc += 2;
break; break;
// mov (di, an), dm // mov (di, an), dm
case 1: case 1:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = (INT16)read_mem16((m_a[(opcode>>2) & 3] + m_d[(opcode>>4) & 3]) & 0xffffff); m_d[opcode & 3] = (INT16)read_mem16(m_a[opcode >> 2 & 3] + m_d[opcode >> 4 & 3]);
m_pc += 2; m_pc += 2;
break; break;
// mov am, (di, an) // mov am, (di, an)
case 2: case 2:
m_cycles -= 3; m_cycles -= 3;
write_mem24((m_a[(opcode>>2) & 3] + m_d[(opcode>>4) & 3]) & 0xffffff, m_a[opcode & 3]); write_mem24(m_a[opcode >> 2 & 3] + m_d[opcode >> 4 & 3], m_a[opcode & 3]);
m_pc += 2; m_pc += 2;
break; break;
// mov dm, (di, an) // mov dm, (di, an)
case 3: case 3:
m_cycles -= 2; m_cycles -= 2;
write_mem16((m_a[(opcode>>2) & 3] + m_d[(opcode>>4) & 3]) & 0xffffff, m_d[opcode & 3]); write_mem16(m_a[opcode >> 2 & 3] + m_d[opcode >> 4 & 3], m_d[opcode & 3]);
m_pc += 2; m_pc += 2;
break; break;
} }
@ -1056,102 +1072,103 @@ void mn10200_device::execute_run()
// extended code f2 (2 bytes) // extended code f2 (2 bytes)
case 0xf2: case 0xf2:
opcode = read_arg8(m_pc + 1); opcode = read_arg8(m_pc + 1);
switch(opcode>>4) { switch (opcode >> 4)
{
// add dm, an // add dm, an
case 0x0: case 0x0:
m_cycles -= 2; m_cycles -= 2;
m_a[opcode & 3] = do_add(m_a[opcode & 3], m_d[(opcode>>2) & 3], 0); m_a[opcode & 3] = do_add(m_a[opcode & 3], m_d[opcode >> 2 & 3], 0);
m_pc += 2; m_pc += 2;
break; break;
// sub dm, an // sub dm, an
case 0x1: case 0x1:
m_cycles -= 2; m_cycles -= 2;
m_a[opcode & 3] = do_sub(m_a[opcode & 3], m_d[(opcode>>2) & 3], 0); m_a[opcode & 3] = do_sub(m_a[opcode & 3], m_d[opcode >> 2 & 3], 0);
m_pc += 2; m_pc += 2;
break; break;
// cmp dm, an // cmp dm, an
case 0x2: case 0x2:
m_cycles -= 2; m_cycles -= 2;
do_sub(m_a[opcode & 3], m_d[(opcode>>2) & 3], 0); do_sub(m_a[opcode & 3], m_d[opcode >> 2 & 3], 0);
m_pc += 2; m_pc += 2;
break; break;
// mov am, dn // mov am, dn
case 0x3: case 0x3:
m_cycles -= 2; m_cycles -= 2;
m_a[opcode & 3] = m_d[(opcode>>2) & 3]; m_a[opcode & 3] = m_d[opcode >> 2 & 3];
m_pc += 2; m_pc += 2;
break; break;
// add am, an // add am, an
case 0x4: case 0x4:
m_cycles -= 2; m_cycles -= 2;
m_a[opcode & 3] = do_add(m_a[opcode & 3], m_a[(opcode>>2) & 3], 0); m_a[opcode & 3] = do_add(m_a[opcode & 3], m_a[opcode >> 2 & 3], 0);
m_pc += 2; m_pc += 2;
break; break;
// sub am, an // sub am, an
case 0x5: case 0x5:
m_cycles -= 2; m_cycles -= 2;
m_a[opcode & 3] = do_sub(m_a[opcode & 3], m_a[(opcode>>2) & 3], 0); m_a[opcode & 3] = do_sub(m_a[opcode & 3], m_a[opcode >> 2 & 3], 0);
m_pc += 2; m_pc += 2;
break; break;
// cmp am, an // cmp am, an
case 0x6: case 0x6:
m_cycles -= 2; m_cycles -= 2;
do_sub(m_a[opcode & 3], m_a[(opcode>>2) & 3], 0); do_sub(m_a[opcode & 3], m_a[opcode >> 2 & 3], 0);
m_pc += 2; m_pc += 2;
break; break;
// mov am, an // mov am, an
case 0x7: case 0x7:
m_cycles -= 2; m_cycles -= 2;
m_a[opcode & 3] = m_a[(opcode>>2) & 3]; m_a[opcode & 3] = m_a[opcode >> 2 & 3];
m_pc += 2; m_pc += 2;
break; break;
// addc dm, dn // addc dm, dn
case 0x8: case 0x8:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = do_add(m_d[opcode & 3], m_d[(opcode>>2) & 3], (m_psw & FLAG_CF) ? 1 : 0); m_d[opcode & 3] = do_add(m_d[opcode & 3], m_d[opcode >> 2 & 3], (m_psw & FLAG_CF) ? 1 : 0);
m_pc += 2; m_pc += 2;
break; break;
// subc dm, dn // subc dm, dn
case 0x9: case 0x9:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = do_sub(m_d[opcode & 3], m_d[(opcode>>2) & 3], (m_psw & FLAG_CF) ? 1 : 0); m_d[opcode & 3] = do_sub(m_d[opcode & 3], m_d[opcode >> 2 & 3], (m_psw & FLAG_CF) ? 1 : 0);
m_pc += 2; m_pc += 2;
break; break;
// add am, dn // add am, dn
case 0xc: case 0xc:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = do_add(m_d[opcode & 3], m_a[(opcode>>2) & 3], 0); m_d[opcode & 3] = do_add(m_d[opcode & 3], m_a[opcode >> 2 & 3], 0);
m_pc += 2; m_pc += 2;
break; break;
// sub am, dn // sub am, dn
case 0xd: case 0xd:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = do_sub(m_d[opcode & 3], m_a[(opcode>>2) & 3], 0); m_d[opcode & 3] = do_sub(m_d[opcode & 3], m_a[opcode >> 2 & 3], 0);
m_pc += 2; m_pc += 2;
break; break;
// cmp am, dn // cmp am, dn
case 0xe: case 0xe:
m_cycles -= 2; m_cycles -= 2;
do_sub(m_d[opcode & 3], m_a[(opcode>>2) & 3], 0); do_sub(m_d[opcode & 3], m_a[opcode >> 2 & 3], 0);
m_pc += 2; m_pc += 2;
break; break;
// mov an, dm // mov an, dm
case 0xf: case 0xf:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = m_a[(opcode>>2) & 3]; m_d[opcode & 3] = m_a[opcode >> 2 & 3];
m_pc += 2; m_pc += 2;
break; break;
@ -1164,12 +1181,13 @@ void mn10200_device::execute_run()
// extended code f3 (2 bytes) // extended code f3 (2 bytes)
case 0xf3: case 0xf3:
opcode = read_arg8(m_pc + 1); opcode = read_arg8(m_pc + 1);
switch(opcode) { switch (opcode)
{
// and dm, dn // and dm, dn
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
m_cycles -= 2; m_cycles -= 2;
test_nz16(m_d[opcode & 3] &= 0xff0000|m_d[(opcode>>2) & 3]); test_nz16(m_d[opcode & 3] &= 0xff0000 | m_d[opcode >> 2 & 3]);
m_pc += 2; m_pc += 2;
break; break;
@ -1177,7 +1195,7 @@ void mn10200_device::execute_run()
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
m_cycles -= 2; m_cycles -= 2;
test_nz16(m_d[opcode & 3] |= 0x00ffff&m_d[(opcode>>2) & 3]); test_nz16(m_d[opcode & 3] |= 0x00ffff & m_d[opcode >> 2 & 3]);
m_pc += 2; m_pc += 2;
break; break;
@ -1185,12 +1203,13 @@ void mn10200_device::execute_run()
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
m_cycles -= 2; m_cycles -= 2;
test_nz16(m_d[opcode & 3] ^= 0x00ffff&m_d[(opcode>>2) & 3]); test_nz16(m_d[opcode & 3] ^= 0x00ffff & m_d[opcode >> 2 & 3]);
m_pc += 2; m_pc += 2;
break; break;
// rol dn // rol dn
case 0x30: case 0x31: case 0x32: case 0x33: { case 0x30: case 0x31: case 0x32: case 0x33:
{
UINT32 d = m_d[opcode & 3]; UINT32 d = m_d[opcode & 3];
m_cycles -= 2; m_cycles -= 2;
test_nz16(m_d[opcode & 3] = (d & 0xff0000) | ((d << 1) & 0x00fffe) | ((m_psw & FLAG_CF) ? 1 : 0)); test_nz16(m_d[opcode & 3] = (d & 0xff0000) | ((d << 1) & 0x00fffe) | ((m_psw & FLAG_CF) ? 1 : 0));
@ -1201,7 +1220,8 @@ void mn10200_device::execute_run()
} }
// ror dn // ror dn
case 0x34: case 0x35: case 0x36: case 0x37: { case 0x34: case 0x35: case 0x36: case 0x37:
{
UINT32 d = m_d[opcode & 3]; UINT32 d = m_d[opcode & 3];
m_cycles -= 2; m_cycles -= 2;
test_nz16(m_d[opcode & 3] = (d & 0xff0000) | ((d >> 1) & 0x007fff) | ((m_psw & FLAG_CF) ? 0x8000 : 0)); test_nz16(m_d[opcode & 3] = (d & 0xff0000) | ((d >> 1) & 0x007fff) | ((m_psw & FLAG_CF) ? 0x8000 : 0));
@ -1212,7 +1232,8 @@ void mn10200_device::execute_run()
} }
// asr dn // asr dn
case 0x38: case 0x39: case 0x3a: case 0x3b: { case 0x38: case 0x39: case 0x3a: case 0x3b:
{
UINT32 d = m_d[opcode & 3]; UINT32 d = m_d[opcode & 3];
m_cycles -= 2; m_cycles -= 2;
test_nz16(m_d[opcode & 3] = (d & 0xff8000) | ((d >> 1) & 0x007fff)); test_nz16(m_d[opcode & 3] = (d & 0xff8000) | ((d >> 1) & 0x007fff));
@ -1223,7 +1244,8 @@ void mn10200_device::execute_run()
} }
// lsr dn // lsr dn
case 0x3c: case 0x3d: case 0x3e: case 0x3f: { case 0x3c: case 0x3d: case 0x3e: case 0x3f:
{
UINT32 d = m_d[opcode & 3]; UINT32 d = m_d[opcode & 3];
m_cycles -= 2; m_cycles -= 2;
test_nz16(m_d[opcode & 3] = (d & 0xff0000) | ((d >> 1) & 0x007fff)); test_nz16(m_d[opcode & 3] = (d & 0xff0000) | ((d >> 1) & 0x007fff));
@ -1235,15 +1257,15 @@ void mn10200_device::execute_run()
// mul dn, dm // mul dn, dm
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47: case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f: { case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
UINT32 res; {
m_cycles -= 12; m_cycles -= 12;
res = ((INT16)m_d[opcode & 3])*((INT16)m_d[(opcode>>2) & 3]); UINT32 res = ((INT16)m_d[opcode & 3]) * ((INT16)m_d[opcode >> 2 & 3]);
m_d[opcode & 3] = res & 0xffffff; m_d[opcode & 3] = res & 0xffffff;
m_psw &= 0xff00; // f4 is undefined m_psw &= 0xff00; // f4 is undefined
if (res & 0x80000000) if (res & 0x80000000)
m_psw |= FLAG_NF; m_psw |= FLAG_NF;
if(!res) else if (res == 0)
m_psw |= FLAG_ZF; m_psw |= FLAG_ZF;
m_mdr = res >> 16; m_mdr = res >> 16;
m_pc += 2; m_pc += 2;
@ -1252,15 +1274,15 @@ void mn10200_device::execute_run()
// mulu dn, dm // mulu dn, dm
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57: case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f: { case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
UINT32 res; {
m_cycles -= 12; m_cycles -= 12;
res = ((UINT16)m_d[opcode & 3])*((UINT16)m_d[(opcode>>2) & 3]); UINT32 res = ((UINT16)m_d[opcode & 3]) * ((UINT16)m_d[opcode >> 2 & 3]);
m_d[opcode & 3] = res & 0xffffff; m_d[opcode & 3] = res & 0xffffff;
m_psw &= 0xff00; // f4 is undefined m_psw &= 0xff00; // f4 is undefined
if (res & 0x80000000) if (res & 0x80000000)
m_psw |= FLAG_NF; m_psw |= FLAG_NF;
if(!res) else if (res == 0)
m_psw |= FLAG_ZF; m_psw |= FLAG_ZF;
m_mdr = res >> 16; m_mdr = res >> 16;
m_pc += 2; m_pc += 2;
@ -1269,15 +1291,16 @@ void mn10200_device::execute_run()
// divu dn, dm // divu dn, dm
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67: case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f: { case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
{
UINT32 n, d, q, r; UINT32 n, d, q, r;
m_cycles -= 13; m_cycles -= 13;
m_pc += 2; m_pc += 2;
m_psw &= 0xff00; // f7 may be undefined m_psw &= 0xff00; // f7 may be undefined
n = (m_mdr << 16) | (UINT16)m_d[opcode & 3]; n = (m_mdr << 16) | (UINT16)m_d[opcode & 3];
d = (UINT16)m_d[(opcode>>2) & 3]; d = (UINT16)m_d[opcode >> 2 & 3];
if(!d) if (d == 0)
{ {
// divide by 0 // divide by 0
m_psw |= FLAG_VF; m_psw |= FLAG_VF;
@ -1293,7 +1316,7 @@ void mn10200_device::execute_run()
} }
m_d[opcode & 3] = q; m_d[opcode & 3] = q;
m_mdr = r; m_mdr = r;
if(!q) if (q == 0)
m_psw |= FLAG_ZF | FLAG_ZX; m_psw |= FLAG_ZF | FLAG_ZX;
if (q & 0x8000) if (q & 0x8000)
m_psw |= FLAG_NF; m_psw |= FLAG_NF;
@ -1304,28 +1327,28 @@ void mn10200_device::execute_run()
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97: case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f: case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f:
m_cycles -= 2; m_cycles -= 2;
do_sub(m_d[opcode & 3], m_d[(opcode>>2) & 3], 0); do_sub(m_d[opcode & 3], m_d[opcode >> 2 & 3], 0);
m_pc += 2; m_pc += 2;
break; break;
// mov mdr, dn // mov mdr, dn
case 0xc0: case 0xc4: case 0xc8: case 0xcc: case 0xc0: case 0xc4: case 0xc8: case 0xcc:
m_cycles -= 2; m_cycles -= 2;
m_mdr = m_d[(opcode>>2) & 3]; m_mdr = m_d[opcode >> 2 & 3];
m_pc += 2; m_pc += 2;
break; break;
// ext dn // ext dn
case 0xc1: case 0xc5: case 0xc9: case 0xcd: case 0xc1: case 0xc5: case 0xc9: case 0xcd:
m_cycles -= 3; m_cycles -= 3;
m_mdr = m_d[(opcode>>2) & 3] & 0x8000 ? 0xffff : 0x0000; m_mdr = m_d[opcode >> 2 & 3] & 0x8000 ? 0xffff : 0x0000;
m_pc += 2; m_pc += 2;
break; break;
// mov dn, psw // mov dn, psw
case 0xd0: case 0xd4: case 0xd8: case 0xdc: case 0xd0: case 0xd4: case 0xd8: case 0xdc:
m_cycles -= 3; m_cycles -= 3;
m_psw = m_d[(opcode>>2) & 3]; m_psw = m_d[opcode >> 2 & 3];
m_pc += 2; m_pc += 2;
break; break;
@ -1359,12 +1382,13 @@ void mn10200_device::execute_run()
// extended code f4 (5 bytes) // extended code f4 (5 bytes)
case 0xf4: case 0xf4:
opcode = read_arg8(m_pc + 1); opcode = read_arg8(m_pc + 1);
switch(opcode) { switch (opcode)
{
// mov dm, (abs24, an) // mov dm, (abs24, an)
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
m_cycles -= 3; m_cycles -= 3;
write_mem16((read_arg24(m_pc+2) + m_a[(opcode>>2) & 3]) & 0xffffff, m_d[opcode & 3]); write_mem16(read_arg24(m_pc + 2) + m_a[opcode >> 2 & 3], m_d[opcode & 3]);
m_pc += 5; m_pc += 5;
break; break;
@ -1372,7 +1396,7 @@ void mn10200_device::execute_run()
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
m_cycles -= 4; m_cycles -= 4;
write_mem24((read_arg24(m_pc+2) + m_a[(opcode>>2) & 3]) & 0xffffff, m_a[opcode & 3]); write_mem24(read_arg24(m_pc + 2) + m_a[opcode >> 2 & 3], m_a[opcode & 3]);
m_pc += 5; m_pc += 5;
break; break;
@ -1380,7 +1404,7 @@ void mn10200_device::execute_run()
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
m_cycles -= 3; m_cycles -= 3;
write_mem8((read_arg24(m_pc+2) + m_a[(opcode>>2) & 3]) & 0xffffff, m_d[opcode & 3]); write_mem8(read_arg24(m_pc + 2) + m_a[opcode >> 2 & 3], m_d[opcode & 3]);
m_pc += 5; m_pc += 5;
break; break;
@ -1388,7 +1412,7 @@ void mn10200_device::execute_run()
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
m_cycles -= 4; m_cycles -= 4;
write_mem24((read_arg24(m_pc+2) + m_a[(opcode>>2) & 3]) & 0xffffff, m_d[opcode & 3]); write_mem24(read_arg24(m_pc + 2) + m_a[opcode >> 2 & 3], m_d[opcode & 3]);
m_pc += 5; m_pc += 5;
break; break;
@ -1473,7 +1497,7 @@ void mn10200_device::execute_run()
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87: case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f: case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
m_cycles -= 3; m_cycles -= 3;
m_d[opcode & 3] = (INT16)read_mem16((m_a[(opcode>>2) & 3] + read_arg24(m_pc+2)) & 0xffffff); m_d[opcode & 3] = (INT16)read_mem16(m_a[opcode >> 2 & 3] + read_arg24(m_pc + 2));
m_pc += 5; m_pc += 5;
break; break;
@ -1481,7 +1505,7 @@ void mn10200_device::execute_run()
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97: case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f: case 0x98: case 0x99: case 0x9a: case 0x9b: case 0x9c: case 0x9d: case 0x9e: case 0x9f:
m_cycles -= 3; m_cycles -= 3;
m_d[opcode & 3] = read_mem8((m_a[(opcode>>2) & 3] + read_arg24(m_pc+2)) & 0xffffff); m_d[opcode & 3] = read_mem8(m_a[opcode >> 2 & 3] + read_arg24(m_pc + 2));
m_pc += 5; m_pc += 5;
break; break;
@ -1489,7 +1513,7 @@ void mn10200_device::execute_run()
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7: case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf: case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
m_cycles -= 3; m_cycles -= 3;
m_d[opcode & 3] = (INT8)read_mem8((m_a[(opcode>>2) & 3] + read_arg24(m_pc+2)) & 0xffffff); m_d[opcode & 3] = (INT8)read_mem8(m_a[opcode >> 2 & 3] + read_arg24(m_pc + 2));
m_pc += 5; m_pc += 5;
break; break;
@ -1497,7 +1521,7 @@ void mn10200_device::execute_run()
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7: case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf: case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
m_cycles -= 4; m_cycles -= 4;
m_d[opcode & 3] = read_mem24((m_a[(opcode>>2) & 3] + read_arg24(m_pc+2)) & 0xffffff); m_d[opcode & 3] = read_mem24(m_a[opcode >> 2 & 3] + read_arg24(m_pc + 2));
m_pc += 5; m_pc += 5;
break; break;
@ -1545,7 +1569,7 @@ void mn10200_device::execute_run()
case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7:
case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff:
m_cycles -= 4; m_cycles -= 4;
m_a[opcode & 3] = read_mem24((m_a[(opcode>>2) & 3] + read_arg24(m_pc+2)) & 0xffffff); m_a[opcode & 3] = read_mem24(m_a[opcode >> 2 & 3] + read_arg24(m_pc + 2));
m_pc += 5; m_pc += 5;
break; break;
@ -1558,7 +1582,8 @@ void mn10200_device::execute_run()
// extended code f5 (3 bytes) // extended code f5 (3 bytes)
case 0xf5: case 0xf5:
opcode = read_arg8(m_pc + 1); opcode = read_arg8(m_pc + 1);
switch(opcode) { switch (opcode)
{
// and imm8, dn // and imm8, dn
case 0x00: case 0x01: case 0x02: case 0x03: case 0x00: case 0x01: case 0x02: case 0x03:
m_cycles -= 2; m_cycles -= 2;
@ -1591,7 +1616,7 @@ void mn10200_device::execute_run()
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17: case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
m_cycles -= 2; m_cycles -= 2;
write_mem8((m_a[(opcode>>2) & 3]+(INT8)read_arg8(m_pc+2)) & 0xffffff, m_d[opcode & 3]); write_mem8(m_a[opcode >> 2 & 3] + (INT8)read_arg8(m_pc + 2), m_d[opcode & 3]);
m_pc += 3; m_pc += 3;
break; break;
@ -1599,7 +1624,7 @@ void mn10200_device::execute_run()
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27: case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f: case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = (INT8)read_mem8((m_a[(opcode>>2) & 3]+(INT8)read_arg8(m_pc+2)) & 0xffffff); m_d[opcode & 3] = (INT8)read_mem8(m_a[opcode >> 2 & 3] + (INT8)read_arg8(m_pc + 2));
m_pc += 3; m_pc += 3;
break; break;
@ -1607,7 +1632,7 @@ void mn10200_device::execute_run()
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37: case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f: case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = read_mem8((m_a[(opcode>>2) & 3]+(INT8)read_arg8(m_pc+2)) & 0xffffff); m_d[opcode & 3] = read_mem8(m_a[opcode >> 2 & 3] + (INT8)read_arg8(m_pc + 2));
m_pc += 3; m_pc += 3;
break; break;
@ -1615,7 +1640,7 @@ void mn10200_device::execute_run()
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57: case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f: case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
m_cycles -= 3; m_cycles -= 3;
write_mem24((m_a[(opcode>>2) & 3]+(INT8)read_arg8(m_pc+2)) & 0xffffff, m_d[opcode & 3]); write_mem24(m_a[opcode >> 2 & 3] + (INT8)read_arg8(m_pc + 2), m_d[opcode & 3]);
m_pc += 3; m_pc += 3;
break; break;
@ -1623,7 +1648,7 @@ void mn10200_device::execute_run()
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77: case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
m_cycles -= 3; m_cycles -= 3;
m_d[opcode & 3] = read_mem24((m_a[(opcode>>2) & 3]+(INT8)read_arg8(m_pc+2)) & 0xffffff); m_d[opcode & 3] = read_mem24(m_a[opcode >> 2 & 3] + (INT8)read_arg8(m_pc + 2));
m_pc += 3; m_pc += 3;
break; break;
@ -1796,7 +1821,8 @@ void mn10200_device::execute_run()
// extended code f7 (4 bytes) // extended code f7 (4 bytes)
case 0xf7: case 0xf7:
opcode = read_arg8(m_pc + 1); opcode = read_arg8(m_pc + 1);
switch(opcode) { switch (opcode)
{
// and imm16, dn // and imm16, dn
case 0x00: case 0x01: case 0x02: case 0x03: case 0x00: case 0x01: case 0x02: case 0x03:
m_cycles -= 2; m_cycles -= 2;
@ -1878,7 +1904,7 @@ void mn10200_device::execute_run()
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87: case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f: case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
m_cycles -= 2; m_cycles -= 2;
write_mem16((m_a[(opcode>>2)&3]+(INT16)read_arg16(m_pc+2)) & 0xffffff, (UINT16)m_d[opcode & 3]); write_mem16(m_a[opcode >> 2 & 3] + (INT16)read_arg16(m_pc + 2), (UINT16)m_d[opcode & 3]);
m_pc += 4; m_pc += 4;
break; break;
@ -1886,7 +1912,7 @@ void mn10200_device::execute_run()
case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
m_cycles -= 2; m_cycles -= 2;
m_d[opcode & 3] = (INT16)read_mem16((m_a[(opcode>>2) & 3] + (INT16)read_arg16(m_pc+2)) & 0xffffff); m_d[opcode & 3] = (INT16)read_mem16(m_a[opcode >> 2 & 3] + (INT16)read_arg16(m_pc + 2));
m_pc += 4; m_pc += 4;
break; break;

6
src/emu/cpu/mn10200/mn10200.h
View File

@ -139,15 +139,15 @@ private:
UINT8 read_arg8(UINT32 address); UINT8 read_arg8(UINT32 address);
UINT16 read_arg16(UINT32 address); UINT16 read_arg16(UINT32 address);
INT32 read_arg24(offs_t adr); UINT32 read_arg24(UINT32 address);
UINT8 read_mem8(UINT32 address); UINT8 read_mem8(UINT32 address);
UINT16 read_mem16(UINT32 address); UINT16 read_mem16(UINT32 address);
INT32 read_mem24(offs_t adr); UINT32 read_mem24(UINT32 address);
void write_mem8(UINT32 address, UINT8 data); void write_mem8(UINT32 address, UINT8 data);
void write_mem16(UINT32 address, UINT16 data); void write_mem16(UINT32 address, UINT16 data);
void write_mem24(offs_t adr, UINT32 val); void write_mem24(UINT32 address, UINT32 data);
void mn102_change_pc(UINT32 pc); void mn102_change_pc(UINT32 pc);
void mn102_take_irq(int level, int group); void mn102_take_irq(int level, int group);