mirror of
https://github.com/holub/mame
synced 2025-04-16 21:44:32 +03:00
Cleanups and version bump
This commit is contained in:
Miodrag Milanovic
parent
f35b95a00e
commit
4bf717996f
@ -4028,7 +4028,7 @@ Info on Sega chip labels (from Sunbeam / Digital Corruption)
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<part name="cart" interface="megadriv_cart">
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<feature name="pcb" value="670115 REV 3" />
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<feature name="ic1" value="MORTAL KOMBAT VER 1.00 S220, MORTAL KOMBAT S215 VER 1.00" />
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<!-- USA cart, on a REV 4 PCB has chip labeled as MPR-15748-SM -->
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<!-- USA cart, on a REV 4 PCB has chip labeled as MPR-15748-SM -->
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<dataarea name="rom" size="2097152">
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<rom name="mortal kombat ver 1.00 s220.ic1" size="2097152" crc="1aa3a207" sha1="c098bf38ddd755ab7caa4612d025be2039009eb2" offset="000000" loadflag="load16_word_swap" />
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</dataarea>
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@ -7882,10 +7882,10 @@ but dumps still have to be confirmed.
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<part name="cart" interface="megadriv_cart">
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<!-- The PCB contains 4 different ROMs, but it is unknown how the dump should be split (maybe we can reconstruct that from the checksums?) -->
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<feature name="pcb" value="" />
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<feature name="u1" value="MO 1 6/26 56 CE41" /> <!-- The 56 might be a 95 written upside down -->
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<feature name="u1" value="MO 1 6/26 56 CE41" /> <!-- The 56 might be a 95 written upside down -->
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<feature name="u2" value="Real Monsters 7-7-95" />
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<feature name="u3" value="(unmarked eeprom)" />
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<feature name="u4" value="MO 2 6/26 56 FD68" /> <!-- The 56 might be a 95 written upside down -->
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<feature name="u4" value="MO 2 6/26 56 FD68" /> <!-- The 56 might be a 95 written upside down -->
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<feature name="u5" value="MC74HC139N" />
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<dataarea name="rom" size="2097152">
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<rom name="killertomatoes.5b74.bin" size="2097152" crc="f4b44b82" sha1="b0f1885e74e5aa39872f09444d82c8ebf284eba1" offset="000000" loadflag="load16_word_swap" />
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@ -30580,11 +30580,11 @@ rockman x3 (unl).bin [2/2] xxx3.bin [2/2] IDENTICAL
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<!--
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Investigation by Eke:
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this dump has the PC pointing to $1FE1DE, which does not hold any valid 68k program data in the ROM,
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so the game actually does not even starts when the 68k resets => either the dump is incomplete or it
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is a bad dump, there is no way bankswitching can be "triggered" before the CPU has reseted and
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fetches the PC, only possibility would be that this ROM area is only activated if some signal conditions
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is met (I know that some pirate carts will need to have the !RESET lines set HIGH like with the real console,
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this dump has the PC pointing to $1FE1DE, which does not hold any valid 68k program data in the ROM,
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so the game actually does not even starts when the 68k resets => either the dump is incomplete or it
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is a bad dump, there is no way bankswitching can be "triggered" before the CPU has reseted and
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fetches the PC, only possibility would be that this ROM area is only activated if some signal conditions
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is met (I know that some pirate carts will need to have the !RESET lines set HIGH like with the real console,
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which most dumpers ignore)
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This dump is either a bad dump or a wrongly patched one.
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-->
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@ -51007,7 +51007,7 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx
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<info name="alt_title" value="中國大亨"/>
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<part name="cart" interface="nes_cart">
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<feature name="slot" value="txrom" />
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<feature name="pcb" value="NES-TLROM" /> <!-- Original header was mapper 116, but it's not a SOMARI pcb... -->
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<feature name="pcb" value="NES-TLROM" /> <!-- Original header was mapper 116, but it's not a SOMARI pcb... -->
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<dataarea name="chr" size="131072">
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<rom name="chuugoku taitei (asia) (unl).chr" size="131072" crc="d9203c08" sha1="b32ef62e4583b216aea84f7d0da0269c01b61e26" offset="00000" status="baddump" />
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</dataarea>
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@ -54017,7 +54017,7 @@ preliminary proto for the PAL version, still running on NTSC systems) or the gfx
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<info name="serial" value="ES-1109"/>
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<info name="alt_title" value="神鬼传奇"/>
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<part name="cart" interface="nes_cart">
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<feature name="slot" value="hengg_srich" /> <!-- it seems to work even with FS-304... investigate relation between the two... -->
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<feature name="slot" value="hengg_srich" /> <!-- it seems to work even with FS-304... investigate relation between the two... -->
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<feature name="pcb" value="HENGGEDIANZI" /> <!-- header says mapper 162, which should be a modified version of 163... -->
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<dataarea name="prg" size="1048576">
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<rom name="mummy (es-1109) (c).prg" size="1048576" crc="08fbf3f0" sha1="6dc200340d4b7b9397e4d4f28fa307059ce834ec" offset="00000" status="baddump" />
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@ -7,7 +7,7 @@
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<description>Chao Adventure</description>
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<year>1999</year>
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<publisher>Sega</publisher>
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<info name="source" value="Sonic Adventure" />
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<info name="source" value="Sonic Adventure" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="65536">
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<rom name="chao adventure (1999)(sega)[sonic adventure].vms" size="65536" crc="09e93592" sha1="f35738795fd1799bbffb6c3df8d4f208ccf437b5" offset="0" />
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@ -19,7 +19,7 @@
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<description>Chao Adventure 2</description>
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<year>2001</year>
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<publisher>Sega</publisher>
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<info name="source" value="Sonic Adventure 2" />
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<info name="source" value="Sonic Adventure 2" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="65536">
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<rom name="chao adventure 2 (sega)(2001)[sonic adventure 2].vms" size="65536" crc="9c464d76" sha1="4190654ed0cede2d852fbe7c7f612a4c1b4a45b3" offset="0" />
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@ -31,7 +31,7 @@
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<description>Chao Adventure 2 (Fra)</description>
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<year>2001</year>
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<publisher>Sega</publisher>
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<info name="source" value="Sonic Adventure 2" />
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<info name="source" value="Sonic Adventure 2" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="65536">
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<rom name="chao adventure 2 (2001)(sega)(fr)[sonic adventure 2].vms" size="65536" crc="20f25e00" sha1="6e57f9447fdbcf69fddbb3b7a187f7043dcd9de0" offset="0" />
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@ -43,7 +43,7 @@
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<description>Linear Watch</description>
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<year>2000</year>
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<publisher>ESP Software</publisher>
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<info name="source" value="Evolution 2" />
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<info name="source" value="Evolution 2" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="15360">
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<rom name="linear watch (2000)(esp software)[evolution 2].vms" size="15360" crc="16b6f34c" sha1="556b7d4235c08e03e1eec0bb6527f63dc5ec78a4" offset="0" />
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@ -55,7 +55,7 @@
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<description>Marvel VS. Capcom 2 vs. Com (Jpn)</description>
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<year>2000</year>
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<publisher>Capcom</publisher>
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<info name="source" value="Marvel vs. Capcom 2" />
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<info name="source" value="Marvel vs. Capcom 2" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="32768">
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<rom name="marvel vs. capcom 2 vs. com (2000)(capcom)(jp)[marvel vs. capcom 2].vms" size="32768" crc="3f621910" sha1="b52bed579019bec07b818c802b72277be0c4430c" offset="0" />
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@ -67,7 +67,7 @@
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<description>Pop 'n Music Vol. 1 (Jpn)</description>
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<year>1999</year>
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<publisher>Konami</publisher>
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<info name="source" value="Pop 'n Music" />
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<info name="source" value="Pop 'n Music" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="28672">
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<rom name="pop 'n music vol. 1 (1999)(konami)(jp)[pop 'n music].vms" size="28672" crc="7ce75350" sha1="339ebf13c557c14851e171202d3b105dee9fce6b" offset="0" />
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@ -79,7 +79,7 @@
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<description>Pop 'n Music Vol. 2 (Jpn)</description>
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<year>2000</year>
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<publisher>Konami</publisher>
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<info name="source" value="Pop 'n Music" />
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<info name="source" value="Pop 'n Music" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="30720">
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<rom name="pop 'n music vol. 2 (2000)(konami)(jp)[pop 'n music].vms" size="30720" crc="c2a1cd70" sha1="3dfbd8cf625728040676e17409b10914cb9917e7" offset="0" />
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@ -91,7 +91,7 @@
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<description>Pop 'n Music Vol. 3 (Jpn)</description>
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<year>2000</year>
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<publisher>Konami</publisher>
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<info name="source" value="Pop 'n Music" />
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<info name="source" value="Pop 'n Music" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="30720">
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<rom name="pop 'n music vol. 3 (2000)(konami)(jp)[pop 'n music].vms" size="30720" crc="96fef522" sha1="56a46d89187a04d26fe20cc4b697b23eebedb96e" offset="0" />
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@ -103,7 +103,7 @@
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<description>Powerstone Mini</description>
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<year>1999</year>
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<publisher>Capcom</publisher>
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<info name="source" value="Power Stone" />
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<info name="source" value="Power Stone" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="65536">
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<rom name="powerstone mini (1999)(capcom)[power stone].vms" size="65536" crc="04d6a41f" sha1="177781ab7023de28216b33d237d2ee7e57b66205" offset="0" />
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@ -115,7 +115,7 @@
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<description>Power Stone 2 Mini Store (Jpn)</description>
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<year>2000</year>
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<publisher>Capcom</publisher>
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<info name="source" value="Power Stone 2" />
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<info name="source" value="Power Stone 2" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="65536">
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<rom name="power stone 2 mini store (2000)(capcom)(jp)[power stone 2].vms" size="65536" crc="81d456d2" sha1="6ff653848c3dc3205d72363357fc63db4cbf359c" offset="0" />
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@ -127,7 +127,7 @@
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<description>Sega GT Pocket America</description>
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<year>2000</year>
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<publisher>Sega</publisher>
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<info name="source" value="Sega GT" />
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<info name="source" value="Sega GT" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="65536">
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<rom name="sega gt pocket america (2000)(sega - wow-ent)[sega gt].vms" size="65536" crc="20084dc1" sha1="5268f5a02bc21239fd0ea2d25b08cbc00bc83220" offset="0" />
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@ -139,7 +139,7 @@
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<description>Sega GT (Jpn)</description>
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<year>2000</year>
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<publisher>Sega</publisher>
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<info name="source" value="Sega GT" />
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<info name="source" value="Sega GT" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="65536">
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<rom name="sega gt (2000)(sega)(jp)[sega gt].vms" size="65536" crc="9eed83ea" sha1="8ea70e846a9a42877a62a790d8329dd72fe4749f" offset="0" />
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@ -151,7 +151,7 @@
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<description>Sega GT Pocket Europe</description>
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<year>2000</year>
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<publisher>Sega</publisher>
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<info name="source" value="Sega GT" />
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<info name="source" value="Sega GT" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="65536">
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<rom name="sega gt pocket europe (2000)(sega - wow-ent)[sega gt].vms" size="65536" crc="c8490720" sha1="e82dce08ad914ff275f1cfcf64e90d4c8c00d58a" offset="0" />
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@ -163,7 +163,7 @@
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<description>Sega GT Pocket Japan</description>
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<year>2000</year>
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<publisher>Sega</publisher>
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<info name="source" value="Sega GT" />
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<info name="source" value="Sega GT" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="65536">
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<rom name="sega gt pocket japan (2000)(sega - wow-ent)[sega gt].vms" size="65536" crc="7d4b5c34" sha1="32e0dae07dd17de9981c84de9e12b2af6677353d" offset="0" />
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@ -175,7 +175,7 @@
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<description>Shenmue (Jpn)</description>
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<year>1999</year>
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<publisher>Sega</publisher>
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<info name="source" value="Shenmue" />
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<info name="source" value="Shenmue" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="25600">
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<rom name="shenmue (1999)(sega)(jp)[shenmue].vms" size="25600" crc="3fcab726" sha1="ea52613cf39b965266ad32501d8caa6286de4e57" offset="0" />
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@ -187,7 +187,7 @@
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<description>Soul Calibur 3-1 Mini (Jpn)</description>
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<year>1999</year>
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<publisher>Namco</publisher>
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<info name="source" value="SoulCalibur" />
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<info name="source" value="SoulCalibur" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="50176">
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<rom name="soul calibur 3-1 mini (1999)(namco)(jp)[soulcalibur].vms" size="50176" crc="d23dfe42" sha1="bf34e85fb481a3e920dab7517dd170c28f5c4ad5" offset="0" />
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@ -199,7 +199,7 @@
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<description>SoulCalibur Text Adventure (Jpn)</description>
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<year>1999</year>
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<publisher>Namco</publisher>
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<info name="source" value="SoulCalibur" />
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<info name="source" value="SoulCalibur" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="50688">
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<rom name="soulcalibur text adventure (1999)(namco)(jp)[soulcalibur].vms" size="50688" crc="eedc89ee" sha1="3783708b76cdfd2a5f027c39ff45236c1244baa4" offset="0" />
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@ -211,7 +211,7 @@
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<description>SoulCalibur VMU Game Pack </description>
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<year>1999</year>
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<publisher>Namco</publisher>
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<info name="source" value="SoulCalibur" />
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<info name="source" value="SoulCalibur" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="50176">
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<rom name="soulcalibur vmu game pack (1999)(namco)[soulcalibur].vms" size="50176" crc="6068eb49" sha1="b3d87d67b8ca59887e9680b4213239881bb4360c" offset="0" />
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@ -223,7 +223,7 @@
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<description>TrickStyle Junior</description>
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<year>1999</year>
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<publisher>Acclaim</publisher>
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<info name="source" value="TrickStyle" />
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<info name="source" value="TrickStyle" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="3584">
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<rom name="trickstyle junior (1999)(acclaim)[trickstyle].vms" size="3584" crc="966659f9" sha1="5b46e07f30ecf53ebdfc17eb4accaf3e3d4fa92a" offset="0" />
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@ -247,7 +247,7 @@
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<description>Zombie Revenge Training Game</description>
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<year>1999</year>
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<publisher>Sega</publisher>
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<info name="source" value="Zombie Revenge" />
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<info name="source" value="Zombie Revenge" />
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<part name="quik" interface="svmu_quik">
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<dataarea name="rom" size="56320">
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<rom name="zombie revenge training game (1999)(sega)[zombie revenge].vms" size="56320" crc="7b4ce3c7" sha1="68b584f7c5c7ac119c12641e8b1f01a726c58881" offset="0" />
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@ -296,7 +296,7 @@ INT32 gte::BOUNDS( int44 value, int max_flag, int min_flag )
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{
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FLAG |= max_flag;
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}
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if( value.negative_overflow() )
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{
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FLAG |= min_flag;
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@ -81,8 +81,8 @@ static const char *const ints[4] = {
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"", "vi", "nvi", "vi,nvi"
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};
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int z8k_segm; /* Current disassembler mode: 0 - non-segmented, 1 - segmented */
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int z8k_segm_mode = Z8K_SEGM_MODE_AUTO; /* User disassembler mode setting: segmented, non-segmented, auto */
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int z8k_segm; /* Current disassembler mode: 0 - non-segmented, 1 - segmented */
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int z8k_segm_mode = Z8K_SEGM_MODE_AUTO; /* User disassembler mode setting: segmented, non-segmented, auto */
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void z8k_disass_mode(running_machine &machine, int ref, int params, const char *param[])
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{
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@ -38,7 +38,7 @@ extern void z8k_disass_mode(running_machine &machine, int ref, int params, const
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/* possible values for z8k_segm_mode */
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#define Z8K_SEGM_MODE_NONSEG 0
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#define Z8K_SEGM_MODE_SEG 1
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#define Z8K_SEGM_MODE_AUTO 2
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#define Z8K_SEGM_MODE_SEG 1
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#define Z8K_SEGM_MODE_AUTO 2
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#endif /* __Z8000_H__ */
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@ -2672,7 +2672,7 @@ bool device_debug::comment_remove(offs_t addr)
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const char *device_debug::comment_text(offs_t addr) const
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{
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const UINT32 crc = compute_opcode_crc32(addr);
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const UINT32 crc = compute_opcode_crc32(addr);
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dasm_comment* comment = m_comment_set.find(dasm_comment(addr, crc, "", 0));
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if (comment == NULL) return NULL;
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return comment->m_text;
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@ -3523,7 +3523,7 @@ void device_debug::tracer::flush()
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device_debug::dasm_pc_tag::dasm_pc_tag(const offs_t& address, const UINT32& crc)
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: m_address(address),
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m_crc(crc)
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m_crc(crc)
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{
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}
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@ -3533,7 +3533,7 @@ device_debug::dasm_pc_tag::dasm_pc_tag(const offs_t& address, const UINT32& crc)
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device_debug::dasm_comment::dasm_comment(offs_t address, UINT32 crc, const char *text, rgb_t color)
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: dasm_pc_tag(address, crc),
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m_text(text),
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m_color(color)
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m_text(text),
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m_color(color)
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{
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}
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|
||||
@ -251,7 +251,7 @@ EMUMACHINEOBJS = \
|
||||
$(EMUMACHINE)/pc16552d.o \
|
||||
$(EMUMACHINE)/pcf8593.o \
|
||||
$(EMUMACHINE)/pci.o \
|
||||
$(EMUMACHINE)/pckeybrd.o \
|
||||
$(EMUMACHINE)/pckeybrd.o \
|
||||
$(EMUMACHINE)/pd4990a.o \
|
||||
$(EMUMACHINE)/pic8259.o \
|
||||
$(EMUMACHINE)/pit8253.o \
|
||||
|
||||
@ -173,7 +173,7 @@ private:
|
||||
serial_state m_rx_state;
|
||||
serial_state m_tx_state;
|
||||
int m_irq;
|
||||
bool m_dcd_triggered;
|
||||
bool m_dcd_triggered;
|
||||
|
||||
emu_timer *m_rx_timer;
|
||||
emu_timer *m_tx_timer;
|
||||
|
||||
@ -225,7 +225,7 @@ void kbdc8042_device::device_config_complete()
|
||||
memset(&m_gate_a20_cb, 0, sizeof(m_gate_a20_cb));
|
||||
memset(&m_input_buffer_full_func, 0, sizeof(m_input_buffer_full_func));
|
||||
memset(&m_output_buffer_empty_cb, 0, sizeof(m_output_buffer_empty_cb));
|
||||
memset(&m_speaker_cb, 0, sizeof(m_speaker_cb));
|
||||
memset(&m_speaker_cb, 0, sizeof(m_speaker_cb));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -34,18 +34,18 @@ enum kbdc8042_type_t
|
||||
|
||||
struct kbdc8042_interface
|
||||
{
|
||||
kbdc8042_type_t m_keybtype;
|
||||
kbdc8042_type_t m_keybtype;
|
||||
// interface to the host pc
|
||||
devcb_write_line m_system_reset_cb;
|
||||
devcb_write_line m_gate_a20_cb;
|
||||
devcb_write_line m_input_buffer_full_cb;
|
||||
devcb_write_line m_output_buffer_empty_cb;
|
||||
|
||||
devcb_write8 m_speaker_cb;
|
||||
devcb_read8 m_getout2_cb;
|
||||
|
||||
devcb_write8 m_speaker_cb;
|
||||
devcb_read8 m_getout2_cb;
|
||||
};
|
||||
|
||||
// ======================> kbdc8042_device
|
||||
// ======================> kbdc8042_device
|
||||
|
||||
class kbdc8042_device : public device_t,
|
||||
public kbdc8042_interface
|
||||
@ -53,7 +53,7 @@ class kbdc8042_device : public device_t,
|
||||
public:
|
||||
// construction/destruction
|
||||
kbdc8042_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
|
||||
DECLARE_READ8_MEMBER( data_r );
|
||||
DECLARE_WRITE8_MEMBER( data_w );
|
||||
|
||||
@ -68,7 +68,7 @@ protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
virtual void device_config_complete();
|
||||
|
||||
|
||||
UINT8 m_inport, m_outport, m_data, m_command;
|
||||
|
||||
struct {
|
||||
@ -93,14 +93,14 @@ protected:
|
||||
int m_offset1;
|
||||
|
||||
int m_poll_delay;
|
||||
|
||||
|
||||
devcb_resolved_write_line m_system_reset_func;
|
||||
devcb_resolved_write_line m_gate_a20_func;
|
||||
devcb_resolved_write_line m_input_buffer_full_func;
|
||||
devcb_resolved_write_line m_output_buffer_empty_func;
|
||||
|
||||
devcb_resolved_write8 m_speaker_func;
|
||||
devcb_resolved_read8 m_getout2_func;
|
||||
|
||||
devcb_resolved_write8 m_speaker_func;
|
||||
devcb_resolved_read8 m_getout2_func;
|
||||
};
|
||||
|
||||
// device type definition
|
||||
|
||||
@ -30,7 +30,6 @@ mcf5206e_peripheral_device::mcf5206e_peripheral_device(const machine_config &mco
|
||||
|
||||
void mcf5206e_peripheral_device::device_config_complete()
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
@ -40,7 +39,6 @@ void mcf5206e_peripheral_device::device_config_complete()
|
||||
|
||||
void mcf5206e_peripheral_device::device_start()
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
@ -52,7 +50,6 @@ READ32_MEMBER(mcf5206e_peripheral_device::dev_r)
|
||||
|
||||
WRITE32_MEMBER(mcf5206e_peripheral_device::dev_w)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
@ -86,133 +83,133 @@ READ32_MEMBER(mcf5206e_peripheral_device::seta2_coldfire_regs_r)
|
||||
|
||||
ADDRESS REG WIDTH NAME/DESCRIPTION INIT VALUE (MR=Master Reset, NR=Normal Reset) Read or Write access
|
||||
|
||||
op MOVEC with $C0F MBAR 32 Module Base Address Register uninit (except V=0) W
|
||||
$003 SIMR 8 SIM Configuration Register C0 R/W
|
||||
$014 ICR1 8 Interrupt Control Register 1 - External IRQ1/IPL1 04 R/W
|
||||
$015 ICR2 8 Interrupt Control Register 2 - External IPL2 08 R/W
|
||||
$016 ICR3 8 Interrupt Control Register 3 - External IPL3 0C R/W
|
||||
$017 ICR4 8 Interrupt Control Register 4 - External IRQ4/IPL4 10 R/W
|
||||
$018 ICR5 8 Interrupt Control Register 5 - External IPL5 14 R/W
|
||||
$019 ICR6 8 Interrupt Control Register 6 - External IPL6 18 R/W
|
||||
$01A ICR7 8 Interrupt Control Register 7 - External IRQ7/IPL7 1C R/W
|
||||
$01B ICR8 8 Interrupt Control Register 8 - SWT 1C R/W
|
||||
$01C ICR9 8 Interrupt Control Register 9 - Timer 1 Interrupt 80 R/W
|
||||
$01D ICR10 8 Interrupt Control Register 10 - Timer 2 Interrupt 80 R/W
|
||||
$01E ICR11 8 Interrupt Control Register 11 - MBUS Interrupt 80 R/W
|
||||
$01F ICR12 8 Interrupt Control Register 12 - UART 1 Interrupt 00 R/W
|
||||
$020 ICR13 8 Interrupt Control Register 13 - UART 2 Interrupt 00 R/W
|
||||
$036 IMR 16 Interrupt Mask Register 3FFE R/W
|
||||
$03A IPR 16 Interrupt Pending Register 0000 R
|
||||
$040 RSR 8 Reset Status Register 80 / 20 R/W
|
||||
$041 SYPCR 8 System Protection Control Register 00 R/W
|
||||
$042 SWIVR 8 Software Watchdog Interrupt Vector Register 0F R/W
|
||||
$043 SWSR 8 Software Watchdog Service Register uninit W
|
||||
$046 DCRR 16 DRAM Controller Refresh MR 0000 - NR uninit R/W
|
||||
$04A DCTR 16 DRAM Controller Timing Register MR 0000 - NR uninit R/W
|
||||
$04C DCAR0 16 DRAM Controller 0 Address Register MR uninit - NR uninit R/W
|
||||
$050 DCMR0 32 DRAM Controller 0 Mask Register MR uninit - NR uninit R/W
|
||||
$057 DCCR0 8 DRAM Controller 0 Control Register MR 00 - NR 00 R/W
|
||||
$058 DCAR1 16 DRAM Controller 1 Address Register MR uninit - NR uninit R/W
|
||||
$05C DCMR1 32 DRAM Controller 1 Mask Register MR uninit - NR uninit R/W
|
||||
$063 DCCR1 8 DRAM Controller 1 Control Register MR 00 - NR 00 R/W
|
||||
op MOVEC with $C0F MBAR 32 Module Base Address Register uninit (except V=0) W
|
||||
$003 SIMR 8 SIM Configuration Register C0 R/W
|
||||
$014 ICR1 8 Interrupt Control Register 1 - External IRQ1/IPL1 04 R/W
|
||||
$015 ICR2 8 Interrupt Control Register 2 - External IPL2 08 R/W
|
||||
$016 ICR3 8 Interrupt Control Register 3 - External IPL3 0C R/W
|
||||
$017 ICR4 8 Interrupt Control Register 4 - External IRQ4/IPL4 10 R/W
|
||||
$018 ICR5 8 Interrupt Control Register 5 - External IPL5 14 R/W
|
||||
$019 ICR6 8 Interrupt Control Register 6 - External IPL6 18 R/W
|
||||
$01A ICR7 8 Interrupt Control Register 7 - External IRQ7/IPL7 1C R/W
|
||||
$01B ICR8 8 Interrupt Control Register 8 - SWT 1C R/W
|
||||
$01C ICR9 8 Interrupt Control Register 9 - Timer 1 Interrupt 80 R/W
|
||||
$01D ICR10 8 Interrupt Control Register 10 - Timer 2 Interrupt 80 R/W
|
||||
$01E ICR11 8 Interrupt Control Register 11 - MBUS Interrupt 80 R/W
|
||||
$01F ICR12 8 Interrupt Control Register 12 - UART 1 Interrupt 00 R/W
|
||||
$020 ICR13 8 Interrupt Control Register 13 - UART 2 Interrupt 00 R/W
|
||||
$036 IMR 16 Interrupt Mask Register 3FFE R/W
|
||||
$03A IPR 16 Interrupt Pending Register 0000 R
|
||||
$040 RSR 8 Reset Status Register 80 / 20 R/W
|
||||
$041 SYPCR 8 System Protection Control Register 00 R/W
|
||||
$042 SWIVR 8 Software Watchdog Interrupt Vector Register 0F R/W
|
||||
$043 SWSR 8 Software Watchdog Service Register uninit W
|
||||
$046 DCRR 16 DRAM Controller Refresh MR 0000 - NR uninit R/W
|
||||
$04A DCTR 16 DRAM Controller Timing Register MR 0000 - NR uninit R/W
|
||||
$04C DCAR0 16 DRAM Controller 0 Address Register MR uninit - NR uninit R/W
|
||||
$050 DCMR0 32 DRAM Controller 0 Mask Register MR uninit - NR uninit R/W
|
||||
$057 DCCR0 8 DRAM Controller 0 Control Register MR 00 - NR 00 R/W
|
||||
$058 DCAR1 16 DRAM Controller 1 Address Register MR uninit - NR uninit R/W
|
||||
$05C DCMR1 32 DRAM Controller 1 Mask Register MR uninit - NR uninit R/W
|
||||
$063 DCCR1 8 DRAM Controller 1 Control Register MR 00 - NR 00 R/W
|
||||
--------- CHIP SELECTS -----------
|
||||
$064 CSAR0 16 Chip-Select 0 Address Register 0000 R/W
|
||||
$068 CSMR0 32 Chip-Select 0 Mask Register 00000000 R/W
|
||||
$06E CSCR0 16 Chip-Select 0 Control Register 3C1F, 3C5F, 3C9F, 3CDF, 3D1F, 3D5F, 3D9F, 3DDF R/W
|
||||
AA set by IRQ 7 at reset
|
||||
PS1 set by IRQ 4 at reset
|
||||
PS0 set by IRQ 1 at reset
|
||||
$070 CSAR1 16 Chip-Select 1 Address Register uninit R/W
|
||||
$074 CSMR1 32 Chip-Select 1 Mask Register uninit R/W
|
||||
$07A CSCR1 16 Chip-Select 1 Control Register uninit *1 R/W
|
||||
$07C CSAR2 16 Chip-Select 2 Address Register uninit R/W
|
||||
$080 CSMR2 32 Chip-Select 2 Mask Register uninit R/W
|
||||
$086 CSCR2 16 Chip-Select 2 Control Register uninit *1 R/W
|
||||
$088 CSAR3 16 Chip-Select 3 Address Register uninit R/W
|
||||
$08C CSMR3 32 Chip-Select 3 Mask Register uninit R/W
|
||||
$092 CSCR3 16 Chip-Select 3 Control Register uninit *1 R/W
|
||||
$094 CSAR4 16 Chip-Select 4 Address Register uninit R/W
|
||||
$098 CSMR4 32 Chip-Select 4 Mask Register uninit R/W
|
||||
$09E CSCR4 16 Chip-Select 4 Control Register uninit *1 R/W
|
||||
$0A0 CSAR5 16 Chip-Select 5 Address Register uninit R/W
|
||||
$0A4 CSMR5 32 Chip-Select 5 Mask Register uninit R/W
|
||||
$0AA CSCR5 16 Chip-Select 5 Control Register uninit *1 R/W
|
||||
$0AC CSAR6 16 Chip-Select 6 Address Register uninit R/W
|
||||
$0B0 CSMR6 32 Chip-Select 6 Mask Register uninit R/W
|
||||
$0B6 CSCR6 16 Chip-Select 6 Control Register uninit *1 R/W
|
||||
$0B8 CSAR7 16 Chip-Select 7 Address Register uninit R/W
|
||||
$0BC CSMR7 32 Chip-Select 7 Mask Register uninit R/W
|
||||
$0C2 CSCR7 16 Chip-Select 7 Control Register uninit *1 R/W
|
||||
$0C6 DMCR 16 Default Memory Control Register 0000 R/W
|
||||
$0CA PAR 16 Pin Assignment Register 00 R/W
|
||||
$064 CSAR0 16 Chip-Select 0 Address Register 0000 R/W
|
||||
$068 CSMR0 32 Chip-Select 0 Mask Register 00000000 R/W
|
||||
$06E CSCR0 16 Chip-Select 0 Control Register 3C1F, 3C5F, 3C9F, 3CDF, 3D1F, 3D5F, 3D9F, 3DDF R/W
|
||||
AA set by IRQ 7 at reset
|
||||
PS1 set by IRQ 4 at reset
|
||||
PS0 set by IRQ 1 at reset
|
||||
$070 CSAR1 16 Chip-Select 1 Address Register uninit R/W
|
||||
$074 CSMR1 32 Chip-Select 1 Mask Register uninit R/W
|
||||
$07A CSCR1 16 Chip-Select 1 Control Register uninit *1 R/W
|
||||
$07C CSAR2 16 Chip-Select 2 Address Register uninit R/W
|
||||
$080 CSMR2 32 Chip-Select 2 Mask Register uninit R/W
|
||||
$086 CSCR2 16 Chip-Select 2 Control Register uninit *1 R/W
|
||||
$088 CSAR3 16 Chip-Select 3 Address Register uninit R/W
|
||||
$08C CSMR3 32 Chip-Select 3 Mask Register uninit R/W
|
||||
$092 CSCR3 16 Chip-Select 3 Control Register uninit *1 R/W
|
||||
$094 CSAR4 16 Chip-Select 4 Address Register uninit R/W
|
||||
$098 CSMR4 32 Chip-Select 4 Mask Register uninit R/W
|
||||
$09E CSCR4 16 Chip-Select 4 Control Register uninit *1 R/W
|
||||
$0A0 CSAR5 16 Chip-Select 5 Address Register uninit R/W
|
||||
$0A4 CSMR5 32 Chip-Select 5 Mask Register uninit R/W
|
||||
$0AA CSCR5 16 Chip-Select 5 Control Register uninit *1 R/W
|
||||
$0AC CSAR6 16 Chip-Select 6 Address Register uninit R/W
|
||||
$0B0 CSMR6 32 Chip-Select 6 Mask Register uninit R/W
|
||||
$0B6 CSCR6 16 Chip-Select 6 Control Register uninit *1 R/W
|
||||
$0B8 CSAR7 16 Chip-Select 7 Address Register uninit R/W
|
||||
$0BC CSMR7 32 Chip-Select 7 Mask Register uninit R/W
|
||||
$0C2 CSCR7 16 Chip-Select 7 Control Register uninit *1 R/W
|
||||
$0C6 DMCR 16 Default Memory Control Register 0000 R/W
|
||||
$0CA PAR 16 Pin Assignment Register 00 R/W
|
||||
--------- TIMER MODULE -----------
|
||||
$100 TMR1 16 Timer 1 Mode Register 0000 R/W
|
||||
$104 TRR1 16 Timer 1 Reference Register FFFF R/W
|
||||
$108 TCR1 16 Timer 1 Capture Register 0000 R
|
||||
$10C TCN1 16 Timer 1 Counter 0000 R/W
|
||||
$111 TER1 8 Timer 1 Event Register 00 R/W
|
||||
$120 TMR2 16 Timer 2 Mode Register 0000 R/W
|
||||
$124 TRR2 16 Timer 2 Reference Register FFFF R/W
|
||||
$128 TCR2 16 Timer 2 Capture Register 0000 R
|
||||
$12C TCN2 16 Timer 2 Counter 0000 R/W
|
||||
$131 TER2 8 Timer 2 Event Register 00 R/W
|
||||
$100 TMR1 16 Timer 1 Mode Register 0000 R/W
|
||||
$104 TRR1 16 Timer 1 Reference Register FFFF R/W
|
||||
$108 TCR1 16 Timer 1 Capture Register 0000 R
|
||||
$10C TCN1 16 Timer 1 Counter 0000 R/W
|
||||
$111 TER1 8 Timer 1 Event Register 00 R/W
|
||||
$120 TMR2 16 Timer 2 Mode Register 0000 R/W
|
||||
$124 TRR2 16 Timer 2 Reference Register FFFF R/W
|
||||
$128 TCR2 16 Timer 2 Capture Register 0000 R
|
||||
$12C TCN2 16 Timer 2 Counter 0000 R/W
|
||||
$131 TER2 8 Timer 2 Event Register 00 R/W
|
||||
------------ UART SERIAL PORTS -----------
|
||||
$140 UMR1,2 8 UART 1 Mode Registers 00 R/W
|
||||
$144 USR 8 UART 1 Status Register 00 R
|
||||
UCSR 8 UART 1 Clock-Select Register DD W
|
||||
$148 UCR 8 UART 1 Command Register 00 W
|
||||
$14C URB 8 UART 1 Receive Buffer FF R
|
||||
UTB 8 UART 1 Transmit Buffer 00 W
|
||||
$150 UIPCR 8 UART Input Port Change Register 0F R
|
||||
UACR 8 UART 1 Auxilary Control Register 00 W
|
||||
$154 UISR 8 UART 1 Interrupt Status Register 00 R
|
||||
UIMR 8 UART 1 Interrupt Mask Register 00 W
|
||||
$158 UBG1 8 UART 1 Baud Rate Generator Prescale MSB uninit W
|
||||
$15C UBG2 8 UART 1 Baud Rate Generator Prescale LSB uninit W
|
||||
$170 UIVR 8 UART 1 Interrupt Vector Register 0F R/W
|
||||
$174 UIP 8 UART 1 Input Port Register FF R
|
||||
$178 UOP1 8 UART 1 Output Port Bit Set CMD UOP1[7-1]=undef; UOP1=0 W
|
||||
$17C UOP0 8 UART 1 Output Port Bit Reset CMD uninit W
|
||||
$140 UMR1,2 8 UART 1 Mode Registers 00 R/W
|
||||
$144 USR 8 UART 1 Status Register 00 R
|
||||
UCSR 8 UART 1 Clock-Select Register DD W
|
||||
$148 UCR 8 UART 1 Command Register 00 W
|
||||
$14C URB 8 UART 1 Receive Buffer FF R
|
||||
UTB 8 UART 1 Transmit Buffer 00 W
|
||||
$150 UIPCR 8 UART Input Port Change Register 0F R
|
||||
UACR 8 UART 1 Auxilary Control Register 00 W
|
||||
$154 UISR 8 UART 1 Interrupt Status Register 00 R
|
||||
UIMR 8 UART 1 Interrupt Mask Register 00 W
|
||||
$158 UBG1 8 UART 1 Baud Rate Generator Prescale MSB uninit W
|
||||
$15C UBG2 8 UART 1 Baud Rate Generator Prescale LSB uninit W
|
||||
$170 UIVR 8 UART 1 Interrupt Vector Register 0F R/W
|
||||
$174 UIP 8 UART 1 Input Port Register FF R
|
||||
$178 UOP1 8 UART 1 Output Port Bit Set CMD UOP1[7-1]=undef; UOP1=0 W
|
||||
$17C UOP0 8 UART 1 Output Port Bit Reset CMD uninit W
|
||||
|
||||
$180 UMR1,2 8 UART 2 Mode Registers 00 R/W
|
||||
$184 USR 8 UART 2 Status Register 00 R
|
||||
UCSR 8 UART 2 Clock-Select Register DD W
|
||||
$188 UCR 8 UART 2 Command Register 00 W
|
||||
$18C URB 8 UART 2 Receive Buffer FF R
|
||||
UTB 8 UART 2 Transmit Buffer 00 W
|
||||
$190 UIPCR 8 UART 2 Input Port Change Register 0F R
|
||||
UACR 8 UART 2 Auxilary Control Register 00 W
|
||||
$194 UISR 8 UART 2 Interrupt Status Register 00 R
|
||||
UIMR 8 UART 2 Interrupt Mask Register 00 W
|
||||
$198 UBG1 8 UART 2 Baud Rate Generator Prescale MSB uninit R/W
|
||||
$19C UBG2 8 UART 2 Barud Rate Generator Prescale LSB uninit R/W
|
||||
$1B0 UIVR 8 UART 2 Interrupt Vector Register 0F R/W
|
||||
$1B4 UIP 8 UART 2 Input Port Register FF R
|
||||
$1B8 UOP1 8 UART 2 Output Port Bit Set CMD UOP1[7-1]=undef; UOP1=0 W
|
||||
$1BC UOP0 8 UART 2 Output Port Bit Reset CMD uninit W
|
||||
$180 UMR1,2 8 UART 2 Mode Registers 00 R/W
|
||||
$184 USR 8 UART 2 Status Register 00 R
|
||||
UCSR 8 UART 2 Clock-Select Register DD W
|
||||
$188 UCR 8 UART 2 Command Register 00 W
|
||||
$18C URB 8 UART 2 Receive Buffer FF R
|
||||
UTB 8 UART 2 Transmit Buffer 00 W
|
||||
$190 UIPCR 8 UART 2 Input Port Change Register 0F R
|
||||
UACR 8 UART 2 Auxilary Control Register 00 W
|
||||
$194 UISR 8 UART 2 Interrupt Status Register 00 R
|
||||
UIMR 8 UART 2 Interrupt Mask Register 00 W
|
||||
$198 UBG1 8 UART 2 Baud Rate Generator Prescale MSB uninit R/W
|
||||
$19C UBG2 8 UART 2 Barud Rate Generator Prescale LSB uninit R/W
|
||||
$1B0 UIVR 8 UART 2 Interrupt Vector Register 0F R/W
|
||||
$1B4 UIP 8 UART 2 Input Port Register FF R
|
||||
$1B8 UOP1 8 UART 2 Output Port Bit Set CMD UOP1[7-1]=undef; UOP1=0 W
|
||||
$1BC UOP0 8 UART 2 Output Port Bit Reset CMD uninit W
|
||||
|
||||
$1C5 PPDDR 8 Port A Data Direction Register 00 R/W
|
||||
$1C9 PPDAT 8 Port A Data Register 00 R/W
|
||||
$1C5 PPDDR 8 Port A Data Direction Register 00 R/W
|
||||
$1C9 PPDAT 8 Port A Data Register 00 R/W
|
||||
------------ MBUS -----------
|
||||
$1E0 MADR 8 M-Bus Address Register 00 R/W
|
||||
$1E4 MFDR 8 M-Bus Frequency Divider Register 00 R/W
|
||||
$1E8 MBCR 8 M-Bus Control Register 00 R/W
|
||||
$1EC MBSR 8 M-Bus Status Register 00 R/W
|
||||
$1F0 MBDR 8 M-Bus Data I/O Register 00 R/W
|
||||
$1E0 MADR 8 M-Bus Address Register 00 R/W
|
||||
$1E4 MFDR 8 M-Bus Frequency Divider Register 00 R/W
|
||||
$1E8 MBCR 8 M-Bus Control Register 00 R/W
|
||||
$1EC MBSR 8 M-Bus Status Register 00 R/W
|
||||
$1F0 MBDR 8 M-Bus Data I/O Register 00 R/W
|
||||
------------ DMA Controller -----------
|
||||
$200 DMASAR0 32 Source Address Register 0 00 R/W
|
||||
$204 DMADAR0 32 Destination Address Register 0 00 R/W
|
||||
$208 DCR0 16 DMA Control Register 0 00 R/W
|
||||
$20C BCR0 16 Byte Count Register 0 00 R/W
|
||||
$210 DSR0 8 Status Register 0 00 R/W
|
||||
$214 DIVR0 8 Interrupt Vector Register 0 0F R/W
|
||||
$240 DMASAR1 32 Source Address Register 1 00 R/W
|
||||
$244 DMADAR1 32 Destination Address Register 1 00 R/W
|
||||
$248 DCR1 16 DMA Control Register 1 00 R/W
|
||||
$24C BCR1 16 Byte Count Register 1 00 R/W
|
||||
$250 DSR1 8 Status Register 1 00 R/W
|
||||
$254 DIVR1 8 Interrupt Vector Register 1 0F R/W
|
||||
$200 DMASAR0 32 Source Address Register 0 00 R/W
|
||||
$204 DMADAR0 32 Destination Address Register 0 00 R/W
|
||||
$208 DCR0 16 DMA Control Register 0 00 R/W
|
||||
$20C BCR0 16 Byte Count Register 0 00 R/W
|
||||
$210 DSR0 8 Status Register 0 00 R/W
|
||||
$214 DIVR0 8 Interrupt Vector Register 0 0F R/W
|
||||
$240 DMASAR1 32 Source Address Register 1 00 R/W
|
||||
$244 DMADAR1 32 Destination Address Register 1 00 R/W
|
||||
$248 DCR1 16 DMA Control Register 1 00 R/W
|
||||
$24C BCR1 16 Byte Count Register 1 00 R/W
|
||||
$250 DSR1 8 Status Register 1 00 R/W
|
||||
$254 DIVR1 8 Interrupt Vector Register 1 0F R/W
|
||||
|
||||
*1 - uninit except BRST=ASET=WRAH=RDAH=WR=RD=0
|
||||
|
||||
*/
|
||||
*/
|
||||
|
||||
@ -18,8 +18,7 @@
|
||||
***************************************************************************/
|
||||
|
||||
#define MCFG_MCF5206E_PERIPHERAL_ADD(_tag) \
|
||||
MCFG_DEVICE_ADD(_tag, MCF5206E_PERIPHERAL, 0) \
|
||||
|
||||
MCFG_DEVICE_ADD(_tag, MCF5206E_PERIPHERAL, 0)
|
||||
|
||||
/***************************************************************************
|
||||
TYPE DEFINITIONS
|
||||
|
||||
@ -753,7 +753,7 @@ struct s3c24xx_t
|
||||
devcb_resolved_write8 address_w;
|
||||
devcb_resolved_read8 nand_data_r;
|
||||
devcb_resolved_write8 nand_data_w;
|
||||
|
||||
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@ -900,7 +900,7 @@ struct s3c24xx_t
|
||||
devcb_resolved_write8 address_w;
|
||||
devcb_resolved_read8 nand_data_r;
|
||||
devcb_resolved_write8 nand_data_w;
|
||||
|
||||
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@ -970,7 +970,7 @@ struct s3c24xx_t
|
||||
devcb_resolved_write8 command_w;
|
||||
devcb_resolved_write8 address_w;
|
||||
devcb_resolved_read8 nand_data_r;
|
||||
devcb_resolved_write8 nand_data_w;
|
||||
devcb_resolved_write8 nand_data_w;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@ -2488,7 +2488,7 @@ void spu_device::generate_cdda(void *ptr, const unsigned int sz)
|
||||
m_cd_out_ptr=(m_cd_out_ptr+2)&0x3ff;
|
||||
|
||||
//if((m_cd_out_ptr == ((spureg.irq_addr << 3) & ~0x400)) && (spureg.ctrl & spuctrl_irq_enable))
|
||||
// m_irq_handler(1);
|
||||
// m_irq_handler(1);
|
||||
|
||||
dp[0]=clamp(dp[0]+vl);
|
||||
dp[1]=clamp(dp[1]+vr);
|
||||
|
||||
@ -127,7 +127,7 @@ INLINE dl1416_state *get_safe_token(device_t *device)
|
||||
static DEVICE_START( dl1416 )
|
||||
{
|
||||
dl1416_state *dl1416 = get_safe_token(device);
|
||||
|
||||
|
||||
/* register for state saving */
|
||||
state_save_register_item(device->machine(), "dl1416", device->tag(), 0, dl1416->chip_enable);
|
||||
state_save_register_item(device->machine(), "dl1416", device->tag(), 0, dl1416->cursor_enable);
|
||||
|
||||
@ -1347,8 +1347,7 @@ INLINE int CullVertex( int a, int b )
|
||||
n_leftpoint = n_point; \
|
||||
} \
|
||||
} \
|
||||
n_rightpoint = n_leftpoint; \
|
||||
|
||||
n_rightpoint = n_leftpoint;
|
||||
void psxgpu_device::FlatPolygon( int n_points )
|
||||
{
|
||||
INT16 n_y;
|
||||
|
||||
@ -1033,7 +1033,7 @@ static TIMER_CALLBACK( vblank_callback )
|
||||
{
|
||||
if (LOG_VBLANK_SWAP) logerror("---- vblank flush begin\n");
|
||||
flush_fifos(v, machine.time());
|
||||
if (LOG_VBLANK_SWAP) logerror("---- vblank flush end\n");
|
||||
if (LOG_VBLANK_SWAP) logerror("---- vblank flush end\n");
|
||||
}
|
||||
|
||||
/* increment the count */
|
||||
|
||||
@ -74,7 +74,7 @@ struct voodoo_config
|
||||
UINT8 tmumem1;
|
||||
const char * screen;
|
||||
const char * cputag;
|
||||
devcb_write_line vblank;
|
||||
devcb_write_line vblank;
|
||||
devcb_write_line stall;
|
||||
};
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -238,7 +238,6 @@ GFXDECODE_END
|
||||
|
||||
void _1942_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_palette_bank));
|
||||
save_item(NAME(m_scroll));
|
||||
}
|
||||
|
||||
@ -423,7 +423,6 @@ static const ym2610_interface ym2610_config =
|
||||
|
||||
MACHINE_START_MEMBER(_2mindril_state,drill)
|
||||
{
|
||||
|
||||
save_item(NAME(m_defender_sensor));
|
||||
save_item(NAME(m_shutter_sensor));
|
||||
}
|
||||
|
||||
@ -1440,7 +1440,7 @@ DRIVER_INIT_MEMBER(_39in1_state,39in1)
|
||||
{
|
||||
m_dmadac[0] = machine().device<dmadac_sound_device>("dac1");
|
||||
m_dmadac[1] = machine().device<dmadac_sound_device>("dac2");
|
||||
|
||||
|
||||
address_space &space = m_maincpu->space(AS_PROGRAM);
|
||||
space.install_read_handler (0xa0151648, 0xa015164b, read32_delegate(FUNC(_39in1_state::prot_cheater_r), this));
|
||||
}
|
||||
|
||||
@ -968,7 +968,6 @@ static const msm5232_interface msm5232_config =
|
||||
|
||||
MACHINE_START_MEMBER(fortyl_state,40love)
|
||||
{
|
||||
|
||||
/* video */
|
||||
save_item(NAME(m_pix1));
|
||||
save_item(NAME(m_pix2));
|
||||
|
||||
@ -1862,7 +1862,6 @@ static const ym3812_interface ym3812_config =
|
||||
|
||||
MACHINE_START_MEMBER(alpha68k_state,common)
|
||||
{
|
||||
|
||||
save_item(NAME(m_trigstate));
|
||||
save_item(NAME(m_deposits1));
|
||||
save_item(NAME(m_deposits2));
|
||||
|
||||
@ -240,7 +240,6 @@ GFXDECODE_END
|
||||
|
||||
void amspdwy_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_flipscreen));
|
||||
save_item(NAME(m_wheel_old));
|
||||
save_item(NAME(m_wheel_return));
|
||||
|
||||
@ -569,7 +569,6 @@ GFXDECODE_END
|
||||
|
||||
void angelkds_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_layer_ctrl));
|
||||
save_item(NAME(m_txbank));
|
||||
save_item(NAME(m_bgbotbank));
|
||||
|
||||
@ -287,7 +287,6 @@ GFXDECODE_END
|
||||
|
||||
void aquarium_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_aquarium_snd_ack));
|
||||
}
|
||||
|
||||
|
||||
@ -326,7 +326,6 @@ static const msm5205_interface msm5205_config =
|
||||
|
||||
void ashnojoe_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_adpcm_byte));
|
||||
save_item(NAME(m_soundlatch_status));
|
||||
save_item(NAME(m_msm5205_vclk_toggle));
|
||||
|
||||
@ -506,7 +506,6 @@ GFXDECODE_END
|
||||
|
||||
void atarifb_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_CTRLD));
|
||||
save_item(NAME(m_sign_x_1));
|
||||
save_item(NAME(m_sign_x_2));
|
||||
|
||||
@ -148,7 +148,7 @@ WRITE64_MEMBER(atvtrack_state::area1_w)
|
||||
// old = m_area1_data[addr];
|
||||
m_area1_data[addr] = dat;
|
||||
if (addr == (0x00020000-0x00020000)/4) {
|
||||
if (data & 4) {
|
||||
if (data & 4) {
|
||||
m_subcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
|
||||
@ -266,7 +266,6 @@ static const ym3526_interface ym3526_config =
|
||||
|
||||
void battlane_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_video_ctrl));
|
||||
save_item(NAME(m_cpu_control));
|
||||
}
|
||||
|
||||
@ -390,7 +390,6 @@ static const ay8910_interface ay8910_config =
|
||||
|
||||
void bking_state::machine_start()
|
||||
{
|
||||
|
||||
/* video */
|
||||
save_item(NAME(m_pc3259_output));
|
||||
save_item(NAME(m_pc3259_mask));
|
||||
|
||||
@ -271,7 +271,6 @@ WRITE_LINE_MEMBER(blockout_state::irq_handler)
|
||||
|
||||
void blockout_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_color));
|
||||
}
|
||||
|
||||
|
||||
@ -428,7 +428,6 @@ GFXDECODE_END
|
||||
|
||||
void boxer_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_pot_state));
|
||||
save_item(NAME(m_pot_latch));
|
||||
}
|
||||
|
||||
@ -363,7 +363,6 @@ static const ym3526_interface ym3526_config =
|
||||
|
||||
void brkthru_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_bgscroll));
|
||||
save_item(NAME(m_bgbasecolor));
|
||||
save_item(NAME(m_flipscreen));
|
||||
|
||||
@ -1240,7 +1240,6 @@ DISCRETE_SOUND_END
|
||||
|
||||
MACHINE_START_MEMBER(btime_state,btime)
|
||||
{
|
||||
|
||||
save_item(NAME(m_btime_palette));
|
||||
save_item(NAME(m_bnj_scroll1));
|
||||
save_item(NAME(m_bnj_scroll2));
|
||||
|
||||
@ -331,7 +331,6 @@ GFXDECODE_END
|
||||
|
||||
void bwing_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_palatch));
|
||||
save_item(NAME(m_srbank));
|
||||
save_item(NAME(m_mapmask));
|
||||
|
||||
@ -925,9 +925,9 @@ static MACHINE_CONFIG_START( calchase, calchase_state )
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
|
||||
MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
|
||||
|
||||
|
||||
MCFG_KBDC8042_ADD("kbdc", at8042)
|
||||
|
||||
|
||||
/* video hardware */
|
||||
MCFG_FRAGMENT_ADD( pcvideo_trident_vga )
|
||||
|
||||
|
||||
@ -334,7 +334,6 @@ static const ym2203_interface ym2203_config =
|
||||
|
||||
void capbowl_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_blitter_addr));
|
||||
save_item(NAME(m_last_trackball_val[0]));
|
||||
save_item(NAME(m_last_trackball_val[1]));
|
||||
|
||||
@ -1777,7 +1777,6 @@ GFXDECODE_END
|
||||
|
||||
MACHINE_START_MEMBER(cave_state,cave)
|
||||
{
|
||||
|
||||
save_item(NAME(m_soundbuf_len));
|
||||
save_item(NAME(m_soundbuf_data));
|
||||
|
||||
|
||||
@ -578,7 +578,6 @@ MACHINE_START_MEMBER(champbas_state,champbas)
|
||||
|
||||
MACHINE_START_MEMBER(champbas_state,exctsccr)
|
||||
{
|
||||
|
||||
// FIXME
|
||||
machine().scheduler().timer_pulse(attotime::from_hz(75), timer_expired_delegate(FUNC(champbas_state::exctsccr_fm_callback),this)); /* updates fm */
|
||||
|
||||
|
||||
@ -385,7 +385,6 @@ static const ym2203_interface ym2203_config =
|
||||
|
||||
void chanbara_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_scroll));
|
||||
save_item(NAME(m_scrollhi));
|
||||
}
|
||||
|
||||
@ -239,7 +239,7 @@ WRITE8_MEMBER(chinagat_state::saiyugoub1_adpcm_rom_addr_w )
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(chinagat_state::saiyugoub1_adpcm_control_w )
|
||||
{
|
||||
{
|
||||
/* i8748 Port 2 write */
|
||||
UINT8 *saiyugoub1_adpcm_rom = memregion("adpcm")->base();
|
||||
|
||||
@ -291,7 +291,7 @@ WRITE8_MEMBER(chinagat_state::saiyugoub1_m5205_clk_w )
|
||||
/* to the xtal pins of the MSM5205 */
|
||||
|
||||
/* Actually, T0 output clk mode is not supported by the i8048 core */
|
||||
#if 0
|
||||
#if 0
|
||||
m_m5205_clk++;
|
||||
if (m_m5205_clk == 8)
|
||||
{
|
||||
|
||||
@ -188,7 +188,6 @@ static const ym2203_interface ym2203_config =
|
||||
|
||||
void citycon_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_bg_image));
|
||||
}
|
||||
|
||||
|
||||
@ -225,7 +225,6 @@ INTERRUPT_GEN_MEMBER(commando_state::commando_interrupt)
|
||||
|
||||
void commando_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_scroll_x));
|
||||
save_item(NAME(m_scroll_y));
|
||||
}
|
||||
|
||||
@ -425,7 +425,6 @@ GFXDECODE_END
|
||||
|
||||
void cop01_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_pulse));
|
||||
save_item(NAME(m_timer));
|
||||
save_item(NAME(m_vreg));
|
||||
|
||||
@ -1240,7 +1240,6 @@ GFXDECODE_END
|
||||
|
||||
MACHINE_START_MEMBER(cps_state,cps2)
|
||||
{
|
||||
|
||||
if (m_audiocpu != NULL) // gigaman2 has no audiocpu
|
||||
membank("bank1")->configure_entries(0, (QSOUND_SIZE - 0x10000) / 0x4000, memregion("audiocpu")->base() + 0x10000, 0x4000);
|
||||
}
|
||||
|
||||
@ -73,7 +73,6 @@ WRITE8_MEMBER(crgolf_state::rom_bank_select_w)
|
||||
|
||||
void crgolf_state::machine_start()
|
||||
{
|
||||
|
||||
/* configure the banking */
|
||||
membank("bank1")->configure_entries(0, 16, memregion("maincpu")->base() + 0x10000, 0x2000);
|
||||
membank("bank1")->set_entry(0);
|
||||
|
||||
@ -328,7 +328,6 @@ static const ym3812_interface ym3812_config =
|
||||
|
||||
void crospang_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_bestri_tilebank));
|
||||
|
||||
}
|
||||
|
||||
@ -85,7 +85,7 @@ public:
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(csplayh5_irq);
|
||||
DECLARE_WRITE_LINE_MEMBER(csplayh5_vdp0_interrupt);
|
||||
required_device<dac_device> m_dac1;
|
||||
required_device<dac_device> m_dac2;
|
||||
required_device<dac_device> m_dac2;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -42,7 +42,7 @@ public:
|
||||
required_device<simutrek_special_device> m_laserdisc;
|
||||
required_device<cpu_device> m_rotatecpu;
|
||||
required_device<cpu_device> m_linecpu;
|
||||
required_device<cpu_device> m_soundcpu;
|
||||
required_device<cpu_device> m_soundcpu;
|
||||
rgb_t *m_colormap;
|
||||
DECLARE_WRITE16_MEMBER(palette_w);
|
||||
DECLARE_READ16_MEMBER(line_r);
|
||||
|
||||
@ -56,7 +56,7 @@ public:
|
||||
required_shared_ptr<UINT8> m_bgvideoram;
|
||||
required_shared_ptr<UINT8> m_fgvideoram;
|
||||
required_shared_ptr<UINT8> m_spriteram;
|
||||
|
||||
|
||||
optional_device<msm5205_device> m_msm;
|
||||
|
||||
/* video-related */
|
||||
|
||||
@ -450,7 +450,6 @@ INTERRUPT_GEN_MEMBER(ddayjlc_state::ddayjlc_snd_interrupt)
|
||||
|
||||
void ddayjlc_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_char_bank));
|
||||
save_item(NAME(m_bgadr));
|
||||
save_item(NAME(m_sound_nmi_enable));
|
||||
|
||||
@ -540,7 +540,6 @@ TIMER_DEVICE_CALLBACK_MEMBER(ddragon3_state::ddragon3_scanline)
|
||||
|
||||
void ddragon3_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_vreg));
|
||||
save_item(NAME(m_bg_scrollx));
|
||||
save_item(NAME(m_bg_scrolly));
|
||||
|
||||
@ -433,7 +433,6 @@ void destroyr_state::palette_init()
|
||||
|
||||
void destroyr_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_cursor));
|
||||
save_item(NAME(m_wavemod));
|
||||
save_item(NAME(m_attract));
|
||||
|
||||
@ -456,7 +456,6 @@ GFXDECODE_END
|
||||
|
||||
void discoboy_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_ram_bank));
|
||||
save_item(NAME(m_port_00));
|
||||
save_item(NAME(m_gfxbank));
|
||||
|
||||
@ -55,7 +55,7 @@ public:
|
||||
m_22vp932(*this, "ld_22vp932") ,
|
||||
m_videoram(*this, "videoram"),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_beeper(*this, "beeper") { }
|
||||
m_beeper(*this, "beeper") { }
|
||||
|
||||
void laserdisc_data_w(UINT8 data)
|
||||
{
|
||||
|
||||
@ -207,7 +207,6 @@ GFXDECODE_END
|
||||
|
||||
void dogfgt_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_bm_plane));
|
||||
save_item(NAME(m_lastflip));
|
||||
save_item(NAME(m_pixcolor));
|
||||
|
||||
@ -394,7 +394,6 @@ GFXDECODE_END
|
||||
|
||||
void egghunt_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_gfx_banking));
|
||||
save_item(NAME(m_okibanking));
|
||||
save_item(NAME(m_vidram_bank));
|
||||
|
||||
@ -54,7 +54,6 @@ void espial_state::machine_reset()
|
||||
|
||||
void espial_state::machine_start()
|
||||
{
|
||||
|
||||
//state_save_register_global_array(machine(), mcu_out[1]);
|
||||
save_item(NAME(m_sound_nmi_enabled));
|
||||
}
|
||||
|
||||
@ -379,7 +379,6 @@ static const ay8910_interface ay8910_config =
|
||||
|
||||
void exerion_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_porta));
|
||||
save_item(NAME(m_portb));
|
||||
save_item(NAME(m_cocktail_flip));
|
||||
|
||||
@ -257,7 +257,6 @@ GFXDECODE_END
|
||||
|
||||
void fcombat_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_cocktail_flip));
|
||||
save_item(NAME(m_char_palette));
|
||||
save_item(NAME(m_sprite_palette));
|
||||
|
||||
@ -1382,7 +1382,6 @@ MACHINE_START_MEMBER(cps_state,sgyxz)
|
||||
|
||||
MACHINE_START_MEMBER(cps_state,kodb)
|
||||
{
|
||||
|
||||
m_layer_enable_reg = 0x20;
|
||||
m_layer_mask_reg[0] = 0x2e;
|
||||
m_layer_mask_reg[1] = 0x2c;
|
||||
|
||||
@ -375,7 +375,6 @@ void flyball_state::palette_init()
|
||||
|
||||
void flyball_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_pitcher_vert));
|
||||
save_item(NAME(m_pitcher_horz));
|
||||
save_item(NAME(m_pitcher_pic));
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
"Fruit" (c) ???? (DOSBox runs it with half the screen missing)
|
||||
|
||||
preliminary driver by R. Belmont
|
||||
|
||||
|
||||
Hardware:
|
||||
- ST STPCD0166BTC3 486/66 + PC + VGA all on one chip
|
||||
- 4x AS4LC1M16E5-60TC 1M x 16 EDO DRAM
|
||||
@ -553,9 +553,9 @@ static MACHINE_CONFIG_START( fruitpc, fruitpc_state )
|
||||
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
|
||||
|
||||
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
|
||||
|
||||
|
||||
MCFG_KBDC8042_ADD("kbdc", at8042)
|
||||
|
||||
|
||||
/* video hardware */
|
||||
MCFG_FRAGMENT_ADD( pcvideo_vga )
|
||||
|
||||
@ -569,9 +569,9 @@ DRIVER_INIT_MEMBER(fruitpc_state,fruitpc)
|
||||
|
||||
ROM_START( fruitpc )
|
||||
ROM_REGION( 0x20000, "bios", 0 )
|
||||
ROM_LOAD( "at-gs001.bin", 0x000000, 0x020000, CRC(7dec34d0) SHA1(81d194d67fef9f6531bd3cd1ee0baacb5c2558bf) )
|
||||
ROM_LOAD( "at-gs001.bin", 0x000000, 0x020000, CRC(7dec34d0) SHA1(81d194d67fef9f6531bd3cd1ee0baacb5c2558bf) )
|
||||
|
||||
DISK_REGION( "drive_0" ) // 8 MB Compact Flash card
|
||||
DISK_REGION( "drive_0" ) // 8 MB Compact Flash card
|
||||
DISK_IMAGE( "fruit", 0,SHA1(df250ff06a97fa141a4144034f7035ac2947c53c) )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1144,7 +1144,7 @@ static MACHINE_CONFIG_START( funkball, funkball_state )
|
||||
MCFG_IDE_CONTROLLER_IRQ_HANDLER(DEVWRITELINE("pic8259_2", pic8259_device, ir6_w))
|
||||
|
||||
MCFG_KBDC8042_ADD("kbdc", at8042)
|
||||
|
||||
|
||||
/* video hardware */
|
||||
MCFG_3DFX_VOODOO_1_ADD("voodoo_0", STD_VOODOO_1_CLOCK, voodoo_intf)
|
||||
|
||||
|
||||
@ -306,7 +306,6 @@ MACHINE_RESET_MEMBER(gaiden_state,raiga)
|
||||
|
||||
MACHINE_START_MEMBER(gaiden_state,raiga)
|
||||
{
|
||||
|
||||
save_item(NAME(m_prot));
|
||||
save_item(NAME(m_jumpcode));
|
||||
|
||||
|
||||
@ -730,7 +730,7 @@ static MACHINE_CONFIG_START( gamecstl, gamecstl_state )
|
||||
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
|
||||
|
||||
MCFG_KBDC8042_ADD("kbdc", at8042)
|
||||
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
|
||||
@ -80,7 +80,7 @@ public:
|
||||
m_pic8259_1(*this, "pic8259_1" ),
|
||||
m_pic8259_2(*this, "pic8259_2" ),
|
||||
m_dma8237_1(*this, "dma8237_1" ),
|
||||
m_dma8237_2(*this, "dma8237_2" ),
|
||||
m_dma8237_2(*this, "dma8237_2" ),
|
||||
m_maincpu(*this, "maincpu") { }
|
||||
|
||||
int m_dma_channel;
|
||||
@ -120,10 +120,10 @@ public:
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack0_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack2_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack3_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc_dack3_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(gammagic_pic8259_1_set_int_line);
|
||||
DECLARE_READ8_MEMBER(get_slave_ack);
|
||||
|
||||
|
||||
virtual void machine_start();
|
||||
virtual void machine_reset();
|
||||
void atapi_init();
|
||||
@ -781,7 +781,7 @@ static MACHINE_CONFIG_START( gammagic, gammagic_state )
|
||||
// MCFG_PCI_BUS_DEVICE(1, "i82371sb", i82371sb_pci_read, i82371sb_pci_write)
|
||||
/* video hardware */
|
||||
MCFG_FRAGMENT_ADD( pcvideo_vga )
|
||||
|
||||
|
||||
MCFG_KBDC8042_ADD("kbdc", at8042)
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -86,7 +86,7 @@ public:
|
||||
m_system_memory(*this, "systememory"),
|
||||
m_i2cmem(*this, "i2cmem"),
|
||||
m_s3c2410(*this, "s3c2410"),
|
||||
m_maincpu(*this, "maincpu") { }
|
||||
m_maincpu(*this, "maincpu") { }
|
||||
|
||||
required_shared_ptr<UINT32> m_system_memory;
|
||||
required_device<i2cmem_device> m_i2cmem;
|
||||
@ -599,7 +599,7 @@ void ghosteo_state::machine_start()
|
||||
|
||||
void ghosteo_state::machine_reset()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4d000010, 0x4d000013,read32_delegate(FUNC(ghosteo_state::bballoon_speedup_r), this));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x4d000010, 0x4d000013,read32_delegate(FUNC(ghosteo_state::bballoon_speedup_r), this));
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_START( ghosteo, ghosteo_state )
|
||||
|
||||
@ -228,7 +228,6 @@ GFXDECODE_END
|
||||
|
||||
void ginganin_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_layers_ctrl));
|
||||
save_item(NAME(m_flipscreen));
|
||||
}
|
||||
|
||||
@ -278,7 +278,7 @@ WRITE_LINE_MEMBER(gladiatr_state::gladiator_ym_irq)
|
||||
|
||||
/*Sound Functions*/
|
||||
WRITE8_MEMBER(gladiatr_state::glad_adpcm_w)
|
||||
{
|
||||
{
|
||||
UINT8 *rom = memregion("audiocpu")->base() + 0x10000;
|
||||
|
||||
/* bit6 = bank offset */
|
||||
|
||||
@ -189,7 +189,7 @@
|
||||
|
||||
|
||||
#define MASTER_CLOCK XTAL_10MHz
|
||||
#define SND_CLOCK XTAL_3_579545MHz
|
||||
#define SND_CLOCK XTAL_3_579545MHz
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/m6502/m6502.h"
|
||||
@ -250,8 +250,8 @@ TILE_GET_INFO_MEMBER(gluck2_state::get_gluck2_tile_info)
|
||||
*/
|
||||
int attr = m_colorram[tile_index];
|
||||
int code = m_videoram[tile_index];
|
||||
int bank = ((attr & 0xc0) >> 5 ) + ((attr & 0x02) >> 1 ); /* bits 1-6-7 handle the gfx banks */
|
||||
int color = (attr & 0x3c) >> 2; /* bits 2-3-4-5 handle the color */
|
||||
int bank = ((attr & 0xc0) >> 5 ) + ((attr & 0x02) >> 1 ); /* bits 1-6-7 handle the gfx banks */
|
||||
int color = (attr & 0x3c) >> 2; /* bits 2-3-4-5 handle the color */
|
||||
|
||||
SET_TILE_INFO_MEMBER(bank, code, color, 0);
|
||||
}
|
||||
@ -337,7 +337,7 @@ static ADDRESS_MAP_START( gluck2_map, AS_PROGRAM, 8, gluck2_state )
|
||||
AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("nvram")
|
||||
AM_RANGE(0x0800, 0x0800) AM_DEVWRITE("crtc", mc6845_device, address_w)
|
||||
AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
|
||||
AM_RANGE(0x0844, 0x084b) AM_NOP /* see below */
|
||||
AM_RANGE(0x0844, 0x084b) AM_NOP /* see below */
|
||||
AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(gluck2_videoram_w) AM_SHARE("videoram") /* 6116 #1 (2K x 8) RAM (only 1st half used) */
|
||||
AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(gluck2_colorram_w) AM_SHARE("colorram") /* 6116 #2 (2K x 8) RAM (only 1st half used) */
|
||||
AM_RANGE(0x2000, 0x2000) AM_READ_PORT("SW1")
|
||||
@ -367,7 +367,7 @@ static INPUT_PORTS_START( gluck2 )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_CANCEL )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Note In")
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Note In")
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
|
||||
|
||||
@ -391,78 +391,78 @@ static INPUT_PORTS_START( gluck2 )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset")
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("SW1") // 2000
|
||||
PORT_DIPNAME( 0x01, 0x01, "Paytable" ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_START("SW1") // 2000
|
||||
PORT_DIPNAME( 0x01, 0x01, "Paytable" ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_DIPSETTING( 0x01, "Strings and Numbers" )
|
||||
PORT_DIPSETTING( 0x00, "Only Numbers" )
|
||||
PORT_DIPNAME( 0x02, 0x02, "SW1:2" ) PORT_DIPLOCATION("SW1:2")
|
||||
PORT_DIPNAME( 0x02, 0x02, "SW1:2" ) PORT_DIPLOCATION("SW1:2")
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "SW1:3" ) PORT_DIPLOCATION("SW1:3")
|
||||
PORT_DIPNAME( 0x04, 0x04, "SW1:3" ) PORT_DIPLOCATION("SW1:3")
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, "SW1:4" ) PORT_DIPLOCATION("SW1:4")
|
||||
PORT_DIPNAME( 0x08, 0x08, "SW1:4" ) PORT_DIPLOCATION("SW1:4")
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "SW1:5" ) PORT_DIPLOCATION("SW1:5")
|
||||
PORT_DIPNAME( 0x10, 0x10, "SW1:5" ) PORT_DIPLOCATION("SW1:5")
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "SW1:6" ) PORT_DIPLOCATION("SW1:6")
|
||||
PORT_DIPNAME( 0x20, 0x20, "SW1:6" ) PORT_DIPLOCATION("SW1:6")
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "SW1:7" ) PORT_DIPLOCATION("SW1:7")
|
||||
PORT_DIPNAME( 0x40, 0x40, "SW1:7" ) PORT_DIPLOCATION("SW1:7")
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "SW1:8" ) PORT_DIPLOCATION("SW1:8")
|
||||
PORT_DIPNAME( 0x80, 0x80, "SW1:8" ) PORT_DIPLOCATION("SW1:8")
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
PORT_START("SW2") // 3D01: AY8910 port B
|
||||
PORT_DIPNAME( 0x01, 0x01, "SW2:8" ) PORT_DIPLOCATION("SW2:8")
|
||||
PORT_START("SW2") // 3D01: AY8910 port B
|
||||
PORT_DIPNAME( 0x01, 0x01, "SW2:8" ) PORT_DIPLOCATION("SW2:8")
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x06, 0x02, "Bet Max" ) PORT_DIPLOCATION("SW2:7, 6")
|
||||
PORT_DIPNAME( 0x06, 0x02, "Bet Max" ) PORT_DIPLOCATION("SW2:7, 6")
|
||||
PORT_DIPSETTING( 0x00, "10" )
|
||||
PORT_DIPSETTING( 0x02, "20" )
|
||||
PORT_DIPSETTING( 0x04, "30" )
|
||||
PORT_DIPSETTING( 0x06, "40" )
|
||||
PORT_DIPNAME( 0x08, 0x08, "SW2:5" ) PORT_DIPLOCATION("SW2:5")
|
||||
PORT_DIPNAME( 0x08, 0x08, "SW2:5" ) PORT_DIPLOCATION("SW2:5")
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, "SW2:4" ) PORT_DIPLOCATION("SW2:4")
|
||||
PORT_DIPNAME( 0x10, 0x10, "SW2:4" ) PORT_DIPLOCATION("SW2:4")
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, "SW2:3" ) PORT_DIPLOCATION("SW2:3")
|
||||
PORT_DIPNAME( 0x20, 0x20, "SW2:3" ) PORT_DIPLOCATION("SW2:3")
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0xc0, 0xc0, "Note In" ) PORT_DIPLOCATION("SW2:2, 1")
|
||||
PORT_DIPNAME( 0xc0, 0xc0, "Note In" ) PORT_DIPLOCATION("SW2:2, 1")
|
||||
PORT_DIPSETTING( 0x00, "10" )
|
||||
PORT_DIPSETTING( 0x40, "20" )
|
||||
PORT_DIPSETTING( 0x80, "50" )
|
||||
PORT_DIPSETTING( 0xc0, "100" )
|
||||
|
||||
PORT_START("SW3") // 3D01: AY8910 port A
|
||||
PORT_DIPNAME( 0x01, 0x01, "SW3:1" ) PORT_DIPLOCATION("SW3:1")
|
||||
PORT_START("SW3") // 3D01: AY8910 port A
|
||||
PORT_DIPNAME( 0x01, 0x01, "SW3:1" ) PORT_DIPLOCATION("SW3:1")
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, "SW3:8" ) PORT_DIPLOCATION("SW3:8")
|
||||
PORT_DIPNAME( 0x02, 0x02, "SW3:8" ) PORT_DIPLOCATION("SW3:8")
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, "Graphics" ) PORT_DIPLOCATION("SW3:7")
|
||||
PORT_DIPNAME( 0x04, 0x04, "Graphics" ) PORT_DIPLOCATION("SW3:7")
|
||||
PORT_DIPSETTING( 0x04, "Turtles" )
|
||||
PORT_DIPSETTING( 0x00, "Cards" )
|
||||
PORT_DIPNAME( 0x18, 0x18, "Coin In" ) PORT_DIPLOCATION("SW3:6, 5")
|
||||
PORT_DIPNAME( 0x18, 0x18, "Coin In" ) PORT_DIPLOCATION("SW3:6, 5")
|
||||
PORT_DIPSETTING( 0x00, "1" )
|
||||
PORT_DIPSETTING( 0x08, "2" )
|
||||
PORT_DIPSETTING( 0x10, "5" )
|
||||
PORT_DIPSETTING( 0x18, "10" )
|
||||
PORT_DIPNAME( 0x20, 0x20, "SW3:4" ) PORT_DIPLOCATION("SW3:4")
|
||||
PORT_DIPNAME( 0x20, 0x20, "SW3:4" ) PORT_DIPLOCATION("SW3:4")
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "SW3:3" ) PORT_DIPLOCATION("SW3:3")
|
||||
PORT_DIPNAME( 0x40, 0x40, "SW3:3" ) PORT_DIPLOCATION("SW3:3")
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "SW3:2" ) PORT_DIPLOCATION("SW3:2")
|
||||
PORT_DIPNAME( 0x80, 0x80, "SW3:2" ) PORT_DIPLOCATION("SW3:2")
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
@ -476,7 +476,7 @@ INPUT_PORTS_END
|
||||
static const gfx_layout tilelayout =
|
||||
{
|
||||
8, 8,
|
||||
256, // 0x100 tiles per bank.
|
||||
256, // 0x100 tiles per bank.
|
||||
3,
|
||||
{ 0, RGN_FRAC(1,3), RGN_FRAC(2,3) },
|
||||
{ 0, 1, 2, 3, 4, 5, 6, 7 },
|
||||
@ -535,7 +535,7 @@ static const ay8910_interface ay8910_intf =
|
||||
/* Output ports have a minimal activity during init.
|
||||
They seems unused (at least for Good Luck II)
|
||||
*/
|
||||
DEVCB_NULL,
|
||||
DEVCB_NULL,
|
||||
DEVCB_NULL
|
||||
};
|
||||
|
||||
@ -574,7 +574,7 @@ static MACHINE_CONFIG_START( gluck2, gluck2_state )
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
|
||||
MCFG_SOUND_ADD("ay8910", AY8910, MASTER_CLOCK/8) /* guess */
|
||||
MCFG_SOUND_ADD("ay8910", AY8910, MASTER_CLOCK/8) /* guess */
|
||||
MCFG_SOUND_CONFIG(ay8910_intf)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
|
||||
@ -597,7 +597,7 @@ ROM_START( gluck2 )
|
||||
ROM_LOAD( "2.u32", 0x08000, 0x8000, CRC(6a621a98) SHA1(9c83eab9f0858735e0176e5335651dd2dc620229) )
|
||||
ROM_LOAD( "1.u31", 0x10000, 0x8000, CRC(ea33db1a) SHA1(69c67944f5e8bd060335b5e14628c0e0828271a4) )
|
||||
|
||||
ROM_REGION( 0x0300, "proms", 0 ) // RGB
|
||||
ROM_REGION( 0x0300, "proms", 0 ) // RGB
|
||||
ROM_LOAD( "v1.u27", 0x0000, 0x0100, CRC(1aa5479f) SHA1(246cc99e7b351d5546060807b8a0b8acfe2f8e39) )
|
||||
ROM_LOAD( "v2.u26", 0x0100, 0x0100, CRC(8da53489) SHA1(b90f5dd4bc5b64009e8bfad8f79f23d4020e537b) )
|
||||
ROM_LOAD( "v3.u25", 0x0200, 0x0100, CRC(a4d2c9c3) SHA1(a799875b8b92391696419081244da2e56216e024) )
|
||||
|
||||
@ -236,7 +236,6 @@ GFXDECODE_END
|
||||
|
||||
void gotcha_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_banksel));
|
||||
save_item(NAME(m_gfxbank));
|
||||
save_item(NAME(m_scroll));
|
||||
|
||||
@ -135,7 +135,6 @@ TIMER_CALLBACK_MEMBER(gridlee_state::firq_timer_tick)
|
||||
|
||||
void gridlee_state::machine_start()
|
||||
{
|
||||
|
||||
/* create the polynomial tables */
|
||||
poly17_init();
|
||||
|
||||
|
||||
@ -665,7 +665,7 @@ ROM_START( braveff )
|
||||
ROM_LOAD32_WORD( "epr-21994.ic29", 0x000000, 0x200000, CRC(31b0a754) SHA1(b49c998a15fbc790b780ed6665a56681d4edd369) )
|
||||
ROM_LOAD32_WORD( "epr-21995.ic30", 0x000002, 0x200000, CRC(bcccb56b) SHA1(6e7a69934e5b47495ae8e90c57759573bc519d24) )
|
||||
ROM_LOAD32_WORD( "epr-21996.ic31", 0x400000, 0x200000, CRC(a8f88e17) SHA1(dbbd2a73335c740bcf2ff9680c575841af29b340) )
|
||||
ROM_LOAD32_WORD( "epr-21997.ic32", 0x400002, 0x200000, CRC(36641a7f) SHA1(37931bde1ddebef61fa6d8caca3cb67328fd0b90) )
|
||||
ROM_LOAD32_WORD( "epr-21997.ic32", 0x400002, 0x200000, CRC(36641a7f) SHA1(37931bde1ddebef61fa6d8caca3cb67328fd0b90) )
|
||||
ROM_LOAD32_WORD( "epr-21998.ic33", 0x800000, 0x200000, CRC(bd1df696) SHA1(fd937894763fab5cb50f33c40f8047e0d3adc93b) )
|
||||
ROM_LOAD32_WORD( "epr-21999.ic34", 0x800002, 0x200000, CRC(9425eee0) SHA1(0f6a23163022bbd7ec54dd638094f3e317a87919) )
|
||||
/* ic35 unpopulated */
|
||||
@ -673,30 +673,30 @@ ROM_START( braveff )
|
||||
|
||||
/* ROM board using 64M SOP44 MASKROM */
|
||||
ROM_REGION( 0xc000000, "user2", ROMREGION_ERASE00)
|
||||
ROM_LOAD( "mpr-22000.ic37", 0x0000000, 0x800000, CRC(53d641d6) SHA1(f47d7c77d0e36c4ec3b7171fd7a017f9f58ca5a0) )
|
||||
ROM_LOAD( "mpr-22001.ic38", 0x0800000, 0x800000, CRC(234bc48f) SHA1(177c46884de0ba4bac1f9b778f99c905410a9345) )
|
||||
ROM_LOAD( "mpr-22002.ic39", 0x1000000, 0x800000, CRC(d8f3aa9e) SHA1(f73208034fdd51fed086e912cb8580d2270122b6) )
|
||||
ROM_LOAD( "mpr-22003.ic40", 0x1800000, 0x800000, CRC(2560fe98) SHA1(9bb5ffb6212ec6aa3f92e437eb424141f3b15e43) )
|
||||
ROM_LOAD( "mpr-22004.ic41", 0x2000000, 0x800000, CRC(4e24d71d) SHA1(503344dd8cdd8e65ec7c801b0efae83b3f1f9ae2) )
|
||||
ROM_LOAD( "mpr-22005.ic42", 0x2800000, 0x800000, CRC(2b96c97f) SHA1(707070c85f4b044236694daa13970c241b242d4d) )
|
||||
ROM_LOAD( "mpr-22006.ic43", 0x3000000, 0x800000, CRC(f793a3ba) SHA1(80acd1d4f71cafd7328ff9b9ce30e5169b8f4f8c) )
|
||||
ROM_LOAD( "mpr-22007.ic44", 0x3800000, 0x800000, CRC(62616e31) SHA1(dbe0d4b8fc085ed97884c105fd527af5cd8fbe79) )
|
||||
ROM_LOAD( "mpr-22008.ic45", 0x4000000, 0x800000, CRC(e6905de8) SHA1(6bb4e43b1394788add15f0b78ccd5ab14f86516c) )
|
||||
ROM_LOAD( "mpr-22009.ic46", 0x4800000, 0x800000, CRC(c37dfa5c) SHA1(5a3a5f2eb5a13831e36ca215147ec3c9740c50fc) )
|
||||
ROM_LOAD( "mpr-22010.ic47", 0x5000000, 0x800000, CRC(b570b46c) SHA1(6e512fd1a2c8835f6aee307865b42d57ddf90ef5) )
|
||||
ROM_LOAD( "mpr-22011.ic48", 0x5800000, 0x800000, CRC(d1f5fb58) SHA1(08a1282e00bda52d8d938225c65f67d22abfea05) )
|
||||
ROM_LOAD( "mpr-22012.ic49", 0x6000000, 0x800000, CRC(3ab79029) SHA1(d4708446ba700d5f7c89827c80177ad2d1c0b222) )
|
||||
ROM_LOAD( "mpr-22013.ic50", 0x6800000, 0x800000, CRC(42d8d00b) SHA1(ddce3c95258d8cf51792f2115f89ca658ffe97b6) )
|
||||
ROM_LOAD( "mpr-22014.ic51", 0x7000000, 0x800000, CRC(0f49c00f) SHA1(877c654268edc9526ae3e21e21e3ecca706f300b) )
|
||||
ROM_LOAD( "mpr-22015.ic52", 0x7800000, 0x800000, CRC(d3696e61) SHA1(247161c99c7061b8f391543af1812764a82399cb) )
|
||||
ROM_LOAD( "mpr-22016.ic53s", 0x8000000, 0x800000, CRC(c1015e00) SHA1(f2ce2009d4f4f0f3cbfcce7a36fab2c54e738b07) )
|
||||
ROM_LOAD( "mpr-22017.ic54s", 0x8800000, 0x800000, CRC(222a7cb0) SHA1(9f98ae3f13f85fae4596b671ea508b07c2116ab6) )
|
||||
ROM_LOAD( "mpr-22018.ic55s", 0x9000000, 0x800000, CRC(f160e115) SHA1(ecf7f9f58fce6bff220568972ba7763537c9d7d7) )
|
||||
ROM_LOAD( "mpr-22019.ic56s", 0x9800000, 0x800000, CRC(468b2f10) SHA1(f3fc0af7d4dd3f30ba84e684f3d9c217730564bb) )
|
||||
ROM_LOAD( "mpr-22020.ic57s", 0xa000000, 0x800000, CRC(0c018d8a) SHA1(0447d7ad64061cca4c1231733e660ba51de5a216) )
|
||||
ROM_LOAD( "mpr-22021.ic58s", 0xa800000, 0x800000, CRC(43b08604) SHA1(681142d8b95b2f9664d70b23262a64938774d4e3) )
|
||||
ROM_LOAD( "mpr-22022.ic59s", 0xb000000, 0x800000, CRC(abd3d888) SHA1(9654c3a38feab46b4983a602831fb29cccdd0526) )
|
||||
ROM_LOAD( "mpr-22023.ic60s", 0xb800000, 0x800000, CRC(07f00869) SHA1(92282d09d72d3e65a91128e06bb0d4426bb90be5) )
|
||||
ROM_LOAD( "mpr-22000.ic37", 0x0000000, 0x800000, CRC(53d641d6) SHA1(f47d7c77d0e36c4ec3b7171fd7a017f9f58ca5a0) )
|
||||
ROM_LOAD( "mpr-22001.ic38", 0x0800000, 0x800000, CRC(234bc48f) SHA1(177c46884de0ba4bac1f9b778f99c905410a9345) )
|
||||
ROM_LOAD( "mpr-22002.ic39", 0x1000000, 0x800000, CRC(d8f3aa9e) SHA1(f73208034fdd51fed086e912cb8580d2270122b6) )
|
||||
ROM_LOAD( "mpr-22003.ic40", 0x1800000, 0x800000, CRC(2560fe98) SHA1(9bb5ffb6212ec6aa3f92e437eb424141f3b15e43) )
|
||||
ROM_LOAD( "mpr-22004.ic41", 0x2000000, 0x800000, CRC(4e24d71d) SHA1(503344dd8cdd8e65ec7c801b0efae83b3f1f9ae2) )
|
||||
ROM_LOAD( "mpr-22005.ic42", 0x2800000, 0x800000, CRC(2b96c97f) SHA1(707070c85f4b044236694daa13970c241b242d4d) )
|
||||
ROM_LOAD( "mpr-22006.ic43", 0x3000000, 0x800000, CRC(f793a3ba) SHA1(80acd1d4f71cafd7328ff9b9ce30e5169b8f4f8c) )
|
||||
ROM_LOAD( "mpr-22007.ic44", 0x3800000, 0x800000, CRC(62616e31) SHA1(dbe0d4b8fc085ed97884c105fd527af5cd8fbe79) )
|
||||
ROM_LOAD( "mpr-22008.ic45", 0x4000000, 0x800000, CRC(e6905de8) SHA1(6bb4e43b1394788add15f0b78ccd5ab14f86516c) )
|
||||
ROM_LOAD( "mpr-22009.ic46", 0x4800000, 0x800000, CRC(c37dfa5c) SHA1(5a3a5f2eb5a13831e36ca215147ec3c9740c50fc) )
|
||||
ROM_LOAD( "mpr-22010.ic47", 0x5000000, 0x800000, CRC(b570b46c) SHA1(6e512fd1a2c8835f6aee307865b42d57ddf90ef5) )
|
||||
ROM_LOAD( "mpr-22011.ic48", 0x5800000, 0x800000, CRC(d1f5fb58) SHA1(08a1282e00bda52d8d938225c65f67d22abfea05) )
|
||||
ROM_LOAD( "mpr-22012.ic49", 0x6000000, 0x800000, CRC(3ab79029) SHA1(d4708446ba700d5f7c89827c80177ad2d1c0b222) )
|
||||
ROM_LOAD( "mpr-22013.ic50", 0x6800000, 0x800000, CRC(42d8d00b) SHA1(ddce3c95258d8cf51792f2115f89ca658ffe97b6) )
|
||||
ROM_LOAD( "mpr-22014.ic51", 0x7000000, 0x800000, CRC(0f49c00f) SHA1(877c654268edc9526ae3e21e21e3ecca706f300b) )
|
||||
ROM_LOAD( "mpr-22015.ic52", 0x7800000, 0x800000, CRC(d3696e61) SHA1(247161c99c7061b8f391543af1812764a82399cb) )
|
||||
ROM_LOAD( "mpr-22016.ic53s", 0x8000000, 0x800000, CRC(c1015e00) SHA1(f2ce2009d4f4f0f3cbfcce7a36fab2c54e738b07) )
|
||||
ROM_LOAD( "mpr-22017.ic54s", 0x8800000, 0x800000, CRC(222a7cb0) SHA1(9f98ae3f13f85fae4596b671ea508b07c2116ab6) )
|
||||
ROM_LOAD( "mpr-22018.ic55s", 0x9000000, 0x800000, CRC(f160e115) SHA1(ecf7f9f58fce6bff220568972ba7763537c9d7d7) )
|
||||
ROM_LOAD( "mpr-22019.ic56s", 0x9800000, 0x800000, CRC(468b2f10) SHA1(f3fc0af7d4dd3f30ba84e684f3d9c217730564bb) )
|
||||
ROM_LOAD( "mpr-22020.ic57s", 0xa000000, 0x800000, CRC(0c018d8a) SHA1(0447d7ad64061cca4c1231733e660ba51de5a216) )
|
||||
ROM_LOAD( "mpr-22021.ic58s", 0xa800000, 0x800000, CRC(43b08604) SHA1(681142d8b95b2f9664d70b23262a64938774d4e3) )
|
||||
ROM_LOAD( "mpr-22022.ic59s", 0xb000000, 0x800000, CRC(abd3d888) SHA1(9654c3a38feab46b4983a602831fb29cccdd0526) )
|
||||
ROM_LOAD( "mpr-22023.ic60s", 0xb800000, 0x800000, CRC(07f00869) SHA1(92282d09d72d3e65a91128e06bb0d4426bb90be5) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( sgnascar )
|
||||
|
||||
@ -132,7 +132,7 @@ public:
|
||||
UINT32 screen_update_hvyunit(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void screen_eof_hvyunit(screen_device &screen, bool state);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(hvyunit_scanline);
|
||||
required_device<cpu_device> m_soundcpu;
|
||||
required_device<cpu_device> m_soundcpu;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -628,7 +628,6 @@ void hyprduel_state::machine_reset()
|
||||
|
||||
MACHINE_START_MEMBER(hyprduel_state,hyprduel)
|
||||
{
|
||||
|
||||
save_item(NAME(m_blitter_bit));
|
||||
save_item(NAME(m_requested_int));
|
||||
save_item(NAME(m_subcpu_resetline));
|
||||
|
||||
@ -356,7 +356,6 @@ static const ym2203_interface ym2203_config =
|
||||
|
||||
void ironhors_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_palettebank));
|
||||
save_item(NAME(m_charbank));
|
||||
save_item(NAME(m_spriterambank));
|
||||
|
||||
@ -5,37 +5,37 @@
|
||||
skeleton by R. Belmont
|
||||
|
||||
Known games on this hardware and their security chip IDs:
|
||||
* E2-LED0 (c) 2000 Golden Tee Fore!
|
||||
* E2-BBH0 (c) 2000 Big Buck Hunter
|
||||
* G42-US-U (c) 2001 Golden Tee Fore! 2002
|
||||
* BB15-US (c) 2002 Big Buck Hunter: Shooter's Challenge (AKA Big Buck Hunter v1.5)
|
||||
* BBH2-US (c) 2002 Big Buck Hunter II: Sportsman's Paradise
|
||||
* CK1-US (C) 2002 Carnival King
|
||||
* G43-US-U (c) 2002 Golden Tee Fore! 2003
|
||||
* G44-US-U (c) 2003 Golden Tee Fore! 2004
|
||||
* G45-US-U (c) 2004 Golden Tee Fore! 2005
|
||||
* CW-US-U (c) 2005 Big Buck Hunter: Call of the Wild
|
||||
* G4C-US-U (c) 2006 Golden Tee Complete
|
||||
* ???????? (c) ???? Virtual Pool (not on IT's website master list but known to exist)
|
||||
|
||||
Valid regions: US = USA, CAN = Canada, ENG = England, EUR = Euro, SWD = Sweden, AUS = Australia, NZ = New Zealand, SA = South Africa
|
||||
|
||||
* E2-LED0 (c) 2000 Golden Tee Fore!
|
||||
* E2-BBH0 (c) 2000 Big Buck Hunter
|
||||
* G42-US-U (c) 2001 Golden Tee Fore! 2002
|
||||
* BB15-US (c) 2002 Big Buck Hunter: Shooter's Challenge (AKA Big Buck Hunter v1.5)
|
||||
* BBH2-US (c) 2002 Big Buck Hunter II: Sportsman's Paradise
|
||||
* CK1-US (C) 2002 Carnival King
|
||||
* G43-US-U (c) 2002 Golden Tee Fore! 2003
|
||||
* G44-US-U (c) 2003 Golden Tee Fore! 2004
|
||||
* G45-US-U (c) 2004 Golden Tee Fore! 2005
|
||||
* CW-US-U (c) 2005 Big Buck Hunter: Call of the Wild
|
||||
* G4C-US-U (c) 2006 Golden Tee Complete
|
||||
* ???????? (c) ???? Virtual Pool (not on IT's website master list but known to exist)
|
||||
|
||||
Valid regions: US = USA, CAN = Canada, ENG = England, EUR = Euro, SWD = Sweden, AUS = Australia, NZ = New Zealand, SA = South Africa
|
||||
|
||||
Hardware overview:
|
||||
* NEC VR4310 CPU (similar to the N64's VR4300)
|
||||
* NEC VR4373 "Nile 3" system controller / PCI bridge
|
||||
* 3DFX Voodoo Banshee video
|
||||
* Creative/Ensoniq AudioPCI ES1373 audio
|
||||
* Atmel 90S2313 AVR-based microcontroller for protection
|
||||
* STM48T02 NVRAM
|
||||
* Conexant CX88168 modem
|
||||
|
||||
* 3DFX Voodoo Banshee video
|
||||
* Creative/Ensoniq AudioPCI ES1373 audio
|
||||
* Atmel 90S2313 AVR-based microcontroller for protection
|
||||
* STM48T02 NVRAM
|
||||
* Conexant CX88168 modem
|
||||
|
||||
TODO:
|
||||
* Everything (need new PCI subsystem to do this right)
|
||||
|
||||
* Everything (need new PCI subsystem to do this right)
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
/*
|
||||
|
||||
/*
|
||||
|
||||
Big Buck Hunter II
|
||||
Incredible Technologies 2004
|
||||
|
||||
@ -78,8 +78,8 @@ www.multitech.com
|
||||
| | | |VRC 4373 | |
|
||||
| |--------| |REV1.0 | CREATIVE |
|
||||
|PAL(E2-RE53) |-----------| ES1373 |
|
||||
|--------------------------------------------------------------------|
|
||||
|
||||
|--------------------------------------------------------------------|
|
||||
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
@ -101,7 +101,7 @@ public:
|
||||
|
||||
DECLARE_DRIVER_INIT(iteagle);
|
||||
DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank_assert);
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank_assert);
|
||||
UINT32 screen_update_iteagle(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
virtual void machine_start();
|
||||
};
|
||||
@ -151,7 +151,7 @@ WRITE_LINE_MEMBER(iteagle_state::ide_interrupt)
|
||||
|
||||
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, iteagle_state )
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x00000000, 0x01ffffff) AM_RAM
|
||||
AM_RANGE(0x00000000, 0x01ffffff) AM_RAM
|
||||
// Nile 3 northbridge/PCI controller at 0f000000
|
||||
AM_RANGE(0x1fc00000, 0x1fcfffff) AM_ROM AM_REGION("maincpu", 0) AM_SHARE("rombase")
|
||||
ADDRESS_MAP_END
|
||||
@ -188,8 +188,8 @@ static const voodoo_config iteagle_voodoo_intf =
|
||||
|
||||
static const mips3_config r4310_config =
|
||||
{
|
||||
16384, /* code cache size */
|
||||
16384 /* data cache size */
|
||||
16384, /* code cache size */
|
||||
16384 /* data cache size */
|
||||
};
|
||||
|
||||
static MACHINE_CONFIG_START( gtfore, iteagle_state )
|
||||
@ -224,52 +224,52 @@ MACHINE_CONFIG_END
|
||||
*************************************/
|
||||
|
||||
#define EAGLE_BIOS \
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) /* MIPS code */ \
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) /* MIPS code */ \
|
||||
ROM_SYSTEM_BIOS( 0, "209", "bootrom 2.09" ) \
|
||||
ROM_LOAD( "eagle209.u15", 0x000000, 0x100000, CRC(e0fc1a16) SHA1(c9524f7ee6b95bd484a3b75bcbe2243cb273f84c) ) \
|
||||
ROM_LOAD( "eagle209.u15", 0x000000, 0x100000, CRC(e0fc1a16) SHA1(c9524f7ee6b95bd484a3b75bcbe2243cb273f84c) ) \
|
||||
ROM_SYSTEM_BIOS( 1, "208", "bootrom 2.08" ) \
|
||||
ROM_LOAD( "eagle208.u15", 0x000000, 0x100000, CRC(772f2864) SHA1(085063a4e34f29ebe3814823cd2c6323a050da36) ) \
|
||||
ROM_LOAD( "eagle208.u15", 0x000000, 0x100000, CRC(772f2864) SHA1(085063a4e34f29ebe3814823cd2c6323a050da36) ) \
|
||||
ROM_SYSTEM_BIOS( 2, "204", "bootrom 2.04" ) \
|
||||
ROM_LOAD( "eagle204.u15", 0x000000, 0x100000, CRC(f02e5523) SHA1(b979cf72a6992f1ecad9695a08c8d51e315ab537) ) \
|
||||
ROM_LOAD( "eagle204.u15", 0x000000, 0x100000, CRC(f02e5523) SHA1(b979cf72a6992f1ecad9695a08c8d51e315ab537) ) \
|
||||
ROM_SYSTEM_BIOS( 3, "201", "bootrom 2.01" ) \
|
||||
ROM_LOAD( "eagle201.u15", 0x000000, 0x100000, CRC(e180442b) SHA1(4f50821fed5bcd786d989520aa2559d6c416fb1f) ) \
|
||||
ROM_LOAD( "eagle201.u15", 0x000000, 0x100000, CRC(e180442b) SHA1(4f50821fed5bcd786d989520aa2559d6c416fb1f) ) \
|
||||
ROM_SYSTEM_BIOS( 4, "107", "bootrom 1.07" ) \
|
||||
ROM_LOAD( "eagle107.u15", 0x000000, 0x100000, CRC(97a01fc9) SHA1(a421dbf4d097b2f50cc005d3cd0d63e562e03df8) ) \
|
||||
ROM_LOAD( "eagle107.u15", 0x000000, 0x100000, CRC(97a01fc9) SHA1(a421dbf4d097b2f50cc005d3cd0d63e562e03df8) ) \
|
||||
ROM_SYSTEM_BIOS( 5, "106a", "bootrom 1.06a" ) \
|
||||
ROM_LOAD( "eagle106a.u15", 0x000000, 0x100000, CRC(9c79b7ad) SHA1(ccf1c86e79d65bee30f399e0fa33a7839570d93b) ) \
|
||||
ROM_LOAD( "eagle106a.u15", 0x000000, 0x100000, CRC(9c79b7ad) SHA1(ccf1c86e79d65bee30f399e0fa33a7839570d93b) ) \
|
||||
ROM_SYSTEM_BIOS( 6, "106", "bootrom 1.06" ) \
|
||||
ROM_LOAD( "eagle106.u15", 0x000000, 0x100000, CRC(56bc193d) SHA1(e531d208ef27f777d0784414885f390d1be654b9) ) \
|
||||
ROM_LOAD( "eagle106.u15", 0x000000, 0x100000, CRC(56bc193d) SHA1(e531d208ef27f777d0784414885f390d1be654b9) ) \
|
||||
ROM_SYSTEM_BIOS( 7, "105", "bootrom 1.05" ) \
|
||||
ROM_LOAD( "eagle105.u15", 0x000000, 0x100000, CRC(3870dbe0) SHA1(09be2d86c7259cd81d945c757044b167a76f30db) ) \
|
||||
ROM_LOAD( "eagle105.u15", 0x000000, 0x100000, CRC(3870dbe0) SHA1(09be2d86c7259cd81d945c757044b167a76f30db) ) \
|
||||
ROM_SYSTEM_BIOS( 8, "103", "bootrom 1.03" ) \
|
||||
ROM_LOAD( "eagle103.u15", 0x000000, 0x100000, CRC(c35f4cf2) SHA1(45301c18c7f8f78754c8ad60ea4d2da5a7dc55fb) ) \
|
||||
ROM_LOAD( "eagle103.u15", 0x000000, 0x100000, CRC(c35f4cf2) SHA1(45301c18c7f8f78754c8ad60ea4d2da5a7dc55fb) ) \
|
||||
ROM_SYSTEM_BIOS( 9, "102", "bootrom 1.02" ) \
|
||||
ROM_LOAD( "eagle102.u15", 0x000000, 0x100000, CRC(1fd39e73) SHA1(d1ac758f94defc5c55c62594b3999a406dd9ef1f) ) \
|
||||
ROM_SYSTEM_BIOS( 10, "101", "bootrom 1.01" ) \
|
||||
ROM_LOAD( "eagle101.u15", 0x000000, 0x100000, CRC(2600bc2b) SHA1(c4b89e69c51e4a3bb1874407c4d30b6caed4f396) ) \
|
||||
ROM_LOAD( "eagle101.u15", 0x000000, 0x100000, CRC(2600bc2b) SHA1(c4b89e69c51e4a3bb1874407c4d30b6caed4f396) ) \
|
||||
ROM_REGION( 0x30000, "fpga", 0 ) \
|
||||
ROM_LOAD( "17s20lpc_sb4.u26", 0x000000, 0x008000, CRC(62c4af8a) SHA1(6eca277b9c66a401990599e98fdca64a9e38cc9a) ) \
|
||||
ROM_LOAD( "17s20lpc_sb5.u26", 0x008000, 0x008000, CRC(c88b9d42) SHA1(b912d0fc50ecdc6a198c626f6e1644e8405fac6e) ) \
|
||||
ROM_LOAD( "17s50a_red1.u26", 0x010000, 0x020000, CRC(f5cf3187) SHA1(83b4a14de9959e5a776d97d424945d43501bda7f) ) \
|
||||
ROM_REGION( 0x2000, "pals", 0 ) \
|
||||
ROM_LOAD( "e2-card1.u22.jed", 0x000000, 0x000bd1, CRC(9d1e1ace) SHA1(287d6a30e9f32137ef4eba54f0effa092c97a6eb) ) \
|
||||
ROM_LOAD( "e2-res3.u117.jed", 0x001000, 0x000bd1, CRC(4f1ff45a) SHA1(213cbdd6cd37ad9b5bfc9545084892a68d29f5ff) )
|
||||
ROM_LOAD( "e2-res3.u117.jed", 0x001000, 0x000bd1, CRC(4f1ff45a) SHA1(213cbdd6cd37ad9b5bfc9545084892a68d29f5ff) )
|
||||
|
||||
ROM_START( iteagle )
|
||||
EAGLE_BIOS
|
||||
EAGLE_BIOS
|
||||
|
||||
DISK_REGION( "drive_0" )
|
||||
ROM_END
|
||||
|
||||
ROM_START( gtfore04 )
|
||||
EAGLE_BIOS
|
||||
EAGLE_BIOS
|
||||
|
||||
DISK_REGION( "drive_0" )
|
||||
DISK_IMAGE( "gt2004", 0, SHA1(739a52d6ce13bb6ac7a543ee0e8086fb66be19b9) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( gtfore05 )
|
||||
EAGLE_BIOS
|
||||
EAGLE_BIOS
|
||||
|
||||
DISK_REGION( "drive_0" )
|
||||
DISK_IMAGE( "gt2005", 0, SHA1(d8de569d8cf97b5aaada10ce896eb3c75f1b37f1) )
|
||||
@ -288,4 +288,3 @@ DRIVER_INIT_MEMBER(iteagle_state, iteagle)
|
||||
GAME( 2000, iteagle, 0, gtfore, gtfore, iteagle_state, iteagle, ROT0, "Incredible Technologies", "Eagle BIOS", GAME_IS_BIOS_ROOT )
|
||||
GAME( 2003, gtfore04, iteagle, gtfore, gtfore, iteagle_state, iteagle, ROT0, "Incredible Technologies", "Golden Tee Fore! 2004", GAME_NOT_WORKING | GAME_NO_SOUND )
|
||||
GAME( 2004, gtfore05, iteagle, gtfore, gtfore, iteagle_state, iteagle, ROT0, "Incredible Technologies", "Golden Tee Fore! 2005", GAME_NOT_WORKING | GAME_NO_SOUND )
|
||||
|
||||
|
||||
@ -94,8 +94,8 @@ class junofrst_state : public tutankhm_state
|
||||
public:
|
||||
junofrst_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: tutankhm_state(mconfig, type, tag),
|
||||
m_audiocpu(*this, "audiocpu"),
|
||||
m_i8039(*this, "mcu") { }
|
||||
m_audiocpu(*this, "audiocpu"),
|
||||
m_i8039(*this, "mcu") { }
|
||||
|
||||
UINT8 m_blitterdata[4];
|
||||
int m_i8039_status;
|
||||
|
||||
@ -758,7 +758,6 @@ static const ym3526_interface ym3526_config =
|
||||
|
||||
void karnov_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_flipscreen));
|
||||
save_item(NAME(m_scroll));
|
||||
|
||||
|
||||
@ -263,7 +263,6 @@ TIMER_DEVICE_CALLBACK_MEMBER(kas89_state::kas89_interrupt)
|
||||
|
||||
void kas89_state::machine_start()
|
||||
{
|
||||
|
||||
output_set_lamp_value(37, 0); /* turning off the operator led */
|
||||
}
|
||||
|
||||
|
||||
@ -379,7 +379,6 @@ INTERRUPT_GEN_MEMBER(kchamp_state::sound_int)
|
||||
|
||||
MACHINE_START_MEMBER(kchamp_state,kchamp)
|
||||
{
|
||||
|
||||
save_item(NAME(m_nmi_enable));
|
||||
save_item(NAME(m_sound_nmi_enable));
|
||||
}
|
||||
|
||||
@ -263,7 +263,6 @@ INTERRUPT_GEN_MEMBER(kncljoe_state::sound_nmi)
|
||||
|
||||
void kncljoe_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_port1));
|
||||
save_item(NAME(m_port2));
|
||||
save_item(NAME(m_tile_bank));
|
||||
|
||||
@ -169,7 +169,6 @@ GFXDECODE_END
|
||||
|
||||
void kopunch_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_gfxbank));
|
||||
}
|
||||
|
||||
|
||||
@ -495,7 +495,6 @@ static const ay8910_interface ay8910_config =
|
||||
|
||||
void kyugo_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_scroll_x_lo));
|
||||
save_item(NAME(m_scroll_x_hi));
|
||||
save_item(NAME(m_scroll_y));
|
||||
|
||||
@ -729,7 +729,6 @@ MACHINE_START_MEMBER(ladybug_state,ladybug)
|
||||
|
||||
MACHINE_START_MEMBER(ladybug_state,sraider)
|
||||
{
|
||||
|
||||
save_item(NAME(m_grid_color));
|
||||
save_item(NAME(m_sound_low));
|
||||
save_item(NAME(m_sound_high));
|
||||
|
||||
@ -275,7 +275,6 @@ GFXDECODE_END
|
||||
|
||||
void ladyfrog_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_tilebank));
|
||||
save_item(NAME(m_palette_bank));
|
||||
save_item(NAME(m_sound_nmi_enable));
|
||||
|
||||
@ -470,7 +470,6 @@ static const sn76496_config psg_intf =
|
||||
|
||||
void lasso_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_gfxbank));
|
||||
}
|
||||
|
||||
|
||||
@ -515,7 +515,7 @@ static INPUT_PORTS_START( medlanes )
|
||||
PORT_DIPSETTING( 0x01, "3 seconds" )
|
||||
PORT_DIPSETTING( 0x03, "5 seconds" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
// PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) // dupe
|
||||
// PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) // dupe
|
||||
PORT_BIT( 0x9C, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_DIPNAME( 0x20, 0x00, "Video Invert" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
|
||||
@ -224,7 +224,7 @@ ADDRESS_MAP_END
|
||||
|
||||
|
||||
WRITE8_MEMBER(legionna_state::okim_rombank_w)
|
||||
{
|
||||
{
|
||||
// popmessage("%08x",0x40000 * (data & 0x07));
|
||||
m_oki->set_bank_base(0x40000 * (data & 0x7));
|
||||
}
|
||||
|
||||
@ -580,7 +580,7 @@ void lethal_state::machine_start()
|
||||
membank("bank1")->set_entry(0);
|
||||
|
||||
m_generic_paletteram_8.allocate(0x3800 + 0x02);
|
||||
|
||||
|
||||
save_item(NAME(m_cur_control2));
|
||||
save_item(NAME(m_sprite_colorbase));
|
||||
save_item(NAME(m_layer_colorbase));
|
||||
|
||||
@ -793,7 +793,6 @@ INTERRUPT_GEN_MEMBER(liberate_state::prosport_interrupt)
|
||||
|
||||
MACHINE_START_MEMBER(liberate_state,liberate)
|
||||
{
|
||||
|
||||
save_item(NAME(m_background_disable));
|
||||
save_item(NAME(m_background_color));
|
||||
save_item(NAME(m_gfx_rom_readback));
|
||||
|
||||
@ -316,7 +316,6 @@ INTERRUPT_GEN_MEMBER(m14_state::m14_irq)
|
||||
|
||||
void m14_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_hop_mux));
|
||||
}
|
||||
|
||||
|
||||
@ -593,7 +593,6 @@ static const es5506_interface es5506_config =
|
||||
|
||||
void macrossp_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_sndpending));
|
||||
save_item(NAME(m_snd_toggle));
|
||||
save_item(NAME(m_fade_effect));
|
||||
|
||||
@ -220,7 +220,6 @@ GFXDECODE_END
|
||||
|
||||
void madmotor_state::machine_start()
|
||||
{
|
||||
|
||||
save_item(NAME(m_flipscreen));
|
||||
}
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user