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MT #06697 or: How I Learned to Stop Worrying and Love the Odd bit (nw)
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@ -6000,22 +6000,16 @@ uint8_t saturn_state::get_vblank( void )
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return 0;
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}
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// TODO: seabass explicitly wants this bit to be 0 when screen is disabled from bios to game transition, assume following disp bit.
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// this is actually wrong for finlarch/sasissu/magzun so it needs to be tested on real HW.
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uint8_t saturn_state::get_odd_bit( void )
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{
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if(STV_VDP2_HRES & 4) //exclusive monitor mode makes this bit to be always 1
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return 1;
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if(STV_VDP2_LSMD == 0) // same for non-interlace mode
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{
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if((STV_VDP2_HRES & 1) == 0)
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return STV_VDP2_DISP;
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return 1;
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}
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return machine().first_screen()->frame_number() & 1;
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// TODO: seabass explicitly wants this bit to be 0 when screen is disabled from bios to game transition.
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// But the documentation claims that "non-interlaced" mode is always 1.
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// grdforce tests this bit to be 1 from title screen to gameplay, ditto for finlarch/sasissu/magzun.
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// Assume documentation is wrong and actually always flip this bit.
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return m_vdp2.odd;//machine().first_screen()->frame_number() & 1;
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}
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int saturn_state::get_vblank_start_position( void )
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@ -6205,6 +6199,8 @@ void saturn_state::stv_vdp2_dynamic_res_change( void )
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int horz_res,vert_res;
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int vres_mask;
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// reset odd bit if a dynamic resolution change occurs, seabass ST-V cares!
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m_vdp2.odd = 1;
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vres_mask = (m_vdp2.pal << 1)|1; //PAL uses mask 3, NTSC uses mask 1
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vert_res = d_vres[STV_VDP2_VRES & vres_mask];
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@ -711,6 +711,7 @@ MACHINE_START_MEMBER(sat_console_state, saturn)
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save_pointer(NAME(m_scu_regs.get()), 0x100/4);
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save_item(NAME(m_en_68k));
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save_item(NAME(m_scsp_last_line));
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save_item(NAME(m_vdp2.odd));
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machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(&sat_console_state::stvcd_exit, this));
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@ -1296,6 +1296,7 @@ MACHINE_START_MEMBER(stv_state,stv)
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save_item(NAME(m_port_sel));
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save_item(NAME(m_mux_data));
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save_item(NAME(m_scsp_last_line));
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save_item(NAME(m_vdp2.odd));
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stv_register_protection_savestates(); // machine/stvprot.c
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@ -113,6 +113,7 @@ public:
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bitmap_rgb32 roz_bitmap[2];
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uint8_t dotsel;
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uint8_t pal;
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uint8_t odd;
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uint16_t h_count;
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uint16_t v_count;
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uint8_t exltfg;
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@ -757,6 +757,8 @@ TIMER_DEVICE_CALLBACK_MEMBER(saturn_state::saturn_scanline)
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else
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m_scu.ist |= (IRQ_VBLANK_IN);
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// flip odd bit here
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m_vdp2.odd ^= 1;
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/* TODO: when Automatic Draw actually happens? Night Striker S is very fussy on this, and it looks like that VDP1 starts at more or less vblank-in time ... */
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video_update_vdp1();
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}
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@ -958,6 +960,7 @@ WRITE_LINE_MEMBER( saturn_state::system_reset_w )
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if(!state)
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return;
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// TODO: actually send a device reset signal to the connected devices
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/*Only backup ram and SMPC ram are retained after that this command is issued.*/
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memset(m_scu_regs.get() ,0x00,0x000100);
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memset(m_sound_ram,0x00,0x080000);
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