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Merge pull request #1603 from npwoods/fix_m6805_identifiers_with_underscores
Fixed a number of identifiers beginning with underscores in the m6805 disassembler
This commit is contained in:
Vas Crabb
GitHub
commit
4cfffd8b33
@ -15,16 +15,16 @@
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#include "m6805.h"
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enum addr_mode {
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_imp=0, /* implicit */
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_btr, /* bit test and relative */
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_bit, /* bit set/clear */
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_rel, /* relative */
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_imm, /* immediate */
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_dir, /* direct address */
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_ext, /* extended address */
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_idx, /* indexed */
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_ix1, /* indexed + byte offset */
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_ix2 /* indexed + word offset */
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md_imp=0, /* implicit */
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md_btr, /* bit test and relative */
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md_bit, /* bit set/clear */
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md_rel, /* relative */
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md_imm, /* immediate */
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md_dir, /* direct address */
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md_ext, /* extended address */
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md_idx, /* indexed */
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md_ix1, /* indexed + byte offset */
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md_ix2 /* indexed + word offset */
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};
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enum op_names {
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@ -56,70 +56,70 @@ static const char *const op_name_str[] = {
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};
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static const unsigned char disasm[0x100][2] = {
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{brset,_btr},{brclr,_btr},{brset,_btr},{brclr,_btr},/* 00 */
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{brset,_btr},{brclr,_btr},{brset,_btr},{brclr,_btr},
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{brset,_btr},{brclr,_btr},{brset,_btr},{brclr,_btr},
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{brset,_btr},{brclr,_btr},{brset,_btr},{brclr,_btr},
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{bset, _bit},{bclr, _bit},{bset, _bit},{bclr, _bit},/* 10 */
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{bset, _bit},{bclr, _bit},{bset, _bit},{bclr, _bit},
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{bset, _bit},{bclr, _bit},{bset, _bit},{bclr, _bit},
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{bset, _bit},{bclr, _bit},{bset, _bit},{bclr, _bit},
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{bra, _rel},{brn, _rel},{bhi, _rel},{bls, _rel},/* 20 */
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{bcc, _rel},{bcs, _rel},{bne, _rel},{beq, _rel},
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{bhcc, _rel},{bhcs, _rel},{bpl, _rel},{bmi, _rel},
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{bmc, _rel},{bms, _rel},{bil, _rel},{bih, _rel},
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{neg, _dir},{ill, _imp},{ill, _imp},{com, _dir},/* 30 */
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{lsr, _dir},{ill, _imp},{ror, _dir},{asr, _dir},
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{asl, _dir},{rol, _dir},{dec, _dir},{ill, _imp},
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{inc, _dir},{tst, _dir},{ill, _imp},{clr, _dir},
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{nega, _imp},{ill, _imp},{ill, _imp},{coma, _imp},/* 40 */
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{lsra, _imp},{ill, _imp},{rora, _imp},{asra, _imp},
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{asla, _imp},{rola, _imp},{deca, _imp},{ill, _imp},
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{inca, _imp},{tsta, _imp},{ill, _imp},{clra, _imp},
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{negx, _imp},{ill, _imp},{ill, _imp},{comx, _imp},/* 50 */
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{lsrx, _imp},{ill, _imp},{rorx, _imp},{asrx, _imp},
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{aslx, _imp},{rolx, _imp},{decx, _imp},{ill, _imp},
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{incx, _imp},{tstx, _imp},{ill, _imp},{clrx, _imp},
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{neg, _ix1},{ill, _imp},{ill, _imp},{com, _ix1},/* 60 */
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{lsr, _ix1},{ill, _imp},{ror, _ix1},{asr, _ix1},
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{asl, _ix1},{rol, _ix1},{dec, _ix1},{ill, _imp},
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{inc, _ix1},{tst, _ix1},{jmp, _ix1},{clr, _ix1},
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{neg, _idx},{ill, _imp},{ill, _imp},{com, _idx},/* 70 */
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{lsr, _idx},{ill, _imp},{ror, _idx},{asr, _idx},
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{asl, _idx},{rol, _idx},{dec, _idx},{ill, _imp},
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{inc, _idx},{tst, _idx},{jmp, _idx},{clr, _idx},
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{rti, _imp},{rts, _imp},{ill, _imp},{swi, _imp},/* 80 */
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{ill, _imp},{ill, _imp},{ill, _imp},{ill, _imp},
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{ill, _imp},{ill, _imp},{ill, _imp},{ill, _imp},
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{ill, _imp},{ill, _imp},{ill, _imp},{ill, _imp},
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{ill, _imp},{ill, _imp},{ill, _imp},{ill, _imp},/* 90 */
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{ill, _imp},{ill, _imp},{ill, _imp},{tax, _imp},
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{clc, _imp},{sec, _imp},{cli, _imp},{sei, _imp},
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{rsp, _imp},{nop, _imp},{ill, _imp},{txa, _imp},
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{suba, _imm},{cmpa, _imm},{sbca, _imm},{cpx, _imm},/* a0 */
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{anda, _imm},{bita, _imm},{lda, _imm},{ill, _imp},
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{eora, _imm},{adca, _imm},{ora, _imm},{adda, _imm},
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{ill, _imp},{bsr, _rel},{ldx, _imm},{ill, _imp},
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{suba, _dir},{cmpa, _dir},{sbca, _dir},{cpx, _dir},/* b0 */
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{anda, _dir},{bita, _dir},{lda, _dir},{sta, _dir},
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{eora, _dir},{adca, _dir},{ora, _dir},{adda, _dir},
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{jmp, _dir},{jsr, _dir},{ldx, _dir},{stx, _dir},
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{suba, _ext},{cmpa, _ext},{sbca, _ext},{cpx, _ext},/* c0 */
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{anda, _ext},{bita, _ext},{lda, _ext},{sta, _ext},
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{eora, _ext},{adca, _ext},{ora, _ext},{adda, _ext},
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{jmp, _ext},{jsr, _ext},{ldx, _ext},{stx, _ext},
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{suba, _ix2},{cmpa, _ix2},{sbca, _ix2},{cpx, _ix2},/* d0 */
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{anda, _ix2},{bita, _ix2},{lda, _ix2},{sta, _ix2},
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{eora, _ix2},{adca, _ix2},{ora, _ix2},{adda, _ix2},
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{jmp, _ix2},{jsr, _ix2},{ldx, _ix2},{stx, _ix2},
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{suba, _ix1},{cmpa, _ix1},{sbca, _ix1},{cpx, _ix1},/* e0 */
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{anda, _ix1},{bita, _ix1},{lda, _ix1},{sta, _ix1},
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{eora, _ix1},{adca, _ix1},{ora, _ix1},{adda, _ix1},
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{jmp, _ix1},{jsr, _ix1},{ldx, _ix1},{stx, _ix1},
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{suba, _idx},{cmpa, _idx},{sbca, _idx},{cpx, _idx},/* f0 */
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{anda, _idx},{bita, _idx},{lda, _idx},{sta, _idx},
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{eora, _idx},{adca, _idx},{ora, _idx},{adda, _idx},
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{jmp, _idx},{jsr, _idx},{ldx, _idx},{stx, _idx}
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{brset,md_btr},{brclr,md_btr},{brset,md_btr},{brclr,md_btr},/* 00 */
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{brset,md_btr},{brclr,md_btr},{brset,md_btr},{brclr,md_btr},
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{brset,md_btr},{brclr,md_btr},{brset,md_btr},{brclr,md_btr},
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{brset,md_btr},{brclr,md_btr},{brset,md_btr},{brclr,md_btr},
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{bset, md_bit},{bclr, md_bit},{bset, md_bit},{bclr, md_bit},/* 10 */
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{bset, md_bit},{bclr, md_bit},{bset, md_bit},{bclr, md_bit},
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{bset, md_bit},{bclr, md_bit},{bset, md_bit},{bclr, md_bit},
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{bset, md_bit},{bclr, md_bit},{bset, md_bit},{bclr, md_bit},
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{bra, md_rel},{brn, md_rel},{bhi, md_rel},{bls, md_rel},/* 20 */
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{bcc, md_rel},{bcs, md_rel},{bne, md_rel},{beq, md_rel},
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{bhcc, md_rel},{bhcs, md_rel},{bpl, md_rel},{bmi, md_rel},
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{bmc, md_rel},{bms, md_rel},{bil, md_rel},{bih, md_rel},
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{neg, md_dir},{ill, md_imp},{ill, md_imp},{com, md_dir},/* 30 */
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{lsr, md_dir},{ill, md_imp},{ror, md_dir},{asr, md_dir},
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{asl, md_dir},{rol, md_dir},{dec, md_dir},{ill, md_imp},
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{inc, md_dir},{tst, md_dir},{ill, md_imp},{clr, md_dir},
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{nega, md_imp},{ill, md_imp},{ill, md_imp},{coma, md_imp},/* 40 */
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{lsra, md_imp},{ill, md_imp},{rora, md_imp},{asra, md_imp},
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{asla, md_imp},{rola, md_imp},{deca, md_imp},{ill, md_imp},
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{inca, md_imp},{tsta, md_imp},{ill, md_imp},{clra, md_imp},
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{negx, md_imp},{ill, md_imp},{ill, md_imp},{comx, md_imp},/* 50 */
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{lsrx, md_imp},{ill, md_imp},{rorx, md_imp},{asrx, md_imp},
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{aslx, md_imp},{rolx, md_imp},{decx, md_imp},{ill, md_imp},
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{incx, md_imp},{tstx, md_imp},{ill, md_imp},{clrx, md_imp},
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{neg, md_ix1},{ill, md_imp},{ill, md_imp},{com, md_ix1},/* 60 */
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{lsr, md_ix1},{ill, md_imp},{ror, md_ix1},{asr, md_ix1},
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{asl, md_ix1},{rol, md_ix1},{dec, md_ix1},{ill, md_imp},
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{inc, md_ix1},{tst, md_ix1},{jmp, md_ix1},{clr, md_ix1},
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{neg, md_idx},{ill, md_imp},{ill, md_imp},{com, md_idx},/* 70 */
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{lsr, md_idx},{ill, md_imp},{ror, md_idx},{asr, md_idx},
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{asl, md_idx},{rol, md_idx},{dec, md_idx},{ill, md_imp},
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{inc, md_idx},{tst, md_idx},{jmp, md_idx},{clr, md_idx},
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{rti, md_imp},{rts, md_imp},{ill, md_imp},{swi, md_imp},/* 80 */
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{ill, md_imp},{ill, md_imp},{ill, md_imp},{ill, md_imp},
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{ill, md_imp},{ill, md_imp},{ill, md_imp},{ill, md_imp},
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{ill, md_imp},{ill, md_imp},{ill, md_imp},{ill, md_imp},
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{ill, md_imp},{ill, md_imp},{ill, md_imp},{ill, md_imp},/* 90 */
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{ill, md_imp},{ill, md_imp},{ill, md_imp},{tax, md_imp},
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{clc, md_imp},{sec, md_imp},{cli, md_imp},{sei, md_imp},
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{rsp, md_imp},{nop, md_imp},{ill, md_imp},{txa, md_imp},
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{suba, md_imm},{cmpa, md_imm},{sbca, md_imm},{cpx, md_imm},/* a0 */
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{anda, md_imm},{bita, md_imm},{lda, md_imm},{ill, md_imp},
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{eora, md_imm},{adca, md_imm},{ora, md_imm},{adda, md_imm},
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{ill, md_imp},{bsr, md_rel},{ldx, md_imm},{ill, md_imp},
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{suba, md_dir},{cmpa, md_dir},{sbca, md_dir},{cpx, md_dir},/* b0 */
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{anda, md_dir},{bita, md_dir},{lda, md_dir},{sta, md_dir},
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{eora, md_dir},{adca, md_dir},{ora, md_dir},{adda, md_dir},
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{jmp, md_dir},{jsr, md_dir},{ldx, md_dir},{stx, md_dir},
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{suba, md_ext},{cmpa, md_ext},{sbca, md_ext},{cpx, md_ext},/* c0 */
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{anda, md_ext},{bita, md_ext},{lda, md_ext},{sta, md_ext},
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{eora, md_ext},{adca, md_ext},{ora, md_ext},{adda, md_ext},
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{jmp, md_ext},{jsr, md_ext},{ldx, md_ext},{stx, md_ext},
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{suba, md_ix2},{cmpa, md_ix2},{sbca, md_ix2},{cpx, md_ix2},/* d0 */
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{anda, md_ix2},{bita, md_ix2},{lda, md_ix2},{sta, md_ix2},
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{eora, md_ix2},{adca, md_ix2},{ora, md_ix2},{adda, md_ix2},
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{jmp, md_ix2},{jsr, md_ix2},{ldx, md_ix2},{stx, md_ix2},
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{suba, md_ix1},{cmpa, md_ix1},{sbca, md_ix1},{cpx, md_ix1},/* e0 */
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{anda, md_ix1},{bita, md_ix1},{lda, md_ix1},{sta, md_ix1},
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{eora, md_ix1},{adca, md_ix1},{ora, md_ix1},{adda, md_ix1},
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{jmp, md_ix1},{jsr, md_ix1},{ldx, md_ix1},{stx, md_ix1},
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{suba, md_idx},{cmpa, md_idx},{sbca, md_idx},{cpx, md_idx},/* f0 */
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{anda, md_idx},{bita, md_idx},{lda, md_idx},{sta, md_idx},
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{eora, md_idx},{adca, md_idx},{ora, md_idx},{adda, md_idx},
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{jmp, md_idx},{jsr, md_idx},{ldx, md_idx},{stx, md_idx}
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};
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#if 0
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@ -178,42 +178,42 @@ static offs_t internal_disasm_m6805(cpu_device *device, std::ostream &stream, of
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switch( disasm[code][1] )
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{
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case _btr: /* bit test and relative branch */
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case md_btr: /* bit test and relative branch */
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bit = (code >> 1) & 7;
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util::stream_format(stream, "%d,$%02X,$%03X", bit, opram[1], pc + 3 + (int8_t)opram[2]);
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result = 3 | flags | DASMFLAG_SUPPORTED;
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break;
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case _bit: /* bit test */
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case md_bit: /* bit test */
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bit = (code >> 1) & 7;
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util::stream_format(stream, "%d,$%03X", bit, opram[1]);
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result = 2 | flags | DASMFLAG_SUPPORTED;
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break;
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case _rel: /* relative */
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case md_rel: /* relative */
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util::stream_format(stream, "$%03X", pc + 2 + (int8_t)opram[1]);
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result = 2 | flags | DASMFLAG_SUPPORTED;
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break;
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case _imm: /* immediate */
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case md_imm: /* immediate */
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util::stream_format(stream, "#$%02X", opram[1]);
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result = 2 | flags | DASMFLAG_SUPPORTED;
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break;
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case _dir: /* direct (zero page address) */
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case md_dir: /* direct (zero page address) */
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util::stream_format(stream, "$%02X", opram[1]);
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result = 2 | flags | DASMFLAG_SUPPORTED;
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break;
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case _ext: /* extended (16 bit address) */
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case md_ext: /* extended (16 bit address) */
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ea = (opram[1] << 8) + opram[2];
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util::stream_format(stream, "$%04X", ea);
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result = 3 | flags | DASMFLAG_SUPPORTED;
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break;
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case _idx: /* indexed */
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case md_idx: /* indexed */
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util::stream_format(stream, "(x)");
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result = 1 | flags | DASMFLAG_SUPPORTED;
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break;
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case _ix1: /* indexed + byte (zero page) */
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case md_ix1: /* indexed + byte (zero page) */
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util::stream_format(stream, "(x+$%02X)", opram[1]);
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result = 2 | flags | DASMFLAG_SUPPORTED;
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break;
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case _ix2: /* indexed + word (16 bit address) */
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case md_ix2: /* indexed + word (16 bit address) */
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ea = (opram[1] << 8) + opram[2];
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util::stream_format(stream, "(x+$%04X)", ea);
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result = 3 | flags | DASMFLAG_SUPPORTED;
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