mirror of
https://github.com/holub/mame
synced 2025-04-24 17:30:55 +03:00
First pass, hooked it up to Winning Run GPU because it's a good test case
This commit is contained in:
angelosa
parent
6955916068
commit
52549ddd50
@ -67,7 +67,7 @@ STATUS:
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- posirq handling broken
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Driver's Eyes
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crashes
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Left and Right screen
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TODO: (*) Extract DSP BIOS
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@ -1501,7 +1501,7 @@ static ADDRESS_MAP_START( winrun_gpu_map, AS_PROGRAM, 16, namcos21_state )
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AM_RANGE(0x000000, 0x07ffff) AM_ROM
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AM_RANGE(0x100000, 0x100001) AM_READWRITE(winrun_gpu_color_r,winrun_gpu_color_w) /* ? */
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AM_RANGE(0x180000, 0x19ffff) AM_RAM /* work RAM */
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos21_68k_gpu_C148_r,namcos21_68k_gpu_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("gpu_intc", namco_c148_device, map)
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AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_SHARE("gpu_comram")
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AM_RANGE(0x400000, 0x40ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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AM_RANGE(0x410000, 0x41ffff) AM_RAM_DEVWRITE("palette", palette_device, write_ext) AM_SHARE("palette_ext")
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@ -2007,6 +2007,8 @@ static MACHINE_CONFIG_START( winrun, namcos21_state )
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MCFG_CPU_PROGRAM_MAP(winrun_gpu_map)
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MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_gpu_vblank)
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MCFG_NAMCO_C148_ADD("gpu_intc")
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MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame */
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MCFG_MACHINE_START_OVERRIDE(namcos21_state,namcos21)
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@ -6,6 +6,7 @@
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#include "namcos2.h"
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#include "machine/namcoio_gearbox.h"
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#include "machine/namco_c148.h"
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#define NAMCOS21_POLY_FRAME_WIDTH 496
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#define NAMCOS21_POLY_FRAME_HEIGHT 480
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@ -54,7 +55,8 @@ public:
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m_ptrom24(*this,"point24"),
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m_ptrom16(*this,"point16"),
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m_dsp(*this, "dsp"),
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m_io_gearbox(*this, "gearbox")
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m_io_gearbox(*this, "gearbox"),
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m_gpu_intc(*this, "gpu_intc")
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{ }
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optional_shared_ptr<uint16_t> m_winrun_dspbios;
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@ -68,6 +70,7 @@ public:
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optional_device<cpu_device> m_dsp;
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optional_device<namcoio_gearbox_device> m_io_gearbox;
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optional_device<namco_c148_device> m_gpu_intc;
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std::unique_ptr<uint8_t[]> m_videoram;
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std::unique_ptr<uint16_t[]> m_winrun_dspcomram;
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100
src/mame/machine/namco_c148.cpp
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100
src/mame/machine/namco_c148.cpp
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@ -0,0 +1,100 @@
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// license:BSD-3-Clause
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// copyright-holders:<author_name>
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/***************************************************************************
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Namco C148 Interrupt Controller
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***************************************************************************/
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/*
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Interrupt Controller C148 1C0000-1FFFFF R/W D00-D02
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???????? 1C0XXX
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???????? 1C2XXX
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???????? 1C4XXX
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Master/Slave IRQ level 1C6XXX D00-D02
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EXIRQ level 1C8XXX D00-D02
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POSIRQ level 1CAXXX D00-D02
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SCIRQ level 1CCXXX D00-D02
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VBLANK IRQ level 1CEXXX D00-D02
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???????? 1D0XXX
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???????? 1D4000 trigger master/slave INT?
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Acknowlegde Master/Slave IRQ 1D6XXX ack master/slave INT
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Acknowledge EXIRQ 1D8XXX
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Acknowledge POSIRQ 1DAXXX
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Acknowledge SCIRQ 1DCXXX
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Acknowledge VBLANK IRQ 1DEXXX
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EEPROM Ready status 1E0XXX R D01
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Sound CPU Reset control 1E2XXX W D01
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Slave 68000 & IO CPU Reset 1E4XXX W D01
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Watchdog reset kicker 1E6XXX W
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*/
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#include "emu.h"
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#include "namco_c148.h"
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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// device type definition
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const device_type NAMCO_C148 = &device_creator<namco_c148_device>;
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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//-------------------------------------------------
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// namco_c148_device - constructor
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//-------------------------------------------------
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namco_c148_device::namco_c148_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: device_t(mconfig, NAMCO_C148, "Namco C148 Interrupt Controller", tag, owner, clock, "namco_c148", __FILE__)
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{
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}
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// (*) denotes master CPU only
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DEVICE_ADDRESS_MAP_START( map, 16, namco_c148_device )
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// AM_RANGE(0x06000, 0x07fff) // CPUIRQ lv
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// AM_RANGE(0x08000, 0x09fff) // EXIRQ lv
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// AM_RANGE(0x0a000, 0x0bfff) // POSIRQ lv
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// AM_RANGE(0x0c000, 0x0dfff) // SCIRQ lv
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// AM_RANGE(0x0e000, 0x0ffff) // VBlank IRQ lv
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// AM_RANGE(0x16000, 0x17fff) // CPUIRQ ack
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// AM_RANGE(0x18000, 0x19fff) // EXIRQ ack
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// AM_RANGE(0x1a000, 0x1bfff) // POSIRQ ack
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// AM_RANGE(0x1c000, 0x1dfff) // SCIRQ ack
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// AM_RANGE(0x1e000, 0x1ffff) // VBlank IRQ ack
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// AM_RANGE(0x20000, 0x21fff) // EEPROM ready status
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// AM_RANGE(0x22000, 0x23fff) // sound CPU reset (*)
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// AM_RANGE(0x24000, 0x25fff) // slave & i/o reset (*)
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AM_RANGE(0x26000, 0x27fff) AM_NOP // watchdog
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ADDRESS_MAP_END
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void namco_c148_device::device_start()
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{
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void namco_c148_device::device_reset()
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{
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}
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//**************************************************************************
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// READ/WRITE HANDLERS
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//**************************************************************************
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58
src/mame/machine/namco_c148.h
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58
src/mame/machine/namco_c148.h
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@ -0,0 +1,58 @@
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// license:BSD-3-Clause
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// copyright-holders:<author_name>
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/***************************************************************************
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Template for skeleton device
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***************************************************************************/
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#pragma once
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#ifndef __NAMCO_C148DEV_H__
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#define __NAMCO_C148DEV_H__
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//**************************************************************************
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// INTERFACE CONFIGURATION MACROS
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//**************************************************************************
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#define MCFG_NAMCO_C148_ADD(_tag) \
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MCFG_DEVICE_ADD(_tag, NAMCO_C148, 0)
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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// ======================> namco_c148_device
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class namco_c148_device : public device_t
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{
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public:
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// construction/destruction
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namco_c148_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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DECLARE_ADDRESS_MAP(map, 16);
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protected:
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// device-level overrides
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// virtual void device_validity_check(validity_checker &valid) const;
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virtual void device_start() override;
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virtual void device_reset() override;
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private:
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// ...
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};
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// device type definition
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extern const device_type NAMCO_C148;
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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#endif
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