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ti99_8: OSO fix (nw)
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46958737cf
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@ -2259,16 +2259,16 @@ oso_device::oso_device(const machine_config &mconfig, const char *tag, device_t
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m_status(0xff),
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m_status(0xff),
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m_control(0),
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m_control(0),
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m_xmit(0), m_lasthxvalue(0x01),
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m_xmit(0), m_lasthxvalue(0x01),
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m_bav(false), m_sbav(false), m_sbavold(true), m_bavhold(false),
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m_bav(false), m_sbav(false), m_sbavold(false), m_bavhold(false),
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m_hsk(false), m_shsk(false), m_shskold(true), m_hskhold(false),
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m_hsk(false), m_shsk(false), m_shskold(false), m_hskhold(false),
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m_wq1(false), m_wq1old(true), m_wq2(false), m_wq2old(true),
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m_wq1(false), m_wq1old(false), m_wq2(false), m_wq2old(false),
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m_wnp(false), m_wbusyold(false), m_sendbyte(false),
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m_wnp(false), m_wbusyold(false), m_sendbyte(false),
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m_wrset(false), m_counting(false), m_clkcount(0),
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m_wrset(false), m_counting(false), m_clkcount(0),
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m_rq1(false), m_rq2(false), m_rq2old(true),
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m_rq1(false), m_rq2(false), m_rq2old(false),
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m_rnib(false), m_rnibcold(false),
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m_rnib(false), m_rnibcold(false),
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m_rdset(false), m_rdsetold(true),
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m_rdset(false), m_rdsetold(false),
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m_msns(false), m_lsns(false),
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m_msns(false), m_lsns(false),
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m_rdend(false), m_byteavailable(false)
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m_rhsus(false)
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{
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{
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(void)m_shskold;
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(void)m_shskold;
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m_hexbus_inbound = nullptr;
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m_hexbus_inbound = nullptr;
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@ -2286,7 +2286,7 @@ READ8_MEMBER( oso_device::read )
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if (TRACE_OSO) logerror("Read data register = %02x\n", value);
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if (TRACE_OSO) logerror("Read data register = %02x\n", value);
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value = m_data;
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value = m_data;
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// Release the handshake
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// Release the handshake
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m_byteavailable = false;
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m_rhsus = false;
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break;
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break;
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case 1:
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case 1:
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// read 5FFA: read status register
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// read 5FFA: read status register
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@ -2357,7 +2357,6 @@ WRITE8_MEMBER( oso_device::write )
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void oso_device::clear_int_status()
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void oso_device::clear_int_status()
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{
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{
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m_status &= ~(HSKWT | HSKRD | BAVIAS | BAVAIS);
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m_status &= ~(HSKWT | HSKRD | BAVIAS | BAVAIS);
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m_rdend = false;
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m_int(CLEAR_LINE);
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m_int(CLEAR_LINE);
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}
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}
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@ -2524,23 +2523,22 @@ WRITE_LINE_MEMBER( oso_device::clock_in )
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if (m_rq2old == true && m_rq2 == false)
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if (m_rq2old == true && m_rq2 == false)
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{
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{
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set_status(HSKRD, true);
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set_status(HSKRD, true);
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m_rdend = true;
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m_rhsus = true; // byte is available for reading
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}
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}
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m_rq2old = m_rq2;
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m_rq2old = m_rq2;
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}
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}
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else
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else
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{
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{
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m_byteavailable = false;
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m_rhsus = false;
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}
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}
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// Handshake control
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// Handshake control
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// Set HSK (Page 6, RHSUS*)
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// Set HSK (Page 6, RHSUS*)
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bool hskwrite = !m_wq1 && m_wq2;
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bool hskwrite = !m_wq1 && m_wq2;
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if (m_rdend) m_byteavailable = true;
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// We can simplify this to a single flag because the CPU read operation
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// We can simplify this to a single flag because the CPU read operation
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// is atomic here (starts and immediately terminates)
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// is atomic here (starts and immediately terminates)
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m_hsk = hskwrite || m_byteavailable;
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m_hsk = hskwrite || m_rhsus;
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update_hexbus();
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update_hexbus();
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}
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}
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// Actions that occur for Phi3=0
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// Actions that occur for Phi3=0
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@ -2567,14 +2565,6 @@ WRITE_LINE_MEMBER( oso_device::clock_in )
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m_rq1 = m_rq2 = m_rdset = false;
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m_rq1 = m_rq2 = m_rdset = false;
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}
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}
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// Show some lines in log
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if (TRACE_OSO) {
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if (m_sbav != m_sbavold) {
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logerror("SBAV = %d\n", m_sbav? 1 : 0);
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m_sbavold = m_sbav;
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}
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}
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// Raise interrupt
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// Raise interrupt
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if ((control_bit(WIEN) && status_bit(HSKWT))
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if ((control_bit(WIEN) && status_bit(HSKWT))
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|| (control_bit(RIEN) && status_bit(HSKRD))
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|| (control_bit(RIEN) && status_bit(HSKRD))
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@ -488,10 +488,8 @@ private:
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bool m_msns; // Upper 4 bits
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bool m_msns; // Upper 4 bits
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bool m_lsns; // Lower 4 bits
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bool m_lsns; // Lower 4 bits
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bool m_rdend; // Read completed
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// Page 6 (RHSUS*)
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bool m_rhsus; // Needed to assert the HSK line until the CPU has read the byte
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// Page 6
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bool m_byteavailable; // Needed to assert the HSK line until the CPU has read the byte
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};
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};
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class mainboard8_device : public device_t
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class mainboard8_device : public device_t
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