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Cleanups and version bump

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This commit is contained in:
Miodrag Milanovic 2015-05-27 09:03:32 +02:00
parent e5caefbfbd
commit 64e16ca8cf
141 changed files with 1475 additions and 1491 deletions
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2
hash/ibm5170_cdrom.xml
View File

@ -7,7 +7,7 @@
<description>Acer CPR</description>
<year>1995</year>
<publisher>Acer America Corporation</publisher>
<info name="version" value="1.2a" /> <!-- floppy version 1.2a, CD version 1.2 -->
<info name="version" value="1.2a" /> <!-- floppy version 1.2a, CD version 1.2 -->
<part name="flop1" interface="floppy_3_5">
<feature name="disk_label" value="Hard Drive Recovery Start-Up Diskette" />

14
hash/msx1_flop.xml
View File

@ -160,7 +160,7 @@ The following floppies came with the machines.
<!--
Games, Programs, Etc.
These all had a disk release, according to http://www.generation-msx.nl/ but we have no confirmation about these dumps coming
These all had a disk release, according to http://www.generation-msx.nl/ but we have no confirmation about these dumps coming
from original disks: more investigations are definitely needed!!
-->
@ -1523,7 +1523,7 @@ The following floppies came with the machines.
<!--
<!--
Coverdisks
@ -1558,9 +1558,9 @@ The following floppies came with the machines.
<!--
<!--
Homebrew / Doujin
Homebrew / Doujin
-->
@ -1856,7 +1856,7 @@ The following floppies came with the machines.
<!--
<!--
Sets below are hacked games "converted" from their original format (carts or tapes) into disks
However, we currently don't have the real dumps for these so we keep them in disk format for the moment
@ -1878,7 +1878,7 @@ The following floppies came with the machines.
<software name="3dwater">
<description>3D Water Driver (Jpn)</description>
<year>19??</year>
<publisher>&lt;tape2disk hack&gt;</publisher> <!-- or maybe cart2disk -->
<publisher>&lt;tape2disk hack&gt;</publisher> <!-- or maybe cart2disk -->
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="737280">
@ -4059,7 +4059,7 @@ The following floppies came with the machines.
</software>
<!--
<!--
Sets below are hacked games "converted" from their original format (carts or tapes) into disks
Such information has been retrieved from websites like http://www.generation-msx.nl/ and http://msx.jpn.org/tagoo/

28
hash/msx2_flop.xml
View File

@ -299,7 +299,7 @@ The following floppies came with the machines.
<!--
Games, Programs, Etc.
These all had a disk release, according to http://www.generation-msx.nl/ but we have no confirmation about these dumps coming
These all had a disk release, according to http://www.generation-msx.nl/ but we have no confirmation about these dumps coming
from original disks: more investigations are definitely needed!!
-->
@ -375,8 +375,8 @@ The following floppies came with the machines.
<rom name="snatcher (1988)(konami)(jp)(disk 3 of 3)[scc+].dsk" size="737280" crc="35e70ac9" sha1="c653d9aab4fdda14ab92490972783f7b9d3ceb1a" offset="0" />
</dataarea>
</part>
<!-- This is the sound cartridge that came with the game Snatcher. This sound cartridge
can also be used with the MSX Game Collections from Konami. -->
<!-- This is the sound cartridge that came with the game Snatcher. This sound cartridge
can also be used with the MSX Game Collections from Konami. -->
<part name="cart" interface="msx_cart">
<feature name="slot" value="sound_snatcher" />
<dataarea name="ram" size="65536">
@ -403,8 +403,8 @@ The following floppies came with the machines.
<rom name="snatcher (1988)(konami)(jp)(disk 3 of 3)[scc+].dsk" size="737280" crc="35e70ac9" sha1="c653d9aab4fdda14ab92490972783f7b9d3ceb1a" offset="0" />
</dataarea>
</part>
<!-- This is the sound cartridge that came with the game Snatcher. This sound cartridge
can also be used with the MSX Game Collections from Konami. -->
<!-- This is the sound cartridge that came with the game Snatcher. This sound cartridge
can also be used with the MSX Game Collections from Konami. -->
<part name="cart" interface="msx_cart">
<feature name="slot" value="sound_snatcher" />
<dataarea name="ram" size="65536">
@ -431,8 +431,8 @@ The following floppies came with the machines.
<rom name="super deform snatcher (1990)(konami)(jp)(disk 3 of 3)[scc+].dsk" size="737280" crc="0547bb3a" sha1="e4b1b5f8b7ea4532551c103164860c8802151131" offset="0" />
</dataarea>
</part>
<!-- This is the sound cartridge that came with the game SD Snatcher. This sound cartridge
can _not_ be used with the MSX Game Collections from Konami. -->
<!-- This is the sound cartridge that came with the game SD Snatcher. This sound cartridge
can _not_ be used with the MSX Game Collections from Konami. -->
<part name="cart" interface="msx_cart">
<feature name="slot" value="sound_sdsnatch" />
<dataarea name="ram" size="65536">
@ -459,8 +459,8 @@ The following floppies came with the machines.
<rom name="super deform snatcher (1990)(konami)(jp)(disk 3 of 3)[scc+].dsk" size="737280" crc="0547bb3a" sha1="e4b1b5f8b7ea4532551c103164860c8802151131" offset="0" />
</dataarea>
</part>
<!-- This is the sound cartridge that came with the game SD Snatcher. This sound cartridge
can _not_ be used with the MSX Game Collections from Konami. -->
<!-- This is the sound cartridge that came with the game SD Snatcher. This sound cartridge
can _not_ be used with the MSX Game Collections from Konami. -->
<part name="cart" interface="msx_cart">
<feature name="slot" value="sound_sdsnatch" />
<dataarea name="ram" size="65536">
@ -13058,7 +13058,7 @@ The following floppies came with the machines.
<!--
<!--
HOMEBREW
@ -16047,7 +16047,7 @@ HOMEBREW
</software>
<!--
<!--
DISKMAG
@ -16701,7 +16701,7 @@ DISKMAG
<!--
<!--
Sets below are hacked games "converted" from their original format (carts or tapes) into disks
However, we currently don't have the real dumps for these so we keep them in disk format for the moment
@ -16769,7 +16769,7 @@ DISKMAG
<!--
<!--
Sets below are hacked games "converted" from their original format (carts or tapes) into disks
Such information has been retrieved from websites like http://www.generation-msx.nl/ and http://msx.jpn.org/tagoo/
@ -17350,7 +17350,7 @@ DISKMAG
</dataarea>
</part>
</software>
<software name="fantzon2">
<description>Fantasy Zone II - The Tears of Opa-Opa (Jpn)</description>
<year>19??</year>

4
src/emu/bus/cbmiec/c1541.h
View File

@ -37,8 +37,8 @@
// ======================> c1541_base_t
class c1541_base_t : public device_t,
public device_cbm_iec_interface,
public device_c64_floppy_parallel_interface
public device_cbm_iec_interface,
public device_c64_floppy_parallel_interface
{
public:
// construction/destruction

4
src/emu/bus/cbmiec/c1571.h
View File

@ -39,8 +39,8 @@
// ======================> c1571_t
class c1571_t : public device_t,
public device_cbm_iec_interface,
public device_c64_floppy_parallel_interface
public device_cbm_iec_interface,
public device_c64_floppy_parallel_interface
{
public:
// construction/destruction

2
src/emu/bus/cbmiec/c1581.h
View File

@ -35,7 +35,7 @@
// ======================> c1581_t
class c1581_t : public device_t,
public device_cbm_iec_interface
public device_cbm_iec_interface
{
public:
// construction/destruction

2
src/emu/bus/cbmiec/interpod.h
View File

@ -45,7 +45,7 @@
// ======================> interpod_device
class interpod_device : public device_t,
public device_cbm_iec_interface
public device_cbm_iec_interface
{
public:
// construction/destruction

50
src/emu/bus/cgenie/expansion/expansion.h
View File

@ -6,31 +6,31 @@
50-pin slot
1 GND 26 /MREQ
2 A8 27 /WR
3 A7 28 /C4
4 A6 29 (not used)
5 A9 30 /C1
6 A5 31 BD3
7 A4 32 /C3
8 A3 33 (not used)
9 A10 34 /C2
10 A2 35 DB6
11 A11 36 /RD
12 A1 37 BD4
13 A0 38 (not used)
14 A12 39 BD7
15 A14 40 (not used)
16 A13 41 BD5
17 /RFSH 42 (not useD)
18 A15 43 BD0
19 /INT 44 (not used)
20 /BUSRQ 45 BD2
21 /NMI 46 /RESET
22 /WAIT 47 /M1
23 /HALT 48 /IORQ
24 /BUSAK 49 BD1
25 /ROMDIS 50 +5V
1 GND 26 /MREQ
2 A8 27 /WR
3 A7 28 /C4
4 A6 29 (not used)
5 A9 30 /C1
6 A5 31 BD3
7 A4 32 /C3
8 A3 33 (not used)
9 A10 34 /C2
10 A2 35 DB6
11 A11 36 /RD
12 A1 37 BD4
13 A0 38 (not used)
14 A12 39 BD7
15 A14 40 (not used)
16 A13 41 BD5
17 /RFSH 42 (not useD)
18 A15 43 BD0
19 /INT 44 (not used)
20 /BUSRQ 45 BD2
21 /NMI 46 /RESET
22 /WAIT 47 /M1
23 /HALT 48 /IORQ
24 /BUSAK 49 BD1
25 /ROMDIS 50 +5V
***************************************************************************/

2
src/emu/bus/cgenie/expansion/floppy.c
View File

@ -83,7 +83,7 @@ static MACHINE_CONFIG_FRAGMENT( cgenie_fdc )
MCFG_FLOPPY_DRIVE_ADD("fd1793:2", cgenie_floppies, NULL, cgenie_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fd1793:3", cgenie_floppies, NULL, cgenie_fdc_device::floppy_formats)
// MCFG_SOFTWARE_LIST_ADD("floppy_list", "cgenie_flop")
// MCFG_SOFTWARE_LIST_ADD("floppy_list", "cgenie_flop")
MCFG_GENERIC_SOCKET_ADD("socket", generic_plain_slot, "cgenie_socket")
MCFG_GENERIC_EXTENSIONS("bin,rom")

20
src/emu/bus/cgenie/parallel/parallel.h
View File

@ -6,16 +6,16 @@
20-pin slot
1 GND 11 IOB2
2 +12V 12 IOB1
3 IOA3 13 IOB0
4 IOA4 14 IOB3
5 IOA0 15 IOB4
6 IOA5 16 IOB5
7 IOA1 17 IOB7
8 IOA2 18 IOB6
9 IOA7 19 +5V
10 IOA6 20 -12V
1 GND 11 IOB2
2 +12V 12 IOB1
3 IOA3 13 IOB0
4 IOA4 14 IOB3
5 IOA0 15 IOB4
6 IOA5 16 IOB5
7 IOA1 17 IOB7
8 IOA2 18 IOB6
9 IOA7 19 +5V
10 IOA6 20 -12V
***************************************************************************/

13
src/emu/bus/cpc/brunword4.c
View File

@ -2,13 +2,13 @@
// copyright-holders:Barry Rodewald
/*
Brunword MK4 - Word processor ROM / expansion
Brunword MK4 - Word processor ROM / expansion
Software is provided as an expansion device, which uses it own ROM mapping
Software is provided as an expansion device, which uses it own ROM mapping
The ROM select port will be handled by this device, calling back to the standard driver when necessary.
Not enabled for the CPC Plus, as ROM selection wraps after 63, making it impossible to see cartridge
banks in the upper ROM area (0x80-0xff)
The ROM select port will be handled by this device, calling back to the standard driver when necessary.
Not enabled for the CPC Plus, as ROM selection wraps after 63, making it impossible to see cartridge
banks in the upper ROM area (0x80-0xff)
*/
#include "brunword4.h"
@ -21,7 +21,7 @@ ROM_START( cpc_brunword4 )
ROM_LOAD( "brunw-c1.rom", 0x0000, 0x4000, CRC(3200299b) SHA1(d7d5fcacf3c6707a6629b0c65564ac44267d2b49) )
ROM_LOAD( "brunw-c2.rom", 0x4000, 0x4000, CRC(aa19aff1) SHA1(5aa4e87ae6ad2063540e3f5179298657bbd82bfb) )
ROM_LOAD( "brunw-c3.rom", 0x8000, 0x4000, CRC(eabe60fe) SHA1(41f605f1e1b5e2bc7dcbd702f2d202ab4d2f44ec) )
ROM_REGION( 0x80000, "mk4_roms", 0 )
ROM_LOAD( "brunw-c0.rom", 0x0000, 0x4000, CRC(45493337) SHA1(a971e2e63adb004c605cf642edde828e8b3ab897) )
ROM_LOAD( "brunw-c1.rom", 0x4000, 0x4000, CRC(3200299b) SHA1(d7d5fcacf3c6707a6629b0c65564ac44267d2b49) )
@ -108,4 +108,3 @@ void cpc_brunword4_device::set_mapping()
membank(":bank4")->set_base(ROM+((bank*0x4000) + 0x2000));
}
}

7
src/emu/bus/cpc/brunword4.h
View File

@ -2,7 +2,7 @@
// copyright-holders:Barry Rodewald
/*
Brunword MK4 - Word processor ROM / expansion
Brunword MK4 - Word processor ROM / expansion
*/
@ -21,7 +21,7 @@ public:
DECLARE_WRITE8_MEMBER(rombank_w);
virtual void set_mapping();
protected:
// device-level overrides
virtual void device_start();
@ -29,11 +29,10 @@ protected:
private:
cpc_expansion_slot_device *m_slot;
bool m_rombank_active;
UINT8 m_bank_sel;
};
// device type definition
extern const device_type CPC_BRUNWORD_MK4;

43
src/emu/bus/gameboy/mbc.c
View File

@ -694,12 +694,12 @@ WRITE8_MEMBER(gb_rom_m161_device::write_bank)
// MMM01
// This mmm01 implementation is mostly guess work, no clue how correct it all is
/* TODO: This implementation is wrong. Tauwasser
*
*
* Register 0: Map Latch, AA Mask, RAM Enable
* Register 1: EA1..EA0, RA18..RA14
* Register 2: ??, AA18..AA15, AA14..AA13
* Register 3: AA Multiplex, RA Mask, ???, MBC1 Mode
*
*
*/
READ8_MEMBER(gb_rom_mmm01_device::read_rom)
@ -748,7 +748,6 @@ WRITE8_MEMBER(gb_rom_mmm01_device::write_bank)
READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
{
UINT16 off_edit = offset;
/* Wait for 0x31 transitions of A15 (hi -> lo), i.e. ROM accesses; A15 = HI while in bootstrap */
@ -757,11 +756,11 @@ READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
m_mode = MODE_UNLOCKED;
else
m_unlock_cnt++;
/* Logo Switch */
if (m_mode == MODE_LOCKED)
off_edit |= 0x80;
/* Header Un-Scramble */
if ((off_edit & 0xFF00) == 0x0100) {
off_edit &= 0xFFAC;
@ -771,7 +770,7 @@ READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
off_edit |= ((offset >> 0) & 0x01) << 6;
}
//logerror("read from %04X (%04X)\n", offset, off_edit);
if (offset & 0x4000) /* RB1 */
return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask)] * 0x4000 + (offset & 0x3fff)];
else /* RB0 */
@ -780,38 +779,37 @@ READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
WRITE8_MEMBER(gb_rom_sachen_mmc1_device::write_bank)
{
/* Only A15..A6, A4, A1..A0 are connected */
/* We only decode upper three bits */
switch ((offset & 0xFFD3) & 0xE000)
{
case 0x0000: /* Base ROM Bank Register */
if ((m_latch_bank2 & 0x30) == 0x30)
m_base_bank = data;
//logerror("write to base bank %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
break;
case 0x2000: /* ROM Bank Register */
m_latch_bank2 = data ? data : 0x01;
//logerror("write to latch %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
break;
case 0x4000: /* ROM Bank Mask Register */
if ((m_latch_bank2 & 0x30) == 0x30)
m_mask = data;
//logerror("write to mask %X - %X\n", data, (m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask));
break;
case 0x6000:
/* nothing happens when writing to 0x6000-0x7fff, as verified by Tauwasser */
break;
default:
//logerror("write to unknown/unmapped area %04X <= %02X\n", offset, data);
/* did not extensively test other unlikely ranges */
break;
@ -822,27 +820,26 @@ WRITE8_MEMBER(gb_rom_sachen_mmc1_device::write_bank)
READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom)
{
UINT16 off_edit = offset;
/* Wait for 0x30 transitions of A15 (lo -> hi), i.e. ROM accesses; A15 = HI while in bootstrap */
/* This is 0x30 transitions, because we increment counter _after_ checking it, but A15 lo -> hi*/
/* transition means first read (hi -> lo transition) must not count */
if (m_unlock_cnt == 0x30 && m_mode == MODE_LOCKED_DMG) {
m_mode = MODE_LOCKED_CGB;
m_unlock_cnt = 0x00;
} else if (m_unlock_cnt == 0x30 && m_mode == MODE_LOCKED_CGB) {
m_mode = MODE_UNLOCKED;
}
if (m_unlock_cnt != 0x30)
m_unlock_cnt++;
/* Logo Switch */
if (m_mode == MODE_LOCKED_CGB)
off_edit |= 0x80;
/* Header Un-Scramble */
if ((off_edit & 0xFF00) == 0x0100) {
off_edit &= 0xFFAC;
@ -852,7 +849,7 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom)
off_edit |= ((offset >> 0) & 0x01) << 6;
}
//logerror("read from %04X (%04X) cnt: %02X\n", offset, off_edit, m_unlock_cnt);
if (offset & 0x4000) /* RB1 */
return m_rom[rom_bank_map[(m_base_bank & m_mask) | (m_latch_bank2 & ~m_mask)] * 0x4000 + (offset & 0x3fff)];
else /* RB0 */
@ -861,7 +858,6 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom)
READ8_MEMBER(gb_rom_sachen_mmc2_device::read_ram)
{
if (m_mode == MODE_LOCKED_DMG) {
m_unlock_cnt = 0x00;
m_mode = MODE_LOCKED_CGB;
@ -872,7 +868,6 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_ram)
WRITE8_MEMBER(gb_rom_sachen_mmc2_device::write_ram)
{
if (m_mode == MODE_LOCKED_DMG) {
m_unlock_cnt = 0x00;
m_mode = MODE_LOCKED_CGB;

2
src/emu/bus/ieee488/c2040.h
View File

@ -28,7 +28,7 @@
// ======================> c2040_t
class c2040_t : public device_t,
public device_ieee488_interface
public device_ieee488_interface
{
public:
// construction/destruction

2
src/emu/bus/ieee488/c8050.h
View File

@ -28,7 +28,7 @@
// ======================> c8050_t
class c8050_t : public device_t,
public device_ieee488_interface
public device_ieee488_interface
{
public:
// construction/destruction

2
src/emu/bus/ieee488/c8280.h
View File

@ -27,7 +27,7 @@
// ======================> c8280_t
class c8280_t : public device_t,
public device_ieee488_interface
public device_ieee488_interface
{
public:
// construction/destruction

2
src/emu/bus/ieee488/d9060.h
View File

@ -28,7 +28,7 @@
// ======================> d9060_base_t
class d9060_base_t : public device_t,
public device_ieee488_interface
public device_ieee488_interface
{
public:
enum

2
src/emu/bus/megadrive/jcart.c
View File

@ -4,7 +4,7 @@
MegaDrive / Genesis J-Cart (+SEPROM) emulation
Emulation based on earlier researches by ElBarto

2
src/emu/bus/megadrive/md_carts.c
View File

@ -2,7 +2,7 @@
// copyright-holders:Fabio Priuli
/**********************************************************************
Megadrive carts
Megadrive carts
**********************************************************************/

4
src/emu/bus/megadrive/rom.c
View File

@ -7,11 +7,11 @@
Here we emulate bankswitch / protection / NVRAM found on generic carts with no additional hardware
Emulation of the pirate carts is heavily indebted to the reverse engineering efforts made
by David Haywood (for HazeMD) and by EkeEke (for genplus-gx)
***********************************************************************************************************/
#include "emu.h"

6
src/emu/bus/nasbus/nasbus.h
View File

@ -131,8 +131,8 @@ class nasbus_slot_device : public device_t, public device_slot_interface
{
public:
// construction/destruction
nasbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
nasbus_slot_device(const machine_config &mconfig, device_type type, const char *name,
nasbus_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
nasbus_slot_device(const machine_config &mconfig, device_type type, const char *name,
const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
// device-level overrides
@ -155,7 +155,7 @@ class nasbus_device : public device_t
{
public:
// construction/destruction
nasbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
nasbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual ~nasbus_device();
template<class _Object> static devcb_base &set_ram_disable_handler(device_t &device, _Object object)

4
src/emu/bus/nubus/nubus_image.c
View File

@ -273,7 +273,7 @@ WRITE32_MEMBER( nubus_image_device::file_cmd_w )
char fullpath[1024];
UINT64 filesize;
// data = ((data & 0xff) << 24) | ((data & 0xff00) << 8) | ((data & 0xff0000) >> 8) | ((data & 0xff000000) >> 24);
// data = ((data & 0xff) << 24) | ((data & 0xff00) << 8) | ((data & 0xff0000) >> 8) | ((data & 0xff000000) >> 24);
filectx.curcmd = data;
switch(data) {
case kFileCmdGetDir:
@ -332,7 +332,7 @@ WRITE32_MEMBER( nubus_image_device::file_data_w )
//data = ni_ntohl(data);
if((filectx.bytecount + count) > filectx.filelen) count = filectx.filelen - filectx.bytecount;
osd_write(filectx.fd, &data, filectx.bytecount, count, &actualcount);
filectx.bytecount += actualcount;
filectx.bytecount += actualcount;
if(filectx.bytecount >= filectx.filelen) {
osd_close(filectx.fd);

2
src/emu/bus/plus4/c1551.h
View File

@ -27,7 +27,7 @@
// ======================> c1551_t
class c1551_t : public device_t,
public device_plus4_expansion_card_interface
public device_plus4_expansion_card_interface
{
public:
// construction/destruction

44
src/emu/clifront.c
View File

@ -1882,7 +1882,7 @@ int media_identifier::find_by_hash(const hash_collection &hashes, int length)
{
int found = 0;
slname_map listnames;
slname_map shortnames;
slname_map shortnames;
// iterate over drivers
m_drivlist.reset();
@ -1891,26 +1891,26 @@ int media_identifier::find_by_hash(const hash_collection &hashes, int length)
// iterate over devices, regions and files within the region */
device_iterator deviter(m_drivlist.config().root_device());
for (device_t *device = deviter.first(); device != NULL; device = deviter.next())
{
if (shortnames.add(device->shortname(), 0, FALSE) != TMERR_DUPLICATE)
{
for (const rom_entry *region = rom_first_region(*device); region != NULL; region = rom_next_region(region))
for (const rom_entry *rom = rom_first_file(region); rom != NULL; rom = rom_next_file(rom))
{
hash_collection romhashes(ROM_GETHASHDATA(rom));
if (!romhashes.flag(hash_collection::FLAG_NO_DUMP) && hashes == romhashes)
{
bool baddump = romhashes.flag(hash_collection::FLAG_BAD_DUMP);
// output information about the match
if (found)
osd_printf_info(" ");
osd_printf_info("= %s%-20s %-10s %s\n", baddump ? "(BAD) " : "", ROM_GETNAME(rom), m_drivlist.driver().name, m_drivlist.driver().description);
found++;
}
}
}
}
{
if (shortnames.add(device->shortname(), 0, FALSE) != TMERR_DUPLICATE)
{
for (const rom_entry *region = rom_first_region(*device); region != NULL; region = rom_next_region(region))
for (const rom_entry *rom = rom_first_file(region); rom != NULL; rom = rom_next_file(rom))
{
hash_collection romhashes(ROM_GETHASHDATA(rom));
if (!romhashes.flag(hash_collection::FLAG_NO_DUMP) && hashes == romhashes)
{
bool baddump = romhashes.flag(hash_collection::FLAG_BAD_DUMP);
// output information about the match
if (found)
osd_printf_info(" ");
osd_printf_info("= %s%-20s %-10s %s\n", baddump ? "(BAD) " : "", ROM_GETNAME(rom), m_drivlist.driver().name, m_drivlist.driver().description);
found++;
}
}
}
}
// next iterate over softlists
software_list_device_iterator iter(m_drivlist.config().root_device());
@ -1927,7 +1927,7 @@ int media_identifier::find_by_hash(const hash_collection &hashes, int length)
if (hashes == romhashes)
{
bool baddump = romhashes.flag(hash_collection::FLAG_BAD_DUMP);
// output information about the match
if (found)
osd_printf_info(" ");

4
src/emu/cpu/avr8/avr8.c
View File

@ -1906,9 +1906,9 @@ void avr8_device::timer5_tick()
case WGM5_FAST_PWM_ICR:
case WGM5_FAST_PWM_OCR:
#if LOG_TIMER_5
printf("Unimplemented timer#5 waveform generation mode: AVR8_WGM5 = 0x%02X\n", AVR8_WGM5);
printf("Unimplemented timer#5 waveform generation mode: AVR8_WGM5 = 0x%02X\n", AVR8_WGM5);
#endif
break;
break;
case WGM5_CTC_OCR:
//TODO: verify this! Can be very wrong!!!

20
src/emu/cpu/e0c6200/e0c6200.c
View File

@ -78,7 +78,7 @@ void e0c6200_cpu_device::device_start()
m_prev_pc = 0;
m_npc = 0;
m_jpc = 0;
m_a = 0;
m_b = 0;
m_xp = m_xh = m_xl = 0;
@ -158,7 +158,7 @@ void e0c6200_cpu_device::do_interrupt()
m_halt = m_sleep = false;
push_pc();
m_f &= ~I_FLAG;
// page 1 of the current bank
m_pc = (m_pc & 0x1000) | 0x100 | m_irq_vector;
@ -180,27 +180,27 @@ void e0c6200_cpu_device::execute_run()
break;
}
}
// core cpu not running (peripherals still work)
if (m_halt || m_sleep)
{
m_icount = 0;
break;
}
// remember previous state, prepare pset-longjump
m_prev_op = m_op;
m_prev_pc = m_pc;
m_jpc = ((m_prev_op & 0xfe0) == 0xe40) ? m_npc : (m_prev_pc & 0x1f00);
// fetch next opcode
debugger_instruction_hook(this, m_pc);
m_op = m_program->read_word(m_pc << 1) & 0xfff;
m_pc = (m_pc & 0x1000) | ((m_pc + 1) & 0x0fff);
// minimal opcode time is 5 clock cycles, opcodes take 5, 7, or 12 clock cycles
m_icount -= 5;
// handle opcode
execute_one();
}
@ -226,7 +226,7 @@ void e0c6200_cpu_device::execute_one()
// i = 4-bit immediate param
// e = 8-bit immediate param
// s = 8-bit immediate branch destination
switch (m_op & 0xf00)
{
// JP s: jump unconditional
@ -296,7 +296,6 @@ void e0c6200_cpu_device::execute_one()
default:
switch (m_op)
{
// LD r,q: load register with register
case 0xec0: /* m_a = m_a; */ break;
case 0xec1: m_a = m_b; break;
@ -698,7 +697,6 @@ void e0c6200_cpu_device::execute_one()
default:
switch (m_op & 0xff0)
{
// LD r,i: load register with 4-bit immediate data
case 0xe00: m_a = m_op & 0xf; break;
case 0xe10: m_b = m_op & 0xf; break;
@ -726,7 +724,7 @@ void e0c6200_cpu_device::execute_one()
break;
// LD Mn,A: load memory with A
case 0xf80:
case 0xf80:
write_mn(m_a);
break;

4
src/emu/cpu/e0c6200/e0c6200.h
View File

@ -63,7 +63,7 @@ protected:
UINT16 m_prev_pc;
UINT16 m_npc; // new bank/page prepared by pset
UINT16 m_jpc; // actual bank/page destination for jumps
// all work registers are 4-bit
UINT8 m_a; // accumulator
UINT8 m_b; // generic
@ -92,7 +92,7 @@ protected:
inline void inc_x();
inline void inc_y();
void do_branch(int condition = 1);
// opcode handlers
UINT8 op_inc(UINT8 x);
UINT8 op_dec(UINT8 x);

18
src/emu/cpu/e0c6200/e0c6200d.c
View File

@ -82,30 +82,30 @@ static char* decode_param(UINT16 opcode, int param, char* buffer)
int bits = ep_bits[param] & 0xf;
int shift = ep_bits[param] >> 4 & 0xf;
UINT16 opmask = opcode >> shift & ((1 << bits) - 1);
// redirect r/q to A/B/MX/MY
if (ep_bits[param] & 0x100)
param = ep_redirect_r[opmask];
// literal param
if (ep_bits[param] == 0)
{
strcpy(buffer, ep_name[param]);
return buffer;
}
// print value like how it's documented in the manual
char val[10];
if (bits > 4 || opmask > 9)
sprintf(val, "%02XH", opmask);
else
sprintf(val, "%d", opmask);
if (param == ep_MN)
sprintf(buffer, "M%s", val);
else
strcpy(buffer, val);
return buffer;
}
@ -113,7 +113,7 @@ static char* decode_param(UINT16 opcode, int param, char* buffer)
CPU_DISASSEMBLE(e0c6200)
{
UINT16 op = (oprom[1] | oprom[0] << 8) & 0xfff;
int m = -1;
int p1 = -1;
int p2 = -1;
@ -180,7 +180,6 @@ CPU_DISASSEMBLE(e0c6200)
default:
switch (op)
{
// RLC r
case 0xaf0: case 0xaf5: case 0xafa: case 0xaff:
m = em_RLC; p1 = ep_R0;
@ -475,7 +474,6 @@ CPU_DISASSEMBLE(e0c6200)
default:
switch (op & 0xff0)
{
// ADC XH,i
case 0xa00:
m = em_ADC; p1 = ep_XH; p2 = ep_I;
@ -694,7 +692,7 @@ CPU_DISASSEMBLE(e0c6200)
// fetch mnemonic
char *dst = buffer;
dst += sprintf(dst, "%-6s", em_name[m]);
// fetch param(s)
char pbuffer[10];
if (p1 != -1)
@ -705,6 +703,6 @@ CPU_DISASSEMBLE(e0c6200)
dst += sprintf(dst, ",%s", decode_param(op, p2, pbuffer));
}
}
return 1 | em_flags[m] | DASMFLAG_SUPPORTED;
}

4
src/emu/cpu/e0c6200/e0c6200op.inc
View File

@ -151,14 +151,14 @@ UINT8 e0c6200_cpu_device::op_add(UINT8 x, UINT8 y, int decimal)
m_icount -= 2;
x += y;
set_cf(x);
// decimal correction
if (m_f & decimal && x >= 10)
{
x -= 10;
m_f |= C_FLAG;
}
set_zf(x);
return x & 0xf;
}

102
src/emu/cpu/e0c6200/e0c6s46.c
View File

@ -4,7 +4,7 @@
Seiko Epson E0C6S46 MCU
QFP5-128pin, see manual for pinout
TODO:
- OSC3
- K input interrupts
@ -64,7 +64,7 @@ e0c6s46_device::e0c6s46_device(const machine_config &mconfig, const char *tag, d
void e0c6s46_device::device_start()
{
e0c6200_cpu_device::device_start();
// find ports
m_write_r0.resolve_safe();
m_write_r1.resolve_safe();
@ -88,7 +88,7 @@ void e0c6s46_device::device_start()
m_prgtimer_handle->adjust(attotime::never);
m_buzzer_handle = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(e0c6s46_device::buzzer_cb), this));
m_buzzer_handle->adjust(attotime::never);
// zerofill
memset(m_port_r, 0x0, sizeof(m_port_r));
m_r_dir = 0;
@ -97,7 +97,7 @@ void e0c6s46_device::device_start()
m_p_pullup = 0;
memset(m_port_k, 0xf, sizeof(m_port_k));
m_dfk0 = 0xf;
memset(m_irqflag, 0, sizeof(m_irqflag));
memset(m_irqmask, 0, sizeof(m_irqmask));
m_osc = 0;
@ -114,7 +114,7 @@ void e0c6s46_device::device_start()
m_swl_slice = 0;
m_swl_count = 0;
m_swh_count = 0;
m_prgtimer_select = 0;
m_prgtimer_on = 0;
m_prgtimer_src_pulse = 0;
@ -130,7 +130,7 @@ void e0c6s46_device::device_start()
m_bz_1shot_running = false;
m_bz_1shot_count = 0;
m_bz_pulse = 0;
// register for savestates
save_item(NAME(m_port_r));
save_item(NAME(m_r_dir));
@ -139,7 +139,7 @@ void e0c6s46_device::device_start()
save_item(NAME(m_p_pullup));
save_item(NAME(m_port_k));
save_item(NAME(m_dfk0));
save_item(NAME(m_irqflag));
save_item(NAME(m_irqmask));
save_item(NAME(m_osc));
@ -187,7 +187,7 @@ void e0c6s46_device::device_reset()
// reset interrupts
memset(m_irqflag, 0, sizeof(m_irqflag));
memset(m_irqmask, 0, sizeof(m_irqmask));
// reset other i/o
m_data->write_byte(0xf41, 0xf);
m_data->write_byte(0xf54, 0xf);
@ -205,7 +205,7 @@ void e0c6s46_device::device_reset()
m_data->write_byte(0xf7b, 0x0);
m_data->write_byte(0xf7d, 0x0);
m_data->write_byte(0xf7e, 0x0);
// reset ports
for (int i = 0; i < 5; i++)
write_r(i, m_port_r[i]);
@ -224,7 +224,7 @@ void e0c6s46_device::execute_one()
// E0C6S46 has no support for SLP opcode
if (m_op == 0xff9)
return;
e0c6200_cpu_device::execute_one();
}
@ -255,7 +255,7 @@ bool e0c6s46_device::check_interrupt()
m_irq_vector = 2*pri + 2;
int reg = priorder[pri];
m_irq_id = reg;
switch (reg)
{
// other: mask vs flag
@ -265,7 +265,7 @@ bool e0c6s46_device::check_interrupt()
break;
}
}
return false;
}
@ -278,7 +278,7 @@ void e0c6s46_device::execute_set_input(int line, int state)
state = (state) ? 1 : 0;
int port = line >> 2 & 1;
UINT8 bit = 1 << (line & 3);
m_port_k[port] = (m_port_k[port] & ~bit) | (state ? bit : 0);
}
@ -299,14 +299,14 @@ void e0c6s46_device::write_r(UINT8 port, UINT8 data)
UINT8 out = data;
if (port < 4 && !(m_r_dir >> port & 1))
out = 0xf;
switch (port)
{
case 0: m_write_r0(port, out, 0xff); break;
case 1: m_write_r1(port, out, 0xff); break;
case 2: m_write_r2(port, out, 0xff); break;
case 3: m_write_r3(port, out, 0xff); break; // TODO: R33 PTCLK/_SRDY
// R4x: special output
case 4:
// d3: buzzer on: direct output or 1-shot output
@ -336,7 +336,7 @@ void e0c6s46_device::write_p(UINT8 port, UINT8 data)
{
data &= 0xf;
m_port_p[port] = data;
// don't output if port direction is set to input
if (!(m_p_dir >> port & 1))
return;
@ -355,7 +355,7 @@ UINT8 e0c6s46_device::read_p(UINT8 port)
// return written value if port direction is set to output
if (m_p_dir >> port & 1)
return m_port_p[port];
switch (port)
{
case 0: return m_read_p0(port, 0xff);
@ -363,7 +363,7 @@ UINT8 e0c6s46_device::read_p(UINT8 port)
case 2: return m_read_p2(port, 0xff);
case 3: return m_read_p3(port, 0xff);
}
return 0;
}
@ -412,7 +412,7 @@ void e0c6s46_device::clock_watchdog()
void e0c6s46_device::clock_clktimer()
{
m_clktimer_count++;
// irq on falling edge of 32, 8, 2, 1hz
UINT8 flag = 0;
if ((m_clktimer_count & 0x07) == 0)
@ -427,7 +427,7 @@ void e0c6s46_device::clock_clktimer()
m_irqflag[IRQREG_CLKTIMER] |= flag;
if (m_irqflag[IRQREG_CLKTIMER] & m_irqmask[IRQREG_CLKTIMER])
m_possible_irq = true;
// 1hz falling edge also clocks the watchdog timer
if (m_clktimer_count == 0)
clock_watchdog();
@ -439,14 +439,14 @@ void e0c6s46_device::clock_clktimer()
void e0c6s46_device::clock_stopwatch()
{
m_swl_slice++;
// 1 slice is 3 ticks(256hz) on even and 2 ticks on uneven counts,
// but from count 1 to 2 it's 3 ticks, 6 out of 100 times, to make
// exactly 26/256hz * 6 + 25/256hz * 4 = 1 second
int swl_next = 3 - (m_swl_count & 1);
if (m_swl_count == 1 && !(m_swh_count >> 1 & 1))
swl_next = 3;
if (m_swl_slice == swl_next)
{
m_swl_slice = 0;
@ -477,7 +477,7 @@ void e0c6s46_device::clock_prgtimer()
m_irqflag[IRQREG_PRGTIMER] |= 1;
if (m_irqflag[IRQREG_PRGTIMER] & m_irqmask[IRQREG_PRGTIMER])
m_possible_irq = true;
// note: a reload of 0 indicates a 256-counter
m_prgtimer_count = m_prgtimer_reload;
}
@ -489,7 +489,7 @@ bool e0c6s46_device::prgtimer_reset_prescaler()
UINT8 sel = m_prgtimer_select & 7;
if (sel >= 2)
m_prgtimer_handle->adjust(attotime::from_ticks(2 << (sel ^ 7), unscaled_clock()));
return (sel >= 2);
}
@ -501,7 +501,7 @@ TIMER_CALLBACK_MEMBER(e0c6s46_device::prgtimer_cb)
m_prgtimer_src_pulse ^= 1;
m_prgtimer_cur_pulse = m_prgtimer_src_pulse | (m_prgtimer_on ^ 1);
// clock prgtimer on falling edge of pulse+on
if (m_prgtimer_cur_pulse == 0)
clock_prgtimer();
@ -515,17 +515,17 @@ void e0c6s46_device::schedule_buzzer()
// only schedule next buzzer timeout if it's on
if (m_bz_43_on != 0 && !m_bz_1shot_running)
return;
// pulse width differs per frequency selection
int mul = (m_bz_freq & 4) ? 1 : 2;
int high = (m_bz_freq & 2) ? 12 : 8;
int low = 16 + (m_bz_freq << 2 & 0xc);
// pulse width envelope if it's on
if (m_bz_envelope & 1)
high -= m_bz_duty_ratio;
low -= high;
m_buzzer_handle->adjust(attotime::from_ticks(m_bz_pulse ? high : low, mul * unscaled_clock()));
}
@ -548,14 +548,14 @@ void e0c6s46_device::reset_buzzer()
void e0c6s46_device::clock_bz_1shot()
{
m_bz_1shot_running = true;
// reload counter the 1st time
if (m_bz_1shot_count == 0)
{
reset_buzzer();
m_bz_1shot_count = (m_bz_freq & 8) ? 16 : 8;
}
// stop ringing when counter reaches 0
else if (--m_bz_1shot_count == 0)
{
@ -586,7 +586,7 @@ UINT32 e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap
pixel = 1;
else
lcd_on = true;
// draw pixels
for (int offset = 0; offset < 0x50; offset++)
{
@ -594,11 +594,11 @@ UINT32 e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap
{
if (lcd_on)
pixel = vram[offset] >> c & 1;
// 16 COM(common) pins, 40 SEG(segment) pins
int seg = offset / 2;
int com = bank * 8 + (offset & 1) * 4 + c;
if (m_pixel_update_handler != NULL)
m_pixel_update_handler(*this, bitmap, cliprect, m_lcd_contrast, seg, com, pixel);
else if (cliprect.contains(seg, com))
@ -631,7 +631,7 @@ READ8_MEMBER(e0c6s46_device::io_r)
}
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15:
return m_irqmask[offset-0x10];
// K input ports
case 0x40: case 0x42:
return m_port_k[offset >> 1 & 1];
@ -643,7 +643,7 @@ READ8_MEMBER(e0c6s46_device::io_r)
return m_port_r[offset & 7];
case 0x7b:
return m_r_dir;
// P I/O ports
case 0x60: case 0x61: case 0x62: case 0x63:
return read_p(offset & 3);
@ -651,11 +651,11 @@ READ8_MEMBER(e0c6s46_device::io_r)
return m_p_dir;
case 0x7e:
return m_p_pullup;
// clock-timer (lo, hi)
case 0x20: case 0x21:
return m_clktimer_count >> (4 * (offset & 1)) & 0xf;
// stopwatch timer
case 0x22:
return m_swl_count;
@ -663,7 +663,7 @@ READ8_MEMBER(e0c6s46_device::io_r)
return m_swh_count;
case 0x77:
return m_stopwatch_on;
// programmable timer
case 0x24: case 0x25:
return m_prgtimer_count >> (4 * (offset & 1)) & 0xf;
@ -673,34 +673,34 @@ READ8_MEMBER(e0c6s46_device::io_r)
return m_prgtimer_on;
case 0x79:
return m_prgtimer_select;
// buzzer
case 0x74:
return m_bz_freq;
case 0x75:
// d3: 1-shot buzzer is on
return m_bz_1shot_on | m_bz_envelope;
// OSC circuit
case 0x70:
return m_osc;
// LCD driver
case 0x71:
return m_lcd_control;
case 0x72:
return m_lcd_contrast;
// SVD circuit (supply voltage detection)
case 0x73:
// d3: criteria voltage* is 0: <=, 1: > source voltage (Vdd-Vss)
// *0,1,2,3: -2.2V, -2.5V, -3.1V, -4.2V, 1 when off
return m_svd | ((m_svd & 4 && m_svd != 7) ? 0 : 8);
// write-only registers
case 0x76:
break;
default:
if (!space.debugger_access())
logerror("%s unknown io_r from $0F%02X at $%04X\n", tag(), offset, m_prev_pc);
@ -722,13 +722,13 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
m_possible_irq = true;
break;
}
// K input ports
case 0x41:
// d0-d3: K0x irq on 0: rising edge, 1: falling edge
m_dfk0 = data;
break;
// R output ports
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54:
write_r(offset & 7, data);
@ -744,7 +744,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
write_r(i, m_port_r[i]);
}
break;
// P I/O ports
case 0x60: case 0x61: case 0x62: case 0x63:
write_p(offset & 3, data);
@ -764,7 +764,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
// d0-d3: Px* pull up resistor on/off
m_p_pullup = data;
break;
// OSC circuit
case 0x70:
// d0,d1: CPU operating voltage
@ -793,7 +793,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
// d2: on
m_svd = data & 7;
break;
// clock-timer
case 0x76:
// d0: reset watchdog
@ -804,7 +804,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
if (data & 2)
m_clktimer_count = 0;
break;
// stopwatch timer
case 0x77:
// d0: run/stop counter
@ -878,7 +878,7 @@ WRITE8_MEMBER(e0c6s46_device::io_w)
m_bz_envelope = data & 3;
m_bz_1shot_on |= data & 8;
break;
// read-only registers
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05:
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25:

6
src/emu/cpu/e0c6200/e0c6s46.h
View File

@ -110,7 +110,7 @@ private:
UINT8 m_irqmask[6];
UINT8 m_osc;
UINT8 m_svd;
UINT8 m_lcd_control;
UINT8 m_lcd_contrast;
e0c6s46_pixel_update_func m_pixel_update_handler;
@ -123,7 +123,7 @@ private:
void write_r4_out();
void write_p(UINT8 port, UINT8 data);
UINT8 read_p(UINT8 port);
UINT8 m_port_r[5];
UINT8 m_r_dir;
UINT8 m_port_p[4];
@ -148,7 +148,7 @@ private:
int m_swl_count;
int m_swh_count;
void clock_stopwatch();
UINT8 m_prgtimer_select;
UINT8 m_prgtimer_on;
int m_prgtimer_src_pulse;

4
src/emu/cpu/melps4/m58846.c
View File

@ -50,7 +50,7 @@ offs_t m58846_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o
void m58846_device::device_start()
{
melps4_cpu_device::device_start();
// set fixed state
m_bm_page = 2;
m_int_page = 1;
@ -158,7 +158,7 @@ void m58846_device::execute_one()
}
break; // 0xff
}
break; // 0xfc

10
src/emu/cpu/melps4/melps4.c
View File

@ -3,7 +3,7 @@
/*
Mitsubishi MELPS 4 MCU family cores
Known types and their features:
(* means not emulated yet)
@ -16,7 +16,7 @@
M58846: 42-pin DIL, 2Kx9 ROM, 128x4 RAM, 2 timers(not same as M58845), extra I/O ports
*M58847: 40-pin DIL, 2Kx9 ROM, 128x4 RAM, extra I/O ports(not same as M58846)
*M58848: ? (couldn't find info, just that it exists)
MELPS 41/42 subfamily:
*M58494: 72-pin QFP CMOS, 4Kx10 ROM, 32x4 internal + 4Kx4 external RAM, 2 timers
@ -74,7 +74,7 @@ void melps4_cpu_device::device_start()
m_data = &space(AS_DATA);
m_prgmask = (1 << m_prgwidth) - 1;
m_datamask = (1 << m_datawidth) - 1;
// zerofill
m_pc = 0;
m_prev_pc = 0;
@ -87,7 +87,7 @@ void melps4_cpu_device::device_start()
m_skip = false;
m_inte = 0;
m_intp = 1;
m_a = 0;
m_b = 0;
m_e = 0;
@ -163,7 +163,7 @@ void melps4_cpu_device::device_reset()
m_inte = 0;
m_intp = 1;
op_lcps(); // CPS=0
m_v = 0;
m_w = 0;
}

8
src/emu/cpu/melps4/melps4.h
View File

@ -96,7 +96,7 @@ protected:
UINT8 m_bm_page; // short BM default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47
UINT8 m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47
UINT8 m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others)
// internal state, misc regs
UINT16 m_pc; // program counter (11 or 10-bit)
UINT16 m_prev_pc;
@ -104,7 +104,7 @@ protected:
UINT16 m_op;
UINT16 m_prev_op;
UINT8 m_bitmask; // opcode bit argument
UINT8 m_cps; // DP,CY or DP',CY' selected
bool m_skip; // skip next opcode
UINT8 m_inte; // interrupt enable flag
@ -118,13 +118,13 @@ protected:
UINT8 m_x, m_x2; // RAM index X, X', 2-bit
UINT8 m_z, m_z2; // RAM index Z, Z', 1-bit, optional
UINT8 m_cy, m_cy2; // carry flag(s)
UINT8 m_h; // A/D converter H or generic
UINT8 m_l; // A/D converter L or generic
UINT8 m_c; // A/D converter counter
UINT8 m_v; // timer control V
UINT8 m_w; // timer control W
// misc internal helpers
UINT8 ram_r();
void ram_w(UINT8 data);

6
src/emu/cpu/melps4/melps4d.c
View File

@ -3,7 +3,7 @@
/*
Mitsubishi MELPS 4 MCU family disassembler
Not counting the extra opcodes for peripherals (eg. timers, A/D),
each MCU in the series has small differences in the opcode map.
@ -117,10 +117,10 @@ CPU_DISASSEMBLE(m58846)
instr = m58846_opmap[op];
dst += sprintf(dst, "%-6s", em_name[instr]);
// get immediate param
UINT8 bits = em_bits[instr];
// special case for LXY x,y
if (instr == em_LXY)
{

4
src/emu/cpu/melps4/melps4op.inc
View File

@ -115,14 +115,14 @@ void melps4_cpu_device::op_lcps()
if ((m_op & 1) != m_cps)
{
m_cps = m_op & 1;
// swap registers
UINT8 x, y, z, cy;
x = m_x;
y = m_y;
z = m_z;
cy = m_cy;
m_x = m_x2;
m_y = m_y2;
m_z = m_z2;

2
src/emu/cpu/mips/mips3drc.c
View File

@ -166,7 +166,7 @@ void mips3_device::clear_fastram(UINT32 select_start)
m_fastram[i].readonly = false;
m_fastram[i].base = NULL;
}
m_fastram_select=select_start;
m_fastram_select=select_start;
}
/*-------------------------------------------------

4
src/emu/cpu/tlcs90/tlcs90.c
View File

@ -6,9 +6,9 @@
emulation by Luca Elia, based on the Z80 core by Juergen Buchmueller
ChangeLog:
ChangeLog:
20150517 Fixed TRUN bit masking (timers start/stop handling) [Rainer Keuchel]
20150517 Fixed TRUN bit masking (timers start/stop handling) [Rainer Keuchel]
*************************************************************************************************************/

2
src/emu/cpu/tms34010/tms34010.c
View File

@ -651,7 +651,7 @@ void tms340x0_device::device_reset()
/* HALT the CPU if requested, and remember to re-read the starting PC */
/* the first time we are run */
m_reset_deferred = m_halt_on_reset;
if (m_reset_deferred)
{
io_register_w(*m_program, REG_HSTCTLH, 0x8000, 0xffff);

36
src/emu/machine/ds1315.c
View File

@ -5,21 +5,21 @@
ds1315.c
Dallas Semiconductor's Phantom Time Chip DS1315.
NOTE: writes are decoded, but the host's time will always be returned when asked.
NOTE: writes are decoded, but the host's time will always be returned when asked.
April 2015: chip enable / chip reset / phantom writes by Karl-Ludwig Deisenhofer
April 2015: chip enable / chip reset / phantom writes by Karl-Ludwig Deisenhofer
November 2001: implementation by Tim Lindner
November 2001: implementation by Tim Lindner
HOW DOES IT WORK?
HOW DOES IT WORK?
READS: pattern recognition (64 bits in correct order). When RTC finally enables
64 bits of data can be read. Chance of accidential pattern recognition is minimal.
READS: pattern recognition (64 bits in correct order). When RTC finally enables
64 bits of data can be read. Chance of accidential pattern recognition is minimal.
WRITES: two different locations (bits 0 and 1) are used to transfer data to the
DS1315. 64 bit with time/date info are transmitted directly after recognition
of the magic 64 bit pattern (see read above).
**************************************************************************************/
WRITES: two different locations (bits 0 and 1) are used to transfer data to the
DS1315. 64 bit with time/date info are transmitted directly after recognition
of the magic 64 bit pattern (see read above).
**************************************************************************************/
#include "ds1315.h"
#include "coreutil.h"
@ -170,7 +170,7 @@ void ds1315_device::fill_raw_data()
/* get the current date/time from the core */
machine().current_datetime(systime);
raw[0] = 0; /* tenths and hundreths of seconds are always zero */
raw[1] = dec_2_bcd(systime.local_time.second);
raw[2] = dec_2_bcd(systime.local_time.minute);
@ -223,8 +223,8 @@ READ8_MEMBER(ds1315_device::write_data)
/*-------------------------------------------------
ds1315_input_raw_data
Routine is called when new date and time has
been written to the clock chip. Currently we
Routine is called when new date and time has
been written to the clock chip. Currently we
ignore setting the date and time in the clock
chip.
-------------------------------------------------*/
@ -242,7 +242,7 @@ void ds1315_device::input_raw_data()
flag = 1;
if (m_raw_data[i] & 1)
raw[j] |= flag;
raw[j] |= flag;
flag <<= 1;
}
raw[0] = bcd_2_dec(raw[0]); // hundreds of seconds
@ -255,9 +255,9 @@ void ds1315_device::input_raw_data()
raw[6] = bcd_2_dec(raw[6]); // month
raw[7] = bcd_2_dec(raw[7]); // year (two digits)
printf("\nDS1315 RTC INPUT (WILL BE IGNORED) mm/dd/yy hh:mm:ss - %02d/%02d/%02d %02d/%02d/%02d",
raw[6], raw[5], raw[7], raw[3], raw[2], raw[1]
);
printf("\nDS1315 RTC INPUT (WILL BE IGNORED) mm/dd/yy hh:mm:ss - %02d/%02d/%02d %02d/%02d/%02d",
raw[6], raw[5], raw[7], raw[3], raw[2], raw[1]
);
}
/*-------------------------------------------------
@ -265,7 +265,7 @@ void ds1315_device::input_raw_data()
-------------------------------------------------*/
bool ds1315_device::chip_enable()
{
return (m_mode == DS_CALENDAR_IO);
return (m_mode == DS_CALENDAR_IO);
}
// Set a defined state (important for pattern detection)

2
src/emu/machine/s2636.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Mariusz Wojcieszek, Peter Trauner
// copyright-holders:Mariusz Wojcieszek, Peter Trauner
/**********************************************************************
Signetics 2636 video chip

2
src/emu/machine/s2636.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Mariusz Wojcieszek, Peter Trauner
// copyright-holders:Mariusz Wojcieszek, Peter Trauner
/**********************************************************************
Signetics 2636 video chip

160
src/emu/machine/wd2010.c
View File

@ -8,7 +8,7 @@ Portions (2015) : Karl-Ludwig Deisenhofer
**********************************************************************
Implements WD2010 / WD1010 controller basics.
Provides IRQ / (B)DRQ signals needed for early MFM cards.
Honors DRIVE_READY and WRITE FAULT (DRDY / WF).
@ -17,16 +17,16 @@ Implements WD2010 / WD1010 controller basics.
LIST OF UNIMPLEMENTED FEATURES :
- MULTI SECTOR TRANSFERS (M = 1); MULTIPLE DRIVES
- AUTO_SCAN_ID / SEEK + INDEX TIMERS / ID NOT FOUND
- AUTO_SCAN_ID / SEEK + INDEX TIMERS / ID NOT FOUND
- IMPLIED SEEKS / IMPLIED WRITES / RETRIES
- EDGE or LEVEL TRIGGERED SEEK_COMPLETE (SC)
- SET_PARAMETER / COMPUTE_CORRECTION (DWC flag!)
Pseudo code (from datasheet) left in to illustrate
the intended instruction flow. Some loops were omitted!
Pseudo code (from datasheet) left in to illustrate
the intended instruction flow. Some loops were omitted!
USAGE: tie WF (write fault) to ground if not needed:
MCFG_WD2010_IN_WF_CB(GND)
MCFG_WD2010_IN_WF_CB(GND)
Other signals should be set to VCC if not serviced:
MCFG_WD2010_IN_DRDY_CB(VCC) // DRIVE READY = VCC
@ -34,17 +34,17 @@ Implements WD2010 / WD1010 controller basics.
**********************************************************************/
// WD 2010 CONFIGURATION (2048 cylinder limit)
#define STEP_LIMIT 2048
#define CYLINDER_HIGH_MASK 0x07
#define STEP_LIMIT 2048
#define CYLINDER_HIGH_MASK 0x07
// DEC RD51 chip; different STEP / CYLINDER LIMIT (**):
// WD 1010 CONFIGURATION (1024 cylinder limit)
// #define STEP_LIMIT 1024
// #define CYLINDER_HIGH_MASK 0x03
// WD 1010 CONFIGURATION (1024 cylinder limit)
// #define STEP_LIMIT 1024
// #define CYLINDER_HIGH_MASK 0x03
// --------------------------------------------------------
#define MAX_MFM_SECTORS 17 // STANDARD MFM SECTORS/TRACK
#define MAX_MFM_SECTORS 17 // STANDARD MFM SECTORS/TRACK
// --------------------------------------------------------
@ -229,7 +229,7 @@ READ8_MEMBER(wd2010_device::read)
switch (offset)
{
case TASK_FILE_ERROR:
if (m_status & STATUS_CIP) // "if other registers are read while CIP, the status register contents are returned."
if (m_status & STATUS_CIP) // "if other registers are read while CIP, the status register contents are returned."
data = (m_in_drdy_cb() ? 0x40 : 0) | (m_in_wf_cb() ? 0x20 : 0) | (m_in_sc_cb() ? 0x10 : 0) | m_status;// see STATUS register
else
data = m_error;
@ -245,7 +245,6 @@ READ8_MEMBER(wd2010_device::read)
if (offset == TASK_FILE_SDH_REGISTER)
{
logerror("(READ) %s WD2010 '%s' SDH: %u\n", machine().describe_context(), tag(), data);
logerror("(READ) %s WD2010 '%s' Head: %u\n", machine().describe_context(), tag(), HEAD);
logerror("(READ) %s WD2010 '%s' Drive: %u\n", machine().describe_context(), tag(), DRIVE);
@ -302,7 +301,7 @@ WRITE8_MEMBER(wd2010_device::write)
case TASK_FILE_COMMAND:
m_out_intrq_cb(CLEAR_LINE); // "either reading the status register or writing a new command clears INTRQ"
m_status &= ~(STATUS_ERR | STATUS_BSY | STATUS_CIP); // "Reset ERR bit in STATUS upon new cmd" (see datasheet)
m_error = 0;
m_error = 0;
if (data == COMMAND_COMPUTE_CORRECTION)
{
@ -381,8 +380,8 @@ void wd2010_device::set_parameter(UINT8 data)
//-------------------------------------------------
void wd2010_device::restore(UINT8 data)
{
UINT8 newstatus = STATUS_RDY | STATUS_SC;
UINT8 newstatus = STATUS_RDY | STATUS_SC;
m_out_intrq_cb(CLEAR_LINE); // reset INTRQ, errors, set BUSY, CIP
m_error = 0;
m_status = STATUS_BSY | STATUS_CIP;
@ -408,8 +407,8 @@ void wd2010_device::restore(UINT8 data)
m_out_bcr_cb(0); // pulse BCR
m_out_bcr_cb(1);
m_error = ERROR_AC; // ERROR : ABORTED COMMAND
complete_cmd(newstatus | STATUS_ERR);
m_error = ERROR_AC; // ERROR : ABORTED COMMAND
complete_cmd(newstatus | STATUS_ERR);
return;
}
}
@ -419,7 +418,7 @@ void wd2010_device::restore(UINT8 data)
{
m_out_bcr_cb(0); // pulse BCR
m_out_bcr_cb(1);
newstatus &= ~(STATUS_BSY | STATUS_CIP); // prepare new status; (INTRQ later) reset BSY, CIP
newstatus &= ~(STATUS_BSY | STATUS_CIP); // prepare new status; (INTRQ later) reset BSY, CIP
complete_cmd(newstatus);
return;
}
@ -431,7 +430,7 @@ void wd2010_device::restore(UINT8 data)
m_out_bcr_cb(0); // pulse BCR
m_out_bcr_cb(1);
newstatus &= ~(STATUS_BSY | STATUS_CIP); // prepare new status; (INTRQ later) reset BSY, CIP
newstatus &= ~(STATUS_BSY | STATUS_CIP); // prepare new status; (INTRQ later) reset BSY, CIP
complete_cmd(newstatus);
return;
}
@ -452,12 +451,12 @@ void wd2010_device::restore(UINT8 data)
// NOT IMPLEMENTED: IMPLIED SEEK ("wait until rising edge of SC signal")
void wd2010_device::seek(UINT8 data)
{
UINT8 newstatus = STATUS_RDY | STATUS_SC;
{
UINT8 newstatus = STATUS_RDY | STATUS_SC;
m_out_intrq_cb(CLEAR_LINE); // reset INTRQ, errors, set BUSY, CIP
m_error = 0;
m_status = STATUS_BSY | STATUS_CIP;
m_status = STATUS_BSY | STATUS_CIP;
// TODO : store STEP RATE.
@ -472,12 +471,12 @@ void wd2010_device::seek(UINT8 data)
if (m_present_cylinder > cylinder_registers)
{
step_pulses = m_present_cylinder - cylinder_registers;
direction = 0;
direction = 0;
}
else
{
step_pulses = cylinder_registers - m_present_cylinder;
direction = 1;
direction = 1;
}
logerror("SEEK - direction = %u, step_pulses = %u\n", direction, step_pulses);
m_out_dirin_cb(direction);
@ -490,10 +489,10 @@ void wd2010_device::seek(UINT8 data)
}
else
{
while (step_pulses > 0) // issue STEP PULSES
while (step_pulses > 0) // issue STEP PULSES
{
if (direction == 0)
{
if (direction == 0)
{
m_out_step_cb(1); // issue a step pulse
m_out_step_cb(0);
@ -528,13 +527,13 @@ void wd2010_device::seek(UINT8 data)
logerror("SEEK (END) - m_present_cylinder = %u\n", m_present_cylinder);
cmd_timer->adjust(attotime::from_msec(35), newstatus); // 35 msecs makes "SEEK_TIMING" test happy.
cmd_timer->adjust(attotime::from_msec(35), newstatus); // 35 msecs makes "SEEK_TIMING" test happy.
}
//-------------------------------------------------
// read_sector -
//-------------------------------------------------
// FIXME: multiple sector transfers, ID / CYL / HEAD / SIZE match
// FIXME: multiple sector transfers, ID / CYL / HEAD / SIZE match
// + ERROR HANDLING (...)
void wd2010_device::read_sector(UINT8 data)
{
@ -548,11 +547,11 @@ void wd2010_device::read_sector(UINT8 data)
// Assume: drive NO # has not changed... (else: SCAN_ID; GET CYL#)
auto_scan_id(data); // has drive number changed?
// CYL REGISTERS and INTERNAL CYL. SAME ?
// CYL REGISTERS and INTERNAL CYL. SAME ?
// TODO: < NOT SAME? THEN _SEEK_ >
// DRIVE NOT READY? OR WF?
if ( (!m_in_drdy_cb()) || m_in_wf_cb() )
// DRIVE NOT READY? OR WF?
if ( (!m_in_drdy_cb()) || m_in_wf_cb() )
{
m_error = ERROR_AC; // ABORTED_COMMAND
complete_cmd(newstatus | STATUS_ERR);
@ -564,7 +563,7 @@ void wd2010_device::read_sector(UINT8 data)
m_out_bcr_cb(0); // strobe BCR
m_out_bcr_cb(1);
if (!m_in_drdy_cb()) // DRIVE NOT READY?
{
m_error = ERROR_AC; // ABORTED_COMMAND
@ -576,7 +575,7 @@ void wd2010_device::read_sector(UINT8 data)
// < SEARCH FOR ID FIELD >
// < CYL / HEAD / SEC.SIZE MATCH ? >
// < ID NOT FOUND >
// < ID NOT FOUND >
if (SECTOR_NUMBER > MAX_MFM_SECTORS)
{
// prepare new status; (later IRQ +) reset BSY, CIP
@ -587,8 +586,8 @@ void wd2010_device::read_sector(UINT8 data)
// LOOP OVER 10 INDEXES : SCAN_ID / GET CYL.# (not implemented: ID NOT FOUND)
// CYL / HEAD / SEC.SIZE MATCH ? => (ID FOUND)
//
// CYL / HEAD / SEC.SIZE MATCH ? => (ID FOUND)
//
// NO "BAD BLOCK DETECT" (** NOT IMPLEMENTED **)
// NO "CRC ERROR" (** NOT IMPLEMENTED **)
// AND "DAM FOUND" (** NOT IMPLEMENTED **)
@ -618,7 +617,7 @@ void wd2010_device::read_sector(UINT8 data)
// reset BUSY (* after * TRANSFER OF SECTOR in READ)
m_status &= ~(STATUS_BSY);
// FLAG "I" SET?
// FLAG "I" SET?
if (!(data & 8)) // (I = 0 INTRQ occurs with BDRQ/DRQ indicating the Sector Buffer is full...)
{
m_out_intrq_cb(ASSERT_LINE);
@ -627,7 +626,7 @@ void wd2010_device::read_sector(UINT8 data)
}
else
{
intrq_at_end = 0; // (default): (I = 1 INTRQ occurs when the command is completed and the Host has read the Sector Buffer)
intrq_at_end = 0; // (default): (I = 1 INTRQ occurs when the command is completed and the Host has read the Sector Buffer)
}
// (WAIT FOR): BRDY LOW TO HIGH? (see -> TIMER)
@ -636,7 +635,7 @@ void wd2010_device::read_sector(UINT8 data)
} // DRIVE_READY ? (outer)
// NOTE : (intrq_at_end = 0) - INTRQ occurs when the command is completed
// NOTE : (intrq_at_end = 0) - INTRQ occurs when the command is completed
newstatus |= (m_status & ~(STATUS_CIP | STATUS_DRQ)) | intrq_at_end; // de-assert CIP + DRQ (BSY already reset)
deassert_read_when_buffer_ready_high->adjust(attotime::from_usec(1), newstatus); // complete command ON *RISING EDGE * OF BUFFER_READY
@ -652,7 +651,7 @@ void wd2010_device::write_sector(UINT8 data)
{
m_error = 0; // De-assert ERROR + DRQ
m_status &= ~(STATUS_DRQ);
m_status = STATUS_BSY | STATUS_CIP; // Assert BUSY + CIP
m_status |= STATUS_DRQ; // Assert BDRQ + DRQ (= status bit 3)
@ -673,13 +672,13 @@ void wd2010_device::complete_write_sector(UINT8 data)
m_out_bdrq_cb(0); // DE-Assert BDRQ (...and DRQ !)
m_status &= ~(STATUS_DRQ);
// (When drive changed) : SCAN_ID / GET CYL#
// (When drive changed) : SCAN_ID / GET CYL#
auto_scan_id(data); // has drive number changed? (*** UNIMPLEMENTED ***)
// Assume YES : CYL.register + internal CYL.register SAME? (if NO => SEEK!)
// Assume : SEEK_COMPLETE = YES
if (!m_in_drdy_cb() || m_in_wf_cb()) // DRIVE IS READY / NO WF?
if (!m_in_drdy_cb() || m_in_wf_cb()) // DRIVE IS READY / NO WF?
{
m_error = ERROR_AC; // ABORTED_COMMAND
complete_cmd(newstatus | STATUS_ERR);
@ -692,10 +691,10 @@ void wd2010_device::complete_write_sector(UINT8 data)
// < Correct ID found >
// (*** UNIMPLEMENTED ***) : 'ID NOT FOUND' - set bit 4 error register
// ........................: => SCAN_ID => RE-SEEK (2-10 INDEX PULSES) / Set ERR bit 0 status register ..
// ........................: => SCAN_ID => RE-SEEK (2-10 INDEX PULSES) / Set ERR bit 0 status register ..
m_status &= ~(STATUS_SC); // "WRITE_GATE valid when SEEK_COMPLETE = 0" (see Rainbow 100 Addendum!)
m_out_bcs_cb(1);
m_out_wg_cb(1); // (!)
@ -728,7 +727,7 @@ void wd2010_device::complete_write_sector(UINT8 data)
// ******************************************************
// AUTO SCAN-ID (whenever DRIVE # changes):
// * does nothing right now *
// * does nothing right now *
// ******************************************************
void wd2010_device::auto_scan_id(UINT8 data)
{
@ -774,7 +773,7 @@ void wd2010_device::update_sdh(UINT8 new_sector_size, UINT8 new_head, UINT16 new
// Reads the cylinder number from the track on which the heads are PRESENTLY located,
// and writes this into the Present Cylinder Position Register.
// FIXME: NO ID HANDLING (ID FOUND / NOT FOUND), NO BAD BLOCK; NO CRC
// FIXME: NO ID HANDLING (ID FOUND / NOT FOUND), NO BAD BLOCK; NO CRC
void wd2010_device::scan_id(UINT8 data)
{
UINT8 newstatus = STATUS_RDY;
@ -787,7 +786,7 @@ void wd2010_device::scan_id(UINT8 data)
// < TODO: Search for ANY ID FIELD. >
// Assume ID FOUND :
update_sdh( 32, 0, 0, 1 ); // (NEW:) SECTOR_SIZE, HEAD, CYLINDER, SECTOR_NR
update_sdh( 32, 0, 0, 1 ); // (NEW:) SECTOR_SIZE, HEAD, CYLINDER, SECTOR_NR
// NO BAD BLOCK.
// NO CRC ERROR.
@ -807,9 +806,9 @@ void wd2010_device::scan_id(UINT8 data)
// < UNIMPLEMENTED: (IMPLIED) SEEKs, INDEX, CRC and GAPs >
//--------------------------------------------------------
// SECTOR_COUNT REG.= 'total # of sectors to be formatted'
// (raw number; no multiplication) = 16 decimal on RD51
// (raw number; no multiplication) = 16 decimal on RD51
// SECTOR NUMBER REG.= number of bytes - 3 (for GAP 1 + 3)
// SECTOR NUMBER REG.= number of bytes - 3 (for GAP 1 + 3)
// = 40 decimal on DEC RD51 with WUTIL 3.2
//--------------------------------------------------------
void wd2010_device::format(UINT8 data)
@ -836,10 +835,10 @@ void wd2010_device::format(UINT8 data)
// TODO: Seek to desired cylinder
// Assume : SEEK COMPLETE.
m_out_bcr_cb(0); // strobe BCR
m_out_bcr_cb(0); // strobe BCR
m_out_bcr_cb(1);
m_out_bcs_cb(1); // activate BCS (!)
m_out_bcs_cb(1); // activate BCS (!)
if (!m_in_drdy_cb() || m_in_wf_cb())
{
@ -849,10 +848,10 @@ void wd2010_device::format(UINT8 data)
}
// WAIT FOR INDEX
m_out_wg_cb(1); // Have Index, activate WRITE GATE
// Check for WRITE FAULT (WF)
m_out_wg_cb(1); // Have Index, activate WRITE GATE
// Check for WRITE FAULT (WF)
if (m_in_wf_cb())
{
m_error = ERROR_AC; // ABORTED_COMMAND
@ -860,28 +859,28 @@ void wd2010_device::format(UINT8 data)
return;
}
// UINT8 format_sector_count = m_task_file[TASK_FILE_SECTOR_COUNT];
// do
// {
// < WRITE GAP 1 or GAP 3 >
// UINT8 format_sector_count = m_task_file[TASK_FILE_SECTOR_COUNT];
// do
// {
// < WRITE GAP 1 or GAP 3 >
// < Wait for SEEK_COMPLETE=1 (extend GAP if SEEK_COMPLETE = 0) >
// < Assume SEEK COMPLETE >
// < Wait for SEEK_COMPLETE=1 (extend GAP if SEEK_COMPLETE = 0) >
// < Assume SEEK COMPLETE >
// format_sector_count--;
// if (format_sector_count != 0)
// format_sector_count--;
// if (format_sector_count != 0)
{
// The Rainbow 100 driver does ignore multiple sector
// transfers so WRITE FORMAT does not actually write -
m_out_wg_cb(0); // (transition from WG 1 -> 0)
// NOTE: decrementing TASK_FILE_SECTOR_COUNT does * NOT WORK *
// NOTE: decrementing TASK_FILE_SECTOR_COUNT does * NOT WORK *
}
// else
// { // < Write 4Es until INDEX (*** UNIMPLEMENTED ****) >
// }
// } while (format_sector_count > 0);
// else
// { // < Write 4Es until INDEX (*** UNIMPLEMENTED ****) >
// }
// } while (format_sector_count > 0);
// ** DELAY INTRQ UNTIL WRITE IS COMPLETE :
complete_write_when_buffer_ready_high->adjust(attotime::from_usec(1), newstatus | STATUS_DRQ); // 1 USECs
@ -889,7 +888,7 @@ void wd2010_device::format(UINT8 data)
// *************************************
// INTERNAL
// INTERNAL
// *************************************
void wd2010_device::buffer_ready(bool state)
{
@ -906,7 +905,7 @@ void wd2010_device::device_timer(emu_timer &timer, device_timer_id tid, int para
complete_immediate(param);
break;
case COMPLETE_WRITE_SECTOR: // when BUFFER_READY -> HIGH
case COMPLETE_WRITE_SECTOR: // when BUFFER_READY -> HIGH
if (is_buffer_ready)
{
complete_write_when_buffer_ready_high->adjust(attotime::never);
@ -914,25 +913,25 @@ void wd2010_device::device_timer(emu_timer &timer, device_timer_id tid, int para
}
else
{
complete_write_when_buffer_ready_high->reset();
complete_write_when_buffer_ready_high->reset();
complete_write_when_buffer_ready_high->adjust(attotime::from_usec(1), param); // DELAY ANOTHER 1 USEC (!)
}
break;
case DE_ASSERT_WRITE: // waiting for BUFFER_READY -> LOW
if (!(is_buffer_ready))
case DE_ASSERT_WRITE: // waiting for BUFFER_READY -> LOW
if (!(is_buffer_ready))
{
deassert_write_when_buffer_ready_low->adjust(attotime::never);
complete_immediate(param);
}
else
{
deassert_write_when_buffer_ready_low->reset();
deassert_write_when_buffer_ready_low->reset();
deassert_write_when_buffer_ready_low->adjust(attotime::from_usec(1), param); // DELAY ANOTHER 1 USEC (!)
}
break;
case DE_ASSERT_READ: // when BUFFER_READY -> HIGH
case DE_ASSERT_READ: // when BUFFER_READY -> HIGH
if (is_buffer_ready)
{
deassert_read_when_buffer_ready_high->adjust(attotime::never);
@ -945,7 +944,7 @@ void wd2010_device::device_timer(emu_timer &timer, device_timer_id tid, int para
}
else
{
deassert_read_when_buffer_ready_high->reset();
deassert_read_when_buffer_ready_high->reset();
deassert_read_when_buffer_ready_high->adjust(attotime::from_usec(1), param); // DELAY ANOTHER 1 USEC (!)
}
break;
@ -962,7 +961,7 @@ void wd2010_device::complete_immediate(UINT8 status)
status &= ~(STATUS_RDY | STATUS_WF | STATUS_SC); // RDY 0x40 / WF 0x20 / SC 0x10
status |= (m_in_drdy_cb() ? 0x40 : 0) | (m_in_wf_cb() ? 0x20 : 0) | (m_in_sc_cb() ? 0x10 : 0);
if (status & STATUS_DRQ) // if DRQ was set, reset
if (status & STATUS_DRQ) // if DRQ was set, reset
{
status &= ~(STATUS_DRQ);
m_out_bdrq_cb(0);
@ -980,7 +979,7 @@ void wd2010_device::complete_immediate(UINT8 status)
m_out_bcs_cb(0); // de-assert BCS (needed)
m_out_wg_cb(0); // deactivate WG (required by write / format)
m_out_bcr_cb(0); // strobe BCR
m_out_bcr_cb(0); // strobe BCR
m_out_bcr_cb(1);
}
@ -988,4 +987,3 @@ void wd2010_device::complete_cmd(UINT8 status)
{
cmd_timer->adjust(attotime::from_msec(1), status);
}

2
src/emu/sound/fm.c
View File

@ -1,5 +1,5 @@
// license:???
// copyright-holders:Jarek Burczynski,Tatsuyuki Satoh
// copyright-holders:Jarek Burczynski,Tatsuyuki Satoh
#define YM2610B_WARNING
/*

4
src/emu/sound/s14001a.c
View File

@ -599,7 +599,7 @@ void s14001a_device::device_start()
}
m_stream = machine().sound().stream_alloc(*this, 0, 1, clock() ? clock() : machine().sample_rate());
save_item(NAME(m_WordInput));
save_item(NAME(m_LatchedWord));
save_item(NAME(m_SyllableAddress));
@ -619,7 +619,7 @@ void s14001a_device::device_start()
save_item(NAME(m_DACOutput));
save_item(NAME(m_audioout));
save_item(NAME(m_filtervals));
save_item(NAME(m_VSU1000_amp));
save_item(NAME(m_VSU1000_amp));
}
//-------------------------------------------------

2
src/emu/video/315_5124.c
View File

@ -115,7 +115,7 @@ PALETTE_INIT_MEMBER(sega315_5124_device, sega315_5124)
palette.set_pen_color(i, pal2bit(r), pal2bit(g), pal2bit(b));
}
/* sms and sg1000-mark3 uses a different palette for modes 0 to 3 - see http://www.smspower.org/Development/Palette */
/* TMS9918 palette */
/* TMS9918 palette */
palette.set_pen_color(64+ 0, 0, 0, 0); // palette.set_pen_color(64+ 0, 0, 0, 0);
palette.set_pen_color(64+ 1, 0, 0, 0); // palette.set_pen_color(64+ 1, 0, 0, 0);
palette.set_pen_color(64+ 2, 0, 170, 0); // palette.set_pen_color(64+ 2, 33, 200, 66);

10
src/emu/video/clgd542x.c
View File

@ -277,7 +277,7 @@ void cirrus_gd5428_device::start_bitblt()
if(m_blt_mode & 0x80) // colour expand
{
UINT8 pixel = (vga.memory[m_blt_source_current % vga.svga_intf.vram_size] >> (7-(x % 8)) & 0x01) ? vga.gc.enable_set_reset : vga.gc.set_reset; // use GR0/1/10/11 background/foreground regs
copy_pixel(pixel, vga.memory[m_blt_dest_current % vga.svga_intf.vram_size]);
if((x % 8) == 7 && !(m_blt_mode & 0x40)) // don't increment if a pattern (it's only 8 bits)
m_blt_source_current++;
@ -327,7 +327,7 @@ void cirrus_gd5428_device::start_reverse_bitblt()
if(m_blt_mode & 0x80) // colour expand
{
UINT8 pixel = (vga.memory[m_blt_source_current % vga.svga_intf.vram_size] >> (7-(x % 8)) & 0x01) ? vga.gc.enable_set_reset : vga.gc.set_reset; // use GR0/1/10/11 background/foreground regs
copy_pixel(pixel, vga.memory[m_blt_dest_current % vga.svga_intf.vram_size]);
if((x % 8) == 7 && !(m_blt_mode & 0x40)) // don't decrement if a pattern (it's only 8 bits)
m_blt_source_current--;
@ -429,7 +429,7 @@ void cirrus_gd5428_device::blit_byte()
void cirrus_gd5428_device::copy_pixel(UINT8 src, UINT8 dst)
{
UINT8 res = src;
switch(m_blt_rop)
{
case 0x00: // BLACK
@ -458,7 +458,7 @@ void cirrus_gd5428_device::copy_pixel(UINT8 src, UINT8 dst)
if((res & (~m_blt_trans_colour_mask & 0xff)) == ((m_blt_trans_colour & 0xff) & (~m_blt_trans_colour_mask & 0xff)))
return;
}
vga.memory[m_blt_dest_current % vga.svga_intf.vram_size] = res;
}
@ -1269,7 +1269,7 @@ WRITE8_MEMBER(cirrus_gd5428_device::mem_w)
UINT8 cur_mode = pc_vga_choosevideomode();
if(m_blt_system_transfer)
{
{
if(m_blt_mode & 0x80) // colour expand
{
m_blt_system_buffer &= ~(0x000000ff);

4
src/emu/video/clgd542x.h
View File

@ -69,12 +69,12 @@ protected:
UINT16 m_blt_trans_colour;
UINT16 m_blt_trans_colour_mask;
bool m_blt_system_transfer; // blit from system memory
bool m_blt_system_transfer; // blit from system memory
UINT8 m_blt_system_count;
UINT32 m_blt_system_buffer;
UINT16 m_blt_pixel_count;
UINT16 m_blt_scan_count;
UINT8 m_scratchpad1;
UINT8 m_scratchpad2;
UINT8 m_scratchpad3;

2
src/lib/util/md5.c
View File

@ -1,5 +1,5 @@
// license:Public Domain
// copyright-holders:Colin Plumb
// copyright-holders:Colin Plumb
/*
* This code implements the MD5 message-digest algorithm.
* The algorithm is due to Ron Rivest. This code was

2
src/lib/util/md5.h
View File

@ -1,5 +1,5 @@
// license:Public Domain
// copyright-holders:Colin Plumb
// copyright-holders:Colin Plumb
/*
* This is the header file for the MD5 message-digest algorithm.
* The algorithm is due to Ron Rivest. This code was

14
src/mame/arcade.lst
View File

@ -1788,13 +1788,13 @@ horizon // (c) 1985
youjyudn // (c) 1986 (Japan)
vigilant // (c) 1988 (World Rev E)
vigilanta // (c) 1988 (World Rev A)
vigilanta // (c) 1988 (World Rev A)
vigilantb // (c) 1988 (US Rev B)
vigilantc // (c) 1988 (World Rev C)
vigilantc // (c) 1988 (World Rev C)
vigilantd // (c) 1988 (Japan Rev D)
vigilantg // (c) 1988 (US Rev G)
vigilano // (c) 1988 (US)
vigilanbl // bootleg
vigilantg // (c) 1988 (US Rev G)
vigilano // (c) 1988 (US)
vigilanbl // bootleg
kikcubic // (c) 1988 (Japan)
kikcubicb // bootleg
buccanrs // (c) 1989 Duintronic
@ -6348,7 +6348,7 @@ ddribble // GX690 (c) 1986
ddribblep // GX690 (c) 1986
contra // GX633 (c) 1987
contra1 // GX633 (c) 1987
contrae // GX633 (c) 1987
contrae // GX633 (c) 1987
contraj // GX633 (c) 1987 (Japan)
contraj1 // GX633 (c) 1987 (Japan)
gryzor // GX633 (c) 1987
@ -10901,7 +10901,7 @@ wheelfir // (c) 199? TCH
littlerb // (c) 1993 TCH
tattack // (c) 198? Shonan
mosaicf2 // (c) 1999 F2 System
royalpk2 //
royalpk2 //
finalgdr // (c) 2001 Semicom
mrkicker // (c) 2001 Semicom
wivernwg // (c) 2001 Semicom

2
src/mame/audio/cchasm.c
View File

@ -124,7 +124,7 @@ void cchasm_state::sound_start()
m_sound_flags = 0;
m_output[0] = 0;
m_output[1] = 0;
save_item(NAME(m_sound_flags));
save_item(NAME(m_coin_flag));
save_item(NAME(m_channel_active));

2
src/mame/audio/snk6502.c
View File

@ -175,7 +175,7 @@ void snk6502_sound_device::device_start()
save_item(NAME(m_tone_channels[i].sample_cur), i);
save_item(NAME(m_tone_channels[i].form), i);
}
save_item(NAME(m_tone_clock));
save_item(NAME(m_Sound0StopOnRollover));
save_item(NAME(m_LastPort1));

2
src/mame/drivers/berzerk.c
View File

@ -1325,7 +1325,7 @@ DRIVER_INIT_MEMBER(berzerk_state,moonwarp)
address_space &io = m_maincpu->space(AS_IO);
io.install_read_handler (0x48, 0x48, read8_delegate(FUNC(berzerk_state::moonwarp_p1_r), this));
io.install_read_handler (0x4a, 0x4a, read8_delegate(FUNC(berzerk_state::moonwarp_p2_r), this));
save_item(NAME(m_p1_counter_74ls161));
save_item(NAME(m_p1_direction));
save_item(NAME(m_p2_counter_74ls161));

4
src/mame/drivers/cball.c
View File

@ -24,7 +24,7 @@ public:
m_gfxdecode(*this, "gfxdecode"),
m_screen(*this, "screen"),
m_palette(*this, "palette"),
m_video_ram(*this, "video_ram") { }
m_video_ram(*this, "video_ram") { }
/* devices */
required_device<cpu_device> m_maincpu;
@ -37,7 +37,7 @@ public:
/* video-related */
tilemap_t* m_bg_tilemap;
emu_timer *m_int_timer;
TIMER_CALLBACK_MEMBER(interrupt_callback);

2
src/mame/drivers/chihiro.c
View File

@ -1059,7 +1059,7 @@ static const struct {
UINT8 write_byte;
} modify[16];
} hacks[2] = { { "chihiro", { { 0x6a79f, 0x01 }, { 0x6a7a0, 0x00 }, { 0x6b575, 0x00 }, { 0x6b576, 0x00 }, { 0x6b5af, 0x75 }, { 0x6b78a, 0x75 }, { 0x6b7ca, 0x00 }, { 0x6b7b8, 0x00 }, { 0x8f5b2, 0x75 }, { 0x79a9e, 0x74 }, { 0x79b80, 0x74 }, { 0x79b97, 0x74 }, { 0, 0 } } },
{ "outr2", { { 0x12e4cf, 0x01 }, { 0x12e4d0, 0x00 }, { 0x4793e, 0x01 }, { 0x4793f, 0x00 }, { 0x47aa3, 0x01 }, { 0x47aa4, 0x00 }, { 0x14f2b6, 0x84 }, { 0x14f2d1, 0x75 }, { 0x8732f, 0x7d }, { 0x87384, 0x7d }, { 0x87388, 0xeb }, { 0, 0 } } } };
{ "outr2", { { 0x12e4cf, 0x01 }, { 0x12e4d0, 0x00 }, { 0x4793e, 0x01 }, { 0x4793f, 0x00 }, { 0x47aa3, 0x01 }, { 0x47aa4, 0x00 }, { 0x14f2b6, 0x84 }, { 0x14f2d1, 0x75 }, { 0x8732f, 0x7d }, { 0x87384, 0x7d }, { 0x87388, 0xeb }, { 0, 0 } } } };
READ32_MEMBER(chihiro_state::usbctrl_r)
{

2
src/mame/drivers/ddragon3.c
View File

@ -4,7 +4,7 @@
Double Dragon 3 Technos Japan Corp 1990
The Combatribes Technos Japan Corp 1990
WWF WrestleFest Technos Japan Corp 1991
WWF WrestleFest Technos Japan Corp 1991
Notes:

2
src/mame/drivers/ddribble.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Manuel Abadia
// copyright-holders:Manuel Abadia
/***************************************************************************
Double Dribble (GX690) (c) Konami 1986

2
src/mame/drivers/dgpix.c
View File

@ -377,7 +377,7 @@ INPUT_PORTS_END
void dgpix_state::video_start()
{
m_vram = auto_alloc_array(machine(), UINT32, 0x40000*2/4);
save_pointer(NAME(m_vram), 0x40000*2/4);
}

6
src/mame/drivers/f-32.c
View File

@ -255,9 +255,9 @@ static MACHINE_CONFIG_START( royalpk2, mosaicf2_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
// MCFG_YM2151_ADD("ymsnd", XTAL_14_31818MHz/4) /* 3.579545 MHz */
// MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
// MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
// MCFG_YM2151_ADD("ymsnd", XTAL_14_31818MHz/4) /* 3.579545 MHz */
// MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
// MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
MCFG_OKIM6295_ADD("oki", XTAL_14_31818MHz/8, OKIM6295_PIN7_HIGH) /* 1.7897725 MHz */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)

422
src/mame/drivers/gambl186.c
View File

@ -42,7 +42,7 @@ In order to get the game to run, follow these steps:
TODO:
- fix the poker game (casino 10). EEPROM behaviour still buggy.
- sound;
- proper 3x D71055C emulation.
- proper 3x D71055C emulation.
***********************************************************************************/
@ -64,14 +64,14 @@ public:
m_upd7759(*this, "7759") { }
required_device<cpu_device> m_maincpu;
optional_device<upd7759_device> m_upd7759;
int m_comms_state;
optional_device<upd7759_device> m_upd7759;
int m_comms_state;
int m_comms_ind;
UINT8 m_comms_data[1002];
int m_comms_cmd;
int m_comms_expect;
int m_comms_blocks;
bool m_comms_ack;
int m_comms_cmd;
int m_comms_expect;
int m_comms_blocks;
bool m_comms_ack;
virtual void machine_start();
DECLARE_READ16_MEMBER(comms_r);
@ -97,233 +97,233 @@ static const UINT8 password[] = {5, 2, 0, 3, 0, 0, 2, 4, 5, 6, 0x16};
READ16_MEMBER(gambl186_state::comms_r)
{
UINT16 retval = 0;
UINT16 retval = 0;
if ((offset == 0) && ACCESSING_BITS_0_7) //port 680 == data
{
if (m_comms_state == 0x16) //read mode, just in case
{
if (!m_comms_ind && (m_comms_cmd == 0xff))
{
m_comms_cmd = m_comms_data[1];
if ((offset == 0) && ACCESSING_BITS_0_7) //port 680 == data
{
if (m_comms_state == 0x16) //read mode, just in case
{
if (!m_comms_ind && (m_comms_cmd == 0xff))
{
m_comms_cmd = m_comms_data[1];
switch (m_comms_cmd)
{
case 0:
{
m_comms_expect = 4;
break;
}
switch (m_comms_cmd)
{
case 0:
{
m_comms_expect = 4;
break;
}
case 1:
{
m_comms_expect = 12;
m_comms_blocks = 2;
break;
}
case 1:
{
m_comms_expect = 12;
m_comms_blocks = 2;
break;
}
case 2:
{
m_comms_expect = 408;
m_comms_blocks = 4;
break;
}
case 2:
{
m_comms_expect = 408;
m_comms_blocks = 4;
break;
}
case 3:
{
m_comms_expect = 7;
m_comms_blocks = 3;
break;
}
case 3:
{
m_comms_expect = 7;
m_comms_blocks = 3;
break;
}
case 4:
{
m_comms_expect = 2;
m_comms_blocks = 2;
break;
}
case 4:
{
m_comms_expect = 2;
m_comms_blocks = 2;
break;
}
case 5:
{
m_comms_expect = 13;
m_comms_blocks = 4;
break;
}
case 5:
{
m_comms_expect = 13;
m_comms_blocks = 4;
break;
}
case 6:
{
m_comms_expect = 1003;
break;
}
case 6:
{
m_comms_expect = 1003;
break;
}
default: //unknown
{
m_comms_expect = 1;
}
}
}
default: //unknown
{
m_comms_expect = 1;
}
}
}
if (m_comms_ind < sizeof(m_comms_data))
{
if (m_comms_expect && !--m_comms_expect)
{
m_comms_ack = true;
if (m_comms_ind < sizeof(m_comms_data))
{
if (m_comms_expect && !--m_comms_expect)
{
m_comms_ack = true;
if (m_comms_ind)
{
int i, sum;
if (m_comms_ind)
{
int i, sum;
for (i = 1, sum = 0; i < m_comms_ind; sum += m_comms_data[i++]);
m_comms_data[m_comms_ind] = (unsigned char) sum;
for (i = 1, sum = 0; i < m_comms_ind; sum += m_comms_data[i++]);
m_comms_data[m_comms_ind] = (unsigned char) sum;
switch (m_comms_cmd)
{
case 1:
{
if (m_comms_blocks == 2)
{
m_comms_expect = 5;
}
else
{
m_comms_data[m_comms_ind] += 5; //compensate for ack
}
switch (m_comms_cmd)
{
case 1:
{
if (m_comms_blocks == 2)
{
m_comms_expect = 5;
}
else
{
m_comms_data[m_comms_ind] += 5; //compensate for ack
}
break;
}
break;
}
case 2:
{
if (m_comms_blocks == 4)
{
m_comms_expect = 5;
}
else
{
m_comms_data[m_comms_ind] += 5; //compensate for ack
m_comms_expect = 3;
}
case 2:
{
if (m_comms_blocks == 4)
{
m_comms_expect = 5;
}
else
{
m_comms_data[m_comms_ind] += 5; //compensate for ack
m_comms_expect = 3;
}
break;
}
break;
}
case 3:
{
if (m_comms_blocks == 3)
{
m_comms_expect = 3;
}
else
{
m_comms_data[m_comms_ind] += 5; //compensate for ack
m_comms_expect = 5;
}
case 3:
{
if (m_comms_blocks == 3)
{
m_comms_expect = 3;
}
else
{
m_comms_data[m_comms_ind] += 5; //compensate for ack
m_comms_expect = 5;
}
break;
}
break;
}
case 5:
{
m_comms_expect = 3;
case 5:
{
m_comms_expect = 3;
if (m_comms_blocks < 4)
{
m_comms_data[m_comms_ind] += 5; //compensate for ack
if (m_comms_blocks < 4)
{
m_comms_data[m_comms_ind] += 5; //compensate for ack
if (m_comms_blocks == 2)
{
m_comms_expect = 2;
}
}
if (m_comms_blocks == 2)
{
m_comms_expect = 2;
}
}
break;
}
break;
}
default:
{
}
}
}
else if (m_comms_cmd == 4)
{
if (!memcmp(m_comms_data, password, sizeof(password)))
{
m_comms_data[1] = 0x55;
m_comms_data[2] = 0x55;
}
default:
{
}
}
}
else if (m_comms_cmd == 4)
{
if (!memcmp(m_comms_data, password, sizeof(password)))
{
m_comms_data[1] = 0x55;
m_comms_data[2] = 0x55;
}
m_comms_expect = 2;
m_comms_ack = false;
}
m_comms_expect = 2;
m_comms_ack = false;
}
if (!m_comms_blocks || !--m_comms_blocks)
{
m_comms_cmd = 0xff;
}
}
if (!m_comms_blocks || !--m_comms_blocks)
{
m_comms_cmd = 0xff;
}
}
retval = m_comms_data[m_comms_ind++];
}
}
}
else if (offset == 1) //port 681 == status
{
if (m_comms_state == 0x16) //read mode
{
retval = 2; //read ready
}
else if (m_comms_state == 0x31) //write mode
{
retval = 4; //write ready
}
}
retval = m_comms_data[m_comms_ind++];
}
}
}
else if (offset == 1) //port 681 == status
{
if (m_comms_state == 0x16) //read mode
{
retval = 2; //read ready
}
else if (m_comms_state == 0x31) //write mode
{
retval = 4; //write ready
}
}
return retval;
return retval;
}
WRITE16_MEMBER(gambl186_state::comms_w)
{
if (offset == 0)
{
if ((m_comms_state == 0x31) && (m_comms_ind < 1000))
{
if (!m_comms_ack || (data == 0x15)) //validation failure
{
if (m_comms_cmd == 6) //1000 bytes transfer
{
data = ~data;
}
else if (m_comms_ack)
{
m_comms_cmd = 0xfe;
m_comms_expect = 2;
data = 5;
}
if (offset == 0)
{
if ((m_comms_state == 0x31) && (m_comms_ind < 1000))
{
if (!m_comms_ack || (data == 0x15)) //validation failure
{
if (m_comms_cmd == 6) //1000 bytes transfer
{
data = ~data;
}
else if (m_comms_ack)
{
m_comms_cmd = 0xfe;
m_comms_expect = 2;
data = 5;
}
m_comms_data[++m_comms_ind] = (UINT8) data;
}
m_comms_data[++m_comms_ind] = (UINT8) data;
}
m_comms_ack = false;
}
}
else if (offset == 1)
{
if (m_comms_state != data) //detect transition
{
m_comms_ind = 0;
m_comms_ack = false;
}
}
else if (offset == 1)
{
if (m_comms_state != data) //detect transition
{
m_comms_ind = 0;
if (data == 0x4e) //reset
{
m_comms_data[0] = 5; //operation complete
m_comms_cmd = 0xff; //none
m_comms_expect = 0;
m_comms_blocks = 0;
m_comms_ack = false;
}
}
if (data == 0x4e) //reset
{
m_comms_data[0] = 5; //operation complete
m_comms_cmd = 0xff; //none
m_comms_expect = 0;
m_comms_blocks = 0;
m_comms_ack = false;
}
}
m_comms_state = data;
}
m_comms_state = data;
}
}
WRITE16_MEMBER( gambl186_state::data_bank_w)
@ -338,9 +338,9 @@ WRITE16_MEMBER( gambl186_state::data_bank_w)
port 400h writes the sample index/input
port 504h writes the commands...
504h xxxx ---- ---- ----
Sound event:
504h: 2000
504h: e000
@ -352,16 +352,16 @@ WRITE16_MEMBER( gambl186_state::data_bank_w)
WRITE16_MEMBER(gambl186_state::upd_w)
{
//// FIXME
// m_upd7759->reset_w(0);
// m_upd7759->reset_w(1);
// m_upd7759->reset_w(0);
// m_upd7759->reset_w(1);
// if (mem_mask&0x00ff) m_upd7759->port_w(space, 0, data & 0xff);
// if (mem_mask&0xff00) m_upd7759->port_w(space, 0, (data >> 8) & 0xff);
// if (mem_mask&0x00ff) m_upd7759->port_w(space, 0, data & 0xff);
// if (mem_mask&0xff00) m_upd7759->port_w(space, 0, (data >> 8) & 0xff);
data = (data >> 8);
popmessage("sample index: %02x", data);
popmessage("sample index: %02x", data);
// m_upd7759->start_w(0);
// m_upd7759->start_w(1);
// m_upd7759->start_w(0);
// m_upd7759->start_w(1);
}
@ -378,7 +378,7 @@ static ADDRESS_MAP_START( gambl186_io, AS_IO, 16, gambl186_state )
AM_RANGE(0x0580, 0x0581) AM_READ_PORT("DSW1")
AM_RANGE(0x0582, 0x0583) AM_READ_PORT("JOY")
AM_RANGE(0x0584, 0x0585) AM_READ_PORT("DSW0") AM_WRITENOP // Watchdog: bit 8
// AM_RANGE(0x0600, 0x0603) AM_WRITENOP // lamps
// AM_RANGE(0x0600, 0x0603) AM_WRITENOP // lamps
AM_RANGE(0x0680, 0x0683) AM_READWRITE(comms_r, comms_w)
AM_RANGE(0x0700, 0x0701) AM_WRITE(data_bank_w)
ADDRESS_MAP_END
@ -493,7 +493,7 @@ ROM_START( gambl186 )
ROM_LOAD16_BYTE( "se403p.u9", 0x00000, 0x20000, CRC(1021cc20) SHA1(d9bb67676b05458ff813d608431ff06946ab7721) )
ROM_LOAD16_BYTE( "so403p.u10", 0x00001, 0x20000, CRC(af9746c9) SHA1(3f1ab8110cc5eadec661181779799693ad695e21) )
ROM_REGION( 0x20000, "upd", 0 ) // upd7759 sound samples
ROM_REGION( 0x20000, "upd", 0 ) // upd7759 sound samples
ROM_LOAD( "347.u302", 0x00000, 0x20000, CRC(7ce8f490) SHA1(2f856e31d189e9d46ba6b322133d99133e0b52ac) )
ROM_END
@ -506,7 +506,7 @@ ROM_START( gambl186a )
ROM_LOAD16_BYTE( "se403p.u9", 0x00000, 0x20000, CRC(1021cc20) SHA1(d9bb67676b05458ff813d608431ff06946ab7721) )
ROM_LOAD16_BYTE( "so403p.u10", 0x00001, 0x20000, CRC(af9746c9) SHA1(3f1ab8110cc5eadec661181779799693ad695e21) )
ROM_REGION( 0x20000, "upd", 0 ) // upd7759 sound samples
ROM_REGION( 0x20000, "upd", 0 ) // upd7759 sound samples
ROM_LOAD( "347.u302", 0x00000, 0x20000, CRC(7ce8f490) SHA1(2f856e31d189e9d46ba6b322133d99133e0b52ac) )
ROM_END

2
src/mame/drivers/goldstar.c
View File

@ -181,7 +181,7 @@
you can see what seems the attract working (still with wrong graphics).
Seems to be sooo slow.... (interrupts?)
***************************************************************************/

8
src/mame/drivers/hvyunit.c
View File

@ -135,16 +135,16 @@ public:
DECLARE_WRITE8_MEMBER(mermaid_p2_w);
DECLARE_READ8_MEMBER(mermaid_p3_r);
DECLARE_WRITE8_MEMBER(mermaid_p3_w);
TILE_GET_INFO_MEMBER(get_bg_tile_info);
virtual void machine_start();
virtual void machine_reset();
virtual void video_start();
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void screen_eof(screen_device &screen, bool state);
TIMER_DEVICE_CALLBACK_MEMBER(scanline);
};

14
src/mame/drivers/iteagle.c
View File

@ -142,13 +142,13 @@ void iteagle_state::machine_reset()
{
}
#define PCI_ID_IDE ":pci:06.0"
// Primary IDE Control ":pci:06.1"
// Seconday IDE Control ":pci:06.2"
#define PCI_ID_SOUND ":pci:07.0"
#define PCI_ID_FPGA ":pci:08.0"
#define PCI_ID_VIDEO ":pci:09.0"
#define PCI_ID_EEPROM ":pci:0a.0"
#define PCI_ID_IDE ":pci:06.0"
// Primary IDE Control ":pci:06.1"
// Seconday IDE Control ":pci:06.2"
#define PCI_ID_SOUND ":pci:07.0"
#define PCI_ID_FPGA ":pci:08.0"
#define PCI_ID_VIDEO ":pci:09.0"
#define PCI_ID_EEPROM ":pci:0a.0"
static MACHINE_CONFIG_START( iteagle, iteagle_state )

2
src/mame/drivers/looping.c
View File

@ -887,7 +887,7 @@ DRIVER_INIT_MEMBER(looping_state,looping)
int length = memregion("maincpu")->bytes();
UINT8 *rom = memregion("maincpu")->base();
int i;
m_cop_port_l = 0;
/* bitswap the TMS9995 ROMs */

30
src/mame/drivers/magictg.c
View File

@ -63,24 +63,24 @@ Xilinx XC95108 stickered ACCLAIM COIN-OP
TI TVP3409
V53C16258HK40 x24
V53C511816500K60 x4
U38 and U97 on main board 3DFX
500-0004-02
BF2733.1 TMU
9748 20001
TAIWAN 1001
U4 on daughter board Zoran ZR36050PQC
-29.5
85 GF7B9726E
U38 and U97 on main board 3DFX
500-0004-02
BF2733.1 TMU
9748 20001
TAIWAN 1001
U11 on main board Removed heatsink, Couldn't see anything...
U4 on daughter board Zoran ZR36050PQC
-29.5
85 GF7B9726E
U71 on main board Galileo
GT-64010A-B-0
BB8018.1
TAIWAN
U11 on main board Removed heatsink, Couldn't see anything...
U71 on main board Galileo
GT-64010A-B-0
BB8018.1
TAIWAN
14.31818 Oscillator by the TI part
50.0000 Oscillator by EPROMS
33.0000 Oscillator by the V53C511816500K60

4
src/mame/drivers/miniboy7.c
View File

@ -309,10 +309,10 @@ WRITE8_MEMBER(miniboy7_state::ay_pa_w)
// output_set_lamp_value(3, (data >> 3) & 1); // [-x---]
// output_set_lamp_value(4, (data >> 4) & 1); // [x----]
coin_counter_w(machine(), 0, data & 0x40); // counter
coin_counter_w(machine(), 0, data & 0x40); // counter
// popmessage("Out Lamps: %02x", data);
// logerror("Out Lamps: %02x\n", data);
// logerror("Out Lamps: %02x\n", data);
}

164
src/mame/drivers/nl_breakout.c
View File

@ -89,17 +89,17 @@ static Mono9602Desc a8_desc(K_OHM(27.0), U_FARAD(1.0), K_OHM(27.0), U_FARAD(1.0)
CIRCUIT_LAYOUT( breakout )
#if (SLOW_BUT_ACCURATE)
SOLVER(Solver, 48000)
PARAM(Solver.ACCURACY, 1e-8) // less accuracy and diode will not work
PARAM(Solver.GS_THRESHOLD, 6)
SOLVER(Solver, 48000)
PARAM(Solver.ACCURACY, 1e-8) // less accuracy and diode will not work
PARAM(Solver.GS_THRESHOLD, 6)
#else
SOLVER(Solver, 48000)
PARAM(Solver.ACCURACY, 1e-6)
PARAM(Solver.GS_THRESHOLD, 6)
// FIXME: PARALLEL Doesn't work in breakout.
PARAM(Solver.PARALLEL, 0)
SOLVER(Solver, 48000)
PARAM(Solver.ACCURACY, 1e-6)
PARAM(Solver.GS_THRESHOLD, 6)
// FIXME: PARALLEL Doesn't work in breakout.
PARAM(Solver.PARALLEL, 0)
#endif
PARAM(NETLIST.USE_DEACTIVATE, 1)
PARAM(NETLIST.USE_DEACTIVATE, 1)
// DIPSWITCH - Free game
SWITCH(S1_1)
@ -129,7 +129,7 @@ CIRCUIT_LAYOUT( breakout )
// Clock circuit
//----------------------------------------------------------------
#if 0 || (SLOW_BUT_ACCURATE)
MAINCLOCK(Y1, 14318000.0)
MAINCLOCK(Y1, 14318000.0)
CHIP("F1", 9316)
NET_C(Y1.Q, F1.2)
@ -149,24 +149,24 @@ CIRCUIT_LAYOUT( breakout )
#define DICECLOCK "H1", 11
#else
/*
* 9316 2 3 4 5 6 7 8 9 10 11 12 13 14 15 2 3 4 5 6
* A 0 1 0 1 0 1 0 1 0 1 0 1 0 1
* B 1 1 0 0 1 1 0 0 1 1 0 0 1 1
* CKBH 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 1
* 9316 2 3 4 5 6 7 8 9 10 11 12 13 14 15 2 3 4 5 6
* A 0 1 0 1 0 1 0 1 0 1 0 1 0 1
* B 1 1 0 0 1 1 0 0 1 1 0 0 1 1
* CKBH 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 1
* ^--- Pattern Start
* CLOCK 1 0 1 1 1 0 1 1 1 0 1 1 1 0 1 0 1 1 1
* CLOCK 1 0 1 1 1 0 1 1 1 0 1 1 1 0 1 0 1 1 1
* ^--- Pattern Start
* <--------> 3 Clocks Offset
*/
EXTCLOCK(Y1, 14318000.0, "4,4,4,4,4,8")
EXTCLOCK(Y2, 14318000.0, "2,6,2,6,2,2,2,6")
PARAM(Y2.OFFSET, 3.0 / 14318000.0 + 20.0e-9 )
EXTCLOCK(Y1, 14318000.0, "4,4,4,4,4,8")
EXTCLOCK(Y2, 14318000.0, "2,6,2,6,2,2,2,6")
PARAM(Y2.OFFSET, 3.0 / 14318000.0 + 20.0e-9 )
#define CKBH "Y1", Q
#define DICECLOCK "Y2", Q
NET_C(ttlhigh, H1.13)
NET_C(ttlhigh, H1.12)
NET_C(ttlhigh, E1.5)
NET_C(ttlhigh, H1.13)
NET_C(ttlhigh, H1.12)
NET_C(ttlhigh, E1.5)
#endif
//----------------------------------------------------------------
@ -175,38 +175,38 @@ CIRCUIT_LAYOUT( breakout )
TTL_INPUT(antenna, 0)
DIODE(CR3, "1N914")
DIODE(CR4, "1N914")
DIODE(CR5, "1N914")
DIODE(CR7, "1N914")
DIODE(CR3, "1N914")
DIODE(CR4, "1N914")
DIODE(CR5, "1N914")
DIODE(CR7, "1N914")
QBJT_EB(Q1, "2N3644")
QBJT_EB(Q2, "2N3643")
QBJT_EB(Q3, "2N3643")
CAP(C19, CAP_U(0.1))
CAP(C16, CAP_U(0.1))
QBJT_EB(Q1, "2N3644")
QBJT_EB(Q2, "2N3643")
QBJT_EB(Q3, "2N3643")
CAP(C19, CAP_U(0.1))
CAP(C16, CAP_U(0.1))
RES(R25, 100)
RES(R26, 330)
RES(R27, 100)
RES(R31, 220)
RES(R32, 100)
RES(R25, 100)
RES(R26, 330)
RES(R27, 100)
RES(R31, 220)
RES(R32, 100)
NET_C(GND, CR5.A, Q2.E, C16.2, R25.2, Q3.E)
NET_C(CR5.K, Q2.B, antenna)
NET_C(Q2.C, C16.1, R25.1, Q3.B, R27.2)
NET_C(R27.1, CR7.A, R31.2) //CR7.K == IN
NET_C(R31.1, Q1.C)
NET_C(Q3.C, R26.2, CR3.A, CR4.A, E9.5) // E9.6 = Q Q3.C=QQ CR3.K = COIN*1 CR4.K = COIN*2
NET_C(R26.1, Q1.B, C19.2, R32.2)
NET_C(Q1.E, C19.1, R32.1, V5)
NET_C(GND, CR5.A, Q2.E, C16.2, R25.2, Q3.E)
NET_C(CR5.K, Q2.B, antenna)
NET_C(Q2.C, C16.1, R25.1, Q3.B, R27.2)
NET_C(R27.1, CR7.A, R31.2) //CR7.K == IN
NET_C(R31.1, Q1.C)
NET_C(Q3.C, R26.2, CR3.A, CR4.A, E9.5) // E9.6 = Q Q3.C=QQ CR3.K = COIN*1 CR4.K = COIN*2
NET_C(R26.1, Q1.B, C19.2, R32.2)
NET_C(Q1.E, C19.1, R32.1, V5)
#define LAT_Q "E9", 6
#define Q_n "Q3", C
#define COIN1_n "F8", 5
#define COIN2_n "H9", 5
CONNECTION("CR7", K, "D8", 11) //set
CONNECTION("CR7", K, "D8", 11) //set
CONNECTION("CR3", K, COIN1_n) //reset
CONNECTION("CR4", K, COIN2_n) //reset
@ -440,31 +440,31 @@ CIRCUIT_LAYOUT( breakout )
#define EGL "C37" , 2
#define EGL_n "C5", 2
#define RAM_PLAYER1 "E7", 4
#define A1 "H6", 14
#define B1 "H6", 13
#define C1 "H6", 12
#define D1 "H6", 11
#define E1 "J6", 14
#define F1 "J6", 13
#define G1 "J6", 12
#define H01 "J6", 11
#define I1 "K6", 14
#define J1 "K6", 13
#define K1 "K6", 12
#define L1 "K6", 11
#define A2 "N6", 14
#define B2 "N6", 13
#define C2 "N6", 12
#define D2 "N6", 11
#define E2s "M6", 14
#define F2 "M6", 13
#define G2 "M6", 12
#define H02 "M6", 11 //TODO: better name for these signals
#define I2 "L6", 14
#define J2 "L6", 13
#define K2 "L6", 12
#define L2 "L6", 11
#define RAM_PLAYER1 "E7", 4
#define A1 "H6", 14
#define B1 "H6", 13
#define C1 "H6", 12
#define D1 "H6", 11
#define E1 "J6", 14
#define F1 "J6", 13
#define G1 "J6", 12
#define H01 "J6", 11
#define I1 "K6", 14
#define J1 "K6", 13
#define K1 "K6", 12
#define L1 "K6", 11
#define A2 "N6", 14
#define B2 "N6", 13
#define C2 "N6", 12
#define D2 "N6", 11
#define E2s "M6", 14
#define F2 "M6", 13
#define G2 "M6", 12
#define H02 "M6", 11 //TODO: better name for these signals
#define I2 "L6", 14
#define J2 "L6", 13
#define K2 "L6", 12
#define L2 "L6", 11
#define CX0 "C6", 11
#define CX1 "C6", 6
@ -772,18 +772,18 @@ CIRCUIT_LAYOUT( breakout )
CONNECTION(BALL_C, "C4", 10)
CONNECTION("A4", 11, "C4", 9)
CONNECTION(A2, "N5", 1)
CONNECTION(E2s, "N5", 2)
CONNECTION(I2, "N5", 3)
CONNECTION("C5", 6, "N5", 4)
CONNECTION(A1, "N5", 5)
CONNECTION(E1, "N5", 6)
CONNECTION(I1, "N5", 7)
CONNECTION(PLAYER_2_n, "N5", 9)
CONNECTION(H32_n, "N5", 10)
CONNECTION(V16, "N5", 11)
CONNECTION(V64, "N5", 12)
CONNECTION(V128, "N5", 13)
CONNECTION(A2, "N5", 1)
CONNECTION(E2s, "N5", 2)
CONNECTION(I2, "N5", 3)
CONNECTION("C5", 6, "N5", 4)
CONNECTION(A1, "N5", 5)
CONNECTION(E1, "N5", 6)
CONNECTION(I1, "N5", 7)
CONNECTION(PLAYER_2_n, "N5", 9)
CONNECTION(H32_n, "N5", 10)
CONNECTION(V16, "N5", 11)
CONNECTION(V64, "N5", 12)
CONNECTION(V128, "N5", 13)
CONNECTION(B2, "M5", 1)
CONNECTION(F2, "M5", 2)
@ -1561,7 +1561,7 @@ CIRCUIT_LAYOUT( breakout )
CONNECTION(PSYNC, "B9", 1)
CONNECTION(VSYNC_n, "B9", 2)
// VIDEO SUMMING
// VIDEO SUMMING
RES(R41, RES_K(3.9))
RES(R42, RES_K(3.9))
RES(R43, RES_K(3.9))

4
src/mame/drivers/nl_pong.c
View File

@ -9,14 +9,14 @@
#include "netlist/devices/net_lib.h"
#define FAST_CLOCK (1)
#define FAST_CLOCK (1)
NETLIST_START(pong_fast)
SOLVER(Solver, 48000)
PARAM(Solver.PARALLEL, 0) // Don't do parallel solvers
PARAM(Solver.ACCURACY, 1e-4) // works and is sufficient
PARAM(Solver.LTE, 1e-4) // Default is not enough for paddle control if using LTE
PARAM(NETLIST.USE_DEACTIVATE, 1)
PARAM(NETLIST.USE_DEACTIVATE, 1)
ANALOG_INPUT(V5, 5)

204
src/mame/drivers/nwk-tr.c
View File

@ -2,32 +2,32 @@
// copyright-holders:Ville Linde
/* Konami NWK-TR System
Driver by Ville Linde
Driver by Ville Linde
Hardware overview:
Hardware overview:
GN676 CPU Board:
----------------
IBM PowerPC 403GA at 32MHz (main CPU)
Motorola MC68EC000 at 16MHz (sound CPU)
Konami K056800 (MIRAC), sound system interface
Ricoh RF5c400 sound chip
National Semiconductor ADC12138
GN676 CPU Board:
----------------
IBM PowerPC 403GA at 32MHz (main CPU)
Motorola MC68EC000 at 16MHz (sound CPU)
Konami K056800 (MIRAC), sound system interface
Ricoh RF5c400 sound chip
National Semiconductor ADC12138
GN676 GFX Board:
----------------
Analog Devices ADSP-21062 SHARC DSP at 36MHz
Konami K001604 (2D tilemaps + 2x ROZ)
Konami 0000033906 (PCI bridge)
3DFX 500-0003-03 (Voodoo) FBI with 2MB RAM
2x 3DFX 500-0004-02 (Voodoo) TMU with 2MB RAM
GN676 GFX Board:
----------------
Analog Devices ADSP-21062 SHARC DSP at 36MHz
Konami K001604 (2D tilemaps + 2x ROZ)
Konami 0000033906 (PCI bridge)
3DFX 500-0003-03 (Voodoo) FBI with 2MB RAM
2x 3DFX 500-0004-02 (Voodoo) TMU with 2MB RAM
GN676 LAN Board:
----------------
Xilinx XC5210 FPGA
Xilinx XC5204 FPGA
GN676 LAN Board:
----------------
Xilinx XC5210 FPGA
Xilinx XC5204 FPGA
Konami 'NWK-TR' Hardware
@ -90,56 +90,56 @@ Konami 1997
|M48T58Y-70PC1 CN4 DSW(8) CN6 64.000MHz|
|--------------------------------------------------------------|
Notes:
DRM1M4SJ8 - Fujitsu 81C4256 256kx4 DRAM (SOJ24)
SRAM256K - Cypress CY7C199 32kx8 SRAM (SOJ28)
DRAM16X16 - Fujitsu 8118160A-60 16megx16 DRAM (SOJ42)
M48T58Y-70PC1 - ST Timekeeper RAM
RF5C400 - Ricoh RF5C400 PCM 32Ch, 44.1 kHz Stereo, 3D Effect Spatializer, clock input 16.9344MHz
056800 - Konami Custom (QFP80)
058232 - Konami Custom Ceramic Package (SIL14)
ADC12138 - National Semiconductor ADC12138 A/D Converter, 12-bit + Serial I/O With MUX (SOP28)
MACH111 - AMD MACH111 CPLD (Stamped 'N676A1', PLCC44)
68EC000 - Motorola MC68EC000, running at 16.0MHz (64/4)
PPC403GA - IBM PowerPC 403GA CPU, clock input 32.0MHz (64/2) (QFP160)
SM5877AM - Nippon Precision Circuits 3rd Order 2-Channel D/A Converter (SOIC24)
4AK16 - Hitachi 4AK16 Silicon N-Channel Power MOS FET Array (SIL10)
NE5532AN - Philips, Dual Low-Noise High-Speed Audio OP Amp (DIP8)
SP485CS - Sipex SP485CS Low Power Half Duplex RS485 Transceiver (DIP8)
AN7395S - Panasonic AM7395S Spatializer Audio Processor IC for 3D surround (SOIC20)
PAL1 - AMD PALCE16V8 (stamped 'N676A4', DIP20)
PAL2 - AMD PALCE16V8 (stamped 'N676A2', DIP20)
PAL3 - AMD PALCE16V8 (stamped 'N676A3', DIP20)
PAL4 - AMD PALCE16V8 (stamped 'N676A5', DIP20)
JP1 - 25M O O-O 32M
JP2 - 25M O O-O 32M
JP3 - RW O O O RO
JP4 - PROG 32M O O-O 16M
JP5 - DATA 32M O-O O 16M
JP6 - BOOT 16 O-O O 32
JP7 - SRC DOUT2 O O-O 0
JP8 - 64M&32M O-O O 16M
JP9 - 64M O O-O 32M&16M
JP10 - 64M&32M O-O O 16M
JP11 - 64M O O-O 32M&16M
JP12 - through O-O O SP
JP13 - through O-O O SP
JP14 - WDT O O
JP15 - MONO O-O O SURR
JP16 - HIGH O O O MID (N/C LOW)
CN1 to CN3 - D-SUB Connectors
CN4 - Multi-pin Connector for Network PCB
CN5 - DIN96 connector (pads only, not used)
CN6 - DIN96 joining connector to lower PCB
CN7 - Multi-pin connector (pads only, not used)
CN9 to CN13 - Power Connectors
CN14 to CN17 - RCA Stereo Audio OUT
CN18 - RCA Mono Audio OUT
CN19 - USB Connector
DRM1M4SJ8 - Fujitsu 81C4256 256kx4 DRAM (SOJ24)
SRAM256K - Cypress CY7C199 32kx8 SRAM (SOJ28)
DRAM16X16 - Fujitsu 8118160A-60 16megx16 DRAM (SOJ42)
M48T58Y-70PC1 - ST Timekeeper RAM
RF5C400 - Ricoh RF5C400 PCM 32Ch, 44.1 kHz Stereo, 3D Effect Spatializer, clock input 16.9344MHz
056800 - Konami Custom (QFP80)
058232 - Konami Custom Ceramic Package (SIL14)
ADC12138 - National Semiconductor ADC12138 A/D Converter, 12-bit + Serial I/O With MUX (SOP28)
MACH111 - AMD MACH111 CPLD (Stamped 'N676A1', PLCC44)
68EC000 - Motorola MC68EC000, running at 16.0MHz (64/4)
PPC403GA - IBM PowerPC 403GA CPU, clock input 32.0MHz (64/2) (QFP160)
SM5877AM - Nippon Precision Circuits 3rd Order 2-Channel D/A Converter (SOIC24)
4AK16 - Hitachi 4AK16 Silicon N-Channel Power MOS FET Array (SIL10)
NE5532AN - Philips, Dual Low-Noise High-Speed Audio OP Amp (DIP8)
SP485CS - Sipex SP485CS Low Power Half Duplex RS485 Transceiver (DIP8)
AN7395S - Panasonic AM7395S Spatializer Audio Processor IC for 3D surround (SOIC20)
PAL1 - AMD PALCE16V8 (stamped 'N676A4', DIP20)
PAL2 - AMD PALCE16V8 (stamped 'N676A2', DIP20)
PAL3 - AMD PALCE16V8 (stamped 'N676A3', DIP20)
PAL4 - AMD PALCE16V8 (stamped 'N676A5', DIP20)
JP1 - 25M O O-O 32M
JP2 - 25M O O-O 32M
JP3 - RW O O O RO
JP4 - PROG 32M O O-O 16M
JP5 - DATA 32M O-O O 16M
JP6 - BOOT 16 O-O O 32
JP7 - SRC DOUT2 O O-O 0
JP8 - 64M&32M O-O O 16M
JP9 - 64M O O-O 32M&16M
JP10 - 64M&32M O-O O 16M
JP11 - 64M O O-O 32M&16M
JP12 - through O-O O SP
JP13 - through O-O O SP
JP14 - WDT O O
JP15 - MONO O-O O SURR
JP16 - HIGH O O O MID (N/C LOW)
CN1 to CN3 - D-SUB Connectors
CN4 - Multi-pin Connector for Network PCB
CN5 - DIN96 connector (pads only, not used)
CN6 - DIN96 joining connector to lower PCB
CN7 - Multi-pin connector (pads only, not used)
CN9 to CN13 - Power Connectors
CN14 to CN17 - RCA Stereo Audio OUT
CN18 - RCA Mono Audio OUT
CN19 - USB Connector
ROM Usage
---------
|------------------------------- ROM Locations -------------------------------------|
|------------------------------- ROM Locations -------------------------------------|
Game 27P 25P 22P 16P 14P 12P 9P 16T 14T 12T 9T 7S
--------------------------------------------------------------------------------------------------
Racing Jam 676NC01 - - 676A09 676A10 - - 676A04 676A05 - - 676A08
@ -163,18 +163,18 @@ sticker - GC713AC
| CN1 |
|------------------------|
Notes:
CN1 - Connector joining to CPU board CN4
CN2/3 - RCA jacks for network cable
2G - Small SOIC8 chip with number 0038323 at location 2G. An identical chip is present on
*some* Hornet games on the GN715 CPU board at location 30C. It may be a PIC or EEPROM.
On Hornet, the chip seems to refresh the data in the Timekeeper RAM when the battery
dies and keeps the game working. It's purpose on the network board is unknown but it may
'upgrade' the data in the NVRAM to the network version of the game for a twin cabinet set-up.
HYC2485S - Hybrid ceramic module for RS485
CY7C199 - 32k x8 SRAM
XC5204 - Xilinx XC5204 FPGA
XC5210 - Xilink XC5210 FPGA
N676H1 - PALCE16V8Q-15 stamped 'N676H1'
CN1 - Connector joining to CPU board CN4
CN2/3 - RCA jacks for network cable
2G - Small SOIC8 chip with number 0038323 at location 2G. An identical chip is present on
*some* Hornet games on the GN715 CPU board at location 30C. It may be a PIC or EEPROM.
On Hornet, the chip seems to refresh the data in the Timekeeper RAM when the battery
dies and keeps the game working. It's purpose on the network board is unknown but it may
'upgrade' the data in the NVRAM to the network version of the game for a twin cabinet set-up.
HYC2485S - Hybrid ceramic module for RS485
CY7C199 - 32k x8 SRAM
XC5204 - Xilinx XC5204 FPGA
XC5210 - Xilink XC5210 FPGA
N676H1 - PALCE16V8Q-15 stamped 'N676H1'
Bottom Board (VIDEO PCB)
@ -211,34 +211,34 @@ GN676 PWB(B)B
| 256KSRAM 256KSRAM JP2 CN1 PAL2 |
|-------------------------------------------------------------------------------------------|
Notes:
4M_EDO - Silicon Magic SM81C256K16CJ-35 EDO DRAM 66MHz (SOJ40)
1MSRAM - Cypress CY7C109-25VC 1Meg SRAM (SOJ32)
256KSRAM - Winbond W24257AJ-15 256k SRAM (SOJ28)
TEXELFX - 3DFX 500-0004-02 BD0665.1 TMU (QFP208)
PIXELFX - 3DFX 500-0003-03 F001701.1 FBI (QFP240)
001604 - Konami Custom (QFP208)
MC44200FT - Motorola MC44200FT 3 Channel Video D/A Converter (QFP44)
MACH111 - AMD MACH111 CPLD (Stamped '03161A', PLCC44)
PLCC44_SOCKET - empty PLCC44 socket
AV9170 - Integrated Circuit Systems Inc. Clock Multiplier (SOIC8)
AM7201 - AMD AM7201 FIFO (PLCC32)
PAL1 - AMD PALCE16V8 (stamped 'N676B4', DIP20)
PAL2 - AMD PALCE16V8 (stamped 'N676B5', DIP20)
PAL3 - AMD PALCE16V8 (stamped 'N676B2', DIP20)
JP1 - SLV O O-O MST,TWN (sets board to MASTER TWIN or SLAVE)
JP2 - SLV O O-O MST (sets board to MASTER or SLAVE)
CN1 - 96 Pin joining connector to upper PCB
CN2 - 8-Pin 24kHz RGB OUT
CN3 - 15-Pin DSUB VGA Video MAIN OUT
CN4 - 6-Pin Power Connector
CN5 - 4-Pin Power Connector
CN6 - 2-Pin Connector (Not Used)
CN7 - 6-Pin Connector
4M_EDO - Silicon Magic SM81C256K16CJ-35 EDO DRAM 66MHz (SOJ40)
1MSRAM - Cypress CY7C109-25VC 1Meg SRAM (SOJ32)
256KSRAM - Winbond W24257AJ-15 256k SRAM (SOJ28)
TEXELFX - 3DFX 500-0004-02 BD0665.1 TMU (QFP208)
PIXELFX - 3DFX 500-0003-03 F001701.1 FBI (QFP240)
001604 - Konami Custom (QFP208)
MC44200FT - Motorola MC44200FT 3 Channel Video D/A Converter (QFP44)
MACH111 - AMD MACH111 CPLD (Stamped '03161A', PLCC44)
PLCC44_SOCKET - empty PLCC44 socket
AV9170 - Integrated Circuit Systems Inc. Clock Multiplier (SOIC8)
AM7201 - AMD AM7201 FIFO (PLCC32)
PAL1 - AMD PALCE16V8 (stamped 'N676B4', DIP20)
PAL2 - AMD PALCE16V8 (stamped 'N676B5', DIP20)
PAL3 - AMD PALCE16V8 (stamped 'N676B2', DIP20)
JP1 - SLV O O-O MST,TWN (sets board to MASTER TWIN or SLAVE)
JP2 - SLV O O-O MST (sets board to MASTER or SLAVE)
CN1 - 96 Pin joining connector to upper PCB
CN2 - 8-Pin 24kHz RGB OUT
CN3 - 15-Pin DSUB VGA Video MAIN OUT
CN4 - 6-Pin Power Connector
CN5 - 4-Pin Power Connector
CN6 - 2-Pin Connector (Not Used)
CN7 - 6-Pin Connector
ROM Usage
---------
|------ ROM Locations -------|
|------ ROM Locations -------|
Game 8X 8Y 16X 16Y
-------------------------------------------
Racing Jam 676A13 - 676A14 -

2
src/mame/drivers/pandoras.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Manuel Abadia
// copyright-holders:Manuel Abadia
/***************************************************************************
Pandora's Palace(GX328) (c) 1984 Konami/Interlogic

8
src/mame/drivers/popobear.c
View File

@ -120,13 +120,13 @@ public:
DECLARE_READ8_MEMBER(_620000_r);
DECLARE_WRITE8_MEMBER(irq_ack_w);
DECLARE_WRITE16_MEMBER(vram_w);
virtual void video_start();
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect);
TIMER_DEVICE_CALLBACK_MEMBER(irq);
void postload();
};
@ -226,7 +226,7 @@ void popobear_state::video_start()
m_bg_tilemap[1]->set_transparent_pen(0);
m_bg_tilemap[2]->set_transparent_pen(0);
m_bg_tilemap[3]->set_transparent_pen(0);
save_item(NAME(m_vram_rearranged));
machine().save().register_postload(save_prepost_delegate(FUNC(popobear_state::postload), this));
}

4
src/mame/drivers/renegade.c
View File

@ -205,7 +205,7 @@ void renegade_state::machine_start()
DRIVER_INIT_MEMBER(renegade_state,renegade)
{
m_mcu_sim = FALSE;
save_item(NAME(m_from_main));
save_item(NAME(m_from_mcu));
save_item(NAME(m_main_sent));
@ -229,7 +229,7 @@ DRIVER_INIT_MEMBER(renegade_state,kuniokun)
m_mcu_encrypt_table_len = 0x2a;
m_mcu->suspend(SUSPEND_REASON_DISABLE, 1);
save_item(NAME(m_mcu_buffer));
save_item(NAME(m_mcu_input_size));
save_item(NAME(m_mcu_output_byte));

100
src/mame/drivers/savquest.c
View File

@ -425,47 +425,47 @@ WRITE32_MEMBER(savquest_state::bios_ec000_ram_w)
static const UINT8 m_hasp_cmppass[] = {0xc3, 0xd9, 0xd3, 0xfb, 0x9d, 0x89, 0xb9, 0xa1, 0xb3, 0xc1, 0xf1, 0xcd, 0xdf, 0x9d}; /* 0x9d or 0x9e */
static const UINT8 m_hasp_prodinfo[] = {0x51, 0x4c, 0x52, 0x4d, 0x53, 0x4e, 0x53, 0x4e, 0x53, 0x49, 0x53, 0x48, 0x53, 0x4b, 0x53, 0x4a,
0x53, 0x43, 0x53, 0x45, 0x52, 0x46, 0x53, 0x43, 0x53, 0x41, 0xac, 0x40, 0x53, 0xbc, 0x53, 0x42,
0x53, 0x57, 0x53, 0x5d, 0x52, 0x5e, 0x53, 0x5b, 0x53, 0x59, 0xac, 0x58, 0x53, 0xa4
};
0x53, 0x43, 0x53, 0x45, 0x52, 0x46, 0x53, 0x43, 0x53, 0x41, 0xac, 0x40, 0x53, 0xbc, 0x53, 0x42,
0x53, 0x57, 0x53, 0x5d, 0x52, 0x5e, 0x53, 0x5b, 0x53, 0x59, 0xac, 0x58, 0x53, 0xa4
};
READ8_MEMBER(savquest_state::parallel_port_r)
{
if (offset == 1)
{
if ((m_haspstate == HASPSTATE_READ)
&& (m_hasp_passmode == 3)
)
&& (m_hasp_passmode == 3)
)
{
/* passmode 3 is used to retrieve the product(s) information
it comes in two parts: header and product
the header has this format:
offset range purpose
00 01 header type
01 01-05 count of used product slots, must be 2
02 01-05 count of unused product slots
this is assumed to be 6-(count of used slots)
but it is not enforced here
however a total of 6 structures will be checked
03 01-02 unknown
04 01-46 country code
05-0f 00 reserved
the used product slots have this format:
(the unused product slots must be entirely zeroes)
00-01 0001-000a product ID, one must be 6, the other 0a
02 0001-0003 unknown but must be 0001
04 01-05 HASP plug country ID
05 01-02 unknown but must be 01
06 05 unknown
07-0a any unknown, not used
0b ff unknown
0c ff unknown
0d-0f 00 reserved
offset range purpose
00 01 header type
01 01-05 count of used product slots, must be 2
02 01-05 count of unused product slots
this is assumed to be 6-(count of used slots)
but it is not enforced here
however a total of 6 structures will be checked
03 01-02 unknown
04 01-46 country code
05-0f 00 reserved
the used product slots have this format:
(the unused product slots must be entirely zeroes)
00-01 0001-000a product ID, one must be 6, the other 0a
02 0001-0003 unknown but must be 0001
04 01-05 HASP plug country ID
05 01-02 unknown but must be 01
06 05 unknown
07-0a any unknown, not used
0b ff unknown
0c ff unknown
0d-0f 00 reserved
the read is performed by accessing an array of 16-bit big-endian values
and returning one bit at a time into bit 5 of the result
the 16-bit value is then XORed with 0x534d and the register index
*/
the read is performed by accessing an array of 16-bit big-endian values
and returning one bit at a time into bit 5 of the result
the 16-bit value is then XORed with 0x534d and the register index
*/
if (m_hasp_prodind <= (sizeof(m_hasp_prodinfo) * 8))
{
@ -567,24 +567,24 @@ WRITE8_MEMBER(savquest_state::parallel_port_w)
*/
if ((data8 == 0x94)
|| (data8 == 0x9e)
|| (data8 == 0xa4)
|| (data8 == 0xb2)
|| (data8 == 0xbe)
|| (data8 == 0xd0)
)
|| (data8 == 0x9e)
|| (data8 == 0xa4)
|| (data8 == 0xb2)
|| (data8 == 0xbe)
|| (data8 == 0xd0)
)
{
return;
}
if ((data8 == 0x8a)
|| (data8 == 0x8e)
|| (data8 == 0xca)
|| (data8 == 0xd2)
|| (data8 == 0xe2)
|| (data8 == 0xf0)
|| (data8 == 0xfc)
)
|| (data8 == 0x8e)
|| (data8 == 0xca)
|| (data8 == 0xd2)
|| (data8 == 0xe2)
|| (data8 == 0xf0)
|| (data8 == 0xfc)
)
{
/* someone with access to the actual dongle could dump the true values
I've never seen it so I just determined the relevant bits instead
@ -648,8 +648,8 @@ WRITE8_MEMBER(savquest_state::parallel_port_w)
if (data8 & 1)
{
if ((m_hasp_passmode == 1)
&& (data8 == 0x9d)
)
&& (data8 == 0x9d)
)
{
m_hasp_passmode = 2;
}
@ -663,8 +663,8 @@ WRITE8_MEMBER(savquest_state::parallel_port_w)
if (++m_hasp_passind == sizeof(m_hasp_tmppass))
{
if ((m_hasp_tmppass[0] == 0x9c)
&& (m_hasp_tmppass[1] == 0x9e)
)
&& (m_hasp_tmppass[1] == 0x9e)
)
{
int i;
@ -690,7 +690,7 @@ WRITE8_MEMBER(savquest_state::parallel_port_w)
}
}
else if ((m_haspstate == HASPSTATE_PASSBEG)
&& (data8 & 1)
&& (data8 & 1)
)
{
m_hasp_tmppass[m_hasp_passind] = data8;
@ -725,7 +725,7 @@ WRITE8_MEMBER(savquest_state::smram_w)
}
static ADDRESS_MAP_START(savquest_map, AS_PROGRAM, 32, savquest_state)
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000000, 0x0009ffff) AM_RAM
AM_RANGE(0x000a0000, 0x000bffff) AM_READWRITE8(smram_r,smram_w,0xffffffff) //AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff)
AM_RANGE(0x000c0000, 0x000c7fff) AM_ROM AM_REGION("video_bios", 0)
@ -804,7 +804,7 @@ static MACHINE_CONFIG_START( savquest, savquest_state )
MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259_1", pic8259_device, inta_cb)
MCFG_FRAGMENT_ADD( pcat_common )
MCFG_DEVICE_REMOVE("rtc")
MCFG_DEVICE_REMOVE("rtc")
MCFG_DS12885_ADD("rtc")
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)

4
src/mame/drivers/sealy.c
View File

@ -55,8 +55,8 @@ public:
PALETTE_INIT_MEMBER(sealy_state,sealy)
{
// for (int i = 0; i < 32768; i++)
// palette.set_pen_color(i,pal5bit(i >> 5),pal5bit(i >> 10),pal5bit(i >> 0));
// for (int i = 0; i < 32768; i++)
// palette.set_pen_color(i,pal5bit(i >> 5),pal5bit(i >> 10),pal5bit(i >> 0));
}
UINT32 sealy_state::screen_update_sealy(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)

24
src/mame/drivers/segasp.c
View File

@ -194,12 +194,12 @@ static ADDRESS_MAP_START( segasp_map, AS_PROGRAM, 64, segasp_state )
/* External Device */
AM_RANGE(0x01000000, 0x0100ffff) AM_RAM // banked access to ROM/NET board address space, mainly backup SRAM and ATA
AM_RANGE(0x01010000, 0x01010007) AM_READWRITE(sp_bank_r, sp_bank_w )
// AM_RANGE(0x01010080, 0x01010087) IRQ pending/reset, ATA control
// AM_RANGE(0x01010080, 0x01010087) IRQ pending/reset, ATA control
AM_RANGE(0x01010100, 0x01010127) AM_READ(sp_io_r)
AM_RANGE(0x01010128, 0x0101012f) AM_READWRITE(sp_eeprom_r, sp_eeprom_w )
AM_RANGE(0x01010150, 0x01010157) AM_READ(sp_rombdflg_r)
// AM_RANGE(0x01010180, 0x010101af) custom UART 1
// AM_RANGE(0x010101c0, 0x010101ef) custom UART 2
// AM_RANGE(0x01010180, 0x010101af) custom UART 1
// AM_RANGE(0x010101c0, 0x010101ef) custom UART 2
/* Area 1 */
AM_RANGE(0x04000000, 0x04ffffff) AM_MIRROR(0x02000000) AM_RAM AM_SHARE("dc_texture_ram") // texture memory 64 bit access
@ -370,7 +370,7 @@ ROM_START( brickppl )
ROM_LOAD( "ic64", 0x08000000, 0x4000000, CRC(383e90d9) SHA1(eeca4b1bd0cd1fed7b85f045d71e0c7258d4350b) )
ROM_LOAD( "ic65", 0x0c000000, 0x4000000, CRC(4c29b5ac) SHA1(9e6a79ad2d2498eed5b2590c8764222e7d6c0229) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0558-com.ic15", 0, 0x800, BAD_DUMP CRC(7592d004) SHA1(632373d807f54953d68c95a9f874ed3e8011f085) )
@ -392,7 +392,7 @@ ROM_START( dinoking )
ROM_LOAD( "ic69s", 0x07000000, 0x01000000, CRC(c78e46c2) SHA1(b8224c68face23010414d13ebb4cc05a2a9dce8a) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // actually 8x 128Mbit FlashROMs
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // actually 8x 128Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0408-com.ic15", 0, 0x800, BAD_DUMP CRC(0e94daba) SHA1(4e9722333a29afd0dbadba78b16344b77a689610) )
@ -413,7 +413,7 @@ ROM_START( dinokior )
ROM_LOAD( "ic68s", 0x06000000, 0x01000000, CRC(ff5ed2b8) SHA1(d8d86b3ed976c8c8fc51d225ae661e5f237b6e1d) )
ROM_LOAD( "ic69s", 0x07000000, 0x01000000, CRC(ab8ac4eb) SHA1(e6b3ce796ae4887011e2764261f3f437dc9939f9) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // actually 8x 128Mbit FlashROMs
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // actually 8x 128Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0408-com.ic15", 0, 0x800, BAD_DUMP CRC(0e94daba) SHA1(4e9722333a29afd0dbadba78b16344b77a689610) )
@ -429,7 +429,7 @@ ROM_START( lovebery )
ROM_LOAD( "ic62", 0x00000000, 0x4000000, CRC(1bd80ed0) SHA1(d50307573389ebe71e381a75deb83811fa397b94) )
ROM_LOAD( "ic63", 0x04000000, 0x4000000, CRC(d3870287) SHA1(efd3630d54068f5a8caf242a48db410bedf48e7a) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0446-com.ic15", 0, 0x800, BAD_DUMP CRC(60f56bf2) SHA1(35e697aca7213e3fb1ebe75bb8991b1b992af6d9) )
@ -453,7 +453,7 @@ ROM_START( lovebero )
ROM_LOAD( "ic62", 0x00000000, 0x4000000, CRC(0a23cea3) SHA1(1780d935b0d641769859b2022df8e4262e7bafd8) )
ROM_LOAD( "ic63", 0x04000000, 0x4000000, CRC(d3870287) SHA1(efd3630d54068f5a8caf242a48db410bedf48e7a) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0446-com.ic15", 0, 0x800, BAD_DUMP CRC(60f56bf2) SHA1(35e697aca7213e3fb1ebe75bb8991b1b992af6d9) )
@ -469,7 +469,7 @@ ROM_START( tetgiant )
ROM_LOAD( "ic62", 0x00000000, 0x4000000, CRC(31ba1938) SHA1(9b5a05193b3df13cd7617a38913e0b0fbd61da44) )
ROM_LOAD( "ic63", 0x04000000, 0x4000000, CRC(cb946213) SHA1(6195e33c44a1e8eb464dfc3558dc1c9b4d910ef3) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // 2x 512Mbit FlashROMs
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // 2x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0604-com.ic15", 0, 0x800, BAD_DUMP CRC(e8dd2b86) SHA1(765ffd2e4a36302b1db0815e842c9656e29f2457) )
@ -487,7 +487,7 @@ ROM_START( dinoki25 )
DISK_REGION( "cflash" )
DISK_IMAGE( "mda-c0047", 0, SHA1(0f97291d9c5dbe3e66a5220da05aebdfaa78b35d) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0408-com.ic15", 0, 0x800, BAD_DUMP CRC(0e94daba) SHA1(4e9722333a29afd0dbadba78b16344b77a689610) )
@ -511,7 +511,7 @@ ROM_START( loveber3 )
DISK_REGION( "cflash" )
DISK_IMAGE( "mda-c0042", 0, SHA1(9992d90dae8ce7636e4153e02b779c27931b3be6) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0446-com.ic15", 0, 0x800, BAD_DUMP CRC(60f56bf2) SHA1(35e697aca7213e3fb1ebe75bb8991b1b992af6d9) )
@ -528,7 +528,7 @@ ROM_START( tetgiano )
DISK_REGION( "cflash" )
DISK_IMAGE( "mda-c0076", 0, SHA1(6987c888d2a3ada2d07f6396d47fdba507ca859d) )
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // 2x 512Mbit FlashROMs
ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // 2x 512Mbit FlashROMs
ROM_REGION( 0x800, "pic_readout", 0 )
ROM_LOAD( "317-0604-com.ic15", 0, 0x800, BAD_DUMP CRC(e8dd2b86) SHA1(765ffd2e4a36302b1db0815e842c9656e29f2457) )

18
src/mame/drivers/sigmab98.c
View File

@ -300,7 +300,7 @@ void sigmab98_state::video_start()
inline int integer_part(int x)
{
// return x >> 16;
// return x >> 16;
return (x + 0x8000) >> 16;
}
@ -328,14 +328,14 @@ void sigmab98_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec
int ny = ((s[ 0x06 ] & 0xf8) >> 3) + 1;
int dsty = (s[ 0x06 ] & 0x03) * 256 + s[ 0x07 ];
int dstdx = (s[ 0x08 ] & 0xff) * 256 + s[ 0x09 ]; // 0x100 = no zoom, 0x200 = 50% zoom
int dstdy = (s[ 0x0a ] & 0xff) * 256 + s[ 0x0b ]; // ""
int dstdx = (s[ 0x08 ] & 0xff) * 256 + s[ 0x09 ]; // 0x100 = no zoom, 0x200 = 50% zoom
int dstdy = (s[ 0x0a ] & 0xff) * 256 + s[ 0x0b ]; // ""
int srcx = (s[ 0x0c ] & 0xff) * 256 + s[ 0x0d ];
int srcy = (s[ 0x0e ] & 0xff) * 256 + s[ 0x0f ];
// Sign extend the position
dstx = (dstx & 0x01ff) - (dstx & 0x0200); // or 0x3ff/0x400?
dstx = (dstx & 0x01ff) - (dstx & 0x0200); // or 0x3ff/0x400?
dsty = (dsty & 0x01ff) - (dsty & 0x0200);
// Flipping
@ -390,17 +390,17 @@ void sigmab98_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec
dsty <<= 16;
// Source delta (equal for x and y)
int z = int( sqrt(dstdx * dstdx + dstdy * dstdy) + 0.5 ); // dest delta vector is scaled by the source delta!?
int z = int( sqrt(dstdx * dstdx + dstdy * dstdy) + 0.5 ); // dest delta vector is scaled by the source delta!?
if (!z)
z = 0x100;
int srcdzz = z << 8;
// Destination x and y deltas
int dstdxx = (dstdx << 16) / z; // dest x delta for source x increments
int dstdyx = (dstdy << 16) / z; // dest y delta for source x increments
int dstdxx = (dstdx << 16) / z; // dest x delta for source x increments
int dstdyx = (dstdy << 16) / z; // dest y delta for source x increments
int dstdxy = -dstdyx; // dest x delta for source y increments (orthogonal to the above vector)
int dstdyy = dstdxx; // dest y delta for source y increments
int dstdxy = -dstdyx; // dest x delta for source y increments (orthogonal to the above vector)
int dstdyy = dstdxx; // dest y delta for source y increments
// Transform the source offset in a destination offset (negate, scale and rotate it)
srcx = (-srcx << 8) / z;

4
src/mame/drivers/taitotx.c
View File

@ -56,7 +56,7 @@
Zoids Card Colosseum
Taito Type X+ games
Battle Gear 4
Battle Gear 4 Tuned
Half Life 2 Survivor
@ -64,7 +64,7 @@
War Of The Grail
Taito Type X2 games
Battle Fantasia
BlazBlue: Calamity Trigger
BlazBlue: Chrono Phantasma

2
src/mame/drivers/tasman.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Philip Bennett, R. Belmont
// copyright-holders:Philip Bennett, R. Belmont
/*
Konami Gambling Games ("Tasman" hardware)
System GX derivative

2
src/mame/drivers/twins.c
View File

@ -286,7 +286,7 @@ ADDRESS_MAP_END
void twins_state::video_start()
{
m_paloff = 0;
save_item(NAME(m_paloff));
save_item(NAME(m_spritesinit));
save_item(NAME(m_spriteswidth));

2
src/mame/drivers/videopin.c
View File

@ -78,7 +78,7 @@ TIMER_CALLBACK_MEMBER(videopin_state::interrupt_callback)
void videopin_state::machine_start()
{
m_interrupt_timer = timer_alloc(TIMER_INTERRUPT);
save_item(NAME(m_time_pushed));
save_item(NAME(m_time_released));
save_item(NAME(m_prev));

18
src/mame/drivers/vigilant.c
View File

@ -897,7 +897,7 @@ ROM_START( vigilanbl ) /* Bootleg */
ROM_LOAD( "f05_c08.bin", 0x00000, 0x10000, CRC(01579d20) SHA1(e58d8ca0ea0ac9d77225bf55faa499d1565924f9) )
ROM_LOAD( "h05_c09.bin", 0x10000, 0x10000, CRC(4f5872f0) SHA1(6af21ba1c94097eecce30585983b4b07528c8635) )
ROM_REGION( 0x80000, "gfx2", 0 )
ROM_REGION( 0x80000, "gfx2", 0 )
ROM_LOAD( "n07_c12.bin", 0x00000, 0x10000, CRC(10af8eb2) SHA1(664b178b248babc43a9af0fe140fe57bc7367762) )
ROM_LOAD( "k07_c10.bin", 0x10000, 0x10000, CRC(9576f304) SHA1(0ec2a7d3d82208e2a9a4ef9ab2824e6fe26ebbe5) )
ROM_LOAD( "o07_c13.bin", 0x20000, 0x10000, CRC(b1d9d4dc) SHA1(1aacf6b0ff8d102880d3dce3b55cd1488edb90cf) )
@ -1055,14 +1055,14 @@ ROM_START( buccanrsa )
ROM_LOAD( "prom2.u99", 0x0300, 0x0100, CRC(e0aa8869) SHA1(ac8bdfeba69420ba56ec561bf3d0f1229d02cea2) )
ROM_END
GAME( 1988, vigilant, 0, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev E)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilantg, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US, Rev G)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilano, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilanta, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev A)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilantb, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US, Rev B)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilantc, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev C)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilantd, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (Japan, Rev D)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilanbl, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "bootleg", "Vigilante (bootleg)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilant, 0, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev E)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilantg, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US, Rev G)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilano, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilanta, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev A)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilantb, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US, Rev B)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilantc, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev C)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilantd, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (Japan, Rev D)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, vigilanbl, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "bootleg", "Vigilante (bootleg)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )
GAME( 1988, kikcubic, 0, kikcubic, kikcubic, driver_device, 0, ROT0, "Irem", "Meikyu Jima (Japan)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) /* English title is Kickle Cubicle */
GAME( 1988, kikcubicb, kikcubic, kikcubic, kikcubic, driver_device, 0, ROT0, "bootleg", "Kickle Cubele", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE )

6
src/mame/drivers/wms.c
View File

@ -21,7 +21,7 @@
1x Cirrus Logic CL-GD5429-86QC-C (VGA Graphics Controller) [U32]
1x QuickLogic QL2003-XPF144C FPGA [U21]
4x (1-2-4/8 Mb selectable through jumper) program ROM sockets. [XU02, XU03, XU04, XU05]
4x (1-2-4/8 Mb selectable through jumper) program ROM sockets. [XU02, XU03, XU04, XU05]
4x (1-2-4/8 Mb selectable through jumper) sound ROM sockets. [XU17, XU18, XU30, XU31]
1x unknown serial EEPROM (DIP8) (currently missing) [XU27]
@ -77,7 +77,7 @@
#define VIDEO_CLOCK XTAL_14_31818MHz // Pletronics MP49 14.31818 MHz. Crystal. Used in common VGA ISA cards.
#define UART_CLOCK XTAL_1_8432MHz // Seems UART clock, since allows integer division to common baud rates.
// (16 * 115200 baud, 192 * 9600 baud, 1536 * 1200 baud, etc...)
// (16 * 115200 baud, 192 * 9600 baud, 1536 * 1200 baud, etc...)
#include "emu.h"
@ -174,7 +174,7 @@ static MACHINE_CONFIG_START( wms, wms_state )
MCFG_DEVICE_DISABLE()
MCFG_CPU_PROGRAM_MAP(adsp_program_map)
MCFG_CPU_DATA_MAP(adsp_data_map)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))

2
src/mame/drivers/wyvernf0.c
View File

@ -195,7 +195,7 @@ yyyyyyyy fccccccc x???pppp xxxxxxxx
sx = sprram[offs + 3] - ((sprram[offs + 2] & 0x80) << 1);
sy = 256 - 8 - sprram[offs + 0] - 23; // center player sprite: 256 - 8 - 0x71 + dy = 256/2-32/2 -> dy = -23
// int flipx = sprram[offs + 2] & 0x40; // nope
// int flipx = sprram[offs + 2] & 0x40; // nope
int flipx = 0;
int flipy = sprram[offs + 1] & 0x80;

2
src/mame/includes/bwing.h
View File

@ -85,6 +85,6 @@ public:
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void draw_sprites( bitmap_ind16 &bmp, const rectangle &clip, UINT8 *ram, int pri );
INTERRUPT_GEN_MEMBER(bwp3_interrupt);
};

8
src/mame/includes/cchasm.h
View File

@ -36,7 +36,7 @@ public:
required_device<dac_device> m_dac2;
required_device<vector_device> m_vector;
required_device<screen_device> m_screen;
required_shared_ptr<UINT16> m_ram;
int m_sound_flags;
@ -46,7 +46,7 @@ public:
int m_xcenter;
int m_ycenter;
emu_timer *m_refresh_end_timer;
DECLARE_WRITE16_MEMBER(led_w);
DECLARE_WRITE16_MEMBER(refresh_control_w);
DECLARE_WRITE8_MEMBER(reset_coin_flag_w);
@ -57,12 +57,12 @@ public:
DECLARE_READ16_MEMBER(io_r);
DECLARE_WRITE_LINE_MEMBER(ctc_timer_1_w);
DECLARE_WRITE_LINE_MEMBER(ctc_timer_2_w);
INPUT_CHANGED_MEMBER(set_coin_flag);
virtual void video_start();
virtual void sound_start();
void refresh();
protected:

28
src/mame/includes/chihiro.h
View File

@ -71,24 +71,24 @@ struct vertex_nv {
class vertex_program_simulator {
public:
enum VectorialOperation {
VecNOP=0,
VecMOV,
VecMUL,
VecADD,
VecMAD,
VecDP3,
VecDPH,
VecDP4,
VecDST,
VecMIN,
VecMAX,
VecSLT,
VecSGE,
VecNOP=0,
VecMOV,
VecMUL,
VecADD,
VecMAD,
VecDP3,
VecDPH,
VecDP4,
VecDST,
VecMIN,
VecMAX,
VecSLT,
VecSGE,
VecARL
};
enum ScalarOperation {
ScaNOP=0,
ScaIMV,
ScaIMV,
ScaRCP,
ScaRCC,
ScaRSQ,

2
src/mame/includes/ddribble.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Manuel Abadia
// copyright-holders:Manuel Abadia
/***************************************************************************
Double Dribble

12
src/mame/includes/harddriv.h
View File

@ -437,7 +437,7 @@ public:
DECLARE_READ16_MEMBER(hd68k_snd_status_r);
DECLARE_WRITE16_MEMBER(hd68k_snd_data_w);
DECLARE_WRITE16_MEMBER(hd68k_snd_reset_w);
DECLARE_READ16_MEMBER(hdsnd68k_data_r);
DECLARE_WRITE16_MEMBER(hdsnd68k_data_w);
DECLARE_READ16_MEMBER(hdsnd68k_switches_r);
@ -453,7 +453,7 @@ public:
DECLARE_READ16_MEMBER(hdsnd68k_320com_r);
DECLARE_WRITE16_MEMBER(hdsnd68k_320com_w);
DECLARE_READ16_MEMBER(hdsnddsp_get_bio);
DECLARE_WRITE16_MEMBER(hdsnddsp_dac_w);
DECLARE_WRITE16_MEMBER(hdsnddsp_comport_w);
DECLARE_WRITE16_MEMBER(hdsnddsp_mute_w);
@ -462,19 +462,19 @@ public:
DECLARE_READ16_MEMBER(hdsnddsp_rom_r);
DECLARE_READ16_MEMBER(hdsnddsp_comram_r);
DECLARE_READ16_MEMBER(hdsnddsp_compare_r);
protected:
virtual void device_start();
virtual void device_reset();
virtual machine_config_constructor device_mconfig_additions() const;
private:
required_device<cpu_device> m_soundcpu;
required_device<dac_device> m_dac;
required_device<cpu_device> m_sounddsp;
required_shared_ptr<UINT16> m_sounddsp_ram;
required_region_ptr<UINT8> m_sound_rom;
UINT8 m_soundflag;
UINT8 m_mainflag;
UINT16 m_sounddata;
@ -488,7 +488,7 @@ private:
UINT16 m_comram[0x400/2];
UINT64 m_last_bio_cycles;
void update_68k_interrupts();
TIMER_CALLBACK_MEMBER( delayed_68k_w );
};

6
src/mame/includes/nbmj8688.h
View File

@ -46,14 +46,14 @@ public:
UINT8 *m_clut;
int m_flipscreen_old;
emu_timer *m_blitter_timer;
// common
DECLARE_READ8_MEMBER(ff_r);
DECLARE_WRITE8_MEMBER(clut_w);
DECLARE_WRITE8_MEMBER(blitter_w);
DECLARE_WRITE8_MEMBER(scrolly_w);
DECLARE_WRITE8_MEMBER(mjsikaku_gfxflag2_w);
DECLARE_WRITE8_MEMBER(mjsikaku_gfxflag3_w);
DECLARE_WRITE8_MEMBER(mjsikaku_romsel_w);
@ -83,7 +83,7 @@ public:
DECLARE_VIDEO_START(mbmj8688_hybrid_16bit);
DECLARE_VIDEO_START(mbmj8688_hybrid_12bit);
DECLARE_VIDEO_START(mbmj8688_pure_16bit);
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void vramflip();
void update_pixel(int x, int y);

2
src/mame/includes/pandoras.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Manuel Abadia
// copyright-holders:Manuel Abadia
/*************************************************************************
Pandora's Palace

2
src/mame/includes/renegade.h
View File

@ -18,7 +18,7 @@ public:
m_bg_videoram(*this, "bg_videoram"),
m_spriteram(*this, "spriteram"),
m_rombank(*this, "rombank"),
m_adpcmrom(*this, "adpcm") { }
m_adpcmrom(*this, "adpcm") { }
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_audiocpu;

2
src/mame/includes/toaplipt.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Quench, Stephh
// copyright-holders:Quench, Stephh
/*******************************************************************************
Input port macros used by many games in multiple Toaplan drivers

2
src/mame/includes/wiping.h
View File

@ -21,7 +21,7 @@ public:
required_shared_ptr<UINT8> m_videoram;
required_shared_ptr<UINT8> m_colorram;
required_shared_ptr<UINT8> m_spriteram;
int m_flipscreen;
UINT8 *m_soundregs; // if 0-ed
UINT8 m_main_irq_mask;

18
src/mame/machine/n64.c
View File

@ -1723,17 +1723,17 @@ int n64_periphs::pif_channel_handle_command(int channel, int slength, UINT8 *sda
// Read status
switch ((machine().root_device().ioport("input")->read() >> (2 * channel)) & 3)
{
case 0: //NONE (unconnected)
case 3: //Invalid
case 0: //NONE (unconnected)
case 3: //Invalid
return 1;
case 1: //JOYPAD
case 1: //JOYPAD
rdata[0] = 0x05;
rdata[1] = 0x00;
rdata[2] = 0x01;
return 0;
case 2: //MOUSE
case 2: //MOUSE
rdata[0] = 0x02;
rdata[1] = 0x00;
rdata[2] = 0x01;
@ -1778,15 +1778,15 @@ int n64_periphs::pif_channel_handle_command(int channel, int slength, UINT8 *sda
case 0: // P1 Inputs
case 1: // P2 Inputs
case 2: // P3 Inputs
case 3: // P4 Inputs
case 3: // P4 Inputs
{
switch ((machine().root_device().ioport("input")->read() >> (2 * channel)) & 3)
{
case 0: //NONE
case 3: //Invalid
case 0: //NONE
case 3: //Invalid
return 1;
case 1: //JOYPAD
case 1: //JOYPAD
buttons = machine().root_device().ioport(portnames[(channel*5) + 0])->read();
x = machine().root_device().ioport(portnames[(channel*5) + 1])->read() - 128;
y = machine().root_device().ioport(portnames[(channel*5) + 2])->read() - 128;
@ -1797,7 +1797,7 @@ int n64_periphs::pif_channel_handle_command(int channel, int slength, UINT8 *sda
rdata[3] = (UINT8)(y);
return 0;
case 2: //MOUSE
case 2: //MOUSE
buttons = machine().root_device().ioport(portnames[(channel*5) + 0])->read();
x = (INT16)machine().root_device().ioport(portnames[(channel*5) + 1 + 2])->read();// - 128;
y = (INT16)machine().root_device().ioport(portnames[(channel*5) + 2 + 2])->read();// - 128;

2
src/mame/video/cchasm.c
View File

@ -131,6 +131,6 @@ void cchasm_state::video_start()
m_xcenter=visarea.xcenter() << 16;
m_ycenter=visarea.ycenter() << 16;
m_refresh_end_timer = timer_alloc(TIMER_REFRESH_END);
}

2
src/mame/video/ddribble.c
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Manuel Abadia
// copyright-holders:Manuel Abadia
/***************************************************************************
video.c

2
src/mame/video/dynduke.c
View File

@ -79,7 +79,7 @@ void dynduke_state::video_start()
m_fg_layer->set_transparent_pen(15);
m_tx_layer->set_transparent_pen(15);
save_item(NAME(m_back_bankbase));
save_item(NAME(m_fore_bankbase));
save_item(NAME(m_back_enable));

2
src/mame/video/midvunit.c
View File

@ -76,7 +76,7 @@ void midvunit_state::video_start()
save_item(NAME(m_dma_data));
save_item(NAME(m_dma_data_index));
save_item(NAME(m_page_control));
m_video_changed = TRUE;
machine().save().register_postload(save_prepost_delegate(FUNC(midvunit_state::postload), this));
}

16
src/mame/video/n64.c
View File

@ -442,11 +442,11 @@ void n64_rdp::set_suba_input_rgb(UINT8** input_r, UINT8** input_g, UINT8** input
case 3: *input_r = &userdata->m_prim_color.i.r; *input_g = &userdata->m_prim_color.i.g; *input_b = &userdata->m_prim_color.i.b; break;
case 4: *input_r = &userdata->m_shade_color.i.r; *input_g = &userdata->m_shade_color.i.g; *input_b = &userdata->m_shade_color.i.b; break;
case 5: *input_r = &userdata->m_env_color.i.r; *input_g = &userdata->m_env_color.i.g; *input_b = &userdata->m_env_color.i.b; break;
case 6: *input_r = &m_one.i.r; *input_g = &m_one.i.g; *input_b = &m_one.i.b; break;
case 6: *input_r = &m_one.i.r; *input_g = &m_one.i.g; *input_b = &m_one.i.b; break;
case 7: *input_r = &userdata->m_noise_color.i.r; *input_g = &userdata->m_noise_color.i.g; *input_b = &userdata->m_noise_color.i.b; break;
case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15:
{
*input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break;
*input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break;
}
}
}
@ -462,10 +462,10 @@ void n64_rdp::set_subb_input_rgb(UINT8** input_r, UINT8** input_g, UINT8** input
case 4: *input_r = &userdata->m_shade_color.i.r; *input_g = &userdata->m_shade_color.i.g; *input_b = &userdata->m_shade_color.i.b; break;
case 5: *input_r = &userdata->m_env_color.i.r; *input_g = &userdata->m_env_color.i.g; *input_b = &userdata->m_env_color.i.b; break;
case 6: fatalerror("SET_SUBB_RGB_INPUT: key_center\n");
case 7: *input_r = (UINT8*)&m_k4; *input_g = (UINT8*)&m_k4; *input_b = (UINT8*)&m_k4; break;
case 7: *input_r = (UINT8*)&m_k4; *input_g = (UINT8*)&m_k4; *input_b = (UINT8*)&m_k4; break;
case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15:
{
*input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break;
*input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break;
}
}
}
@ -493,7 +493,7 @@ void n64_rdp::set_mul_input_rgb(UINT8** input_r, UINT8** input_g, UINT8** input_
case 16: case 17: case 18: case 19: case 20: case 21: case 22: case 23:
case 24: case 25: case 26: case 27: case 28: case 29: case 30: case 31:
{
*input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break;
*input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break;
}
}
}
@ -508,8 +508,8 @@ void n64_rdp::set_add_input_rgb(UINT8** input_r, UINT8** input_g, UINT8** input_
case 3: *input_r = &userdata->m_prim_color.i.r; *input_g = &userdata->m_prim_color.i.g; *input_b = &userdata->m_prim_color.i.b; break;
case 4: *input_r = &userdata->m_shade_color.i.r; *input_g = &userdata->m_shade_color.i.g; *input_b = &userdata->m_shade_color.i.b; break;
case 5: *input_r = &userdata->m_env_color.i.r; *input_g = &userdata->m_env_color.i.g; *input_b = &userdata->m_env_color.i.b; break;
case 6: *input_r = &m_one.i.r; *input_g = &m_one.i.g; *input_b = &m_one.i.b; break;
case 7: *input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break;
case 6: *input_r = &m_one.i.r; *input_g = &m_one.i.g; *input_b = &m_one.i.b; break;
case 7: *input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break;
}
}
@ -2623,7 +2623,7 @@ void n64_rdp::cmd_set_other_modes(UINT32 w1, UINT32 w2)
m_other_modes.blend_m2b_0 = (w2 >> 18) & 0x3; // 00
m_other_modes.blend_m2b_1 = (w2 >> 16) & 0x3; // 01
m_other_modes.force_blend = (w2 >> 14) & 1; // 0
m_other_modes.blend_shift = m_other_modes.force_blend ? 5 : 2;
m_other_modes.blend_shift = m_other_modes.force_blend ? 5 : 2;
m_other_modes.alpha_cvg_select = (w2 >> 13) & 1; // 1
m_other_modes.cvg_times_alpha = (w2 >> 12) & 1; // 0
m_other_modes.z_mode = (w2 >> 10) & 0x3; // 00

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