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Cleanups and version bump

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This commit is contained in:
Miodrag Milanovic 2015-05-27 09:03:32 +02:00
parent e5caefbfbd
commit 64e16ca8cf
141 changed files with 1475 additions and 1491 deletions
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1
src/emu/bus/cpc/brunword4.c
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@ -108,4 +108,3 @@ void cpc_brunword4_device::set_mapping()
membank(":bank4")->set_base(ROM+((bank*0x4000) + 0x2000));
}
}

1
src/emu/bus/cpc/brunword4.h
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@ -36,4 +36,3 @@ private:
// device type definition
extern const device_type CPC_BRUNWORD_MK4;

5
src/emu/bus/gameboy/mbc.c
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@ -748,7 +748,6 @@ WRITE8_MEMBER(gb_rom_mmm01_device::write_bank)
READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
{
UINT16 off_edit = offset;
/* Wait for 0x31 transitions of A15 (hi -> lo), i.e. ROM accesses; A15 = HI while in bootstrap */
@ -780,7 +779,6 @@ READ8_MEMBER(gb_rom_sachen_mmc1_device::read_rom)
WRITE8_MEMBER(gb_rom_sachen_mmc1_device::write_bank)
{
/* Only A15..A6, A4, A1..A0 are connected */
/* We only decode upper three bits */
switch ((offset & 0xFFD3) & 0xE000)
@ -822,7 +820,6 @@ WRITE8_MEMBER(gb_rom_sachen_mmc1_device::write_bank)
READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom)
{
UINT16 off_edit = offset;
/* Wait for 0x30 transitions of A15 (lo -> hi), i.e. ROM accesses; A15 = HI while in bootstrap */
@ -861,7 +858,6 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_rom)
READ8_MEMBER(gb_rom_sachen_mmc2_device::read_ram)
{
if (m_mode == MODE_LOCKED_DMG) {
m_unlock_cnt = 0x00;
m_mode = MODE_LOCKED_CGB;
@ -872,7 +868,6 @@ READ8_MEMBER(gb_rom_sachen_mmc2_device::read_ram)
WRITE8_MEMBER(gb_rom_sachen_mmc2_device::write_ram)
{
if (m_mode == MODE_LOCKED_DMG) {
m_unlock_cnt = 0x00;
m_mode = MODE_LOCKED_CGB;

2
src/emu/cpu/e0c6200/e0c6200.c
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@ -296,7 +296,6 @@ void e0c6200_cpu_device::execute_one()
default:
switch (m_op)
{
// LD r,q: load register with register
case 0xec0: /* m_a = m_a; */ break;
case 0xec1: m_a = m_b; break;
@ -698,7 +697,6 @@ void e0c6200_cpu_device::execute_one()
default:
switch (m_op & 0xff0)
{
// LD r,i: load register with 4-bit immediate data
case 0xe00: m_a = m_op & 0xf; break;
case 0xe10: m_b = m_op & 0xf; break;

2
src/emu/cpu/e0c6200/e0c6200d.c
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@ -180,7 +180,6 @@ CPU_DISASSEMBLE(e0c6200)
default:
switch (op)
{
// RLC r
case 0xaf0: case 0xaf5: case 0xafa: case 0xaff:
m = em_RLC; p1 = ep_R0;
@ -475,7 +474,6 @@ CPU_DISASSEMBLE(e0c6200)
default:
switch (op & 0xff0)
{
// ADC XH,i
case 0xa00:
m = em_ADC; p1 = ep_XH; p2 = ep_I;

2
src/emu/machine/wd2010.c
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@ -245,7 +245,6 @@ READ8_MEMBER(wd2010_device::read)
if (offset == TASK_FILE_SDH_REGISTER)
{
logerror("(READ) %s WD2010 '%s' SDH: %u\n", machine().describe_context(), tag(), data);
logerror("(READ) %s WD2010 '%s' Head: %u\n", machine().describe_context(), tag(), HEAD);
logerror("(READ) %s WD2010 '%s' Drive: %u\n", machine().describe_context(), tag(), DRIVE);
@ -988,4 +987,3 @@ void wd2010_device::complete_cmd(UINT8 status)
{
cmd_timer->adjust(attotime::from_msec(1), status);
}

4
src/mess/drivers/rainbow.c
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@ -1426,7 +1426,7 @@ WRITE8_MEMBER(rainbow_state::hd_status_60_w)
// - disk drive(latched status signals)
READ8_MEMBER(rainbow_state::hd_status_68_r)
{
// (*) Bits 5-7 : HARD WIRED IDENTIFICATION BITS, bits 5+7 = 1 and bit 6 = 0 (= 101 für RD51 module)
// (*) Bits 5-7 : HARD WIRED IDENTIFICATION BITS, bits 5+7 = 1 and bit 6 = 0 (= 101 f?r RD51 module)
int data = 0xe0; // 111 gives DRIVE NOT READY (when W is pressed on boot screen)
if ((m_inp5->read() == 0x01) && (rainbow_hdc_file(0) != NULL))
data = 0xa0; // A0 : OK, DRIVE IS READY (!)
@ -1468,7 +1468,7 @@ READ8_MEMBER(rainbow_state::hd_status_68_r)
}
// 68 (WRITE): Secondary Command Registers (68H) - - ERKLÄRUNG: "write-only register for commands"
// 68 (WRITE): Secondary Command Registers (68H) - - ERKL?RUNG: "write-only register for commands"
// - see TABLE 4.8 (4-24)
WRITE8_MEMBER(rainbow_state::hd_status_68_w)
{

4
src/mess/drivers/replicator.c
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@ -735,8 +735,8 @@ ROM_START( replica1 )
ROM_SYSTEM_BIOS( 8, "v750", "V 7.5.0" )
ROMX_LOAD("mighty_one_v7.5.0.bin", 0x0000, 0x1b9c4, CRC(169d6709) SHA1(62b5aacd1bc46969042aea7a50531ec467a4ff1f), ROM_BIOS(9))
/* Sailfish firmware image - Metamáquina experimental build v7.5.0 */
ROM_SYSTEM_BIOS( 9, "v750mm", "V 7.5.0 - Metamáquina" )
/* Sailfish firmware image - Metam??quina experimental build v7.5.0 */
ROM_SYSTEM_BIOS( 9, "v750mm", "V 7.5.0 - Metam??quina" )
ROMX_LOAD("mighty_one_v7.5.0.mm.bin", 0x0000, 0x1ef9a, CRC(0d36d9e7) SHA1(a53899775b4c4eea87b6903758ebb75f06710a69), ROM_BIOS(10))

1
src/mess/includes/c65.h
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@ -1,3 +1,2 @@
// license:LGPL-2.1+
// copyright-holders: Angelo Salese

1
src/mess/machine/dec_lk201.c
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@ -758,4 +758,3 @@ WRITE8_MEMBER( lk201_device::spi_w )
// printf("SPI %02x to %x (PC=%x)\n", data, offset, m_maincpu->pc());
}

3
src/tools/nltool.c
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@ -646,7 +646,7 @@ convert_t::sp_unit convert_t::m_sp_units[] = {
{"", "%g", 1.0e0 },
{"M", "CAP_M(%g)", 1.0e-3 },
{"U", "CAP_U(%g)", 1.0e-6 },
{"µ", "CAP_U(%g)", 1.0e-6 },
{"??", "CAP_U(%g)", 1.0e-6 },
{"N", "CAP_N(%g)", 1.0e-9 },
{"P", "CAP_P(%g)", 1.0e-12},
{"F", "%ge-15", 1.0e-15},
@ -665,7 +665,6 @@ convert_t::sp_unit convert_t::m_sp_units[] = {
int main(int argc, char *argv[])
{
track_memory(true);
{
tool_options_t opts;

2
src/version.c
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@ -8,7 +8,7 @@
***************************************************************************/
#define BARE_BUILD_VERSION "0.161"
#define BARE_BUILD_VERSION "0.162"
extern const char bare_build_version[];
extern const char build_version[];