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Merge branch 'master' of https://github.com/mamedev/mame

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This commit is contained in:
Robbbert 2020-06-19 04:14:36 +10:00
commit 702db75470
379 changed files with 2614 additions and 2655 deletions
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2
src/devices/bus/abckb/abc77.cpp
View File

@ -601,7 +601,7 @@ WRITE_LINE_MEMBER( abc77_device::prog_w )
// j3_w -
//-------------------------------------------------
WRITE8_MEMBER( abc77_device::j3_w )
void abc77_device::j3_w(uint8_t data)
{
m_j3 = data;
}

2
src/devices/bus/abckb/abc77.h
View File

@ -83,7 +83,7 @@ private:
void p2_w(uint8_t data);
DECLARE_READ_LINE_MEMBER( t1_r );
DECLARE_WRITE_LINE_MEMBER( prog_w );
DECLARE_WRITE8_MEMBER( j3_w );
void j3_w(uint8_t data);
void abc77_io(address_map &map);
void abc77_map(address_map &map);

2
src/devices/bus/adamnet/fdc.cpp
View File

@ -199,7 +199,7 @@ void adam_fdc_device::adamnet_reset_w(int state)
// data_r -
//-------------------------------------------------
READ8_MEMBER( adam_fdc_device::data_r )
uint8_t adam_fdc_device::data_r(offs_t offset)
{
uint8_t data = m_fdc->data_r();

2
src/devices/bus/adamnet/fdc.h
View File

@ -54,7 +54,7 @@ private:
DECLARE_FLOPPY_FORMATS( floppy_formats );
DECLARE_READ8_MEMBER( data_r );
uint8_t data_r(offs_t offset);
uint8_t p1_r();
void p1_w(uint8_t data);
uint8_t p2_r();

11
src/devices/bus/amiga/zorro/a2065.cpp
View File

@ -96,9 +96,10 @@ void a2065_device::autoconfig_base_address(offs_t address)
write16sm_delegate(*m_lance, FUNC(am7990_device::regs_w)), 0xffff);
// install access to onboard ram (32k)
m_slot->space().install_readwrite_handler(address + 0x8000, address + 0x8000 + 0x7fff,
read16_delegate(*this, FUNC(a2065_device::host_ram_r)),
write16_delegate(*this, FUNC(a2065_device::host_ram_w)), 0xffff);
m_slot->space().install_read_handler(address + 0x8000, address + 0x8000 + 0x7fff,
read16sm_delegate(*this, FUNC(a2065_device::host_ram_r)), 0xffff);
m_slot->space().install_write_handler(address + 0x8000, address + 0x8000 + 0x7fff,
write16s_delegate(*this, FUNC(a2065_device::host_ram_w)), 0xffff);
// we're done
m_slot->cfgout_w(0);
@ -131,13 +132,13 @@ WRITE_LINE_MEMBER( a2065_device::cfgin_w )
}
}
READ16_MEMBER( a2065_device::host_ram_r )
uint16_t a2065_device::host_ram_r(offs_t offset)
{
// logerror("host read offset %04x\n", offset);
return m_ram[offset & 0x3fff];
}
WRITE16_MEMBER( a2065_device::host_ram_w )
void a2065_device::host_ram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
// logerror("host write %04x = %04x\n", offset, data);
COMBINE_DATA(&m_ram[offset]);

4
src/devices/bus/amiga/zorro/a2065.h
View File

@ -32,8 +32,8 @@ public:
// construction/destruction
a2065_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ16_MEMBER( host_ram_r );
DECLARE_WRITE16_MEMBER( host_ram_w );
uint16_t host_ram_r(offs_t offset);
void host_ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t lance_ram_r(offs_t offset);
void lance_ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);

52
src/devices/bus/amiga/zorro/a2232.cpp
View File

@ -157,14 +157,14 @@ void a2232_device::device_reset_after_children()
// IMPLEMENTATION
//**************************************************************************
WRITE8_MEMBER( a2232_device::int2_w )
void a2232_device::int2_w(uint8_t data)
{
LOG("%s: int2_w %04x\n", shortname(), data);
m_slot->int2_w(1);
}
WRITE8_MEMBER( a2232_device::irq_ack8_w )
void a2232_device::irq_ack8_w(uint8_t data)
{
LOG("%s: irq_ack_w %04x\n", shortname(), data);
@ -185,24 +185,24 @@ void a2232_device::autoconfig_base_address(offs_t address)
m_slot->space().unmap_readwrite(0xe80000, 0xe8007f);
m_slot->space().install_readwrite_handler(address, address + 0x3fff,
read16_delegate(*this, FUNC(a2232_device::shared_ram_r)),
write16_delegate(*this, FUNC(a2232_device::shared_ram_w)), 0xffff);
read16s_delegate(*this, FUNC(a2232_device::shared_ram_r)),
write16s_delegate(*this, FUNC(a2232_device::shared_ram_w)), 0xffff);
m_slot->space().install_readwrite_handler(address + 0x4000, address + 0x4001,
read16_delegate(*this, FUNC(a2232_device::irq_ack_r)),
write16_delegate(*this, FUNC(a2232_device::irq_ack_w)), 0xffff);
read16smo_delegate(*this, FUNC(a2232_device::irq_ack_r)),
write16smo_delegate(*this, FUNC(a2232_device::irq_ack_w)), 0xffff);
m_slot->space().install_readwrite_handler(address + 0x8000, address + 0x8001,
read16_delegate(*this, FUNC(a2232_device::reset_low_r)),
write16_delegate(*this, FUNC(a2232_device::reset_low_w)), 0xffff);
read16smo_delegate(*this, FUNC(a2232_device::reset_low_r)),
write16smo_delegate(*this, FUNC(a2232_device::reset_low_w)), 0xffff);
m_slot->space().install_readwrite_handler(address + 0xa000, address + 0xa001,
read16_delegate(*this, FUNC(a2232_device::irq_r)),
write16_delegate(*this, FUNC(a2232_device::irq_w)), 0xffff);
read16smo_delegate(*this, FUNC(a2232_device::irq_r)),
write16smo_delegate(*this, FUNC(a2232_device::irq_w)), 0xffff);
m_slot->space().install_readwrite_handler(address + 0xc000, address + 0xc001,
read16_delegate(*this, FUNC(a2232_device::reset_high_r)),
write16_delegate(*this, FUNC(a2232_device::reset_high_w)), 0xffff);
read16s_delegate(*this, FUNC(a2232_device::reset_high_r)),
write16s_delegate(*this, FUNC(a2232_device::reset_high_w)), 0xffff);
// we're done
m_slot->cfgout_w(0);
@ -240,7 +240,7 @@ WRITE_LINE_MEMBER( a2232_device::cfgin_w )
// ZORRO
//**************************************************************************
READ16_MEMBER( a2232_device::shared_ram_r )
uint16_t a2232_device::shared_ram_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data = 0;
@ -259,7 +259,7 @@ READ16_MEMBER( a2232_device::shared_ram_r )
return data;
}
WRITE16_MEMBER( a2232_device::shared_ram_w )
void a2232_device::shared_ram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
LOGMASKED(LOG_DATA, "%s: shared_ram_w(%04x) %04x [mask = %04x]\n", shortname(), offset << 1, data, mem_mask);
@ -270,31 +270,31 @@ WRITE16_MEMBER( a2232_device::shared_ram_w )
m_shared_ram[offset << 1] = (data & 0xff00) >> 8;
}
READ16_MEMBER( a2232_device::irq_ack_r )
uint16_t a2232_device::irq_ack_r()
{
m_slot->int2_w(0);
return 0xffff;
}
WRITE16_MEMBER( a2232_device::irq_ack_w )
void a2232_device::irq_ack_w(uint16_t data)
{
m_slot->int2_w(0);
}
READ16_MEMBER( a2232_device::reset_low_r )
uint16_t a2232_device::reset_low_r()
{
m_iocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
return 0xffff;
}
WRITE16_MEMBER( a2232_device::reset_low_w )
void a2232_device::reset_low_w(uint16_t data)
{
m_iocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
}
READ16_MEMBER( a2232_device::irq_r )
uint16_t a2232_device::irq_r()
{
if (!machine().side_effects_disabled())
m_ioirq->in_w<8>(ASSERT_LINE);
@ -302,12 +302,12 @@ READ16_MEMBER( a2232_device::irq_r )
return 0xffff;
}
WRITE16_MEMBER( a2232_device::irq_w )
void a2232_device::irq_w(uint16_t data)
{
m_ioirq->in_w<8>(ASSERT_LINE);
}
READ16_MEMBER( a2232_device::reset_high_r )
uint16_t a2232_device::reset_high_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data = 0xffff;
@ -318,7 +318,7 @@ READ16_MEMBER( a2232_device::reset_high_r )
return data;
}
WRITE16_MEMBER( a2232_device::reset_high_w )
void a2232_device::reset_high_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
LOG("%s: reset_high_w %04x [mask = %04x]\n", shortname(), data, mem_mask);
@ -331,13 +331,13 @@ WRITE16_MEMBER( a2232_device::reset_high_w )
//**************************************************************************
template<int N>
READ8_MEMBER( a2232_device::acia_r )
uint8_t a2232_device::acia_r(offs_t offset)
{
return m_acia[N]->read(offset >> 1);
}
template<int N>
WRITE8_MEMBER( a2232_device::acia_w )
void a2232_device::acia_w(offs_t offset, uint8_t data)
{
m_acia[N]->write(offset >> 1, data);
}
@ -347,12 +347,12 @@ WRITE8_MEMBER( a2232_device::acia_w )
// CIA
//**************************************************************************
READ8_MEMBER( a2232_device::cia_r )
uint8_t a2232_device::cia_r(offs_t offset)
{
return m_cia->read(offset >> 1);
}
WRITE8_MEMBER( a2232_device::cia_w )
void a2232_device::cia_w(offs_t offset, uint8_t data)
{
m_cia->write(offset >> 1, data);
}

32
src/devices/bus/amiga/zorro/a2232.h
View File

@ -39,16 +39,16 @@ public:
a2232_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// zorro slot
DECLARE_READ16_MEMBER( shared_ram_r );
DECLARE_WRITE16_MEMBER( shared_ram_w );
DECLARE_READ16_MEMBER( irq_ack_r );
DECLARE_WRITE16_MEMBER( irq_ack_w );
DECLARE_READ16_MEMBER( reset_low_r );
DECLARE_WRITE16_MEMBER( reset_low_w );
DECLARE_READ16_MEMBER( irq_r );
DECLARE_WRITE16_MEMBER( irq_w );
DECLARE_READ16_MEMBER( reset_high_r );
DECLARE_WRITE16_MEMBER( reset_high_w );
uint16_t shared_ram_r(offs_t offset, uint16_t mem_mask = ~0);
void shared_ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t irq_ack_r();
void irq_ack_w(uint16_t data);
uint16_t reset_low_r();
void reset_low_w(uint16_t data);
uint16_t irq_r();
void irq_w(uint16_t data);
uint16_t reset_high_r(offs_t offset, uint16_t mem_mask = ~0);
void reset_high_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void iocpu_map(address_map &map);
@ -65,19 +65,19 @@ protected:
private:
// cpu
WRITE8_MEMBER( int2_w );
WRITE8_MEMBER( irq_ack8_w );
void int2_w(uint8_t data);
void irq_ack8_w(uint8_t data);
// acia
template<int N> DECLARE_READ8_MEMBER( acia_r );
template<int N> DECLARE_WRITE8_MEMBER( acia_w );
template<int N> uint8_t acia_r(offs_t offset);
template<int N> void acia_w(offs_t offset, uint8_t data);
// cia
uint8_t cia_port_a_r();
uint8_t cia_port_b_r();
void cia_port_b_w(uint8_t data);
DECLARE_READ8_MEMBER( cia_r );
DECLARE_WRITE8_MEMBER( cia_w );
uint8_t cia_r(offs_t offset);
void cia_w(offs_t offset, uint8_t data);
// rs232
DECLARE_WRITE_LINE_MEMBER( rs232_1_rxd_w );

26
src/devices/bus/amiga/zorro/buddha.cpp
View File

@ -181,7 +181,7 @@ WRITE_LINE_MEMBER( buddha_device::cfgin_w )
}
}
READ16_MEMBER( buddha_device::speed_r )
uint16_t buddha_device::speed_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data = 0xffff;
@ -191,7 +191,7 @@ READ16_MEMBER( buddha_device::speed_r )
return data;
}
WRITE16_MEMBER( buddha_device::speed_w )
void buddha_device::speed_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
LOG("speed_w %04x [mask = %04x]\n", data, mem_mask);
}
@ -216,7 +216,7 @@ WRITE_LINE_MEMBER( buddha_device::ide_1_interrupt_w )
m_slot->int2_w(state);
}
READ16_MEMBER( buddha_device::ide_0_interrupt_r )
uint16_t buddha_device::ide_0_interrupt_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data;
@ -227,7 +227,7 @@ READ16_MEMBER( buddha_device::ide_0_interrupt_r )
return data;
}
READ16_MEMBER( buddha_device::ide_1_interrupt_r )
uint16_t buddha_device::ide_1_interrupt_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data;
@ -238,7 +238,7 @@ READ16_MEMBER( buddha_device::ide_1_interrupt_r )
return data;
}
WRITE16_MEMBER( buddha_device::ide_interrupt_enable_w )
void buddha_device::ide_interrupt_enable_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
LOG("ide_interrupt_enable_w %04x [mask = %04x]\n", data, mem_mask);
@ -246,7 +246,7 @@ WRITE16_MEMBER( buddha_device::ide_interrupt_enable_w )
m_ide_interrupts_enabled = true;
}
READ16_MEMBER( buddha_device::ide_0_cs0_r )
uint16_t buddha_device::ide_0_cs0_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data = m_ata_0->cs0_r((offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
data = (data << 8) | (data >> 8);
@ -256,7 +256,7 @@ READ16_MEMBER( buddha_device::ide_0_cs0_r )
return data;
}
WRITE16_MEMBER( buddha_device::ide_0_cs0_w )
void buddha_device::ide_0_cs0_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
LOG("ide_0_cs0_w(%04x) %04x [mask = %04x]\n", offset, data, mem_mask);
@ -266,7 +266,7 @@ WRITE16_MEMBER( buddha_device::ide_0_cs0_w )
m_ata_0->cs0_w((offset >> 1) & 0x07, data, mem_mask);
}
READ16_MEMBER( buddha_device::ide_0_cs1_r )
uint16_t buddha_device::ide_0_cs1_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data = m_ata_0->cs1_r((offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
data = (data << 8) | (data >> 8);
@ -276,7 +276,7 @@ READ16_MEMBER( buddha_device::ide_0_cs1_r )
return data;
}
WRITE16_MEMBER( buddha_device::ide_0_cs1_w )
void buddha_device::ide_0_cs1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
LOG("ide_0_cs1_w(%04x) %04x [mask = %04x]\n", offset, data, mem_mask);
@ -286,7 +286,7 @@ WRITE16_MEMBER( buddha_device::ide_0_cs1_w )
m_ata_0->cs1_w((offset >> 1) & 0x07, data, mem_mask);
}
READ16_MEMBER( buddha_device::ide_1_cs0_r )
uint16_t buddha_device::ide_1_cs0_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data = m_ata_1->cs0_r((offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
data = (data << 8) | (data >> 8);
@ -296,7 +296,7 @@ READ16_MEMBER( buddha_device::ide_1_cs0_r )
return data;
}
WRITE16_MEMBER( buddha_device::ide_1_cs0_w )
void buddha_device::ide_1_cs0_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
LOG("ide_1_cs0_w(%04x) %04x [mask = %04x]\n", offset, data, mem_mask);
@ -306,7 +306,7 @@ WRITE16_MEMBER( buddha_device::ide_1_cs0_w )
m_ata_1->cs0_w((offset >> 1) & 0x07, data, mem_mask);
}
READ16_MEMBER( buddha_device::ide_1_cs1_r )
uint16_t buddha_device::ide_1_cs1_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data = m_ata_1->cs1_r((offset >> 1) & 0x07, (mem_mask << 8) | (mem_mask >> 8));
data = (data << 8) | (data >> 8);
@ -316,7 +316,7 @@ READ16_MEMBER( buddha_device::ide_1_cs1_r )
return data;
}
WRITE16_MEMBER( buddha_device::ide_1_cs1_w )
void buddha_device::ide_1_cs1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
LOG("ide_1_cs1_w(%04x) %04x [mask = %04x]\n", offset, data, mem_mask);

26
src/devices/bus/amiga/zorro/buddha.h
View File

@ -48,23 +48,23 @@ protected:
private:
// speed register
DECLARE_READ16_MEMBER( speed_r );
DECLARE_WRITE16_MEMBER( speed_w );
uint16_t speed_r(offs_t offset, uint16_t mem_mask = ~0);
void speed_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
// ide register
DECLARE_READ16_MEMBER( ide_0_cs0_r );
DECLARE_WRITE16_MEMBER( ide_0_cs0_w );
DECLARE_READ16_MEMBER( ide_0_cs1_r );
DECLARE_WRITE16_MEMBER( ide_0_cs1_w );
DECLARE_READ16_MEMBER( ide_1_cs0_r );
DECLARE_WRITE16_MEMBER( ide_1_cs0_w );
DECLARE_READ16_MEMBER( ide_1_cs1_r );
DECLARE_WRITE16_MEMBER( ide_1_cs1_w );
uint16_t ide_0_cs0_r(offs_t offset, uint16_t mem_mask = ~0);
void ide_0_cs0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t ide_0_cs1_r(offs_t offset, uint16_t mem_mask = ~0);
void ide_0_cs1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t ide_1_cs0_r(offs_t offset, uint16_t mem_mask = ~0);
void ide_1_cs0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t ide_1_cs1_r(offs_t offset, uint16_t mem_mask = ~0);
void ide_1_cs1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
// interrupt register
DECLARE_READ16_MEMBER( ide_0_interrupt_r );
DECLARE_READ16_MEMBER( ide_1_interrupt_r );
DECLARE_WRITE16_MEMBER( ide_interrupt_enable_w );
uint16_t ide_0_interrupt_r(offs_t offset, uint16_t mem_mask = ~0);
uint16_t ide_1_interrupt_r(offs_t offset, uint16_t mem_mask = ~0);
void ide_interrupt_enable_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
DECLARE_WRITE_LINE_MEMBER( ide_0_interrupt_w );
DECLARE_WRITE_LINE_MEMBER( ide_1_interrupt_w );

4
src/devices/bus/c64/cpm.cpp
View File

@ -193,7 +193,7 @@ int c64_cpm_cartridge_device::c64_game_r(offs_t offset, int sphi2, int ba, int r
// dma_r -
//-------------------------------------------------
READ8_MEMBER( c64_cpm_cartridge_device::dma_r )
uint8_t c64_cpm_cartridge_device::dma_r(offs_t offset)
{
uint8_t data = 0xff;
@ -212,7 +212,7 @@ READ8_MEMBER( c64_cpm_cartridge_device::dma_r )
// dma_w -
//-------------------------------------------------
WRITE8_MEMBER( c64_cpm_cartridge_device::dma_w )
void c64_cpm_cartridge_device::dma_w(offs_t offset, uint8_t data)
{
if (m_enabled)
{

4
src/devices/bus/c64/cpm.h
View File

@ -51,8 +51,8 @@ private:
int m_reset;
DECLARE_READ8_MEMBER( dma_r );
DECLARE_WRITE8_MEMBER( dma_w );
uint8_t dma_r(offs_t offset);
void dma_w(offs_t offset, uint8_t data);
void z80_io(address_map &map);
void z80_mem(address_map &map);

6
src/devices/bus/c64/fcc.h
View File

@ -58,9 +58,9 @@ private:
int m_hidden;
DECLARE_WRITE_LINE_MEMBER(mainlatch_int) { m_slot->nmi_w(state); }
DECLARE_READ8_MEMBER(rom_r) { return m_romx[offset]; } // cartridge cpu rom
DECLARE_READ8_MEMBER(nvram_r) { return m_nvram[offset & m_nvram.mask()]; }
DECLARE_WRITE8_MEMBER(nvram_w) { m_nvram[offset & m_nvram.mask()] = data; }
uint8_t rom_r(offs_t offset) { return m_romx[offset]; } // cartridge cpu rom
uint8_t nvram_r(offs_t offset) { return m_nvram[offset & m_nvram.mask()]; }
void nvram_w(offs_t offset, uint8_t data) { m_nvram[offset & m_nvram.mask()] = data; }
void c64_fcc_map(address_map &map);
};

8
src/devices/bus/cbmiec/c1541.cpp
View File

@ -634,7 +634,7 @@ const tiny_rom_entry *msd_sd2_device::device_rom_region() const
// read -
//-------------------------------------------------
READ8_MEMBER( c1541_prologic_dos_classic_device::read )
uint8_t c1541_prologic_dos_classic_device::read()
{
return 0;
}
@ -644,7 +644,7 @@ READ8_MEMBER( c1541_prologic_dos_classic_device::read )
// write -
//-------------------------------------------------
WRITE8_MEMBER( c1541_prologic_dos_classic_device::write )
void c1541_prologic_dos_classic_device::write(uint8_t data)
{
}
@ -913,12 +913,12 @@ FLOPPY_FORMATS_MEMBER( c1541_device_base::floppy_formats )
FLOPPY_FORMATS_END
READ8_MEMBER( c1541_prologic_dos_classic_device::pia_r )
uint8_t c1541_prologic_dos_classic_device::pia_r(offs_t offset)
{
return m_pia->read((offset >> 2) & 0x03);
}
WRITE8_MEMBER( c1541_prologic_dos_classic_device::pia_w )
void c1541_prologic_dos_classic_device::pia_w(offs_t offset, uint8_t data)
{
m_pia->write((offset >> 2) & 0x03, data);
}

8
src/devices/bus/cbmiec/c1541.h
View File

@ -264,13 +264,13 @@ private:
required_device<output_latch_device> m_cent_data_out;
required_memory_region m_mmu_rom;
DECLARE_READ8_MEMBER( pia_r );
DECLARE_WRITE8_MEMBER( pia_w );
uint8_t pia_r(offs_t offset);
void pia_w(offs_t offset, uint8_t data);
void pia_pa_w(uint8_t data);
uint8_t pia_pb_r();
void pia_pb_w(uint8_t data);
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
uint8_t read();
void write(uint8_t data);
void c1541pdc_mem(address_map &map);
};

4
src/devices/bus/cbmiec/c1571.cpp
View File

@ -382,7 +382,7 @@ void c1571cr_device::via0_pb_w(uint8_t data)
}
READ8_MEMBER( c1571_device::via1_r )
uint8_t c1571_device::via1_r(offs_t offset)
{
uint8_t data = m_via1->read(offset);
@ -392,7 +392,7 @@ READ8_MEMBER( c1571_device::via1_r )
return data;
}
WRITE8_MEMBER( c1571_device::via1_w )
void c1571_device::via1_w(offs_t offset, uint8_t data)
{
m_via1->write(offset, data);

4
src/devices/bus/cbmiec/c1571.h
View File

@ -49,8 +49,8 @@ public:
uint8_t via0_pb_r();
void via0_pb_w(uint8_t data);
DECLARE_READ8_MEMBER( via1_r );
DECLARE_WRITE8_MEMBER( via1_w );
uint8_t via1_r(offs_t offset);
void via1_w(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( via1_irq_w );
uint8_t via1_pb_r();
void via1_pb_w(uint8_t data);

2
src/devices/bus/cbmiec/cmdhd.cpp
View File

@ -168,7 +168,7 @@ void cmd_hd_device::cbm_iec_reset(int state)
// led_w -
//-------------------------------------------------
WRITE8_MEMBER( cmd_hd_device::led_w )
void cmd_hd_device::led_w(uint8_t data)
{
/*

2
src/devices/bus/cbmiec/cmdhd.h
View File

@ -51,7 +51,7 @@ private:
required_device<m6502_device> m_maincpu;
required_device<scsi_port_device> m_scsibus;
DECLARE_WRITE8_MEMBER( led_w );
void led_w(uint8_t data);
void mem_map(address_map &map);
};

12
src/devices/bus/cbus/pc9801_118.cpp
View File

@ -114,7 +114,7 @@ void pc9801_118_device::device_validity_check(validity_checker &valid) const
void pc9801_118_device::device_start()
{
m_bus->install_io(0xa460, 0xa463, read8_delegate(*this, FUNC(pc9801_118_device::id_r)), write8_delegate(*this, FUNC(pc9801_118_device::ext_w)));
m_bus->install_io(0xa460, 0xa463, read8sm_delegate(*this, FUNC(pc9801_118_device::id_r)), write8sm_delegate(*this, FUNC(pc9801_118_device::ext_w)));
save_item(NAME(m_ext_reg));
}
@ -128,7 +128,7 @@ void pc9801_118_device::device_reset()
{
uint16_t port_base = (ioport("OPN3_DSW")->read() & 1) << 8;
m_bus->io_space().unmap_readwrite(0x0088, 0x008b, 0x100);
m_bus->install_io(port_base + 0x0088, port_base + 0x008f, read8_delegate(*this, FUNC(pc9801_118_device::opn3_r)), write8_delegate(*this, FUNC(pc9801_118_device::opn3_w)));
m_bus->install_io(port_base + 0x0088, port_base + 0x008f, read8sm_delegate(*this, FUNC(pc9801_118_device::opn3_r)), write8sm_delegate(*this, FUNC(pc9801_118_device::opn3_w)));
m_ext_reg = 1; // TODO: enabled or disabled?
}
@ -138,7 +138,7 @@ void pc9801_118_device::device_reset()
//**************************************************************************
READ8_MEMBER(pc9801_118_device::opn3_r)
uint8_t pc9801_118_device::opn3_r(offs_t offset)
{
if(((offset & 5) == 0) || m_ext_reg)
return m_opn3->read(offset >> 1);
@ -150,7 +150,7 @@ READ8_MEMBER(pc9801_118_device::opn3_r)
}
WRITE8_MEMBER(pc9801_118_device::opn3_w)
void pc9801_118_device::opn3_w(offs_t offset, uint8_t data)
{
if(((offset & 5) == 0) || m_ext_reg)
m_opn3->write(offset >> 1,data);
@ -158,7 +158,7 @@ WRITE8_MEMBER(pc9801_118_device::opn3_w)
// printf("PC9801-118: Write to undefined port [%02x] %02x\n",offset+0x188,data);
}
READ8_MEMBER( pc9801_118_device::id_r )
uint8_t pc9801_118_device::id_r(offs_t offset)
{
if(offset == 0)
{
@ -170,7 +170,7 @@ READ8_MEMBER( pc9801_118_device::id_r )
return 0xff;
}
WRITE8_MEMBER( pc9801_118_device::ext_w )
void pc9801_118_device::ext_w(offs_t offset, uint8_t data)
{
if(offset == 0)
{

8
src/devices/bus/cbus/pc9801_118.h
View File

@ -28,10 +28,10 @@ public:
// construction/destruction
pc9801_118_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(opn3_r);
DECLARE_WRITE8_MEMBER(opn3_w);
DECLARE_READ8_MEMBER(id_r);
DECLARE_WRITE8_MEMBER(ext_w);
uint8_t opn3_r(offs_t offset);
void opn3_w(offs_t offset, uint8_t data);
uint8_t id_r(offs_t offset);
void ext_w(offs_t offset, uint8_t data);
protected:
// device-level overrides

6
src/devices/bus/cbus/pc9801_26.cpp
View File

@ -133,7 +133,7 @@ void pc9801_26_device::device_reset()
uint16_t port_base = (ioport("OPN_DSW")->read() & 1) << 8;
m_bus->io_space().unmap_readwrite(0x0088, 0x008b, 0x100);
m_bus->install_io(port_base + 0x0088, port_base + 0x008b, read8_delegate(*this, FUNC(pc9801_26_device::opn_r)), write8_delegate(*this, FUNC(pc9801_26_device::opn_w)));
m_bus->install_io(port_base + 0x0088, port_base + 0x008b, read8sm_delegate(*this, FUNC(pc9801_26_device::opn_r)), write8sm_delegate(*this, FUNC(pc9801_26_device::opn_w)));
}
@ -142,7 +142,7 @@ void pc9801_26_device::device_reset()
//**************************************************************************
// TODO: leftover mirrors? Doesn't match to what installs above
READ8_MEMBER(pc9801_26_device::opn_r)
uint8_t pc9801_26_device::opn_r(offs_t offset)
{
if((offset & 1) == 0)
{
@ -156,7 +156,7 @@ READ8_MEMBER(pc9801_26_device::opn_r)
}
WRITE8_MEMBER(pc9801_26_device::opn_w)
void pc9801_26_device::opn_w(offs_t offset, uint8_t data)
{
if((offset & 5) == 0)
m_opn->write(offset >> 1, data);

4
src/devices/bus/cbus/pc9801_26.h
View File

@ -27,8 +27,8 @@ public:
// construction/destruction
pc9801_26_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(opn_r);
DECLARE_WRITE8_MEMBER(opn_w);
uint8_t opn_r(offs_t offset);
void opn_w(offs_t offset, uint8_t data);
protected:
// device-level overrides

28
src/devices/bus/cbus/pc9801_86.cpp
View File

@ -169,10 +169,10 @@ void pc9801_86_device::device_validity_check(validity_checker &valid) const
void pc9801_86_device::device_start()
{
m_bus->program_space().install_rom(0xcc000,0xcffff,memregion(this->subtag("sound_bios").c_str())->base());
m_bus->install_io(0xa460, 0xa463, read8_delegate(*this, FUNC(pc9801_86_device::id_r)), write8_delegate(*this, FUNC(pc9801_86_device::mask_w)));
m_bus->install_io(0xa464, 0xa46f, read8_delegate(*this, FUNC(pc9801_86_device::pcm_r)), write8_delegate(*this, FUNC(pc9801_86_device::pcm_w)));
m_bus->install_io(0xa66c, 0xa66f, read8_delegate(*this, [this](address_space &s, offs_t o, u8 mm){ return o == 2 ? m_pcm_mute : 0xff; }, "pc9801_86_mute_r"),
write8_delegate(*this, [this](address_space &s, offs_t o, u8 d, u8 mm){ if(o == 2) m_pcm_mute = d; }, "pc9801_86_mute_w"));
m_bus->install_io(0xa460, 0xa463, read8smo_delegate(*this, FUNC(pc9801_86_device::id_r)), write8smo_delegate(*this, FUNC(pc9801_86_device::mask_w)));
m_bus->install_io(0xa464, 0xa46f, read8sm_delegate(*this, FUNC(pc9801_86_device::pcm_r)), write8sm_delegate(*this, FUNC(pc9801_86_device::pcm_w)));
m_bus->install_io(0xa66c, 0xa66f, read8sm_delegate(*this, [this](offs_t o){ return o == 2 ? m_pcm_mute : 0xff; }, "pc9801_86_mute_r"),
write8sm_delegate(*this, [this](offs_t o, u8 d){ if(o == 2) m_pcm_mute = d; }, "pc9801_86_mute_w"));
m_dac_timer = timer_alloc();
save_item(NAME(m_count));
@ -189,7 +189,7 @@ void pc9801_86_device::device_reset()
{
uint16_t port_base = (ioport("OPNA_DSW")->read() & 1) << 8;
m_bus->io_space().unmap_readwrite(0x0088, 0x008f, 0x100);
m_bus->install_io(port_base + 0x0088, port_base + 0x008f, read8_delegate(*this, FUNC(pc9801_86_device::opna_r)), write8_delegate(*this, FUNC(pc9801_86_device::opna_w)));
m_bus->install_io(port_base + 0x0088, port_base + 0x008f, read8sm_delegate(*this, FUNC(pc9801_86_device::opna_r)), write8sm_delegate(*this, FUNC(pc9801_86_device::opna_w)));
m_mask = 0;
m_head = m_tail = m_count = 0;
@ -207,7 +207,7 @@ void pc9801_86_device::device_reset()
//**************************************************************************
READ8_MEMBER(pc9801_86_device::opna_r)
uint8_t pc9801_86_device::opna_r(offs_t offset)
{
if((offset & 1) == 0)
return m_opna->read(offset >> 1);
@ -218,7 +218,7 @@ READ8_MEMBER(pc9801_86_device::opna_r)
}
}
WRITE8_MEMBER(pc9801_86_device::opna_w)
void pc9801_86_device::opna_w(offs_t offset, uint8_t data)
{
if((offset & 1) == 0)
m_opna->write(offset >> 1,data);
@ -226,17 +226,17 @@ WRITE8_MEMBER(pc9801_86_device::opna_w)
logerror("PC9801-86: Write to undefined port [%02x] %02x\n",offset+0x188,data);
}
READ8_MEMBER(pc9801_86_device::id_r)
uint8_t pc9801_86_device::id_r()
{
return 0x40 | m_mask;
}
WRITE8_MEMBER(pc9801_86_device::mask_w)
void pc9801_86_device::mask_w(uint8_t data)
{
m_mask = data & 1;
}
READ8_MEMBER(pc9801_86_device::pcm_r)
uint8_t pc9801_86_device::pcm_r(offs_t offset)
{
if((offset & 1) == 0)
{
@ -258,7 +258,7 @@ READ8_MEMBER(pc9801_86_device::pcm_r)
return 0xff;
}
WRITE8_MEMBER(pc9801_86_device::pcm_w)
void pc9801_86_device::pcm_w(offs_t offset, uint8_t data)
{
const u32 rate = (25.4_MHz_XTAL).value() / 16;
const int divs[8] = {36, 48, 72, 96, 144, 192, 288, 384};
@ -421,7 +421,7 @@ void pc9801_speakboard_device::device_start()
{
pc9801_86_device::device_start();
m_bus->install_io(0x0588, 0x058f, read8_delegate(*this, FUNC(pc9801_speakboard_device::opna_slave_r)), write8_delegate(*this, FUNC(pc9801_speakboard_device::opna_slave_w)));
m_bus->install_io(0x0588, 0x058f, read8sm_delegate(*this, FUNC(pc9801_speakboard_device::opna_slave_r)), write8sm_delegate(*this, FUNC(pc9801_speakboard_device::opna_slave_w)));
}
void pc9801_speakboard_device::device_reset()
@ -429,7 +429,7 @@ void pc9801_speakboard_device::device_reset()
pc9801_86_device::device_reset();
}
READ8_MEMBER(pc9801_speakboard_device::opna_slave_r)
uint8_t pc9801_speakboard_device::opna_slave_r(offs_t offset)
{
if((offset & 1) == 0)
return m_opna_slave->read(offset >> 1);
@ -440,7 +440,7 @@ READ8_MEMBER(pc9801_speakboard_device::opna_slave_r)
}
}
WRITE8_MEMBER(pc9801_speakboard_device::opna_slave_w)
void pc9801_speakboard_device::opna_slave_w(offs_t offset, uint8_t data)
{
if((offset & 1) == 0)
m_opna_slave->write(offset >> 1,data);

16
src/devices/bus/cbus/pc9801_86.h
View File

@ -29,12 +29,12 @@ public:
pc9801_86_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
pc9801_86_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(opna_r);
DECLARE_WRITE8_MEMBER(opna_w);
DECLARE_READ8_MEMBER(id_r);
DECLARE_WRITE8_MEMBER(mask_w);
DECLARE_READ8_MEMBER(pcm_r);
DECLARE_WRITE8_MEMBER(pcm_w);
uint8_t opna_r(offs_t offset);
void opna_w(offs_t offset, uint8_t data);
uint8_t id_r();
void mask_w(uint8_t data);
uint8_t pcm_r(offs_t offset);
void pcm_w(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER(sound_irq);
@ -73,8 +73,8 @@ public:
// construction/destruction
pc9801_speakboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER(opna_slave_r);
DECLARE_WRITE8_MEMBER(opna_slave_w);
uint8_t opna_slave_r(offs_t offset);
void opna_slave_w(offs_t offset, uint8_t data);
protected:
virtual void device_add_mconfig(machine_config &config) override;

8
src/devices/bus/cbus/pc9801_amd98.cpp
View File

@ -134,9 +134,9 @@ void pc9801_amd98_device::device_start()
void pc9801_amd98_device::device_reset()
{
m_bus->install_io(0x00d8, 0x00df, read8_delegate(*this, FUNC(pc9801_amd98_device::read)), write8_delegate(*this, FUNC(pc9801_amd98_device::write)));
m_bus->install_io(0x00d8, 0x00df, read8sm_delegate(*this, FUNC(pc9801_amd98_device::read)), write8sm_delegate(*this, FUNC(pc9801_amd98_device::write)));
// Thexder access with following
m_bus->install_io(0x38d8, 0x38df, read8_delegate(*this, FUNC(pc9801_amd98_device::read)), write8_delegate(*this, FUNC(pc9801_amd98_device::write)));
m_bus->install_io(0x38d8, 0x38df, read8sm_delegate(*this, FUNC(pc9801_amd98_device::read)), write8sm_delegate(*this, FUNC(pc9801_amd98_device::write)));
}
@ -144,7 +144,7 @@ void pc9801_amd98_device::device_reset()
// READ/WRITE HANDLERS
//**************************************************************************
READ8_MEMBER(pc9801_amd98_device::read)
uint8_t pc9801_amd98_device::read(offs_t offset)
{
switch(offset)
{
@ -159,7 +159,7 @@ READ8_MEMBER(pc9801_amd98_device::read)
return 0xff;
}
WRITE8_MEMBER(pc9801_amd98_device::write)
void pc9801_amd98_device::write(offs_t offset, uint8_t data)
{
switch(offset)
{

4
src/devices/bus/cbus/pc9801_amd98.h
View File

@ -29,8 +29,8 @@ public:
static constexpr feature_type imperfect_features() { return feature::SOUND; }
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE8_MEMBER(write);
uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data);
protected:
// device-level overrides

7
src/devices/bus/cbus/pc9801_cbus.cpp
View File

@ -95,7 +95,7 @@ void pc9801_slot_device::device_start()
// m_card = dynamic_cast<device_pc9801_slot_card_interface *>(get_card_device());
}
void pc9801_slot_device::install_io(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler)
template<typename R, typename W> void pc9801_slot_device::install_io(offs_t start, offs_t end, R rhandler, W whandler)
{
int buswidth = m_iospace->data_width();
switch(buswidth)
@ -113,3 +113,8 @@ void pc9801_slot_device::install_io(offs_t start, offs_t end, read8_delegate rha
fatalerror("PC-9801-26: Bus width %d not supported\n", buswidth);
}
}
template void pc9801_slot_device::install_io<read8_delegate, write8_delegate >(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
template void pc9801_slot_device::install_io<read8s_delegate, write8s_delegate >(offs_t start, offs_t end, read8s_delegate rhandler, write8s_delegate whandler);
template void pc9801_slot_device::install_io<read8sm_delegate, write8sm_delegate >(offs_t start, offs_t end, read8sm_delegate rhandler, write8sm_delegate whandler);
template void pc9801_slot_device::install_io<read8smo_delegate, write8smo_delegate>(offs_t start, offs_t end, read8smo_delegate rhandler, write8smo_delegate whandler);

2
src/devices/bus/cbus/pc9801_cbus.h
View File

@ -111,7 +111,7 @@ public:
address_space &program_space() const { return *m_memspace; }
address_space &io_space() const { return *m_iospace; }
template<int I> void int_w(bool state) { m_int_callback[I](state); }
void install_io(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler);
template<typename R, typename W> void install_io(offs_t start, offs_t end, R rhandler, W whandler);
protected:
// device-level overrides

8
src/devices/bus/centronics/comxpl80.cpp
View File

@ -153,7 +153,7 @@ void comx_pl80_device::device_reset()
// pa_w -
//-------------------------------------------------
WRITE8_MEMBER( comx_pl80_device::pa_w )
void comx_pl80_device::pa_w(uint8_t data)
{
/*
@ -205,7 +205,7 @@ WRITE8_MEMBER( comx_pl80_device::pa_w )
// pb_w -
//-------------------------------------------------
WRITE8_MEMBER( comx_pl80_device::pb_w )
void comx_pl80_device::pb_w(uint8_t data)
{
/*
@ -232,7 +232,7 @@ WRITE8_MEMBER( comx_pl80_device::pb_w )
// pc_w -
//-------------------------------------------------
WRITE8_MEMBER( comx_pl80_device::pc_w )
void comx_pl80_device::pc_w(uint8_t data)
{
/*
@ -262,7 +262,7 @@ WRITE8_MEMBER( comx_pl80_device::pc_w )
// pd_r -
//-------------------------------------------------
READ8_MEMBER( comx_pl80_device::pd_r )
uint8_t comx_pl80_device::pd_r()
{
/*

8
src/devices/bus/centronics/comxpl80.h
View File

@ -63,10 +63,10 @@ private:
uint8_t m_data;
DECLARE_WRITE8_MEMBER( pa_w );
DECLARE_WRITE8_MEMBER( pb_w );
DECLARE_WRITE8_MEMBER( pc_w );
DECLARE_READ8_MEMBER( pd_r );
void pa_w(uint8_t data);
void pb_w(uint8_t data);
void pc_w(uint8_t data);
uint8_t pd_r();
};

16
src/devices/bus/centronics/epson_ex800.cpp
View File

@ -435,46 +435,46 @@ void epson_ex800_device::portc_w(uint8_t data)
/* Memory mapped I/O access */
READ8_MEMBER(epson_ex800_device::devsel_r)
uint8_t epson_ex800_device::devsel_r(offs_t offset)
{
logerror("DEVSEL R %s with offset %x\n", machine().describe_context(), offset);
return machine().rand();
}
WRITE8_MEMBER(epson_ex800_device::devsel_w)
void epson_ex800_device::devsel_w(offs_t offset, uint8_t data)
{
logerror("DEVSEL W %x %s with offset %x\n", data, machine().describe_context(), offset);
}
READ8_MEMBER(epson_ex800_device::gate5a_r)
uint8_t epson_ex800_device::gate5a_r(offs_t offset)
{
logerror("GATE5A R %s with offset %x\n", machine().describe_context(), offset);
return machine().rand();
}
WRITE8_MEMBER(epson_ex800_device::gate5a_w)
void epson_ex800_device::gate5a_w(offs_t offset, uint8_t data)
{
logerror("GATE5A W %x %s with offset %x\n", data, machine().describe_context(), offset);
}
READ8_MEMBER(epson_ex800_device::iosel_r)
uint8_t epson_ex800_device::iosel_r(offs_t offset)
{
logerror("IOSEL R %s with offset %x\n", machine().describe_context(), offset);
return machine().rand();
}
WRITE8_MEMBER(epson_ex800_device::iosel_w)
void epson_ex800_device::iosel_w(offs_t offset, uint8_t data)
{
logerror("IOSEL W %x %s with offset %x\n", data, machine().describe_context(), offset);
}
READ8_MEMBER(epson_ex800_device::gate7a_r)
uint8_t epson_ex800_device::gate7a_r(offs_t offset)
{
logerror("GATE7A R %s with offset %x\n", machine().describe_context(), offset);
return machine().rand();
}
WRITE8_MEMBER(epson_ex800_device::gate7a_w)
void epson_ex800_device::gate7a_w(offs_t offset, uint8_t data)
{
logerror("GATE7A W %x %s with offset %x\n", data, machine().describe_context(), offset);
}

16
src/devices/bus/centronics/epson_ex800.h
View File

@ -48,14 +48,14 @@ private:
void porta_w(uint8_t data);
void portb_w(uint8_t data);
void portc_w(uint8_t data);
DECLARE_READ8_MEMBER(devsel_r);
DECLARE_WRITE8_MEMBER(devsel_w);
DECLARE_READ8_MEMBER(gate5a_r);
DECLARE_WRITE8_MEMBER(gate5a_w);
DECLARE_READ8_MEMBER(iosel_r);
DECLARE_WRITE8_MEMBER(iosel_w);
DECLARE_READ8_MEMBER(gate7a_r);
DECLARE_WRITE8_MEMBER(gate7a_w);
uint8_t devsel_r(offs_t offset);
void devsel_w(offs_t offset, uint8_t data);
uint8_t gate5a_r(offs_t offset);
void gate5a_w(offs_t offset, uint8_t data);
uint8_t iosel_r(offs_t offset);
void iosel_w(offs_t offset, uint8_t data);
uint8_t gate7a_r(offs_t offset);
void gate7a_w(offs_t offset, uint8_t data);
void ex800_mem(address_map &map);

4
src/devices/bus/centronics/epson_lx810l.cpp
View File

@ -347,12 +347,12 @@ void epson_lx810l_device::device_timer(emu_timer &timer, device_timer_id id, int
FAKEMEM READ/WRITE
***************************************************************************/
READ8_MEMBER(epson_lx810l_device::fakemem_r)
uint8_t epson_lx810l_device::fakemem_r()
{
return m_fakemem;
}
WRITE8_MEMBER(epson_lx810l_device::fakemem_w)
void epson_lx810l_device::fakemem_w(uint8_t data)
{
m_fakemem = data;
}

4
src/devices/bus/centronics/epson_lx810l.h
View File

@ -77,8 +77,8 @@ private:
void portc_w(offs_t offset, uint8_t data);
/* fake memory I/O to get past memory reset check */
DECLARE_READ8_MEMBER(fakemem_r);
DECLARE_WRITE8_MEMBER(fakemem_w);
uint8_t fakemem_r();
void fakemem_w(uint8_t data);
/* Extended Timer Output */
DECLARE_WRITE_LINE_MEMBER(co0_w);

1
src/devices/bus/coleco/controller/ctrl.h
View File

@ -64,7 +64,6 @@ public:
// computer interface
uint8_t read() { uint8_t data = 0xff; if (exists()) data = m_device->joy_r(); return data; }
DECLARE_READ8_MEMBER( read ) { return read(); }
DECLARE_WRITE_LINE_MEMBER( common0_w ) { if (exists()) m_device->common0_w(state); }
DECLARE_WRITE_LINE_MEMBER( common1_w ) { if (exists()) m_device->common1_w(state); }

8
src/devices/bus/dmv/k230.cpp
View File

@ -147,7 +147,7 @@ void dmv_k230_device::device_start()
void dmv_k234_device::device_start()
{
dmv_k230_device::device_start();
iospace().install_readwrite_handler(0xd8, 0xdf, read8_delegate(*this, FUNC(dmv_k234_device::snr_r)), write8_delegate(*this, FUNC(dmv_k234_device::snr_w)), 0);
iospace().install_readwrite_handler(0xd8, 0xdf, read8smo_delegate(*this, FUNC(dmv_k234_device::snr_r)), write8smo_delegate(*this, FUNC(dmv_k234_device::snr_w)), 0);
// register for state saving
save_item(NAME(m_snr));
@ -247,7 +247,7 @@ void dmv_k230_device::switch16_w(int state)
m_maincpu->set_input_line(INPUT_LINE_HALT, (m_hold || !m_switch16) ? ASSERT_LINE : CLEAR_LINE);
}
READ8_MEMBER(dmv_k230_device::rom_r)
uint8_t dmv_k230_device::rom_r(offs_t offset)
{
return m_rom->base()[offset & 0x0fff];
}
@ -289,7 +289,7 @@ void dmv_k234_device::switch16_w(int state)
}
}
READ8_MEMBER( dmv_k234_device::snr_r )
uint8_t dmv_k234_device::snr_r()
{
m_snr = ASSERT_LINE;
m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
@ -299,7 +299,7 @@ READ8_MEMBER( dmv_k234_device::snr_r )
return 0xff;
}
WRITE8_MEMBER( dmv_k234_device::snr_w )
void dmv_k234_device::snr_w(uint8_t data)
{
m_snr = ASSERT_LINE;
m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);

6
src/devices/bus/dmv/k230.h
View File

@ -61,7 +61,7 @@ protected:
void program_w(offs_t offset, uint8_t data);
private:
DECLARE_READ8_MEMBER(rom_r);
uint8_t rom_r(offs_t offset);
};
@ -104,8 +104,8 @@ protected:
private:
int m_snr;
DECLARE_READ8_MEMBER(snr_r);
DECLARE_WRITE8_MEMBER(snr_w);
uint8_t snr_r();
void snr_w(uint8_t data);
void k234_mem(address_map &map);
};

6
src/devices/bus/ep64/exdos.cpp
View File

@ -145,7 +145,7 @@ void ep64_exdos_device::device_start()
m_slot->program().install_rom(0x080000, 0x087fff, m_rom->base());
m_slot->io().install_readwrite_handler(0x10, 0x13, 0, 0x04, 0, read8sm_delegate(*m_fdc, FUNC(wd_fdc_device_base::read)), write8sm_delegate(*m_fdc, FUNC(wd_fdc_device_base::write)));
m_slot->io().install_readwrite_handler(0x18, 0x18, 0, 0x04, 0, read8_delegate(*this, FUNC(ep64_exdos_device::read)), write8_delegate(*this, FUNC(ep64_exdos_device::write)));
m_slot->io().install_readwrite_handler(0x18, 0x18, 0, 0x04, 0, read8smo_delegate(*this, FUNC(ep64_exdos_device::read)), write8smo_delegate(*this, FUNC(ep64_exdos_device::write)));
}
@ -167,7 +167,7 @@ void ep64_exdos_device::device_reset()
// read -
//-------------------------------------------------
READ8_MEMBER( ep64_exdos_device::read )
uint8_t ep64_exdos_device::read()
{
/*
@ -199,7 +199,7 @@ READ8_MEMBER( ep64_exdos_device::read )
// write -
//-------------------------------------------------
WRITE8_MEMBER( ep64_exdos_device::write )
void ep64_exdos_device::write(uint8_t data)
{
/*

4
src/devices/bus/ep64/exdos.h
View File

@ -31,8 +31,8 @@ public:
// construction/destruction
ep64_exdos_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
uint8_t read();
void write(uint8_t data);
protected:
// device-level overrides

6
src/devices/bus/epson_sio/pf10.cpp
View File

@ -164,18 +164,18 @@ void epson_pf10_device::port2_w(uint8_t data)
logerror("%s: port2_w(%02x)\n", tag(), data);
}
READ8_MEMBER( epson_pf10_device::fdc_r )
uint8_t epson_pf10_device::fdc_r(offs_t offset)
{
logerror("%s: fdc_r @ %04x\n", tag(), offset);
return 0xff;
}
WRITE8_MEMBER( epson_pf10_device::fdc_w )
void epson_pf10_device::fdc_w(offs_t offset, uint8_t data)
{
logerror("%s: fdc_w @ %04x (%02x)\n", tag(), offset, data);
}
WRITE8_MEMBER( epson_pf10_device::fdc_tc_w )
void epson_pf10_device::fdc_tc_w(uint8_t data)
{
logerror("%s: fdc_tc_w(%02x)\n", tag(), data);
}

6
src/devices/bus/epson_sio/pf10.h
View File

@ -53,9 +53,9 @@ private:
DECLARE_WRITE_LINE_MEMBER( pinc_w );
// floppy disk controller
DECLARE_READ8_MEMBER( fdc_r );
DECLARE_WRITE8_MEMBER( fdc_w );
DECLARE_WRITE8_MEMBER( fdc_tc_w );
uint8_t fdc_r(offs_t offset);
void fdc_w(offs_t offset, uint8_t data);
void fdc_tc_w(uint8_t data);
// hd6303 i/o
uint8_t port1_r();

6
src/devices/bus/epson_sio/tf20.cpp
View File

@ -215,7 +215,7 @@ IRQ_CALLBACK_MEMBER( epson_tf20_device::irq_callback )
}
// a read from this location disables the rom
READ8_MEMBER( epson_tf20_device::rom_disable_r )
uint8_t epson_tf20_device::rom_disable_r()
{
// switch in ram
m_cpu->space(AS_PROGRAM).install_ram(0x0000, 0x7fff, m_ram->pointer());
@ -231,7 +231,7 @@ READ8_MEMBER( epson_tf20_device::rom_disable_r )
// fdc interrupt
//-------------------------------------------------
READ8_MEMBER( epson_tf20_device::upd765_tc_r )
uint8_t epson_tf20_device::upd765_tc_r()
{
logerror("%s: upd765_tc_r\n", machine().describe_context());
@ -242,7 +242,7 @@ READ8_MEMBER( epson_tf20_device::upd765_tc_r )
return 0xff;
}
WRITE8_MEMBER( epson_tf20_device::fdc_control_w )
void epson_tf20_device::fdc_control_w(uint8_t data)
{
logerror("%s: tf20_fdc_control_w(%02x)\n", machine().describe_context(), data);

6
src/devices/bus/epson_sio/tf20.h
View File

@ -56,9 +56,9 @@ private:
DECLARE_WRITE_LINE_MEMBER( rxc_w );
DECLARE_WRITE_LINE_MEMBER( pinc_w );
DECLARE_READ8_MEMBER( rom_disable_r );
DECLARE_READ8_MEMBER( upd765_tc_r );
DECLARE_WRITE8_MEMBER( fdc_control_w );
uint8_t rom_disable_r();
uint8_t upd765_tc_r();
void fdc_control_w(uint8_t data);
void cpu_io(address_map &map);
void cpu_mem(address_map &map);

20
src/devices/bus/gba/gba_slot.cpp
View File

@ -901,26 +901,26 @@ std::string gba_cart_slot_device::get_default_card_software(get_default_card_sof
read
-------------------------------------------------*/
READ32_MEMBER(gba_cart_slot_device::read_rom)
uint32_t gba_cart_slot_device::read_rom(offs_t offset)
{
if (m_cart)
return m_cart->read_rom(space, offset, mem_mask);
return m_cart->read_rom(offset);
else
return 0xffffffff;
}
READ32_MEMBER(gba_cart_slot_device::read_ram)
uint32_t gba_cart_slot_device::read_ram(offs_t offset, uint32_t mem_mask)
{
if (m_cart)
return m_cart->read_ram(space, offset, mem_mask);
return m_cart->read_ram(offset, mem_mask);
else
return 0xffffffff;
}
READ32_MEMBER(gba_cart_slot_device::read_gpio)
uint32_t gba_cart_slot_device::read_gpio(offs_t offset, uint32_t mem_mask)
{
if (m_cart)
return m_cart->read_gpio(space, offset, mem_mask);
return m_cart->read_gpio(offset, mem_mask);
else
return 0xffffffff;
}
@ -930,14 +930,14 @@ READ32_MEMBER(gba_cart_slot_device::read_gpio)
write
-------------------------------------------------*/
WRITE32_MEMBER(gba_cart_slot_device::write_ram)
void gba_cart_slot_device::write_ram(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (m_cart)
m_cart->write_ram(space, offset, data, mem_mask);
m_cart->write_ram(offset, data, mem_mask);
}
WRITE32_MEMBER(gba_cart_slot_device::write_gpio)
void gba_cart_slot_device::write_gpio(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (m_cart)
m_cart->write_gpio(space, offset, data, mem_mask);
m_cart->write_gpio(offset, data, mem_mask);
}

32
src/devices/bus/gba/gba_slot.h
View File

@ -43,14 +43,14 @@ public:
virtual ~device_gba_cart_interface();
// reading and writing
virtual DECLARE_READ32_MEMBER(read_rom) { return 0xffffffff; }
virtual DECLARE_READ32_MEMBER(read_ram) { return 0xffffffff; }
virtual DECLARE_READ32_MEMBER(read_gpio) { return 0; }
virtual DECLARE_READ32_MEMBER(read_tilt) { return 0xffffffff; }
virtual DECLARE_WRITE32_MEMBER(write_ram) { }
virtual DECLARE_WRITE32_MEMBER(write_gpio) { }
virtual DECLARE_WRITE32_MEMBER(write_tilt) { }
virtual DECLARE_WRITE32_MEMBER(write_mapper) { }
virtual uint32_t read_rom(offs_t offset) { return 0xffffffff; }
virtual uint32_t read_ram(offs_t offset, uint32_t mem_mask = ~0) { return 0xffffffff; }
virtual uint32_t read_gpio(offs_t offset, uint32_t mem_mask = ~0) { return 0; }
virtual uint32_t read_tilt(offs_t offset, uint32_t mem_mask = ~0) { return 0xffffffff; }
virtual void write_ram(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { }
virtual void write_gpio(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) { }
virtual void write_tilt(offs_t offset, uint32_t data) { }
virtual void write_mapper(offs_t offset, uint32_t data) { }
void rom_alloc(uint32_t size, const char *tag);
void nvram_alloc(uint32_t size);
@ -120,14 +120,14 @@ public:
uint32_t get_rom_size() { if (m_cart) return m_cart->get_rom_size(); return 0; }
// reading and writing
virtual DECLARE_READ32_MEMBER(read_rom);
virtual DECLARE_READ32_MEMBER(read_ram);
virtual DECLARE_READ32_MEMBER(read_gpio);
virtual DECLARE_READ32_MEMBER(read_tilt) { if (m_cart) return m_cart->read_tilt(space, offset, mem_mask); else return 0xffffffff; }
virtual DECLARE_WRITE32_MEMBER(write_ram);
virtual DECLARE_WRITE32_MEMBER(write_gpio);
virtual DECLARE_WRITE32_MEMBER(write_tilt) { if (m_cart) m_cart->write_tilt(space, offset, data, mem_mask); }
virtual DECLARE_WRITE32_MEMBER(write_mapper) { if (m_cart) m_cart->write_mapper(space, offset, data, mem_mask); }
virtual uint32_t read_rom(offs_t offset);
virtual uint32_t read_ram(offs_t offset, uint32_t mem_mask = ~0);
virtual uint32_t read_gpio(offs_t offset, uint32_t mem_mask = ~0);
virtual uint32_t read_tilt(offs_t offset, uint32_t mem_mask = ~0) { if (m_cart) return m_cart->read_tilt(offset); else return 0xffffffff; }
virtual void write_ram(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
virtual void write_gpio(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
virtual void write_tilt(offs_t offset, uint32_t data) { if (m_cart) m_cart->write_tilt(offset, data); }
virtual void write_mapper(offs_t offset, uint32_t data) { if (m_cart) m_cart->write_mapper(offset, data); }
protected:
// device-level overrides

30
src/devices/bus/gba/rom.cpp
View File

@ -286,7 +286,7 @@ void gba_rom_3dmatrix_device::device_reset()
cart types.
-------------------------------------------------*/
READ32_MEMBER(gba_rom_device::read_gpio)
uint32_t gba_rom_device::read_gpio(offs_t offset, uint32_t mem_mask)
{
if (!m_gpio_write_only)
{
@ -313,7 +313,7 @@ READ32_MEMBER(gba_rom_device::read_gpio)
return m_rom[offset + 0xc4/4];
}
WRITE32_MEMBER(gba_rom_device::write_gpio)
void gba_rom_device::write_gpio(offs_t offset, uint32_t data, uint32_t mem_mask)
{
switch (offset)
{
@ -346,7 +346,7 @@ WRITE32_MEMBER(gba_rom_device::write_gpio)
Carts with SRAM
-------------------------------------------------*/
READ32_MEMBER(gba_rom_sram_device::read_ram)
uint32_t gba_rom_sram_device::read_ram(offs_t offset, uint32_t mem_mask)
{
if (!m_nvram.empty() && offset < m_nvram.size())
return m_nvram[offset];
@ -354,7 +354,7 @@ READ32_MEMBER(gba_rom_sram_device::read_ram)
return 0xffffffff;
}
WRITE32_MEMBER(gba_rom_sram_device::write_ram)
void gba_rom_sram_device::write_ram(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (!m_nvram.empty() && offset < m_nvram.size())
COMBINE_DATA(&m_nvram[offset]);
@ -425,7 +425,7 @@ void gba_rom_flash_device::device_add_mconfig(machine_config &config)
}
READ32_MEMBER(gba_rom_flash_device::read_ram)
uint32_t gba_rom_flash_device::read_ram(offs_t offset, uint32_t mem_mask)
{
uint32_t rv = 0;
@ -443,7 +443,7 @@ READ32_MEMBER(gba_rom_flash_device::read_ram)
return rv;
}
WRITE32_MEMBER(gba_rom_flash_device::write_ram)
void gba_rom_flash_device::write_ram(offs_t offset, uint32_t data, uint32_t mem_mask)
{
offset &= m_flash_mask;
@ -472,7 +472,7 @@ void gba_rom_flash1m_device::device_add_mconfig(machine_config &config)
}
READ32_MEMBER(gba_rom_flash1m_device::read_ram)
uint32_t gba_rom_flash1m_device::read_ram(offs_t offset, uint32_t mem_mask)
{
uint32_t rv = 0;
@ -490,7 +490,7 @@ READ32_MEMBER(gba_rom_flash1m_device::read_ram)
return rv;
}
WRITE32_MEMBER(gba_rom_flash1m_device::write_ram)
void gba_rom_flash1m_device::write_ram(offs_t offset, uint32_t data, uint32_t mem_mask)
{
offset &= m_flash_mask;
@ -541,7 +541,7 @@ void gba_rom_flash1m_rtc_device::gpio_dev_write(uint16_t data, int gpio_dirs)
Carts with EEPROM
-------------------------------------------------*/
READ32_MEMBER(gba_rom_eeprom_device::read_ram)
uint32_t gba_rom_eeprom_device::read_ram(offs_t offset, uint32_t mem_mask)
{
// Larger games have smaller access to EERPOM content
if (m_rom_size > (16 * 1024 * 1024) && offset < 0xffff00/4)
@ -550,7 +550,7 @@ READ32_MEMBER(gba_rom_eeprom_device::read_ram)
return m_eeprom->read();
}
WRITE32_MEMBER(gba_rom_eeprom_device::write_ram)
void gba_rom_eeprom_device::write_ram(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// Larger games have smaller access to EEPROM content
if (m_rom_size > (16 * 1024 * 1024) && offset < 0xffff00/4)
@ -562,7 +562,7 @@ WRITE32_MEMBER(gba_rom_eeprom_device::write_ram)
m_eeprom->write(data);
}
READ32_MEMBER(gba_rom_eeprom64_device::read_ram)
uint32_t gba_rom_eeprom64_device::read_ram(offs_t offset, uint32_t mem_mask)
{
// Larger games have smaller access to EERPOM content
if (m_rom_size > (16 * 1024 * 1024) && offset < 0xffff00/4)
@ -571,7 +571,7 @@ READ32_MEMBER(gba_rom_eeprom64_device::read_ram)
return m_eeprom->read();
}
WRITE32_MEMBER(gba_rom_eeprom64_device::write_ram)
void gba_rom_eeprom64_device::write_ram(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// Larger games have smaller access to EEPROM content
if (m_rom_size > (16 * 1024 * 1024) && offset < 0xffff00/4)
@ -614,7 +614,7 @@ ioport_constructor gba_rom_yoshiug_device::device_input_ports() const
}
READ32_MEMBER(gba_rom_yoshiug_device::read_tilt)
uint32_t gba_rom_yoshiug_device::read_tilt(offs_t offset, uint32_t mem_mask)
{
switch (offset)
{
@ -640,7 +640,7 @@ READ32_MEMBER(gba_rom_yoshiug_device::read_tilt)
return 0xffffffff;
}
WRITE32_MEMBER(gba_rom_yoshiug_device::write_tilt)
void gba_rom_yoshiug_device::write_tilt(offs_t offset, uint32_t data)
{
switch (offset)
{
@ -743,7 +743,7 @@ void gba_rom_boktai_device::gpio_dev_write(uint16_t data, int gpio_dirs)
the cart "range" is accessible...)
-------------------------------------------------*/
WRITE32_MEMBER(gba_rom_3dmatrix_device::write_mapper)
void gba_rom_3dmatrix_device::write_mapper(offs_t offset, uint32_t data)
{
//printf("mapper write 0x%.8X - 0x%X\n", offset, data); fflush(stdout);
switch (offset & 3)

32
src/devices/bus/gba/rom.h
View File

@ -91,10 +91,10 @@ public:
gba_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
virtual DECLARE_READ32_MEMBER(read_rom) override { return m_rom[offset]; }
virtual uint32_t read_rom(offs_t offset) override { return m_rom[offset]; }
virtual DECLARE_READ32_MEMBER(read_gpio) override;
virtual DECLARE_WRITE32_MEMBER(write_gpio) override;
virtual uint32_t read_gpio(offs_t offset, uint32_t mem_mask = ~0) override;
virtual void write_gpio(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) override;
virtual uint16_t gpio_dev_read(int gpio_dirs) { return 0; }
virtual void gpio_dev_write(uint16_t data, int gpio_dirs) { }
@ -121,8 +121,8 @@ public:
gba_rom_sram_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
virtual DECLARE_READ32_MEMBER(read_ram) override;
virtual DECLARE_WRITE32_MEMBER(write_ram) override;
virtual uint32_t read_ram(offs_t offset, uint32_t mem_mask = ~0) override;
virtual void write_ram(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) override;
protected:
gba_rom_sram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@ -183,8 +183,8 @@ public:
gba_rom_flash_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
virtual DECLARE_READ32_MEMBER(read_ram) override;
virtual DECLARE_WRITE32_MEMBER(write_ram) override;
virtual uint32_t read_ram(offs_t offset, uint32_t mem_mask = ~0) override;
virtual void write_ram(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) override;
protected:
gba_rom_flash_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@ -229,8 +229,8 @@ public:
gba_rom_flash1m_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
virtual DECLARE_READ32_MEMBER(read_ram) override;
virtual DECLARE_WRITE32_MEMBER(write_ram) override;
virtual uint32_t read_ram(offs_t offset, uint32_t mem_mask = ~0) override;
virtual void write_ram(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) override;
protected:
gba_rom_flash1m_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@ -275,8 +275,8 @@ public:
gba_rom_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
virtual DECLARE_READ32_MEMBER(read_ram) override;
virtual DECLARE_WRITE32_MEMBER(write_ram) override;
virtual uint32_t read_ram(offs_t offset, uint32_t mem_mask = ~0) override;
virtual void write_ram(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) override;
protected:
gba_rom_eeprom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@ -301,8 +301,8 @@ public:
virtual ioport_constructor device_input_ports() const override;
// reading and writing
virtual DECLARE_READ32_MEMBER(read_tilt) override;
virtual DECLARE_WRITE32_MEMBER(write_tilt) override;
virtual uint32_t read_tilt(offs_t offset, uint32_t mem_mask = ~0) override;
virtual void write_tilt(offs_t offset, uint32_t data) override;
protected:
virtual void device_start() override;
@ -325,8 +325,8 @@ public:
gba_rom_eeprom64_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
virtual DECLARE_READ32_MEMBER(read_ram) override;
virtual DECLARE_WRITE32_MEMBER(write_ram) override;
virtual uint32_t read_ram(offs_t offset, uint32_t mem_mask = ~0) override;
virtual void write_ram(offs_t offset, uint32_t data, uint32_t mem_mask = ~0) override;
protected:
gba_rom_eeprom64_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@ -372,7 +372,7 @@ public:
gba_rom_3dmatrix_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// reading and writing
virtual DECLARE_WRITE32_MEMBER(write_mapper) override;
virtual void write_mapper(offs_t offset, uint32_t data) override;
protected:
// device-level overrides

28
src/devices/bus/hexbus/hx5102.cpp
View File

@ -182,7 +182,7 @@ void hx5102_device::external_operation(offs_t offset, uint8_t data)
/*
Reading from the address space of the drive.
*/
READ8_MEMBER( hx5102_device::read )
uint8_t hx5102_device::read(offs_t offset)
{
bool ramen1 = ((offset & 0xf800)==0xe000);
bool ramen2 = ((offset & 0xf800)==0xe800);
@ -220,11 +220,11 @@ READ8_MEMBER( hx5102_device::read )
// Floppy drive controller
if (m_dcs)
return fdc_read(space, offset&0x000f);
return fdc_read(offset&0x000f);
// Hexbus controller
if (hcs)
return ibc_read(space, offset&0x000f);
return ibc_read(offset&0x000f);
// DMA
if (m_dack)
@ -243,7 +243,7 @@ READ8_MEMBER( hx5102_device::read )
/*
Writing into the address space of the drive.
*/
WRITE8_MEMBER( hx5102_device::write )
void hx5102_device::write(offs_t offset, uint8_t data)
{
bool ramen1 = ((offset & 0xf800)==0xe000);
bool ramen2 = ((offset & 0xf800)==0xe800);
@ -270,14 +270,14 @@ WRITE8_MEMBER( hx5102_device::write )
// Floppy drive controller
if (m_dcs)
{
fdc_write(space, offset&0x000f, data);
fdc_write(offset&0x000f, data);
return;
}
// Hexbus controller
if (hcs)
{
ibc_write(space, offset&0x000f, data);
ibc_write(offset&0x000f, data);
return;
}
@ -366,7 +366,7 @@ WRITE_LINE_MEMBER( hx5102_device::mspeed_w )
/*
Read access to the floppy controller
*/
READ8_MEMBER(hx5102_device::fdc_read)
uint8_t hx5102_device::fdc_read(offs_t offset)
{
uint8_t val = 0;
switch (offset)
@ -388,7 +388,7 @@ READ8_MEMBER(hx5102_device::fdc_read)
/*
Write access to the floppy controller
*/
WRITE8_MEMBER(hx5102_device::fdc_write)
void hx5102_device::fdc_write(offs_t offset, uint8_t data)
{
m_dcs = ((offset & 0x0003)==0);
@ -416,18 +416,18 @@ void hx5102_device::update_readyff_input()
/*
Access to the Hexbus controller
*/
READ8_MEMBER(hx5102_device::ibc_read)
uint8_t hx5102_device::ibc_read(offs_t offset)
{
if ((offset & 1)==0)
return m_hexbus_ctrl->read(space, (offset>>1)&1);
return m_hexbus_ctrl->read((offset>>1)&1);
else
return 0;
}
WRITE8_MEMBER(hx5102_device::ibc_write)
void hx5102_device::ibc_write(offs_t offset, uint8_t data)
{
if ((offset & 1)==0)
m_hexbus_ctrl->write(space, (offset>>1)&1, data);
m_hexbus_ctrl->write((offset>>1)&1, data);
}
void hx5102_device::hexbus_out(uint8_t data)
@ -464,7 +464,7 @@ WRITE_LINE_MEMBER(hx5102_device::hsklatch_out)
MON = Motor on
INT = Interrupt from i8272A
*/
READ8_MEMBER(hx5102_device::cruread)
uint8_t hx5102_device::cruread(offs_t offset)
{
uint8_t crubits = 0;
// LOGMASKED(LOG_CRU, "Reading CRU addresses %04x-%04x\n", 0x17e0 + (offset<<4), 0x17ee + (offset<<4));
@ -480,7 +480,7 @@ READ8_MEMBER(hx5102_device::cruread)
/*
CRU write access.
*/
WRITE8_MEMBER(hx5102_device::cruwrite)
void hx5102_device::cruwrite(offs_t offset, uint8_t data)
{
// LOG("Writing CRU address %04x: %x\n", 0x17e0 + (offset<<1), data);
switch (offset)

16
src/devices/bus/hexbus/hx5102.h
View File

@ -55,23 +55,23 @@ private:
required_device<tms9995_device> m_flopcpu;
line_state m_ready_old;
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE8_MEMBER(write);
uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER(fdc_irq_w);
DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
DECLARE_WRITE_LINE_MEMBER(motor_w);
DECLARE_WRITE_LINE_MEMBER(mspeed_w);
DECLARE_READ8_MEMBER(fdc_read);
DECLARE_WRITE8_MEMBER(fdc_write);
DECLARE_READ8_MEMBER(ibc_read);
DECLARE_WRITE8_MEMBER(ibc_write);
uint8_t fdc_read(offs_t offset);
void fdc_write(offs_t offset, uint8_t data);
uint8_t ibc_read(offs_t offset);
void ibc_write(offs_t offset, uint8_t data);
void hexbus_out(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(hsklatch_out);
DECLARE_READ8_MEMBER(cruread);
DECLARE_WRITE8_MEMBER(cruwrite);
uint8_t cruread(offs_t offset);
void cruwrite(offs_t offset, uint8_t data);
// Operate the floppy motors
bool m_motor_on;

4
src/devices/bus/hexbus/tp0370.cpp
View File

@ -153,7 +153,7 @@ ibc_device::ibc_device(const machine_config &mconfig, const char *tag, device_t
/*
Reading from host
*/
READ8_MEMBER( ibc_device::read )
uint8_t ibc_device::read(offs_t offset)
{
uint8_t status = 0;
switch (offset)
@ -197,7 +197,7 @@ READ8_MEMBER( ibc_device::read )
/*
Writing from host
*/
WRITE8_MEMBER( ibc_device::write )
void ibc_device::write(offs_t offset, uint8_t data)
{
switch (offset)
{

4
src/devices/bus/hexbus/tp0370.h
View File

@ -25,8 +25,8 @@ public:
void device_start() override;
void device_reset() override;
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data);
// Callbacks
auto int_cb() { return m_int.bind(); }

8
src/devices/bus/hp80_io/82900.cpp
View File

@ -96,7 +96,7 @@ WRITE_LINE_MEMBER(hp82900_io_card_device::reset_w)
}
}
READ8_MEMBER(hp82900_io_card_device::cpu_mem_r)
uint8_t hp82900_io_card_device::cpu_mem_r(offs_t offset)
{
if (m_rom_enabled) {
return m_rom[ offset & 0x7ff ];
@ -105,12 +105,12 @@ READ8_MEMBER(hp82900_io_card_device::cpu_mem_r)
}
}
WRITE8_MEMBER(hp82900_io_card_device::cpu_mem_w)
void hp82900_io_card_device::cpu_mem_w(offs_t offset, uint8_t data)
{
m_ram[ offset ] = data;
}
READ8_MEMBER(hp82900_io_card_device::cpu_io_r)
uint8_t hp82900_io_card_device::cpu_io_r(offs_t offset)
{
m_rom_enabled = false;
@ -123,7 +123,7 @@ READ8_MEMBER(hp82900_io_card_device::cpu_io_r)
return res;
}
WRITE8_MEMBER(hp82900_io_card_device::cpu_io_w)
void hp82900_io_card_device::cpu_io_w(offs_t offset, uint8_t data)
{
m_rom_enabled = false;
if (BIT(offset , 6) && (m_addr_latch & 0x82) == 0) {

8
src/devices/bus/hp80_io/82900.h
View File

@ -52,10 +52,10 @@ private:
uint8_t m_addr_latch;
DECLARE_WRITE_LINE_MEMBER(reset_w);
DECLARE_READ8_MEMBER(cpu_mem_r);
DECLARE_WRITE8_MEMBER(cpu_mem_w);
DECLARE_READ8_MEMBER(cpu_io_r);
DECLARE_WRITE8_MEMBER(cpu_io_w);
uint8_t cpu_mem_r(offs_t offset);
void cpu_mem_w(offs_t offset, uint8_t data);
uint8_t cpu_io_r(offs_t offset);
void cpu_io_w(offs_t offset, uint8_t data);
void cpu_mem_map(address_map &map);
void cpu_io_map(address_map &map);
void z80_m1_w(uint8_t data);

4
src/devices/bus/hp80_io/82937.cpp
View File

@ -167,12 +167,12 @@ void hp82937_io_card_device::dio_w(uint8_t data)
update_data_out();
}
READ8_MEMBER(hp82937_io_card_device::switch_r)
uint8_t hp82937_io_card_device::switch_r()
{
return m_sw1->read() | 0xc0;
}
WRITE8_MEMBER(hp82937_io_card_device::latch_w)
void hp82937_io_card_device::latch_w(uint8_t data)
{
LOG("latch=%02x\n" , data);
m_latch = data;

4
src/devices/bus/hp80_io/82937.h
View File

@ -58,8 +58,8 @@ private:
uint8_t dio_r();
void dio_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(ieee488_ctrl_w);
DECLARE_READ8_MEMBER(switch_r);
DECLARE_WRITE8_MEMBER(latch_w);
uint8_t switch_r();
void latch_w(uint8_t data);
void cpu_io_map(address_map &map);

4
src/devices/bus/hp80_io/82939.cpp
View File

@ -163,7 +163,7 @@ uint8_t hp82939_io_card_device::p2_r()
return res;
}
READ8_MEMBER(hp82939_io_card_device::cpu_r)
uint8_t hp82939_io_card_device::cpu_r(offs_t offset)
{
if ((offset & 0x82) == 0x00) {
return m_translator->uc_r(offset & 1);
@ -174,7 +174,7 @@ READ8_MEMBER(hp82939_io_card_device::cpu_r)
}
}
WRITE8_MEMBER(hp82939_io_card_device::cpu_w)
void hp82939_io_card_device::cpu_w(offs_t offset, uint8_t data)
{
if ((offset & 0x82) == 0x00) {
m_translator->uc_w(offset & 1 , data);

4
src/devices/bus/hp80_io/82939.h
View File

@ -49,8 +49,8 @@ private:
uint8_t p1_r();
void p1_w(uint8_t data);
uint8_t p2_r();
DECLARE_READ8_MEMBER(cpu_r);
DECLARE_WRITE8_MEMBER(cpu_w);
uint8_t cpu_r(offs_t offset);
void cpu_w(offs_t offset, uint8_t data);
void cpu_io_map(address_map &map);
};

4
src/devices/bus/hp9845_io/98032.cpp
View File

@ -102,7 +102,7 @@ void hp98032_io_card_device::device_reset()
m_gpio->preset_w(0);
}
READ16_MEMBER(hp98032_io_card_device::reg_r)
uint16_t hp98032_io_card_device::reg_r(address_space &space, offs_t offset)
{
uint16_t res = 0;
@ -173,7 +173,7 @@ READ16_MEMBER(hp98032_io_card_device::reg_r)
return res;
}
WRITE16_MEMBER(hp98032_io_card_device::reg_w)
void hp98032_io_card_device::reg_w(address_space &space, offs_t offset, uint16_t data)
{
LOG("wr R%u=%04x\n" , offset + 4 , data);

4
src/devices/bus/hp9845_io/98032.h
View File

@ -32,8 +32,8 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual DECLARE_READ16_MEMBER(reg_r) override;
virtual DECLARE_WRITE16_MEMBER(reg_w) override;
virtual uint16_t reg_r(address_space &space, offs_t offset) override;
virtual void reg_w(address_space &space, offs_t offset, uint16_t data) override;
private:
required_device<hp98032_gpio_slot_device> m_gpio;

22
src/devices/bus/hp9845_io/98034.cpp
View File

@ -114,7 +114,7 @@ void hp98034_io_card_device::device_reset()
update_dc();
}
READ16_MEMBER(hp98034_io_card_device::reg_r)
uint16_t hp98034_io_card_device::reg_r(address_space &space, offs_t offset)
{
uint16_t res = m_odr;
@ -154,7 +154,7 @@ READ16_MEMBER(hp98034_io_card_device::reg_r)
return res;
}
WRITE16_MEMBER(hp98034_io_card_device::reg_w)
void hp98034_io_card_device::reg_w(address_space &space, offs_t offset, uint16_t data)
{
m_idr = (uint8_t)data;
@ -199,19 +199,19 @@ uint8_t hp98034_io_card_device::dc_r()
return res;
}
WRITE8_MEMBER(hp98034_io_card_device::hpib_data_w)
void hp98034_io_card_device::hpib_data_w(uint8_t data)
{
m_data_out = data;
update_data_out();
}
WRITE8_MEMBER(hp98034_io_card_device::hpib_ctrl_w)
void hp98034_io_card_device::hpib_ctrl_w(uint8_t data)
{
m_ctrl_out = data;
update_ctrl_out();
}
READ8_MEMBER(hp98034_io_card_device::hpib_ctrl_r)
uint8_t hp98034_io_card_device::hpib_ctrl_r()
{
uint8_t res = 0;
@ -243,28 +243,28 @@ READ8_MEMBER(hp98034_io_card_device::hpib_ctrl_r)
return res;
}
READ8_MEMBER(hp98034_io_card_device::hpib_data_r)
uint8_t hp98034_io_card_device::hpib_data_r()
{
return ~m_ieee488->dio_r();
}
READ8_MEMBER(hp98034_io_card_device::idr_r)
uint8_t hp98034_io_card_device::idr_r()
{
return m_idr;
}
WRITE8_MEMBER(hp98034_io_card_device::odr_w)
void hp98034_io_card_device::odr_w(uint8_t data)
{
m_odr = data;
}
READ8_MEMBER(hp98034_io_card_device::mode_reg_r)
uint8_t hp98034_io_card_device::mode_reg_r()
{
LOG("%.06f MR=%02x\n" , machine().time().as_double() , m_mode_reg);
return m_mode_reg;
}
WRITE8_MEMBER(hp98034_io_card_device::mode_reg_clear_w)
void hp98034_io_card_device::mode_reg_clear_w(uint8_t data)
{
LOG("%.06f clear_w\n" , machine().time().as_double());
m_mode_reg = 0xff;
@ -276,7 +276,7 @@ WRITE8_MEMBER(hp98034_io_card_device::mode_reg_clear_w)
}
}
READ8_MEMBER(hp98034_io_card_device::switch_r)
uint8_t hp98034_io_card_device::switch_r()
{
return m_sw1->read() | 0xc0;
}

22
src/devices/bus/hp9845_io/98034.h
View File

@ -33,23 +33,23 @@ protected:
virtual const tiny_rom_entry *device_rom_region() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual DECLARE_READ16_MEMBER(reg_r) override;
virtual DECLARE_WRITE16_MEMBER(reg_w) override;
virtual uint16_t reg_r(address_space &space, offs_t offset) override;
virtual void reg_w(address_space &space, offs_t offset, uint16_t data) override;
private:
void dc_w(uint8_t data);
uint8_t dc_r();
uint8_t int_ack_r();
DECLARE_WRITE8_MEMBER(hpib_data_w);
DECLARE_WRITE8_MEMBER(hpib_ctrl_w);
DECLARE_READ8_MEMBER(hpib_ctrl_r);
DECLARE_READ8_MEMBER(hpib_data_r);
DECLARE_READ8_MEMBER(idr_r);
DECLARE_WRITE8_MEMBER(odr_w);
DECLARE_READ8_MEMBER(mode_reg_r);
DECLARE_WRITE8_MEMBER(mode_reg_clear_w);
DECLARE_READ8_MEMBER(switch_r);
void hpib_data_w(uint8_t data);
void hpib_ctrl_w(uint8_t data);
uint8_t hpib_ctrl_r();
uint8_t hpib_data_r();
uint8_t idr_r();
void odr_w(uint8_t data);
uint8_t mode_reg_r();
void mode_reg_clear_w(uint8_t data);
uint8_t switch_r();
void np_io_map(address_map &map);
void np_program_map(address_map &map);

32
src/devices/bus/hp9845_io/98035.cpp
View File

@ -254,7 +254,7 @@ void hp98035_io_card_device::device_timer(emu_timer &timer, device_timer_id id,
}
}
READ16_MEMBER(hp98035_io_card_device::reg_r)
uint16_t hp98035_io_card_device::reg_r(address_space &space, offs_t offset)
{
uint16_t res;
@ -287,7 +287,7 @@ READ16_MEMBER(hp98035_io_card_device::reg_r)
return res;
}
WRITE16_MEMBER(hp98035_io_card_device::reg_w)
void hp98035_io_card_device::reg_w(address_space &space, offs_t offset, uint16_t data)
{
bool new_inten;
@ -317,33 +317,33 @@ WRITE16_MEMBER(hp98035_io_card_device::reg_w)
LOG(("write R%u=%04x\n" , offset + 4 , data));
}
WRITE8_MEMBER(hp98035_io_card_device::ram_addr_w)
void hp98035_io_card_device::ram_addr_w(uint8_t data)
{
m_ram_addr = data;
}
READ8_MEMBER(hp98035_io_card_device::ram_data_r)
uint8_t hp98035_io_card_device::ram_data_r()
{
return m_np_ram[ m_ram_addr ];
}
WRITE8_MEMBER(hp98035_io_card_device::ram_addr_data_w)
void hp98035_io_card_device::ram_addr_data_w(uint8_t data)
{
m_ram_addr = data;
m_np_ram[ m_ram_addr ] = m_ram_data_in;
}
WRITE8_MEMBER(hp98035_io_card_device::ram_data_w)
void hp98035_io_card_device::ram_data_w(uint8_t data)
{
m_ram_data_in = data;
}
WRITE8_MEMBER(hp98035_io_card_device::clock_key_w)
void hp98035_io_card_device::clock_key_w(uint8_t data)
{
m_clock_keys = data & 7;
}
READ8_MEMBER(hp98035_io_card_device::clock_digit_r)
uint8_t hp98035_io_card_device::clock_digit_r()
{
switch (m_clock_mux) {
case 1:
@ -360,20 +360,20 @@ READ8_MEMBER(hp98035_io_card_device::clock_digit_r)
}
}
WRITE8_MEMBER(hp98035_io_card_device::odr_w)
void hp98035_io_card_device::odr_w(uint8_t data)
{
m_odr = data;
set_flg(true);
}
READ8_MEMBER(hp98035_io_card_device::idr_r)
uint8_t hp98035_io_card_device::idr_r()
{
set_flg(true);
m_idr_full = false;
return m_idr;
}
READ8_MEMBER(hp98035_io_card_device::np_status_r)
uint8_t hp98035_io_card_device::np_status_r()
{
// Bit 2 = 0: use US date format
uint8_t res = 0x03;
@ -396,13 +396,13 @@ READ8_MEMBER(hp98035_io_card_device::np_status_r)
return res;
}
WRITE8_MEMBER(hp98035_io_card_device::clear_np_irq_w)
void hp98035_io_card_device::clear_np_irq_w(uint8_t data)
{
m_np_irq = false;
update_dc();
}
READ8_MEMBER(hp98035_io_card_device::clock_mux_r)
uint8_t hp98035_io_card_device::clock_mux_r()
{
// External input lines are always active (bits 7-4)
uint8_t res = 0xf0 | m_clock_mux;
@ -413,13 +413,13 @@ READ8_MEMBER(hp98035_io_card_device::clock_mux_r)
return res;
}
WRITE8_MEMBER(hp98035_io_card_device::set_irq_w)
void hp98035_io_card_device::set_irq_w(uint8_t data)
{
m_irq = true;
update_irq();
}
READ8_MEMBER(hp98035_io_card_device::clr_inten_r)
uint8_t hp98035_io_card_device::clr_inten_r()
{
m_intflag = false;
m_inten = false;
@ -428,7 +428,7 @@ READ8_MEMBER(hp98035_io_card_device::clr_inten_r)
return 0xff;
}
WRITE8_MEMBER(hp98035_io_card_device::clr_inten_w)
void hp98035_io_card_device::clr_inten_w(uint8_t data)
{
m_intflag = false;
m_inten = false;

32
src/devices/bus/hp9845_io/98035.h
View File

@ -34,28 +34,28 @@ protected:
virtual const tiny_rom_entry *device_rom_region() const override;
virtual void device_add_mconfig(machine_config &config) override;
virtual DECLARE_READ16_MEMBER(reg_r) override;
virtual DECLARE_WRITE16_MEMBER(reg_w) override;
virtual uint16_t reg_r(address_space &space, offs_t offset) override;
virtual void reg_w(address_space &space, offs_t offset, uint16_t data) override;
private:
void dc_w(uint8_t data);
DECLARE_WRITE8_MEMBER(ram_addr_w);
DECLARE_READ8_MEMBER(ram_data_r);
DECLARE_WRITE8_MEMBER(ram_addr_data_w);
DECLARE_WRITE8_MEMBER(ram_data_w);
void ram_addr_w(uint8_t data);
uint8_t ram_data_r();
void ram_addr_data_w(uint8_t data);
void ram_data_w(uint8_t data);
DECLARE_WRITE8_MEMBER(clock_key_w);
DECLARE_READ8_MEMBER(clock_digit_r);
void clock_key_w(uint8_t data);
uint8_t clock_digit_r();
DECLARE_WRITE8_MEMBER(odr_w);
DECLARE_READ8_MEMBER(idr_r);
DECLARE_READ8_MEMBER(np_status_r);
DECLARE_WRITE8_MEMBER(clear_np_irq_w);
DECLARE_READ8_MEMBER(clock_mux_r);
DECLARE_WRITE8_MEMBER(set_irq_w);
DECLARE_READ8_MEMBER(clr_inten_r);
DECLARE_WRITE8_MEMBER(clr_inten_w);
void odr_w(uint8_t data);
uint8_t idr_r();
uint8_t np_status_r();
void clear_np_irq_w(uint8_t data);
uint8_t clock_mux_r();
void set_irq_w(uint8_t data);
uint8_t clr_inten_r();
void clr_inten_w(uint8_t data);
void np_io_map(address_map &map);
void np_program_map(address_map &map);

10
src/devices/bus/hp9845_io/98046.cpp
View File

@ -78,7 +78,7 @@ hp98046_io_card_device::~hp98046_io_card_device()
{
}
READ16_MEMBER(hp98046_io_card_device::reg_r)
uint16_t hp98046_io_card_device::reg_r(address_space &space, offs_t offset)
{
uint16_t res = 0;
@ -129,7 +129,7 @@ READ16_MEMBER(hp98046_io_card_device::reg_r)
return res;
}
WRITE16_MEMBER(hp98046_io_card_device::reg_w)
void hp98046_io_card_device::reg_w(address_space &space, offs_t offset, uint16_t data)
{
LOG_CPU("wr R%u=%04x\n" , offset + 4 , data);
@ -291,12 +291,12 @@ void hp98046_io_card_device::cpu_io_map(address_map &map)
map(0 , 0xff).rw(FUNC(hp98046_io_card_device::cpu_r) , FUNC(hp98046_io_card_device::cpu_w));
}
READ8_MEMBER(hp98046_io_card_device::ram_r)
uint8_t hp98046_io_card_device::ram_r(offs_t offset)
{
return m_ram[ offset ];
}
READ8_MEMBER(hp98046_io_card_device::cpu_r)
uint8_t hp98046_io_card_device::cpu_r(offs_t offset)
{
if (BIT(m_port_2 , 2)) {
return m_ram[ (offset & 0xff) | (uint16_t(m_port_2 & 3) << 8) ];
@ -342,7 +342,7 @@ READ8_MEMBER(hp98046_io_card_device::cpu_r)
}
}
WRITE8_MEMBER(hp98046_io_card_device::cpu_w)
void hp98046_io_card_device::cpu_w(offs_t offset, uint8_t data)
{
if (BIT(m_port_2 , 2)) {
m_ram[ (offset & 0xff) | (uint16_t(m_port_2 & 3) << 8) ] = data;

10
src/devices/bus/hp9845_io/98046.h
View File

@ -25,8 +25,8 @@ public:
hp98046_io_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~hp98046_io_card_device();
virtual DECLARE_READ16_MEMBER(reg_r) override;
virtual DECLARE_WRITE16_MEMBER(reg_w) override;
virtual uint16_t reg_r(address_space &space, offs_t offset) override;
virtual void reg_w(address_space &space, offs_t offset, uint16_t data) override;
virtual bool has_dual_sc() const override;
@ -74,9 +74,9 @@ private:
void cpu_program_map(address_map &map);
void cpu_io_map(address_map &map);
DECLARE_READ8_MEMBER(ram_r);
DECLARE_READ8_MEMBER(cpu_r);
DECLARE_WRITE8_MEMBER(cpu_w);
uint8_t ram_r(offs_t offset);
uint8_t cpu_r(offs_t offset);
void cpu_w(offs_t offset, uint8_t data);
uint8_t p1_r();
void p2_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(sio_int_w);

6
src/devices/bus/hp9845_io/hp9845_io.cpp
View File

@ -97,13 +97,13 @@ WRITE_LINE_MEMBER(hp9845_io_slot_device::dmar_w)
m_dmar_cb_func(state);
}
int hp9845_io_slot_device::get_rw_handlers(read16_delegate& rhandler , write16_delegate& whandler)
int hp9845_io_slot_device::get_rw_handlers(read16m_delegate& rhandler , write16m_delegate& whandler)
{
device_hp9845_io_interface *card = get_card_device();
if (card) {
rhandler = read16_delegate(*card, FUNC(device_hp9845_io_interface::reg_r));
whandler = write16_delegate(*card, FUNC(device_hp9845_io_interface::reg_w));
rhandler = read16m_delegate(*card, FUNC(device_hp9845_io_interface::reg_r));
whandler = write16m_delegate(*card, FUNC(device_hp9845_io_interface::reg_w));
return card->get_sc();
} else {
return -1;

6
src/devices/bus/hp9845_io/hp9845_io.h
View File

@ -61,7 +61,7 @@ public:
// getter for r/w handlers
// return value is SC (negative if no card is attached to slot)
int get_rw_handlers(read16_delegate& rhandler , write16_delegate& whandler);
int get_rw_handlers(read16m_delegate& rhandler , write16m_delegate& whandler);
bool has_dual_sc() const;
@ -84,8 +84,8 @@ class device_hp9845_io_interface : public device_interface
public:
void set_slot_device(hp9845_io_slot_device &dev);
virtual DECLARE_READ16_MEMBER(reg_r) = 0;
virtual DECLARE_WRITE16_MEMBER(reg_w) = 0;
virtual uint16_t reg_r(address_space &space, offs_t offset) = 0;
virtual void reg_w(address_space &space, offs_t offset, uint16_t data) = 0;
// SC getter
uint8_t get_sc();

8
src/devices/bus/hp_dio/hp98265a.cpp
View File

@ -164,8 +164,8 @@ void dio16_98265a_device::device_reset()
program_space().install_readwrite_handler(
0x600000 + (code * 0x10000),
0x6007ff + (code * 0x10000),
read16_delegate(*this, FUNC(dio16_98265a_device::io_r)),
write16_delegate(*this, FUNC(dio16_98265a_device::io_w)));
read16sm_delegate(*this, FUNC(dio16_98265a_device::io_r)),
write16sm_delegate(*this, FUNC(dio16_98265a_device::io_w)));
program_space().install_device(0x600020 + (code * 0x10000), 0x60003f + (code * 0x10000), *m_spc, &mb87030_device::map, 0x00ff00ff);
m_installed_io = true;
}
@ -181,7 +181,7 @@ int dio16_98265a_device::get_int_level()
REG_SW1_INT_LEVEL_MASK;
}
READ16_MEMBER(dio16_98265a_device::io_r)
uint16_t dio16_98265a_device::io_r(offs_t offset)
{
uint16_t ret = 0xffff;
@ -204,7 +204,7 @@ READ16_MEMBER(dio16_98265a_device::io_r)
return ret;
}
WRITE16_MEMBER(dio16_98265a_device::io_w)
void dio16_98265a_device::io_w(offs_t offset, uint16_t data)
{
LOG("io_w: offset=%02X, data=%02X\n", offset, data);

4
src/devices/bus/hp_dio/hp98265a.h
View File

@ -35,8 +35,8 @@ protected:
virtual ioport_constructor device_input_ports() const override;
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_READ16_MEMBER(io_r);
DECLARE_WRITE16_MEMBER(io_w);
uint16_t io_r(offs_t offset);
void io_w(offs_t offset, uint16_t data);
void dmack_w_in(int channel, uint8_t data) override;
uint8_t dmack_r_in(int channel) override;

20
src/devices/bus/hp_dio/hp98543.cpp
View File

@ -103,12 +103,12 @@ void dio16_98543_device::device_start()
dio().install_memory(
0x200000, 0x27ffff,
read16_delegate(*this, FUNC(dio16_98543_device::vram_r)),
write16_delegate(*this, FUNC(dio16_98543_device::vram_w)));
read16s_delegate(*this, FUNC(dio16_98543_device::vram_r)),
write16s_delegate(*this, FUNC(dio16_98543_device::vram_w)));
dio().install_memory(
0x560000, 0x563fff,
read16_delegate(*this, FUNC(dio16_98543_device::rom_r)),
write16_delegate(*this, FUNC(dio16_98543_device::rom_w)));
read16sm_delegate(*this, FUNC(dio16_98543_device::rom_r)),
write16sm_delegate(*this, FUNC(dio16_98543_device::rom_w)));
dio().install_memory(
0x564000, 0x565fff,
read16_delegate(*this, FUNC(dio16_98543_device::ctrl_r)),
@ -124,20 +124,20 @@ void dio16_98543_device::device_reset()
{
}
READ16_MEMBER(dio16_98543_device::rom_r)
uint16_t dio16_98543_device::rom_r(offs_t offset)
{
if (offset == 1)
return m_intreg;
return 0xff00 | m_rom[offset];
}
WRITE16_MEMBER(dio16_98543_device::rom_w)
void dio16_98543_device::rom_w(offs_t offset, uint16_t data)
{
if (offset == 1)
m_intreg = data;
}
READ16_MEMBER(dio16_98543_device::ctrl_r)
uint16_t dio16_98543_device::ctrl_r(address_space &space, offs_t offset, uint16_t mem_mask)
{
uint16_t ret = 0;
@ -147,13 +147,13 @@ READ16_MEMBER(dio16_98543_device::ctrl_r)
return ret;
}
WRITE16_MEMBER(dio16_98543_device::ctrl_w)
void dio16_98543_device::ctrl_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask)
{
for (auto &tc: m_topcat)
tc->ctrl_w(space, offset, data, mem_mask);
}
READ16_MEMBER(dio16_98543_device::vram_r)
uint16_t dio16_98543_device::vram_r(offs_t offset, uint16_t mem_mask)
{
uint16_t ret = 0;
for (auto &tc: m_topcat)
@ -161,7 +161,7 @@ READ16_MEMBER(dio16_98543_device::vram_r)
return ret;
}
WRITE16_MEMBER(dio16_98543_device::vram_w)
void dio16_98543_device::vram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
for (auto &tc: m_topcat)
tc->vram_w(offset, data, mem_mask);

12
src/devices/bus/hp_dio/hp98543.h
View File

@ -21,13 +21,13 @@ class dio16_98543_device :
public:
dio16_98543_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ16_MEMBER(rom_r);
DECLARE_WRITE16_MEMBER(rom_w);
uint16_t rom_r(offs_t offset);
void rom_w(offs_t offset, uint16_t data);
DECLARE_READ16_MEMBER(ctrl_r);
DECLARE_WRITE16_MEMBER(ctrl_w);
DECLARE_READ16_MEMBER(vram_r);
DECLARE_WRITE16_MEMBER(vram_w);
uint16_t ctrl_r(address_space &space, offs_t offset, uint16_t mem_mask = ~0);
void ctrl_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t vram_r(offs_t offset, uint16_t mem_mask = ~0);
void vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
static constexpr int TOPCAT_COUNT = 4;

8
src/devices/bus/hp_dio/hp98544.cpp
View File

@ -105,8 +105,8 @@ void dio16_98544_device::device_start()
write16s_delegate(*m_topcat, FUNC(topcat_device::vram_w)));
dio().install_memory(
0x560000, 0x563fff,
read16_delegate(*this, FUNC(dio16_98544_device::rom_r)),
write16_delegate(*this, FUNC(dio16_98544_device::rom_w)));
read16sm_delegate(*this, FUNC(dio16_98544_device::rom_r)),
write16sm_delegate(*this, FUNC(dio16_98544_device::rom_w)));
dio().install_memory(
0x564000, 0x567fff,
read16_delegate(*m_topcat, FUNC(topcat_device::ctrl_r)),
@ -121,7 +121,7 @@ void dio16_98544_device::device_reset()
{
}
READ16_MEMBER(dio16_98544_device::rom_r)
uint16_t dio16_98544_device::rom_r(offs_t offset)
{
if (offset == 1)
return m_intreg;
@ -130,7 +130,7 @@ READ16_MEMBER(dio16_98544_device::rom_r)
}
// the video chip registers live here, so these writes are valid
WRITE16_MEMBER(dio16_98544_device::rom_w)
void dio16_98544_device::rom_w(offs_t offset, uint16_t data)
{
if (offset == 1) {
m_intreg = data;

4
src/devices/bus/hp_dio/hp98544.h
View File

@ -26,8 +26,8 @@ public:
// construction/destruction
dio16_98544_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ16_MEMBER(rom_r);
DECLARE_WRITE16_MEMBER(rom_w);
uint16_t rom_r(offs_t offset);
void rom_w(offs_t offset, uint16_t data);
required_device<topcat_device> m_topcat;
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);

20
src/devices/bus/hp_dio/hp98550.cpp
View File

@ -87,13 +87,13 @@ void dio32_98550_device::device_start()
dio().install_memory(
0x200000, 0x3fffff,
read16_delegate(*this, FUNC(dio32_98550_device::vram_r)),
write16_delegate(*this, FUNC(dio32_98550_device::vram_w)));
read16s_delegate(*this, FUNC(dio32_98550_device::vram_r)),
write16s_delegate(*this, FUNC(dio32_98550_device::vram_w)));
dio().install_memory(
0x560000, 0x56ffff,
read16_delegate(*this, FUNC(dio32_98550_device::rom_r)),
write16_delegate(*this, FUNC(dio32_98550_device::rom_w)));
read16s_delegate(*this, FUNC(dio32_98550_device::rom_r)),
write16s_delegate(*this, FUNC(dio32_98550_device::rom_w)));
dio().install_memory(
0x564000, 0x5648ff,
@ -112,7 +112,7 @@ void dio32_98550_device::device_reset()
m_ints = 0;
}
READ16_MEMBER(dio32_98550_device::rom_r)
uint16_t dio32_98550_device::rom_r(offs_t offset, uint16_t mem_mask)
{
LOG("%s: %04x\n", __func__, offset);
@ -122,7 +122,7 @@ READ16_MEMBER(dio32_98550_device::rom_r)
return 0xff00 | m_rom[offset];
}
WRITE16_MEMBER(dio32_98550_device::rom_w)
void dio32_98550_device::rom_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
switch (offset) {
case 0:
@ -139,7 +139,7 @@ WRITE16_MEMBER(dio32_98550_device::rom_w)
}
}
READ16_MEMBER(dio32_98550_device::catseye_r)
uint16_t dio32_98550_device::catseye_r(address_space &space, offs_t offset, uint16_t mem_mask)
{
uint16_t ret = 0;
@ -149,14 +149,14 @@ READ16_MEMBER(dio32_98550_device::catseye_r)
return ret;
}
WRITE16_MEMBER(dio32_98550_device::catseye_w)
void dio32_98550_device::catseye_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask)
{
LOG("%s: %04X = %04X\n", __func__, offset << 1, data);
for (auto &ce: m_catseye)
ce->ctrl_w(offset, data, mem_mask);
}
READ16_MEMBER(dio32_98550_device::vram_r)
uint16_t dio32_98550_device::vram_r(offs_t offset, uint16_t mem_mask)
{
uint16_t ret = 0;
@ -166,7 +166,7 @@ READ16_MEMBER(dio32_98550_device::vram_r)
return ret;
}
WRITE16_MEMBER(dio32_98550_device::vram_w)
void dio32_98550_device::vram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
for (auto &ce: m_catseye)
ce->vram_w(offset, data, mem_mask);

14
src/devices/bus/hp_dio/hp98550.h
View File

@ -21,16 +21,14 @@ class dio32_98550_device :
public:
dio32_98550_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ16_MEMBER(rom_r);
DECLARE_WRITE16_MEMBER(rom_w);
uint16_t rom_r(offs_t offset, uint16_t mem_mask = ~0);
void rom_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
DECLARE_READ16_MEMBER(topcat_r);
DECLARE_WRITE16_MEMBER(topcat_w);
DECLARE_READ16_MEMBER(catseye_r);
DECLARE_WRITE16_MEMBER(catseye_w);
uint16_t catseye_r(address_space &space, offs_t offset, uint16_t mem_mask = ~0);
void catseye_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
DECLARE_READ16_MEMBER(vram_r);
DECLARE_WRITE16_MEMBER(vram_w);
uint16_t vram_r(offs_t offset, uint16_t mem_mask = ~0);
void vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
static constexpr int CATSEYE_COUNT = 8;

8
src/devices/bus/hp_dio/hp98603a.cpp
View File

@ -67,16 +67,16 @@ void dio16_98603a_device::device_reset()
{
m_rom = device().machine().root_device().memregion(this->subtag(HP98603A_ROM_REGION).c_str())->base();
dio().install_memory(0x80000, 0xfffff,
read16_delegate(*this, FUNC(dio16_98603a_device::rom_r)),
write16_delegate(*this, FUNC(dio16_98603a_device::rom_w)));
read16sm_delegate(*this, FUNC(dio16_98603a_device::rom_r)),
write16sm_delegate(*this, FUNC(dio16_98603a_device::rom_w)));
}
READ16_MEMBER(dio16_98603a_device::rom_r)
uint16_t dio16_98603a_device::rom_r(offs_t offset)
{
return m_rom[offset*2] | (m_rom[offset*2+1] << 8);
}
WRITE16_MEMBER(dio16_98603a_device::rom_w)
void dio16_98603a_device::rom_w(offs_t offset, uint16_t data)
{
}

4
src/devices/bus/hp_dio/hp98603a.h
View File

@ -18,8 +18,8 @@ class dio16_98603a_device :
public:
// construction/destruction
dio16_98603a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ16_MEMBER(rom_r);
DECLARE_WRITE16_MEMBER(rom_w);
uint16_t rom_r(offs_t offset);
void rom_w(offs_t offset, uint16_t data);
protected:
dio16_98603a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);

8
src/devices/bus/hp_dio/hp98603b.cpp
View File

@ -62,16 +62,16 @@ void dio16_98603b_device::device_reset()
{
m_rom = device().machine().root_device().memregion(this->subtag(HP98603B_ROM_REGION).c_str())->base();
dio().install_memory(0x100000, 0x1fffff,
read16_delegate(*this, FUNC(dio16_98603b_device::rom_r)),
write16_delegate(*this, FUNC(dio16_98603b_device::rom_w)));
read16sm_delegate(*this, FUNC(dio16_98603b_device::rom_r)),
write16sm_delegate(*this, FUNC(dio16_98603b_device::rom_w)));
}
READ16_MEMBER(dio16_98603b_device::rom_r)
uint16_t dio16_98603b_device::rom_r(offs_t offset)
{
return m_rom[offset*2] | (m_rom[offset*2+1] << 8);
}
WRITE16_MEMBER(dio16_98603b_device::rom_w)
void dio16_98603b_device::rom_w(offs_t offset, uint16_t data)
{
}

4
src/devices/bus/hp_dio/hp98603b.h
View File

@ -18,8 +18,8 @@ class dio16_98603b_device :
public:
// construction/destruction
dio16_98603b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ16_MEMBER(rom_r);
DECLARE_WRITE16_MEMBER(rom_w);
uint16_t rom_r(offs_t offset);
void rom_w(offs_t offset, uint16_t data);
protected:
dio16_98603b_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);

8
src/devices/bus/hp_dio/hp98620.cpp
View File

@ -60,8 +60,8 @@ void dio16_98620_device::device_reset()
if (!m_installed_io)
{
program_space().install_readwrite_handler(0x500000, 0x50020f,
read16_delegate(*this, FUNC(dio16_98620_device::dma_r)),
write16_delegate(*this, FUNC(dio16_98620_device::dma_w)));
read16sm_delegate(*this, FUNC(dio16_98620_device::dma_r)),
write16sm_delegate(*this, FUNC(dio16_98620_device::dma_w)));
m_installed_io = true;
}
m_control = 0;
@ -88,7 +88,7 @@ uint16_t dio16_98620_device::get_ctrl(const int channel)
return ret;
}
READ16_MEMBER(dio16_98620_device::dma_r)
uint16_t dio16_98620_device::dma_r(offs_t offset)
{
uint16_t ret = 0;
@ -218,7 +218,7 @@ void dio16_98620_device::update_ctrl(const int channel, const uint16_t data, con
}
}
WRITE16_MEMBER(dio16_98620_device::dma_w)
void dio16_98620_device::dma_w(offs_t offset, uint16_t data)
{
LOG("dma_w: offset=%02X, data=%02X\n", offset << 1, data);

4
src/devices/bus/hp_dio/hp98620.h
View File

@ -27,8 +27,8 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
DECLARE_READ16_MEMBER(dma_r);
DECLARE_WRITE16_MEMBER(dma_w);
uint16_t dma_r(offs_t offset);
void dma_w(offs_t offset, uint16_t data);
DECLARE_WRITE_LINE_MEMBER(irq_w);

12
src/devices/bus/hp_dio/hp98643.cpp
View File

@ -123,7 +123,7 @@ WRITE_LINE_MEMBER(dio16_98643_device::lance_int_w)
update_int();
}
WRITE16_MEMBER(dio16_98643_device::sc_w)
void dio16_98643_device::sc_w(uint16_t data)
{
LOG("%s: %02x\n", __func__, data);
data &= (REG_SC_LOCK|REG_SC_IE);
@ -136,27 +136,27 @@ WRITE16_MEMBER(dio16_98643_device::sc_w)
update_int();
}
READ16_MEMBER(dio16_98643_device::sc_r)
uint16_t dio16_98643_device::sc_r()
{
LOG("%s: %02x\n", __func__, m_sc);
return m_sc;
}
READ16_MEMBER(dio16_98643_device::id_r)
uint16_t dio16_98643_device::id_r()
{
return (REG_ID | (m_switches->read() & REG_SWITCHES_REMOTE));
}
WRITE16_MEMBER(dio16_98643_device::id_w)
void dio16_98643_device::id_w(uint16_t data)
{
reset();
}
READ16_MEMBER(dio16_98643_device::novram_r)
uint16_t dio16_98643_device::novram_r(offs_t offset)
{
return m_novram[offset];
}
WRITE16_MEMBER(dio16_98643_device::novram_w)
void dio16_98643_device::novram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_novram[offset & 0x3f]);
}

12
src/devices/bus/hp_dio/hp98643.h
View File

@ -55,12 +55,12 @@ private:
void update_int();
int get_irq_line();
READ16_MEMBER(sc_r);
WRITE16_MEMBER(sc_w);
READ16_MEMBER(id_r);
WRITE16_MEMBER(id_w);
READ16_MEMBER(novram_r);
WRITE16_MEMBER(novram_w);
uint16_t sc_r();
void sc_w(uint16_t data);
uint16_t id_r();
void id_w(uint16_t data);
uint16_t novram_r(offs_t offset);
void novram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
DECLARE_WRITE_LINE_MEMBER(lance_int_w);
void lance_dma_out(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);

8
src/devices/bus/hp_dio/hp98644.cpp
View File

@ -161,13 +161,13 @@ void dio16_98644_device::device_reset()
dio().install_memory(
0x600000 + (code * 0x10000),
0x6007ff + (code * 0x10000),
read16_delegate(*this, FUNC(dio16_98644_device::io_r)),
write16_delegate(*this, FUNC(dio16_98644_device::io_w)));
read16sm_delegate(*this, FUNC(dio16_98644_device::io_r)),
write16sm_delegate(*this, FUNC(dio16_98644_device::io_w)));
m_installed_io = true;
}
}
READ16_MEMBER(dio16_98644_device::io_r)
uint16_t dio16_98644_device::io_r(offs_t offset)
{
uint16_t ret = 0xffff;
@ -204,7 +204,7 @@ READ16_MEMBER(dio16_98644_device::io_r)
return ret;
}
WRITE16_MEMBER(dio16_98644_device::io_w)
void dio16_98644_device::io_w(offs_t offset, uint16_t data)
{
if (offset == 0x0c)
m_loopback = (data & 0x10) ? true : false;

4
src/devices/bus/hp_dio/hp98644.h
View File

@ -38,8 +38,8 @@ protected:
// optional information overrides
virtual void device_add_mconfig(machine_config &config) override;
DECLARE_READ16_MEMBER(io_r);
DECLARE_WRITE16_MEMBER(io_w);
uint16_t io_r(offs_t offset);
void io_w(offs_t offset, uint16_t data);
required_device<ins8250_device> m_uart;

1
src/devices/bus/hp_dio/hp_dio.cpp
View File

@ -268,6 +268,7 @@ template<typename R, typename W> void dio16_device::install_memory(offs_t start,
template void dio16_device::install_memory<read16_delegate, write16_delegate >(offs_t start, offs_t end, read16_delegate rhandler, write16_delegate whandler);
template void dio16_device::install_memory<read16s_delegate, write16s_delegate >(offs_t start, offs_t end, read16s_delegate rhandler, write16s_delegate whandler);
template void dio16_device::install_memory<read16sm_delegate, write16sm_delegate >(offs_t start, offs_t end, read16sm_delegate rhandler, write16sm_delegate whandler);
void dio16_device::install_bank(offs_t start, offs_t end, const char *tag, uint8_t *data)
{

8
src/devices/bus/hp_dio/human_interface.cpp
View File

@ -119,8 +119,8 @@ void human_interface_device::device_start()
write8sm_delegate(*m_iocpu, FUNC(upi41_cpu_device::upi41_master_w)), 0x00ff00ff);
program_space().install_readwrite_handler(0x470000, 0x47001f, 0x1f, 0xffe0, 0,
read8_delegate(*this, FUNC(human_interface_device::gpib_r)),
write8_delegate(*this, FUNC(human_interface_device::gpib_w)), 0x00ff00ff);
read8sm_delegate(*this, FUNC(human_interface_device::gpib_r)),
write8sm_delegate(*this, FUNC(human_interface_device::gpib_w)), 0x00ff00ff);
save_item(NAME(m_hil_read));
save_item(NAME(m_kbd_nmi));
@ -192,7 +192,7 @@ void human_interface_device::ieee488_dio_w(uint8_t data)
}
}
WRITE8_MEMBER(human_interface_device::gpib_w)
void human_interface_device::gpib_w(offs_t offset, uint8_t data)
{
if (offset & 0x08) {
m_tms9914->write(offset & 0x07, data);
@ -230,7 +230,7 @@ WRITE8_MEMBER(human_interface_device::gpib_w)
LOG("gpib_w: %s %02X = %02X\n", machine().describe_context().c_str(), offset, data);
}
READ8_MEMBER(human_interface_device::gpib_r)
uint8_t human_interface_device::gpib_r(offs_t offset)
{
uint8_t data = 0xff;

4
src/devices/bus/hp_dio/human_interface.h
View File

@ -41,8 +41,8 @@ private:
uint8_t iocpu_test0_r();
/* GPIB */
DECLARE_READ8_MEMBER(gpib_r);
DECLARE_WRITE8_MEMBER(gpib_w);
uint8_t gpib_r(offs_t offset);
void gpib_w(offs_t offset, uint8_t data);
void ieee488_dio_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(gpib_irq);

4
src/devices/bus/ieee488/c8280.cpp
View File

@ -467,7 +467,7 @@ void c8280_device::ieee488_ifc(int state)
m_ifc = state;
}
READ8_MEMBER( c8280_device::fk5_r )
uint8_t c8280_device::fk5_r()
{
/*
@ -492,7 +492,7 @@ READ8_MEMBER( c8280_device::fk5_r )
return data;
}
WRITE8_MEMBER( c8280_device::fk5_w )
void c8280_device::fk5_w(uint8_t data)
{
/*

4
src/devices/bus/ieee488/c8280.h
View File

@ -55,8 +55,8 @@ private:
void riot1_pa_w(uint8_t data);
uint8_t riot1_pb_r();
void riot1_pb_w(uint8_t data);
DECLARE_READ8_MEMBER( fk5_r );
DECLARE_WRITE8_MEMBER( fk5_w );
uint8_t fk5_r();
void fk5_w(uint8_t data);
void c8280_fdc_mem(address_map &map);
void c8280_main_mem(address_map &map);

6
src/devices/bus/ieee488/hp9122c.cpp
View File

@ -265,7 +265,7 @@ void hp9122c_device::i8291a_dio_w(uint8_t data)
m_bus->dio_w(this, data);
}
READ8_MEMBER(hp9122c_device::status_r)
uint8_t hp9122c_device::status_r()
{
uint8_t ret = REG_STATUS_DUAL|REG_STATUS_DISKCHG;
auto addr = m_hpib_addr->read();
@ -290,7 +290,7 @@ READ8_MEMBER(hp9122c_device::status_r)
return ret;
}
WRITE8_MEMBER(hp9122c_device::cmd_w)
void hp9122c_device::cmd_w(uint8_t data)
{
floppy_image_device *floppy0 = m_floppy[0]->get_device();
floppy_image_device *floppy1 = m_floppy[1]->get_device();
@ -338,7 +338,7 @@ void hp9122c_device::index_pulse_cb(floppy_image_device *floppy, int state)
}
WRITE8_MEMBER(hp9122c_device::clridx_w)
void hp9122c_device::clridx_w(uint8_t data)
{
m_index_int = false;
update_intsel();

10
src/devices/bus/ieee488/hp9122c.h
View File

@ -109,13 +109,9 @@ private:
DECLARE_WRITE_LINE_MEMBER(fdc_intrq_w);
DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
DECLARE_WRITE8_MEMBER(cmd_w);
DECLARE_READ8_MEMBER(status_r);
DECLARE_WRITE8_MEMBER(clridx_w);
// Floppy drive interface
DECLARE_READ8_MEMBER(fdc_read);
DECLARE_WRITE8_MEMBER(fdc_write);
void cmd_w(uint8_t data);;
uint8_t status_r();
void clridx_w(uint8_t data);;
void cpu_map(address_map &map);

26
src/devices/bus/ieee488/hp9895.cpp
View File

@ -490,7 +490,7 @@ WRITE_LINE_MEMBER(hp9895_device::phi_int_w)
}
}
READ8_MEMBER(hp9895_device::phi_reg_r)
uint8_t hp9895_device::phi_reg_r(offs_t offset)
{
uint16_t reg = m_phi->reg16_r(offset);
@ -512,7 +512,7 @@ void hp9895_device::z80_m1_w(uint8_t data)
}
}
WRITE8_MEMBER(hp9895_device::data_w)
void hp9895_device::data_w(uint8_t data)
{
LOG_0(("W DATA=%02x\n" , data));
// CPU stalls until next SDOK
@ -522,13 +522,13 @@ WRITE8_MEMBER(hp9895_device::data_w)
m_accdata = true;
}
WRITE8_MEMBER(hp9895_device::clock_w)
void hp9895_device::clock_w(uint8_t data)
{
LOG_0(("W CLOCK=%02x\n" , data));
m_clock_reg = data;
}
WRITE8_MEMBER(hp9895_device::reset_w)
void hp9895_device::reset_w(uint8_t data)
{
LOG_0(("W RESET=%02x\n" , data));
if (BIT(data , REG_RESET_TIMEOUT_START_BIT)) {
@ -541,13 +541,13 @@ WRITE8_MEMBER(hp9895_device::reset_w)
// TODO: PROGRES
}
WRITE8_MEMBER(hp9895_device::leds_w)
void hp9895_device::leds_w(uint8_t data)
{
LOG(("W LEDS=%02x %c%c%c%c%c\n" , data , BIT(data , 4) ? '.' : '*' , BIT(data , 3) ? '.' : '*' , BIT(data , 2) ? '.' : '*' , BIT(data , 1) ? '.' : '*' , BIT(data , 0) ? '.' : '*'));
// TODO:
}
WRITE8_MEMBER(hp9895_device::cntl_w)
void hp9895_device::cntl_w(uint8_t data)
{
if (data != m_cntl_reg) {
LOG_0(("W CNTL=%02x -> %02x\n" , m_cntl_reg , data));
@ -608,7 +608,7 @@ WRITE8_MEMBER(hp9895_device::cntl_w)
}
}
WRITE8_MEMBER(hp9895_device::drv_w)
void hp9895_device::drv_w(uint8_t data)
{
LOG_0(("W DRV=%02x\n" , data));
m_mgnena = BIT(data , REG_DRV_MGNENA_BIT);
@ -620,7 +620,7 @@ WRITE8_MEMBER(hp9895_device::drv_w)
}
}
WRITE8_MEMBER(hp9895_device::xv_w)
void hp9895_device::xv_w(uint8_t data)
{
LOG_0(("W XV=%02x\n" , data));
// Disk Changed flag is cleared when drive is ready and it is deselected
@ -644,7 +644,7 @@ WRITE8_MEMBER(hp9895_device::xv_w)
m_hiden = BIT(data , REG_XV_HIDEN_BIT);
}
READ8_MEMBER(hp9895_device::data_r)
uint8_t hp9895_device::data_r()
{
m_clock_reg = m_clock_sr;
m_accdata = true;
@ -654,12 +654,12 @@ READ8_MEMBER(hp9895_device::data_r)
return m_data_sr;
}
READ8_MEMBER(hp9895_device::clock_r)
uint8_t hp9895_device::clock_r()
{
return m_clock_reg;
}
READ8_MEMBER(hp9895_device::drivstat_r)
uint8_t hp9895_device::drivstat_r()
{
uint8_t res = 0;
@ -693,14 +693,14 @@ READ8_MEMBER(hp9895_device::drivstat_r)
return res;
}
READ8_MEMBER(hp9895_device::switches_r)
uint8_t hp9895_device::switches_r()
{
uint8_t res = get_switches2();
res |= m_switches->read();
return res;
}
READ8_MEMBER(hp9895_device::switches2_r)
uint8_t hp9895_device::switches2_r()
{
return get_switches2();
}

26
src/devices/bus/ieee488/hp9895.h
View File

@ -68,21 +68,21 @@ private:
void z80_m1_w(uint8_t data);
// Floppy interface
DECLARE_WRITE8_MEMBER(data_w);
DECLARE_WRITE8_MEMBER(clock_w);
DECLARE_WRITE8_MEMBER(reset_w);
DECLARE_WRITE8_MEMBER(leds_w);
DECLARE_WRITE8_MEMBER(cntl_w);
DECLARE_WRITE8_MEMBER(drv_w);
DECLARE_WRITE8_MEMBER(xv_w);
DECLARE_READ8_MEMBER(data_r);
DECLARE_READ8_MEMBER(clock_r);
DECLARE_READ8_MEMBER(drivstat_r);
DECLARE_READ8_MEMBER(switches_r);
DECLARE_READ8_MEMBER(switches2_r);
void data_w(uint8_t data);
void clock_w(uint8_t data);
void reset_w(uint8_t data);
void leds_w(uint8_t data);
void cntl_w(uint8_t data);
void drv_w(uint8_t data);
void xv_w(uint8_t data);
uint8_t data_r();
uint8_t clock_r();
uint8_t drivstat_r();
uint8_t switches_r();
uint8_t switches2_r();
// PHI register read
DECLARE_READ8_MEMBER(phi_reg_r);
uint8_t phi_reg_r(offs_t offset);
// Floppy drive interface
void floppy_ready_cb(floppy_image_device *floppy , int state);

2
src/devices/bus/ieee488/softbox.cpp
View File

@ -376,7 +376,7 @@ void softbox_device::ieee488_ifc(int state)
// dbrg_w - baud rate selection
//-------------------------------------------------
WRITE8_MEMBER( softbox_device::dbrg_w )
void softbox_device::dbrg_w(uint8_t data)
{
m_dbrg->str_w(data & 0x0f);
m_dbrg->stt_w(data >> 4);

2
src/devices/bus/ieee488/softbox.h
View File

@ -57,7 +57,7 @@ private:
uint8_t ppi1_pc_r();
void ppi1_pc_w(uint8_t data);
DECLARE_WRITE8_MEMBER( dbrg_w );
void dbrg_w(uint8_t data);
void softbox_io(address_map &map);
void softbox_mem(address_map &map);

10
src/devices/bus/intellec4/insdatastor.cpp
View File

@ -100,19 +100,19 @@ WRITE_LINE_MEMBER(imm4_22_device::reset_4002_in)
}
WRITE8_MEMBER(imm4_22_device::ram_out)
void imm4_22_device::ram_out(offs_t offset, u8 data)
{
// GPIO write - hooking this up would be a pain with MAME as it is
logerror("4002 A%u out %X\n", 13U + (offset & 0x03U), data & 0x0fU);
}
WRITE8_MEMBER(imm4_22_device::rom_out)
void imm4_22_device::rom_out(offs_t offset, u8 data)
{
// GPIO write - hooking this up would be a pain with MAME as it is
logerror("ROM %u out %X\n", (m_rom_page << 2) | ((offset >> 4) & 0x03U), data & 0x0fU);
}
READ8_MEMBER(imm4_22_device::rom_in)
u8 imm4_22_device::rom_in(offs_t offset)
{
// GPIO read - hooking this up would be a pain with MAME as it is
if (!machine().side_effects_disabled())
@ -155,7 +155,7 @@ void imm4_22_device::map_ram_io()
{
memory_space().install_ram(start << 8, (start << 8) | 0x00ffU, m_memory);
status_space().install_ram(start << 6, (start << 6) | 0x003fU, m_status);
ram_ports_space().install_write_handler(start << 2, (start << 2) | 0x03U, write8_delegate(*this, FUNC(imm4_22_device::ram_out)));
ram_ports_space().install_write_handler(start << 2, (start << 2) | 0x03U, write8sm_delegate(*this, FUNC(imm4_22_device::ram_out)));
}
offs_t const rom_ports_start(offs_t(m_rom_page) << 6);
@ -163,7 +163,7 @@ void imm4_22_device::map_ram_io()
offs_t const rom_ports_mirror(m_rom_mirror ? 0x1f00U : 0x0700U);
rom_ports_space().install_readwrite_handler(
rom_ports_start, rom_ports_end, 0U, rom_ports_mirror, 0U,
read8_delegate(*this, FUNC(imm4_22_device::rom_in)), write8_delegate(*this, FUNC(imm4_22_device::rom_out)));
read8sm_delegate(*this, FUNC(imm4_22_device::rom_in)), write8sm_delegate(*this, FUNC(imm4_22_device::rom_out)));
if (is_loaded())
map_prom();

6
src/devices/bus/intellec4/insdatastor.h
View File

@ -172,9 +172,9 @@ protected:
virtual DECLARE_WRITE_LINE_MEMBER(reset_4002_in) override;
private:
DECLARE_WRITE8_MEMBER(ram_out);
DECLARE_WRITE8_MEMBER(rom_out);
DECLARE_READ8_MEMBER(rom_in);
void ram_out(offs_t offset, u8 data);
void rom_out(offs_t offset, u8 data);
u8 rom_in(offs_t offset);
void allocate();
void map_ram_io();

8
src/devices/bus/intellec4/tapereader.cpp
View File

@ -50,10 +50,10 @@ void imm4_90_device::device_start()
save_item(NAME(m_advance));
save_item(NAME(m_stepping));
rom_ports_space().install_read_handler(0x0040U, 0x004fU, 0x0000U, 0x1f00U, 0x0000, read8_delegate(*this, FUNC(imm4_90_device::rom4_in)));
rom_ports_space().install_read_handler(0x0060U, 0x006fU, 0x0000U, 0x1f00U, 0x0000, read8_delegate(*this, FUNC(imm4_90_device::rom6_in)));
rom_ports_space().install_read_handler(0x0070U, 0x007fU, 0x0000U, 0x1f00U, 0x0000, read8_delegate(*this, FUNC(imm4_90_device::rom7_in)));
rom_ports_space().install_write_handler(0x0040U, 0x004fU, 0x0000U, 0x1f00U, 0x0000, write8_delegate(*this, FUNC(imm4_90_device::rom4_out)));
rom_ports_space().install_read_handler(0x0040U, 0x004fU, 0x0000U, 0x1f00U, 0x0000, read8smo_delegate(*this, FUNC(imm4_90_device::rom4_in)));
rom_ports_space().install_read_handler(0x0060U, 0x006fU, 0x0000U, 0x1f00U, 0x0000, read8smo_delegate(*this, FUNC(imm4_90_device::rom6_in)));
rom_ports_space().install_read_handler(0x0070U, 0x007fU, 0x0000U, 0x1f00U, 0x0000, read8smo_delegate(*this, FUNC(imm4_90_device::rom7_in)));
rom_ports_space().install_write_handler(0x0040U, 0x004fU, 0x0000U, 0x1f00U, 0x0000, write8smo_delegate(*this, FUNC(imm4_90_device::rom4_out)));
}

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