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srcclean and cleanup (nw)

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This commit is contained in:
Vas Crabb 2019-01-27 14:22:20 +11:00
parent 212f26f759
commit 76323eb770
178 changed files with 4212 additions and 4204 deletions
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6170
hash/apple2_flop_orig.xml
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File diff suppressed because it is too large Load Diff

14
hash/clickstart_cart.xml
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@ -158,7 +158,7 @@
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="toystors" cloneof="toystor" supported="no"> <software name="toystors" cloneof="toystor" supported="no">
<description>Toy Story (SP)</description> <description>Toy Story (SP)</description>
<year>2007</year> <year>2007</year>
@ -171,8 +171,8 @@
<rom name="500-12894-a - toy story (sp).bin" size="0x400000" crc="91a748f6" sha1="05da46b6ded3fee24bc1167395f8139647368b68" offset="0" /> <rom name="500-12894-a - toy story (sp).bin" size="0x400000" crc="91a748f6" sha1="05da46b6ded3fee24bc1167395f8139647368b68" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="bobbuild" supported="no"> <software name="bobbuild" supported="no">
<description>Bob the Builder (UK)</description> <description>Bob the Builder (UK)</description>
<year>2007</year> <year>2007</year>
@ -185,8 +185,8 @@
<rom name="500-13084-a - bob the builder (uk).bin" size="0x400000" crc="387920df" sha1="ac071987f5389604f368ea0a59962a0c28f73a80" offset="0" /> <rom name="500-13084-a - bob the builder (uk).bin" size="0x400000" crc="387920df" sha1="ac071987f5389604f368ea0a59962a0c28f73a80" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="thomas" supported="no"> <software name="thomas" supported="no">
<description>Thomas &amp; Friends (UK)</description> <description>Thomas &amp; Friends (UK)</description>
<year>2007</year> <year>2007</year>
@ -199,7 +199,7 @@
<rom name="500-12781-a - thomas and friends (uk).bin" size="0x400000" crc="8485c99a" sha1="2a4899868f383b8a6e8cdc0e65dfed86222ff697" offset="0" /> <rom name="500-12781-a - thomas and friends (uk).bin" size="0x400000" crc="8485c99a" sha1="2a4899868f383b8a6e8cdc0e65dfed86222ff697" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="dora" supported="no"> <software name="dora" supported="no">
<description>Dora the Explorer (UK)</description> <description>Dora the Explorer (UK)</description>
@ -213,6 +213,6 @@
<rom name="500-12729-a - dora the explorer (uk).bin" size="0x400000" crc="e93bd91a" sha1="e4c9649becd6370d555c6475cb491ba78c54ad17" offset="0" /> <rom name="500-12729-a - dora the explorer (uk).bin" size="0x400000" crc="e93bd91a" sha1="e4c9649becd6370d555c6475cb491ba78c54ad17" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
</softwarelist> </softwarelist>

60
hash/ekara_japan.xml
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@ -7,9 +7,9 @@
Japanese e-kara carts appear to have a number of different genres split across various Japanese e-kara carts appear to have a number of different genres split across various
cart sub-series (often supporting different hw types) special releases etc. cart sub-series (often supporting different hw types) special releases etc.
This file is for the base set (number on case, ECxxxx-xxx part numbers) This file is for the base set (number on case, ECxxxx-xxx part numbers)
The genres in the Japanese games are represented by the code after the EC/DC/MC/GC/PC etc. number The genres in the Japanese games are represented by the code after the EC/DC/MC/GC/PC etc. number
JPM = J-Pop Mix JPM = J-Pop Mix
ATS = Artist Selection (all songs by a single artist) ATS = Artist Selection (all songs by a single artist)
@ -27,21 +27,21 @@
ATM = unknown (used by the M series 'mini' carts) ATM = unknown (used by the M series 'mini' carts)
TPJ = TV Pop TPJ = TV Pop
MIN = unknown MIN = unknown
Some Japanese carts have a number starting with S (S-x on case, SCxxxx-xxx part numbers) (see ekara_japan_s.xml) (for e-kara - custom presentation) Some Japanese carts have a number starting with S (S-x on case, SCxxxx-xxx part numbers) (see ekara_japan_s.xml) (for e-kara - custom presentation)
M (M-x on case, MCxxxx-xxx part numbers) (see ekara_japan_m.xml) (for e-kara - custom presentation) M (M-x on case, MCxxxx-xxx part numbers) (see ekara_japan_m.xml) (for e-kara - custom presentation)
EN (EN-X on case, no part numbers) (see ekara_japan_en.xml) (for e-kara - custom presentation) (check other compatibility) EN (EN-X on case, no part numbers) (see ekara_japan_en.xml) (for e-kara - custom presentation) (check other compatibility)
G (G-x on case, GCxxxx-xxx part numbers) (see ekara_japan_g.xml) (for e-kara, Popira / 2) G (G-x on case, GCxxxx-xxx part numbers) (see ekara_japan_g.xml) (for e-kara, Popira / 2)
P (P-x on case, PCxxxx-xxx part numbers) (see ekara_japan_p.xml) (for e-kara, Popira / 2, DDR Family Mat) P (P-x on case, PCxxxx-xxx part numbers) (see ekara_japan_p.xml) (for e-kara, Popira / 2, DDR Family Mat)
D (D-x on case, DCxxxx-xxx part numbers) (see ekara_japan_d.xml) (for e-kara, Popira / 2, Taiko De Popira) D (D-x on case, DCxxxx-xxx part numbers) (see ekara_japan_d.xml) (for e-kara, Popira / 2, Taiko De Popira)
SP (SP-x on case, no part numbers) (see ekara_japan_sp.xml) (for e-kara, Popira / 2, Taiko de Popira, Jumping Popira) SP (SP-x on case, no part numbers) (see ekara_japan_sp.xml) (for e-kara, Popira / 2, Taiko de Popira, Jumping Popira)
these exist but haven't got any these exist but haven't got any
Some Japanese carts have a number starting with JP (for Jumping Popira Only?) Some Japanese carts have a number starting with JP (for Jumping Popira Only?)
A (for Pichi Pichi Pitch Only?) A (for Pichi Pichi Pitch Only?)
KE (for Kids Lyric book device Only?) KE (for Kids Lyric book device Only?)
KD (for e-kara?) KD (for e-kara?)
(there are others, need to document them) (there are others, need to document them)
@ -50,7 +50,7 @@
Genres can cross multiple cart types, eg. TV Pop 1,3,4,5,6 are in the 'G' series, while TV Pop 2 is in the 'P' series, and TV Pop 9 is in the 'D' series (where are 7,8?) Genres can cross multiple cart types, eg. TV Pop 1,3,4,5,6 are in the 'G' series, while TV Pop 2 is in the 'P' series, and TV Pop 9 is in the 'D' series (where are 7,8?)
for non-Japanese carts see ekara_us.xml and ekara_pal.xml, the PAL ones are noteworthy for using a different timing system for non-Japanese carts see ekara_us.xml and ekara_pal.xml, the PAL ones are noteworthy for using a different timing system
*********************************************************************************** ***********************************************************************************
Japanese cart listing (by 'just number' code) (number on cartridge / box, EC in cart identifier code) Japanese cart listing (by 'just number' code) (number on cartridge / box, EC in cart identifier code)
@ -312,7 +312,7 @@
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="ec0010"> <software name="ec0010">
<description>Kid's Mix Volume 1 (Japan) (EC0010-KID)</description> <description>Kid's Mix Volume 1 (Japan) (EC0010-KID)</description>
<year>2000</year> <year>2000</year>
@ -369,7 +369,7 @@
</software> </software>
<!-- EC0016-ENK ENK Volume 2 --> <!-- EC0016-ENK ENK Volume 2 -->
<!-- EC0017-G73 1973-75 Volume 1 --> <!-- EC0017-G73 1973-75 Volume 1 -->
<software name="ec0018"> <software name="ec0018">
@ -386,7 +386,7 @@
<!-- EC0019-BSC Graduation Encouragement Volume 1 --> <!-- EC0019-BSC Graduation Encouragement Volume 1 -->
<!-- EC0020-KID Kid's Mix Volume 2 --> <!-- EC0020-KID Kid's Mix Volume 2 -->
<software name="ec0021"> <software name="ec0021">
<description>J-Pop Mix Volume 9 (Japan) (EC0021-JPM)</description> <description>J-Pop Mix Volume 9 (Japan) (EC0021-JPM)</description>
<year>2000</year> <year>2000</year>
@ -604,7 +604,7 @@
<rom name="ec0044-ats.u1" size="0x100000" crc="5ed25544" sha1="2cb30b442d97813af32530c6f61d7fcc7653f533" offset="0" /> <rom name="ec0044-ats.u1" size="0x100000" crc="5ed25544" sha1="2cb30b442d97813af32530c6f61d7fcc7653f533" offset="0" />
<!-- this has 0x0b at address 0x00007 in an otherwise list of ascending values, above dump has 0x0f and looks more correct <!-- this has 0x0b at address 0x00007 in an otherwise list of ascending values, above dump has 0x0f and looks more correct
both dumps have been verified multiple times, so this appears to be a case of bitrot in the cartridge the dump below was taken from --> both dumps have been verified multiple times, so this appears to be a case of bitrot in the cartridge the dump below was taken from -->
<!--<rom name="ec0044-ats.u1" size="0x100000" crc="06557370" sha1="0ce7a193b214adaf14f3332ddd8ccbcbec830985" offset="0" />--> <!--<rom name="ec0044-ats.u1" size="0x100000" crc="06557370" sha1="0ce7a193b214adaf14f3332ddd8ccbcbec830985" offset="0" />-->
</dataarea> </dataarea>
</part> </part>
</software> </software>
@ -740,11 +740,11 @@
<!-- EC0064-ENK ENK Volume 9 --> <!-- EC0064-ENK ENK Volume 9 -->
<!-- EC0065-JPM J-Pop Mix Volume 30 --> <!-- EC0065-JPM J-Pop Mix Volume 30 -->
<!-- EC0066-JPM J-Pop Mix Volume 31 --> <!-- EC0066-JPM J-Pop Mix Volume 31 -->
<!-- EC0067-JPM J-Pop Mix Volume 32 --> <!-- EC0067-JPM J-Pop Mix Volume 32 -->
<software name="ec0068"> <software name="ec0068">
<description>J-Pop Mix Volume 33 (Japan) (EC0068-JPM)</description> <description>J-Pop Mix Volume 33 (Japan) (EC0068-JPM)</description>
<year>2001</year> <year>2001</year>
@ -783,9 +783,9 @@
</software> </software>
<!-- EC0073- untranslated volume 1 --> <!-- EC0073- untranslated volume 1 -->
<!-- EC0074-JPM J-Pop Mix Volume 37 --> <!-- EC0074-JPM J-Pop Mix Volume 37 -->
<!-- EC0075-JPM J-Pop Mix Volume 38 --> <!-- EC0075-JPM J-Pop Mix Volume 38 -->
<software name="ec0076"> <software name="ec0076">
@ -798,11 +798,11 @@
</dataarea> </dataarea>
</part> </part>
</software> </software>
<!-- EC0077-ATS Artist Selection Volume 15 - unknown artist --> <!-- EC0077-ATS Artist Selection Volume 15 - unknown artist -->
<!-- EC0078- (unknown) --> <!-- EC0078- (unknown) -->
<software name="ec0079"> <!-- custom presentation --> <software name="ec0079"> <!-- custom presentation -->
<description>ETZ (Japan) (EC0079-ETZ)</description> <!-- Japanese text in 'Volume' box --> <description>ETZ (Japan) (EC0079-ETZ)</description> <!-- Japanese text in 'Volume' box -->
<year>2002</year> <year>2002</year>
@ -812,12 +812,12 @@
<rom name="ec0079-etz.u1" size="0x200000" crc="c03b5411" sha1="a88156aec4e0f024461f129c955a953647f51554" offset="0" /> <rom name="ec0079-etz.u1" size="0x200000" crc="c03b5411" sha1="a88156aec4e0f024461f129c955a953647f51554" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
<!-- EC0080- (unknown) --> <!-- EC0080- (unknown) -->
<!-- EC0081-JPM J-Pop Mix Volume 42 --> <!-- EC0081-JPM J-Pop Mix Volume 42 -->
<software name="ec0082"> <!-- custom presentation --> <software name="ec0082"> <!-- custom presentation -->
<description>Matthew's Best Hit Selection (Japan) (EC0082-MBH)</description> <description>Matthew's Best Hit Selection (Japan) (EC0082-MBH)</description>
<year>2003</year> <year>2003</year>
@ -827,12 +827,12 @@
<rom name="ec0082-mbh.u1" size="0x100000" crc="3998e478" sha1="29dad31dfd79c57b2ccec0caac81b3489946b798" offset="0" /> <rom name="ec0082-mbh.u1" size="0x100000" crc="3998e478" sha1="29dad31dfd79c57b2ccec0caac81b3489946b798" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
<!-- EC0083-JPM J-Pop Mix Volume 43 --> <!-- EC0083-JPM J-Pop Mix Volume 43 -->
<!-- EC0084- (unknown, seen) --> <!-- EC0084- (unknown, seen) -->
<!-- EC0085- (unknown, seen in the wild) --> <!-- EC0085- (unknown, seen in the wild) -->
</softwarelist> </softwarelist>

6
hash/ekara_japan_d.xml
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@ -21,12 +21,12 @@
D-3 DC0003-BHT BHT (Best Artists?) Volume 9? (most other BHT carts are in G series, or P series) D-3 DC0003-BHT BHT (Best Artists?) Volume 9? (most other BHT carts are in G series, or P series)
D-4 DC0004- (unknown) D-4 DC0004- (unknown)
*D-5 DC0005-TPJ TV Pop Volume 9 *D-5 DC0005-TPJ TV Pop Volume 9
D-6 DC0006- (seen) D-6 DC0006- (seen)
D-7 DC0007- (seen) D-7 DC0007- (seen)
D-8 DC0008- (seen) D-8 DC0008- (seen)
(more? what's the D highest number?) (more? what's the D highest number?)
--> -->
<software name="dc0002"> <software name="dc0002">

12
hash/ekara_japan_en.xml
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@ -5,11 +5,11 @@
<!-- <!--
Japanese cart listing (by EN code) * = dumped Japanese cart listing (by EN code) * = dumped
* = dumped * = dumped
These don't seem to have a secondary numbering scheme (eg ENxxxx-xxx) These don't seem to have a secondary numbering scheme (eg ENxxxx-xxx)
(check what units these are for) (check what units these are for)
EN-1 (unknown) EN-1 (unknown)
EN-2 (unknown) EN-2 (unknown)
*EN-3 (unknown) *EN-3 (unknown)
@ -17,7 +17,7 @@
(more? what's the EN highest number?) (more? what's the EN highest number?)
--> -->
<software name="en3"> <software name="en3">
<description>EN-3 (Japan)</description> <description>EN-3 (Japan)</description>
<year>2004</year> <year>2004</year>
@ -27,6 +27,6 @@
<rom name="en-3.u1" size="0x100000" crc="e3686ff4" sha1="e7e9a53a778739c406b2b226300d2f525cd9676b" offset="0" /> <rom name="en-3.u1" size="0x100000" crc="e3686ff4" sha1="e7e9a53a778739c406b2b226300d2f525cd9676b" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
</softwarelist> </softwarelist>

36
hash/ekara_japan_g.xml
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@ -32,7 +32,7 @@
(more? what's the G highest number?) (more? what's the G highest number?)
--> -->
<software name="gc0001"> <software name="gc0001">
<description>BAT Volume 1 (Japan) (GC0001-BAT)</description> <description>BAT Volume 1 (Japan) (GC0001-BAT)</description>
<year>2000</year> <year>2000</year>
@ -65,7 +65,7 @@
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="gc0004"> <software name="gc0004">
<description>BHT Volume 2 (Japan) (GC0004-BHT)</description> <description>BHT Volume 2 (Japan) (GC0004-BHT)</description>
<year>2000</year> <year>2000</year>
@ -76,7 +76,7 @@
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="gc0006"> <software name="gc0006">
<description>BHT Volume 3 (Japan) (GC0006-BHT)</description> <description>BHT Volume 3 (Japan) (GC0006-BHT)</description>
<year>2000</year> <year>2000</year>
@ -87,18 +87,18 @@
</dataarea> </dataarea>
</part> </part>
</software> </software>
<!-- Notes from Sean <!-- Notes from Sean
G10 has a 24LC02, but no 74HC125, and pin 2 isn't connected. G10 has a 24LC02, but no 74HC125, and pin 2 isn't connected.
G10 is very odd; the SEEPROM's SDA is tied high with a 4.7K resistor and connected to pin 4 through a 220 ohm resistor. G10 is very odd; the SEEPROM's SDA is tied high with a 4.7K resistor and connected to pin 4 through a 220 ohm resistor.
Pin 4 on the other carts I've looked at is VCC, also connected to pins 21 and 35, but on this one, it isn't. Pin 4 on the other carts I've looked at is VCC, also connected to pins 21 and 35, but on this one, it isn't.
Likewise, SCL is tied low with a 47K resistor and connected to pin 32, which on all the other carts is connected to pins 1 and 44, which are ground. Likewise, SCL is tied low with a 47K resistor and connected to pin 32, which on all the other carts is connected to pins 1 and 44, which are ground.
e-Kara units, Popira, Taiko de Popira and DDR all of them have pin 4 of the cart connector going to VCC and pin 32 going to ground. So none of them can communicate with the SEEPROM in G10
Unless Popira 2 is different (unlikely) it doesn't look like the SEEPROM in this cartridge can be used (unfinished design?) --> e-Kara units, Popira, Taiko de Popira and DDR all of them have pin 4 of the cart connector going to VCC and pin 32 going to ground. So none of them can communicate with the SEEPROM in G10
Unless Popira 2 is different (unlikely) it doesn't look like the SEEPROM in this cartridge can be used (unfinished design?) -->
<software name="gc0010"> <software name="gc0010">
<description>BAT Volume 4 (Japan) (GC0010-BAT)</description> <description>BAT Volume 4 (Japan) (GC0010-BAT)</description>
<year>2002</year> <year>2002</year>
@ -109,9 +109,9 @@
<rom name="gc0010-bat.u1" size="0x100000" crc="c08be376" sha1="28cb6baacf64e0382fd9c8bb7167d7fdd96f57ee" offset="0" /> <rom name="gc0010-bat.u1" size="0x100000" crc="c08be376" sha1="28cb6baacf64e0382fd9c8bb7167d7fdd96f57ee" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
<!-- G15 looks like G16- 74HC125 and 24LC02. --> <!-- G15 looks like G16- 74HC125 and 24LC02. -->
<software name="gc0015"> <software name="gc0015">
<description>BAT Volume 5 (Japan) (GC0015-BAT)</description> <description>BAT Volume 5 (Japan) (GC0015-BAT)</description>
@ -123,8 +123,8 @@
<rom name="gc0015-bat.u1" size="0x100000" crc="a839b745" sha1="a02bd29383baf1f92b3573aaa6343cc309a6f589" offset="0" /> <rom name="gc0015-bat.u1" size="0x100000" crc="a839b745" sha1="a02bd29383baf1f92b3573aaa6343cc309a6f589" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="gc0016"> <software name="gc0016">
<description>TV Pop Volume 5 (Japan) (GC0016-TPJ)</description> <description>TV Pop Volume 5 (Japan) (GC0016-TPJ)</description>
<year>2002</year> <year>2002</year>
@ -135,6 +135,6 @@
<rom name="gc0016-tpj.u1" size="0x100000" crc="52d81c55" sha1="c2fad86a2507589625cb507c3e1395cb662f9e34" offset="0" /> <rom name="gc0016-tpj.u1" size="0x100000" crc="52d81c55" sha1="c2fad86a2507589625cb507c3e1395cb662f9e34" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
</softwarelist> </softwarelist>

4
hash/ekara_japan_m.xml
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@ -18,11 +18,11 @@
M-11 M-11
M-12 M-12
M-13 MC0013-KSM KSM Mini Volume 5 M-13 MC0013-KSM KSM Mini Volume 5
(more? what's the M highest number?) (more? what's the M highest number?)
--> -->
<!-- Japanese e-kara cartridges MC (Mini) series --> <!-- Japanese e-kara cartridges MC (Mini) series -->
<!-- these have unique presentation --> <!-- these have unique presentation -->

8
hash/ekara_japan_p.xml
View File

@ -39,17 +39,17 @@
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="pc0004"> <software name="pc0004">
<description>BHT Volume 7 (Japan) (PC0004-BHT)</description> <description>BHT Volume 7 (Japan) (PC0004-BHT)</description>
<year>2002</year> <year>2002</year>
<publisher>Takara</publisher> <publisher>Takara</publisher>
<part name="cart" interface="ekara_cart"> <part name="cart" interface="ekara_cart">
<feature name="slot" value="rom_24lc02"/> <feature name="slot" value="rom_24lc02"/>
<dataarea name="rom" size="0x100000"> <dataarea name="rom" size="0x100000">
<rom name="pc0004-bht.u1" size="0x100000" crc="95e35899" sha1="a9bd2694f5ee4b964e8d73afc3e88c0eb18ca1d2" offset="0" /> <rom name="pc0004-bht.u1" size="0x100000" crc="95e35899" sha1="a9bd2694f5ee4b964e8d73afc3e88c0eb18ca1d2" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
</softwarelist> </softwarelist>

6
hash/ekara_japan_s.xml
View File

@ -13,7 +13,7 @@
S-1 SC0001- Hello Kitty Special S-1 SC0001- Hello Kitty Special
S-2 SC0002- (unknown) S-2 SC0002- (unknown)
S-3 SC0003- (unknown) S-3 SC0003- (unknown)
S-4 *SC0004-SAI SAI (series 1) Volume 1 S-4 *SC0004-SAI SAI (series 1) Volume 1
S-5 *SC0005-SAI SAI (series 2) Volume 1 (same series as 6,9,19,21,22) S-5 *SC0005-SAI SAI (series 2) Volume 1 (same series as 6,9,19,21,22)
S-6 *SC0006-SAI SAI (series 2) Volume 2 (same series as 5,9,19,21,22) S-6 *SC0006-SAI SAI (series 2) Volume 2 (same series as 5,9,19,21,22)
S-7 SC0007- (unknown) S-7 SC0007- (unknown)
@ -21,7 +21,7 @@
S-9 *SC0009-SAI SAI (series 2) Volume 3 (same series as 5,6,19,21,22) S-9 *SC0009-SAI SAI (series 2) Volume 3 (same series as 5,6,19,21,22)
S-10 *SC0010-HWK HWK (untranslated) S-10 *SC0010-HWK HWK (untranslated)
S-11 SC0011- (unknown) S-11 SC0011- (unknown)
S-12 *SC0012-SAI SAI (series 3) Volume 3 S-12 *SC0012-SAI SAI (series 3) Volume 3
S-13 SC0013- (unknown) S-13 SC0013- (unknown)
S-14 SC0014- (unknown) S-14 SC0014- (unknown)
S-15 SC0015- (unknown) S-15 SC0015- (unknown)
@ -35,7 +35,7 @@
S-23 SC0023- (unknown) S-23 SC0023- (unknown)
(more? what's the S highest number?) (more? what's the S highest number?)
--> -->
<!-- Japanese e-kara cartridges SC (Special?) series --> <!-- Japanese e-kara cartridges SC (Special?) series -->

10
hash/ekara_japan_sp.xml
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@ -7,7 +7,7 @@
*********************************************************************************** ***********************************************************************************
Japanese cart listing (by SP code) * = dumped Japanese cart listing (by SP code) * = dumped
These don't seem to have a secondary numbering scheme (eg SPxxxx-xxx) These don't seem to have a secondary numbering scheme (eg SPxxxx-xxx)
These are for use with 5 different units These are for use with 5 different units
@ -16,14 +16,14 @@
3. Popira 2 (Blue/Green) ( https://www.youtube.com/watch?v=iY1I-jfXw7U ) 3. Popira 2 (Blue/Green) ( https://www.youtube.com/watch?v=iY1I-jfXw7U )
4. Taiko de Popira 4. Taiko de Popira
5. Jumping Popira (Stepping Mat type thing) ( https://www.youtube.com/watch?v=yJruMOBdLFY ) 5. Jumping Popira (Stepping Mat type thing) ( https://www.youtube.com/watch?v=yJruMOBdLFY )
If you plug this into a DDR Family Mat you get the message (in Japanese) If you plug this into a DDR Family Mat you get the message (in Japanese)
"please play this cartridge on e-kara series, popira, popira 2, taiko de popira or jumping popira" "please play this cartridge on e-kara series, popira, popira 2, taiko de popira or jumping popira"
gives 'memory error' if plugged into Popira (needs cartridge SEEPROM emulating) gives 'memory error' if plugged into Popira (needs cartridge SEEPROM emulating)
gives 'eep-rom error' if plugged into Taiko de Popira (same reason) gives 'eep-rom error' if plugged into Taiko de Popira (same reason)
SP-01 (unknown) SP-01 (unknown)
*SP-02 'Super Cartridge' SP-2 *SP-02 'Super Cartridge' SP-2
SP-03 (unknown) SP-03 (unknown)
@ -46,5 +46,5 @@
<rom name="sp02.u1" size="0x200000" crc="c8a84ded" sha1="02ffa04cdc7732fd3ab75505c5cc68bda130c7ee" offset="0" /> <rom name="sp02.u1" size="0x200000" crc="c8a84ded" sha1="02ffa04cdc7732fd3ab75505c5cc68bda130c7ee" offset="0" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
</softwarelist> </softwarelist>

2
hash/ekara_us.xml
View File

@ -229,5 +229,5 @@
</dataarea> </dataarea>
</part> </part>
</software> </software>
</softwarelist> </softwarelist>

34
hash/jakks_gamekey_dy.xml
View File

@ -1,12 +1,12 @@
<?xml version="1.0"?> <?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd"> <!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="jakks_gamekey_dy" description="JAKKS Pacific 'DY' Game Keys"> <softwarelist name="jakks_gamekey_dy" description="JAKKS Pacific 'DY' Game Keys">
<!-- This list is for the 'DY' coded Game Keys, for Disney base systems (not Disney Princess) --> <!-- This list is for the 'DY' coded Game Keys, for Disney base systems (not Disney Princess) -->
<!-- One of them doesn't use the /OE signal from the game, and has 16 10K resistors tying the data lines high. <!-- One of them doesn't use the /OE signal from the game, and has 16 10K resistors tying the data lines high.
Silkscreened onto both PCBs is the text A1 A2 A3 A4 with 2 boxes next to each with H and L. Both PCBs are marked A1 H A3 L. --> Silkscreened onto both PCBs is the text A1 A2 A3 A4 with 2 boxes next to each with H and L. Both PCBs are marked A1 H A3 L. -->
<software name="sbwlgoof" supported="no"> <!-- AT24C04 SEEPROM --> <software name="sbwlgoof" supported="no"> <!-- AT24C04 SEEPROM -->
<description>Sports Bowling &amp; Goofy's Underwater Adventure</description> <description>Sports Bowling &amp; Goofy's Underwater Adventure</description>
<year>2005</year> <year>2005</year>
@ -14,9 +14,9 @@
<part name="cart" interface="jakks_gamekey"> <part name="cart" interface="jakks_gamekey">
<dataarea name="rom" size="0x800000"> <dataarea name="rom" size="0x800000">
<rom name="dy_disneygkbowlinggoofy.bin" size="0x200000" crc="d2147aa4" sha1="0db986aac68868a2ff4936e93178da8c592ac81d" offset="0" /> <rom name="dy_disneygkbowlinggoofy.bin" size="0x200000" crc="d2147aa4" sha1="0db986aac68868a2ff4936e93178da8c592ac81d" offset="0" />
<rom size="0x200000" offset="0x200000" loadflag="reload" /> <rom size="0x200000" offset="0x200000" loadflag="reload" />
<rom size="0x200000" offset="0x400000" loadflag="reload" /> <rom size="0x200000" offset="0x400000" loadflag="reload" />
<rom size="0x200000" offset="0x600000" loadflag="reload" /> <rom size="0x200000" offset="0x600000" loadflag="reload" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
@ -28,13 +28,13 @@
<part name="cart" interface="jakks_gamekey"> <part name="cart" interface="jakks_gamekey">
<dataarea name="rom" size="0x800000"> <dataarea name="rom" size="0x800000">
<rom name="dy_disneygktennisfacechase.bin" size="0x200000" crc="ba37ccf2" sha1="c7204a0499b6949f3f70f0f5c042d353435406fb" offset="0" /> <rom name="dy_disneygktennisfacechase.bin" size="0x200000" crc="ba37ccf2" sha1="c7204a0499b6949f3f70f0f5c042d353435406fb" offset="0" />
<rom size="0x200000" offset="0x200000" loadflag="reload" /> <rom size="0x200000" offset="0x200000" loadflag="reload" />
<rom size="0x200000" offset="0x400000" loadflag="reload" /> <rom size="0x200000" offset="0x400000" loadflag="reload" />
<rom size="0x200000" offset="0x600000" loadflag="reload" /> <rom size="0x200000" offset="0x600000" loadflag="reload" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="stenfcha" supported="no"> <!-- AT24C04 SEEPROM --> <software name="stenfcha" supported="no"> <!-- AT24C04 SEEPROM -->
<description>Sports Tennis &amp; Face Chase &amp; Riches of Agrabah</description> <description>Sports Tennis &amp; Face Chase &amp; Riches of Agrabah</description>
<year>2005</year> <year>2005</year>
@ -42,11 +42,11 @@
<part name="cart" interface="jakks_gamekey"> <part name="cart" interface="jakks_gamekey">
<dataarea name="rom" size="0x800000"> <dataarea name="rom" size="0x800000">
<rom name="disneygktennisfaceagrabah.bin" size="0x200000" crc="f3fd0759" sha1="1272e7e34acfce5dbe55b39bff888f5dd16c63f9" offset="0" /> <rom name="disneygktennisfaceagrabah.bin" size="0x200000" crc="f3fd0759" sha1="1272e7e34acfce5dbe55b39bff888f5dd16c63f9" offset="0" />
<rom size="0x200000" offset="0x200000" loadflag="reload" /> <rom size="0x200000" offset="0x200000" loadflag="reload" />
<rom size="0x200000" offset="0x400000" loadflag="reload" /> <rom size="0x200000" offset="0x400000" loadflag="reload" />
<rom size="0x200000" offset="0x600000" loadflag="reload" /> <rom size="0x200000" offset="0x600000" loadflag="reload" />
</dataarea> </dataarea>
</part> </part>
</software> </software>
</softwarelist> </softwarelist>

10
hash/jakks_gamekey_nk.xml
View File

@ -1,9 +1,9 @@
<?xml version="1.0"?> <?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd"> <!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="jakks_gamekey_nk" description="JAKKS Pacific 'NK' Game Keys"> <softwarelist name="jakks_gamekey_nk" description="JAKKS Pacific 'NK' Game Keys">
<!-- This list is for the 'NK' coded Game Keys, for Nicktoons and related systems --> <!-- This list is for the 'NK' coded Game Keys, for Nicktoons and related systems -->
<software name="dora" supported="no"> <software name="dora" supported="no">
<description>Soccer Shootout &amp; Juego De Futbol De Dora &amp; Dora's Star Mountain Adventure</description> <description>Soccer Shootout &amp; Juego De Futbol De Dora &amp; Dora's Star Mountain Adventure</description>
<year>2005</year> <year>2005</year>
@ -11,9 +11,9 @@
<part name="cart" interface="jakks_gamekey"> <part name="cart" interface="jakks_gamekey">
<dataarea name="rom" size="0x800000"> <dataarea name="rom" size="0x800000">
<rom name="nk_dora.bin" size="0x200000" crc="2bcdf9a5" sha1="ac86d967b269cb8c4ecc9c8b99fb5c16424da7be" offset="0" /> <rom name="nk_dora.bin" size="0x200000" crc="2bcdf9a5" sha1="ac86d967b269cb8c4ecc9c8b99fb5c16424da7be" offset="0" />
<rom size="0x200000" offset="0x200000" loadflag="reload" /> <rom size="0x200000" offset="0x200000" loadflag="reload" />
<rom size="0x200000" offset="0x400000" loadflag="reload" /> <rom size="0x200000" offset="0x400000" loadflag="reload" />
<rom size="0x200000" offset="0x600000" loadflag="reload" /> <rom size="0x200000" offset="0x600000" loadflag="reload" />
</dataarea> </dataarea>
</part> </part>
</software> </software>

8
hash/jakks_gamekey_sw.xml
View File

@ -1,12 +1,12 @@
<?xml version="1.0"?> <?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd"> <!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="jakks_gamekey_sw" description="JAKKS Pacific 'SW' Game Keys"> <softwarelist name="jakks_gamekey_sw" description="JAKKS Pacific 'SW' Game Keys">
<!-- This list is for the 'SW' coded Game Keys, for Star Wars base systems --> <!-- This list is for the 'SW' coded Game Keys, for Star Wars base systems -->
<!-- There are 4 pads on the PCB labeled A0 A1 A2 and A3. A1 and A2 are connected to VCC. <!-- There are 4 pads on the PCB labeled A0 A1 A2 and A3. A1 and A2 are connected to VCC.
The gamekey PCB had the same silkscreened boxes as the Disney Games, with A1 H and A3 H marked. --> The gamekey PCB had the same silkscreened boxes as the Disney Games, with A1 H and A3 H marked. -->
<software name="tdyoda" supported="no"> <software name="tdyoda" supported="no">
<description>Turret Defense &amp; Yoda's Escape</description> <description>Turret Defense &amp; Yoda's Escape</description>
<year>2005</year> <year>2005</year>
@ -20,5 +20,5 @@
</dataarea> </dataarea>
</part> </part>
</software> </software>
</softwarelist> </softwarelist>

18
hash/pce_tourvision.xml
View File

@ -898,10 +898,10 @@ Parasol Stars
<part name="cart" interface="tourvision_cart"> <part name="cart" interface="tourvision_cart">
<feature name="id" value="0x26"/> <feature name="id" value="0x26"/>
<dataarea name="rom" size="524288"> <dataarea name="rom" size="524288">
<!-- NOT identical to the set in the PCE list <!-- NOT identical to the set in the PCE list
50000-5000F: FF 10 10 00 1C F9 0F F8 0F 87 FF 3F 0F 4F 00 2E - PCE Dump 50000-5000F: FF 10 10 00 1C F9 0F F8 0F 87 FF 3F 0F 4F 00 2E - PCE Dump
50000-5000F: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - Tourvision 50000-5000F: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - Tourvision
otherwise 0x80000 identical --> otherwise 0x80000 identical -->
<rom name="out run (japan) [a].pce" size="524288" crc="92b654a7" sha1="7d669e78978ebb2a3169f4428a664c81a8888b6e" offset="000000" /> <rom name="out run (japan) [a].pce" size="524288" crc="92b654a7" sha1="7d669e78978ebb2a3169f4428a664c81a8888b6e" offset="000000" />
</dataarea> </dataarea>
</part> </part>
@ -1041,7 +1041,7 @@ Parasol Stars
<description>Pro Yakyuu World Stadium '91 (TourVision PCE bootleg)</description> <description>Pro Yakyuu World Stadium '91 (TourVision PCE bootleg)</description>
<year>1991</year> <year>1991</year>
<publisher>bootleg (TourVision) / Namcot</publisher> <publisher>bootleg (TourVision) / Namcot</publisher>
<info name="alt_title" value="プロ野球 ワールドスタジアム'91"/> <info name="alt_title" value="プロ野球 ワールドスタジアム'91"/>
<part name="cart" interface="tourvision_cart"> <part name="cart" interface="tourvision_cart">
<feature name="id" value="0xc0"/> <feature name="id" value="0xc0"/>
<dataarea name="rom" size="262144"> <dataarea name="rom" size="262144">
@ -1067,7 +1067,7 @@ Parasol Stars
<description>Puzzle Boy (TourVision PCE bootleg)</description> <description>Puzzle Boy (TourVision PCE bootleg)</description>
<year>1991</year> <year>1991</year>
<publisher>bootleg (TourVision) / Nihon Telenet</publisher> <publisher>bootleg (TourVision) / Nihon Telenet</publisher>
<info name="alt_title" value="パズルボーイ"/> <info name="alt_title" value="パズルボーイ"/>
<part name="cart" interface="tourvision_cart"> <part name="cart" interface="tourvision_cart">
<feature name="id" value="0x39"/> <feature name="id" value="0x39"/>
<dataarea name="rom" size="262144"> <dataarea name="rom" size="262144">
@ -1080,11 +1080,11 @@ Parasol Stars
<description>Puzznic (TourVision PCE bootleg)</description> <description>Puzznic (TourVision PCE bootleg)</description>
<year>1990</year> <year>1990</year>
<publisher>bootleg (TourVision) / Taito</publisher> <publisher>bootleg (TourVision) / Taito</publisher>
<info name="alt_title" value="パズニック"/> <info name="alt_title" value="パズニック"/>
<part name="cart" interface="tourvision_cart"> <part name="cart" interface="tourvision_cart">
<feature name="id" value="0x45"/> <feature name="id" value="0x45"/>
<dataarea name="rom" size="262144"> <dataarea name="rom" size="262144">
<!-- 0x40000 matches PCE puzznic --> <!-- 0x40000 matches PCE puzznic -->
<rom name="puzznic (japan).pce" size="262144" crc="965c95b3" sha1="3906d644f5901e6d2e732cbd0a6dd0d38a29486b" offset="000000" /> <rom name="puzznic (japan).pce" size="262144" crc="965c95b3" sha1="3906d644f5901e6d2e732cbd0a6dd0d38a29486b" offset="000000" />
</dataarea> </dataarea>
</part> </part>
@ -1123,7 +1123,7 @@ Parasol Stars
<part name="cart" interface="tourvision_cart"> <part name="cart" interface="tourvision_cart">
<feature name="id" value="0x3d"/> <feature name="id" value="0x3d"/>
<dataarea name="rom" size="262144"> <dataarea name="rom" size="262144">
<!-- NOT identical to the set in the PCE list, copyright strings have been erased --> <!-- NOT identical to the set in the PCE list, copyright strings have been erased -->
<rom name="tourv_r-type_ii_hacked.pce" size="262144" crc="ae65fe80" sha1="1a6c6f5bd017f23ab9d00a9385986ddf498f9a82" offset="000000" /> <rom name="tourv_r-type_ii_hacked.pce" size="262144" crc="ae65fe80" sha1="1a6c6f5bd017f23ab9d00a9385986ddf498f9a82" offset="000000" />
</dataarea> </dataarea>
</part> </part>

2
hash/vsmile_cart.xml
View File

@ -1892,7 +1892,7 @@ Game cartridges
</dataarea> </dataarea>
</part> </part>
</software> </software>
<software name="superman" supported="yes"> <software name="superman" supported="yes">
<description>Superman - Der Superheld (Ger)</description> <description>Superman - Der Superheld (Ger)</description>
<year>200?</year> <year>200?</year>

10
hash/vtech_storio_cart.xml
View File

@ -1,10 +1,10 @@
<?xml version="1.0"?> <?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd"> <!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="vtech_storio_cart" description="VTech Storio V.Reader Cartridges"> <softwarelist name="vtech_storio_cart" description="VTech Storio V.Reader Cartridges">
<!-- These are NAND Flash ROMs containing a FAT16 filesystem --> <!-- These are NAND Flash ROMs containing a FAT16 filesystem -->
<!-- Some cartridges (PCB 35-115600-027-402) contains no ROM, but just some bridges between edge connector pins. --> <!-- Some cartridges (PCB 35-115600-027-402) contains no ROM, but just some bridges between edge connector pins. -->
<!-- <!--
Language: Language:
@ -32,7 +32,7 @@
| 80-280600(US) | Olivia | 80-280600(US) | Olivia
| 80-280700(US) | The Little Engine That Could | 80-280700(US) | The Little Engine That Could
| 80-280900(US) | Dora and the Three Little Pigs | 80-280900(US) | Dora and the Three Little Pigs
XX | 80-280422(GER) | Dora und die drei Schweinchen XX | 80-280422(GER) | Dora und die drei Schweinchen
| 80-281000(US) | Mickey Mouse Clubhouse | 80-281000(US) | Mickey Mouse Clubhouse
XX | 80-281004(GER) | Micky Maus Wunderhaus XX | 80-281004(GER) | Micky Maus Wunderhaus
| 80-281100(US) | Disney Princess | 80-281100(US) | Disney Princess
@ -40,9 +40,9 @@
| 80-281200(US) | Cars | 80-281200(US) | Cars
| 80-281300(US) | Sesame Street The Happy Scientists | 80-281300(US) | Sesame Street The Happy Scientists
| 80-281400(US) | SpongeBob SquarePants Model Sponge | 80-281400(US) | SpongeBob SquarePants Model Sponge
XX | 80-281404(GER) | Spongebob Schwammkopf - Ein Schwamm will nach oben XX | 80-281404(GER) | Spongebob Schwammkopf - Ein Schwamm will nach oben
| 80-281500(US) | Tangled | 80-281500(US) | Tangled
XX | 80-281504(GER) | Rapunzel - Neu verföhnt XX | 80-281504(GER) | Rapunzel - Neu verföhnt
| 80-281600(US) | Chuggington - Babysitter Brewster | 80-281600(US) | Chuggington - Babysitter Brewster
| 80-281700(US) | Penguins of Madagascar - The Helmet | 80-281700(US) | Penguins of Madagascar - The Helmet
| 80-281800(US) | Kung Fu Panda 2 | 80-281800(US) | Kung Fu Panda 2

2
scripts/src/machine.lua
View File

@ -3856,4 +3856,4 @@ if (MACHINES["DC7085"]~=null) then
MAME_DIR .. "src/devices/machine/dc7085.cpp", MAME_DIR .. "src/devices/machine/dc7085.cpp",
MAME_DIR .. "src/devices/machine/dc7085.h", MAME_DIR .. "src/devices/machine/dc7085.h",
} }
end end

2
src/devices/bus/bbc/rom/dfs.cpp
View File

@ -60,4 +60,4 @@ READ8_MEMBER(bbc_mrme00_device::read)
WRITE8_MEMBER(bbc_mrme00_device::write) WRITE8_MEMBER(bbc_mrme00_device::write)
{ {
get_ram_base()[offset & (get_ram_size() - 1)] = data; get_ram_base()[offset & (get_ram_size() - 1)] = data;
} }

2
src/devices/bus/ekara/rom.cpp
View File

@ -122,5 +122,5 @@ void ekara_cart(device_slot_interface &device)
{ {
device.option_add_internal("plain", EKARA_ROM_PLAIN); device.option_add_internal("plain", EKARA_ROM_PLAIN);
device.option_add_internal("rom_24lc04", EKARA_ROM_I2C_24LC04); device.option_add_internal("rom_24lc04", EKARA_ROM_I2C_24LC04);
device.option_add_internal("rom_24lc02", EKARA_ROM_I2C_24LC02); device.option_add_internal("rom_24lc02", EKARA_ROM_I2C_24LC02);
} }

4
src/devices/bus/electron/romboxp.cpp
View File

@ -104,10 +104,10 @@ void electron_romboxp_device::device_add_mconfig(machine_config &config)
/* cartridges */ /* cartridges */
ELECTRON_CARTSLOT(config, m_cart[0], DERIVED_CLOCK(1, 1), electron_cart, nullptr); // ROM SLOT 0/1 ELECTRON_CARTSLOT(config, m_cart[0], DERIVED_CLOCK(1, 1), electron_cart, nullptr); // ROM SLOT 0/1
m_cart[0]->irq_handler().set(DEVICE_SELF_OWNER, FUNC(electron_expansion_slot_device::irq_w)); m_cart[0]->irq_handler().set(DEVICE_SELF_OWNER, FUNC(electron_expansion_slot_device::irq_w));
m_cart[0]->nmi_handler().set(DEVICE_SELF_OWNER, FUNC(electron_expansion_slot_device::nmi_w)); m_cart[0]->nmi_handler().set(DEVICE_SELF_OWNER, FUNC(electron_expansion_slot_device::nmi_w));
ELECTRON_CARTSLOT(config, m_cart[1], DERIVED_CLOCK(1, 1), electron_cart, nullptr); // ROM SLOT 2/3 ELECTRON_CARTSLOT(config, m_cart[1], DERIVED_CLOCK(1, 1), electron_cart, nullptr); // ROM SLOT 2/3
m_cart[1]->irq_handler().set(DEVICE_SELF_OWNER, FUNC(electron_expansion_slot_device::irq_w)); m_cart[1]->irq_handler().set(DEVICE_SELF_OWNER, FUNC(electron_expansion_slot_device::irq_w));
m_cart[1]->nmi_handler().set(DEVICE_SELF_OWNER, FUNC(electron_expansion_slot_device::nmi_w)); m_cart[1]->nmi_handler().set(DEVICE_SELF_OWNER, FUNC(electron_expansion_slot_device::nmi_w));
} }

39
src/devices/bus/nubus/nubus_specpdq.cpp
View File

@ -29,6 +29,9 @@
#include "nubus_specpdq.h" #include "nubus_specpdq.h"
#include "screen.h" #include "screen.h"
//#define VERBOSE 1
#include "logmacro.h"
#define SPECPDQ_SCREEN_NAME "specpdq_screen" #define SPECPDQ_SCREEN_NAME "specpdq_screen"
#define SPECPDQ_ROM_REGION "specpdq_rom" #define SPECPDQ_ROM_REGION "specpdq_rom"
@ -242,7 +245,7 @@ WRITE32_MEMBER( nubus_specpdq_device::specpdq_w )
switch (offset) switch (offset)
{ {
case 0xc0054: // mode 1 case 0xc0054: // mode 1
logerror("%x to mode1\n", data); LOG("%x to mode1\n", data);
break; break;
case 0xc005c: // interrupt control case 0xc005c: // interrupt control
@ -261,7 +264,7 @@ WRITE32_MEMBER( nubus_specpdq_device::specpdq_w )
break; break;
case 0xc007a: case 0xc007a:
logerror("%x to mode2\n", data); LOG("%x to mode2\n", data);
switch (data) switch (data)
{ {
@ -278,11 +281,11 @@ WRITE32_MEMBER( nubus_specpdq_device::specpdq_w )
break; break;
} }
logerror("m_mode = %d\n", m_mode); LOG("m_mode = %d\n", m_mode);
break; break;
case 0x120000: // DAC address case 0x120000: // DAC address
logerror("%08x to DAC control %s\n", data,machine().describe_context()); LOG("%08x to DAC control %s\n", data,machine().describe_context());
m_clutoffs = ((data>>8)&0xff)^0xff; m_clutoffs = ((data>>8)&0xff)^0xff;
break; break;
@ -291,7 +294,7 @@ WRITE32_MEMBER( nubus_specpdq_device::specpdq_w )
if (m_count == 3) if (m_count == 3)
{ {
logerror("RAMDAC: color %d = %02x %02x %02x %s\n", m_clutoffs, m_colors[0], m_colors[1], m_colors[2], machine().describe_context()); LOG("RAMDAC: color %d = %02x %02x %02x %s\n", m_clutoffs, m_colors[0], m_colors[1], m_colors[2], machine().describe_context());
m_palette->set_pen_color(m_clutoffs, rgb_t(m_colors[0], m_colors[1], m_colors[2])); m_palette->set_pen_color(m_clutoffs, rgb_t(m_colors[0], m_colors[1], m_colors[2]));
m_palette_val[m_clutoffs] = rgb_t(m_colors[0], m_colors[1], m_colors[2]); m_palette_val[m_clutoffs] = rgb_t(m_colors[0], m_colors[1], m_colors[2]);
m_clutoffs++; m_clutoffs++;
@ -370,7 +373,7 @@ WRITE32_MEMBER( nubus_specpdq_device::specpdq_w )
case 0x18103f: case 0x18103f:
if(offset == 0x181000) { if(offset == 0x181000) {
machine().debug_break(); machine().debug_break();
logerror("Pattern %08x @ %x\n", data ^ 0xffffffff, offset); LOG("Pattern %08x @ %x\n", data ^ 0xffffffff, offset);
} }
m_fillbytes[((offset&0x3f)*4)] = ((data>>24) & 0xff) ^ 0xff; m_fillbytes[((offset&0x3f)*4)] = ((data>>24) & 0xff) ^ 0xff;
m_fillbytes[((offset&0x3f)*4)+1] = ((data>>16) & 0xff) ^ 0xff; m_fillbytes[((offset&0x3f)*4)+1] = ((data>>16) & 0xff) ^ 0xff;
@ -380,40 +383,40 @@ WRITE32_MEMBER( nubus_specpdq_device::specpdq_w )
// blitter control // blitter control
case 0x182006: case 0x182006:
logerror("%08x (%d) to blitter ctrl 1 %s rectangle\n", data^0xffffffff, data^0xffffffff, machine().describe_context()); LOG("%08x (%d) to blitter ctrl 1 %s rectangle\n", data^0xffffffff, data^0xffffffff, machine().describe_context());
break; break;
case 0x182008: case 0x182008:
logerror("%08x (%d) to blitter ctrl 2 %s rectangle\n", data^0xffffffff, data^0xffffffff, machine().describe_context()); LOG("%08x (%d) to blitter ctrl 2 %s rectangle\n", data^0xffffffff, data^0xffffffff, machine().describe_context());
m_patofsx = (data ^ 0xffffffff) & 7; m_patofsx = (data ^ 0xffffffff) & 7;
m_patofsy = ((data ^ 0xffffffff)>>3) & 7; m_patofsy = ((data ^ 0xffffffff)>>3) & 7;
break; break;
case 0x18200e: case 0x18200e:
logerror("%08x (%d) to blitter ctrl 3 %s\n", data^0xffffffff, data^0xffffffff, machine().describe_context()); LOG("%08x (%d) to blitter ctrl 3 %s\n", data^0xffffffff, data^0xffffffff, machine().describe_context());
m_width = data ^ 0xffffffff; m_width = data ^ 0xffffffff;
break; break;
case 0x18200b: case 0x18200b:
logerror("%08x (%d) to blitter ctrl 4 %s\n", data^0xffffffff, data^0xffffffff, machine().describe_context()); LOG("%08x (%d) to blitter ctrl 4 %s\n", data^0xffffffff, data^0xffffffff, machine().describe_context());
m_height = (data ^ 0xffffffff) & 0xffff; m_height = (data ^ 0xffffffff) & 0xffff;
break; break;
case 0x18200a: case 0x18200a:
data ^= 0xffffffff; data ^= 0xffffffff;
logerror("%08x to blitter ctrl 5 %s\n", data, machine().describe_context()); LOG("%08x to blitter ctrl 5 %s\n", data, machine().describe_context());
m_vram_src = data>>2; m_vram_src = data>>2;
break; break;
case 0x182009: case 0x182009:
data ^= 0xffffffff; data ^= 0xffffffff;
logerror("%08x to blitter ctrl 6 %s\n", data, machine().describe_context()); LOG("%08x to blitter ctrl 6 %s\n", data, machine().describe_context());
m_vram_addr = data>>2; m_vram_addr = data>>2;
break; break;
case 0x182007: case 0x182007:
data ^= 0xffffffff; data ^= 0xffffffff;
logerror("%08x to blitter ctrl 7 %s\n", data, machine().describe_context()); LOG("%08x to blitter ctrl 7 %s\n", data, machine().describe_context());
// fill rectangle // fill rectangle
if (data == 2) if (data == 2)
@ -423,7 +426,7 @@ WRITE32_MEMBER( nubus_specpdq_device::specpdq_w )
int ddx = m_vram_addr & 3; int ddx = m_vram_addr & 3;
logerror("Fill rectangle with %02x %02x %02x %02x, adr %x (%d, %d) width %d height %d delta %d %d\n", m_fillbytes[0], m_fillbytes[1], m_fillbytes[2], m_fillbytes[3], m_vram_addr, m_vram_addr % 1152, m_vram_addr / 1152, m_width, m_height, m_patofsx, m_patofsy); LOG("Fill rectangle with %02x %02x %02x %02x, adr %x (%d, %d) width %d height %d delta %d %d\n", m_fillbytes[0], m_fillbytes[1], m_fillbytes[2], m_fillbytes[3], m_vram_addr, m_vram_addr % 1152, m_vram_addr / 1152, m_width, m_height, m_patofsx, m_patofsy);
for (y = 0; y <= m_height; y++) for (y = 0; y <= m_height; y++)
{ {
@ -442,7 +445,7 @@ WRITE32_MEMBER( nubus_specpdq_device::specpdq_w )
int sdx = m_vram_src & 3; int sdx = m_vram_src & 3;
int ddx = m_vram_addr & 3; int ddx = m_vram_addr & 3;
logerror("Copy rectangle forwards, width %d height %d dst %x (%d, %d) src %x (%d, %d)\n", m_width, m_height, m_vram_addr, m_vram_addr % 1152, m_vram_addr / 1152, m_vram_src, m_vram_src % 1152, m_vram_src / 1152); LOG("Copy rectangle forwards, width %d height %d dst %x (%d, %d) src %x (%d, %d)\n", m_width, m_height, m_vram_addr, m_vram_addr % 1152, m_vram_addr / 1152, m_vram_src, m_vram_src % 1152, m_vram_src / 1152);
for (y = 0; y <= m_height; y++) for (y = 0; y <= m_height; y++)
{ {
@ -462,7 +465,7 @@ WRITE32_MEMBER( nubus_specpdq_device::specpdq_w )
int sdx = m_vram_src & 3; int sdx = m_vram_src & 3;
int ddx = m_vram_addr & 3; int ddx = m_vram_addr & 3;
logerror("Copy rectangle backwards, width %d height %d dst %x (%d, %d) src %x (%d, %d)\n", m_width, m_height, m_vram_addr, m_vram_addr % 1152, m_vram_addr / 1152, m_vram_src, m_vram_src % 1152, m_vram_src / 1152); LOG("Copy rectangle backwards, width %d height %d dst %x (%d, %d) src %x (%d, %d)\n", m_width, m_height, m_vram_addr, m_vram_addr % 1152, m_vram_addr / 1152, m_vram_src, m_vram_src % 1152, m_vram_src / 1152);
for (y = 0; y < m_height; y++) for (y = 0; y < m_height; y++)
{ {
@ -475,12 +478,12 @@ WRITE32_MEMBER( nubus_specpdq_device::specpdq_w )
} }
else else
{ {
logerror("Unknown blitter command %08x\n", data); LOG("Unknown blitter command %08x\n", data);
} }
break; break;
default: default:
logerror("specpdq_w: %08x @ %x (mask %08x %s)\n", data^0xffffffff, offset, mem_mask, machine().describe_context()); LOG("specpdq_w: %08x @ %x (mask %08x %s)\n", data^0xffffffff, offset, mem_mask, machine().describe_context());
break; break;
} }
} }

4
src/devices/bus/vsmile/vsmile_slot.h
View File

@ -52,8 +52,8 @@ protected:
device_vsmile_cart_interface(const machine_config &mconfig, device_t &device); device_vsmile_cart_interface(const machine_config &mconfig, device_t &device);
// internal state // internal state
uint16_t *m_rom; // this points to the cart rom region uint16_t *m_rom; // this points to the cart rom region
uint32_t m_rom_size; // this is the actual game size, not the rom region size! uint32_t m_rom_size; // this is the actual game size, not the rom region size!
std::vector<uint16_t> m_nvram; std::vector<uint16_t> m_nvram;
}; };

4
src/devices/cpu/alpha/alpha.cpp
View File

@ -14,10 +14,12 @@
*/ */
#include "emu.h" #include "emu.h"
#include "debugger.h"
#include "alpha.h" #include "alpha.h"
#include "alphad.h" #include "alphad.h"
#include "debugger.h"
#define LOG_GENERAL (1U << 0) #define LOG_GENERAL (1U << 0)
#define LOG_EXCEPTION (1U << 1) #define LOG_EXCEPTION (1U << 1)
#define LOG_SYSCALLS (1U << 2) #define LOG_SYSCALLS (1U << 2)

18
src/devices/cpu/dspp/dspp.h
View File

@ -67,10 +67,10 @@ public:
DECLARE_READ16_MEMBER( noise_r ); DECLARE_READ16_MEMBER( noise_r );
void update_fifo_dma(); void update_fifo_dma();
void print_sums() { printf("%04x: %04x\n", (uint16_t)m_core->m_arg0, (uint16_t)m_core->m_arg1); } void print_sums() { printf("%04x: %04x\n", (uint16_t)m_core->m_arg0, (uint16_t)m_core->m_arg1); }
void print_branches() { printf("Branch: %d %d %d %d %d\n", m_core->m_arg0 ? 1 : 0, m_core->m_arg1 ? 1 : 0, m_core->m_arg2 ? 1 : 0, m_core->m_arg3 ? 1 : 0, m_core->m_arg4 ? 1 : 0); } void print_branches() { printf("Branch: %d %d %d %d %d\n", m_core->m_arg0 ? 1 : 0, m_core->m_arg1 ? 1 : 0, m_core->m_arg2 ? 1 : 0, m_core->m_arg3 ? 1 : 0, m_core->m_arg4 ? 1 : 0); }
void print_value() { printf("Value is %08x\n", m_core->m_arg0); } void print_value() { printf("Value is %08x\n", m_core->m_arg0); }
void print_addr() { printf("New value is %08x from %08x\n", m_core->m_arg0, m_core->m_arg1); } void print_addr() { printf("New value is %08x from %08x\n", m_core->m_arg0, m_core->m_arg1); }
protected: protected:
// device-level overrides // device-level overrides
@ -232,10 +232,10 @@ private:
const char *m_format; const char *m_format;
uint32_t m_arg0; uint32_t m_arg0;
uint32_t m_arg1; uint32_t m_arg1;
uint32_t m_arg2; uint32_t m_arg2;
uint32_t m_arg3; uint32_t m_arg3;
uint32_t m_arg4; uint32_t m_arg4;
struct struct
{ {
@ -316,7 +316,7 @@ private:
uint32_t cycles; /* accumulated cycles */ uint32_t cycles; /* accumulated cycles */
uint8_t checkints; /* need to check interrupts before next instruction */ uint8_t checkints; /* need to check interrupts before next instruction */
uint8_t checksoftints; /* need to check software interrupts before next instruction */ uint8_t checksoftints; /* need to check software interrupts before next instruction */
uml::code_label abortlabel; /* label to abort execution of this block */ uml::code_label abortlabel; /* label to abort execution of this block */
uml::code_label labelnum; /* index for local labels */ uml::code_label labelnum; /* index for local labels */
}; };

334
src/devices/cpu/dspp/dsppdrc.cpp
View File

@ -22,7 +22,7 @@ using namespace uml;
// map variables // map variables
#define MAPVAR_PC M0 #define MAPVAR_PC M0
#define MAPVAR_CYCLES M1 #define MAPVAR_CYCLES M1
// exit codes // exit codes
#define EXECUTE_OUT_OF_CYCLES 0 #define EXECUTE_OUT_OF_CYCLES 0
@ -244,12 +244,12 @@ void dspp_device::compile_block(offs_t pc)
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET) if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc
compiler.abortlabel = compiler.labelnum++; compiler.abortlabel = compiler.labelnum++;
/* iterate over instructions in the sequence and compile them */ /* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next()) for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
generate_sequence_instruction(block, &compiler, curdesc); generate_sequence_instruction(block, &compiler, curdesc);
UML_LABEL(block, compiler.abortlabel); UML_LABEL(block, compiler.abortlabel);
/* if we need to return to the start, do it */ /* if we need to return to the start, do it */
if (seqlast->flags & OPFLAG_RETURN_TO_START) if (seqlast->flags & OPFLAG_RETURN_TO_START)
@ -293,11 +293,11 @@ void dspp_device::generate_checksum_block(drcuml_block &block, compiler_state *c
uint32_t sum = seqhead->opptr.w[0]; uint32_t sum = seqhead->opptr.w[0];
uint32_t addr = seqhead->physpc; uint32_t addr = seqhead->physpc;
const void *base = m_codeptr(addr); const void *base = m_codeptr(addr);
UML_MOV(block, I0, 0); UML_MOV(block, I0, 0);
UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,0,word UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,0,word
UML_CMP(block, I0, sum); // cmp i0,opptr[0] UML_CMP(block, I0, sum); // cmp i0,opptr[0]
UML_EXHc(block, COND_NE, *m_nocode, seqhead->pc); // exne nocode,seqhead->pc UML_EXHc(block, COND_NE, *m_nocode, seqhead->pc); // exne nocode,seqhead->pc
} }
} }
@ -307,7 +307,7 @@ void dspp_device::generate_checksum_block(drcuml_block &block, compiler_state *c
uint32_t sum = 0; uint32_t sum = 0;
uint32_t addr = seqhead->physpc; uint32_t addr = seqhead->physpc;
const void *base = m_codeptr(addr); const void *base = m_codeptr(addr);
UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,0,dword UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,0,dword
sum += seqhead->opptr.w[0]; sum += seqhead->opptr.w[0];
for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next()) for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next())
if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP)) if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
@ -315,12 +315,12 @@ void dspp_device::generate_checksum_block(drcuml_block &block, compiler_state *c
addr = curdesc->physpc; addr = curdesc->physpc;
base = m_codeptr(addr); base = m_codeptr(addr);
assert(base != nullptr); assert(base != nullptr);
UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); // load i1,base,dword UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); // load i1,base,dword
UML_ADD(block, I0, I0, I1); // add i0,i0,i1 UML_ADD(block, I0, I0, I1); // add i0,i0,i1
sum += curdesc->opptr.w[0]; sum += curdesc->opptr.w[0];
} }
UML_CMP(block, I0, sum); // cmp i0,sum UML_CMP(block, I0, sum); // cmp i0,sum
UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead)); // exne nocode,seqhead->pc
} }
} }
@ -373,12 +373,12 @@ void dspp_device::static_generate_nocode_handler()
/* generate a hash jump via the current mode and PC */ /* generate a hash jump via the current mode and PC */
alloc_handle(m_drcuml.get(), &m_nocode, "nocode"); alloc_handle(m_drcuml.get(), &m_nocode, "nocode");
UML_HANDLE(block, *m_nocode); // handle nocode UML_HANDLE(block, *m_nocode); // handle nocode
UML_GETEXP(block, I0); // getexp i0 UML_GETEXP(block, I0); // getexp i0
UML_MOV(block, mem(&m_core->m_pc), I0); // mov [pc],i0 UML_MOV(block, mem(&m_core->m_pc), I0); // mov [pc],i0
//save_fast_iregs(block); // <save fastregs> //save_fast_iregs(block); // <save fastregs>
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
block.end(); block.end();
} }
@ -390,11 +390,11 @@ void dspp_device::static_generate_out_of_cycles()
/* generate a hash jump via the current mode and PC */ /* generate a hash jump via the current mode and PC */
alloc_handle(m_drcuml.get(), &m_out_of_cycles, "out_of_cycles"); alloc_handle(m_drcuml.get(), &m_out_of_cycles, "out_of_cycles");
UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles
UML_GETEXP(block, I0); // getexp i0 UML_GETEXP(block, I0); // getexp i0
UML_MOV(block, mem(&m_core->m_pc), I0); // mov <pc>,i0 UML_MOV(block, mem(&m_core->m_pc), I0); // mov <pc>,i0
//save_fast_iregs(block); // <save fastregs> //save_fast_iregs(block); // <save fastregs>
UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
block.end(); block.end();
} }
@ -402,28 +402,28 @@ void dspp_device::static_generate_out_of_cycles()
void dspp_device::generate_sequence_instruction(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) void dspp_device::generate_sequence_instruction(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc)
{ {
/* set the PC map variable */ /* set the PC map variable */
UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc
/* accumulate total cycles */ /* accumulate total cycles */
compiler->cycles += desc->cycles; compiler->cycles += desc->cycles;
/* update the icount map variable */ /* update the icount map variable */
UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
/* if we are debugging, call the debugger */ /* if we are debugging, call the debugger */
if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0) if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{ {
UML_MOV(block, mem(&m_core->m_pc), desc->pc); // mov [pc],desc->pc UML_MOV(block, mem(&m_core->m_pc), desc->pc); // mov [pc],desc->pc
//save_fast_iregs(block); // <save fastregs> //save_fast_iregs(block); // <save fastregs>
UML_DEBUG(block, desc->pc); // debug desc->pc UML_DEBUG(block, desc->pc); // debug desc->pc
} }
/* if we hit an unmapped address, fatal error */ /* if we hit an unmapped address, fatal error */
if (desc->flags & OPFLAG_COMPILER_UNMAPPED) if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
{ {
UML_MOV(block, mem(&m_core->m_pc), desc->pc); // mov [pc],desc->pc UML_MOV(block, mem(&m_core->m_pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(block); // <save fastregs> save_fast_iregs(block); // <save fastregs>
UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
} }
/* unless this is a virtual no-op, it's a regular instruction */ /* unless this is a virtual no-op, it's a regular instruction */
@ -438,9 +438,9 @@ void dspp_device::generate_update_cycles(drcuml_block &block, compiler_state *co
/* account for cycles */ /* account for cycles */
if (compiler->cycles > 0) if (compiler->cycles > 0)
{ {
UML_SUB(block, mem(&m_core->m_icount), mem(&m_core->m_icount), MAPVAR_CYCLES); // sub icount,icount,cycles UML_SUB(block, mem(&m_core->m_icount), mem(&m_core->m_icount), MAPVAR_CYCLES); // sub icount,icount,cycles
UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0 UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
UML_EXHc(block, COND_S, *m_out_of_cycles, param); // exh out_of_cycles,nextpc UML_EXHc(block, COND_S, *m_out_of_cycles, param); // exh out_of_cycles,nextpc
} }
compiler->cycles = 0; compiler->cycles = 0;
} }
@ -458,8 +458,8 @@ void dspp_device::generate_opcode(drcuml_block &block, compiler_state *compiler,
code_label skip = compiler->labelnum++; code_label skip = compiler->labelnum++;
UML_TEST(block, mem(&m_core->m_dspx_control), DSPX_CONTROL_GWILLING); UML_TEST(block, mem(&m_core->m_dspx_control), DSPX_CONTROL_GWILLING);
UML_JMPc(block, COND_Z, compiler->abortlabel); UML_JMPc(block, COND_Z, compiler->abortlabel);
//UML_TEST(block, mem(&m_core->m_flag_sleep), 1); //UML_TEST(block, mem(&m_core->m_flag_sleep), 1);
//UML_JMPc(block, COND_NZ, compiler->abortlabel); //UML_JMPc(block, COND_NZ, compiler->abortlabel);
//UML_MOV(block, mem(&m_core->m_arg0), desc->physpc); //UML_MOV(block, mem(&m_core->m_arg0), desc->physpc);
//UML_MOV(block, mem(&m_core->m_arg1), op); //UML_MOV(block, mem(&m_core->m_arg1), op);
@ -522,7 +522,7 @@ void dspp_device::generate_super_special(drcuml_block &block, compiler_state *co
{ {
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("BAC"); block.append_comment("BAC");
UML_SHR(block, mem(&m_core->m_jmpdest), mem(&m_core->m_acc), 4); // m_core->m_pc = m_core->m_acc >> 4; UML_SHR(block, mem(&m_core->m_jmpdest), mem(&m_core->m_acc), 4); // m_core->m_pc = m_core->m_acc >> 4;
generate_branch(block, compiler, desc); generate_branch(block, compiler, desc);
break; break;
} }
@ -549,8 +549,8 @@ void dspp_device::generate_super_special(drcuml_block &block, compiler_state *co
// TODO: How does sleep work? // TODO: How does sleep work?
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("SLEEP"); block.append_comment("SLEEP");
UML_SUB(block, mem(&m_core->m_pc), mem(&m_core->m_pc), 1); // --m_core->m_pc; UML_SUB(block, mem(&m_core->m_pc), mem(&m_core->m_pc), 1); // --m_core->m_pc;
UML_MOV(block, mem(&m_core->m_flag_sleep), 1); // m_core->m_flag_sleep = 1; UML_MOV(block, mem(&m_core->m_flag_sleep), 1); // m_core->m_flag_sleep = 1;
break; break;
} }
@ -609,7 +609,7 @@ void dspp_device::generate_special_opcode(drcuml_block &block, compiler_state *c
// Indirect // Indirect
if (regdi & 0x0010) if (regdi & 0x0010)
{ {
UML_CALLH(block, *m_dm_read16); // addr = read_data(addr); UML_CALLH(block, *m_dm_read16); // addr = read_data(addr);
UML_MOV(block, I2, I0); UML_MOV(block, I2, I0);
} }
else else
@ -621,7 +621,7 @@ void dspp_device::generate_special_opcode(drcuml_block &block, compiler_state *c
generate_read_next_operand(block, compiler, desc); generate_read_next_operand(block, compiler, desc);
UML_MOV(block, I0, I1); UML_MOV(block, I0, I1);
UML_MOV(block, I1, I2); UML_MOV(block, I1, I2);
UML_CALLH(block, *m_dm_write16); // write_data(addr, read_next_operand()); UML_CALLH(block, *m_dm_write16); // write_data(addr, read_next_operand());
break; break;
} }
case 5: // RBASE case 5: // RBASE
@ -639,7 +639,7 @@ void dspp_device::generate_special_opcode(drcuml_block &block, compiler_state *c
generate_read_next_operand(block, compiler, desc); generate_read_next_operand(block, compiler, desc);
UML_MOV(block, I0, I1); UML_MOV(block, I0, I1);
UML_MOV(block, I1, op & 0x3ff); UML_MOV(block, I1, op & 0x3ff);
UML_CALLH(block, *m_dm_write16); // write_data(op & 0x3ff, read_next_operand()); UML_CALLH(block, *m_dm_write16); // write_data(op & 0x3ff, read_next_operand());
break; break;
} }
case 7: // MOVEI case 7: // MOVEI
@ -648,12 +648,12 @@ void dspp_device::generate_special_opcode(drcuml_block &block, compiler_state *c
block.append_comment("MOVEI"); block.append_comment("MOVEI");
generate_parse_operands(block, compiler, desc, 1); generate_parse_operands(block, compiler, desc, 1);
UML_MOV(block, I1, op & 0x3ff); UML_MOV(block, I1, op & 0x3ff);
UML_CALLH(block, *m_dm_read16); // uint32_t addr = read_data(op & 0x3ff); UML_CALLH(block, *m_dm_read16); // uint32_t addr = read_data(op & 0x3ff);
UML_MOV(block, I2, I1); UML_MOV(block, I2, I1);
generate_read_next_operand(block, compiler, desc); generate_read_next_operand(block, compiler, desc);
UML_MOV(block, I0, I1); UML_MOV(block, I0, I1);
UML_MOV(block, I1, I2); UML_MOV(block, I1, I2);
UML_CALLH(block, *m_dm_write16); // write_data(addr, read_next_operand()); UML_CALLH(block, *m_dm_write16); // write_data(addr, read_next_operand());
break; break;
} }
@ -669,23 +669,23 @@ void dspp_device::generate_branch(drcuml_block &block, compiler_state *compiler,
/* update the cycles and jump through the hash table to the target */ /* update the cycles and jump through the hash table to the target */
if (desc->targetpc != BRANCH_TARGET_DYNAMIC) if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
{ {
generate_update_cycles(block, &compiler_temp, desc->targetpc); // <subtract cycles> generate_update_cycles(block, &compiler_temp, desc->targetpc); // <subtract cycles>
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH) if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc | 0x80000000 UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc | 0x80000000
else else
UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp <mode>,desc->targetpc,nocode UML_HASHJMP(block, 0, desc->targetpc, *m_nocode); // hashjmp <mode>,desc->targetpc,nocode
} }
else else
{ {
generate_update_cycles(block, &compiler_temp, uml::mem(&m_core->m_jmpdest)); // <subtract cycles> generate_update_cycles(block, &compiler_temp, uml::mem(&m_core->m_jmpdest)); // <subtract cycles>
UML_HASHJMP(block, 0, mem(&m_core->m_jmpdest), *m_nocode); // hashjmp <mode>,<rsreg>,nocode UML_HASHJMP(block, 0, mem(&m_core->m_jmpdest), *m_nocode); // hashjmp <mode>,<rsreg>,nocode
} }
/* update the label */ /* update the label */
compiler->labelnum = compiler_temp.labelnum; compiler->labelnum = compiler_temp.labelnum;
/* reset the mapvar to the current cycles */ /* reset the mapvar to the current cycles */
UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler.cycles UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler.cycles
} }
void dspp_device::generate_branch_opcode(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc) void dspp_device::generate_branch_opcode(drcuml_block &block, compiler_state *compiler, const opcode_desc *desc)
@ -718,10 +718,10 @@ void dspp_device::generate_branch_opcode(drcuml_block &block, compiler_state *co
UML_OR(block, I0, I0, mask0); UML_OR(block, I0, I0, mask0);
UML_OR(block, I1, I1, mask1); UML_OR(block, I1, I1, mask1);
UML_AND(block, I0, I0, I1); // bool branch = (flag0 || mask0) && (flag1 || mask1); UML_AND(block, I0, I0, I1); // bool branch = (flag0 || mask0) && (flag1 || mask1);
if (mode == 2) // if (mode == 2) if (mode == 2) // if (mode == 2)
UML_SUB(block, I0, 1, I0); // branch = !branch; UML_SUB(block, I0, 1, I0); // branch = !branch;
//UML_MOV(block, mem(&m_core->m_arg0), I0); //UML_MOV(block, mem(&m_core->m_arg0), I0);
//UML_MOV(block, mem(&m_core->m_arg2), 1-mask0); //UML_MOV(block, mem(&m_core->m_arg2), 1-mask0);
@ -729,9 +729,9 @@ void dspp_device::generate_branch_opcode(drcuml_block &block, compiler_state *co
//UML_CALLC(block, cfunc_print_branches, this); //UML_CALLC(block, cfunc_print_branches, this);
code_label skip = compiler->labelnum++; code_label skip = compiler->labelnum++;
UML_TEST(block, I0, 1); // if (branch) UML_TEST(block, I0, 1); // if (branch)
UML_JMPc(block, COND_Z, skip); UML_JMPc(block, COND_Z, skip);
UML_MOV(block, mem(&m_core->m_jmpdest), op & 0x3ff); // m_core->m_pc = op & 0x3ff; UML_MOV(block, mem(&m_core->m_jmpdest), op & 0x3ff); // m_core->m_pc = op & 0x3ff;
generate_branch(block, compiler, desc); generate_branch(block, compiler, desc);
UML_LABEL(block, skip); UML_LABEL(block, skip);
} }
@ -745,19 +745,19 @@ void dspp_device::generate_complex_branch_opcode(drcuml_block &block, compiler_s
case 0: // BLT case 0: // BLT
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("BLT"); block.append_comment("BLT");
UML_XOR(block, I0, mem(&m_core->m_flag_neg), mem(&m_core->m_flag_over)); // branch = (n && !v) || (!n && v); UML_XOR(block, I0, mem(&m_core->m_flag_neg), mem(&m_core->m_flag_over)); // branch = (n && !v) || (!n && v);
break; break;
case 1: // BLE case 1: // BLE
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("BLE"); block.append_comment("BLE");
UML_XOR(block, I0, mem(&m_core->m_flag_neg), mem(&m_core->m_flag_over)); UML_XOR(block, I0, mem(&m_core->m_flag_neg), mem(&m_core->m_flag_over));
UML_OR(block, I0, I0, mem(&m_core->m_flag_zero)); // branch = ((n && !v) || (!n && v)) || z; UML_OR(block, I0, I0, mem(&m_core->m_flag_zero)); // branch = ((n && !v) || (!n && v)) || z;
break; break;
case 2: // BGE case 2: // BGE
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("BGE"); block.append_comment("BGE");
UML_XOR(block, I0, mem(&m_core->m_flag_neg), mem(&m_core->m_flag_over)); UML_XOR(block, I0, mem(&m_core->m_flag_neg), mem(&m_core->m_flag_over));
UML_SUB(block, I0, 1, I0); // branch = ((n && v) || (!n && !v)); UML_SUB(block, I0, 1, I0); // branch = ((n && v) || (!n && !v));
break; break;
case 3: // BGT case 3: // BGT
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
@ -765,36 +765,36 @@ void dspp_device::generate_complex_branch_opcode(drcuml_block &block, compiler_s
UML_AND(block, I0, mem(&m_core->m_flag_neg), mem(&m_core->m_flag_over)); UML_AND(block, I0, mem(&m_core->m_flag_neg), mem(&m_core->m_flag_over));
UML_SUB(block, I0, 1, I0); UML_SUB(block, I0, 1, I0);
UML_SUB(block, I1, 1, mem(&m_core->m_flag_zero)); UML_SUB(block, I1, 1, mem(&m_core->m_flag_zero));
UML_AND(block, I0, I0, I1); // branch = ((n && v) || (!n && !v)) && !z; UML_AND(block, I0, I0, I1); // branch = ((n && v) || (!n && !v)) && !z;
break; break;
case 4: // BHI case 4: // BHI
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("BHI"); block.append_comment("BHI");
UML_SUB(block, I0, 1, mem(&m_core->m_flag_zero)); UML_SUB(block, I0, 1, mem(&m_core->m_flag_zero));
UML_AND(block, I0, I0, mem(&m_core->m_flag_carry)); // branch = c && !z; UML_AND(block, I0, I0, mem(&m_core->m_flag_carry)); // branch = c && !z;
break; break;
case 5: // BLS case 5: // BLS
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("BLS"); block.append_comment("BLS");
UML_SUB(block, I0, 1, mem(&m_core->m_flag_carry)); UML_SUB(block, I0, 1, mem(&m_core->m_flag_carry));
UML_OR(block, I0, I0, mem(&m_core->m_flag_zero)); // branch = !c || z; UML_OR(block, I0, I0, mem(&m_core->m_flag_zero)); // branch = !c || z;
break; break;
case 6: // BXS case 6: // BXS
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("BXS"); block.append_comment("BXS");
UML_MOV(block, I0, mem(&m_core->m_flag_exact)); // branch = x; UML_MOV(block, I0, mem(&m_core->m_flag_exact)); // branch = x;
break; break;
case 7: // BXC case 7: // BXC
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("BXC"); block.append_comment("BXC");
UML_SUB(block, I0, 1, mem(&m_core->m_flag_exact)); // branch = !x; UML_SUB(block, I0, 1, mem(&m_core->m_flag_exact)); // branch = !x;
break; break;
} }
code_label skip = compiler->labelnum++; code_label skip = compiler->labelnum++;
UML_TEST(block, I0, 1); // if (branch) UML_TEST(block, I0, 1); // if (branch)
UML_JMPc(block, COND_Z, skip); UML_JMPc(block, COND_Z, skip);
UML_MOV(block, mem(&m_core->m_jmpdest), op & 0x3ff); // m_core->m_pc = op & 0x3ff; UML_MOV(block, mem(&m_core->m_jmpdest), op & 0x3ff); // m_core->m_pc = op & 0x3ff;
generate_branch(block, compiler, desc); generate_branch(block, compiler, desc);
UML_LABEL(block, skip); UML_LABEL(block, skip);
} }
@ -941,8 +941,8 @@ void dspp_device::generate_read_next_operand(drcuml_block &block, compiler_state
UML_LOAD(block, I0, (void *)&m_core->m_operands[0].value, mem(&m_core->m_opidx), SIZE_DWORD, SCALE_x8); UML_LOAD(block, I0, (void *)&m_core->m_operands[0].value, mem(&m_core->m_opidx), SIZE_DWORD, SCALE_x8);
//if (op == 0x46a0) //if (op == 0x46a0)
//{ //{
// UML_MOV(block, mem(&m_core->m_arg0), I0); // UML_MOV(block, mem(&m_core->m_arg0), I0);
// UML_CALLC(block, cfunc_print_value, this); // UML_CALLC(block, cfunc_print_value, this);
//} //}
UML_TEST(block, I0, 0x80000000U); UML_TEST(block, I0, 0x80000000U);
@ -950,13 +950,13 @@ void dspp_device::generate_read_next_operand(drcuml_block &block, compiler_state
UML_LOAD(block, I1, (void *)&m_core->m_operands[0].addr, mem(&m_core->m_opidx), SIZE_DWORD, SCALE_x8); UML_LOAD(block, I1, (void *)&m_core->m_operands[0].addr, mem(&m_core->m_opidx), SIZE_DWORD, SCALE_x8);
//if (op == 0x46a0) //if (op == 0x46a0)
//{ //{
// UML_MOV(block, mem(&m_core->m_arg1), I1); // UML_MOV(block, mem(&m_core->m_arg1), I1);
//} //}
UML_CALLH(block, *m_dm_read16); UML_CALLH(block, *m_dm_read16);
//if (op == 0x46a0) //if (op == 0x46a0)
//{ //{
// UML_MOV(block, mem(&m_core->m_arg0), I0); // UML_MOV(block, mem(&m_core->m_arg0), I0);
// UML_CALLC(block, cfunc_print_addr, this); // UML_CALLC(block, cfunc_print_addr, this);
//} //}
UML_LABEL(block, no_load); UML_LABEL(block, no_load);
@ -1071,16 +1071,16 @@ void dspp_device::generate_arithmetic_opcode(drcuml_block &block, compiler_state
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_TRA"); block.append_comment("_TRA");
UML_MOV(block, I0, I2); // alu_res = alu_a; UML_MOV(block, I0, I2); // alu_res = alu_a;
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 1: // _NEG case 1: // _NEG
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_NEG"); block.append_comment("_NEG");
UML_SUB(block, I0, 0, I3); // alu_res = -alu_b; UML_SUB(block, I0, 0, I3); // alu_res = -alu_b;
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 2: // _+ case 2: // _+
@ -1092,175 +1092,175 @@ void dspp_device::generate_arithmetic_opcode(drcuml_block &block, compiler_state
UML_XOR(block, I3, I2, I3); UML_XOR(block, I3, I2, I3);
UML_TEST(block, I3, 0x80000); UML_TEST(block, I3, 0x80000);
UML_JMPc(block, COND_NZ, skip_over); // if ((alu_a & 0x80000) == (alu_b & 0x80000) && UML_JMPc(block, COND_NZ, skip_over); // if ((alu_a & 0x80000) == (alu_b & 0x80000) &&
UML_XOR(block, I3, I2, I0); UML_XOR(block, I3, I2, I0);
UML_TEST(block, I3, 0x80000); // (alu_a & 0x80000) != (alu_res & 0x80000)) UML_TEST(block, I3, 0x80000); // (alu_a & 0x80000) != (alu_res & 0x80000))
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_over), 1); // m_core->m_flag_over = 1; UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_over), 1); // m_core->m_flag_over = 1;
UML_LABEL(block, skip_over); UML_LABEL(block, skip_over);
UML_TEST(block, I0, 0x00100000); // if (alu_res & 0x00100000) UML_TEST(block, I0, 0x00100000); // if (alu_res & 0x00100000)
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_carry), 1); // m_core->m_flag_carry = 1; UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_carry), 1); // m_core->m_flag_carry = 1;
// else // else
UML_MOVc(block, COND_Z, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOVc(block, COND_Z, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 3: // _+C case 3: // _+C
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_+C"); block.append_comment("_+C");
UML_SHL(block, I3, mem(&m_core->m_flag_carry), 4); UML_SHL(block, I3, mem(&m_core->m_flag_carry), 4);
UML_ADD(block, I0, I2, I3); // alu_res = alu_a + (m_core->m_flag_carry << 4); UML_ADD(block, I0, I2, I3); // alu_res = alu_a + (m_core->m_flag_carry << 4);
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_TEST(block, I0, 0x00100000); // if (alu_res & 0x00100000) UML_TEST(block, I0, 0x00100000); // if (alu_res & 0x00100000)
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_carry), 1); // m_core->m_flag_carry = 1; UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_carry), 1); // m_core->m_flag_carry = 1;
// else // else
UML_MOVc(block, COND_Z, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOVc(block, COND_Z, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 4: // _- case 4: // _-
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_-"); block.append_comment("_-");
UML_SUB(block, I0, I2, I3); // alu_res = alu_a - alu_b; UML_SUB(block, I0, I2, I3); // alu_res = alu_a - alu_b;
UML_MOV(block, mem(&m_core->m_flag_over), 0); UML_MOV(block, mem(&m_core->m_flag_over), 0);
UML_XOR(block, I3, I3, 0xffffffffU); UML_XOR(block, I3, I3, 0xffffffffU);
UML_XOR(block, I3, I2, I3); UML_XOR(block, I3, I2, I3);
UML_TEST(block, I3, 0x80000); UML_TEST(block, I3, 0x80000);
UML_JMPc(block, COND_NZ, skip_over); // if ((alu_a & 0x80000) == (~alu_b & 0x80000) && UML_JMPc(block, COND_NZ, skip_over); // if ((alu_a & 0x80000) == (~alu_b & 0x80000) &&
UML_XOR(block, I3, I2, I0); UML_XOR(block, I3, I2, I0);
UML_TEST(block, I3, 0x80000); // (alu_a & 0x80000) != (alu_res & 0x80000)) UML_TEST(block, I3, 0x80000); // (alu_a & 0x80000) != (alu_res & 0x80000))
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_over), 1); // m_core->m_flag_over = 1; UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_over), 1); // m_core->m_flag_over = 1;
UML_LABEL(block, skip_over); UML_LABEL(block, skip_over);
UML_TEST(block, I0, 0x00100000); // if (alu_res & 0x00100000) UML_TEST(block, I0, 0x00100000); // if (alu_res & 0x00100000)
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_carry), 1); // m_core->m_flag_carry = 1; UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_carry), 1); // m_core->m_flag_carry = 1;
// else // else
UML_MOVc(block, COND_Z, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOVc(block, COND_Z, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 5: // _-B case 5: // _-B
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_-B"); block.append_comment("_-B");
UML_SHL(block, I3, mem(&m_core->m_flag_carry), 4); UML_SHL(block, I3, mem(&m_core->m_flag_carry), 4);
UML_SUB(block, I0, I2, I3); // alu_res = alu_a - (m_core->m_flag_carry << 4); UML_SUB(block, I0, I2, I3); // alu_res = alu_a - (m_core->m_flag_carry << 4);
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_TEST(block, I0, 0x00100000); // if (alu_res & 0x00100000) UML_TEST(block, I0, 0x00100000); // if (alu_res & 0x00100000)
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_carry), 1); // m_core->m_flag_carry = 1; UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_carry), 1); // m_core->m_flag_carry = 1;
// else // else
UML_MOVc(block, COND_Z, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOVc(block, COND_Z, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 6: // _++ case 6: // _++
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_++"); block.append_comment("_++");
UML_ADD(block, I0, I2, 1); // alu_res = alu_a + 1; UML_ADD(block, I0, I2, 1); // alu_res = alu_a + 1;
UML_XOR(block, I3, I2, 0x80000); UML_XOR(block, I3, I2, 0x80000);
UML_AND(block, I3, I3, I0); UML_AND(block, I3, I3, I0);
UML_TEST(block, I3, 0x80000); UML_TEST(block, I3, 0x80000);
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_over), 1); UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_over), 1);
UML_MOVc(block, COND_Z, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = !(alu_a & 0x80000) && (alu_res & 0x80000); UML_MOVc(block, COND_Z, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = !(alu_a & 0x80000) && (alu_res & 0x80000);
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 7: // _-- case 7: // _--
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_--"); block.append_comment("_--");
UML_SUB(block, I0, I2, 1); // alu_res = alu_a - 1; UML_SUB(block, I0, I2, 1); // alu_res = alu_a - 1;
UML_XOR(block, I3, I0, 0x80000); UML_XOR(block, I3, I0, 0x80000);
UML_AND(block, I3, I3, I2); UML_AND(block, I3, I3, I2);
UML_TEST(block, I3, 0x80000); UML_TEST(block, I3, 0x80000);
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_over), 1); UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_over), 1);
UML_MOVc(block, COND_Z, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = (alu_a & 0x80000) && !(alu_res & 0x80000); UML_MOVc(block, COND_Z, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = (alu_a & 0x80000) && !(alu_res & 0x80000);
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 8: // _TRL case 8: // _TRL
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_TRL"); block.append_comment("_TRL");
UML_MOV(block, I0, I2); // alu_res = alu_a; UML_MOV(block, I0, I2); // alu_res = alu_a;
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 9: // _NOT case 9: // _NOT
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_NOT"); block.append_comment("_NOT");
UML_XOR(block, I0, I2, 0xffffffff); // alu_res = ~alu_a; UML_XOR(block, I0, I2, 0xffffffff); // alu_res = ~alu_a;
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 10: // _AND case 10: // _AND
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_AND"); block.append_comment("_AND");
UML_AND(block, I0, I2, I3); // alu_res = alu_a & alu_b; UML_AND(block, I0, I2, I3); // alu_res = alu_a & alu_b;
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 11: // _NAND case 11: // _NAND
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_NAND"); block.append_comment("_NAND");
UML_AND(block, I0, I2, I3); UML_AND(block, I0, I2, I3);
UML_XOR(block, I0, I0, 0xffffffff); // alu_res = ~(alu_a & alu_b); UML_XOR(block, I0, I0, 0xffffffff); // alu_res = ~(alu_a & alu_b);
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 12: // _OR case 12: // _OR
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_OR"); block.append_comment("_OR");
UML_OR(block, I0, I2, I3); // alu_res = alu_a | alu_b; UML_OR(block, I0, I2, I3); // alu_res = alu_a | alu_b;
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 13: // _NOR case 13: // _NOR
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_NOR"); block.append_comment("_NOR");
UML_OR(block, I0, I2, I3); UML_OR(block, I0, I2, I3);
UML_XOR(block, I0, I0, 0xffffffff); // alu_res = ~(alu_a | alu_b); UML_XOR(block, I0, I0, 0xffffffff); // alu_res = ~(alu_a | alu_b);
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 14: // _XOR case 14: // _XOR
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_XOR"); block.append_comment("_XOR");
UML_XOR(block, I0, I2, I3); // alu_res = alu_a ^ alu_b; UML_XOR(block, I0, I2, I3); // alu_res = alu_a ^ alu_b;
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
case 15: // _XNOR case 15: // _XNOR
if (m_drcuml.get()->logging()) if (m_drcuml.get()->logging())
block.append_comment("_XNOR"); block.append_comment("_XNOR");
UML_XOR(block, I0, I2, I3); UML_XOR(block, I0, I2, I3);
UML_XOR(block, I0, I0, 0xffffffff); // alu_res = ~(alu_a ^ alu_b); UML_XOR(block, I0, I0, 0xffffffff); // alu_res = ~(alu_a ^ alu_b);
UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0; UML_MOV(block, mem(&m_core->m_flag_over), 0); // m_core->m_flag_over = 0;
UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0; UML_MOV(block, mem(&m_core->m_flag_carry), 0); // m_core->m_flag_carry = 0;
break; break;
} }
UML_TEST(block, I0, 0x00080000); UML_TEST(block, I0, 0x00080000);
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_neg), 1); UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_neg), 1);
UML_MOVc(block, COND_Z, mem(&m_core->m_flag_neg), 0); // m_core->m_flag_neg = (alu_res & 0x00080000) != 0; UML_MOVc(block, COND_Z, mem(&m_core->m_flag_neg), 0); // m_core->m_flag_neg = (alu_res & 0x00080000) != 0;
UML_TEST(block, I0, 0x000ffff0); UML_TEST(block, I0, 0x000ffff0);
UML_MOVc(block, COND_Z, mem(&m_core->m_flag_zero), 1); UML_MOVc(block, COND_Z, mem(&m_core->m_flag_zero), 1);
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_zero), 0); // m_core->m_flag_zero = (alu_res & 0x000ffff0) == 0; UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_zero), 0); // m_core->m_flag_zero = (alu_res & 0x000ffff0) == 0;
UML_TEST(block, I0, 0x0000000f); UML_TEST(block, I0, 0x0000000f);
UML_MOVc(block, COND_Z, mem(&m_core->m_flag_exact), 1); UML_MOVc(block, COND_Z, mem(&m_core->m_flag_exact), 1);
UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_exact), 0); // m_core->m_flag_exact = (alu_res & 0x0000000f) == 0; UML_MOVc(block, COND_NZ, mem(&m_core->m_flag_exact), 0); // m_core->m_flag_exact = (alu_res & 0x0000000f) == 0;
// ALU_RES = I3 // ALU_RES = I3
UML_MOV(block, I3, I0); UML_MOV(block, I3, I0);
@ -1269,9 +1269,9 @@ void dspp_device::generate_arithmetic_opcode(drcuml_block &block, compiler_state
static const int32_t shifts[8] = { 0, 1, 2, 3, 4, 5, 8, 16 }; static const int32_t shifts[8] = { 0, 1, 2, 3, 4, 5, 8, 16 };
if (barrel_code == 8) if (barrel_code == 8)
generate_read_next_operand(block, compiler, desc); // I0 = barrel_code; generate_read_next_operand(block, compiler, desc); // I0 = barrel_code;
else else
UML_MOV(block, I0, barrel_code); // I0 = barrel_code; UML_MOV(block, I0, barrel_code); // I0 = barrel_code;
code_label left_shift = compiler->labelnum++; code_label left_shift = compiler->labelnum++;
code_label done_shift = compiler->labelnum++; code_label done_shift = compiler->labelnum++;
@ -1279,57 +1279,57 @@ void dspp_device::generate_arithmetic_opcode(drcuml_block &block, compiler_state
code_label no_clip = compiler->labelnum++; code_label no_clip = compiler->labelnum++;
code_label no_writeback = compiler->labelnum++; code_label no_writeback = compiler->labelnum++;
code_label done = compiler->labelnum++; code_label done = compiler->labelnum++;
UML_TEST(block, I0, 8); // if (barrel_code & 8) UML_TEST(block, I0, 8); // if (barrel_code & 8)
UML_JMPc(block, COND_Z, left_shift); // { UML_JMPc(block, COND_Z, left_shift); // {
UML_XOR(block, I0, I0, 0xffffffffU); UML_XOR(block, I0, I0, 0xffffffffU);
UML_ADD(block, I0, I0, 1); UML_ADD(block, I0, I0, 1);
UML_AND(block, I0, I0, 7); UML_AND(block, I0, I0, 7);
UML_LOAD(block, I0, (void *)shifts, I0, SIZE_DWORD, SCALE_x8); // uint32_t shift = shifts[(~barrel_code + 1) & 7]; UML_LOAD(block, I0, (void *)shifts, I0, SIZE_DWORD, SCALE_x8); // uint32_t shift = shifts[(~barrel_code + 1) & 7];
if (alu_op < 8) // if (alu_op < 8) if (alu_op < 8) // if (alu_op < 8)
{ // { { // {
UML_SHL(block, I3, I3, 12); UML_SHL(block, I3, I3, 12);
UML_SAR(block, I3, I3, 12); // // Arithmetic UML_SAR(block, I3, I3, 12); // // Arithmetic
UML_SAR(block, mem(&m_core->m_acc), I3, I0); // m_core->m_acc = sign_extend20(alu_res) >> shift; UML_SAR(block, mem(&m_core->m_acc), I3, I0); // m_core->m_acc = sign_extend20(alu_res) >> shift;
} // } } // }
else // else else // else
{ // { { // {
UML_AND(block, I3, I3, 0x000fffff); // // Logical UML_AND(block, I3, I3, 0x000fffff); // // Logical
UML_SHR(block, mem(&m_core->m_acc), I3, I0); // m_core->m_acc = (alu_res & 0xfffff) >> shift; UML_SHR(block, mem(&m_core->m_acc), I3, I0); // m_core->m_acc = (alu_res & 0xfffff) >> shift;
} // } } // }
UML_JMP(block, done_shift); // } UML_JMP(block, done_shift); // }
UML_LABEL(block, left_shift); // else UML_LABEL(block, left_shift); // else
// { // {
UML_LOAD(block, I0, (void *)shifts, I0, SIZE_DWORD, SCALE_x8); // uint32_t shift = shifts[barrel_code]; UML_LOAD(block, I0, (void *)shifts, I0, SIZE_DWORD, SCALE_x8); // uint32_t shift = shifts[barrel_code];
UML_CMP(block, I0, 16); // if (shift != 16) UML_CMP(block, I0, 16); // if (shift != 16)
UML_JMPc(block, COND_E, no_shift); // { UML_JMPc(block, COND_E, no_shift); // {
UML_SHL(block, I3, I3, 12); UML_SHL(block, I3, I3, 12);
UML_SAR(block, I3, I3, 12); UML_SAR(block, I3, I3, 12);
UML_SHL(block, mem(&m_core->m_acc), I3, I0); // m_core->m_acc = sign_extend20(alu_res) << shift; UML_SHL(block, mem(&m_core->m_acc), I3, I0); // m_core->m_acc = sign_extend20(alu_res) << shift;
UML_JMP(block, done_shift); // } UML_JMP(block, done_shift); // }
// else // else
UML_LABEL(block, no_shift); // { UML_LABEL(block, no_shift); // {
UML_TEST(block, mem(&m_core->m_flag_over), 1); // // Clip and saturate UML_TEST(block, mem(&m_core->m_flag_over), 1); // // Clip and saturate
UML_JMPc(block, COND_Z, no_clip); // if (m_core->m_flag_over) UML_JMPc(block, COND_Z, no_clip); // if (m_core->m_flag_over)
UML_TEST(block, mem(&m_core->m_flag_neg), 1); UML_TEST(block, mem(&m_core->m_flag_neg), 1);
UML_MOVc(block, COND_NZ, mem(&m_core->m_acc), 0x7ffff); // m_core->m_acc = m_core->m_flag_neg ? 0x7ffff : 0xfff80000; UML_MOVc(block, COND_NZ, mem(&m_core->m_acc), 0x7ffff); // m_core->m_acc = m_core->m_flag_neg ? 0x7ffff : 0xfff80000;
UML_MOVc(block, COND_Z, mem(&m_core->m_acc), 0xfff80000); UML_MOVc(block, COND_Z, mem(&m_core->m_acc), 0xfff80000);
UML_JMP(block, done_shift); // else UML_JMP(block, done_shift); // else
UML_LABEL(block, no_clip); UML_LABEL(block, no_clip);
UML_SHL(block, I3, I3, 12); // sign_extend20(alu_res); UML_SHL(block, I3, I3, 12); // sign_extend20(alu_res);
UML_SAR(block, mem(&m_core->m_acc), I3, 12); // } UML_SAR(block, mem(&m_core->m_acc), I3, 12); // }
UML_LABEL(block, done_shift); // } UML_LABEL(block, done_shift); // }
UML_CMP(block, mem(&m_core->m_writeback), 0); // if (m_core->m_writeback >= 0) UML_CMP(block, mem(&m_core->m_writeback), 0); // if (m_core->m_writeback >= 0)
UML_JMPc(block, COND_L, no_writeback); // { UML_JMPc(block, COND_L, no_writeback); // {
UML_SHR(block, I0, mem(&m_core->m_acc), 4); UML_SHR(block, I0, mem(&m_core->m_acc), 4);
UML_MOV(block, I1, mem(&m_core->m_writeback)); UML_MOV(block, I1, mem(&m_core->m_writeback));
UML_CALLH(block, *m_dm_write16); // write_data(m_core->m_writeback, m_core->m_acc >> 4); UML_CALLH(block, *m_dm_write16); // write_data(m_core->m_writeback, m_core->m_acc >> 4);
UML_MOV(block, mem(&m_core->m_writeback), 0xffffffffU); // m_core->m_writeback = -1; UML_MOV(block, mem(&m_core->m_writeback), 0xffffffffU); // m_core->m_writeback = -1;
UML_JMP(block, done); // } UML_JMP(block, done); // }
UML_LABEL(block, no_writeback); UML_LABEL(block, no_writeback);
UML_CMP(block, mem(&m_core->m_opidx), numops); // else if (m_core->m_opidx < numops) UML_CMP(block, mem(&m_core->m_opidx), numops); // else if (m_core->m_opidx < numops)
UML_JMPc(block, COND_GE, done); // { UML_JMPc(block, COND_GE, done); // {
generate_write_next_operand(block, compiler); // write_next_operand(m_core->m_acc >> 4); generate_write_next_operand(block, compiler); // write_next_operand(m_core->m_acc >> 4);
UML_LABEL(block, done); // } UML_LABEL(block, done); // }
} }

12
src/devices/cpu/m6502/xavix2000.cpp
View File

@ -7,7 +7,7 @@
The dies for these are marked The dies for these are marked
SSD 2000 NEC 85605-621 SSD 2000 NEC 85605-621
SSD 2002 NEC 85054-611 SSD 2002 NEC 85054-611
6502 with custom opcodes 6502 with custom opcodes
@ -17,12 +17,12 @@
see xavix.cpp for basic notes see xavix.cpp for basic notes
the 2000 chip has more opcodes than the 97/98 chips in xavix.cpp, and the 2000 chip has more opcodes than the 97/98 chips in xavix.cpp, and
is a similar die structure to the 2002 chip, but doesn't seem to have any is a similar die structure to the 2002 chip, but doesn't seem to have any
additional capabilities. additional capabilities.
the 2002 chip seems to be the one that was officially dubbed 'SuperXaviX' the 2002 chip seems to be the one that was officially dubbed 'SuperXaviX'
and has additional video capabilities on top of the extended opcodes. and has additional video capabilities on top of the extended opcodes.
***************************************************************************/ ***************************************************************************/

8
src/devices/cpu/mips/mips3.cpp
View File

@ -16,10 +16,10 @@
#include "ps2vu.h" #include "ps2vu.h"
#include <cmath> #include <cmath>
#define ENABLE_OVERFLOWS (0) #define ENABLE_OVERFLOWS (0)
#define ENABLE_EE_ELF_LOADER (0) #define ENABLE_EE_ELF_LOADER (0)
#define ENABLE_EE_DECI2 (0) #define ENABLE_EE_DECI2 (0)
#define DELAY_SLOT_EXCEPTION_HACK (0) #define DELAY_SLOT_EXCEPTION_HACK (0)
/*************************************************************************** /***************************************************************************
HELPER MACROS HELPER MACROS

2
src/devices/cpu/mips/mips3.h
View File

@ -437,7 +437,7 @@ protected:
bool m_bigendian; bool m_bigendian;
uint32_t m_byte_xor; uint32_t m_byte_xor;
uint32_t m_word_xor; uint32_t m_word_xor;
uint32_t m_dword_xor; uint32_t m_dword_xor;
data_accessors m_memory; data_accessors m_memory;
/* cache memory */ /* cache memory */

10
src/devices/cpu/mips/mips3drc.cpp
View File

@ -333,7 +333,7 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
else else
{ {
UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000 UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
UML_HASHJMP(block, m_core->mode, seqhead->pc, *m_nocode); // hashjmp <mode>,seqhead->pc,nocode UML_HASHJMP(block, m_core->mode, seqhead->pc, *m_nocode); // hashjmp <mode>,seqhead->pc,nocode
continue; continue;
} }
@ -367,11 +367,11 @@ void mips3_device::code_compile_block(uint8_t mode, offs_t pc)
/* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */ /* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */
if (seqlast->flags & OPFLAG_CAN_CHANGE_MODES) if (seqlast->flags & OPFLAG_CAN_CHANGE_MODES)
{ {
UML_HASHJMP(block, mem(&m_core->mode), nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode UML_HASHJMP(block, mem(&m_core->mode), nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode
} }
else if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc) else if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc)
{ {
UML_HASHJMP(block, m_core->mode, nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode UML_HASHJMP(block, m_core->mode, nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode
} }
} }
@ -1308,13 +1308,13 @@ void mips3_device::generate_delay_slot_and_branch(drcuml_block &block, compiler_
} }
else else
{ {
UML_HASHJMP(block, m_core->mode, desc->targetpc, *m_nocode); // hashjmp <mode>,desc->targetpc,nocode UML_HASHJMP(block, m_core->mode, desc->targetpc, *m_nocode); // hashjmp <mode>,desc->targetpc,nocode
} }
} }
else else
{ {
generate_update_cycles(block, compiler_temp, uml::mem(&m_core->jmpdest), true); // <subtract cycles> generate_update_cycles(block, compiler_temp, uml::mem(&m_core->jmpdest), true); // <subtract cycles>
UML_HASHJMP(block, m_core->mode, mem(&m_core->jmpdest), *m_nocode); // hashjmp <mode>,<rsreg>,nocode UML_HASHJMP(block, m_core->mode, mem(&m_core->jmpdest), *m_nocode); // hashjmp <mode>,<rsreg>,nocode
} }
/* update the label */ /* update the label */

12
src/devices/cpu/unsp/unsp.h
View File

@ -26,15 +26,15 @@
***************************************************************************/ ***************************************************************************/
/* map variables */ /* map variables */
#define MAPVAR_PC M0 #define MAPVAR_PC M0
#define MAPVAR_CYCLES M1 #define MAPVAR_CYCLES M1
#define SINGLE_INSTRUCTION_MODE (0) #define SINGLE_INSTRUCTION_MODE (0)
#define ENABLE_UNSP_DRC (1) #define ENABLE_UNSP_DRC (1)
#define UNSP_LOG_OPCODES (0) #define UNSP_LOG_OPCODES (0)
#define UNSP_LOG_REGS (0) #define UNSP_LOG_REGS (0)
//************************************************************************** //**************************************************************************
// TYPE DEFINITIONS // TYPE DEFINITIONS

10
src/devices/cpu/unsp/unspdefs.h
View File

@ -14,9 +14,9 @@
#define UNSP_S 0x0080 #define UNSP_S 0x0080
#define UNSP_C 0x0040 #define UNSP_C 0x0040
#define UNSP_N_SHIFT 9 #define UNSP_N_SHIFT 9
#define UNSP_Z_SHIFT 8 #define UNSP_Z_SHIFT 8
#define UNSP_S_SHIFT 7 #define UNSP_S_SHIFT 7
#define UNSP_C_SHIFT 6 #define UNSP_C_SHIFT 6
#endif // MAME_CPU_UNSP_UNSPDEFS_H #endif // MAME_CPU_UNSP_UNSPDEFS_H

12
src/devices/cpu/unsp/unspdrc.cpp
View File

@ -113,13 +113,13 @@ void unsp_device::code_flush_cache()
/* generate the entry point and out-of-cycles handlers */ /* generate the entry point and out-of-cycles handlers */
static_generate_entry_point(); static_generate_entry_point();
static_generate_nocode_handler(); static_generate_nocode_handler();
static_generate_out_of_cycles(); static_generate_out_of_cycles();
static_generate_memory_accessor(false, "read", m_mem_read); static_generate_memory_accessor(false, "read", m_mem_read);
static_generate_memory_accessor(true, "write", m_mem_write); static_generate_memory_accessor(true, "write", m_mem_write);
static_generate_trigger_fiq(); static_generate_trigger_fiq();
static_generate_trigger_irq(); static_generate_trigger_irq();
static_generate_check_interrupts(); static_generate_check_interrupts();
} }
catch (drcuml_block::abort_compilation &) catch (drcuml_block::abort_compilation &)

2
src/devices/machine/nsc810.h
View File

@ -29,7 +29,7 @@ public:
set_timer0_clock(clk0.value()); set_timer0_clock(clk0.value());
set_timer1_clock(clk1.value()); set_timer1_clock(clk1.value());
} }
nsc810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); nsc810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
auto portA_read_callback() { return m_portA_r.bind(); } auto portA_read_callback() { return m_portA_r.bind(); }

64
src/devices/machine/smc91c9x.cpp
View File

@ -21,7 +21,7 @@
#define LOG_PACKETS (1U << 1) #define LOG_PACKETS (1U << 1)
#define LOG_TX (1U << 2) #define LOG_TX (1U << 2)
#define LOG_RX (1U << 3) #define LOG_RX (1U << 3)
#define LOG_FILTER (1U << 4) #define LOG_FILTER (1U << 4)
//#define VERBOSE (LOG_GENERAL | LOG_PACKETS | LOG_TX | LOG_RX | LOG_FILTER) //#define VERBOSE (LOG_GENERAL | LOG_PACKETS | LOG_TX | LOG_RX | LOG_FILTER)
#include "logmacro.h" #include "logmacro.h"
@ -89,7 +89,7 @@ void smc91c9x_device::device_start()
// These registers don't get cleared on reset // These registers don't get cleared on reset
m_reg[B1_CONFIG] = 0x0030; m_regmask[B1_CONFIG] = 0x17c6; m_reg[B1_CONFIG] = 0x0030; m_regmask[B1_CONFIG] = 0x17c6;
m_reg[B1_BASE] = 0x1866; m_regmask[B1_BASE] = 0xfffe; m_reg[B1_BASE] = 0x1866; m_regmask[B1_BASE] = 0xfffe;
m_reg[B1_IA0_1] = 0x0000; m_regmask[B1_IA0_1] = 0xffff; m_reg[B1_IA0_1] = 0x0000; m_regmask[B1_IA0_1] = 0xffff;
m_reg[B1_IA2_3] = 0x0000; m_regmask[B1_IA2_3] = 0xffff; m_reg[B1_IA2_3] = 0x0000; m_regmask[B1_IA2_3] = 0xffff;
@ -370,8 +370,8 @@ int smc91c9x_device::address_filter(u8 *buf)
/*------------------------------------------------- /*-------------------------------------------------
recv_start_cb - Start receiving packet recv_start_cb - Start receiving packet
A return value of 0 will stop rx processing in dinetwork device A return value of 0 will stop rx processing in dinetwork device
Any other value will be sent to the recv_complete_cb Any other value will be sent to the recv_complete_cb
-------------------------------------------------*/ -------------------------------------------------*/
int smc91c9x_device::recv_start_cb(u8 *buf, int length) int smc91c9x_device::recv_start_cb(u8 *buf, int length)
@ -415,7 +415,7 @@ int smc91c9x_device::recv_start_cb(u8 *buf, int length)
/*------------------------------------------------- /*-------------------------------------------------
receive - Receive data into buffer receive - Receive data into buffer
Returns the buffer packet number + 1 if successful Returns the buffer packet number + 1 if successful
-------------------------------------------------*/ -------------------------------------------------*/
int smc91c9x_device::receive(u8 *buf, int length) int smc91c9x_device::receive(u8 *buf, int length)
@ -889,16 +889,16 @@ WRITE16_MEMBER( smc91c9x_device::write )
} }
if (VERBOSE & LOG_GENERAL) if (VERBOSE & LOG_GENERAL)
{ {
if (data & FDSE) LOG(" FDSE\n"); if (data & FDSE) LOG(" FDSE\n");
if (data & EPH_LOOP) LOG(" EPH LOOP\n"); if (data & EPH_LOOP) LOG(" EPH LOOP\n");
if (data & STP_SQET) LOG(" STP SQET\n"); if (data & STP_SQET) LOG(" STP SQET\n");
if (data & FDUPLX) LOG(" FDUPLX\n"); if (data & FDUPLX) LOG(" FDUPLX\n");
if (data & MON_CSN) LOG(" MON_CSN\n"); if (data & MON_CSN) LOG(" MON_CSN\n");
if (data & NOCRC) LOG(" NOCRC\n"); if (data & NOCRC) LOG(" NOCRC\n");
if (data & PAD_EN) LOG(" PAD_EN\n"); if (data & PAD_EN) LOG(" PAD_EN\n");
if (data & FORCOL) LOG(" FORCOL\n"); if (data & FORCOL) LOG(" FORCOL\n");
if (data & LOOP) LOG(" LOOP\n"); if (data & LOOP) LOG(" LOOP\n");
if (data & TXENA) LOG(" TXENA\n"); if (data & TXENA) LOG(" TXENA\n");
} }
break; break;
@ -921,13 +921,13 @@ WRITE16_MEMBER( smc91c9x_device::write )
if (VERBOSE & LOG_GENERAL) if (VERBOSE & LOG_GENERAL)
{ {
if (data & SOFT_RST) LOG(" SOFT RST\n"); if (data & SOFT_RST) LOG(" SOFT RST\n");
if (data & FILT_CAR) LOG(" FILT_CAR\n"); if (data & FILT_CAR) LOG(" FILT_CAR\n");
if (data & STRIP_CRC) LOG(" STRIP CRC\n"); if (data & STRIP_CRC) LOG(" STRIP CRC\n");
if (data & RXEN) LOG(" RXEN\n"); if (data & RXEN) LOG(" RXEN\n");
if (data & ALMUL) LOG(" ALMUL\n"); if (data & ALMUL) LOG(" ALMUL\n");
if (data & PRMS) LOG(" PRMS\n"); if (data & PRMS) LOG(" PRMS\n");
if (data & RX_ABORT) LOG(" RX_ABORT\n"); if (data & RX_ABORT) LOG(" RX_ABORT\n");
} }
break; break;
@ -972,16 +972,16 @@ WRITE16_MEMBER( smc91c9x_device::write )
} }
if (VERBOSE & LOG_GENERAL) if (VERBOSE & LOG_GENERAL)
{ {
if (data & RCV_BAD) LOG(" RCV_BAD\n"); if (data & RCV_BAD) LOG(" RCV_BAD\n");
if (data & PWRDN) LOG(" PWRDN\n"); if (data & PWRDN) LOG(" PWRDN\n");
if (data & WAKEUP_EN) LOG(" WAKEUP ENABLE\n"); if (data & WAKEUP_EN) LOG(" WAKEUP ENABLE\n");
if (data & AUTO_RELEASE) LOG(" AUTO RELEASE\n"); if (data & AUTO_RELEASE) LOG(" AUTO RELEASE\n");
if (data & LE_ENABLE) LOG(" LE ENABLE\n"); if (data & LE_ENABLE) LOG(" LE ENABLE\n");
if (data & CR_ENABLE) LOG(" CR ENABLE\n"); if (data & CR_ENABLE) LOG(" CR ENABLE\n");
if (data & TE_ENABLE) LOG(" TE ENABLE\n"); if (data & TE_ENABLE) LOG(" TE ENABLE\n");
if (data & EEPROM_SEL) LOG(" EEPROM SELECT\n"); if (data & EEPROM_SEL) LOG(" EEPROM SELECT\n");
if (data & RELOAD) LOG(" RELOAD\n"); if (data & RELOAD) LOG(" RELOAD\n");
if (data & STORE) LOG(" STORE\n"); if (data & STORE) LOG(" STORE\n");
} }
break; break;

6
src/devices/machine/smc91c9x.h
View File

@ -135,7 +135,7 @@ private:
enum control_mask : u8 { enum control_mask : u8 {
EBUF_RX_ALWAYS = 0x40, // Always set on receive buffer control byte EBUF_RX_ALWAYS = 0x40, // Always set on receive buffer control byte
EBUF_ODD = 0x20, // Odd number of data payload bytes EBUF_ODD = 0x20, // Odd number of data payload bytes
EBUF_CRC = 0x10 // Tx add CRC EBUF_CRC = 0x10 // Tx add CRC
}; };
// Receive buffer status // Receive buffer status
@ -165,7 +165,7 @@ private:
LTX_MULT = 0x0008, // Last transmit frame was a multicast LTX_MULT = 0x0008, // Last transmit frame was a multicast
MULCOL = 0x0004, // Multiple collisions detected MULCOL = 0x0004, // Multiple collisions detected
SNGLCOL = 0x0002, // Single collision detected SNGLCOL = 0x0002, // Single collision detected
TX_SUC = 0x0001 // Last transmit frame was successful TX_SUC = 0x0001 // Last transmit frame was successful
}; };
// CTR register bits // CTR register bits
@ -179,7 +179,7 @@ private:
TE_ENABLE = 0x0020, // Transmit Error enable TE_ENABLE = 0x0020, // Transmit Error enable
EEPROM_SEL = 0x0004, // EEPROM address EEPROM_SEL = 0x0004, // EEPROM address
RELOAD = 0x0002, // Reload config from EEPROM RELOAD = 0x0002, // Reload config from EEPROM
STORE = 0x0001 // Store config to EEPROM STORE = 0x0001 // Store config to EEPROM
}; };
// Transmit Control Register bits // Transmit Control Register bits

8
src/devices/machine/spg110.cpp
View File

@ -5,7 +5,7 @@
SunPlus SPG110-series SoC peripheral emulation SunPlus SPG110-series SoC peripheral emulation
It is possible this shares some video features with spg110 and It is possible this shares some video features with spg110 and
can be made a derived device can be made a derived device
**********************************************************************/ **********************************************************************/
@ -60,12 +60,12 @@ void spg110_device::map(address_map &map)
/* /*
TIMER_CALLBACK_MEMBER(spg110_device::test_timer) TIMER_CALLBACK_MEMBER(spg110_device::test_timer)
{ {
// //
} }
*/ */
void spg110_device::device_start() void spg110_device::device_start()
{ {
// m_test_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(spg110_device::test_timer), this)); // m_test_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(spg110_device::test_timer), this));
} }
void spg110_device::device_reset() void spg110_device::device_reset()
@ -83,7 +83,7 @@ WRITE_LINE_MEMBER(spg110_device::vblank)
if (!state) if (!state)
{ {
m_cpu->set_state_unsynced(UNSP_IRQ0_LINE, ASSERT_LINE); m_cpu->set_state_unsynced(UNSP_IRQ0_LINE, ASSERT_LINE);
// m_test_timer->adjust(attotime::from_usec(100), 0); // m_test_timer->adjust(attotime::from_usec(100), 0);
} }
return; return;

30
src/devices/machine/spg2xx.cpp
View File

@ -41,10 +41,10 @@ DEFINE_DEVICE_TYPE(SPG28X, spg28x_device, "spg28x", "SPG280-series System-on-a-C
#define LOG_PPU_READS (1U << 22) #define LOG_PPU_READS (1U << 22)
#define LOG_PPU_WRITES (1U << 23) #define LOG_PPU_WRITES (1U << 23)
#define LOG_UNKNOWN_PPU (1U << 24) #define LOG_UNKNOWN_PPU (1U << 24)
#define LOG_FIQ (1U << 25) #define LOG_FIQ (1U << 25)
#define LOG_SIO (1U << 26) #define LOG_SIO (1U << 26)
#define LOG_EXT_MEM (1U << 27) #define LOG_EXT_MEM (1U << 27)
#define LOG_EXTINT (1U << 28) #define LOG_EXTINT (1U << 28)
#define LOG_IO (LOG_IO_READS | LOG_IO_WRITES | LOG_IRQS | LOG_GPIO | LOG_UART | LOG_I2C | LOG_DMA | LOG_TIMERS | LOG_UNKNOWN_IO) #define LOG_IO (LOG_IO_READS | LOG_IO_WRITES | LOG_IRQS | LOG_GPIO | LOG_UART | LOG_I2C | LOG_DMA | LOG_TIMERS | LOG_UNKNOWN_IO)
#define LOG_CHANNELS (LOG_CHANNEL_READS | LOG_CHANNEL_WRITES) #define LOG_CHANNELS (LOG_CHANNEL_READS | LOG_CHANNEL_WRITES)
#define LOG_SPU (LOG_SPU_READS | LOG_SPU_WRITES | LOG_UNKNOWN_SPU | LOG_CHANNEL_READS | LOG_CHANNEL_WRITES \ #define LOG_SPU (LOG_SPU_READS | LOG_SPU_WRITES | LOG_UNKNOWN_SPU | LOG_CHANNEL_READS | LOG_CHANNEL_WRITES \
@ -116,8 +116,8 @@ void spg2xx_device::device_start()
for (uint16_t i = 0; i < 0x8000; i++) for (uint16_t i = 0; i < 0x8000; i++)
{ {
m_rgb555_to_rgb888[i] = (m_rgb5_to_rgb8[(i >> 10) & 0x1f] << 16) | m_rgb555_to_rgb888[i] = (m_rgb5_to_rgb8[(i >> 10) & 0x1f] << 16) |
(m_rgb5_to_rgb8[(i >> 5) & 0x1f] << 8) | (m_rgb5_to_rgb8[(i >> 5) & 0x1f] << 8) |
(m_rgb5_to_rgb8[(i >> 0) & 0x1f] << 0); (m_rgb5_to_rgb8[(i >> 0) & 0x1f] << 0);
} }
m_porta_out.resolve_safe(); m_porta_out.resolve_safe();
m_portb_out.resolve_safe(); m_portb_out.resolve_safe();
@ -324,13 +324,13 @@ void spg2xx_device::blit(const rectangle &cliprect, uint32_t line, uint32_t xoff
if (yy >= 0x01c0) if (yy >= 0x01c0)
yy -= 0x0200; yy -= 0x0200;
if (yy > 240 || yy < 0) if (yy > 240 || yy < 0)
return; return;
if (SPG_DEBUG_VIDEO && m_debug_blit) if (SPG_DEBUG_VIDEO && m_debug_blit)
printf("%3d:\n", yy); printf("%3d:\n", yy);
int y_index = yy * 320; int y_index = yy * 320;
for (int32_t x = FlipX ? (w - 1) : 0; FlipX ? x >= 0 : x < w; FlipX ? x-- : x++) for (int32_t x = FlipX ? (w - 1) : 0; FlipX ? x >= 0 : x < w; FlipX ? x-- : x++)
{ {
@ -377,8 +377,8 @@ void spg2xx_device::blit(const rectangle &cliprect, uint32_t line, uint32_t xoff
if (SPG_DEBUG_VIDEO && m_debug_blit) if (SPG_DEBUG_VIDEO && m_debug_blit)
printf("M\n"); printf("M\n");
m_screenbuf[pix_index] = (mix_channel((uint8_t)(m_screenbuf[pix_index] >> 16), m_rgb5_to_rgb8[(rgb >> 10) & 0x1f]) << 16) | m_screenbuf[pix_index] = (mix_channel((uint8_t)(m_screenbuf[pix_index] >> 16), m_rgb5_to_rgb8[(rgb >> 10) & 0x1f]) << 16) |
(mix_channel((uint8_t)(m_screenbuf[pix_index] >> 8), m_rgb5_to_rgb8[(rgb >> 5) & 0x1f]) << 8) | (mix_channel((uint8_t)(m_screenbuf[pix_index] >> 8), m_rgb5_to_rgb8[(rgb >> 5) & 0x1f]) << 8) |
(mix_channel((uint8_t)(m_screenbuf[pix_index] >> 0), m_rgb5_to_rgb8[rgb & 0x1f])); (mix_channel((uint8_t)(m_screenbuf[pix_index] >> 0), m_rgb5_to_rgb8[rgb & 0x1f]));
} }
else else
{ {
@ -627,8 +627,8 @@ void spg2xx_device::apply_saturation(const rectangle &cliprect)
const int integer_g = (int)floor(adjusted_g * 255.0f); const int integer_g = (int)floor(adjusted_g * 255.0f);
const int integer_b = (int)floor(adjusted_b * 255.0f); const int integer_b = (int)floor(adjusted_b * 255.0f);
*src++ = (integer_r > 255 ? 0xff0000 : (integer_r < 0 ? 0 : ((uint8_t)integer_r << 16))) | *src++ = (integer_r > 255 ? 0xff0000 : (integer_r < 0 ? 0 : ((uint8_t)integer_r << 16))) |
(integer_g > 255 ? 0x00ff00 : (integer_g < 0 ? 0 : ((uint8_t)integer_g << 8))) | (integer_g > 255 ? 0x00ff00 : (integer_g < 0 ? 0 : ((uint8_t)integer_g << 8))) |
(integer_b > 255 ? 0x0000ff : (integer_b < 0 ? 0 : (uint8_t)integer_b)); (integer_b > 255 ? 0x0000ff : (integer_b < 0 ? 0 : (uint8_t)integer_b));
} }
} }
} }
@ -649,8 +649,8 @@ void spg2xx_device::apply_fade(const rectangle &cliprect)
const uint8_t g = src_g - fade_offset; const uint8_t g = src_g - fade_offset;
const uint8_t b = src_b - fade_offset; const uint8_t b = src_b - fade_offset;
*src++ = (r > src_r ? 0 : (r << 16)) | *src++ = (r > src_r ? 0 : (r << 16)) |
(g > src_g ? 0 : (g << 8)) | (g > src_g ? 0 : (g << 8)) |
(b > src_b ? 0 : (b << 0)); (b > src_b ? 0 : (b << 0));
} }
} }
} }

8
src/devices/machine/wd33c9x.cpp
View File

@ -869,10 +869,10 @@ void wd33c9x_base_device::step(bool timeout)
case DISC_SEL_ARBITRATION: case DISC_SEL_ARBITRATION:
m_xfr_phase = xfr_phase; m_xfr_phase = xfr_phase;
break; break;
case INIT_XFR_WAIT_REQ: case INIT_XFR_WAIT_REQ:
break; break;
default: default:
if (m_xfr_phase != xfr_phase) { if (m_xfr_phase != xfr_phase) {
fatalerror("%s: Unexpected phase change during state.\n", shortname()); fatalerror("%s: Unexpected phase change during state.\n", shortname());
@ -888,7 +888,7 @@ void wd33c9x_base_device::step(bool timeout)
set_scsi_state(FINISHED); set_scsi_state(FINISHED);
m_regs[COMMAND_PHASE] = COMMAND_PHASE_DISCONNECTED; m_regs[COMMAND_PHASE] = COMMAND_PHASE_DISCONNECTED;
break; break;
case COMMAND_PHASE_COMMAND_COMPLETE: case COMMAND_PHASE_COMMAND_COMPLETE:
if (m_regs[CONTROL] & CONTROL_EDI) { if (m_regs[CONTROL] & CONTROL_EDI) {
set_scsi_state(FINISHED); set_scsi_state(FINISHED);
@ -898,7 +898,7 @@ void wd33c9x_base_device::step(bool timeout)
m_regs[CONTROL] |= CONTROL_EDI; m_regs[CONTROL] |= CONTROL_EDI;
} }
break; break;
default: default:
fatalerror("%s: Unhandled command phase during Select-and-Transfer disconnect.\n", shortname()); fatalerror("%s: Unhandled command phase during Select-and-Transfer disconnect.\n", shortname());
break; break;

2
src/devices/video/fixfreq.cpp
View File

@ -32,7 +32,7 @@ fixedfreq_device::fixedfreq_device(const machine_config &mconfig, device_type ty
device_video_interface(mconfig, *this, false), device_video_interface(mconfig, *this, false),
m_htotal(0), m_htotal(0),
m_vtotal(0), m_vtotal(0),
m_hscale(1), // FIXME: this should be modified by static initialization m_hscale(1), // FIXME: this should be modified by static initialization
m_sync_signal(0), m_sync_signal(0),
m_last_x(0), m_last_x(0),
m_last_y(0), m_last_y(0),

2
src/emu/devfind.cpp
View File

@ -318,7 +318,7 @@ bool finder_base::report_missing(bool found, const char *objname, bool required)
{ {
osd_printf_error("Tag not defined for required %s\n", objname); osd_printf_error("Tag not defined for required %s\n", objname);
return false; return false;
} }
// just pass through in the found case // just pass through in the found case
if (found) if (found)

4
src/frontend/mame/ui/icorender.cpp
View File

@ -10,8 +10,8 @@
http://vitiy.info/Code/ico.cpp http://vitiy.info/Code/ico.cpp
TODO: TODO:
* Add variant that loads all images from the file * Add variant that loads all images from the file
* Allow size hint for choosing best candidate * Allow size hint for choosing best candidate
* Allow selecting amongst candidates based on colour depth * Allow selecting amongst candidates based on colour depth
***************************************************************************/ ***************************************************************************/

9
src/frontend/mame/ui/selgame.cpp
View File

@ -40,14 +40,17 @@
#include <mutex> #include <mutex>
#include <thread> #include <thread>
namespace {
constexpr uint32_t FLAGS_UI = ui::menu::FLAG_LEFT_ARROW | ui::menu::FLAG_RIGHT_ARROW;
} // anonymous namespace
extern const char UI_VERSION_TAG[]; extern const char UI_VERSION_TAG[];
namespace ui { namespace ui {
namespace {
constexpr uint32_t FLAGS_UI = ui::menu::FLAG_LEFT_ARROW | ui::menu::FLAG_RIGHT_ARROW;
} // anonymous namespace
class menu_select_game::persistent_data class menu_select_game::persistent_data
{ {
public: public:

2
src/lib/netlist/devices/net_lib.cpp
View File

@ -93,7 +93,7 @@ namespace netlist
ENTRYX_N(7497_dip) ENTRYX_N(7497_dip)
ENTRYX_N(74107) ENTRYX_N(74107)
ENTRYX_N(74107_dip) ENTRYX_N(74107_dip)
ENTRYX_N(74107A) // FIXME: implement missing DIP ENTRYX_N(74107A) // FIXME: implement missing DIP
ENTRYX(74123, TTL_74123, "") ENTRYX(74123, TTL_74123, "")
ENTRYX(74123_dip, TTL_74123_DIP, "") ENTRYX(74123_dip, TTL_74123_DIP, "")
ENTRYX_N(74153) ENTRYX_N(74153)

6
src/lib/netlist/devices/nld_74107.cpp
View File

@ -137,9 +137,9 @@ namespace netlist
m_clk.activate_hl(); m_clk.activate_hl();
} }
NETLIB_DEVICE_IMPL(74107, "TTL_74107", "+CLK,+J,+K,+CLRQ") NETLIB_DEVICE_IMPL(74107, "TTL_74107", "+CLK,+J,+K,+CLRQ")
NETLIB_DEVICE_IMPL(74107A, "TTL_74107A", "+CLK,+J,+K,+CLRQ") NETLIB_DEVICE_IMPL(74107A, "TTL_74107A", "+CLK,+J,+K,+CLRQ")
NETLIB_DEVICE_IMPL(74107_dip, "TTL_74107_DIP", "") NETLIB_DEVICE_IMPL(74107_dip, "TTL_74107_DIP", "")
} //namespace devices } //namespace devices
} // namespace netlist } // namespace netlist

4
src/lib/netlist/devices/nld_7450.cpp
View File

@ -95,8 +95,8 @@ namespace netlist
m_Q.push(res, times[1 - res]);// ? 22000 : 15000); m_Q.push(res, times[1 - res]);// ? 22000 : 15000);
} }
NETLIB_DEVICE_IMPL(7450, "TTL_7450_ANDORINVERT", "+A,+B,+C,+D") NETLIB_DEVICE_IMPL(7450, "TTL_7450_ANDORINVERT", "+A,+B,+C,+D")
NETLIB_DEVICE_IMPL(7450_dip, "TTL_7450_DIP", "") NETLIB_DEVICE_IMPL(7450_dip, "TTL_7450_DIP", "")
} //namespace devices } //namespace devices
} // namespace netlist } // namespace netlist

4
src/lib/netlist/devices/nld_7490.cpp
View File

@ -126,8 +126,8 @@ namespace netlist
m_Q[i].push((m_cnt >> i) & 1, delay[i]); m_Q[i].push((m_cnt >> i) & 1, delay[i]);
} }
NETLIB_DEVICE_IMPL(7490, "TTL_7490", "+A,+B,+R1,+R2,+R91,+R92") NETLIB_DEVICE_IMPL(7490, "TTL_7490", "+A,+B,+R1,+R2,+R91,+R92")
NETLIB_DEVICE_IMPL(7490_dip, "TTL_7490_DIP", "") NETLIB_DEVICE_IMPL(7490_dip, "TTL_7490_DIP", "")
} //namespace devices } //namespace devices
} // namespace netlist } // namespace netlist

2
src/lib/netlist/devices/nld_7493.cpp
View File

@ -127,7 +127,7 @@ namespace netlist
} }
} }
NETLIB_DEVICE_IMPL(7493, "TTL_7493", "+CLKA,+CLKB,+R1,+R2") NETLIB_DEVICE_IMPL(7493, "TTL_7493", "+CLKA,+CLKB,+R1,+R2")
NETLIB_DEVICE_IMPL(7493_dip, "TTL_7493_DIP", "") NETLIB_DEVICE_IMPL(7493_dip, "TTL_7493_DIP", "")
} //namespace devices } //namespace devices

2
src/lib/netlist/devices/nld_7497.cpp
View File

@ -167,7 +167,7 @@ namespace netlist
}; };
NETLIB_DEVICE_IMPL(7497, "TTL_7497", "+CLK,+STRBQ,+ENQ,+UNITYQ,+CLR,+B0,+B1,+B2,+B3,+B4,+B5") NETLIB_DEVICE_IMPL(7497, "TTL_7497", "+CLK,+STRBQ,+ENQ,+UNITYQ,+CLR,+B0,+B1,+B2,+B3,+B4,+B5")
NETLIB_DEVICE_IMPL(7497_dip, "TTL_7497_DIP", "") NETLIB_DEVICE_IMPL(7497_dip, "TTL_7497_DIP", "")
} //namespace devices } //namespace devices

4
src/lib/netlist/devices/nld_7497.h
View File

@ -22,8 +22,8 @@
* *
* When the rate input is binary 0 (all rate inputs low), Z remains high [and Y low]. * When the rate input is binary 0 (all rate inputs low), Z remains high [and Y low].
* *
* The unity/cascade input, when connected to the clock input, passes * The unity/cascade input, when connected to the clock input, passes
* clock frequency (inverted) to the Y output when the rate input/decoding * clock frequency (inverted) to the Y output when the rate input/decoding
* gates are inhibited by the strobe. * gates are inhibited by the strobe.
* *
* When CLR is H, states of CLK and STRB can affect Y and Z. Default are * When CLR is H, states of CLK and STRB can affect Y and Z. Default are

2
src/lib/netlist/nl_base.cpp
View File

@ -275,7 +275,7 @@ netlist_state_t::netlist_state_t(const pstring &aname,
: m_params(nullptr) : m_params(nullptr)
, m_name(aname) , m_name(aname)
, m_state() , m_state()
, m_callbacks(std::move(callbacks)) // Order is important here , m_callbacks(std::move(callbacks)) // Order is important here
, m_log(*m_callbacks) , m_log(*m_callbacks)
, m_setup(std::move(setup)) , m_setup(std::move(setup))
{ {

10
src/lib/netlist/nl_base.h
View File

@ -1346,13 +1346,13 @@ namespace netlist
pstring m_name; pstring m_name;
std::unique_ptr<plib::dynlib> m_lib; // external lib needs to be loaded as long as netlist exists std::unique_ptr<plib::dynlib> m_lib; // external lib needs to be loaded as long as netlist exists
plib::state_manager_t m_state; plib::state_manager_t m_state;
std::unique_ptr<callbacks_t> m_callbacks; std::unique_ptr<callbacks_t> m_callbacks;
log_type m_log; log_type m_log;
std::unique_ptr<setup_t> m_setup; std::unique_ptr<setup_t> m_setup;
nets_collection_type m_nets; nets_collection_type m_nets;
/* sole use is to manage lifetime of net objects */ /* sole use is to manage lifetime of net objects */
devices_collection_type m_devices; devices_collection_type m_devices;
}; };
@ -1405,7 +1405,7 @@ namespace netlist
void print_stats() const; void print_stats() const;
private: private:
std::unique_ptr<netlist_state_t> m_state; std::unique_ptr<netlist_state_t> m_state;
/* mostly rw */ /* mostly rw */
netlist_time m_time; netlist_time m_time;

2
src/lib/netlist/nl_errstr.h
View File

@ -59,7 +59,7 @@
#define MF_1_UNABLE_TO_PARSE_MODEL_1 "Unable to parse model: {1}" #define MF_1_UNABLE_TO_PARSE_MODEL_1 "Unable to parse model: {1}"
#define MF_1_MODEL_ALREADY_EXISTS_1 "Model already exists: {1}" #define MF_1_MODEL_ALREADY_EXISTS_1 "Model already exists: {1}"
#define MF_1_DEVICE_ALREADY_EXISTS_1 "Device already exists: {1}" #define MF_1_DEVICE_ALREADY_EXISTS_1 "Device already exists: {1}"
#define MF_1_ADDING_ALI1_TO_ALIAS_LIST "Error adding alias {1} to alias list" #define MF_1_ADDING_ALI1_TO_ALIAS_LIST "Error adding alias {1} to alias list"
#define MF_1_DIP_PINS_MUST_BE_AN_EQUAL_NUMBER_OF_PINS_1 "You must pass an equal number of pins to DIPPINS {1}" #define MF_1_DIP_PINS_MUST_BE_AN_EQUAL_NUMBER_OF_PINS_1 "You must pass an equal number of pins to DIPPINS {1}"
#define MF_1_UNKNOWN_OBJECT_TYPE_1 "Unknown object type {1}" #define MF_1_UNKNOWN_OBJECT_TYPE_1 "Unknown object type {1}"
#define MF_2_INVALID_NUMBER_CONVERSION_1_2 "Invalid number conversion {1} : {2}" #define MF_2_INVALID_NUMBER_CONVERSION_1_2 "Invalid number conversion {1} : {2}"

6
src/lib/netlist/nl_lists.h
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@ -189,9 +189,9 @@ namespace netlist
using mutex_type = pspin_mutex<TS>; using mutex_type = pspin_mutex<TS>;
using lock_guard_type = std::lock_guard<mutex_type>; using lock_guard_type = std::lock_guard<mutex_type>;
mutex_type m_lock; mutex_type m_lock;
T * m_end; T * m_end;
std::vector<T> m_list; std::vector<T> m_list;
public: public:
// profiling // profiling

2
src/lib/netlist/nl_setup.h
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@ -333,7 +333,7 @@ namespace netlist
devices::nld_base_proxy *get_d_a_proxy(detail::core_terminal_t &out); devices::nld_base_proxy *get_d_a_proxy(detail::core_terminal_t &out);
devices::nld_base_proxy *get_a_d_proxy(detail::core_terminal_t &inp); devices::nld_base_proxy *get_a_d_proxy(detail::core_terminal_t &inp);
netlist_t &m_netlist; netlist_t &m_netlist;
std::unordered_map<pstring, param_ref_t> m_params; std::unordered_map<pstring, param_ref_t> m_params;
std::vector<link_t> m_links; std::vector<link_t> m_links;
factory::list_t m_factory; factory::list_t m_factory;

36
src/lib/netlist/plib/parray.h
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@ -53,7 +53,7 @@ namespace plib {
struct parray struct parray
{ {
public: public:
static constexpr std::size_t SIZEABS() { return sizeabs<FT, SIZE>::ABS(); } static constexpr std::size_t SIZEABS() { return sizeabs<FT, SIZE>::ABS(); }
typedef typename sizeabs<FT, SIZE>::container base_type; typedef typename sizeabs<FT, SIZE>::container base_type;
typedef typename base_type::size_type size_type; typedef typename base_type::size_type size_type;
@ -84,29 +84,29 @@ namespace plib {
throw plib::pexception("parray: size error"); throw plib::pexception("parray: size error");
} }
inline size_type size() const noexcept { return SIZE <= 0 ? m_size : SIZEABS(); } inline size_type size() const noexcept { return SIZE <= 0 ? m_size : SIZEABS(); }
constexpr size_type max_size() const noexcept { return base_type::max_size(); } constexpr size_type max_size() const noexcept { return base_type::max_size(); }
bool empty() const noexcept { return size() == 0; } bool empty() const noexcept { return size() == 0; }
#if 0 #if 0
reference operator[](size_type i) /*noexcept*/ reference operator[](size_type i) /*noexcept*/
{ {
if (i >= m_size) throw plib::pexception("limits error " + to_string(i) + ">=" + to_string(m_size)); if (i >= m_size) throw plib::pexception("limits error " + to_string(i) + ">=" + to_string(m_size));
return m_a[i]; return m_a[i];
} }
const_reference operator[](size_type i) const /*noexcept*/ const_reference operator[](size_type i) const /*noexcept*/
{ {
if (i >= m_size) throw plib::pexception("limits error " + to_string(i) + ">=" + to_string(m_size)); if (i >= m_size) throw plib::pexception("limits error " + to_string(i) + ">=" + to_string(m_size));
return m_a[i]; return m_a[i];
} }
#else #else
reference operator[](size_type i) noexcept { return m_a[i]; } reference operator[](size_type i) noexcept { return m_a[i]; }
constexpr const_reference operator[](size_type i) const noexcept { return m_a[i]; } constexpr const_reference operator[](size_type i) const noexcept { return m_a[i]; }
#endif #endif
FT * data() noexcept { return m_a.data(); } FT * data() noexcept { return m_a.data(); }
const FT * data() const noexcept { return m_a.data(); } const FT * data() const noexcept { return m_a.data(); }
private: private:
base_type m_a; base_type m_a;

16
src/lib/netlist/plib/pparser.cpp
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@ -318,14 +318,14 @@ pstream::size_type ppreprocessor::vread(value_type *buf, const pstream::size_typ
} }
#define CHECKTOK2(p_op, p_prio) \ #define CHECKTOK2(p_op, p_prio) \
else if (tok == # p_op) \ else if (tok == # p_op) \
{ \ { \
if (prio < p_prio) \ if (prio < p_prio) \
return val; \ return val; \
start++; \ start++; \
const auto v2 = expr(sexpr, start, p_prio); \ const auto v2 = expr(sexpr, start, p_prio); \
val = (val p_op v2); \ val = (val p_op v2); \
} \ } \
// Operator precedence see https://en.cppreference.com/w/cpp/language/operator_precedence // Operator precedence see https://en.cppreference.com/w/cpp/language/operator_precedence

2
src/lib/netlist/plib/pstring.h
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@ -24,7 +24,7 @@
// enable this to use std::string instead of pstring globally. // enable this to use std::string instead of pstring globally.
#define PSTRING_USE_STD_STRING (0) #define PSTRING_USE_STD_STRING (0)
template <typename T> template <typename T>
class pstring_const_iterator final class pstring_const_iterator final

2
src/lib/netlist/prg/nltool.cpp
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@ -23,7 +23,7 @@ public:
tool_app_t() : tool_app_t() :
plib::app(), plib::app(),
opt_grp1(*this, "General options", "The following options apply to all commands."), opt_grp1(*this, "General options", "The following options apply to all commands."),
opt_cmd (*this, "c", "cmd", 0, std::vector<pstring>({"run","convert","listdevices","static","header","docheader"}), "run|convert|listdevices|static|header|docheader"), opt_cmd (*this, "c", "cmd", 0, std::vector<pstring>({"run","convert","listdevices","static","header","docheader"}), "run|convert|listdevices|static|header|docheader"),
opt_file(*this, "f", "file", "-", "file to process (default is stdin)"), opt_file(*this, "f", "file", "-", "file to process (default is stdin)"),
opt_defines(*this, "D", "define", "predefine value as macro, e.g. -Dname=value. If '=value' is omitted predefine it as 1. This option may be specified repeatedly."), opt_defines(*this, "D", "define", "predefine value as macro, e.g. -Dname=value. If '=value' is omitted predefine it as 1. This option may be specified repeatedly."),
opt_rfolders(*this, "r", "rom", "where to look for data files"), opt_rfolders(*this, "r", "rom", "where to look for data files"),

12
src/lib/netlist/prg/nlwav.cpp
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@ -318,7 +318,7 @@ public:
std::size_t i = 0; std::size_t i = 0;
for (auto ch : channels) for (auto ch : channels)
{ {
// $var real 64 N1X1 N1X1 $end // $var real 64 N1X1 N1X1 $end
if (format == ANALOG) if (format == ANALOG)
write(pstring("$var real 64 ") + m_ids[i++] + " " + ch + " $end\n"); write(pstring("$var real 64 ") + m_ids[i++] + " " + ch + " $end\n");
else if (format == DIGITAL) else if (format == DIGITAL)
@ -380,7 +380,7 @@ class nlwav_app : public plib::app
public: public:
nlwav_app() : nlwav_app() :
plib::app(), plib::app(),
opt_fmt(*this, "f", "format", 0, std::vector<pstring>({"wav","vcda","vcdd"}), opt_fmt(*this, "f", "format", 0, std::vector<pstring>({"wav","vcda","vcdd"}),
"output format. Available options are wav|vcda|vcdd.\n" "output format. Available options are wav|vcda|vcdd.\n"
"wav : multichannel wav output\n" "wav : multichannel wav output\n"
"vcda : analog VCD output\n" "vcda : analog VCD output\n"
@ -390,11 +390,11 @@ public:
opt_out(*this, "o", "output", "-", "output file"), opt_out(*this, "o", "output", "-", "output file"),
opt_rate(*this, "r", "rate", 48000, "sample rate of output file"), opt_rate(*this, "r", "rate", 48000, "sample rate of output file"),
opt_amp(*this, "a", "amp", 10000.0, "amplification after mean correction (wav only)"), opt_amp(*this, "a", "amp", 10000.0, "amplification after mean correction (wav only)"),
opt_high(*this, "u", "high", 2.0, "minimum input for high level (vcdd only)"), opt_high(*this, "u", "high", 2.0, "minimum input for high level (vcdd only)"),
opt_low(*this, "l", "low", 1.0, "maximum input for low level (vcdd only)"), opt_low(*this, "l", "low", 1.0, "maximum input for low level (vcdd only)"),
opt_verb(*this, "v", "verbose", "be verbose - this produces lots of output"), opt_verb(*this, "v", "verbose", "be verbose - this produces lots of output"),
opt_quiet(*this,"q", "quiet", "be quiet - no warnings"), opt_quiet(*this,"q", "quiet", "be quiet - no warnings"),
opt_args(*this, "input file(s)"), opt_args(*this, "input file(s)"),
opt_version(*this, "", "version", "display version and exit"), opt_version(*this, "", "version", "display version and exit"),
opt_help(*this, "h", "help", "display help and exit"), opt_help(*this, "h", "help", "display help and exit"),
opt_ex1(*this, "./nlwav -f vcdd -o x.vcd log_V*", opt_ex1(*this, "./nlwav -f vcdd -o x.vcd log_V*",
@ -411,7 +411,7 @@ public:
plib::option_num<double> opt_low; plib::option_num<double> opt_low;
plib::option_bool opt_verb; plib::option_bool opt_verb;
plib::option_bool opt_quiet; plib::option_bool opt_quiet;
plib::option_args opt_args; plib::option_args opt_args;
plib::option_bool opt_version; plib::option_bool opt_version;
plib::option_bool opt_help; plib::option_bool opt_help;
plib::option_example opt_ex1; plib::option_example opt_ex1;

2
src/lib/netlist/solver/nld_matrix_solver.h
View File

@ -66,7 +66,7 @@ public:
for (std::size_t i = 0; i < railstart; i++) for (std::size_t i = 0; i < railstart; i++)
{ {
*tcr[i] -= m_go[i]; *tcr[i] -= m_go[i];
gtot_t += m_gt[i]; gtot_t += m_gt[i];
RHS_t += m_Idr[i]; RHS_t += m_Idr[i];
} }

10
src/lib/netlist/solver/nld_ms_gmres.h
View File

@ -84,11 +84,11 @@ private:
plib::mat_cr_t<float_type, SIZE> m_LU; plib::mat_cr_t<float_type, SIZE> m_LU;
float_type m_c[restart_N + 1]; /* mr + 1 */ float_type m_c[restart_N + 1]; /* mr + 1 */
float_type m_g[restart_N + 1]; /* mr + 1 */ float_type m_g[restart_N + 1]; /* mr + 1 */
float_type m_ht[restart_N + 1][restart_N]; /* (mr + 1), mr */ float_type m_ht[restart_N + 1][restart_N]; /* (mr + 1), mr */
float_type m_s[restart_N + 1]; /* mr + 1 */ float_type m_s[restart_N + 1]; /* mr + 1 */
float_type m_y[restart_N + 1]; /* mr + 1 */ float_type m_y[restart_N + 1]; /* mr + 1 */
//plib::parray<float_type, SIZE> m_v[restart_N + 1]; /* mr + 1, n */ //plib::parray<float_type, SIZE> m_v[restart_N + 1]; /* mr + 1, n */
float_type m_v[restart_N + 1][storage_N]; /* mr + 1, n */ float_type m_v[restart_N + 1][storage_N]; /* mr + 1, n */
@ -177,7 +177,7 @@ unsigned matrix_solver_GMRES_t<FT, SIZE>::vsolve_non_dynamic(const bool newton_r
} }
//if (newton_raphson) //if (newton_raphson)
// printf("%e %e\n", this->delta(this->m_new_V), this->m_params.m_accuracy); // printf("%e %e\n", this->delta(this->m_new_V), this->m_params.m_accuracy);
const float_type err = (newton_raphson ? this->delta(this->m_new_V) : 0.0); const float_type err = (newton_raphson ? this->delta(this->m_new_V) : 0.0);
this->store(this->m_new_V); this->store(this->m_new_V);

12
src/mame/drivers/5clown.cpp
View File

@ -583,12 +583,12 @@ uint32_t _5clown_state::screen_update_fclown(screen_device &screen, bitmap_ind16
void _5clown_state::_5clown_palette(palette_device &palette) const void _5clown_state::_5clown_palette(palette_device &palette) const
{ {
/* /*
7654 3210 7654 3210
---- ---x RED component. ---- ---x RED component.
---- --x- GREEN component. ---- --x- GREEN component.
---- -x-- BLUE component. ---- -x-- BLUE component.
---- x--- background killer. ---- x--- background killer.
xxxx ---- unused. xxxx ---- unused.
*/ */
/* 0000KBGR */ /* 0000KBGR */

2
src/mame/drivers/aerofgt.cpp
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@ -1861,7 +1861,7 @@ void aerofgt_state::turbofrc(machine_config &config)
/* video hardware */ /* video hardware */
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(61.31); /* verified on pcb */ screen.set_refresh_hz(61.31); /* verified on pcb */
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
screen.set_size(64*8, 32*8); screen.set_size(64*8, 32*8);
screen.set_visarea(0*8, 44*8-1, 0*8, 30*8-1); screen.set_visarea(0*8, 44*8-1, 0*8, 30*8-1);

2
src/mame/drivers/alg.cpp
View File

@ -323,7 +323,7 @@ MACHINE_CONFIG_START(alg_state::alg_r1)
m_laserdisc->set_overlay(512*2, 262, FUNC(amiga_state::screen_update_amiga)); m_laserdisc->set_overlay(512*2, 262, FUNC(amiga_state::screen_update_amiga));
m_laserdisc->set_overlay_clip((129-8)*2, (449+8-1)*2, 44-8, 244+8-1); m_laserdisc->set_overlay_clip((129-8)*2, (449+8-1)*2, 44-8, 244+8-1);
m_laserdisc->set_overlay_palette(m_palette); m_laserdisc->set_overlay_palette(m_palette);
PALETTE(config, m_palette, FUNC(alg_state::amiga_palette), 4097); PALETTE(config, m_palette, FUNC(alg_state::amiga_palette), 4097);

4
src/mame/drivers/argus.cpp
View File

@ -528,7 +528,7 @@ void argus_state::argus(machine_config &config)
void argus_state::valtric(machine_config &config) void argus_state::valtric(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, 5000000); /* 5 MHz */ Z80(config, m_maincpu, 5000000); /* 5 MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &argus_state::valtric_map); m_maincpu->set_addrmap(AS_PROGRAM, &argus_state::valtric_map);
TIMER(config, "scantimer").configure_scanline(FUNC(argus_state::scanline), "screen", 0, 1); TIMER(config, "scantimer").configure_scanline(FUNC(argus_state::scanline), "screen", 0, 1);
@ -576,7 +576,7 @@ void argus_state::valtric(machine_config &config)
void argus_state::butasan(machine_config &config) void argus_state::butasan(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, 5000000); /* 5 MHz */ Z80(config, m_maincpu, 5000000); /* 5 MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &argus_state::butasan_map); m_maincpu->set_addrmap(AS_PROGRAM, &argus_state::butasan_map);
TIMER(config, "scantimer").configure_scanline(FUNC(argus_state::butasan_scanline), "screen", 0, 1); TIMER(config, "scantimer").configure_scanline(FUNC(argus_state::butasan_scanline), "screen", 0, 1);

12
src/mame/drivers/avt.cpp
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@ -568,12 +568,12 @@ uint32_t avt_state::screen_update_avt(screen_device &screen, bitmap_ind16 &bitma
void avt_state::avt_palette(palette_device &palette) const void avt_state::avt_palette(palette_device &palette) const
{ {
/* prom bits /* prom bits
7654 3210 7654 3210
---- ---x Intensity?. ---- ---x Intensity?.
---- --x- Red component. ---- --x- Red component.
---- -x-- Green component. ---- -x-- Green component.
---- x--- Blue component. ---- x--- Blue component.
xxxx ---- Unused. xxxx ---- Unused.
*/ */
/* 0000BGRI */ /* 0000BGRI */

4
src/mame/drivers/battlane.cpp
View File

@ -274,11 +274,11 @@ void battlane_state::machine_reset()
void battlane_state::battlane(machine_config &config) void battlane_state::battlane(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
M6809(config, m_maincpu, 1500000); /* 1.5 MHz ? */ M6809(config, m_maincpu, 1500000); /* 1.5 MHz ? */
m_maincpu->set_addrmap(AS_PROGRAM, &battlane_state::battlane_map); m_maincpu->set_addrmap(AS_PROGRAM, &battlane_state::battlane_map);
m_maincpu->set_vblank_int("screen", FUNC(battlane_state::battlane_cpu1_interrupt)); m_maincpu->set_vblank_int("screen", FUNC(battlane_state::battlane_cpu1_interrupt));
M6809(config, m_subcpu, 1500000); /* 1.5 MHz ? */ M6809(config, m_subcpu, 1500000); /* 1.5 MHz ? */
m_subcpu->set_addrmap(AS_PROGRAM, &battlane_state::battlane_map); m_subcpu->set_addrmap(AS_PROGRAM, &battlane_state::battlane_map);
config.m_minimum_quantum = attotime::from_hz(6000); config.m_minimum_quantum = attotime::from_hz(6000);

2
src/mame/drivers/bigevglf.cpp
View File

@ -394,7 +394,7 @@ void bigevglf_state::bigevglf(machine_config &config)
m_audiocpu->set_periodic_int(FUNC(bigevglf_state::irq0_line_hold), attotime::from_hz(2*60)); /* IRQ generated by ???; m_audiocpu->set_periodic_int(FUNC(bigevglf_state::irq0_line_hold), attotime::from_hz(2*60)); /* IRQ generated by ???;
2 irqs/frame give good music tempo but also SOUND ERROR in test mode, 2 irqs/frame give good music tempo but also SOUND ERROR in test mode,
4 irqs/frame give SOUND OK in test mode but music seems to be running too fast */ 4 irqs/frame give SOUND OK in test mode but music seems to be running too fast */
/* Clearly, then, there should be some sort of IRQ acknowledge mechanism, duh. -R */ /* Clearly, then, there should be some sort of IRQ acknowledge mechanism, duh. -R */
GENERIC_LATCH_8(config, m_soundlatch[0]); GENERIC_LATCH_8(config, m_soundlatch[0]);
m_soundlatch[0]->data_pending_callback().set("soundnmi", FUNC(input_merger_device::in_w<0>)); m_soundlatch[0]->data_pending_callback().set("soundnmi", FUNC(input_merger_device::in_w<0>));

4
src/mame/drivers/blktiger.cpp
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@ -292,12 +292,12 @@ void blktiger_state::machine_reset()
void blktiger_state::blktiger(machine_config &config) void blktiger_state::blktiger(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, XTAL(24'000'000)/4); /* verified on pcb */ Z80(config, m_maincpu, XTAL(24'000'000)/4); /* verified on pcb */
m_maincpu->set_addrmap(AS_PROGRAM, &blktiger_state::blktiger_map); m_maincpu->set_addrmap(AS_PROGRAM, &blktiger_state::blktiger_map);
m_maincpu->set_addrmap(AS_IO, &blktiger_state::blktiger_io_map); m_maincpu->set_addrmap(AS_IO, &blktiger_state::blktiger_io_map);
m_maincpu->set_vblank_int("screen", FUNC(blktiger_state::irq0_line_hold)); m_maincpu->set_vblank_int("screen", FUNC(blktiger_state::irq0_line_hold));
Z80(config, m_audiocpu, XTAL(3'579'545)); /* verified on pcb */ Z80(config, m_audiocpu, XTAL(3'579'545)); /* verified on pcb */
m_audiocpu->set_addrmap(AS_PROGRAM, &blktiger_state::blktiger_sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &blktiger_state::blktiger_sound_map);
I8751(config, m_mcu, XTAL(24'000'000)/4); /* ??? */ I8751(config, m_mcu, XTAL(24'000'000)/4); /* ??? */

8
src/mame/drivers/brkthru.cpp
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@ -460,10 +460,10 @@ WRITE_LINE_MEMBER(brkthru_state::vblank_irq)
void brkthru_state::brkthru(machine_config &config) void brkthru_state::brkthru(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
MC6809E(config, m_maincpu, MASTER_CLOCK/8); /* 1.5 MHz ? */ MC6809E(config, m_maincpu, MASTER_CLOCK/8); /* 1.5 MHz ? */
m_maincpu->set_addrmap(AS_PROGRAM, &brkthru_state::brkthru_map); m_maincpu->set_addrmap(AS_PROGRAM, &brkthru_state::brkthru_map);
MC6809(config, m_audiocpu, MASTER_CLOCK/2); /* 1.5 MHz ? */ MC6809(config, m_audiocpu, MASTER_CLOCK/2); /* 1.5 MHz ? */
m_audiocpu->set_addrmap(AS_PROGRAM, &brkthru_state::sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &brkthru_state::sound_map);
/* video hardware */ /* video hardware */
@ -497,10 +497,10 @@ void brkthru_state::brkthru(machine_config &config)
void brkthru_state::darwin(machine_config &config) void brkthru_state::darwin(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
MC6809E(config, m_maincpu, MASTER_CLOCK/8); /* 1.5 MHz ? */ MC6809E(config, m_maincpu, MASTER_CLOCK/8); /* 1.5 MHz ? */
m_maincpu->set_addrmap(AS_PROGRAM, &brkthru_state::darwin_map); m_maincpu->set_addrmap(AS_PROGRAM, &brkthru_state::darwin_map);
MC6809(config, m_audiocpu, MASTER_CLOCK/2); /* 1.5 MHz ? */ MC6809(config, m_audiocpu, MASTER_CLOCK/2); /* 1.5 MHz ? */
m_audiocpu->set_addrmap(AS_PROGRAM, &brkthru_state::sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &brkthru_state::sound_map);
/* video hardware */ /* video hardware */

18
src/mame/drivers/chinagat.cpp
View File

@ -574,11 +574,11 @@ void chinagat_state::machine_reset()
void chinagat_state::chinagat(machine_config &config) void chinagat_state::chinagat(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
HD6309(config, m_maincpu, MAIN_CLOCK / 2); /* 1.5 MHz (12MHz oscillator / 4 internally) */ HD6309(config, m_maincpu, MAIN_CLOCK / 2); /* 1.5 MHz (12MHz oscillator / 4 internally) */
m_maincpu->set_addrmap(AS_PROGRAM, &chinagat_state::main_map); m_maincpu->set_addrmap(AS_PROGRAM, &chinagat_state::main_map);
TIMER(config, "scantimer").configure_scanline(FUNC(chinagat_state::chinagat_scanline), "screen", 0, 1); TIMER(config, "scantimer").configure_scanline(FUNC(chinagat_state::chinagat_scanline), "screen", 0, 1);
HD6309(config, m_subcpu, MAIN_CLOCK / 2); /* 1.5 MHz (12MHz oscillator / 4 internally) */ HD6309(config, m_subcpu, MAIN_CLOCK / 2); /* 1.5 MHz (12MHz oscillator / 4 internally) */
m_subcpu->set_addrmap(AS_PROGRAM, &chinagat_state::sub_map); m_subcpu->set_addrmap(AS_PROGRAM, &chinagat_state::sub_map);
Z80(config, m_soundcpu, XTAL(3'579'545)); /* 3.579545 MHz */ Z80(config, m_soundcpu, XTAL(3'579'545)); /* 3.579545 MHz */
@ -613,14 +613,14 @@ void chinagat_state::chinagat(machine_config &config)
void chinagat_state::saiyugoub1(machine_config &config) void chinagat_state::saiyugoub1(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
MC6809E(config, m_maincpu, MAIN_CLOCK / 8); /* 68B09EP 1.5 MHz (12MHz oscillator) */ MC6809E(config, m_maincpu, MAIN_CLOCK / 8); /* 68B09EP 1.5 MHz (12MHz oscillator) */
m_maincpu->set_addrmap(AS_PROGRAM, &chinagat_state::main_map); m_maincpu->set_addrmap(AS_PROGRAM, &chinagat_state::main_map);
TIMER(config, "scantimer").configure_scanline(FUNC(chinagat_state::chinagat_scanline), "screen", 0, 1); TIMER(config, "scantimer").configure_scanline(FUNC(chinagat_state::chinagat_scanline), "screen", 0, 1);
MC6809E(config, m_subcpu, MAIN_CLOCK / 8); /* 68B09EP 1.5 MHz (12MHz oscillator) */ MC6809E(config, m_subcpu, MAIN_CLOCK / 8); /* 68B09EP 1.5 MHz (12MHz oscillator) */
m_subcpu->set_addrmap(AS_PROGRAM, &chinagat_state::sub_map); m_subcpu->set_addrmap(AS_PROGRAM, &chinagat_state::sub_map);
Z80(config, m_soundcpu, XTAL(3'579'545)); /* 3.579545 MHz oscillator */ Z80(config, m_soundcpu, XTAL(3'579'545)); /* 3.579545 MHz oscillator */
m_soundcpu->set_addrmap(AS_PROGRAM, &chinagat_state::saiyugoub1_sound_map); m_soundcpu->set_addrmap(AS_PROGRAM, &chinagat_state::saiyugoub1_sound_map);
i8748_device &mcu(I8748(config, "mcu", 9263750)); /* 9.263750 MHz oscillator, divided by 3*5 internally */ i8748_device &mcu(I8748(config, "mcu", 9263750)); /* 9.263750 MHz oscillator, divided by 3*5 internally */
@ -655,21 +655,21 @@ void chinagat_state::saiyugoub1(machine_config &config)
MSM5205(config, m_adpcm, 9263750 / 24); MSM5205(config, m_adpcm, 9263750 / 24);
m_adpcm->vck_legacy_callback().set(FUNC(chinagat_state::saiyugoub1_m5205_irq_w)); /* Interrupt function */ m_adpcm->vck_legacy_callback().set(FUNC(chinagat_state::saiyugoub1_m5205_irq_w)); /* Interrupt function */
m_adpcm->set_prescaler_selector(msm5205_device::S64_4B); /* vclk input mode (6030Hz, 4-bit) */ m_adpcm->set_prescaler_selector(msm5205_device::S64_4B); /* vclk input mode (6030Hz, 4-bit) */
m_adpcm->add_route(ALL_OUTPUTS, "mono", 0.60); m_adpcm->add_route(ALL_OUTPUTS, "mono", 0.60);
} }
void chinagat_state::saiyugoub2(machine_config &config) void chinagat_state::saiyugoub2(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
MC6809E(config, m_maincpu, MAIN_CLOCK / 8); /* 1.5 MHz (12MHz oscillator) */ MC6809E(config, m_maincpu, MAIN_CLOCK / 8); /* 1.5 MHz (12MHz oscillator) */
m_maincpu->set_addrmap(AS_PROGRAM, &chinagat_state::main_map); m_maincpu->set_addrmap(AS_PROGRAM, &chinagat_state::main_map);
TIMER(config, "scantimer").configure_scanline(FUNC(chinagat_state::chinagat_scanline), "screen", 0, 1); TIMER(config, "scantimer").configure_scanline(FUNC(chinagat_state::chinagat_scanline), "screen", 0, 1);
MC6809E(config, m_subcpu, MAIN_CLOCK / 8); /* 1.5 MHz (12MHz oscillator) */ MC6809E(config, m_subcpu, MAIN_CLOCK / 8); /* 1.5 MHz (12MHz oscillator) */
m_subcpu->set_addrmap(AS_PROGRAM, &chinagat_state::sub_map); m_subcpu->set_addrmap(AS_PROGRAM, &chinagat_state::sub_map);
Z80(config, m_soundcpu, XTAL(3'579'545)); /* 3.579545 MHz oscillator */ Z80(config, m_soundcpu, XTAL(3'579'545)); /* 3.579545 MHz oscillator */
m_soundcpu->set_addrmap(AS_PROGRAM, &chinagat_state::ym2203c_sound_map); m_soundcpu->set_addrmap(AS_PROGRAM, &chinagat_state::ym2203c_sound_map);
config.m_minimum_quantum = attotime::from_hz(6000); /* heavy interleaving to sync up sprite<->main cpu's */ config.m_minimum_quantum = attotime::from_hz(6000); /* heavy interleaving to sync up sprite<->main cpu's */

20
src/mame/drivers/clickstart.cpp
View File

@ -4,21 +4,21 @@
Leapfrog Clickstart Emulation Leapfrog Clickstart Emulation
die markings show die markings show
"SunPlus QL8041C" ( known as Sunplus SPG2?? ) "SunPlus QL8041C" ( known as Sunplus SPG2?? )
Status: Status:
Some games have Checksums listed in the header area that appear to be Some games have Checksums listed in the header area that appear to be
like the byte checksums on the Radica games in vii.cpp, however the like the byte checksums on the Radica games in vii.cpp, however the
calculation doesn't add up correctly. There is also a checksum in calculation doesn't add up correctly. There is also a checksum in
a footer area at the end of every ROM that does add up correctly in a footer area at the end of every ROM that does add up correctly in
all cases. all cases.
The ROM carts are marked for 4MByte ROMs at least so the sizes The ROM carts are marked for 4MByte ROMs at least so the sizes
should be correct. should be correct.
What type of SPG is this? What type of SPG is this?
*******************************************************************************/ *******************************************************************************/

2
src/mame/drivers/dacholer.cpp
View File

@ -702,7 +702,7 @@ void dacholer_state::dacholer(machine_config &config)
AY8910(config, "ay3", XTAL(19'968'000)/16).add_route(ALL_OUTPUTS, "mono", 0.15); AY8910(config, "ay3", XTAL(19'968'000)/16).add_route(ALL_OUTPUTS, "mono", 0.15);
MSM5205(config, m_msm, XTAL(384'000)); MSM5205(config, m_msm, XTAL(384'000));
m_msm->vck_legacy_callback().set(FUNC(dacholer_state::adpcm_int)); /* interrupt function */ m_msm->vck_legacy_callback().set(FUNC(dacholer_state::adpcm_int)); /* interrupt function */
m_msm->set_prescaler_selector(msm5205_device::S96_4B); /* 1 / 96 = 3906.25Hz playback - guess */ m_msm->set_prescaler_selector(msm5205_device::S96_4B); /* 1 / 96 = 3906.25Hz playback - guess */
m_msm->add_route(ALL_OUTPUTS, "mono", 0.30); m_msm->add_route(ALL_OUTPUTS, "mono", 0.30);
} }

16
src/mame/drivers/ddragon.cpp
View File

@ -944,14 +944,14 @@ GFXDECODE_END
void ddragon_state::ddragon(machine_config &config) void ddragon_state::ddragon(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
HD6309E(config, m_maincpu, MAIN_CLOCK / 4); /* HD63C09EP, 3 MHz */ HD6309E(config, m_maincpu, MAIN_CLOCK / 4); /* HD63C09EP, 3 MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &ddragon_state::ddragon_map); m_maincpu->set_addrmap(AS_PROGRAM, &ddragon_state::ddragon_map);
TIMER(config, "scantimer").configure_scanline(FUNC(ddragon_state::ddragon_scanline), "screen", 0, 1); TIMER(config, "scantimer").configure_scanline(FUNC(ddragon_state::ddragon_scanline), "screen", 0, 1);
HD63701(config, m_subcpu, MAIN_CLOCK / 2); /* HD63701YOP, 6 MHz / 4 internally */ HD63701(config, m_subcpu, MAIN_CLOCK / 2); /* HD63701YOP, 6 MHz / 4 internally */
m_subcpu->set_addrmap(AS_PROGRAM, &ddragon_state::sub_map); m_subcpu->set_addrmap(AS_PROGRAM, &ddragon_state::sub_map);
MC6809(config, m_soundcpu, MAIN_CLOCK / 2); /* HD68A09P, 6 MHz / 4 internally */ MC6809(config, m_soundcpu, MAIN_CLOCK / 2); /* HD68A09P, 6 MHz / 4 internally */
m_soundcpu->set_addrmap(AS_PROGRAM, &ddragon_state::sound_map); m_soundcpu->set_addrmap(AS_PROGRAM, &ddragon_state::sound_map);
config.m_minimum_quantum = attotime::from_hz(60000); /* heavy interleaving to sync up sprite<->main CPUs */ config.m_minimum_quantum = attotime::from_hz(60000); /* heavy interleaving to sync up sprite<->main CPUs */
@ -1015,14 +1015,14 @@ void ddragon_state::ddragonba(machine_config &config)
void ddragon_state::ddragon6809(machine_config &config) void ddragon_state::ddragon6809(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
MC6809E(config, m_maincpu, MAIN_CLOCK / 8); /* 1.5 MHz */ MC6809E(config, m_maincpu, MAIN_CLOCK / 8); /* 1.5 MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &ddragon_state::ddragon_map); m_maincpu->set_addrmap(AS_PROGRAM, &ddragon_state::ddragon_map);
TIMER(config, "scantimer").configure_scanline(FUNC(ddragon_state::ddragon_scanline), "screen", 0, 1); TIMER(config, "scantimer").configure_scanline(FUNC(ddragon_state::ddragon_scanline), "screen", 0, 1);
MC6809E(config, m_subcpu, MAIN_CLOCK / 8); /* 1.5 Mhz */ MC6809E(config, m_subcpu, MAIN_CLOCK / 8); /* 1.5 Mhz */
m_subcpu->set_addrmap(AS_PROGRAM, &ddragon_state::sub_map); m_subcpu->set_addrmap(AS_PROGRAM, &ddragon_state::sub_map);
MC6809E(config, m_soundcpu, MAIN_CLOCK / 8); /* 1.5 MHz */ MC6809E(config, m_soundcpu, MAIN_CLOCK / 8); /* 1.5 MHz */
m_soundcpu->set_addrmap(AS_PROGRAM, &ddragon_state::sound_map); m_soundcpu->set_addrmap(AS_PROGRAM, &ddragon_state::sound_map);
config.m_minimum_quantum = attotime::from_hz(60000); /* heavy interleaving to sync up sprite<->main CPUs */ config.m_minimum_quantum = attotime::from_hz(60000); /* heavy interleaving to sync up sprite<->main CPUs */
@ -1066,11 +1066,11 @@ void ddragon_state::ddragon6809(machine_config &config)
void ddragon_state::ddragon2(machine_config &config) void ddragon_state::ddragon2(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
HD6309E(config, m_maincpu, MAIN_CLOCK / 4); /* HD63C09EP, 3 MHz */ HD6309E(config, m_maincpu, MAIN_CLOCK / 4); /* HD63C09EP, 3 MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &ddragon_state::dd2_map); m_maincpu->set_addrmap(AS_PROGRAM, &ddragon_state::dd2_map);
TIMER(config, "scantimer").configure_scanline(FUNC(ddragon_state::ddragon_scanline), "screen", 0, 1); TIMER(config, "scantimer").configure_scanline(FUNC(ddragon_state::ddragon_scanline), "screen", 0, 1);
Z80(config, m_subcpu, MAIN_CLOCK / 3); /* 4 MHz */ Z80(config, m_subcpu, MAIN_CLOCK / 3); /* 4 MHz */
m_subcpu->set_addrmap(AS_PROGRAM, &ddragon_state::dd2_sub_map); m_subcpu->set_addrmap(AS_PROGRAM, &ddragon_state::dd2_sub_map);
Z80(config, m_soundcpu, 3579545); Z80(config, m_soundcpu, 3579545);

6
src/mame/drivers/deniam.cpp
View File

@ -253,11 +253,11 @@ void deniam_state::machine_reset()
void deniam_state::deniam16b(machine_config &config) void deniam_state::deniam16b(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
M68000(config, m_maincpu, XTAL(25'000'000)/2); /* 12.5Mhz verified */ M68000(config, m_maincpu, XTAL(25'000'000)/2); /* 12.5Mhz verified */
m_maincpu->set_addrmap(AS_PROGRAM, &deniam_state::deniam16b_map); m_maincpu->set_addrmap(AS_PROGRAM, &deniam_state::deniam16b_map);
m_maincpu->set_vblank_int("screen", FUNC(deniam_state::irq4_line_assert)); m_maincpu->set_vblank_int("screen", FUNC(deniam_state::irq4_line_assert));
Z80(config, m_audiocpu, XTAL(25'000'000)/4); /* 6.25Mhz verified */ Z80(config, m_audiocpu, XTAL(25'000'000)/4); /* 6.25Mhz verified */
m_audiocpu->set_addrmap(AS_PROGRAM, &deniam_state::sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &deniam_state::sound_map);
m_audiocpu->set_addrmap(AS_IO, &deniam_state::sound_io_map); m_audiocpu->set_addrmap(AS_IO, &deniam_state::sound_io_map);
@ -291,7 +291,7 @@ void deniam_state::deniam16b(machine_config &config)
void deniam_state::deniam16c(machine_config &config) void deniam_state::deniam16c(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
M68000(config, m_maincpu, XTAL(25'000'000)/2); /* 12.5Mhz verified */ M68000(config, m_maincpu, XTAL(25'000'000)/2); /* 12.5Mhz verified */
m_maincpu->set_addrmap(AS_PROGRAM, &deniam_state::deniam16c_map); m_maincpu->set_addrmap(AS_PROGRAM, &deniam_state::deniam16c_map);
m_maincpu->set_vblank_int("screen", FUNC(deniam_state::irq4_line_assert)); m_maincpu->set_vblank_int("screen", FUNC(deniam_state::irq4_line_assert));

2
src/mame/drivers/discoboy.cpp
View File

@ -459,7 +459,7 @@ WRITE_LINE_MEMBER(discoboy_state::yunsung8_adpcm_int)
void discoboy_state::discoboy(machine_config &config) void discoboy_state::discoboy(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, XTAL(12'000'000)/2); /* 6 MHz? */ Z80(config, m_maincpu, XTAL(12'000'000)/2); /* 6 MHz? */
m_maincpu->set_addrmap(AS_PROGRAM, &discoboy_state::discoboy_map); m_maincpu->set_addrmap(AS_PROGRAM, &discoboy_state::discoboy_map);
m_maincpu->set_addrmap(AS_IO, &discoboy_state::io_map); m_maincpu->set_addrmap(AS_IO, &discoboy_state::io_map);
m_maincpu->set_vblank_int("screen", FUNC(discoboy_state::irq0_line_hold)); m_maincpu->set_vblank_int("screen", FUNC(discoboy_state::irq0_line_hold));

2
src/mame/drivers/drmicro.cpp
View File

@ -270,7 +270,7 @@ void drmicro_state::drmicro(machine_config &config)
SN76496(config, "sn3", MCLK/4).add_route(ALL_OUTPUTS, "mono", 0.50); SN76496(config, "sn3", MCLK/4).add_route(ALL_OUTPUTS, "mono", 0.50);
MSM5205(config, m_msm, 384000); MSM5205(config, m_msm, 384000);
m_msm->vck_legacy_callback().set(FUNC(drmicro_state::pcm_w)); /* IRQ handler */ m_msm->vck_legacy_callback().set(FUNC(drmicro_state::pcm_w)); /* IRQ handler */
m_msm->set_prescaler_selector(msm5205_device::S64_4B); /* 6 KHz */ m_msm->set_prescaler_selector(msm5205_device::S64_4B); /* 6 KHz */
m_msm->add_route(ALL_OUTPUTS, "mono", 0.75); m_msm->add_route(ALL_OUTPUTS, "mono", 0.75);
} }

34
src/mame/drivers/dynax.cpp
View File

@ -4247,7 +4247,7 @@ void dynax_state::cdracula(machine_config &config)
void dynax_state::hanamai(machine_config &config) void dynax_state::hanamai(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, 22000000 / 4); /* 5.5MHz */ Z80(config, m_maincpu, 22000000 / 4); /* 5.5MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &dynax_state::sprtmtch_mem_map); m_maincpu->set_addrmap(AS_PROGRAM, &dynax_state::sprtmtch_mem_map);
m_maincpu->set_addrmap(AS_IO, &dynax_state::hanamai_io_map); m_maincpu->set_addrmap(AS_IO, &dynax_state::hanamai_io_map);
m_maincpu->set_irq_acknowledge_callback("mainirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus m_maincpu->set_irq_acknowledge_callback("mainirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus
@ -4303,8 +4303,8 @@ void dynax_state::hanamai(machine_config &config)
ym2203.add_route(3, "mono", 0.50); ym2203.add_route(3, "mono", 0.50);
MSM5205(config, m_msm, 384000); MSM5205(config, m_msm, 384000);
m_msm->vck_legacy_callback().set(FUNC(dynax_state::adpcm_int)); /* IRQ handler */ m_msm->vck_legacy_callback().set(FUNC(dynax_state::adpcm_int)); /* IRQ handler */
m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz, 4 Bits */ m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz, 4 Bits */
m_msm->add_route(ALL_OUTPUTS, "mono", 1.0); m_msm->add_route(ALL_OUTPUTS, "mono", 1.0);
} }
@ -4317,7 +4317,7 @@ void dynax_state::hanamai(machine_config &config)
void dynax_state::hnoridur(machine_config &config) void dynax_state::hnoridur(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, XTAL(22'000'000) / 4); /* 5.5MHz */ Z80(config, m_maincpu, XTAL(22'000'000) / 4); /* 5.5MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &dynax_state::hnoridur_mem_map); m_maincpu->set_addrmap(AS_PROGRAM, &dynax_state::hnoridur_mem_map);
m_maincpu->set_addrmap(AS_IO, &dynax_state::hnoridur_io_map); m_maincpu->set_addrmap(AS_IO, &dynax_state::hnoridur_io_map);
m_maincpu->set_irq_acknowledge_callback("mainirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus m_maincpu->set_irq_acknowledge_callback("mainirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus
@ -4371,8 +4371,8 @@ void dynax_state::hnoridur(machine_config &config)
YM2413(config, "ym2413", XTAL(3'579'545)).add_route(ALL_OUTPUTS, "mono", 1.0); YM2413(config, "ym2413", XTAL(3'579'545)).add_route(ALL_OUTPUTS, "mono", 1.0);
MSM5205(config, m_msm, XTAL(384'000)); MSM5205(config, m_msm, XTAL(384'000));
m_msm->vck_legacy_callback().set(FUNC(dynax_state::adpcm_int)); /* IRQ handler */ m_msm->vck_legacy_callback().set(FUNC(dynax_state::adpcm_int)); /* IRQ handler */
m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz, 4 Bits */ m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz, 4 Bits */
m_msm->add_route(ALL_OUTPUTS, "mono", 1.0); m_msm->add_route(ALL_OUTPUTS, "mono", 1.0);
} }
@ -4387,7 +4387,7 @@ void dynax_state::hjingi(machine_config &config)
Z80(config, m_maincpu, XTAL(22'000'000) / 4); Z80(config, m_maincpu, XTAL(22'000'000) / 4);
m_maincpu->set_addrmap(AS_PROGRAM, &dynax_state::hjingi_mem_map); m_maincpu->set_addrmap(AS_PROGRAM, &dynax_state::hjingi_mem_map);
m_maincpu->set_addrmap(AS_IO, &dynax_state::hjingi_io_map); m_maincpu->set_addrmap(AS_IO, &dynax_state::hjingi_io_map);
m_maincpu->set_irq_acknowledge_callback("mainirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus m_maincpu->set_irq_acknowledge_callback("mainirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus
MCFG_MACHINE_START_OVERRIDE(dynax_state,hjingi) MCFG_MACHINE_START_OVERRIDE(dynax_state,hjingi)
MCFG_MACHINE_RESET_OVERRIDE(dynax_state,dynax) MCFG_MACHINE_RESET_OVERRIDE(dynax_state,dynax)
@ -4440,8 +4440,8 @@ void dynax_state::hjingi(machine_config &config)
YM2413(config, "ym2413", XTAL(3'579'545)).add_route(ALL_OUTPUTS, "mono", 1.0); YM2413(config, "ym2413", XTAL(3'579'545)).add_route(ALL_OUTPUTS, "mono", 1.0);
MSM5205(config, m_msm, XTAL(384'000)); MSM5205(config, m_msm, XTAL(384'000));
m_msm->vck_legacy_callback().set(FUNC(dynax_state::adpcm_int)); /* IRQ handler */ m_msm->vck_legacy_callback().set(FUNC(dynax_state::adpcm_int)); /* IRQ handler */
m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz, 4 Bits */ m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz, 4 Bits */
m_msm->add_route(ALL_OUTPUTS, "mono", 1.0); m_msm->add_route(ALL_OUTPUTS, "mono", 1.0);
} }
@ -4453,10 +4453,10 @@ void dynax_state::hjingi(machine_config &config)
void dynax_state::sprtmtch(machine_config &config) void dynax_state::sprtmtch(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, 22000000 / 4); /* 5.5MHz */ Z80(config, m_maincpu, 22000000 / 4); /* 5.5MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &dynax_state::sprtmtch_mem_map); m_maincpu->set_addrmap(AS_PROGRAM, &dynax_state::sprtmtch_mem_map);
m_maincpu->set_addrmap(AS_IO, &dynax_state::sprtmtch_io_map); m_maincpu->set_addrmap(AS_IO, &dynax_state::sprtmtch_io_map);
m_maincpu->set_irq_acknowledge_callback("mainirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus m_maincpu->set_irq_acknowledge_callback("mainirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus
MCFG_MACHINE_START_OVERRIDE(dynax_state,hanamai) MCFG_MACHINE_START_OVERRIDE(dynax_state,hanamai)
MCFG_MACHINE_RESET_OVERRIDE(dynax_state,dynax) MCFG_MACHINE_RESET_OVERRIDE(dynax_state,dynax)
@ -4662,15 +4662,15 @@ MACHINE_START_MEMBER(dynax_state,jantouki)
void dynax_state::jantouki(machine_config &config) void dynax_state::jantouki(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, 22000000 / 4); /* 5.5MHz */ Z80(config, m_maincpu, 22000000 / 4); /* 5.5MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &dynax_state::jantouki_mem_map); m_maincpu->set_addrmap(AS_PROGRAM, &dynax_state::jantouki_mem_map);
m_maincpu->set_addrmap(AS_IO, &dynax_state::jantouki_io_map); m_maincpu->set_addrmap(AS_IO, &dynax_state::jantouki_io_map);
m_maincpu->set_irq_acknowledge_callback("mainirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus m_maincpu->set_irq_acknowledge_callback("mainirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus
Z80(config, m_soundcpu, 22000000 / 4); /* 5.5MHz */ Z80(config, m_soundcpu, 22000000 / 4); /* 5.5MHz */
m_soundcpu->set_addrmap(AS_PROGRAM, &dynax_state::jantouki_sound_mem_map); m_soundcpu->set_addrmap(AS_PROGRAM, &dynax_state::jantouki_sound_mem_map);
m_soundcpu->set_addrmap(AS_IO, &dynax_state::jantouki_sound_io_map); m_soundcpu->set_addrmap(AS_IO, &dynax_state::jantouki_sound_io_map);
m_soundcpu->set_irq_acknowledge_callback("soundirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus m_soundcpu->set_irq_acknowledge_callback("soundirq", FUNC(rst_pos_buffer_device::inta_cb)); // IM 0 needs an opcode on the data bus
MCFG_MACHINE_START_OVERRIDE(dynax_state,jantouki) MCFG_MACHINE_START_OVERRIDE(dynax_state,jantouki)
MCFG_MACHINE_RESET_OVERRIDE(dynax_state,dynax) MCFG_MACHINE_RESET_OVERRIDE(dynax_state,dynax)
@ -4739,8 +4739,8 @@ void dynax_state::jantouki(machine_config &config)
ym2203.add_route(3, "mono", 0.50); ym2203.add_route(3, "mono", 0.50);
MSM5205(config, m_msm, 384000); MSM5205(config, m_msm, 384000);
m_msm->vck_legacy_callback().set(FUNC(dynax_state::adpcm_int_cpu1)); /* IRQ handler */ m_msm->vck_legacy_callback().set(FUNC(dynax_state::adpcm_int_cpu1)); /* IRQ handler */
m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz, 4 Bits */ m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz, 4 Bits */
m_msm->add_route(ALL_OUTPUTS, "mono", 1.0); m_msm->add_route(ALL_OUTPUTS, "mono", 1.0);
/* devices */ /* devices */

8
src/mame/drivers/fantland.cpp
View File

@ -934,10 +934,10 @@ void borntofi_state::machine_reset()
void borntofi_state::borntofi(machine_config &config) void borntofi_state::borntofi(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
V20(config, m_maincpu, 16000000/2); // D701080C-8 - NEC D70108C-8 V20 CPU, running at 8.000MHz [16/2] V20(config, m_maincpu, 16000000/2); // D701080C-8 - NEC D70108C-8 V20 CPU, running at 8.000MHz [16/2]
m_maincpu->set_addrmap(AS_PROGRAM, &borntofi_state::main_map); m_maincpu->set_addrmap(AS_PROGRAM, &borntofi_state::main_map);
I8088(config, m_audiocpu, 18432000/3); // 8088 - AMD P8088-2 CPU, running at 6.144MHz [18.432/3] I8088(config, m_audiocpu, 18432000/3); // 8088 - AMD P8088-2 CPU, running at 6.144MHz [18.432/3]
m_audiocpu->set_addrmap(AS_PROGRAM, &borntofi_state::sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &borntofi_state::sound_map);
/* video hardware */ /* video hardware */
@ -983,10 +983,10 @@ void borntofi_state::borntofi(machine_config &config)
void fantland_state::wheelrun(machine_config &config) void fantland_state::wheelrun(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
V20(config, m_maincpu, XTAL(18'000'000)/2); // D701080C-8 (V20) V20(config, m_maincpu, XTAL(18'000'000)/2); // D701080C-8 (V20)
m_maincpu->set_addrmap(AS_PROGRAM, &fantland_state::wheelrun_map); m_maincpu->set_addrmap(AS_PROGRAM, &fantland_state::wheelrun_map);
Z80(config, m_audiocpu, XTAL(18'000'000)/2); // Z8400BB1 (Z80B) Z80(config, m_audiocpu, XTAL(18'000'000)/2); // Z8400BB1 (Z80B)
m_audiocpu->set_addrmap(AS_PROGRAM, &fantland_state::wheelrun_sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &fantland_state::wheelrun_sound_map);
// IRQ by YM3526, NMI when soundlatch is written // IRQ by YM3526, NMI when soundlatch is written

32
src/mame/drivers/fcrash.cpp
View File

@ -1763,14 +1763,14 @@ void cps_state::fcrash(machine_config &config)
ym2.add_route(2, "mono", 0.10); ym2.add_route(2, "mono", 0.10);
ym2.add_route(3, "mono", 1.0); ym2.add_route(3, "mono", 1.0);
MSM5205(config, m_msm_1, 24000000/64); /* ? */ MSM5205(config, m_msm_1, 24000000/64); /* ? */
m_msm_1->vck_legacy_callback().set(FUNC(cps_state::m5205_int1)); /* interrupt function */ m_msm_1->vck_legacy_callback().set(FUNC(cps_state::m5205_int1)); /* interrupt function */
m_msm_1->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */ m_msm_1->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */
m_msm_1->add_route(ALL_OUTPUTS, "mono", 0.25); m_msm_1->add_route(ALL_OUTPUTS, "mono", 0.25);
MSM5205(config, m_msm_2, 24000000/64); /* ? */ MSM5205(config, m_msm_2, 24000000/64); /* ? */
m_msm_2->vck_legacy_callback().set(FUNC(cps_state::m5205_int2)); /* interrupt function */ m_msm_2->vck_legacy_callback().set(FUNC(cps_state::m5205_int2)); /* interrupt function */
m_msm_2->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */ m_msm_2->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */
m_msm_2->add_route(ALL_OUTPUTS, "mono", 0.25); m_msm_2->add_route(ALL_OUTPUTS, "mono", 0.25);
} }
@ -1899,14 +1899,14 @@ void cps_state::sf2mdt(machine_config &config)
YM2151(config, "2151", XTAL(3'579'545)).add_route(0, "mono", 0.35).add_route(1, "mono", 0.35); YM2151(config, "2151", XTAL(3'579'545)).add_route(0, "mono", 0.35).add_route(1, "mono", 0.35);
/* has 2x MSM5205 instead of OKI6295 */ /* has 2x MSM5205 instead of OKI6295 */
MSM5205(config, m_msm_1, 24000000/64); /* ? */ MSM5205(config, m_msm_1, 24000000/64); /* ? */
m_msm_1->vck_legacy_callback().set(FUNC(cps_state::m5205_int1)); /* interrupt function */ m_msm_1->vck_legacy_callback().set(FUNC(cps_state::m5205_int1)); /* interrupt function */
m_msm_1->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */ m_msm_1->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */
m_msm_1->add_route(ALL_OUTPUTS, "mono", 0.25); m_msm_1->add_route(ALL_OUTPUTS, "mono", 0.25);
MSM5205(config, m_msm_2, 24000000/64); /* ? */ MSM5205(config, m_msm_2, 24000000/64); /* ? */
m_msm_2->vck_legacy_callback().set(FUNC(cps_state::m5205_int2)); /* interrupt function */ m_msm_2->vck_legacy_callback().set(FUNC(cps_state::m5205_int2)); /* interrupt function */
m_msm_2->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */ m_msm_2->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */
m_msm_2->add_route(ALL_OUTPUTS, "mono", 0.25); m_msm_2->add_route(ALL_OUTPUTS, "mono", 0.25);
} }
@ -1953,14 +1953,14 @@ void cps_state::knightsb(machine_config &config)
ym2151.add_route(1, "mono", 0.35); ym2151.add_route(1, "mono", 0.35);
/* has 2x MSM5205 instead of OKI6295 */ /* has 2x MSM5205 instead of OKI6295 */
MSM5205(config, m_msm_1, 24000000/64); /* ? */ MSM5205(config, m_msm_1, 24000000/64); /* ? */
m_msm_1->vck_legacy_callback().set(FUNC(cps_state::m5205_int1)); /* interrupt function */ m_msm_1->vck_legacy_callback().set(FUNC(cps_state::m5205_int1)); /* interrupt function */
m_msm_1->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */ m_msm_1->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */
m_msm_1->add_route(ALL_OUTPUTS, "mono", 0.25); m_msm_1->add_route(ALL_OUTPUTS, "mono", 0.25);
MSM5205(config, m_msm_2, 24000000/64); /* ? */ MSM5205(config, m_msm_2, 24000000/64); /* ? */
m_msm_1->vck_legacy_callback().set(FUNC(cps_state::m5205_int2)); /* interrupt function */ m_msm_1->vck_legacy_callback().set(FUNC(cps_state::m5205_int2)); /* interrupt function */
m_msm_2->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */ m_msm_2->set_prescaler_selector(msm5205_device::S96_4B); /* 4KHz 4-bit */
m_msm_2->add_route(ALL_OUTPUTS, "mono", 0.25); m_msm_2->add_route(ALL_OUTPUTS, "mono", 0.25);
} }

18
src/mame/drivers/firetrap.cpp
View File

@ -618,11 +618,11 @@ void firetrap_state::machine_reset()
void firetrap_state::firetrap(machine_config &config) void firetrap_state::firetrap(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, FIRETRAP_XTAL/2); // 6 MHz Z80(config, m_maincpu, FIRETRAP_XTAL/2); // 6 MHz
m_maincpu->set_addrmap(AS_PROGRAM, &firetrap_state::firetrap_map); m_maincpu->set_addrmap(AS_PROGRAM, &firetrap_state::firetrap_map);
m_maincpu->set_vblank_int("screen", FUNC(firetrap_state::firetrap_irq)); m_maincpu->set_vblank_int("screen", FUNC(firetrap_state::firetrap_irq));
M6502(config, m_audiocpu, FIRETRAP_XTAL/8); // 1.5 MHz M6502(config, m_audiocpu, FIRETRAP_XTAL/8); // 1.5 MHz
m_audiocpu->set_addrmap(AS_PROGRAM, &firetrap_state::sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &firetrap_state::sound_map);
/* IRQs are caused by the ADPCM chip */ /* IRQs are caused by the ADPCM chip */
/* NMIs are caused by the main CPU */ /* NMIs are caused by the main CPU */
@ -655,20 +655,20 @@ void firetrap_state::firetrap(machine_config &config)
LS157(config, m_adpcm_select, 0); LS157(config, m_adpcm_select, 0);
m_adpcm_select->out_callback().set("msm", FUNC(msm5205_device::data_w)); m_adpcm_select->out_callback().set("msm", FUNC(msm5205_device::data_w));
MSM5205(config, m_msm, FIRETRAP_XTAL/32); // 375 kHz MSM5205(config, m_msm, FIRETRAP_XTAL/32); // 375 kHz
m_msm->vck_callback().set(FUNC(firetrap_state::firetrap_adpcm_int)); m_msm->vck_callback().set(FUNC(firetrap_state::firetrap_adpcm_int));
m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 7.8125kHz */ m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 7.8125kHz */
m_msm->add_route(ALL_OUTPUTS, "mono", 0.30); m_msm->add_route(ALL_OUTPUTS, "mono", 0.30);
} }
void firetrap_state::firetrapbl(machine_config &config) void firetrap_state::firetrapbl(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, FIRETRAP_XTAL/2); // 6 MHz Z80(config, m_maincpu, FIRETRAP_XTAL/2); // 6 MHz
m_maincpu->set_addrmap(AS_PROGRAM, &firetrap_state::firetrap_bootleg_map); m_maincpu->set_addrmap(AS_PROGRAM, &firetrap_state::firetrap_bootleg_map);
m_maincpu->set_vblank_int("screen", FUNC(firetrap_state::firetrap_irq)); m_maincpu->set_vblank_int("screen", FUNC(firetrap_state::firetrap_irq));
M6502(config, m_audiocpu, FIRETRAP_XTAL/8); // 1.5 MHz M6502(config, m_audiocpu, FIRETRAP_XTAL/8); // 1.5 MHz
m_audiocpu->set_addrmap(AS_PROGRAM, &firetrap_state::sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &firetrap_state::sound_map);
/* IRQs are caused by the ADPCM chip */ /* IRQs are caused by the ADPCM chip */
/* NMIs are caused by the main CPU */ /* NMIs are caused by the main CPU */
@ -693,15 +693,15 @@ void firetrap_state::firetrapbl(machine_config &config)
GENERIC_LATCH_8(config, m_soundlatch); GENERIC_LATCH_8(config, m_soundlatch);
m_soundlatch->data_pending_callback().set_inputline(m_audiocpu, INPUT_LINE_NMI); m_soundlatch->data_pending_callback().set_inputline(m_audiocpu, INPUT_LINE_NMI);
ym3526_device &ymsnd(YM3526(config, "ymsnd", FIRETRAP_XTAL/4)); // 3 MHz ym3526_device &ymsnd(YM3526(config, "ymsnd", FIRETRAP_XTAL/4)); // 3 MHz
ymsnd.add_route(ALL_OUTPUTS, "mono", 1.0); ymsnd.add_route(ALL_OUTPUTS, "mono", 1.0);
LS157(config, m_adpcm_select, 0); LS157(config, m_adpcm_select, 0);
m_adpcm_select->out_callback().set("msm", FUNC(msm5205_device::data_w)); m_adpcm_select->out_callback().set("msm", FUNC(msm5205_device::data_w));
MSM5205(config, m_msm, FIRETRAP_XTAL/32); // 375 kHz MSM5205(config, m_msm, FIRETRAP_XTAL/32); // 375 kHz
m_msm->vck_callback().set(FUNC(firetrap_state::firetrap_adpcm_int)); m_msm->vck_callback().set(FUNC(firetrap_state::firetrap_adpcm_int));
m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 7.8125kHz */ m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 7.8125kHz */
m_msm->add_route(ALL_OUTPUTS, "mono", 0.30); m_msm->add_route(ALL_OUTPUTS, "mono", 0.30);
} }

18
src/mame/drivers/fromance.cpp
View File

@ -903,11 +903,11 @@ MACHINE_RESET_MEMBER(fromance_state,fromance)
void fromance_state::nekkyoku(machine_config &config) void fromance_state::nekkyoku(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, 12000000/2); /* 6.00 Mhz ? */ Z80(config, m_maincpu, 12000000/2); /* 6.00 Mhz ? */
m_maincpu->set_addrmap(AS_PROGRAM, &fromance_state::nekkyoku_main_map); m_maincpu->set_addrmap(AS_PROGRAM, &fromance_state::nekkyoku_main_map);
m_maincpu->set_vblank_int("screen", FUNC(fromance_state::irq0_line_hold)); m_maincpu->set_vblank_int("screen", FUNC(fromance_state::irq0_line_hold));
Z80(config, m_subcpu, 12000000/2); /* 6.00 Mhz ? */ Z80(config, m_subcpu, 12000000/2); /* 6.00 Mhz ? */
m_subcpu->set_addrmap(AS_PROGRAM, &fromance_state::nekkyoku_sub_map); m_subcpu->set_addrmap(AS_PROGRAM, &fromance_state::nekkyoku_sub_map);
m_subcpu->set_addrmap(AS_IO, &fromance_state::nekkyoku_sub_io_map); m_subcpu->set_addrmap(AS_IO, &fromance_state::nekkyoku_sub_io_map);
@ -940,18 +940,18 @@ void fromance_state::nekkyoku(machine_config &config)
MSM5205(config, m_msm, 384000); MSM5205(config, m_msm, 384000);
m_msm->vck_legacy_callback().set(FUNC(fromance_state::fromance_adpcm_int)); /* IRQ handler */ m_msm->vck_legacy_callback().set(FUNC(fromance_state::fromance_adpcm_int)); /* IRQ handler */
m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz */ m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz */
m_msm->add_route(ALL_OUTPUTS, "mono", 0.80); m_msm->add_route(ALL_OUTPUTS, "mono", 0.80);
} }
void fromance_state::idolmj(machine_config &config) void fromance_state::idolmj(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, XTAL(12'000'000) / 2); /* 6.00 Mhz ? */ Z80(config, m_maincpu, XTAL(12'000'000) / 2); /* 6.00 Mhz ? */
m_maincpu->set_addrmap(AS_PROGRAM, &fromance_state::fromance_main_map); m_maincpu->set_addrmap(AS_PROGRAM, &fromance_state::fromance_main_map);
m_maincpu->set_vblank_int("screen", FUNC(fromance_state::irq0_line_hold)); m_maincpu->set_vblank_int("screen", FUNC(fromance_state::irq0_line_hold));
Z80(config, m_subcpu, XTAL(12'000'000) / 2); /* 6.00 Mhz ? */ Z80(config, m_subcpu, XTAL(12'000'000) / 2); /* 6.00 Mhz ? */
m_subcpu->set_addrmap(AS_PROGRAM, &fromance_state::fromance_sub_map); m_subcpu->set_addrmap(AS_PROGRAM, &fromance_state::fromance_sub_map);
m_subcpu->set_addrmap(AS_IO, &fromance_state::idolmj_sub_io_map); m_subcpu->set_addrmap(AS_IO, &fromance_state::idolmj_sub_io_map);
@ -984,7 +984,7 @@ void fromance_state::idolmj(machine_config &config)
MSM5205(config, m_msm, 384000); MSM5205(config, m_msm, 384000);
m_msm->vck_legacy_callback().set(FUNC(fromance_state::fromance_adpcm_int)); /* IRQ handler */ m_msm->vck_legacy_callback().set(FUNC(fromance_state::fromance_adpcm_int)); /* IRQ handler */
m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz */ m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz */
m_msm->add_route(ALL_OUTPUTS, "mono", 0.80); m_msm->add_route(ALL_OUTPUTS, "mono", 0.80);
} }
@ -992,11 +992,11 @@ void fromance_state::idolmj(machine_config &config)
void fromance_state::fromance(machine_config &config) void fromance_state::fromance(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, XTAL(12'000'000) / 2); /* 6.00 Mhz ? */ Z80(config, m_maincpu, XTAL(12'000'000) / 2); /* 6.00 Mhz ? */
m_maincpu->set_addrmap(AS_PROGRAM, &fromance_state::fromance_main_map); m_maincpu->set_addrmap(AS_PROGRAM, &fromance_state::fromance_main_map);
m_maincpu->set_vblank_int("screen", FUNC(fromance_state::irq0_line_hold)); m_maincpu->set_vblank_int("screen", FUNC(fromance_state::irq0_line_hold));
Z80(config, m_subcpu, XTAL(12'000'000) / 2); /* 6.00 Mhz ? */ Z80(config, m_subcpu, XTAL(12'000'000) / 2); /* 6.00 Mhz ? */
m_subcpu->set_addrmap(AS_PROGRAM, &fromance_state::fromance_sub_map); m_subcpu->set_addrmap(AS_PROGRAM, &fromance_state::fromance_sub_map);
m_subcpu->set_addrmap(AS_IO, &fromance_state::fromance_sub_io_map); m_subcpu->set_addrmap(AS_IO, &fromance_state::fromance_sub_io_map);
@ -1029,7 +1029,7 @@ void fromance_state::fromance(machine_config &config)
MSM5205(config, m_msm, 384000); MSM5205(config, m_msm, 384000);
m_msm->vck_legacy_callback().set(FUNC(fromance_state::fromance_adpcm_int)); /* IRQ handler */ m_msm->vck_legacy_callback().set(FUNC(fromance_state::fromance_adpcm_int)); /* IRQ handler */
m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz */ m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8 KHz */
m_msm->add_route(ALL_OUTPUTS, "mono", 0.10); m_msm->add_route(ALL_OUTPUTS, "mono", 0.10);
} }

4
src/mame/drivers/fuukifg2.cpp
View File

@ -448,10 +448,10 @@ void fuuki16_state::machine_reset()
void fuuki16_state::fuuki16(machine_config &config) void fuuki16_state::fuuki16(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
M68000(config, m_maincpu, XTAL(32'000'000) / 2); /* 16 MHz */ M68000(config, m_maincpu, XTAL(32'000'000) / 2); /* 16 MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &fuuki16_state::fuuki16_map); m_maincpu->set_addrmap(AS_PROGRAM, &fuuki16_state::fuuki16_map);
Z80(config, m_audiocpu, XTAL(12'000'000) / 2); /* 6 MHz */ Z80(config, m_audiocpu, XTAL(12'000'000) / 2); /* 6 MHz */
m_audiocpu->set_addrmap(AS_PROGRAM, &fuuki16_state::fuuki16_sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &fuuki16_state::fuuki16_sound_map);
m_audiocpu->set_addrmap(AS_IO, &fuuki16_state::fuuki16_sound_io_map); m_audiocpu->set_addrmap(AS_IO, &fuuki16_state::fuuki16_sound_io_map);

2
src/mame/drivers/gaiden.cpp
View File

@ -758,7 +758,7 @@ void gaiden_state::shadoww(machine_config &config)
m_maincpu->set_vblank_int("screen", FUNC(gaiden_state::irq5_line_assert)); m_maincpu->set_vblank_int("screen", FUNC(gaiden_state::irq5_line_assert));
Z80(config, m_audiocpu, 4000000); /* 4 MHz */ Z80(config, m_audiocpu, 4000000); /* 4 MHz */
m_audiocpu->set_addrmap(AS_PROGRAM, &gaiden_state::sound_map); /* IRQs are triggered by the YM2203 */ m_audiocpu->set_addrmap(AS_PROGRAM, &gaiden_state::sound_map); /* IRQs are triggered by the YM2203 */
WATCHDOG_TIMER(config, "watchdog"); WATCHDOG_TIMER(config, "watchdog");

6
src/mame/drivers/galspnbl.cpp
View File

@ -217,12 +217,12 @@ void galspnbl_state::machine_start()
void galspnbl_state::galspnbl(machine_config &config) void galspnbl_state::galspnbl(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
M68000(config, m_maincpu, XTAL(12'000'000)); /* 12 MHz ??? - Use value from Tecmo's Super Pinball Action - NEEDS VERIFICATION!! */ M68000(config, m_maincpu, XTAL(12'000'000)); /* 12 MHz ??? - Use value from Tecmo's Super Pinball Action - NEEDS VERIFICATION!! */
m_maincpu->set_addrmap(AS_PROGRAM, &galspnbl_state::main_map); m_maincpu->set_addrmap(AS_PROGRAM, &galspnbl_state::main_map);
m_maincpu->set_vblank_int("screen", FUNC(galspnbl_state::irq3_line_hold)); /* also has vector for 6, but it does nothing */ m_maincpu->set_vblank_int("screen", FUNC(galspnbl_state::irq3_line_hold)); /* also has vector for 6, but it does nothing */
Z80(config, m_audiocpu, XTAL(4'000'000)); /* 4 MHz ??? - Use value from Tecmo's Super Pinball Action - NEEDS VERIFICATION!! */ Z80(config, m_audiocpu, XTAL(4'000'000)); /* 4 MHz ??? - Use value from Tecmo's Super Pinball Action - NEEDS VERIFICATION!! */
m_audiocpu->set_addrmap(AS_PROGRAM, &galspnbl_state::audio_map); /* NMI is caused by the main CPU */ m_audiocpu->set_addrmap(AS_PROGRAM, &galspnbl_state::audio_map); /* NMI is caused by the main CPU */
/* video hardware */ /* video hardware */
SCREEN(config, m_screen, SCREEN_TYPE_RASTER); SCREEN(config, m_screen, SCREEN_TYPE_RASTER);

18
src/mame/drivers/gladiatr.cpp
View File

@ -941,17 +941,17 @@ GFXDECODE_END
void ppking_state::ppking(machine_config &config) void ppking_state::ppking(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, 12_MHz_XTAL/2); /* verified on pcb */ Z80(config, m_maincpu, 12_MHz_XTAL/2); /* verified on pcb */
m_maincpu->set_addrmap(AS_PROGRAM, &ppking_state::ppking_cpu1_map); m_maincpu->set_addrmap(AS_PROGRAM, &ppking_state::ppking_cpu1_map);
m_maincpu->set_addrmap(AS_IO, &ppking_state::ppking_cpu1_io); m_maincpu->set_addrmap(AS_IO, &ppking_state::ppking_cpu1_io);
m_maincpu->set_vblank_int("screen", FUNC(ppking_state::irq0_line_hold)); m_maincpu->set_vblank_int("screen", FUNC(ppking_state::irq0_line_hold));
Z80(config, m_subcpu, 12_MHz_XTAL/4); /* verified on pcb */ Z80(config, m_subcpu, 12_MHz_XTAL/4); /* verified on pcb */
m_subcpu->set_addrmap(AS_PROGRAM, &ppking_state::cpu2_map); m_subcpu->set_addrmap(AS_PROGRAM, &ppking_state::cpu2_map);
m_subcpu->set_addrmap(AS_IO, &ppking_state::ppking_cpu2_io); m_subcpu->set_addrmap(AS_IO, &ppking_state::ppking_cpu2_io);
m_subcpu->set_periodic_int(FUNC(ppking_state::irq0_line_assert), attotime::from_hz(60)); m_subcpu->set_periodic_int(FUNC(ppking_state::irq0_line_assert), attotime::from_hz(60));
MC6809(config, m_audiocpu, 12_MHz_XTAL/4); /* verified on pcb */ MC6809(config, m_audiocpu, 12_MHz_XTAL/4); /* verified on pcb */
m_audiocpu->set_addrmap(AS_PROGRAM, &ppking_state::ppking_cpu3_map); m_audiocpu->set_addrmap(AS_PROGRAM, &ppking_state::ppking_cpu3_map);
config.m_minimum_quantum = attotime::from_hz(6000); config.m_minimum_quantum = attotime::from_hz(6000);
@ -999,23 +999,23 @@ void ppking_state::ppking(machine_config &config)
ymsnd.add_route(3, "mono", 0.50); ymsnd.add_route(3, "mono", 0.50);
MSM5205(config, m_msm, 455_kHz_XTAL); /* verified on pcb */ MSM5205(config, m_msm, 455_kHz_XTAL); /* verified on pcb */
m_msm->set_prescaler_selector(msm5205_device::SEX_4B); /* vclk input mode */ m_msm->set_prescaler_selector(msm5205_device::SEX_4B); /* vclk input mode */
m_msm->add_route(ALL_OUTPUTS, "mono", 0.60); m_msm->add_route(ALL_OUTPUTS, "mono", 0.60);
} }
void gladiatr_state::gladiatr(machine_config &config) void gladiatr_state::gladiatr(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, 12_MHz_XTAL/2); /* verified on pcb */ Z80(config, m_maincpu, 12_MHz_XTAL/2); /* verified on pcb */
m_maincpu->set_addrmap(AS_PROGRAM, &gladiatr_state::gladiatr_cpu1_map); m_maincpu->set_addrmap(AS_PROGRAM, &gladiatr_state::gladiatr_cpu1_map);
m_maincpu->set_addrmap(AS_IO, &gladiatr_state::gladiatr_cpu1_io); m_maincpu->set_addrmap(AS_IO, &gladiatr_state::gladiatr_cpu1_io);
m_maincpu->set_vblank_int("screen", FUNC(gladiatr_state::irq0_line_hold)); m_maincpu->set_vblank_int("screen", FUNC(gladiatr_state::irq0_line_hold));
Z80(config, m_subcpu, 12_MHz_XTAL/4); /* verified on pcb */ Z80(config, m_subcpu, 12_MHz_XTAL/4); /* verified on pcb */
m_subcpu->set_addrmap(AS_PROGRAM, &gladiatr_state::cpu2_map); m_subcpu->set_addrmap(AS_PROGRAM, &gladiatr_state::cpu2_map);
m_subcpu->set_addrmap(AS_IO, &gladiatr_state::gladiatr_cpu2_io); m_subcpu->set_addrmap(AS_IO, &gladiatr_state::gladiatr_cpu2_io);
MC6809(config, m_audiocpu, 12_MHz_XTAL/4); /* verified on pcb */ MC6809(config, m_audiocpu, 12_MHz_XTAL/4); /* verified on pcb */
m_audiocpu->set_addrmap(AS_PROGRAM, &gladiatr_state::gladiatr_cpu3_map); m_audiocpu->set_addrmap(AS_PROGRAM, &gladiatr_state::gladiatr_cpu3_map);
MCFG_MACHINE_RESET_OVERRIDE(gladiatr_state,gladiator) MCFG_MACHINE_RESET_OVERRIDE(gladiatr_state,gladiator)
@ -1089,8 +1089,8 @@ void gladiatr_state::gladiatr(machine_config &config)
ymsnd.add_route(2, "mono", 0.60); ymsnd.add_route(2, "mono", 0.60);
ymsnd.add_route(3, "mono", 0.50); ymsnd.add_route(3, "mono", 0.50);
MSM5205(config, m_msm, 455_kHz_XTAL); /* verified on pcb */ MSM5205(config, m_msm, 455_kHz_XTAL); /* verified on pcb */
m_msm->set_prescaler_selector(msm5205_device::SEX_4B); /* vclk input mode */ m_msm->set_prescaler_selector(msm5205_device::SEX_4B); /* vclk input mode */
m_msm->add_route(ALL_OUTPUTS, "mono", 0.60); m_msm->add_route(ALL_OUTPUTS, "mono", 0.60);
LS259(config, "filtlatch", 0); // 9R - filters on sound output LS259(config, "filtlatch", 0); // 9R - filters on sound output

2
src/mame/drivers/goal92.cpp
View File

@ -304,7 +304,7 @@ void goal92_state::goal92(machine_config &config)
m_maincpu->set_vblank_int("screen", FUNC(goal92_state::irq6_line_hold)); /* VBL */ m_maincpu->set_vblank_int("screen", FUNC(goal92_state::irq6_line_hold)); /* VBL */
Z80(config, m_audiocpu, 2500000); Z80(config, m_audiocpu, 2500000);
m_audiocpu->set_addrmap(AS_PROGRAM, &goal92_state::sound_cpu); /* IRQs are triggered by the main CPU */ m_audiocpu->set_addrmap(AS_PROGRAM, &goal92_state::sound_cpu); /* IRQs are triggered by the main CPU */
/* video hardware */ /* video hardware */
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));

10
src/mame/drivers/gsword.cpp
View File

@ -917,17 +917,17 @@ GFXDECODE_END
void gsword_state::gsword(machine_config &config) void gsword_state::gsword(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, XTAL(18'000'000)/6); /* verified on pcb */ Z80(config, m_maincpu, XTAL(18'000'000)/6); /* verified on pcb */
m_maincpu->set_addrmap(AS_PROGRAM, &gsword_state::cpu1_map); m_maincpu->set_addrmap(AS_PROGRAM, &gsword_state::cpu1_map);
m_maincpu->set_addrmap(AS_IO, &gsword_state::cpu1_io_map); m_maincpu->set_addrmap(AS_IO, &gsword_state::cpu1_io_map);
m_maincpu->set_vblank_int("screen", FUNC(gsword_state::irq0_line_hold)); m_maincpu->set_vblank_int("screen", FUNC(gsword_state::irq0_line_hold));
Z80(config, m_subcpu, XTAL(18'000'000)/6); /* verified on pcb */ Z80(config, m_subcpu, XTAL(18'000'000)/6); /* verified on pcb */
m_subcpu->set_addrmap(AS_PROGRAM, &gsword_state::cpu2_map); m_subcpu->set_addrmap(AS_PROGRAM, &gsword_state::cpu2_map);
m_subcpu->set_addrmap(AS_IO, &gsword_state::cpu2_io_map); m_subcpu->set_addrmap(AS_IO, &gsword_state::cpu2_io_map);
m_subcpu->set_periodic_int(FUNC(gsword_state::sound_interrupt), attotime::from_hz(4*60)); m_subcpu->set_periodic_int(FUNC(gsword_state::sound_interrupt), attotime::from_hz(4*60));
Z80(config, m_audiocpu, XTAL(18'000'000)/6); /* verified on pcb */ Z80(config, m_audiocpu, XTAL(18'000'000)/6); /* verified on pcb */
m_audiocpu->set_addrmap(AS_PROGRAM, &gsword_state::cpu3_map); m_audiocpu->set_addrmap(AS_PROGRAM, &gsword_state::cpu3_map);
upi41_cpu_device &mcu1(I8041(config, "mcu1", 12'000'000/2)); // clock unknown, using value from gladiatr upi41_cpu_device &mcu1(I8041(config, "mcu1", 12'000'000/2)); // clock unknown, using value from gladiatr
@ -988,12 +988,12 @@ void gsword_state::gsword(machine_config &config)
void josvolly_state::josvolly(machine_config &config) void josvolly_state::josvolly(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, 18000000/4); /* ? */ Z80(config, m_maincpu, 18000000/4); /* ? */
m_maincpu->set_addrmap(AS_PROGRAM, &josvolly_state::cpu1_map); m_maincpu->set_addrmap(AS_PROGRAM, &josvolly_state::cpu1_map);
m_maincpu->set_addrmap(AS_IO, &josvolly_state::josvolly_cpu1_io_map); m_maincpu->set_addrmap(AS_IO, &josvolly_state::josvolly_cpu1_io_map);
m_maincpu->set_periodic_int(FUNC(josvolly_state::irq0_line_hold), attotime::from_hz(2*60)); m_maincpu->set_periodic_int(FUNC(josvolly_state::irq0_line_hold), attotime::from_hz(2*60));
Z80(config, m_audiocpu, 12000000/4); /* ? */ Z80(config, m_audiocpu, 12000000/4); /* ? */
m_audiocpu->set_addrmap(AS_PROGRAM, &josvolly_state::josvolly_cpu2_map); m_audiocpu->set_addrmap(AS_PROGRAM, &josvolly_state::josvolly_cpu2_map);
m_audiocpu->set_addrmap(AS_IO, &josvolly_state::josvolly_cpu2_io_map); m_audiocpu->set_addrmap(AS_IO, &josvolly_state::josvolly_cpu2_io_map);
m_audiocpu->set_vblank_int("screen", FUNC(josvolly_state::irq0_line_assert)); m_audiocpu->set_vblank_int("screen", FUNC(josvolly_state::irq0_line_assert));

2
src/mame/drivers/hnayayoi.cpp
View File

@ -545,7 +545,7 @@ void hnayayoi_state::machine_reset()
void hnayayoi_state::hnayayoi(machine_config &config) void hnayayoi_state::hnayayoi(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, 20000000/4); /* 5 MHz ???? */ Z80(config, m_maincpu, 20000000/4); /* 5 MHz ???? */
m_maincpu->set_addrmap(AS_PROGRAM, &hnayayoi_state::hnayayoi_map); m_maincpu->set_addrmap(AS_PROGRAM, &hnayayoi_state::hnayayoi_map);
m_maincpu->set_addrmap(AS_IO, &hnayayoi_state::hnayayoi_io_map); m_maincpu->set_addrmap(AS_IO, &hnayayoi_state::hnayayoi_io_map);

2
src/mame/drivers/hp_ipc.cpp
View File

@ -753,7 +753,7 @@ MACHINE_CONFIG_START(hp_ipc_state::hp_ipc_base)
mm58167_device &rtc(MM58167(config, "rtc", 32.768_kHz_XTAL)); mm58167_device &rtc(MM58167(config, "rtc", 32.768_kHz_XTAL));
rtc.irq().set(FUNC(hp_ipc_state::irq_1)); rtc.irq().set(FUNC(hp_ipc_state::irq_1));
// rtc.standby_irq().set(FUNC(hp_ipc_state::irq_6)); // rtc.standby_irq().set(FUNC(hp_ipc_state::irq_6));
hp_hil_mlc_device &mlc(HP_HIL_MLC(config, "mlc", XTAL(15'920'000)/2)); hp_hil_mlc_device &mlc(HP_HIL_MLC(config, "mlc", XTAL(15'920'000)/2));
mlc.int_callback().set(FUNC(hp_ipc_state::irq_2)); mlc.int_callback().set(FUNC(hp_ipc_state::irq_2));

14
src/mame/drivers/hyperspt.cpp
View File

@ -295,10 +295,10 @@ WRITE_LINE_MEMBER(hyperspt_state::vblank_irq)
void hyperspt_state::hyperspt(machine_config &config) void hyperspt_state::hyperspt(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
KONAMI1(config, m_maincpu, XTAL(18'432'000)/12); /* verified on pcb */ KONAMI1(config, m_maincpu, XTAL(18'432'000)/12); /* verified on pcb */
m_maincpu->set_addrmap(AS_PROGRAM, &hyperspt_state::hyperspt_map); m_maincpu->set_addrmap(AS_PROGRAM, &hyperspt_state::hyperspt_map);
Z80(config, m_audiocpu, XTAL(14'318'181)/4); /* verified on pcb */ Z80(config, m_audiocpu, XTAL(14'318'181)/4); /* verified on pcb */
m_audiocpu->set_addrmap(AS_PROGRAM, &hyperspt_state::hyperspt_sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &hyperspt_state::hyperspt_sound_map);
ls259_device &mainlatch(LS259(config, "mainlatch")); // F2 ls259_device &mainlatch(LS259(config, "mainlatch")); // F2
@ -340,10 +340,10 @@ void hyperspt_state::hyperspt(machine_config &config)
vref.add_route(0, "dac", 1.0, DAC_VREF_POS_INPUT); vref.add_route(0, "dac", 1.0, DAC_VREF_POS_INPUT);
vref.add_route(0, "dac", -1.0, DAC_VREF_NEG_INPUT); vref.add_route(0, "dac", -1.0, DAC_VREF_NEG_INPUT);
SN76496(config, m_sn, XTAL(14'318'181)/8); /* verified on pcb */ SN76496(config, m_sn, XTAL(14'318'181)/8); /* verified on pcb */
m_sn->add_route(ALL_OUTPUTS, "speaker", 1.0); m_sn->add_route(ALL_OUTPUTS, "speaker", 1.0);
VLM5030(config, m_vlm, XTAL(3'579'545)); /* verified on pcb */ VLM5030(config, m_vlm, XTAL(3'579'545)); /* verified on pcb */
m_vlm->add_route(ALL_OUTPUTS, "speaker", 1.0); m_vlm->add_route(ALL_OUTPUTS, "speaker", 1.0);
} }
@ -377,7 +377,7 @@ void hyperspt_state::hypersptb(machine_config &config)
m_audiocpu->set_addrmap(AS_PROGRAM, address_map_constructor(&std::remove_pointer_t<decltype(this)>::soundb_map, tag(), this)); m_audiocpu->set_addrmap(AS_PROGRAM, address_map_constructor(&std::remove_pointer_t<decltype(this)>::soundb_map, tag(), this));
M6802(config, "adpcm", XTAL(14'318'181)/8) /* unknown clock */ M6802(config, "adpcm", XTAL(14'318'181)/8) /* unknown clock */
.set_addrmap(AS_PROGRAM, &hyperspt_state::hyprolyb_adpcm_map); .set_addrmap(AS_PROGRAM, &hyperspt_state::hyprolyb_adpcm_map);
GENERIC_LATCH_8(config, "soundlatch2"); GENERIC_LATCH_8(config, "soundlatch2");
@ -385,8 +385,8 @@ void hyperspt_state::hypersptb(machine_config &config)
HYPROLYB_ADPCM(config, "hyprolyb_adpcm", 0); HYPROLYB_ADPCM(config, "hyprolyb_adpcm", 0);
msm5205_device &msm(MSM5205(config, "msm", 384000)); msm5205_device &msm(MSM5205(config, "msm", 384000));
msm.vck_legacy_callback().set("hyprolyb_adpcm", FUNC(hyprolyb_adpcm_device::vck_callback)); /* VCK function */ msm.vck_legacy_callback().set("hyprolyb_adpcm", FUNC(hyprolyb_adpcm_device::vck_callback)); /* VCK function */
msm.set_prescaler_selector(msm5205_device::S96_4B); /* 4 kHz */ msm.set_prescaler_selector(msm5205_device::S96_4B); /* 4 kHz */
msm.add_route(ALL_OUTPUTS, "speaker", 0.5); msm.add_route(ALL_OUTPUTS, "speaker", 0.5);
} }

22
src/mame/drivers/indy_indigo2.cpp
View File

@ -186,9 +186,9 @@ INPUT_PORTS_END
//static void cdrom_config(device_t *device) //static void cdrom_config(device_t *device)
//{ //{
// cdda_device *cdda = device->subdevice<cdda_device>("cdda"); // cdda_device *cdda = device->subdevice<cdda_device>("cdda");
// cdda->add_route(0, ":hpc3:lspeaker", 1.0); // cdda->add_route(0, ":hpc3:lspeaker", 1.0);
// cdda->add_route(1, ":hpc3:rspeaker", 1.0); // cdda->add_route(1, ":hpc3:rspeaker", 1.0);
//} //}
void ip22_state::wd33c93(device_t *device) void ip22_state::wd33c93(device_t *device)
@ -223,15 +223,15 @@ void ip22_state::ip22_base(machine_config &config)
SGI_MC(config, m_mem_ctrl, m_maincpu, ":hpc3:eeprom"); SGI_MC(config, m_mem_ctrl, m_maincpu, ":hpc3:eeprom");
NSCSI_BUS(config, "scsibus", 0); NSCSI_BUS(config, "scsibus", 0);
NSCSI_CONNECTOR(config, "scsibus:0").option_set("wd33c93", WD33C93B) NSCSI_CONNECTOR(config, "scsibus:0").option_set("wd33c93", WD33C93B)
.machine_config([this](device_t *device) { wd33c93(device); }); .machine_config([this](device_t *device) { wd33c93(device); });
NSCSI_CONNECTOR(config, "scsibus:1", scsi_devices, "harddisk", false); NSCSI_CONNECTOR(config, "scsibus:1", scsi_devices, "harddisk", false);
NSCSI_CONNECTOR(config, "scsibus:2", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:2", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus:3", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:3", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus:4", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:4", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus:5", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:5", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus:6", scsi_devices, "cdrom", false); NSCSI_CONNECTOR(config, "scsibus:6", scsi_devices, "cdrom", false);
NSCSI_CONNECTOR(config, "scsibus:7", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus:7", scsi_devices, nullptr, false);
} }
void ip22_state::ip225015(machine_config &config) void ip22_state::ip225015(machine_config &config)
@ -275,15 +275,15 @@ void ip24_state::ip244415(machine_config &config)
m_maincpu->set_addrmap(AS_PROGRAM, &ip24_state::ip22_map); m_maincpu->set_addrmap(AS_PROGRAM, &ip24_state::ip22_map);
NSCSI_BUS(config, "scsibus2", 0); NSCSI_BUS(config, "scsibus2", 0);
NSCSI_CONNECTOR(config, "scsibus2:0").option_set("wd33c93", WD33C93B) NSCSI_CONNECTOR(config, "scsibus2:0").option_set("wd33c93", WD33C93B)
.machine_config([this](device_t *device) { wd33c93_2(device); }); .machine_config([this](device_t *device) { wd33c93_2(device); });
NSCSI_CONNECTOR(config, "scsibus2:1", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus2:1", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus2:2", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus2:2", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus2:3", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus2:3", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus2:4", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus2:4", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus2:5", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus2:5", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus2:6", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus2:6", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus2:7", scsi_devices, nullptr, false); NSCSI_CONNECTOR(config, "scsibus2:7", scsi_devices, nullptr, false);
SGI_HPC3(config, m_hpc3, m_maincpu, m_scsi_ctrl, m_scsi_ctrl2); SGI_HPC3(config, m_hpc3, m_maincpu, m_scsi_ctrl, m_scsi_ctrl2);
} }

4
src/mame/drivers/karnov.cpp
View File

@ -769,10 +769,10 @@ void karnov_state::machine_reset()
void karnov_state::karnov(machine_config &config) void karnov_state::karnov(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
M68000(config, m_maincpu, 10000000); /* 10 MHz */ M68000(config, m_maincpu, 10000000); /* 10 MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &karnov_state::karnov_map); m_maincpu->set_addrmap(AS_PROGRAM, &karnov_state::karnov_map);
M6502(config, m_audiocpu, 1500000); /* Accurate */ M6502(config, m_audiocpu, 1500000); /* Accurate */
m_audiocpu->set_addrmap(AS_PROGRAM, &karnov_state::karnov_sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &karnov_state::karnov_sound_map);
/* video hardware */ /* video hardware */

12
src/mame/drivers/kchamp.cpp
View File

@ -407,12 +407,12 @@ void kchamp_state::machine_reset()
void kchamp_state::kchampvs(machine_config &config) void kchamp_state::kchampvs(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, XTAL(12'000'000)/4); /* verified on pcb */ Z80(config, m_maincpu, XTAL(12'000'000)/4); /* verified on pcb */
m_maincpu->set_addrmap(AS_PROGRAM, &kchamp_state::kchampvs_map); m_maincpu->set_addrmap(AS_PROGRAM, &kchamp_state::kchampvs_map);
m_maincpu->set_addrmap(AS_IO, &kchamp_state::kchampvs_io_map); m_maincpu->set_addrmap(AS_IO, &kchamp_state::kchampvs_io_map);
m_maincpu->set_addrmap(AS_OPCODES, &kchamp_state::decrypted_opcodes_map); m_maincpu->set_addrmap(AS_OPCODES, &kchamp_state::decrypted_opcodes_map);
Z80(config, m_audiocpu, XTAL(12'000'000)/4); /* verified on pcb */ Z80(config, m_audiocpu, XTAL(12'000'000)/4); /* verified on pcb */
m_audiocpu->set_addrmap(AS_PROGRAM, &kchamp_state::kchampvs_sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &kchamp_state::kchampvs_sound_map);
m_audiocpu->set_addrmap(AS_IO, &kchamp_state::kchampvs_sound_io_map); m_audiocpu->set_addrmap(AS_IO, &kchamp_state::kchampvs_sound_io_map);
/* IRQs triggered from main CPU */ /* IRQs triggered from main CPU */
@ -451,8 +451,8 @@ void kchamp_state::kchampvs(machine_config &config)
m_adpcm_select->out_callback().set("msm", FUNC(msm5205_device::data_w)); m_adpcm_select->out_callback().set("msm", FUNC(msm5205_device::data_w));
MSM5205(config, m_msm, 375000); /* verified on pcb, discrete circuit clock */ MSM5205(config, m_msm, 375000); /* verified on pcb, discrete circuit clock */
m_msm->vck_callback().set(FUNC(kchamp_state::msmint)); /* interrupt function */ m_msm->vck_callback().set(FUNC(kchamp_state::msmint)); /* interrupt function */
m_msm->set_prescaler_selector(msm5205_device::S96_4B); /* 1 / 96 = 3906.25Hz playback */ m_msm->set_prescaler_selector(msm5205_device::S96_4B); /* 1 / 96 = 3906.25Hz playback */
m_msm->add_route(ALL_OUTPUTS, "speaker", 1.0); m_msm->add_route(ALL_OUTPUTS, "speaker", 1.0);
} }
@ -463,11 +463,11 @@ void kchamp_state::kchampvs(machine_config &config)
void kchamp_state::kchamp(machine_config &config) void kchamp_state::kchamp(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
Z80(config, m_maincpu, XTAL(12'000'000)/4); /* 12MHz / 4 = 3.0 MHz */ Z80(config, m_maincpu, XTAL(12'000'000)/4); /* 12MHz / 4 = 3.0 MHz */
m_maincpu->set_addrmap(AS_PROGRAM, &kchamp_state::kchamp_map); m_maincpu->set_addrmap(AS_PROGRAM, &kchamp_state::kchamp_map);
m_maincpu->set_addrmap(AS_IO, &kchamp_state::kchamp_io_map); m_maincpu->set_addrmap(AS_IO, &kchamp_state::kchamp_io_map);
Z80(config, m_audiocpu, XTAL(12'000'000)/4); /* 12MHz / 4 = 3.0 MHz */ Z80(config, m_audiocpu, XTAL(12'000'000)/4); /* 12MHz / 4 = 3.0 MHz */
m_audiocpu->set_addrmap(AS_PROGRAM, &kchamp_state::kchamp_sound_map); m_audiocpu->set_addrmap(AS_PROGRAM, &kchamp_state::kchamp_sound_map);
m_audiocpu->set_addrmap(AS_IO, &kchamp_state::kchamp_sound_io_map); m_audiocpu->set_addrmap(AS_IO, &kchamp_state::kchamp_sound_io_map);
m_audiocpu->set_periodic_int(FUNC(kchamp_state::sound_int), attotime::from_hz(125)); /* Hz */ m_audiocpu->set_periodic_int(FUNC(kchamp_state::sound_int), attotime::from_hz(125)); /* Hz */

6
src/mame/drivers/klax.cpp
View File

@ -249,9 +249,9 @@ void klax_state::klax2bl(machine_config &config)
// guess, probably something like this // guess, probably something like this
// 2 x msm at least on bootleg set 2 (ic18 and ic19) // 2 x msm at least on bootleg set 2 (ic18 and ic19)
MSM5205(config, "msm", 375000); /* ? */ MSM5205(config, "msm", 375000); /* ? */
// msm.vck_legacy_callback().set(FUNC(klax_state::m5205_int1)); /* interrupt function */ // msm.vck_legacy_callback().set(FUNC(klax_state::m5205_int1)); /* interrupt function */
// msm.set_prescaler_selector(msm5205_device::MSM5205_S96_4B); /* 4KHz 4-bit */ // msm.set_prescaler_selector(msm5205_device::MSM5205_S96_4B); /* 4KHz 4-bit */
// msm.add_route(ALL_OUTPUTS, "mono", 0.25); // msm.add_route(ALL_OUTPUTS, "mono", 0.25);
} }

2
src/mame/drivers/konamim2.cpp
View File

@ -1203,7 +1203,7 @@ void konamim2_state::set_arcres(machine_config &config)
void konamim2_state::add_ymz280b(machine_config &config) void konamim2_state::add_ymz280b(machine_config &config)
{ {
// TODO: The YMZ280B outputs are actually routed to a speaker in each gun // TODO: The YMZ280B outputs are actually routed to a speaker in each gun
YMZ280B(config, m_ymz280b, XTAL(16'934'400)); YMZ280B(config, m_ymz280b, XTAL(16'934'400));
m_ymz280b->add_route(0, "lspeaker", 0.5); m_ymz280b->add_route(0, "lspeaker", 0.5);
m_ymz280b->add_route(1, "rspeaker", 0.5); m_ymz280b->add_route(1, "rspeaker", 0.5);

8
src/mame/drivers/kungfur.cpp
View File

@ -299,9 +299,9 @@ void kungfur_state::machine_reset()
void kungfur_state::kungfur(machine_config &config) void kungfur_state::kungfur(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
M6809(config, m_maincpu, 8000000/2); // 4MHz? M6809(config, m_maincpu, 8000000/2); // 4MHz?
m_maincpu->set_addrmap(AS_PROGRAM, &kungfur_state::kungfur_map); m_maincpu->set_addrmap(AS_PROGRAM, &kungfur_state::kungfur_map);
m_maincpu->set_periodic_int(FUNC(kungfur_state::kungfur_irq), attotime::from_hz(975)); // close approximation m_maincpu->set_periodic_int(FUNC(kungfur_state::kungfur_irq), attotime::from_hz(975)); // close approximation
i8255_device &ppi0(I8255A(config, "ppi8255_0")); i8255_device &ppi0(I8255A(config, "ppi8255_0"));
// $4008 - always $83 (PPI mode 0, ports B & lower C as input) // $4008 - always $83 (PPI mode 0, ports B & lower C as input)
@ -321,12 +321,12 @@ void kungfur_state::kungfur(machine_config &config)
/* sound hardware */ /* sound hardware */
SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right(); SPEAKER(config, "rspeaker").front_right();
MSM5205(config, m_adpcm1, XTAL(384'000)); // clock verified with recording MSM5205(config, m_adpcm1, XTAL(384'000)); // clock verified with recording
m_adpcm1->vck_legacy_callback().set(FUNC(kungfur_state::kfr_adpcm1_int)); m_adpcm1->vck_legacy_callback().set(FUNC(kungfur_state::kfr_adpcm1_int));
m_adpcm1->set_prescaler_selector(msm5205_device::S48_4B); m_adpcm1->set_prescaler_selector(msm5205_device::S48_4B);
m_adpcm1->add_route(ALL_OUTPUTS, "lspeaker", 1.0); m_adpcm1->add_route(ALL_OUTPUTS, "lspeaker", 1.0);
MSM5205(config, m_adpcm2, XTAL(384'000)); // clock verified with recording MSM5205(config, m_adpcm2, XTAL(384'000)); // clock verified with recording
m_adpcm2->vck_legacy_callback().set(FUNC(kungfur_state::kfr_adpcm2_int)); m_adpcm2->vck_legacy_callback().set(FUNC(kungfur_state::kfr_adpcm2_int));
m_adpcm2->set_prescaler_selector(msm5205_device::S48_4B); m_adpcm2->set_prescaler_selector(msm5205_device::S48_4B);
m_adpcm2->add_route(ALL_OUTPUTS, "rspeaker", 1.0); m_adpcm2->add_route(ALL_OUTPUTS, "rspeaker", 1.0);

2
src/mame/drivers/kurukuru.cpp
View File

@ -881,7 +881,7 @@ void kurukuru_state::kurukuru(machine_config &config)
MSM5205(config, m_adpcm, M5205_CLOCK); MSM5205(config, m_adpcm, M5205_CLOCK);
m_adpcm->vck_legacy_callback().set(FUNC(kurukuru_state::kurukuru_msm5205_vck)); m_adpcm->vck_legacy_callback().set(FUNC(kurukuru_state::kurukuru_msm5205_vck));
m_adpcm->set_prescaler_selector(msm5205_device::S48_4B); /* changed on the fly */ m_adpcm->set_prescaler_selector(msm5205_device::S48_4B); /* changed on the fly */
m_adpcm->add_route(ALL_OUTPUTS, "mono", 0.80); m_adpcm->add_route(ALL_OUTPUTS, "mono", 0.80);
} }

2
src/mame/drivers/lkage.cpp
View File

@ -497,7 +497,7 @@ void lkage_state::lkage(machine_config &config)
m_maincpu->set_vblank_int("screen", FUNC(lkage_state::irq0_line_hold)); m_maincpu->set_vblank_int("screen", FUNC(lkage_state::irq0_line_hold));
Z80(config, m_audiocpu, SOUND_CPU_CLOCK); Z80(config, m_audiocpu, SOUND_CPU_CLOCK);
m_audiocpu->set_addrmap(AS_PROGRAM, &lkage_state::lkage_sound_map); /* IRQs are triggered by the YM2203 */ m_audiocpu->set_addrmap(AS_PROGRAM, &lkage_state::lkage_sound_map); /* IRQs are triggered by the YM2203 */
TAITO68705_MCU(config, m_bmcu, MCU_CLOCK); TAITO68705_MCU(config, m_bmcu, MCU_CLOCK);

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