mirror of
https://github.com/holub/mame
synced 2025-05-20 12:48:53 +03:00
Clean-ups and version bump
This commit is contained in:
parent
71bb1c0818
commit
7b631e4c5b
@ -551,7 +551,7 @@ static CPU_EXECUTE( arm7 )
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insn = cpustate->direct->read_decrypted_word(raddr);
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thumb_handler[(insn & 0xffc0) >> 6](cpustate, pc, insn);
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}
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else
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{
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@ -1840,7 +1840,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
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HandleALU(cpustate, insn);
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}
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}
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// break;
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// break;
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}
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const void arm7ops_4567(arm_state *cpustate, UINT32 insn) /* Data Transfer - Single Data Access */
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@ -1851,16 +1851,16 @@ const void arm7ops_4567(arm_state *cpustate, UINT32 insn) /* Data Transfer - Sin
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//case 7:
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HandleMemSingle(cpustate, insn);
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R15 += 4;
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// break;
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// break;
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}
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const void arm7ops_89(arm_state *cpustate, UINT32 insn) /* Block Data Transfer/Access */
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{
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//case 8:
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//case 9:
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HandleMemBlock(cpustate, insn);
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R15 += 4;
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// break;
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// break;
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}
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const void arm7ops_ab(arm_state *cpustate, UINT32 insn) /* Branch or Branch & Link */
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@ -1868,7 +1868,7 @@ const void arm7ops_ab(arm_state *cpustate, UINT32 insn) /* Branch or Branch & Li
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//case 0xa:
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//case 0xb:
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HandleBranch(cpustate, insn);
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// break;
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// break;
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}
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const void arm7ops_cd(arm_state *cpustate, UINT32 insn) /* Co-Processor Data Transfer */
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@ -1877,7 +1877,7 @@ const void arm7ops_cd(arm_state *cpustate, UINT32 insn) /* Co-Processor Data Tra
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//case 0xd:
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HandleCoProcDT(cpustate, insn);
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R15 += 4;
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// break;
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// break;
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}
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const void arm7ops_e(arm_state *cpustate, UINT32 insn) /* Co-Processor Data Operation or Register Transfer */
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@ -1888,7 +1888,7 @@ const void arm7ops_e(arm_state *cpustate, UINT32 insn) /* Co-Processor Data Oper
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else
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HandleCoProcDO(cpustate, insn);
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R15 += 4;
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// break;
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// break;
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}
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const void arm7ops_f(arm_state *cpustate, UINT32 insn) /* Software Interrupt */
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@ -1896,5 +1896,5 @@ const void arm7ops_f(arm_state *cpustate, UINT32 insn) /* Software Interrupt */
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cpustate->pendingSwi = 1;
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ARM7_CHECKIRQ;
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//couldn't find any cycle counts for SWI
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// break;
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// break;
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}
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@ -5,4 +5,4 @@ const void arm7ops_89(arm_state *cpustate, UINT32 insn);
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const void arm7ops_ab(arm_state *cpustate, UINT32 insn);
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const void arm7ops_cd(arm_state *cpustate, UINT32 insn);
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const void arm7ops_e(arm_state *cpustate, UINT32 insn);
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const void arm7ops_f(arm_state *cpustate, UINT32 insn);
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const void arm7ops_f(arm_state *cpustate, UINT32 insn);
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@ -29,11 +29,11 @@ arm7thumb_ophandler thumb_handler[0x40*0x10] =
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// #define THUMB_RELADDR_SP ((UINT16)0x0800)
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tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1,
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// #define THUMB_STACKOP_TYPE ((UINT16)0x0f00)
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tg0b_0, tg0b_0, tg0b_0, tg0b_0, tg0b_1, tg0b_1, tg0b_1, tg0b_1, tg0b_2, tg0b_2, tg0b_2, tg0b_2, tg0b_3, tg0b_3, tg0b_3, tg0b_3, tg0b_4, tg0b_4, tg0b_4, tg0b_4, tg0b_5, tg0b_5, tg0b_5, tg0b_5, tg0b_6, tg0b_6, tg0b_6, tg0b_6, tg0b_7, tg0b_7, tg0b_7, tg0b_7, tg0b_8, tg0b_8, tg0b_8, tg0b_8, tg0b_9, tg0b_9, tg0b_9, tg0b_9, tg0b_a, tg0b_a, tg0b_a, tg0b_a, tg0b_b, tg0b_b, tg0b_b, tg0b_b, tg0b_c, tg0b_c, tg0b_c, tg0b_c, tg0b_d, tg0b_d, tg0b_d, tg0b_d, tg0b_e, tg0b_e, tg0b_e, tg0b_e, tg0b_f, tg0b_f, tg0b_f, tg0b_f,
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tg0b_0, tg0b_0, tg0b_0, tg0b_0, tg0b_1, tg0b_1, tg0b_1, tg0b_1, tg0b_2, tg0b_2, tg0b_2, tg0b_2, tg0b_3, tg0b_3, tg0b_3, tg0b_3, tg0b_4, tg0b_4, tg0b_4, tg0b_4, tg0b_5, tg0b_5, tg0b_5, tg0b_5, tg0b_6, tg0b_6, tg0b_6, tg0b_6, tg0b_7, tg0b_7, tg0b_7, tg0b_7, tg0b_8, tg0b_8, tg0b_8, tg0b_8, tg0b_9, tg0b_9, tg0b_9, tg0b_9, tg0b_a, tg0b_a, tg0b_a, tg0b_a, tg0b_b, tg0b_b, tg0b_b, tg0b_b, tg0b_c, tg0b_c, tg0b_c, tg0b_c, tg0b_d, tg0b_d, tg0b_d, tg0b_d, tg0b_e, tg0b_e, tg0b_e, tg0b_e, tg0b_f, tg0b_f, tg0b_f, tg0b_f,
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// #define THUMB_MULTLS ((UINT16)0x0800)
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tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1,
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// #define THUMB_COND_TYPE ((UINT16)0x0f00)
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tg0d_0, tg0d_0, tg0d_0, tg0d_0, tg0d_1, tg0d_1, tg0d_1, tg0d_1, tg0d_2, tg0d_2, tg0d_2, tg0d_2, tg0d_3, tg0d_3, tg0d_3, tg0d_3, tg0d_4, tg0d_4, tg0d_4, tg0d_4, tg0d_5, tg0d_5, tg0d_5, tg0d_5, tg0d_6, tg0d_6, tg0d_6, tg0d_6, tg0d_7, tg0d_7, tg0d_7, tg0d_7, tg0d_8, tg0d_8, tg0d_8, tg0d_8, tg0d_9, tg0d_9, tg0d_9, tg0d_9, tg0d_a, tg0d_a, tg0d_a, tg0d_a, tg0d_b, tg0d_b, tg0d_b, tg0d_b, tg0d_c, tg0d_c, tg0d_c, tg0d_c, tg0d_d, tg0d_d, tg0d_d, tg0d_d, tg0d_e, tg0d_e, tg0d_e, tg0d_e, tg0d_f, tg0d_f, tg0d_f, tg0d_f,
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tg0d_0, tg0d_0, tg0d_0, tg0d_0, tg0d_1, tg0d_1, tg0d_1, tg0d_1, tg0d_2, tg0d_2, tg0d_2, tg0d_2, tg0d_3, tg0d_3, tg0d_3, tg0d_3, tg0d_4, tg0d_4, tg0d_4, tg0d_4, tg0d_5, tg0d_5, tg0d_5, tg0d_5, tg0d_6, tg0d_6, tg0d_6, tg0d_6, tg0d_7, tg0d_7, tg0d_7, tg0d_7, tg0d_8, tg0d_8, tg0d_8, tg0d_8, tg0d_9, tg0d_9, tg0d_9, tg0d_9, tg0d_a, tg0d_a, tg0d_a, tg0d_a, tg0d_b, tg0d_b, tg0d_b, tg0d_b, tg0d_c, tg0d_c, tg0d_c, tg0d_c, tg0d_d, tg0d_d, tg0d_d, tg0d_d, tg0d_e, tg0d_e, tg0d_e, tg0d_e, tg0d_f, tg0d_f, tg0d_f, tg0d_f,
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// #define THUMB_BLOP_LO ((UINT16)0x0800)
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tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1,
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// #define THUMB_BLOP_LO ((UINT16)0x0800)
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@ -116,7 +116,7 @@ const void tg00_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Shift right */
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/* Arithmetic */
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const void tg01_0(arm_state *cpustate, UINT32 pc, UINT32 insn)
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const void tg01_0(arm_state *cpustate, UINT32 pc, UINT32 insn)
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{
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UINT32 rs, rd, rrs;
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INT32 offs;
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@ -168,7 +168,7 @@ const void tg01_10(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD Rd, Rs,
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{
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UINT32 rn, rs, rd;
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rn = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT);
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rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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@ -180,7 +180,7 @@ const void tg01_10(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD Rd, Rs,
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const void tg01_11(arm_state *cpustate, UINT32 pc, UINT32 insn) /* SUB Rd, Rs, Rn */
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{
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UINT32 rn, rs, rd;
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rn = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT);
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rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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@ -192,7 +192,7 @@ const void tg01_11(arm_state *cpustate, UINT32 pc, UINT32 insn) /* SUB Rd, Rs, R
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const void tg01_12(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD Rd, Rs, #imm */
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{
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UINT32 rs, rd, imm;
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imm = (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
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rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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@ -204,7 +204,7 @@ const void tg01_12(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD Rd, Rs, #
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const void tg01_13(arm_state *cpustate, UINT32 pc, UINT32 insn) /* SUB Rd, Rs, #imm */
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{
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UINT32 rs, rd, imm;
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imm = (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
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rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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@ -215,7 +215,7 @@ const void tg01_13(arm_state *cpustate, UINT32 pc, UINT32 insn) /* SUB Rd, Rs, #
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/* CMP / MOV */
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const void tg02_0(arm_state *cpustate, UINT32 pc, UINT32 insn)
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const void tg02_0(arm_state *cpustate, UINT32 pc, UINT32 insn)
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{
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UINT32 rd, op2;
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@ -227,7 +227,7 @@ const void tg02_0(arm_state *cpustate, UINT32 pc, UINT32 insn)
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R15 += 2;
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}
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const void tg02_1(arm_state *cpustate, UINT32 pc, UINT32 insn)
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const void tg02_1(arm_state *cpustate, UINT32 pc, UINT32 insn)
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{
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UINT32 rn, rd, op2;
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@ -273,7 +273,7 @@ const void tg03_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* SUB Rd, #Offse
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const void tg04_00_00(arm_state *cpustate, UINT32 pc, UINT32 insn) /* AND Rd, Rs */
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{
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UINT32 rs, rd;
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rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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SET_REGISTER(cpustate, rd, GET_REGISTER(cpustate, rd) & GET_REGISTER(cpustate, rs));
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@ -286,7 +286,7 @@ const void tg04_00_00(arm_state *cpustate, UINT32 pc, UINT32 insn) /* AND Rd, Rs
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const void tg04_00_01(arm_state *cpustate, UINT32 pc, UINT32 insn) /* EOR Rd, Rs */
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{
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UINT32 rs, rd;
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rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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SET_REGISTER(cpustate, rd, GET_REGISTER(cpustate, rd) ^ GET_REGISTER(cpustate, rs));
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@ -300,7 +300,7 @@ const void tg04_00_02(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LSL Rd, Rs
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{
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UINT32 rs, rd, rrd;
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INT32 offs;
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rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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rrd = GET_REGISTER(cpustate, rd);
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@ -347,7 +347,7 @@ const void tg04_00_03(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LSR Rd, Rs
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{
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UINT32 rs, rd, rrd;
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INT32 offs;
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rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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rrd = GET_REGISTER(cpustate, rd);
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@ -393,7 +393,7 @@ const void tg04_00_03(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LSR Rd, Rs
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const void tg04_00_04(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ASR Rd, Rs */
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{
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UINT32 rs, rd, rrs, rrd;
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rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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rrs = GET_REGISTER(cpustate, rs)&0xff;
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@ -436,7 +436,7 @@ const void tg04_00_04(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ASR Rd, Rs
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const void tg04_00_05(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADC Rd, Rs */
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{
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UINT32 rn, rs, rd, op2;
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rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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op2=(GET_CPSR & C_MASK) ? 1 : 0;
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@ -462,7 +462,7 @@ const void tg04_00_06(arm_state *cpustate, UINT32 pc, UINT32 insn) /* SBC Rd, R
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const void tg04_00_07(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ROR Rd, Rs */
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{
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UINT32 rs, rd, imm, rrd;
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rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
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rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
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rrd = GET_REGISTER(cpustate, rd);
|
||||
@ -485,7 +485,7 @@ const void tg04_00_07(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ROR Rd, Rs
|
||||
const void tg04_00_08(arm_state *cpustate, UINT32 pc, UINT32 insn) /* TST Rd, Rs */
|
||||
{
|
||||
UINT32 rs, rd;
|
||||
|
||||
|
||||
rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
|
||||
rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
|
||||
SET_CPSR(GET_CPSR & ~(Z_MASK | N_MASK));
|
||||
@ -497,7 +497,7 @@ const void tg04_00_08(arm_state *cpustate, UINT32 pc, UINT32 insn) /* TST Rd, Rs
|
||||
const void tg04_00_09(arm_state *cpustate, UINT32 pc, UINT32 insn) /* NEG Rd, Rs */
|
||||
{
|
||||
UINT32 rn, rs, rd, rrs;
|
||||
|
||||
|
||||
rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
|
||||
rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
|
||||
rrs = GET_REGISTER(cpustate, rs);
|
||||
@ -510,7 +510,7 @@ const void tg04_00_09(arm_state *cpustate, UINT32 pc, UINT32 insn) /* NEG Rd, Rs
|
||||
const void tg04_00_0a(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMP Rd, Rs */
|
||||
{
|
||||
UINT32 rn, rs, rd;
|
||||
|
||||
|
||||
rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
|
||||
rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
|
||||
rn = GET_REGISTER(cpustate, rd) - GET_REGISTER(cpustate, rs);
|
||||
@ -522,7 +522,7 @@ const void tg04_00_0a(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMP Rd, Rs
|
||||
const void tg04_00_0b(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMN Rd, Rs - check flags, add dasm */
|
||||
{
|
||||
UINT32 rn, rs, rd;
|
||||
|
||||
|
||||
rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
|
||||
rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
|
||||
rn = GET_REGISTER(cpustate, rd) + GET_REGISTER(cpustate, rs);
|
||||
@ -533,7 +533,7 @@ const void tg04_00_0b(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMN Rd, Rs
|
||||
const void tg04_00_0c(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ORR Rd, Rs */
|
||||
{
|
||||
UINT32 rs, rd;
|
||||
|
||||
|
||||
rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
|
||||
rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
|
||||
SET_REGISTER(cpustate, rd, GET_REGISTER(cpustate, rd) | GET_REGISTER(cpustate, rs));
|
||||
@ -546,7 +546,7 @@ const void tg04_00_0c(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ORR Rd, Rs
|
||||
const void tg04_00_0d(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MUL Rd, Rs */
|
||||
{
|
||||
UINT32 rn, rs, rd;
|
||||
|
||||
|
||||
rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
|
||||
rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
|
||||
rn = GET_REGISTER(cpustate, rd) * GET_REGISTER(cpustate, rs);
|
||||
@ -560,7 +560,7 @@ const void tg04_00_0d(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MUL Rd, Rs
|
||||
const void tg04_00_0e(arm_state *cpustate, UINT32 pc, UINT32 insn) /* BIC Rd, Rs */
|
||||
{
|
||||
UINT32 rs, rd;
|
||||
|
||||
|
||||
rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
|
||||
rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
|
||||
SET_REGISTER(cpustate, rd, GET_REGISTER(cpustate, rd) & (~GET_REGISTER(cpustate, rs)));
|
||||
@ -572,7 +572,7 @@ const void tg04_00_0e(arm_state *cpustate, UINT32 pc, UINT32 insn) /* BIC Rd, Rs
|
||||
const void tg04_00_0f(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MVN Rd, Rs */
|
||||
{
|
||||
UINT32 rs, rd, op2;
|
||||
|
||||
|
||||
rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
|
||||
rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
|
||||
op2 = GET_REGISTER(cpustate, rs);
|
||||
@ -587,9 +587,9 @@ const void tg04_00_0f(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MVN Rd, Rs
|
||||
|
||||
const void tg04_01_00(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 rs, rd;
|
||||
// rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
|
||||
// rd = insn & THUMB_HIREG_RD;
|
||||
// UINT32 rs, rd;
|
||||
// rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
|
||||
// rd = insn & THUMB_HIREG_RD;
|
||||
|
||||
|
||||
fatalerror("%08x: G4-1-0 Undefined Thumb instruction: %04x %x\n", pc, insn, (insn & THUMB_HIREG_H) >> THUMB_HIREG_H_SHIFT);
|
||||
@ -604,7 +604,7 @@ const void tg04_01_01(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD Rd, HR
|
||||
rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
|
||||
rd = insn & THUMB_HIREG_RD;
|
||||
|
||||
|
||||
|
||||
SET_REGISTER(cpustate, rd, GET_REGISTER(cpustate, rd) + GET_REGISTER(cpustate, rs+8));
|
||||
// emulate the effects of pre-fetch
|
||||
if (rs == 7)
|
||||
@ -621,7 +621,7 @@ const void tg04_01_02(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD HRd, R
|
||||
rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
|
||||
rd = insn & THUMB_HIREG_RD;
|
||||
|
||||
|
||||
|
||||
SET_REGISTER(cpustate, rd+8, GET_REGISTER(cpustate, rd+8) + GET_REGISTER(cpustate, rs));
|
||||
if (rd == 7)
|
||||
{
|
||||
@ -637,7 +637,7 @@ const void tg04_01_03(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Add HRd, H
|
||||
rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
|
||||
rd = insn & THUMB_HIREG_RD;
|
||||
|
||||
|
||||
|
||||
SET_REGISTER(cpustate, rd+8, GET_REGISTER(cpustate, rd+8) + GET_REGISTER(cpustate, rs+8));
|
||||
// emulate the effects of pre-fetch
|
||||
if (rs == 7)
|
||||
@ -667,7 +667,7 @@ const void tg04_01_10(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMP Rd, R
|
||||
const void tg04_01_11(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMP Rd, Hs */
|
||||
{
|
||||
UINT32 rn, rs, rd;
|
||||
|
||||
|
||||
rs = GET_REGISTER(cpustate, ((insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT) + 8);
|
||||
rd = GET_REGISTER(cpustate, insn & THUMB_HIREG_RD);
|
||||
rn = rd - rs;
|
||||
@ -678,7 +678,7 @@ const void tg04_01_11(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMP Rd, Hs
|
||||
const void tg04_01_12(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMP Hd, Rs */
|
||||
{
|
||||
UINT32 rn, rs, rd;
|
||||
|
||||
|
||||
rs = GET_REGISTER(cpustate, ((insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT));
|
||||
rd = GET_REGISTER(cpustate, (insn & THUMB_HIREG_RD) + 8);
|
||||
rn = rd - rs;
|
||||
@ -689,7 +689,7 @@ const void tg04_01_12(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMP Hd, Rs
|
||||
const void tg04_01_13(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMP Hd, Hs */
|
||||
{
|
||||
UINT32 rn, rs, rd;
|
||||
|
||||
|
||||
rs = GET_REGISTER(cpustate, ((insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT) + 8);
|
||||
rd = GET_REGISTER(cpustate, (insn & THUMB_HIREG_RD) + 8);
|
||||
rn = rd - rs;
|
||||
@ -703,8 +703,8 @@ const void tg04_01_13(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMP Hd, Hs
|
||||
const void tg04_01_20(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MOV Rd, Rs (undefined) */
|
||||
{
|
||||
UINT32 rs, rd;
|
||||
|
||||
|
||||
|
||||
|
||||
rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
|
||||
rd = insn & THUMB_HIREG_RD;
|
||||
SET_REGISTER(cpustate, rd, GET_REGISTER(cpustate, rs));
|
||||
@ -715,7 +715,7 @@ const void tg04_01_20(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MOV Rd, Rs
|
||||
const void tg04_01_21(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MOV Rd, Hs */
|
||||
{
|
||||
UINT32 rs, rd;
|
||||
|
||||
|
||||
rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
|
||||
rd = insn & THUMB_HIREG_RD;
|
||||
if (rs == 7)
|
||||
@ -733,7 +733,7 @@ const void tg04_01_21(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MOV Rd, Hs
|
||||
const void tg04_01_22(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MOV Hd, Rs */
|
||||
{
|
||||
UINT32 rs, rd;
|
||||
|
||||
|
||||
rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
|
||||
rd = insn & THUMB_HIREG_RD;
|
||||
SET_REGISTER(cpustate, rd + 8, GET_REGISTER(cpustate, rs));
|
||||
@ -751,7 +751,7 @@ const void tg04_01_22(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MOV Hd, Rs
|
||||
const void tg04_01_23(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MOV Hd, Hs */
|
||||
{
|
||||
UINT32 rs, rd;
|
||||
|
||||
|
||||
rs = (insn & THUMB_HIREG_RS) >> THUMB_HIREG_RS_SHIFT;
|
||||
rd = insn & THUMB_HIREG_RD;
|
||||
if (rs == 7)
|
||||
@ -826,8 +826,8 @@ const void tg04_01_31(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
const void tg04_01_32(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// UINT32 rd;
|
||||
// UINT32 addr;
|
||||
// UINT32 rd;
|
||||
|
||||
|
||||
fatalerror("%08x: G4-3 Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
@ -837,8 +837,8 @@ const void tg04_01_32(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
const void tg04_01_33(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// UINT32 rd;
|
||||
// UINT32 addr;
|
||||
// UINT32 rd;
|
||||
|
||||
|
||||
fatalerror("%08x: G4-3 Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
@ -851,7 +851,7 @@ const void tg04_01_33(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
|
||||
|
||||
const void tg04_0203(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
const void tg04_0203(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
UINT32 readword;
|
||||
|
||||
@ -866,21 +866,21 @@ const void tg05_0(arm_state *cpustate, UINT32 pc, UINT32 insn) /* STR Rd, [Rn,
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT32 rm, rn, rd;
|
||||
|
||||
|
||||
rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
|
||||
rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
|
||||
rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
|
||||
addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
|
||||
WRITE32(addr, GET_REGISTER(cpustate, rd));
|
||||
R15 += 2;
|
||||
|
||||
|
||||
}
|
||||
|
||||
const void tg05_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* STRH Rd, [Rn, Rm] */
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT32 rm, rn, rd;
|
||||
|
||||
|
||||
rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
|
||||
rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
|
||||
rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
|
||||
@ -894,7 +894,7 @@ const void tg05_2(arm_state *cpustate, UINT32 pc, UINT32 insn) /* STRB Rd, [Rn,
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT32 rm, rn, rd;
|
||||
|
||||
|
||||
rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
|
||||
rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
|
||||
rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
|
||||
@ -908,7 +908,7 @@ const void tg05_3(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LDSB Rd, [Rn,
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT32 rm, rn, rd, op2;
|
||||
|
||||
|
||||
rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
|
||||
rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
|
||||
rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
|
||||
@ -927,7 +927,7 @@ const void tg05_4(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LDR Rd, [Rn,
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT32 rm, rn, rd, op2;
|
||||
|
||||
|
||||
rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
|
||||
rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
|
||||
rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
|
||||
@ -942,7 +942,7 @@ const void tg05_5(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LDRH Rd, [Rn,
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT32 rm, rn, rd, op2;
|
||||
|
||||
|
||||
rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
|
||||
rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
|
||||
rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
|
||||
@ -957,7 +957,7 @@ const void tg05_6(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LDRB Rd, [Rn,
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT32 rm, rn, rd, op2;
|
||||
|
||||
|
||||
rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
|
||||
rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
|
||||
rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
|
||||
@ -972,7 +972,7 @@ const void tg05_7(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LDSH Rd, [Rn,
|
||||
{
|
||||
UINT32 addr;
|
||||
UINT32 rm, rn, rd, op2;
|
||||
|
||||
|
||||
rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
|
||||
rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
|
||||
rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
|
||||
@ -1119,7 +1119,7 @@ const void tg0b_0(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD SP, #imm *
|
||||
{
|
||||
UINT32 addr;
|
||||
|
||||
|
||||
|
||||
addr = (insn & THUMB_INSN_IMM);
|
||||
addr &= ~THUMB_INSN_IMM_S;
|
||||
SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) + ((insn & THUMB_INSN_IMM_S) ? -(addr << 2) : (addr << 2)));
|
||||
@ -1129,8 +1129,8 @@ const void tg0b_0(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD SP, #imm *
|
||||
|
||||
const void tg0b_1(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1139,8 +1139,8 @@ const void tg0b_1(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
const void tg0b_2(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1149,8 +1149,8 @@ const void tg0b_2(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
const void tg0b_3(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1160,7 +1160,7 @@ const void tg0b_3(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
const void tg0b_4(arm_state *cpustate, UINT32 pc, UINT32 insn) /* PUSH {Rlist} */
|
||||
{
|
||||
INT32 offs;
|
||||
|
||||
|
||||
for (offs = 7; offs >= 0; offs--)
|
||||
{
|
||||
if (insn & (1 << offs))
|
||||
@ -1176,7 +1176,7 @@ const void tg0b_4(arm_state *cpustate, UINT32 pc, UINT32 insn) /* PUSH {Rlist} *
|
||||
const void tg0b_5(arm_state *cpustate, UINT32 pc, UINT32 insn) /* PUSH {Rlist}{LR} */
|
||||
{
|
||||
INT32 offs;
|
||||
|
||||
|
||||
SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) - 4);
|
||||
WRITE32(GET_REGISTER(cpustate, 13), GET_REGISTER(cpustate, 14));
|
||||
for (offs = 7; offs >= 0; offs--)
|
||||
@ -1193,8 +1193,8 @@ const void tg0b_5(arm_state *cpustate, UINT32 pc, UINT32 insn) /* PUSH {Rlist}{L
|
||||
|
||||
const void tg0b_6(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1203,8 +1203,8 @@ const void tg0b_6(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
const void tg0b_7(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1213,8 +1213,8 @@ const void tg0b_7(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
const void tg0b_8(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1223,8 +1223,8 @@ const void tg0b_8(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
const void tg0b_9(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1233,8 +1233,8 @@ const void tg0b_9(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
const void tg0b_a(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1243,8 +1243,8 @@ const void tg0b_a(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
const void tg0b_b(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1254,7 +1254,7 @@ const void tg0b_b(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
const void tg0b_c(arm_state *cpustate, UINT32 pc, UINT32 insn) /* POP {Rlist} */
|
||||
{
|
||||
INT32 offs;
|
||||
|
||||
|
||||
for (offs = 0; offs < 8; offs++)
|
||||
{
|
||||
if (insn & (1 << offs))
|
||||
@ -1270,7 +1270,7 @@ const void tg0b_c(arm_state *cpustate, UINT32 pc, UINT32 insn) /* POP {Rlist} */
|
||||
const void tg0b_d(arm_state *cpustate, UINT32 pc, UINT32 insn) /* POP {Rlist}{PC} */
|
||||
{
|
||||
INT32 offs;
|
||||
|
||||
|
||||
for (offs = 0; offs < 8; offs++)
|
||||
{
|
||||
if (insn & (1 << offs))
|
||||
@ -1286,8 +1286,8 @@ const void tg0b_d(arm_state *cpustate, UINT32 pc, UINT32 insn) /* POP {Rlist}{PC
|
||||
|
||||
const void tg0b_e(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1296,8 +1296,8 @@ const void tg0b_e(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
|
||||
const void tg0b_f(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
// UINT32 addr;
|
||||
// INT32 offs;
|
||||
|
||||
fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
|
||||
R15 += 2;
|
||||
@ -1361,10 +1361,10 @@ const void tg0c_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Load */
|
||||
ld_st_address += 4;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if (!rd_in_list)
|
||||
SET_REGISTER(cpustate, rd, ld_st_address);
|
||||
|
||||
|
||||
R15 += 2;
|
||||
}
|
||||
|
||||
@ -1375,7 +1375,7 @@ const void tg0d_0(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_EQ:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (Z_IS_SET(GET_CPSR))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1392,7 +1392,7 @@ const void tg0d_1(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_NE:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (Z_IS_CLEAR(GET_CPSR))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1409,7 +1409,7 @@ const void tg0d_2(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_CS:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (C_IS_SET(GET_CPSR))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1426,7 +1426,7 @@ const void tg0d_3(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_CC:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (C_IS_CLEAR(GET_CPSR))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1443,7 +1443,7 @@ const void tg0d_4(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_MI:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (N_IS_SET(GET_CPSR))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1460,7 +1460,7 @@ const void tg0d_5(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_PL:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (N_IS_CLEAR(GET_CPSR))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1477,7 +1477,7 @@ const void tg0d_6(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_VS:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (V_IS_SET(GET_CPSR))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1494,7 +1494,7 @@ const void tg0d_7(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_VC:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (V_IS_CLEAR(GET_CPSR))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1511,7 +1511,7 @@ const void tg0d_8(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_HI:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (C_IS_SET(GET_CPSR) && Z_IS_CLEAR(GET_CPSR))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1528,7 +1528,7 @@ const void tg0d_9(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_LS:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (C_IS_CLEAR(GET_CPSR) || Z_IS_SET(GET_CPSR))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1545,7 +1545,7 @@ const void tg0d_a(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_GE:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (!(GET_CPSR & N_MASK) == !(GET_CPSR & V_MASK))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1562,7 +1562,7 @@ const void tg0d_b(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_LT:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (!(GET_CPSR & N_MASK) != !(GET_CPSR & V_MASK))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1579,7 +1579,7 @@ const void tg0d_c(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_GT:
|
||||
INT32 offs;
|
||||
|
||||
offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
if (Z_IS_CLEAR(GET_CPSR) && !(GET_CPSR & N_MASK) == !(GET_CPSR & V_MASK))
|
||||
{
|
||||
R15 += 4 + (offs << 1);
|
||||
@ -1610,10 +1610,10 @@ const void tg0d_d(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_LE:
|
||||
|
||||
const void tg0d_e(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_AL:
|
||||
{
|
||||
// INT32 offs;
|
||||
// INT32 offs;
|
||||
|
||||
// offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
//case
|
||||
//case
|
||||
fatalerror("%08x: Undefined Thumb instruction: %04x (ARM9 reserved)\n", pc, insn);
|
||||
R15 += 2;
|
||||
|
||||
@ -1621,11 +1621,11 @@ const void tg0d_e(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_AL:
|
||||
|
||||
const void tg0d_f(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_NV: // SWI (this is sort of a "hole" in the opcode encoding)
|
||||
{
|
||||
// INT32 offs;
|
||||
// INT32 offs;
|
||||
|
||||
// offs = (INT8)(insn & THUMB_INSN_IMM);
|
||||
|
||||
//case
|
||||
//case
|
||||
cpustate->pendingSwi = 1;
|
||||
ARM7_CHECKIRQ;
|
||||
|
||||
@ -1633,7 +1633,7 @@ const void tg0d_f(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_NV: //
|
||||
|
||||
/* B #offs */
|
||||
|
||||
const void tg0e_0(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
const void tg0e_0(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
INT32 offs;
|
||||
|
||||
@ -1649,7 +1649,7 @@ const void tg0e_0(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
const void tg0e_1(arm_state *cpustate, UINT32 pc, UINT32 insn)
|
||||
{
|
||||
UINT32 addr;
|
||||
|
||||
|
||||
addr = GET_REGISTER(cpustate, 14);
|
||||
addr += (insn & THUMB_BLOP_OFFS) << 1;
|
||||
addr &= 0xfffffffc;
|
||||
|
@ -2260,7 +2260,7 @@ static void i386_protected_mode_iret(i386_state* cpustate, int operand32)
|
||||
{
|
||||
if(newflags & 0x00020000) // if returning to virtual 8086 mode
|
||||
{
|
||||
// UINT8 SSRPL,SSDPL;
|
||||
// UINT8 SSRPL,SSDPL;
|
||||
memset(&desc, 0, sizeof(desc));
|
||||
desc.selector = newCS;
|
||||
i386_load_protected_mode_segment(cpustate,&desc);
|
||||
@ -2275,118 +2275,118 @@ static void i386_protected_mode_iret(i386_state* cpustate, int operand32)
|
||||
/* Return to v86 mode */
|
||||
logerror("IRET (%08x): Returning to Virtual 8086 mode.\n",cpustate->pc);
|
||||
// Should these be done at this point? The 386 programmers' reference is a bit confusing about this
|
||||
/* if(RPL != 3)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS RPL is not 3\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
if(operand32 == 0)
|
||||
{
|
||||
if(REG16(SP)+36 > cpustate->sreg[SS].limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Stack does not have enough room left\n",cpustate->pc);
|
||||
FAULT(FAULT_SS,0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(REG32(ESP)+36 > cpustate->sreg[SS].limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Stack does not have enough space left\n",cpustate->pc);
|
||||
FAULT(FAULT_SS,0);
|
||||
}
|
||||
}
|
||||
// code segment checks
|
||||
if((newCS & ~0x07) == 0)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS selector is null\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
if(desc.flags & 0x04)
|
||||
{ // LDT
|
||||
if(newCS > cpustate->ldtr.limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS selector is past LDT limit\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
}
|
||||
else
|
||||
{ // GDT
|
||||
if(newCS > cpustate->gdtr.limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS selector is past GDT limit\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
}
|
||||
if((desc.flags & 0x18) != 0x18)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS segment is not a code segment\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
if(DPL != 3)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS segment does not have a DPL of 3\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
if(!(desc.flags & 0x0080))
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS segment is not present\n",cpustate->pc);
|
||||
FAULT(FAULT_NP,newCS);
|
||||
}
|
||||
// Stack segment checks
|
||||
if((newSS & ~0x07) == 0)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS segment is null\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
if(desc.flags & 0x04)
|
||||
{ // LDT
|
||||
if(newSS > cpustate->ldtr.limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS selector is past LDT limit\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
}
|
||||
else
|
||||
{ // GDT
|
||||
if(newSS > cpustate->gdtr.limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS selector is past GDT limit\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
}
|
||||
if(SSRPL != RPL)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS selector RPL is not equal to CS selector RPL\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
if(((stack.flags & 0x0018) != 0x10) && (!(stack.flags & 0x02)))
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS segment is not a writable data segment\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
if(SSDPL != RPL)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS segment DPL is not equal to CS selector RPL\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
if(!(stack.flags & 0x0080))
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS segment is not present\n",cpustate->pc);
|
||||
FAULT(FAULT_NP,newSS);
|
||||
}
|
||||
/* if(RPL != 3)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS RPL is not 3\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
if(operand32 == 0)
|
||||
{
|
||||
if(REG16(SP)+36 > cpustate->sreg[SS].limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Stack does not have enough room left\n",cpustate->pc);
|
||||
FAULT(FAULT_SS,0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(REG32(ESP)+36 > cpustate->sreg[SS].limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Stack does not have enough space left\n",cpustate->pc);
|
||||
FAULT(FAULT_SS,0);
|
||||
}
|
||||
}
|
||||
// code segment checks
|
||||
if((newCS & ~0x07) == 0)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS selector is null\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
if(desc.flags & 0x04)
|
||||
{ // LDT
|
||||
if(newCS > cpustate->ldtr.limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS selector is past LDT limit\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
}
|
||||
else
|
||||
{ // GDT
|
||||
if(newCS > cpustate->gdtr.limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS selector is past GDT limit\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
}
|
||||
if((desc.flags & 0x18) != 0x18)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS segment is not a code segment\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
if(DPL != 3)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS segment does not have a DPL of 3\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newCS);
|
||||
}
|
||||
if(!(desc.flags & 0x0080))
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return CS segment is not present\n",cpustate->pc);
|
||||
FAULT(FAULT_NP,newCS);
|
||||
}
|
||||
// Stack segment checks
|
||||
if((newSS & ~0x07) == 0)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS segment is null\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
if(desc.flags & 0x04)
|
||||
{ // LDT
|
||||
if(newSS > cpustate->ldtr.limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS selector is past LDT limit\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
}
|
||||
else
|
||||
{ // GDT
|
||||
if(newSS > cpustate->gdtr.limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS selector is past GDT limit\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
}
|
||||
if(SSRPL != RPL)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS selector RPL is not equal to CS selector RPL\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
if(((stack.flags & 0x0018) != 0x10) && (!(stack.flags & 0x02)))
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS segment is not a writable data segment\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
if(SSDPL != RPL)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS segment DPL is not equal to CS selector RPL\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,newSS);
|
||||
}
|
||||
if(!(stack.flags & 0x0080))
|
||||
{
|
||||
logerror("IRET to V86 (%08x): Return SS segment is not present\n",cpustate->pc);
|
||||
FAULT(FAULT_NP,newSS);
|
||||
}
|
||||
|
||||
if(newEIP > desc.limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): New EIP is past CS segment limit\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,0);
|
||||
}
|
||||
*/
|
||||
if(newEIP > desc.limit)
|
||||
{
|
||||
logerror("IRET to V86 (%08x): New EIP is past CS segment limit\n",cpustate->pc);
|
||||
FAULT(FAULT_GP,0);
|
||||
}
|
||||
*/
|
||||
set_flags(cpustate,newflags);
|
||||
cpustate->eip = POP32(cpustate) & 0xffff; // high 16 bits are ignored
|
||||
cpustate->sreg[CS].selector = POP32(cpustate) & 0xffff;
|
||||
POP32(cpustate); // already set flags
|
||||
// if(RPL > CPL)
|
||||
// if(RPL > CPL)
|
||||
{
|
||||
newESP = POP32(cpustate);
|
||||
newSS = POP32(cpustate) & 0xffff;
|
||||
@ -2649,10 +2649,10 @@ static void i386_protected_mode_iret(i386_state* cpustate, int operand32)
|
||||
FAULT(FAULT_GP,0)
|
||||
}
|
||||
|
||||
// if(operand32 == 0)
|
||||
// REG16(SP) += 10;
|
||||
// else
|
||||
// REG32(ESP) += 20;
|
||||
// if(operand32 == 0)
|
||||
// REG16(SP) += 10;
|
||||
// else
|
||||
// REG32(ESP) += 20;
|
||||
|
||||
if(operand32 == 0)
|
||||
{
|
||||
|
@ -419,7 +419,7 @@ INLINE int translate_address(i386_state *cpustate, bool rw, UINT32 *address, UIN
|
||||
*address = (page_entry & 0xfffff000) | offset;
|
||||
}
|
||||
}
|
||||
if(!ret)
|
||||
if(!ret)
|
||||
{
|
||||
*error = ((rw && 1)<<1) | ((cpustate->CPL==3)?1<<2:0);
|
||||
return 0;
|
||||
|
@ -278,7 +278,7 @@ class delegate_base
|
||||
|
||||
public:
|
||||
// define our traits
|
||||
template<class _FunctionClass>
|
||||
template<class _FunctionClass>
|
||||
struct traits
|
||||
{
|
||||
typedef typename delegate_traits<_FunctionClass, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type>::member_func_type member_func_type;
|
||||
@ -530,7 +530,7 @@ class delegate_base
|
||||
|
||||
public:
|
||||
// define our traits
|
||||
template<class _FunctionClass>
|
||||
template<class _FunctionClass>
|
||||
struct traits
|
||||
{
|
||||
typedef typename delegate_traits<_FunctionClass, _ReturnType, _P1Type, _P2Type, _P3Type, _P4Type, _P5Type>::member_func_type member_func_type;
|
||||
|
@ -61,7 +61,7 @@ public:
|
||||
// force the UI to show the game select screen
|
||||
ui_menu_force_game_select(machine(), &machine().render().ui_container());
|
||||
}
|
||||
|
||||
|
||||
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
bitmap.fill(RGB_BLACK);
|
||||
|
@ -80,14 +80,14 @@ public:
|
||||
0x986a0070 // stb r3,0x0070(r10)
|
||||
};
|
||||
|
||||
// iterate over instructions
|
||||
// iterate over instructions
|
||||
for (int instnum = 0; instnum < ARRAY_LENGTH(sample_instructions); instnum++)
|
||||
{
|
||||
// write the instruction to execute, followed by a BLR which will terminate the
|
||||
// basic block in the DRC
|
||||
m_space->write_dword(RAM_BASE, sample_instructions[instnum]);
|
||||
m_space->write_dword(RAM_BASE + 4, 0x4e800020);
|
||||
|
||||
|
||||
// initialize the register state
|
||||
m_cpu->set_state(PPC_PC, RAM_BASE);
|
||||
for (int regnum = 0; regnum < 32; regnum++)
|
||||
@ -110,29 +110,29 @@ public:
|
||||
// execute one instruction
|
||||
*m_cpu->m_icountptr = 0;
|
||||
m_cpu->run();
|
||||
|
||||
|
||||
// dump the final register state
|
||||
printf("Final state:\n");
|
||||
dump_state(false);
|
||||
}
|
||||
|
||||
|
||||
// all done; just bail
|
||||
throw emu_fatalerror(0, "All done");
|
||||
}
|
||||
|
||||
|
||||
// startup code; do basic configuration and set a timer to go off immediately
|
||||
virtual void machine_start()
|
||||
{
|
||||
// find the CPU's address space
|
||||
m_space = m_cpu->space(AS_PROGRAM);
|
||||
|
||||
|
||||
// configure DRC in the most compatible mode
|
||||
ppcdrc_set_options(m_cpu, PPCDRC_COMPATIBLE_OPTIONS);
|
||||
|
||||
// set a timer to go off right away
|
||||
timer_set(attotime::zero);
|
||||
}
|
||||
|
||||
|
||||
// dump the current CPU state
|
||||
void dump_state(bool disassemble)
|
||||
{
|
||||
@ -147,10 +147,10 @@ public:
|
||||
for (int bytenum = 0; bytenum < maxbytes; bytenum++)
|
||||
instruction[bytenum] = m_space->read_byte(RAM_BASE + bytenum);
|
||||
|
||||
// disassemble the current instruction
|
||||
// disassemble the current instruction
|
||||
bytes = m_cpu->disassemble(buffer, RAM_BASE, instruction, instruction) & DASMFLAG_LENGTHMASK;
|
||||
}
|
||||
|
||||
|
||||
// output the registers
|
||||
printf("PC : %08X", UINT32(m_cpu->state(PPC_PC)));
|
||||
if (disassemble && bytes > 0)
|
||||
@ -167,7 +167,7 @@ public:
|
||||
if (regnum % 4 == 3) printf("\n");
|
||||
}
|
||||
printf("CR : %08X LR : %08X CTR: %08X XER: %08X\n",
|
||||
UINT32(m_cpu->state(PPC_CR)), UINT32(m_cpu->state(PPC_LR)),
|
||||
UINT32(m_cpu->state(PPC_CR)), UINT32(m_cpu->state(PPC_LR)),
|
||||
UINT32(m_cpu->state(PPC_CTR)), UINT32(m_cpu->state(PPC_XER)));
|
||||
for (int regnum = 0; regnum < 32; regnum++)
|
||||
{
|
||||
@ -175,7 +175,7 @@ public:
|
||||
if (regnum % 4 == 3) printf("\n");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
// report reads from anywhere
|
||||
READ64_MEMBER( general_r )
|
||||
{
|
||||
|
@ -40,9 +40,9 @@ public:
|
||||
virtual bool call_load();
|
||||
virtual void call_unload();
|
||||
virtual void call_display_info() { if (m_device_displayinfo) m_device_displayinfo(*this); }
|
||||
virtual bool call_softlist_load(char *swlist, char *swname, rom_entry *start_entry) { load_software_part_region( this, swlist, swname, start_entry ); return TRUE; }
|
||||
virtual bool call_softlist_load(char *swlist, char *swname, rom_entry *start_entry) { load_software_part_region( this, swlist, swname, start_entry ); return TRUE; }
|
||||
virtual device_image_partialhash_func get_partial_hash() const { return m_device_partialhash; }
|
||||
|
||||
|
||||
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
|
||||
|
||||
virtual bool is_readable() const { return 1; }
|
||||
@ -53,7 +53,7 @@ public:
|
||||
virtual const char *image_interface() const { return m_interface; }
|
||||
virtual const char *file_extensions() const { return m_extensions; }
|
||||
virtual const option_guide *create_option_guide() const { return NULL; }
|
||||
|
||||
|
||||
void set_extensions(const char *_extensions) { m_extensions = _extensions; }
|
||||
void set_interface(const char *_interface) { m_interface = _interface; }
|
||||
void set_must_be_loaded(bool _must_be_loaded) { m_must_be_loaded = _must_be_loaded; }
|
||||
@ -67,10 +67,10 @@ protected:
|
||||
// device-level overrides
|
||||
virtual void device_config_complete();
|
||||
virtual void device_start();
|
||||
|
||||
|
||||
int load_cartridge(const rom_entry *romrgn, const rom_entry *roment, bool load);
|
||||
int process_cartridge(bool load);
|
||||
|
||||
|
||||
|
||||
const char * m_extensions;
|
||||
const char * m_interface;
|
||||
|
@ -120,11 +120,11 @@ struct _ide_device
|
||||
UINT16 num_cylinders;
|
||||
UINT8 num_sectors;
|
||||
UINT8 num_heads;
|
||||
|
||||
|
||||
chd_file *handle;
|
||||
hard_disk_file *disk;
|
||||
bool is_image_device;
|
||||
};
|
||||
bool is_image_device;
|
||||
};
|
||||
|
||||
|
||||
typedef struct _ide_state ide_state;
|
||||
@ -173,7 +173,7 @@ struct _ide_state
|
||||
|
||||
UINT8 gnetreadlock;
|
||||
ide_hardware * hardware;
|
||||
|
||||
|
||||
UINT8 cur_drive;
|
||||
ide_device drive[2];
|
||||
};
|
||||
@ -1872,7 +1872,7 @@ static DEVICE_START( ide_controller )
|
||||
|
||||
/* set MAME harddisk handle */
|
||||
config = (const ide_config *)downcast<const legacy_device_base *>(device)->inline_config();
|
||||
|
||||
|
||||
ide->drive[0].handle = get_disk_handle(device->machine(), (config->master != NULL) ? config->master : device->tag());
|
||||
ide->drive[0].disk = hard_disk_open(ide->drive[0].handle);
|
||||
ide->drive[0].is_image_device = false;
|
||||
@ -1914,7 +1914,7 @@ static DEVICE_START( ide_controller )
|
||||
|
||||
/* build the features page */
|
||||
ide_build_features(ide,0);
|
||||
}
|
||||
}
|
||||
if (ide->drive[1].disk != NULL)
|
||||
{
|
||||
hdinfo = hard_disk_get_info(ide->drive[1].disk);
|
||||
@ -1928,7 +1928,7 @@ static DEVICE_START( ide_controller )
|
||||
|
||||
/* build the features page */
|
||||
ide_build_features(ide,1);
|
||||
}
|
||||
}
|
||||
if (config->hardware != NULL) {
|
||||
ide->hardware = (ide_hardware *)config->hardware;
|
||||
ide->hardware->get_info(ide->device, ide->drive[0].features, ide->drive[0].num_cylinders, ide->drive[0].num_sectors, ide->drive[0].num_heads);
|
||||
@ -2055,7 +2055,7 @@ static DEVICE_RESET( ide_controller )
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
if (device->machine().device( hardtag_slave.cstr() )) {
|
||||
if (!ide->drive[1].disk)
|
||||
{
|
||||
@ -2084,7 +2084,7 @@ static DEVICE_RESET( ide_controller )
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
if (ide->hardware != NULL) {
|
||||
ide->hardware->get_info(ide->device, ide->drive[0].features, ide->drive[0].num_cylinders, ide->drive[0].num_sectors, ide->drive[0].num_heads);
|
||||
ide_generate_features (ide,0);
|
||||
|
@ -143,7 +143,7 @@ laserdisc_device::~laserdisc_device()
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// get_field_code - return raw field information
|
||||
// get_field_code - return raw field information
|
||||
// read from the disc
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -244,7 +244,7 @@ void laserdisc_device::static_set_screen(device_t &device, const char *screen)
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// static_set_get_disc - set the get disc
|
||||
// static_set_get_disc - set the get disc
|
||||
// delegate
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -255,7 +255,7 @@ void laserdisc_device::static_set_get_disc(device_t &device, laserdisc_get_disc_
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// static_set_get_disc - set the audio interceptor
|
||||
// static_set_get_disc - set the audio interceptor
|
||||
// delegate
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -292,7 +292,7 @@ void laserdisc_device::static_set_overlay(device_t &device, UINT32 width, UINT32
|
||||
|
||||
//-------------------------------------------------
|
||||
// static_set_overlay - set the overlay visible
|
||||
// subregion
|
||||
// subregion
|
||||
//-------------------------------------------------
|
||||
|
||||
void laserdisc_device::static_set_overlay_clip(device_t &device, INT32 minx, INT32 maxx, INT32 miny, INT32 maxy)
|
||||
@ -302,7 +302,7 @@ void laserdisc_device::static_set_overlay_clip(device_t &device, INT32 minx, INT
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// static_set_overlay_position - set the overlay
|
||||
// static_set_overlay_position - set the overlay
|
||||
// position parameters
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -316,7 +316,7 @@ void laserdisc_device::static_set_overlay_position(device_t &device, float posx,
|
||||
|
||||
//-------------------------------------------------
|
||||
// static_set_overlay_scale - set the overlay
|
||||
// scale parameters
|
||||
// scale parameters
|
||||
//-------------------------------------------------
|
||||
|
||||
void laserdisc_device::static_set_overlay_scale(device_t &device, float scalex, float scaley)
|
||||
@ -528,7 +528,7 @@ void laserdisc_device::advance_slider(INT32 numtracks)
|
||||
{
|
||||
// first update to the current time
|
||||
update_slider_pos();
|
||||
|
||||
|
||||
// then update the track position
|
||||
add_and_clamp_track(numtracks);
|
||||
if (LOG_SLIDER)
|
||||
@ -729,7 +729,7 @@ INT32 laserdisc_device::generic_update(const vbi_metadata &vbi, int fieldnum, at
|
||||
advanceby = 1;
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
default:
|
||||
// do nothing
|
||||
break;
|
||||
@ -855,7 +855,7 @@ void laserdisc_device::init_video()
|
||||
// bind our handlers
|
||||
m_overupdate_ind16.bind_relative_to(*owner());
|
||||
m_overupdate_rgb32.bind_relative_to(*owner());
|
||||
|
||||
|
||||
// configure bitmap formats
|
||||
bitmap_format format = !m_overupdate_ind16.isnull() ? BITMAP_FORMAT_IND16 : BITMAP_FORMAT_RGB32;
|
||||
texture_format texformat = !m_overupdate_ind16.isnull() ? TEXFORMAT_PALETTEA16 : TEXFORMAT_ARGB32;
|
||||
@ -867,7 +867,7 @@ void laserdisc_device::init_video()
|
||||
m_overbitmap[index].set_palette(machine().palette);
|
||||
m_overbitmap[index].resize(m_overwidth, m_overheight);
|
||||
}
|
||||
|
||||
|
||||
// allocate overlay texture
|
||||
m_overtex = machine().render().texture_alloc();
|
||||
if (m_overtex == NULL)
|
||||
@ -930,7 +930,7 @@ void laserdisc_device::fillbitmap_yuy16(bitmap_yuy16 &bitmap, UINT8 yval, UINT8
|
||||
void laserdisc_device::update_slider_pos()
|
||||
{
|
||||
attotime curtime = machine().time();
|
||||
|
||||
|
||||
// if not moving, update to now
|
||||
if (m_attospertrack == 0)
|
||||
m_sliderupdate = curtime;
|
||||
|
@ -165,7 +165,7 @@ struct laserdisc_overlay_config
|
||||
// ======================> laserdisc_device
|
||||
|
||||
// base laserdisc class
|
||||
class laserdisc_device : public device_t,
|
||||
class laserdisc_device : public device_t,
|
||||
public device_sound_interface,
|
||||
public laserdisc_overlay_config
|
||||
{
|
||||
@ -372,7 +372,7 @@ private:
|
||||
bool m_videoenable; // is video enabled?
|
||||
render_texture * m_videotex; // texture for the video
|
||||
palette_t * m_videopalette; // palette for the video
|
||||
|
||||
|
||||
// overlays
|
||||
bool m_overenable; // is the overlay enabled?
|
||||
screen_bitmap m_overbitmap[2]; // overlay bitmaps
|
||||
|
@ -240,10 +240,10 @@ pioneer_pr8210_device::pioneer_pr8210_device(const machine_config &mconfig, devi
|
||||
m_i8049_port2(0)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// control_w - write callback when the CONTROL
|
||||
// control_w - write callback when the CONTROL
|
||||
// line is toggled
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -252,7 +252,7 @@ void pioneer_pr8210_device::control_w(UINT8 data)
|
||||
// set the new value and remember the last
|
||||
UINT8 prev = m_control;
|
||||
m_control = data;
|
||||
|
||||
|
||||
// handle rising edge
|
||||
if (prev != ASSERT_LINE && data == ASSERT_LINE)
|
||||
{
|
||||
@ -351,7 +351,7 @@ void pioneer_pr8210_device::device_timer(emu_timer &timer, device_timer_id id, i
|
||||
switch (id)
|
||||
{
|
||||
// update the VBI data in the PIA as soon as it is ready;
|
||||
// this must happen early in the frame because the player
|
||||
// this must happen early in the frame because the player
|
||||
// logic relies on fetching it here
|
||||
case TID_VBI_DATA_FETCH:
|
||||
|
||||
@ -396,12 +396,12 @@ void pioneer_pr8210_device::device_timer(emu_timer &timer, device_timer_id id, i
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
// clear the VSYNC flag
|
||||
case TID_VSYNC_OFF:
|
||||
m_vsync = false;
|
||||
break;
|
||||
|
||||
|
||||
// pass everything else onto the parent
|
||||
default:
|
||||
laserdisc_device::device_timer(timer, id, param, ptr);
|
||||
@ -458,7 +458,7 @@ void pioneer_pr8210_device::player_vsync(const vbi_metadata &vbi, int fieldnum,
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// player_update - update callback, called on the
|
||||
// player_update - update callback, called on the
|
||||
// first visible line of the frame
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -639,7 +639,7 @@ READ8_MEMBER( pioneer_pr8210_device::i8049_bus_r )
|
||||
$04 = (in) SIZE 8/12
|
||||
$02 = (in) FG via op-amp (spindle motor stop detector)
|
||||
$01 = (in) SLOW TIMER OUT
|
||||
*/
|
||||
*/
|
||||
|
||||
UINT8 result = 0x00;
|
||||
|
||||
@ -684,7 +684,7 @@ WRITE8_MEMBER( pioneer_pr8210_device::i8049_port1_w )
|
||||
$02 = (out) SCAN A (/SCAN)
|
||||
$01 = (out) JUMP TRG (jump back trigger, clock on high->low)
|
||||
*/
|
||||
|
||||
|
||||
// set the new value
|
||||
UINT8 prev = m_i8049_port1;
|
||||
m_i8049_port1 = data;
|
||||
@ -933,7 +933,7 @@ simutrek_special_device::simutrek_special_device(const machine_config &mconfig,
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// data_w - write callback when the parallel data
|
||||
// data_w - write callback when the parallel data
|
||||
// port is written to
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -1028,7 +1028,7 @@ void simutrek_special_device::device_timer(emu_timer &timer, device_timer_id id,
|
||||
case TID_IRQ_OFF:
|
||||
m_i8748_cpu->set_input_line(MCS48_INPUT_IRQ, CLEAR_LINE);
|
||||
break;
|
||||
|
||||
|
||||
// latch data
|
||||
case TID_LATCH_DATA:
|
||||
m_data = param;
|
||||
|
@ -107,22 +107,22 @@ ADDRESS_MAP_END
|
||||
|
||||
static const ppi8255_interface ppi0intf =
|
||||
{
|
||||
DEVCB_NULL,
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi0_portb_r),
|
||||
DEVCB_NULL,
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi0_portb_r),
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi0_portc_r),
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi0_porta_w),
|
||||
DEVCB_NULL,
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi0_porta_w),
|
||||
DEVCB_NULL,
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi0_portc_w)
|
||||
};
|
||||
|
||||
|
||||
static const ppi8255_interface ppi1intf =
|
||||
{
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi1_porta_r),
|
||||
DEVCB_NULL,
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi1_porta_r),
|
||||
DEVCB_NULL,
|
||||
DEVCB_NULL,
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi1_portb_w),
|
||||
DEVCB_NULL,
|
||||
DEVCB_NULL,
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi1_portb_w),
|
||||
DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, pioneer_ldv1000_device, ppi1_portc_w)
|
||||
};
|
||||
|
||||
@ -193,7 +193,7 @@ pioneer_ldv1000_device::pioneer_ldv1000_device(const machine_config &mconfig, co
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// data_w - handle a parallel data write to the
|
||||
// data_w - handle a parallel data write to the
|
||||
// LD-V1000
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -222,7 +222,7 @@ void pioneer_ldv1000_device::device_start()
|
||||
{
|
||||
// pass through to the parent
|
||||
laserdisc_device::device_start();
|
||||
|
||||
|
||||
// allocate timers
|
||||
m_multitimer = timer_alloc(TID_MULTIJUMP);
|
||||
}
|
||||
@ -273,11 +273,11 @@ void pioneer_ldv1000_device::device_timer(emu_timer &timer, device_timer_id id,
|
||||
timer.adjust(MULTIJUMP_TRACK_TIME);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
case TID_VSYNC_OFF:
|
||||
m_vsync = false;
|
||||
break;
|
||||
|
||||
|
||||
case TID_VBI_DATA_FETCH:
|
||||
{
|
||||
// appears to return data in reverse order
|
||||
@ -315,7 +315,7 @@ void pioneer_ldv1000_device::device_timer(emu_timer &timer, device_timer_id id,
|
||||
m_vbiindex = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
// pass everything else onto the parent
|
||||
default:
|
||||
laserdisc_device::device_timer(timer, id, param, ptr);
|
||||
@ -398,7 +398,7 @@ WRITE_LINE_MEMBER( pioneer_ldv1000_device::ctc_interrupt )
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// z80_decoder_display_port_w - handle writes to
|
||||
// z80_decoder_display_port_w - handle writes to
|
||||
// the decoder/display chips
|
||||
//-------------------------------------------------
|
||||
|
||||
|
@ -146,7 +146,7 @@ void phillips_22vp931_device::reset_w(UINT8 data)
|
||||
{
|
||||
// control the CPU state
|
||||
m_i8049_cpu->set_input_line(INPUT_LINE_RESET, data);
|
||||
|
||||
|
||||
// on an assert, reset the device state as well
|
||||
if (data == ASSERT_LINE)
|
||||
reset();
|
||||
@ -154,7 +154,7 @@ void phillips_22vp931_device::reset_w(UINT8 data)
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// data_r - handle a parallel data read from the
|
||||
// data_r - handle a parallel data read from the
|
||||
// 22VP931
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -182,7 +182,7 @@ void phillips_22vp931_device::device_start()
|
||||
{
|
||||
// pass through to the parent
|
||||
laserdisc_device::device_start();
|
||||
|
||||
|
||||
// allocate a timer
|
||||
m_tracktimer = timer_alloc(TID_HALF_TRACK);
|
||||
}
|
||||
@ -201,19 +201,19 @@ void phillips_22vp931_device::device_reset()
|
||||
m_i8049_out0 = 0;
|
||||
m_i8049_out1 = 0;
|
||||
m_i8049_port1 = 0;
|
||||
|
||||
|
||||
m_daticval = 0;
|
||||
m_daticerp = 0;
|
||||
m_datastrobe = 0;
|
||||
|
||||
|
||||
m_fromcontroller = 0;
|
||||
m_fromcontroller_pending = false;
|
||||
m_tocontroller = 0;
|
||||
m_tocontroller_pending = false;
|
||||
|
||||
|
||||
m_trackdir = 0;
|
||||
m_trackstate = 0;
|
||||
|
||||
|
||||
m_cmdcount = 0;
|
||||
m_advanced = 0;
|
||||
}
|
||||
@ -263,7 +263,7 @@ void phillips_22vp931_device::device_timer(emu_timer &timer, device_timer_id id,
|
||||
timer_set(screen().time_until_pos(line*2, which * 2 * screen().width() / 4), TID_VBI_DATA_FETCH, (line << 2) + which);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
case TID_DEFERRED_DATA:
|
||||
// set the value and mark it pending
|
||||
if (LOG_COMMANDS && m_fromcontroller_pending)
|
||||
@ -279,19 +279,19 @@ void phillips_22vp931_device::device_timer(emu_timer &timer, device_timer_id id,
|
||||
printf("Cmd: %02X %02X %02X\n", m_cmdbuf[0], m_cmdbuf[1], m_cmdbuf[2]);
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case TID_IRQ_OFF:
|
||||
m_i8049_cpu->set_input_line(MCS48_INPUT_IRQ, CLEAR_LINE);
|
||||
break;
|
||||
|
||||
|
||||
case TID_DATA_STROBE_OFF:
|
||||
m_datastrobe = 0;
|
||||
break;
|
||||
|
||||
|
||||
case TID_ERP_OFF:
|
||||
m_daticerp = 0;
|
||||
break;
|
||||
|
||||
|
||||
case TID_HALF_TRACK:
|
||||
// advance by the count and toggle the state
|
||||
m_trackstate ^= 1;
|
||||
@ -301,7 +301,7 @@ void phillips_22vp931_device::device_timer(emu_timer &timer, device_timer_id id,
|
||||
m_advanced += m_trackdir;
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
// pass everything else onto the parent
|
||||
default:
|
||||
laserdisc_device::device_timer(timer, id, param, ptr);
|
||||
@ -471,7 +471,7 @@ READ8_MEMBER( phillips_22vp931_device::i8049_unknown_r )
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// i8049_keypad_r - vestigial keypad/button
|
||||
// i8049_keypad_r - vestigial keypad/button
|
||||
// controls
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -517,7 +517,7 @@ READ8_MEMBER( phillips_22vp931_device::i8049_from_controller_r )
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// i8049_to_controller_w - write a value back to
|
||||
// i8049_to_controller_w - write a value back to
|
||||
// the external controller
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -672,7 +672,7 @@ READ8_MEMBER( phillips_22vp931_device::i8049_t0_r )
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// i8049_t1_r - return the T1 line status, which
|
||||
// i8049_t1_r - return the T1 line status, which
|
||||
// is connected to the tracking state and is used
|
||||
// to count the number of tracks advanced
|
||||
//-------------------------------------------------
|
||||
|
@ -503,7 +503,7 @@ bool render_texture::get_scaled(UINT32 dwidth, UINT32 dheight, render_texinfo &t
|
||||
texinfo.seqid = ++m_curseq;
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
// make sure we can recover the original argb32 bitmap
|
||||
bitmap_argb32 &srcbitmap = downcast<bitmap_argb32 &>(*m_bitmap);
|
||||
|
||||
|
@ -232,7 +232,7 @@ void screen_device::static_set_screen_update(device_t &device, screen_update_rgb
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// static_set_screen_vblank - set the screen
|
||||
// static_set_screen_vblank - set the screen
|
||||
// VBLANK callback in the device configuration
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -284,7 +284,7 @@ bool screen_device::device_validity_check(emu_options &options, const game_drive
|
||||
mame_printf_error("%s: %s screen '%s' has a zero refresh rate\n", driver.source_file, driver.name, tag());
|
||||
error = true;
|
||||
}
|
||||
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
@ -299,7 +299,7 @@ void screen_device::device_start()
|
||||
m_screen_update_ind16.bind_relative_to(*owner());
|
||||
m_screen_update_rgb32.bind_relative_to(*owner());
|
||||
m_screen_vblank.bind_relative_to(*owner());
|
||||
|
||||
|
||||
// configure bitmap formats and allocate screen bitmaps
|
||||
texture_format texformat = !m_screen_update_ind16.isnull() ? TEXFORMAT_PALETTE16 : TEXFORMAT_RGB32;
|
||||
for (int index = 0; index < ARRAY_LENGTH(m_bitmap); index++)
|
||||
@ -414,17 +414,17 @@ void screen_device::device_timer(emu_timer &timer, device_timer_id id, int param
|
||||
case TID_VBLANK_START:
|
||||
vblank_begin();
|
||||
break;
|
||||
|
||||
|
||||
// signal VBLANK end
|
||||
case TID_VBLANK_END:
|
||||
vblank_end();
|
||||
break;
|
||||
|
||||
|
||||
// first visible scanline
|
||||
case TID_SCANLINE0:
|
||||
reset_partial_updates();
|
||||
break;
|
||||
|
||||
|
||||
// subsequent scanlines when scanline updates are enabled
|
||||
case TID_SCANLINE:
|
||||
|
||||
@ -797,7 +797,7 @@ void screen_device::register_screen_bitmap(bitmap_t &bitmap)
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// vblank_begin - call any external callbacks to
|
||||
// vblank_begin - call any external callbacks to
|
||||
// signal the VBLANK period has begun
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -829,7 +829,7 @@ void screen_device::vblank_begin()
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// vblank_end - call any external callbacks to
|
||||
// vblank_end - call any external callbacks to
|
||||
// signal the VBLANK period has ended
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -908,7 +908,7 @@ void screen_device::update_burnin()
|
||||
int ystart = ((UINT32)rand() % 32767) * ystep / 32767;
|
||||
int srcx, srcy;
|
||||
int x, y;
|
||||
|
||||
|
||||
switch (curbitmap.format())
|
||||
{
|
||||
default:
|
||||
@ -929,7 +929,7 @@ void screen_device::update_burnin()
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
case BITMAP_FORMAT_RGB32:
|
||||
{
|
||||
// iterate over rows in the destination
|
||||
|
@ -88,15 +88,15 @@ public:
|
||||
m_live(&m_rgb32) { }
|
||||
screen_bitmap(bitmap_ind16 &orig)
|
||||
: m_format(BITMAP_FORMAT_IND16),
|
||||
m_texformat(TEXFORMAT_PALETTE16),
|
||||
m_texformat(TEXFORMAT_PALETTE16),
|
||||
m_live(&m_ind16),
|
||||
m_ind16(orig, orig.cliprect()) { }
|
||||
screen_bitmap(bitmap_rgb32 &orig)
|
||||
: m_format(BITMAP_FORMAT_RGB32),
|
||||
m_texformat(TEXFORMAT_RGB32),
|
||||
m_texformat(TEXFORMAT_RGB32),
|
||||
m_live(&m_rgb32),
|
||||
m_rgb32(orig, orig.cliprect()) { }
|
||||
|
||||
|
||||
// resizing
|
||||
void resize(int width, int height) { live().resize(width, height); }
|
||||
|
||||
@ -104,7 +104,7 @@ public:
|
||||
operator bitmap_t &() { return live(); }
|
||||
bitmap_ind16 &as_ind16() { assert(m_format == BITMAP_FORMAT_IND16); return m_ind16; }
|
||||
bitmap_rgb32 &as_rgb32() { assert(m_format == BITMAP_FORMAT_RGB32); return m_rgb32; }
|
||||
|
||||
|
||||
// getters
|
||||
INT32 width() const { return live().width(); }
|
||||
INT32 height() const { return live().height(); }
|
||||
@ -132,7 +132,7 @@ public:
|
||||
m_ind16.reset();
|
||||
m_rgb32.reset();
|
||||
}
|
||||
|
||||
|
||||
private:
|
||||
// internal state
|
||||
bitmap_format m_format;
|
||||
@ -219,7 +219,7 @@ public:
|
||||
bool update_partial(int scanline);
|
||||
void update_now();
|
||||
void reset_partial_updates();
|
||||
|
||||
|
||||
// additional helpers
|
||||
void register_vblank_callback(vblank_state_delegate vblank_callback);
|
||||
void register_screen_bitmap(bitmap_t &bitmap);
|
||||
@ -323,7 +323,7 @@ private:
|
||||
: m_next(NULL),
|
||||
m_bitmap(bitmap) { }
|
||||
auto_bitmap_item *next() const { return m_next; }
|
||||
|
||||
|
||||
auto_bitmap_item * m_next;
|
||||
bitmap_t & m_bitmap;
|
||||
};
|
||||
@ -406,9 +406,9 @@ extern const device_type SCREEN;
|
||||
|
||||
//-------------------------------------------------
|
||||
// screen_update_delegate_smart - collection of
|
||||
// inline helpers which create the appropriate
|
||||
// screen_update_delegate based on the input
|
||||
// function type
|
||||
// inline helpers which create the appropriate
|
||||
// screen_update_delegate based on the input
|
||||
// function type
|
||||
//-------------------------------------------------
|
||||
|
||||
inline screen_update_ind16_delegate screen_update_delegate_smart(UINT32 (*callback)(device_t *, screen_device &, bitmap_ind16 &, const rectangle &), const char *name)
|
||||
|
@ -2015,11 +2015,11 @@ void validate_softlists(emu_options &options)
|
||||
mame_printf_error("%s: %s has a part (%s) with no data\n", list->file->filename(), swinfo->shortname, swpart->name);
|
||||
error = TRUE;
|
||||
}
|
||||
|
||||
|
||||
if (part_names.add(swpart->name, swinfo, FALSE) == TMERR_DUPLICATE)
|
||||
{
|
||||
mame_printf_error("%s: %s has a part (%s) whose name is duplicate\n", list->file->filename(), swinfo->shortname, swpart->name);
|
||||
error = TRUE;
|
||||
error = TRUE;
|
||||
}
|
||||
|
||||
for (struct rom_entry *swdata = software_find_romdata(swpart, NULL); swdata != NULL; swdata = software_romdata_next(swdata))
|
||||
|
@ -181,7 +181,7 @@ static VIDEO_RESET( vga );
|
||||
|
||||
void pc_video_start(running_machine &machine)
|
||||
{
|
||||
// pc_choosevideomode = choosevideomode;
|
||||
// pc_choosevideomode = choosevideomode;
|
||||
pc_current_height = -1;
|
||||
pc_current_width = -1;
|
||||
}
|
||||
|
@ -257,7 +257,7 @@ PALETTE_INIT( v9958 )
|
||||
|
||||
// init v9938 512-color palette
|
||||
PALETTE_INIT_CALL(v9938);
|
||||
|
||||
|
||||
if (v99x8_device::s_pal_indYJK == NULL)
|
||||
v99x8_device::s_pal_indYJK = global_alloc_array(UINT16, 0x20000);
|
||||
|
||||
@ -585,7 +585,7 @@ void v99x8_device::device_start()
|
||||
assert(m_screen != NULL);
|
||||
if (!m_screen->started())
|
||||
throw device_missing_dependencies();
|
||||
|
||||
|
||||
if (!m_int_callback.isnull())
|
||||
{
|
||||
device_t *device = (m_int_callback_device_name != NULL) ? machine().device(m_int_callback_device_name) : NULL;
|
||||
@ -1867,7 +1867,7 @@ skip_first_cc_set:
|
||||
|
||||
#define SHORT_WIDTH (256 + 16)
|
||||
#define LONG_WIDTH (512 + 32)
|
||||
|
||||
|
||||
const v99x8_device::v99x8_mode v99x8_device::s_modes[] = {
|
||||
{ 0x02,
|
||||
&v99x8_device::mode_text1<UINT16, LONG_WIDTH>,
|
||||
@ -2274,10 +2274,10 @@ void v99x8_device::interrupt_start_vblank ()
|
||||
#define CM_HMMC 0xF
|
||||
|
||||
/*************************************************************/
|
||||
// Many VDP commands are executed in some kind of loop but
|
||||
// essentially, there are only a few basic loop structures
|
||||
// that are re-used. We define the loop structures that are
|
||||
// re-used here so that they have to be entered only once
|
||||
// Many VDP commands are executed in some kind of loop but
|
||||
// essentially, there are only a few basic loop structures
|
||||
// that are re-used. We define the loop structures that are
|
||||
// re-used here so that they have to be entered only once
|
||||
/*************************************************************/
|
||||
#define pre_loop \
|
||||
while ((cnt-=delta) > 0) {
|
||||
@ -2331,7 +2331,7 @@ static const int PPL[4] = { 256,512,512,256 };
|
||||
// ScrOf ScrOn ScrOf ScrOn
|
||||
static const int srch_timing[8]={
|
||||
818, 1025, 818, 830, // ntsc
|
||||
696, 854, 696, 684 // pal
|
||||
696, 854, 696, 684 // pal
|
||||
};
|
||||
static const int line_timing[8]={
|
||||
1063, 1259, 1063, 1161,
|
||||
@ -3106,7 +3106,7 @@ UINT8 v99x8_device::command_unit_w (UINT8 Op)
|
||||
if (ScrMode<5)
|
||||
return(0);
|
||||
|
||||
SM = ScrMode-5; // Screen mode index 0..3
|
||||
SM = ScrMode-5; // Screen mode index 0..3
|
||||
|
||||
m_mmc.CM = Op>>4;
|
||||
if ((m_mmc.CM & 0x0C) != 0x0C && m_mmc.CM != 0)
|
||||
|
@ -79,7 +79,7 @@ public:
|
||||
int get_transpen();
|
||||
bitmap_ind16 &get_bitmap() { return m_bitmap; }
|
||||
void update_mouse_state(int mx_delta, int my_delta, int button_state);
|
||||
|
||||
|
||||
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
DECLARE_READ8_MEMBER( read );
|
||||
@ -98,7 +98,7 @@ public:
|
||||
|
||||
protected:
|
||||
int m_model;
|
||||
|
||||
|
||||
// device overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
@ -110,7 +110,7 @@ private:
|
||||
int vram_read (int offset);
|
||||
void check_int ();
|
||||
void register_write (int reg, int data);
|
||||
|
||||
|
||||
template<typename _PixelType, int _Width> void default_border(const pen_t *pens, _PixelType *ln);
|
||||
template<typename _PixelType, int _Width> void graphic7_border(const pen_t *pens, _PixelType *ln);
|
||||
template<typename _PixelType, int _Width> void graphic5_border(const pen_t *pens, _PixelType *ln);
|
||||
@ -135,7 +135,7 @@ private:
|
||||
void refresh_line (int line);
|
||||
|
||||
void interrupt_start_vblank ();
|
||||
|
||||
|
||||
UINT8 *VDPVRMP(UINT8 M, int MX, int X, int Y);
|
||||
|
||||
UINT8 VDPpoint5(int MXS, int SX, int SY);
|
||||
|
@ -1254,7 +1254,7 @@ const floppy_image_format_t::desc_e dc42_format::mac_gcr[] = {
|
||||
{ SECTOR_LOOP_END },
|
||||
{ END },
|
||||
};
|
||||
|
||||
|
||||
|
||||
bool dc42_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
|
||||
{
|
||||
@ -1317,7 +1317,7 @@ UINT8 dc42_format::gb(const UINT8 *buf, int ts, int &pos, int &wrap)
|
||||
if(pos == ts) {
|
||||
pos = 0;
|
||||
wrap++;
|
||||
}
|
||||
}
|
||||
}
|
||||
return v;
|
||||
}
|
||||
@ -1397,8 +1397,8 @@ bool dc42_format::save(io_generic *io, floppy_image *image)
|
||||
UINT8 tr = gcr6bw_tb[h[0]] | (v2 & 1 ? 0x40 : 0x00);
|
||||
UINT8 se = gcr6bw_tb[h[1]];
|
||||
UINT8 si = v2 & 0x20 ? 1 : 0;
|
||||
// UINT8 ds = v3 & 0x20 ? 1 : 0;
|
||||
// UINT8 fmt = v3 & 0x1f;
|
||||
// UINT8 ds = v3 & 0x20 ? 1 : 0;
|
||||
// UINT8 fmt = v3 & 0x1f;
|
||||
UINT8 c1 = (tr^se^v2^v3) & 0x3f;
|
||||
UINT8 chk = gcr6bw_tb[h[4]];
|
||||
if(chk == c1 && tr == track && si == head && se < nsect) {
|
||||
|
@ -59,7 +59,7 @@ const UINT32 BITMAP_ROWBYTES_ALIGN = 128;
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// compute_rowpixels - compute an aligned
|
||||
// compute_rowpixels - compute an aligned
|
||||
// rowpixels value
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -161,7 +161,7 @@ void bitmap_t::allocate(int width, int height, int xslop, int yslop)
|
||||
|
||||
// delete any existing stuff
|
||||
reset();
|
||||
|
||||
|
||||
// handle empty requests cleanly
|
||||
if (width <= 0 || height <= 0)
|
||||
return;
|
||||
@ -204,7 +204,7 @@ void bitmap_t::resize(int width, int height, int xslop, int yslop)
|
||||
int new_rowpixels = compute_rowpixels(width, xslop);
|
||||
UINT32 new_allocbytes = new_rowpixels * (height + 2 * yslop) * m_bpp / 8;
|
||||
new_allocbytes += BITMAP_OVERALL_ALIGN - 1;
|
||||
|
||||
|
||||
// if we need more memory, just realloc
|
||||
if (new_allocbytes > m_allocbytes)
|
||||
{
|
||||
@ -213,7 +213,7 @@ void bitmap_t::resize(int width, int height, int xslop, int yslop)
|
||||
set_palette(palette);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
// otherwise, reconfigure
|
||||
m_rowpixels = new_rowpixels;
|
||||
m_width = width;
|
||||
@ -247,7 +247,7 @@ void bitmap_t::reset()
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// wrap -- wrap an array of memory; the target
|
||||
// wrap -- wrap an array of memory; the target
|
||||
// bitmap does not own the memory
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -255,7 +255,7 @@ void bitmap_t::wrap(void *base, int width, int height, int rowpixels)
|
||||
{
|
||||
// delete any existing stuff
|
||||
reset();
|
||||
|
||||
|
||||
// initialize relevant fields
|
||||
m_base = base;
|
||||
m_rowpixels = rowpixels;
|
||||
@ -266,8 +266,8 @@ void bitmap_t::wrap(void *base, int width, int height, int rowpixels)
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// wrap -- wrap a subrectangle of an existing
|
||||
// bitmap by copying its fields; the target
|
||||
// wrap -- wrap a subrectangle of an existing
|
||||
// bitmap by copying its fields; the target
|
||||
// bitmap does not own the memory
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -279,7 +279,7 @@ void bitmap_t::wrap(bitmap_t &source, const rectangle &subrect)
|
||||
|
||||
// delete any existing stuff
|
||||
reset();
|
||||
|
||||
|
||||
// copy relevant fields
|
||||
m_base = source.raw_pixptr(subrect.min_y, subrect.min_x);
|
||||
m_rowpixels = source.m_rowpixels;
|
||||
|
@ -211,7 +211,7 @@ protected:
|
||||
public:
|
||||
// getters
|
||||
UINT8 bpp() const { return 8; }
|
||||
|
||||
|
||||
// pixel accessors
|
||||
typedef UINT8 pixel_t;
|
||||
pixel_t &pix(INT32 y, INT32 x = 0) const { return pixt<pixel_t>(y, x); }
|
||||
@ -234,7 +234,7 @@ protected:
|
||||
public:
|
||||
// getters
|
||||
UINT8 bpp() const { return 16; }
|
||||
|
||||
|
||||
// pixel accessors
|
||||
typedef UINT16 pixel_t;
|
||||
pixel_t &pix(INT32 y, INT32 x = 0) const { return pixt<pixel_t>(y, x); }
|
||||
@ -257,7 +257,7 @@ protected:
|
||||
public:
|
||||
// getters
|
||||
UINT8 bpp() const { return 32; }
|
||||
|
||||
|
||||
// pixel accessors
|
||||
typedef UINT32 pixel_t;
|
||||
pixel_t &pix(INT32 y, INT32 x = 0) const { return pixt<pixel_t>(y, x); }
|
||||
@ -280,7 +280,7 @@ protected:
|
||||
public:
|
||||
// getters
|
||||
UINT8 bpp() const { return 64; }
|
||||
|
||||
|
||||
// pixel accessors
|
||||
typedef UINT64 pixel_t;
|
||||
pixel_t &pix(INT32 y, INT32 x = 0) const { return pixt<pixel_t>(y, x); }
|
||||
@ -294,7 +294,7 @@ public:
|
||||
class bitmap_ind8 : public bitmap8_t
|
||||
{
|
||||
static const bitmap_format k_bitmap_format = BITMAP_FORMAT_IND8;
|
||||
|
||||
|
||||
public:
|
||||
// construction/destruction
|
||||
bitmap_ind8(int width = 0, int height = 0, int xslop = 0, int yslop = 0) : bitmap8_t(k_bitmap_format, width, height, xslop, yslop) { }
|
||||
|
@ -85,7 +85,7 @@ public:
|
||||
if (m_ldv1000 != NULL) return m_ldv1000->status_strobe_r();
|
||||
return CLEAR_LINE;
|
||||
}
|
||||
|
||||
|
||||
UINT8 laserdisc_ready_r()
|
||||
{
|
||||
if (m_ldv1000 != NULL) return m_ldv1000->command_strobe_r();
|
||||
@ -968,15 +968,15 @@ ROM_END
|
||||
|
||||
static DRIVER_INIT( fixed )
|
||||
{
|
||||
// dlair_state *state = machine.driver_data<dlair_state>();
|
||||
// state->m_laserdisc_type = LASERDISC_TYPE_FIXED;
|
||||
// dlair_state *state = machine.driver_data<dlair_state>();
|
||||
// state->m_laserdisc_type = LASERDISC_TYPE_FIXED;
|
||||
}
|
||||
|
||||
|
||||
static DRIVER_INIT( variable )
|
||||
{
|
||||
// dlair_state *state = machine.driver_data<dlair_state>();
|
||||
// state->m_laserdisc_type = LASERDISC_TYPE_VARIABLE;
|
||||
// dlair_state *state = machine.driver_data<dlair_state>();
|
||||
// state->m_laserdisc_type = LASERDISC_TYPE_VARIABLE;
|
||||
}
|
||||
|
||||
|
||||
|
@ -80,9 +80,9 @@ public:
|
||||
: driver_device(mconfig, type, tag) { }
|
||||
|
||||
virtual void video_start();
|
||||
|
||||
|
||||
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
|
||||
bitmap_ind16 m_bitmap;
|
||||
|
||||
UINT8 m_drawctrl[3];
|
||||
|
@ -3937,16 +3937,16 @@ ROM_START( tduno2 )
|
||||
NAOMI_DEFAULT_EEPROM
|
||||
|
||||
ROM_REGION( 0x4000000, "rom_board", ROMREGION_ERASEFF)
|
||||
ROM_LOAD( "epr-23071.ic11", 0x0000000, 0x0200000, CRC(1b58f24a) SHA1(90f91af31beff9399c8d72ae0087bf4d3122cac2) )
|
||||
ROM_LOAD32_WORD( "mpr-23063.ic17s", 0x1000000, 0x0800000, CRC(9678a759) SHA1(6f2602c6eef8db0d4a145d832aec3ea0e0491c0c) )
|
||||
ROM_LOAD32_WORD( "mpr-23064.ic18", 0x1000002, 0x0800000, CRC(e159c44d) SHA1(fd0dcd74f7e214c7c9214bb04167f7c3acea30cf) )
|
||||
ROM_LOAD32_WORD( "mpr-23065.ic19s", 0x2000000, 0x0800000, CRC(10eff527) SHA1(c208529b0825ba45dc474c6aaa4b4c5557335c10) )
|
||||
ROM_LOAD32_WORD( "mpr-23066.ic20", 0x2000002, 0x0800000, CRC(4f9c1710) SHA1(7834bab5933a156656756f837c217e7820f2ae63) )
|
||||
ROM_LOAD32_WORD( "mpr-23067.ic21s", 0x3000000, 0x0800000, CRC(32724cd9) SHA1(7bfdd58dd5e69529125a720f51c53ebe526ef2e9) )
|
||||
ROM_LOAD32_WORD( "mpr-23068.ic22", 0x3000002, 0x0800000, CRC(2ce3e0ea) SHA1(805ec80273856ec6e5ee04fdca5fd1407c404f8e) )
|
||||
ROM_LOAD( "epr-23071.ic11", 0x0000000, 0x0200000, CRC(1b58f24a) SHA1(90f91af31beff9399c8d72ae0087bf4d3122cac2) )
|
||||
ROM_LOAD32_WORD( "mpr-23063.ic17s", 0x1000000, 0x0800000, CRC(9678a759) SHA1(6f2602c6eef8db0d4a145d832aec3ea0e0491c0c) )
|
||||
ROM_LOAD32_WORD( "mpr-23064.ic18", 0x1000002, 0x0800000, CRC(e159c44d) SHA1(fd0dcd74f7e214c7c9214bb04167f7c3acea30cf) )
|
||||
ROM_LOAD32_WORD( "mpr-23065.ic19s", 0x2000000, 0x0800000, CRC(10eff527) SHA1(c208529b0825ba45dc474c6aaa4b4c5557335c10) )
|
||||
ROM_LOAD32_WORD( "mpr-23066.ic20", 0x2000002, 0x0800000, CRC(4f9c1710) SHA1(7834bab5933a156656756f837c217e7820f2ae63) )
|
||||
ROM_LOAD32_WORD( "mpr-23067.ic21s", 0x3000000, 0x0800000, CRC(32724cd9) SHA1(7bfdd58dd5e69529125a720f51c53ebe526ef2e9) )
|
||||
ROM_LOAD32_WORD( "mpr-23068.ic22", 0x3000002, 0x0800000, CRC(2ce3e0ea) SHA1(805ec80273856ec6e5ee04fdca5fd1407c404f8e) )
|
||||
|
||||
ROM_REGION( 4, "rom_key", 0 )
|
||||
ROM_LOAD( "tduno2.key", 0x000000, 0x000004, CRC(8e0f0f3b) SHA1(914d3db8746c806d559539cc0851169161d32c04) )
|
||||
ROM_LOAD( "tduno2.key", 0x000000, 0x000004, CRC(8e0f0f3b) SHA1(914d3db8746c806d559539cc0851169161d32c04) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( crackndj )
|
||||
@ -5450,26 +5450,26 @@ ROM_START( toukon4 )
|
||||
NAOMI_DEFAULT_EEPROM
|
||||
|
||||
ROM_REGION( 0x10000000, "rom_board", ROMREGION_ERASEFF)
|
||||
ROM_LOAD( "trf1_fl0.2f", 0x0000000, 0x0800000, CRC(862e673d) SHA1(f2c90932ba4abe31d02e86f80ef3e2689342c384) )
|
||||
ROM_LOAD( "trf1_fl1.2d", 0x0800000, 0x0800000, CRC(59a935c9) SHA1(7298d83a27eac74bad18d716a791ab2016fe028f) )
|
||||
ROM_LOAD( "trf1_ma1.4n", 0x1000000, 0x1000000, CRC(b1b3ab96) SHA1(3dc4bcf796583a0fb51359a86a46d7883df54fad) )
|
||||
ROM_LOAD( "trf1_ma2.4m", 0x2000000, 0x1000000, CRC(a27d3dda) SHA1(b9ec4be5845cbe91fd7bc537669e96716513a5f0) )
|
||||
ROM_LOAD( "trf1_ma3.4l", 0x3000000, 0x1000000, CRC(345ec434) SHA1(986d9930e7de46b88936c898ba8b05d950262a1f) )
|
||||
ROM_LOAD( "trf1_ma4.4k", 0x4000000, 0x1000000, CRC(fc47a104) SHA1(07ced58c1b17719ac36db1589771e67ce16d912e) )
|
||||
ROM_LOAD( "trf1_ma5.4j", 0x5000000, 0x1000000, CRC(e1bb077d) SHA1(6b70d8103bf067319e9022742fc1dd843d7e5076) )
|
||||
ROM_LOAD( "trf1_ma6.4h", 0x6000000, 0x1000000, CRC(abae4d06) SHA1(56da2ca3551287942afabf37e7fd1b884bd3cac8) )
|
||||
ROM_LOAD( "trf1_ma7.4f", 0x7000000, 0x1000000, CRC(19d0092a) SHA1(2ae2dbf2f3958da9f69b3a8636c6837e4243bb67) )
|
||||
ROM_LOAD( "trf1_ma8.4e", 0x8000000, 0x1000000, CRC(6fbf34ab) SHA1(f4747d1a1c02e22502e68d72a4f0c152fa69d778) )
|
||||
ROM_LOAD( "trf1_ma9.4d", 0x9000000, 0x1000000, CRC(2fa36c5d) SHA1(6478687c91484141521ae79a997cecbcfbb7beae) )
|
||||
ROM_LOAD( "trf1_ma10.4c", 0xa000000, 0x1000000, CRC(bc866a37) SHA1(d4d12f285a3bc9136cf3fc2a59dba5ad557cc7d7) )
|
||||
ROM_LOAD( "trf1_ma11.4b", 0xb000000, 0x1000000, CRC(68d11482) SHA1(fe991ba5664d6ccf0aac5167f05c5a780f851ae9) )
|
||||
ROM_LOAD( "trf1_ma12.6p", 0xc000000, 0x1000000, CRC(a7c3bd3c) SHA1(ed5a24e4c47f686120577dae4550fb9378209cf8) )
|
||||
ROM_LOAD( "trf1_ma13.6n", 0xd000000, 0x1000000, CRC(e52d41fe) SHA1(e1769d42d6048f9621ca289af3ddeca7c14cee00) )
|
||||
ROM_LOAD( "trf1_ma14.6m", 0xe000000, 0x1000000, CRC(87cb31a0) SHA1(27aef9ac571a0b5e3a76e4ee22f5bc5d0ae962f2) )
|
||||
ROM_LOAD( "trf1_ma15.6l", 0xf000000, 0x1000000, CRC(42d318c5) SHA1(f9fe82ffbfc51fcb52333f94c55a7092e7124fb4) )
|
||||
ROM_LOAD( "trf1_fl0.2f", 0x0000000, 0x0800000, CRC(862e673d) SHA1(f2c90932ba4abe31d02e86f80ef3e2689342c384) )
|
||||
ROM_LOAD( "trf1_fl1.2d", 0x0800000, 0x0800000, CRC(59a935c9) SHA1(7298d83a27eac74bad18d716a791ab2016fe028f) )
|
||||
ROM_LOAD( "trf1_ma1.4n", 0x1000000, 0x1000000, CRC(b1b3ab96) SHA1(3dc4bcf796583a0fb51359a86a46d7883df54fad) )
|
||||
ROM_LOAD( "trf1_ma2.4m", 0x2000000, 0x1000000, CRC(a27d3dda) SHA1(b9ec4be5845cbe91fd7bc537669e96716513a5f0) )
|
||||
ROM_LOAD( "trf1_ma3.4l", 0x3000000, 0x1000000, CRC(345ec434) SHA1(986d9930e7de46b88936c898ba8b05d950262a1f) )
|
||||
ROM_LOAD( "trf1_ma4.4k", 0x4000000, 0x1000000, CRC(fc47a104) SHA1(07ced58c1b17719ac36db1589771e67ce16d912e) )
|
||||
ROM_LOAD( "trf1_ma5.4j", 0x5000000, 0x1000000, CRC(e1bb077d) SHA1(6b70d8103bf067319e9022742fc1dd843d7e5076) )
|
||||
ROM_LOAD( "trf1_ma6.4h", 0x6000000, 0x1000000, CRC(abae4d06) SHA1(56da2ca3551287942afabf37e7fd1b884bd3cac8) )
|
||||
ROM_LOAD( "trf1_ma7.4f", 0x7000000, 0x1000000, CRC(19d0092a) SHA1(2ae2dbf2f3958da9f69b3a8636c6837e4243bb67) )
|
||||
ROM_LOAD( "trf1_ma8.4e", 0x8000000, 0x1000000, CRC(6fbf34ab) SHA1(f4747d1a1c02e22502e68d72a4f0c152fa69d778) )
|
||||
ROM_LOAD( "trf1_ma9.4d", 0x9000000, 0x1000000, CRC(2fa36c5d) SHA1(6478687c91484141521ae79a997cecbcfbb7beae) )
|
||||
ROM_LOAD( "trf1_ma10.4c", 0xa000000, 0x1000000, CRC(bc866a37) SHA1(d4d12f285a3bc9136cf3fc2a59dba5ad557cc7d7) )
|
||||
ROM_LOAD( "trf1_ma11.4b", 0xb000000, 0x1000000, CRC(68d11482) SHA1(fe991ba5664d6ccf0aac5167f05c5a780f851ae9) )
|
||||
ROM_LOAD( "trf1_ma12.6p", 0xc000000, 0x1000000, CRC(a7c3bd3c) SHA1(ed5a24e4c47f686120577dae4550fb9378209cf8) )
|
||||
ROM_LOAD( "trf1_ma13.6n", 0xd000000, 0x1000000, CRC(e52d41fe) SHA1(e1769d42d6048f9621ca289af3ddeca7c14cee00) )
|
||||
ROM_LOAD( "trf1_ma14.6m", 0xe000000, 0x1000000, CRC(87cb31a0) SHA1(27aef9ac571a0b5e3a76e4ee22f5bc5d0ae962f2) )
|
||||
ROM_LOAD( "trf1_ma15.6l", 0xf000000, 0x1000000, CRC(42d318c5) SHA1(f9fe82ffbfc51fcb52333f94c55a7092e7124fb4) )
|
||||
|
||||
ROM_REGION( 4, "rom_key", 0 )
|
||||
ROM_LOAD( "tr4ae-key.bin", 0x000000, 0x000004, CRC(986a7cee) SHA1(70c3ff80f86de6a0655251658c66a156fb644995) )
|
||||
ROM_LOAD( "tr4ae-key.bin", 0x000000, 0x000004, CRC(986a7cee) SHA1(70c3ff80f86de6a0655251658c66a156fb644995) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( vtenis2c )
|
||||
@ -7716,7 +7716,7 @@ ROM_END
|
||||
/* 0020 */ GAME( 1999, samba, naomi, naomim2, naomi, naomi, ROT0, "Sega", "Samba De Amigo (JPN) (Rev B)", GAME_UNEMULATED_PROTECTION|GAME_FLAGS )
|
||||
/* 0021 */ GAME( 2000, virnbao, virnba, naomim2, naomi, naomi, ROT0, "Sega", "Virtua NBA (JPN, USA, EXP, KOR, AUS) (original)", GAME_FLAGS )
|
||||
/* 0021-01 */ GAME( 2000,virnba, naomi, naomi, naomi, naomi, ROT0, "Sega", "Virtua NBA (JPN, USA, EXP, KOR, AUS)", GAME_FLAGS )
|
||||
/* 0022 */ GAME( 2000, tduno2, naomi, naomim2, naomi, naomi, ROT0, "Sega", "Touch de Uno! 2", GAME_UNEMULATED_PROTECTION|GAME_FLAGS )
|
||||
/* 0022 */ GAME( 2000, tduno2, naomi, naomim2, naomi, naomi, ROT0, "Sega", "Touch de Uno! 2", GAME_UNEMULATED_PROTECTION|GAME_FLAGS )
|
||||
/* 0023 */ GAME( 2000, 18wheelr, naomi, naomim2, 18wheelr, naomi, ROT0, "Sega", "18 Wheeler Deluxe (Rev A) (JPN)", GAME_FLAGS )
|
||||
/* 0023 */ GAME( 2000, 18wheels, 18wheelr, naomim2, 18wheelr, naomi, ROT0, "Sega", "18 Wheeler (Rev A) (JPN)", GAME_FLAGS )
|
||||
// 0025 Mars TV
|
||||
@ -7798,7 +7798,7 @@ ROM_END
|
||||
|
||||
/* Cart games on Namco custom ROM board */
|
||||
/* 25209801 */ GAME( 2000, wldkicks, naomi, naomim2, naomi, naomi, ROT0, "Capcom / Namco", "World Kicks", GAME_UNEMULATED_PROTECTION|GAME_FLAGS )
|
||||
/* 25349801 */ GAME( 2000, toukon4, naomi, naomim2, naomi, naomi, ROT0, "Capcom / Namco", "Shin Nihon Pro Wrestling Toukon Retsuden 4 Arcade Edition", GAME_UNEMULATED_PROTECTION|GAME_FLAGS )
|
||||
/* 25349801 */ GAME( 2000, toukon4, naomi, naomim2, naomi, naomi, ROT0, "Capcom / Namco", "Shin Nihon Pro Wrestling Toukon Retsuden 4 Arcade Edition", GAME_UNEMULATED_PROTECTION|GAME_FLAGS )
|
||||
// 25469801 Ninja Assault
|
||||
/* 25709801 */ GAME( 2001, gunsur2, naomi, naomi, naomi, naomi, ROT0, "Capcom / Namco", "Gun Survivor 2 Biohazard Code: Veronica", GAME_UNEMULATED_PROTECTION|GAME_FLAGS )
|
||||
// 25869812 Mazan : Flash of the Blade
|
||||
|
@ -4432,7 +4432,7 @@ static DRIVER_INIT( kov )
|
||||
static DRIVER_INIT( kovboot )
|
||||
{
|
||||
pgm_basic_init(machine);
|
||||
// pgm_kov_decrypt(machine);
|
||||
// pgm_kov_decrypt(machine);
|
||||
kovsh_latch_init(machine);
|
||||
install_protection_asic_sim_kov(machine);
|
||||
}
|
||||
|
@ -116,7 +116,7 @@ static MACHINE_CONFIG_START( pgm2, pgm2_state )
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", ARM7, 20000000) // ?? unknown CPU, has internal ROM.
|
||||
MCFG_CPU_PROGRAM_MAP(pgm2_map)
|
||||
// MCFG_DEVICE_DISABLE()
|
||||
// MCFG_DEVICE_DISABLE()
|
||||
|
||||
MCFG_MACHINE_START( pgm2 )
|
||||
MCFG_MACHINE_RESET( pgm2 )
|
||||
@ -152,7 +152,7 @@ ROM_START( orleg2 )
|
||||
ROM_REGION( 0x1000000, "bgtile", 0 )
|
||||
ROM_LOAD16_BYTE( "ig-a.u35", 0x000000, 0x0800000, CRC(083a8315) SHA1(0dba25e132fbb12faa59ced648c27b881dc73478) )
|
||||
ROM_LOAD16_BYTE( "ig-a.u36", 0x000001, 0x0800000, CRC(e197221d) SHA1(5574b1e3da4b202db725be906dd868edc2fd4634) )
|
||||
|
||||
|
||||
ROM_REGION( 0x2000000, "spritesa", 0 ) // 1bpp sprite mask data
|
||||
ROM_LOAD32_WORD( "ig-a.u12", 0x000000, 0x1000000, CRC(113a331c) SHA1(ee6b31bb2b052cc8799573de0d2f0a83f0ab4f6a) )
|
||||
ROM_LOAD32_WORD( "ig-a.u16", 0x000002, 0x1000000, CRC(fbf411c8) SHA1(5089b5cc9bbf6496ef1367c6255e63e9ab895117) )
|
||||
@ -175,7 +175,7 @@ ROM_START( orleg2o )
|
||||
ROM_REGION( 0x1000000, "bgtile", 0 )
|
||||
ROM_LOAD16_BYTE( "ig-a.u35", 0x000000, 0x0800000, CRC(083a8315) SHA1(0dba25e132fbb12faa59ced648c27b881dc73478) )
|
||||
ROM_LOAD16_BYTE( "ig-a.u36", 0x000001, 0x0800000, CRC(e197221d) SHA1(5574b1e3da4b202db725be906dd868edc2fd4634) )
|
||||
|
||||
|
||||
ROM_REGION( 0x2000000, "spritesa", 0 ) // 1bpp sprite mask data
|
||||
ROM_LOAD32_WORD( "ig-a.u12", 0x000000, 0x1000000, CRC(113a331c) SHA1(ee6b31bb2b052cc8799573de0d2f0a83f0ab4f6a) )
|
||||
ROM_LOAD32_WORD( "ig-a.u16", 0x000002, 0x1000000, CRC(fbf411c8) SHA1(5089b5cc9bbf6496ef1367c6255e63e9ab895117) )
|
||||
@ -198,7 +198,7 @@ ROM_START( kov2nl )
|
||||
ROM_REGION( 0x1000000, "bgtile", 0 )
|
||||
ROM_LOAD16_BYTE( "ig-a3.u35", 0x000000, 0x0800000, CRC(2d46b1f6) SHA1(ea8c805eda6292e86a642e9633d8fee7054d10b1) )
|
||||
ROM_LOAD16_BYTE( "ig-a3.u36", 0x000001, 0x0800000, CRC(df710c36) SHA1(f826c3f496c4f17b46d18af1d8e02cac7b7027ac) )
|
||||
|
||||
|
||||
ROM_REGION( 0x2000000, "spritesa", 0 ) // 1bpp sprite mask data
|
||||
ROM_LOAD32_WORD( "ig-a3.u12", 0x000000, 0x1000000, CRC(0bf63836) SHA1(b8e4f1951f8074b475b795bd7840c5a375b6f5ef) )
|
||||
ROM_LOAD32_WORD( "ig-a3.u16", 0x000002, 0x1000000, CRC(4a378542) SHA1(5d06a8a8796285a786ebb690c34610f923ef5570) )
|
||||
@ -221,7 +221,7 @@ ROM_START( kov2nlo )
|
||||
ROM_REGION( 0x1000000, "bgtile", 0 )
|
||||
ROM_LOAD16_BYTE( "ig-a3.u35", 0x000000, 0x0800000, CRC(2d46b1f6) SHA1(ea8c805eda6292e86a642e9633d8fee7054d10b1) )
|
||||
ROM_LOAD16_BYTE( "ig-a3.u36", 0x000001, 0x0800000, CRC(df710c36) SHA1(f826c3f496c4f17b46d18af1d8e02cac7b7027ac) )
|
||||
|
||||
|
||||
ROM_REGION( 0x2000000, "spritesa", 0 ) // 1bpp sprite mask data
|
||||
ROM_LOAD32_WORD( "ig-a3.u12", 0x000000, 0x1000000, CRC(0bf63836) SHA1(b8e4f1951f8074b475b795bd7840c5a375b6f5ef) )
|
||||
ROM_LOAD32_WORD( "ig-a3.u16", 0x000002, 0x1000000, CRC(4a378542) SHA1(5d06a8a8796285a786ebb690c34610f923ef5570) )
|
||||
@ -240,7 +240,7 @@ static void iga_u16_decode(UINT16 *rom, int len, int ixor)
|
||||
|
||||
for (i = 1; i < len / 2; i+=2)
|
||||
{
|
||||
UINT16 x = ixor;
|
||||
UINT16 x = ixor;
|
||||
|
||||
if ( (i>>1) & 0x000001) x ^= 0x0010;
|
||||
if ( (i>>1) & 0x000002) x ^= 0x2004;
|
||||
@ -265,7 +265,7 @@ static void iga_u12_decode(UINT16* rom, int len, int ixor)
|
||||
|
||||
for (i = 0; i < len / 2; i+=2)
|
||||
{
|
||||
UINT16 x = ixor;
|
||||
UINT16 x = ixor;
|
||||
|
||||
if ( (i>>1) & 0x000001) x ^= 0x9004;
|
||||
if ( (i>>1) & 0x000002) x ^= 0x0028;
|
||||
|
@ -77,7 +77,7 @@ protected:
|
||||
|
||||
|
||||
// driver_device overrides
|
||||
// virtual void video_start();
|
||||
// virtual void video_start();
|
||||
};
|
||||
|
||||
// Intel 82439TX System Controller (MXTC)
|
||||
|
@ -387,7 +387,7 @@ static WRITE8_HANDLER( laserdsc_control_w )
|
||||
|
||||
if (BIT(data, 5))
|
||||
{
|
||||
if (state->m_ldv1000 != NULL)
|
||||
if (state->m_ldv1000 != NULL)
|
||||
{
|
||||
state->m_ldv1000->data_w(state->m_laserdisc_data);
|
||||
state->m_ldv1000->enter_w(BIT(data, 7) ? CLEAR_LINE : ASSERT_LINE);
|
||||
@ -760,8 +760,8 @@ static MACHINE_RESET( thayers )
|
||||
state->m_cart_present = 0;
|
||||
state->m_pr7820_enter = 0;
|
||||
|
||||
// newtype = (input_port_read(machine, "DSWB") & 0x18) ? LASERDISC_TYPE_PIONEER_LDV1000 : LASERDISC_TYPE_PIONEER_PR7820;
|
||||
// laserdisc_set_type(state->m_laserdisc, newtype);
|
||||
// newtype = (input_port_read(machine, "DSWB") & 0x18) ? LASERDISC_TYPE_PIONEER_LDV1000 : LASERDISC_TYPE_PIONEER_PR7820;
|
||||
// laserdisc_set_type(state->m_laserdisc, newtype);
|
||||
}
|
||||
|
||||
/* COP400 Interface */
|
||||
|
@ -36,7 +36,7 @@ public:
|
||||
tonton_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_v9938(*this, "v9938") { }
|
||||
|
||||
|
||||
required_device<v9938_device> m_v9938;
|
||||
};
|
||||
|
||||
|
@ -1954,7 +1954,7 @@ static READ16_HANDLER( mrdig_speedup_r )
|
||||
static READ16_HANDLER( toyland_speedup_r )
|
||||
{
|
||||
vamphalf_state *state = space->machine().driver_data<vamphalf_state>();
|
||||
|
||||
|
||||
if (cpu_get_pc(&space->device()) == 0x130c2)
|
||||
device_spin_until_interrupt(&space->device());
|
||||
|
||||
|
@ -20,7 +20,7 @@ public:
|
||||
virtual void machine_reset();
|
||||
|
||||
virtual void video_start();
|
||||
|
||||
|
||||
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
required_device<asap_device> m_maincpu;
|
||||
|
@ -118,7 +118,7 @@ public:
|
||||
legacy_cpu_device* m_maincpu;
|
||||
legacy_cpu_device* m_slave;
|
||||
legacy_cpu_device* m_audiocpu;
|
||||
|
||||
|
||||
bitmap_rgb32 m_tmpbitmap;
|
||||
};
|
||||
|
||||
|
@ -9412,7 +9412,7 @@ SCREEN_VBLANK(megadriv)
|
||||
megadrive_sprite_collision=0;//? when to reset this ..
|
||||
megadrive_imode = MEGADRIVE_REG0C_INTERLEAVE; // can't change mid-frame..
|
||||
megadrive_imode_odd_frame^=1;
|
||||
// cputag_set_input_line(machine, "genesis_snd_z80", 0, CLEAR_LINE); // if the z80 interrupt hasn't happened by now, clear it..
|
||||
// cputag_set_input_line(machine, "genesis_snd_z80", 0, CLEAR_LINE); // if the z80 interrupt hasn't happened by now, clear it..
|
||||
|
||||
if (input_port_read_safe(screen.machine(), "RESET", 0x00) & 0x01)
|
||||
cputag_set_input_line(screen.machine(), "maincpu", INPUT_LINE_RESET, PULSE_LINE);
|
||||
@ -9481,7 +9481,7 @@ int megadrive_z80irq_hpos = 320;
|
||||
case 2:scr_width = 320;break;// configure_screen(0, 320-1, megadrive_visible_scanlines-1,(double)megadriv_framerate); break; /* technically invalid, but used in rare cases */
|
||||
case 3:scr_width = 320;break;// configure_screen(0, 320-1, megadrive_visible_scanlines-1,(double)megadriv_framerate); break;
|
||||
}
|
||||
// mame_printf_debug("my mode %02x", megadrive_vdp_register[0x0c]);
|
||||
// mame_printf_debug("my mode %02x", megadrive_vdp_register[0x0c]);
|
||||
|
||||
visarea.min_x = 0;
|
||||
visarea.max_x = scr_width-1;
|
||||
@ -9493,10 +9493,10 @@ int megadrive_z80irq_hpos = 320;
|
||||
if (0)
|
||||
{
|
||||
//int xxx;
|
||||
// UINT64 frametime;
|
||||
// UINT64 frametime;
|
||||
|
||||
// /* reference */
|
||||
// frametime = ATTOSECONDS_PER_SECOND/megadriv_framerate;
|
||||
// frametime = ATTOSECONDS_PER_SECOND/megadriv_framerate;
|
||||
|
||||
//time_elapsed_since_crap = frame_timer->time_elapsed();
|
||||
//xxx = screen.machine().device<cpudevice>("maincpu")->attotime_to_cycles(time_elapsed_since_crap);
|
||||
|
@ -378,7 +378,7 @@ WRITE32_MEMBER( n64_periphs::open_w )
|
||||
|
||||
// RDRAM Interface (RI)
|
||||
|
||||
#define RDRAM_CONFIG (0)
|
||||
#define RDRAM_CONFIG (0)
|
||||
#define RDRAM_DEVICE_ID (1)
|
||||
#define RDRAM_DELAY (2)
|
||||
#define RDRAM_MODE (3)
|
||||
@ -1336,9 +1336,9 @@ WRITE32_MEMBER( n64_periphs::pi_reg_w )
|
||||
pi_dma_dir = 0;
|
||||
pi_status |= 1;
|
||||
|
||||
attotime dma_period = attotime::from_hz(93750000) * (pi_rd_len + 1) * 3;
|
||||
//printf("want read dma in %d\n", (pi_rd_len + 1));
|
||||
pi_dma_timer->adjust(dma_period);
|
||||
attotime dma_period = attotime::from_hz(93750000) * (pi_rd_len + 1) * 3;
|
||||
//printf("want read dma in %d\n", (pi_rd_len + 1));
|
||||
pi_dma_timer->adjust(dma_period);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1348,9 +1348,9 @@ WRITE32_MEMBER( n64_periphs::pi_reg_w )
|
||||
pi_dma_dir = 1;
|
||||
pi_status |= 1;
|
||||
|
||||
attotime dma_period = attotime::from_hz(93750000) * (pi_wr_len + 1) * 3;
|
||||
//printf("want write dma in %d\n", (pi_wr_len + 1));
|
||||
pi_dma_timer->adjust(dma_period);
|
||||
attotime dma_period = attotime::from_hz(93750000) * (pi_wr_len + 1) * 3;
|
||||
//printf("want write dma in %d\n", (pi_wr_len + 1));
|
||||
pi_dma_timer->adjust(dma_period);
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -1163,7 +1163,7 @@ WRITE16_HANDLER( kov_asic_sim_w )
|
||||
|
||||
kov_value ^= kov_key;
|
||||
|
||||
// bprintf (PRINT_NORMAL, _T("ASIC27 command: %2.2x data: %4.4x\n"), (data ^ kov_key) & 0xff, kov_value);
|
||||
// bprintf (PRINT_NORMAL, _T("ASIC27 command: %2.2x data: %4.4x\n"), (data ^ kov_key) & 0xff, kov_value);
|
||||
|
||||
switch ((data ^ kov_key) & 0xff)
|
||||
{
|
||||
@ -1282,7 +1282,7 @@ WRITE16_HANDLER( kov_asic_sim_w )
|
||||
|
||||
default:
|
||||
kov_response = 0x880000;
|
||||
// bprintf (PRINT_NORMAL, _T("Unknown ASIC27 command: %2.2x data: %4.4x\n"), (data ^ kov_key) & 0xff, kov_value);
|
||||
// bprintf (PRINT_NORMAL, _T("Unknown ASIC27 command: %2.2x data: %4.4x\n"), (data ^ kov_key) & 0xff, kov_value);
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -4813,7 +4813,7 @@ mvsc2 // 2000.03 Marvel Vs. Capcom 2 New Age of Heroes (Rev A)
|
||||
smarinef // 2000.03 Sega Marine Fishing
|
||||
wldkicks // 2000.03 World Kicks
|
||||
pstone2 // 2000.04 Power Stone 2
|
||||
toukon4 // 2000.04 Shin Nihon Prowrestling Toukon Retsuden 4 Arcade Edition
|
||||
toukon4 // 2000.04 Shin Nihon Prowrestling Toukon Retsuden 4 Arcade Edition
|
||||
qmegamis // 2000.05 Quiz Ah Megamisama
|
||||
derbyo2k // 2000.06 Derby Owners Club 2000 Ver.2 (Rev A)
|
||||
vonot // 2000.06 Virtual-on Oratorio Tangram M.S.B.S. ver.5.66 2000 Edition
|
||||
|
@ -712,7 +712,7 @@ VIDEO_START( atari )
|
||||
|
||||
LOG(("atari antic_vh_start\n"));
|
||||
memset(&antic, 0, sizeof(antic));
|
||||
|
||||
|
||||
antic.bitmap = auto_bitmap_ind16_alloc(machine, machine.primary_screen->width(), machine.primary_screen->height());
|
||||
|
||||
antic.renderer = antic_mode_0_xx;
|
||||
|
@ -501,10 +501,10 @@ SCREEN_VBLANK( mlc )
|
||||
{
|
||||
deco_mlc_state *state = screen.machine().driver_data<deco_mlc_state>();
|
||||
/* Spriteram is definitely double buffered, as the vram lookup tables
|
||||
are often updated a frame after spriteram is setup to point to a new
|
||||
lookup table. Without buffering incorrect one frame glitches are seen
|
||||
in several places, especially in Hoops.
|
||||
*/
|
||||
are often updated a frame after spriteram is setup to point to a new
|
||||
lookup table. Without buffering incorrect one frame glitches are seen
|
||||
in several places, especially in Hoops.
|
||||
*/
|
||||
memcpy(state->m_mlc_buffered_spriteram, state->m_spriteram, 0x3000);
|
||||
}
|
||||
}
|
||||
|
@ -314,8 +314,8 @@ SCREEN_VBLANK( lastduel )
|
||||
address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
|
||||
|
||||
/* Spriteram is always 1 frame ahead, suggesting buffering. I can't find
|
||||
a register to control this so I assume it happens automatically
|
||||
every frame at the end of vblank */
|
||||
a register to control this so I assume it happens automatically
|
||||
every frame at the end of vblank */
|
||||
buffer_spriteram16_w(space, 0, 0, 0xffff);
|
||||
}
|
||||
}
|
||||
|
@ -71,7 +71,7 @@ VIDEO_START( magmax )
|
||||
state_save_register_global(machine, state->m_flipscreen);
|
||||
|
||||
state->m_prom_tab = auto_alloc_array(machine, UINT32, 256);
|
||||
|
||||
|
||||
machine.primary_screen->register_screen_bitmap(state->m_bitmap);
|
||||
|
||||
/* Allocate temporary bitmap */
|
||||
|
@ -798,10 +798,10 @@ SCREEN_VBLANK( nmk )
|
||||
{
|
||||
nmk16_state *state = screen.machine().driver_data<nmk16_state>();
|
||||
/* sprites are DMA'd from Main RAM to a private buffer automatically
|
||||
(or at least this is how I interpret the datasheet) */
|
||||
(or at least this is how I interpret the datasheet) */
|
||||
|
||||
/* -- I actually see little evidence to support this, sprite lag
|
||||
in some games should be checked on real boards */
|
||||
in some games should be checked on real boards */
|
||||
|
||||
// memcpy(state->m_spriteram_old2,state->m_spriteram_old,0x1000);
|
||||
memcpy(state->m_spriteram_old2,state->m_mainram+0x8000/2,0x1000);
|
||||
@ -815,10 +815,10 @@ SCREEN_VBLANK( strahl )
|
||||
{
|
||||
nmk16_state *state = screen.machine().driver_data<nmk16_state>();
|
||||
/* sprites are DMA'd from Main RAM to a private buffer automatically
|
||||
(or at least this is how I interpret the datasheet) */
|
||||
(or at least this is how I interpret the datasheet) */
|
||||
|
||||
/* -- I actually see little evidence to support this, sprite lag
|
||||
in some games should be checked on real boards */
|
||||
in some games should be checked on real boards */
|
||||
|
||||
/* strahl sprites are allocated in memory range FF000-FFFFF */
|
||||
|
||||
|
@ -31,8 +31,8 @@ INLINE void pgm_draw_pix( int xdrawpos, int pri, UINT16* dest, UINT8* destpri, U
|
||||
{
|
||||
if (!(destpri[xdrawpos]&2))
|
||||
{
|
||||
dest[xdrawpos] = srcdat;
|
||||
}
|
||||
dest[xdrawpos] = srcdat;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -60,8 +60,8 @@ INLINE void pgm_draw_pix_pri( int xdrawpos, UINT16* dest, UINT8* destpri, UINT16
|
||||
{
|
||||
if (!(destpri[xdrawpos]&2))
|
||||
{
|
||||
dest[xdrawpos] = srcdat;
|
||||
}
|
||||
dest[xdrawpos] = srcdat;
|
||||
}
|
||||
}
|
||||
destpri[xdrawpos]|=1;
|
||||
}
|
||||
@ -114,7 +114,7 @@ static void draw_sprite_line( running_machine &machine, int wide, UINT16* dest,
|
||||
xdrawpos = xpos + xcntdraw;
|
||||
else
|
||||
xdrawpos = xpos + realxsize - xcntdraw;
|
||||
|
||||
|
||||
pgm_draw_pix(xdrawpos, pri, dest, destpri, srcdat);
|
||||
|
||||
xcntdraw++;
|
||||
@ -125,7 +125,7 @@ static void draw_sprite_line( running_machine &machine, int wide, UINT16* dest,
|
||||
xdrawpos = xpos + realxsize - xcntdraw;
|
||||
|
||||
pgm_draw_pix(xdrawpos, pri, dest, destpri, srcdat);
|
||||
|
||||
|
||||
xcntdraw++;
|
||||
}
|
||||
else if (xzoombit == 1 && xgrow == 0)
|
||||
@ -140,7 +140,7 @@ static void draw_sprite_line( running_machine &machine, int wide, UINT16* dest,
|
||||
xdrawpos = xpos + realxsize - xcntdraw;
|
||||
|
||||
pgm_draw_pix(xdrawpos, pri, dest, destpri, srcdat);
|
||||
|
||||
|
||||
xcntdraw++;
|
||||
}
|
||||
}
|
||||
@ -184,8 +184,8 @@ static void draw_sprite_new_zoomed( pgm_state *state, running_machine &machine,
|
||||
|
||||
/* precalculate where drawing will end, for flipped zoomed cases. */
|
||||
/* if we're to avoid pre-decoding the data for each sprite each time we draw then we have to draw the sprite data
|
||||
in the order it is in ROM due to the nature of the compresson scheme. This means drawing upwards from the end point
|
||||
in the case of flipped sprites */
|
||||
in the order it is in ROM due to the nature of the compresson scheme. This means drawing upwards from the end point
|
||||
in the case of flipped sprites */
|
||||
ycnt = 0;
|
||||
ycntdraw = 0;
|
||||
int realysize = 0;
|
||||
@ -227,7 +227,7 @@ static void draw_sprite_new_zoomed( pgm_state *state, running_machine &machine,
|
||||
{
|
||||
int temp_aoffset = state->m_aoffset;
|
||||
int temp_boffset = state->m_boffset;
|
||||
|
||||
|
||||
if (!(flip & 0x02))
|
||||
ydrawpos = ypos + ycntdraw;
|
||||
else
|
||||
@ -245,7 +245,7 @@ static void draw_sprite_new_zoomed( pgm_state *state, running_machine &machine,
|
||||
}
|
||||
|
||||
ycntdraw++;
|
||||
|
||||
|
||||
// we need to draw this line again, so restore our pointers to previous values
|
||||
state->m_aoffset = temp_aoffset;
|
||||
state->m_boffset = temp_boffset;
|
||||
@ -301,7 +301,7 @@ static void draw_sprite_new_zoomed( pgm_state *state, running_machine &machine,
|
||||
else
|
||||
{
|
||||
draw_sprite_line(machine, wide, NULL, NULL, xzoom, xgrow, flip, xpos, pri, realxsize, palt, 0);
|
||||
|
||||
|
||||
if (!(flip & 0x02))
|
||||
{
|
||||
if (ydrawpos>224)
|
||||
@ -312,7 +312,7 @@ static void draw_sprite_new_zoomed( pgm_state *state, running_machine &machine,
|
||||
if (ydrawpos<0)
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
ycntdraw++;
|
||||
@ -363,7 +363,7 @@ static void draw_sprite_line_basic( running_machine &machine, int wide, UINT16*
|
||||
xdrawpos = xpos + realxsize - xcntdraw;
|
||||
|
||||
pgm_draw_pix_nopri(xdrawpos, dest, destpri, srcdat);
|
||||
|
||||
|
||||
xcntdraw++;
|
||||
}
|
||||
|
||||
@ -405,7 +405,7 @@ static void draw_sprite_line_basic( running_machine &machine, int wide, UINT16*
|
||||
xdrawpos = xpos + realxsize - xcntdraw;
|
||||
|
||||
pgm_draw_pix_pri(xdrawpos, dest, destpri, srcdat);
|
||||
|
||||
|
||||
xcntdraw++;
|
||||
}
|
||||
|
||||
@ -452,7 +452,7 @@ static void draw_sprite_new_basic( pgm_state *state, running_machine &machine, i
|
||||
|
||||
while (ycnt < high)
|
||||
{
|
||||
|
||||
|
||||
if (!(flip & 0x02))
|
||||
ydrawpos = ypos + ycntdraw;
|
||||
else
|
||||
@ -467,7 +467,7 @@ static void draw_sprite_new_basic( pgm_state *state, running_machine &machine, i
|
||||
else
|
||||
{
|
||||
draw_sprite_line_basic(machine, wide, NULL, NULL, flip, xpos, pri, realxsize, palt, 0);
|
||||
|
||||
|
||||
if (!(flip & 0x02))
|
||||
{
|
||||
if (ydrawpos>224)
|
||||
@ -626,7 +626,7 @@ VIDEO_START( pgm )
|
||||
state->m_bdatasize = machine.region("sprmask")->bytes() - 1;
|
||||
state->m_aoffset = 0;
|
||||
state->m_boffset = 0;
|
||||
|
||||
|
||||
state->m_tx_tilemap = tilemap_create(machine, get_pgm_tx_tilemap_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
|
||||
tilemap_set_transparent_pen(state->m_tx_tilemap, 15);
|
||||
|
||||
|
@ -156,12 +156,12 @@ SCREEN_VBLANK( sprint2 )
|
||||
const rectangle &visarea = screen.machine().primary_screen->visible_area();
|
||||
|
||||
/*
|
||||
* Collisions are detected for both player cars:
|
||||
*
|
||||
* D7 => state->m_collision w/ white playfield
|
||||
* D6 => state->m_collision w/ black playfield or another car
|
||||
*
|
||||
*/
|
||||
* Collisions are detected for both player cars:
|
||||
*
|
||||
* D7 => state->m_collision w/ white playfield
|
||||
* D6 => state->m_collision w/ black playfield or another car
|
||||
*
|
||||
*/
|
||||
|
||||
for (i = 0; i < 2; i++)
|
||||
{
|
||||
|
@ -399,7 +399,7 @@ SCREEN_VBLANK( starshp1 )
|
||||
rect.min_y = get_sprite_vpos(state, 13);
|
||||
rect.max_x = rect.min_x + screen.machine().gfx[1]->width - 1;
|
||||
rect.max_y = rect.min_y + screen.machine().gfx[1]->height - 1;
|
||||
|
||||
|
||||
rect &= state->m_helper.cliprect();
|
||||
|
||||
state->m_helper.fill(0, visarea);
|
||||
|
@ -971,7 +971,7 @@ SCREEN_VBLANK( taitof2_partial_buffer_delayed_qzchikyu )
|
||||
if (vblank_on)
|
||||
{
|
||||
/* spriteram[2] and [3] are 1 frame behind...
|
||||
probably thundfox_eof_callback would work fine */
|
||||
probably thundfox_eof_callback would work fine */
|
||||
|
||||
taitof2_state *state = screen.machine().driver_data<taitof2_state>();
|
||||
UINT16 *spriteram = state->m_spriteram;
|
||||
|
@ -550,8 +550,8 @@ SCREEN_VBLANK( twin16 )
|
||||
state->m_need_process_spriteram = 1;
|
||||
|
||||
/* if the sprite preprocessor is used, sprite ram is copied to an external buffer first,
|
||||
as evidenced by 1-frame sprite lag in gradius2 and devilw otherwise, though there's probably
|
||||
more to it than that */
|
||||
as evidenced by 1-frame sprite lag in gradius2 and devilw otherwise, though there's probably
|
||||
more to it than that */
|
||||
memcpy(&screen.machine().generic.buffered_spriteram.u16[0x1800],state->m_sprite_buffer,0x800*sizeof(UINT16));
|
||||
memcpy(state->m_sprite_buffer,&screen.machine().generic.spriteram.u16[0x1800],0x800*sizeof(UINT16));
|
||||
}
|
||||
|
@ -524,8 +524,8 @@ SCREEN_VBLANK( toaplan0 )
|
||||
address_space *space = screen.machine().device("maincpu")->memory().space(AS_PROGRAM);
|
||||
|
||||
/* Spriteram is always 1 frame ahead, suggesting spriteram buffering.
|
||||
There are no CPU output registers that control this so we
|
||||
assume it happens automatically every frame, at the end of vblank */
|
||||
There are no CPU output registers that control this so we
|
||||
assume it happens automatically every frame, at the end of vblank */
|
||||
buffer_spriteram16_w(space,0,0,0xffff);
|
||||
}
|
||||
}
|
||||
|
@ -172,9 +172,9 @@ SCREEN_VBLANK( xmen6p )
|
||||
memcpy(state->m_k053247_ram, state->m_xmen6p_spriteramright, 0x1000);
|
||||
|
||||
/* we write the entire content of the tileram to the chip to ensure
|
||||
everything gets marked as dirty and the desired tilemap is rendered
|
||||
this is not very efficient!
|
||||
*/
|
||||
everything gets marked as dirty and the desired tilemap is rendered
|
||||
this is not very efficient!
|
||||
*/
|
||||
for (offset = 0; offset < (0xc000 / 2); offset++)
|
||||
{
|
||||
// K052109_lsb_w
|
||||
@ -190,10 +190,10 @@ SCREEN_VBLANK( xmen6p )
|
||||
memcpy(state->m_k053247_ram, state->m_xmen6p_spriteramleft, 0x1000);
|
||||
|
||||
/* we write the entire content of the tileram to the chip to ensure
|
||||
everything gets marked as dirty and the desired tilemap is rendered
|
||||
everything gets marked as dirty and the desired tilemap is rendered
|
||||
|
||||
this is not very efficient!
|
||||
*/
|
||||
this is not very efficient!
|
||||
*/
|
||||
for (offset = 0; offset < (0xc000 / 2); offset++)
|
||||
{
|
||||
// K052109_lsb_w
|
||||
@ -230,7 +230,7 @@ SCREEN_VBLANK( xmen6p )
|
||||
k052109_tilemap_draw(state->m_k052109, *renderbitmap, cliprect, layer[2], 0, 4);
|
||||
|
||||
/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
|
||||
pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
|
||||
pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
|
||||
k053247_sprites_draw(state->m_k053246, *renderbitmap, cliprect);
|
||||
}
|
||||
}
|
||||
|
@ -777,7 +777,7 @@ bool sdl_osd_interface::font_get_bitmap(osd_font font, unicode_char chnum, bitma
|
||||
const CFIndex count = 1;
|
||||
CGRect bounding_rect, success_rect;
|
||||
CGContextRef context_ref;
|
||||
|
||||
|
||||
if( chnum == ' ' )
|
||||
{
|
||||
uni_char = 'n';
|
||||
@ -1062,7 +1062,7 @@ bool sdl_osd_interface::font_get_bitmap(osd_font font, unicode_char chnum, bitma
|
||||
SDL_Surface *drawsurf;
|
||||
SDL_Color fcol = { 0xff, 0xff, 0xff };
|
||||
UINT16 ustr[16];
|
||||
|
||||
|
||||
ttffont = (TTF_Font *)font;
|
||||
|
||||
memset(ustr,0,sizeof(ustr));
|
||||
|
Loading…
Reference in New Issue
Block a user