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Changed the pic8259 implementation into a device.

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This commit is contained in:
Wilbert Pol 2008-04-12 19:15:27 +00:00
parent d713e9cce6
commit 7fb79442c1
7 changed files with 383 additions and 214 deletions
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282
src/emu/machine/pic8259.c
View File

@ -30,10 +30,13 @@ typedef enum
STATE_READY STATE_READY
} pic8259_state_t; } pic8259_state_t;
typedef struct pic8259 pic8259_t;
struct pic8259 struct pic8259
{ {
const struct pic8259_interface *intf;
emu_timer *timer; emu_timer *timer;
void (*set_int_line)(int which, int interrupt);
pic8259_state_t state; pic8259_state_t state;
@ -65,35 +68,19 @@ struct pic8259
UINT32 is_x86 : 1; UINT32 is_x86 : 1;
}; };
static struct pic8259 *pic;
static TIMER_CALLBACK( pic8259_timerproc ); INLINE pic8259_t *get_safe_token(const device_config *device) {
assert( device != NULL );
assert( device->token != NULL );
/* initializer */ assert( device->type == DEVICE_GET_INFO_NAME(pic8259) );
int pic8259_init(int count, void (*set_int_line)(int which, int interrupt)) return ( pic8259_t *) device->token;
{
int i;
/* allocate pic structures */
pic = auto_malloc(count * sizeof(struct pic8259));
memset(pic, 0, count * sizeof(struct pic8259));
for (i = 0; i < count; i++)
{
pic[i].timer = timer_alloc(pic8259_timerproc, NULL);
pic[i].set_int_line = set_int_line;
}
return 0;
} }
static TIMER_CALLBACK( pic8259_timerproc ) static TIMER_CALLBACK( pic8259_timerproc )
{ {
int which = param; const device_config *device = ptr;
struct pic8259 *p = &pic[which]; pic8259_t *pic8259 = get_safe_token(device);
int irq; int irq;
UINT8 mask; UINT8 mask;
@ -103,70 +90,70 @@ static TIMER_CALLBACK( pic8259_timerproc )
mask = 1 << irq; mask = 1 << irq;
/* is this IRQ in service? */ /* is this IRQ in service? */
if (p->in_service & mask) if (pic8259->in_service & mask)
{ {
if (LOG_GENERAL) if (LOG_GENERAL)
logerror("pic8259_timerproc(): PIC #%d IRQ #%d still in service\n", which, irq); logerror("pic8259_timerproc(): PIC IRQ #%d still in service\n", irq);
return; return;
} }
/* is this IRQ pending and enabled? */ /* is this IRQ pending and enabled? */
if ((p->state == STATE_READY) && (p->pending & mask) && !(p->interrupt_mask & mask)) if ((pic8259->state == STATE_READY) && (pic8259->pending & mask) && !(pic8259->interrupt_mask & mask))
{ {
if (LOG_GENERAL) if (LOG_GENERAL)
logerror("pic8259_timerproc(): PIC #%d triggering IRQ #%d\n", which, irq); logerror("pic8259_timerproc(): PIC triggering IRQ #%d\n", irq);
if (p->set_int_line) if (pic8259->intf->set_int_line)
p->set_int_line(which, 1); pic8259->intf->set_int_line(device, 1);
return; return;
} }
} }
if (p->set_int_line) if (pic8259->intf->set_int_line)
p->set_int_line(which, 0); pic8259->intf->set_int_line(device, 0);
} }
INLINE void pic8259_set_timer(pic8259_t *pic8259)
static void pic8259_set_timer(int which)
{ {
timer_adjust_oneshot(pic[which].timer, attotime_zero, which); timer_adjust_oneshot(pic8259->timer, attotime_zero, 0);
} }
void pic8259_set_irq_line(const device_config *device, int irq, int state)
void pic8259_set_irq_line(int which, int irq, int state)
{ {
pic8259_t *pic8259 = get_safe_token(device);
if (state) if (state)
{ {
/* setting IRQ line */ /* setting IRQ line */
if (!(pic[which].irq_lines & (1 << irq))) if (!(pic8259->irq_lines & (1 << irq)))
{ {
if (LOG_GENERAL) if (LOG_GENERAL)
logerror("pic8259_set_irq_line(): PIC #%d set IRQ line #%d\n", which, irq); logerror("pic8259_set_irq_line(): PIC set IRQ line #%d\n", irq);
pic[which].irq_lines |= 1 << irq; pic8259->irq_lines |= 1 << irq;
pic[which].pending |= 1 << irq; pic8259->pending |= 1 << irq;
pic8259_set_timer(which); pic8259_set_timer(pic8259);
} }
} }
else else
{ {
/* clearing IRQ line */ /* clearing IRQ line */
if (pic[which].irq_lines & (1 << irq)) if (pic8259->irq_lines & (1 << irq))
{ {
if (LOG_GENERAL) if (LOG_GENERAL)
logerror("pic8259_set_irq_line(): PIC #%d cleared IRQ line #%d\n", which, irq); logerror("pic8259_set_irq_line(): PIC cleared IRQ line #%d\n", irq);
pic[which].irq_lines &= ~(1 << irq); pic8259->irq_lines &= ~(1 << irq);
pic8259_set_timer(which); pic8259_set_timer(pic8259);
} }
} }
} }
int pic8259_acknowledge(int which) int pic8259_acknowledge(const device_config *device)
{ {
struct pic8259 *p = &pic[which]; pic8259_t *pic8259 = get_safe_token(device);
UINT8 mask; UINT8 mask;
int irq; int irq;
@ -175,16 +162,16 @@ int pic8259_acknowledge(int which)
mask = 1 << irq; mask = 1 << irq;
/* is this IRQ pending and enabled? */ /* is this IRQ pending and enabled? */
if ((p->pending & mask) && !(p->interrupt_mask & mask)) if ((pic8259->pending & mask) && !(pic8259->interrupt_mask & mask))
{ {
if (LOG_GENERAL) if (LOG_GENERAL)
logerror("pic8259_acknowledge(): PIC #%d acknowledge IRQ #%d\n", which, irq); logerror("pic8259_acknowledge(): PIC acknowledge IRQ #%d\n", irq);
p->pending &= ~mask; pic8259->pending &= ~mask;
if (!p->auto_eoi) if (!pic8259->auto_eoi)
p->in_service |= mask; pic8259->in_service |= mask;
return irq + p->base; return irq + pic8259->base;
} }
} }
return 0; return 0;
@ -192,9 +179,9 @@ int pic8259_acknowledge(int which)
static UINT8 pic8259_read(int which, offs_t offset) READ8_DEVICE_HANDLER( pic8259_r )
{ {
struct pic8259 *p = &pic[which]; pic8259_t *pic8259 = get_safe_token(device);
/* NPW 18-May-2003 - Changing 0xFF to 0x00 as per Ruslan */ /* NPW 18-May-2003 - Changing 0xFF to 0x00 as per Ruslan */
UINT8 data = 0x00; UINT8 data = 0x00;
@ -202,15 +189,15 @@ static UINT8 pic8259_read(int which, offs_t offset)
switch(offset) switch(offset)
{ {
case 0: /* PIC acknowledge IRQ */ case 0: /* PIC acknowledge IRQ */
if (p->special) if (pic8259->special)
{ {
p->special = 0; pic8259->special = 0;
data = p->input; data = pic8259->input;
} }
break; break;
case 1: /* PIC mask register */ case 1: /* PIC mask register */
data = p->interrupt_mask; data = pic8259->interrupt_mask;
break; break;
} }
return data; return data;
@ -218,9 +205,9 @@ static UINT8 pic8259_read(int which, offs_t offset)
static void pic8259_write(int which, offs_t offset, UINT8 data ) WRITE8_DEVICE_HANDLER( pic8259_w )
{ {
struct pic8259 *p = &pic[which]; pic8259_t *pic8259 = get_safe_token(device);
switch(offset) switch(offset)
{ {
@ -229,32 +216,32 @@ static void pic8259_write(int which, offs_t offset, UINT8 data )
{ {
/* write ICW1 - this pretty much resets the chip */ /* write ICW1 - this pretty much resets the chip */
if (LOG_ICW) if (LOG_ICW)
logerror("pic8259_write(): ICW1; which=%d data=0x%02X\n", which, data); logerror("pic8259_w(): ICW1; data=0x%02X\n", data);
p->interrupt_mask = 0x00; pic8259->interrupt_mask = 0x00;
p->level_trig_mode = (data & 0x08) ? 1 : 0; pic8259->level_trig_mode = (data & 0x08) ? 1 : 0;
p->vector_size = (data & 0x04) ? 1 : 0; pic8259->vector_size = (data & 0x04) ? 1 : 0;
p->cascade = (data & 0x02) ? 0 : 1; pic8259->cascade = (data & 0x02) ? 0 : 1;
p->icw4_needed = (data & 0x01) ? 1 : 0; pic8259->icw4_needed = (data & 0x01) ? 1 : 0;
p->state = STATE_ICW2; pic8259->state = STATE_ICW2;
} }
else if (p->state == STATE_READY) else if (pic8259->state == STATE_READY)
{ {
if ((data & 0x98) == 0x08) if ((data & 0x98) == 0x08)
{ {
/* write OCW3 */ /* write OCW3 */
if (LOG_OCW) if (LOG_OCW)
logerror("pic8259_write(): OCW3; which=%d data=0x%02X\n", which, data); logerror("pic8259_w(): OCW3; data=0x%02X\n", data);
switch (data & 0x03) switch (data & 0x03)
{ {
case 0x02: case 0x02:
p->special = 1; pic8259->special = 1;
p->input = p->pending; pic8259->input = pic8259->pending;
break; break;
case 0x03: case 0x03:
p->special = 1; pic8259->special = 1;
p->input = p->in_service & ~p->interrupt_mask; pic8259->input = pic8259->in_service & ~pic8259->interrupt_mask;
break; break;
} }
} }
@ -265,19 +252,19 @@ static void pic8259_write(int which, offs_t offset, UINT8 data )
/* write OCW2 */ /* write OCW2 */
if (LOG_OCW) if (LOG_OCW)
logerror("pic8259_write(): OCW2; which=%d data=0x%02X\n", which, data); logerror("pic8259_w(): OCW2; data=0x%02X\n", data);
switch (data & 0xe0) switch (data & 0xe0)
{ {
case 0x00: case 0x00:
p->prio = 0; pic8259->prio = 0;
break; break;
case 0x20: case 0x20:
for (n = 0, mask = 1<<p->prio; n < 8; n++, mask = (mask<<1) | (mask>>7)) for (n = 0, mask = 1<<pic8259->prio; n < 8; n++, mask = (mask<<1) | (mask>>7))
{ {
if (p->in_service & mask) if (pic8259->in_service & mask)
{ {
p->in_service &= ~mask; pic8259->in_service &= ~mask;
break; break;
} }
} }
@ -285,34 +272,34 @@ static void pic8259_write(int which, offs_t offset, UINT8 data )
case 0x40: case 0x40:
break; break;
case 0x60: case 0x60:
if( p->in_service & mask ) if( pic8259->in_service & mask )
{ {
p->in_service &= ~mask; pic8259->in_service &= ~mask;
} }
break; break;
case 0x80: case 0x80:
p->prio = ++p->prio & 7; pic8259->prio = ++pic8259->prio & 7;
break; break;
case 0xa0: case 0xa0:
for (n = 0, mask = 1<<p->prio; n < 8; n++, mask = (mask<<1) | (mask>>7)) for (n = 0, mask = 1<<pic8259->prio; n < 8; n++, mask = (mask<<1) | (mask>>7))
{ {
if( p->in_service & mask ) if( pic8259->in_service & mask )
{ {
p->in_service &= ~mask; pic8259->in_service &= ~mask;
p->prio = ++p->prio & 7; pic8259->prio = ++pic8259->prio & 7;
break; break;
} }
} }
break; break;
case 0xc0: case 0xc0:
p->prio = n & 7; pic8259->prio = n & 7;
break; break;
case 0xe0: case 0xe0:
if( p->in_service & mask ) if( pic8259->in_service & mask )
{ {
p->in_service &= ~mask; pic8259->in_service &= ~mask;
p->pending &= ~mask; pic8259->pending &= ~mask;
p->prio = ++p->prio & 7; pic8259->prio = ++pic8259->prio & 7;
} }
break; break;
} }
@ -321,7 +308,7 @@ static void pic8259_write(int which, offs_t offset, UINT8 data )
break; break;
case 1: case 1:
switch(p->state) switch(pic8259->state)
{ {
case STATE_ICW1: case STATE_ICW1:
break; break;
@ -329,69 +316,110 @@ static void pic8259_write(int which, offs_t offset, UINT8 data )
case STATE_ICW2: case STATE_ICW2:
/* write ICW2 */ /* write ICW2 */
if (LOG_ICW) if (LOG_ICW)
logerror("pic8259_write(): ICW2; which=%d data=0x%02X\n", which, data); logerror("pic8259_w(): ICW2; data=0x%02X\n", data);
p->base = data & 0xf8; pic8259->base = data & 0xf8;
if (p->cascade) if (pic8259->cascade)
p->state = STATE_ICW3; pic8259->state = STATE_ICW3;
else else
p->state = p->icw4_needed ? STATE_ICW4 : STATE_READY; pic8259->state = pic8259->icw4_needed ? STATE_ICW4 : STATE_READY;
break; break;
case STATE_ICW3: case STATE_ICW3:
/* write ICW3 */ /* write ICW3 */
if (LOG_ICW) if (LOG_ICW)
logerror("pic8259_write(): ICW3; which=%d data=0x%02X\n", which, data); logerror("pic8259_w(): ICW3; data=0x%02X\n", data);
p->slave = data; pic8259->slave = data;
p->state = p->icw4_needed ? STATE_ICW4 : STATE_READY; pic8259->state = pic8259->icw4_needed ? STATE_ICW4 : STATE_READY;
break; break;
case STATE_ICW4: case STATE_ICW4:
/* write ICW4 */ /* write ICW4 */
if (LOG_ICW) if (LOG_ICW)
logerror("pic8259_write(): ICW4; which=%d data=0x%02X\n", which, data); logerror("pic8259_w(): ICW4; data=0x%02X\n", data);
p->nested = (data & 0x10) ? 1 : 0; pic8259->nested = (data & 0x10) ? 1 : 0;
p->mode = (data >> 2) & 3; pic8259->mode = (data >> 2) & 3;
p->auto_eoi = (data & 0x02) ? 1 : 0; pic8259->auto_eoi = (data & 0x02) ? 1 : 0;
p->is_x86 = (data & 0x01) ? 1 : 0; pic8259->is_x86 = (data & 0x01) ? 1 : 0;
p->state = STATE_READY; pic8259->state = STATE_READY;
break; break;
case STATE_READY: case STATE_READY:
/* write OCW1 - set interrupt mask register */ /* write OCW1 - set interrupt mask register */
if (LOG_OCW) if (LOG_OCW)
logerror("pic8259_write(): OCW1; which=%d data=0x%02X\n", which, data); logerror("pic8259_w(): OCW1; data=0x%02X\n", data);
p->interrupt_mask = data; pic8259->interrupt_mask = data;
break; break;
} }
break; break;
} }
pic8259_set_timer(which); pic8259_set_timer(pic8259);
} }
/* ----------------------------------------------------------------------- */ static DEVICE_START( pic8259 ) {
pic8259_t *pic8259 = get_safe_token(device);
READ8_HANDLER ( pic8259_0_r ) { return pic8259_read(0, offset); } pic8259->intf = device->static_config;
READ8_HANDLER ( pic8259_1_r ) { return pic8259_read(1, offset); } }
WRITE8_HANDLER ( pic8259_0_w ) { pic8259_write(0, offset, data); }
WRITE8_HANDLER ( pic8259_1_w ) { pic8259_write(1, offset, data); }
READ16_HANDLER ( pic8259_16le_0_r ) { return read16le_with_read8_handler(pic8259_0_r, machine, offset, mem_mask); }
READ16_HANDLER ( pic8259_16le_1_r ) { return read16le_with_read8_handler(pic8259_1_r, machine, offset, mem_mask); }
WRITE16_HANDLER ( pic8259_16le_0_w ) { write16le_with_write8_handler(pic8259_0_w, machine, offset, data, mem_mask); }
WRITE16_HANDLER ( pic8259_16le_1_w ) { write16le_with_write8_handler(pic8259_1_w, machine, offset, data, mem_mask); }
READ32_HANDLER ( pic8259_32le_0_r ) { return read32le_with_read8_handler(pic8259_0_r, machine, offset, mem_mask); } static DEVICE_RESET( pic8259 ) {
READ32_HANDLER ( pic8259_32le_1_r ) { return read32le_with_read8_handler(pic8259_1_r, machine, offset, mem_mask); } pic8259_t *pic8259 = get_safe_token(device);
WRITE32_HANDLER ( pic8259_32le_0_w ) { write32le_with_write8_handler(pic8259_0_w, machine, offset, data, mem_mask); }
WRITE32_HANDLER ( pic8259_32le_1_w ) { write32le_with_write8_handler(pic8259_1_w, machine, offset, data, mem_mask); } pic8259->timer = timer_alloc( pic8259_timerproc, (void *)device );
pic8259->state = STATE_ICW1; /* It is unclear from the original code whether this is correct */
pic8259->irq_lines = 0;
pic8259->in_service = 0;
pic8259->pending = 0;
pic8259->prio = 0;
pic8259->interrupt_mask = 0;
pic8259->input = 0;
pic8259->special = 0;
pic8259->level_trig_mode = 0;
pic8259->vector_size = 0;
pic8259->cascade = 0;
pic8259->icw4_needed = 0;
pic8259->base = 0;
pic8259->slave = 0;
pic8259->nested = 0;
pic8259->mode = 0;
pic8259->auto_eoi = 0;
pic8259->is_x86 = 0;
}
static DEVICE_SET_INFO( pic8259 ) {
switch ( state ) {
/* no parameters to set */
}
}
DEVICE_GET_INFO( pic8259 ) {
switch ( state ) {
/* --- the following bits of info are returned as 64-bit signed integers --- */
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(pic8259_t); break;
case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = 0; break;
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case DEVINFO_FCT_SET_INFO: info->set_info = DEVICE_SET_INFO_NAME(pic8259); break;
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(pic8259); break;
case DEVINFO_FCT_STOP: /* nothing */ break;
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(pic8259); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: info->s = "Intel PIC8259"; break;
case DEVINFO_STR_FAMILY: info->s = "PIC8259"; break;
case DEVINFO_STR_VERSION: info->s = "1.00"; break;
case DEVINFO_STR_SOURCE_FILE: info->s = __FILE__; break;
case DEVINFO_STR_CREDITS: info->s = "Copyright the MAME and MESS Teams"; break;
}
}
READ64_HANDLER ( pic8259_64be_0_r ) { return read64be_with_read8_handler(pic8259_0_r, machine, offset, mem_mask); }
READ64_HANDLER ( pic8259_64be_1_r ) { return read64be_with_read8_handler(pic8259_1_r, machine, offset, mem_mask); }
WRITE64_HANDLER ( pic8259_64be_0_w ) { write64be_with_write8_handler(pic8259_0_w, machine, offset, data, mem_mask); }
WRITE64_HANDLER ( pic8259_64be_1_w ) { write64be_with_write8_handler(pic8259_1_w, machine, offset, data, mem_mask); }

38
src/emu/machine/pic8259.h
View File

@ -4,31 +4,23 @@
**********************************************************************/ **********************************************************************/
#ifndef PIC8259_H #ifndef __PIC8259_H_
#define PIC8259_H #define __PIC8259_H_
int pic8259_init(int count, void (*set_int_line)(int which, int interrupt)); #define PIC8259 DEVICE_GET_INFO_NAME(pic8259)
int pic8259_acknowledge(int which);
void pic8259_set_irq_line(int which, int irq, int state);
READ8_HANDLER ( pic8259_0_r ); typedef void (*pic8259_set_int_line_func)(const device_config *device, int interrupt);
READ8_HANDLER ( pic8259_1_r ); #define PIC8259_SET_INT_LINE(name) void name(const device_config *device, int interrupt)
WRITE8_HANDLER ( pic8259_0_w );
WRITE8_HANDLER ( pic8259_1_w );
READ16_HANDLER ( pic8259_16le_0_r ); struct pic8259_interface {
READ16_HANDLER ( pic8259_16le_1_r ); /* Called when int line changes */
WRITE16_HANDLER ( pic8259_16le_0_w ); pic8259_set_int_line_func set_int_line;
WRITE16_HANDLER ( pic8259_16le_1_w ); };
READ32_HANDLER ( pic8259_32le_0_r ); DEVICE_GET_INFO(pic8259);
READ32_HANDLER ( pic8259_32le_1_r ); READ8_DEVICE_HANDLER( pic8259_r );
WRITE32_HANDLER ( pic8259_32le_0_w ); WRITE8_DEVICE_HANDLER( pic8259_w );
WRITE32_HANDLER ( pic8259_32le_1_w ); int pic8259_acknowledge(const device_config *device);
void pic8259_set_irq_line(const device_config *device, int irq, int state);
READ64_HANDLER ( pic8259_64be_0_r ); #endif /* __PIC8259_H_ */
READ64_HANDLER ( pic8259_64be_1_r );
WRITE64_HANDLER ( pic8259_64be_0_w );
WRITE64_HANDLER ( pic8259_64be_1_w );
#endif /* PIC8259_H */

77
src/mame/drivers/gamecstl.c
View File

@ -56,6 +56,15 @@
static UINT32 *cga_ram; static UINT32 *cga_ram;
static UINT32 *bios_ram; static UINT32 *bios_ram;
static struct {
const device_config *pit8254;
const device_config *pic8259_1;
const device_config *pic8259_2;
const device_config *dma8237_1;
const device_config *dma8237_2;
} gamecstl_devices;
static const rgb_t cga_palette[16] = static const rgb_t cga_palette[16] =
{ {
MAKE_RGB( 0x00, 0x00, 0x00 ), MAKE_RGB( 0x00, 0x00, 0xaa ), MAKE_RGB( 0x00, 0xaa, 0x00 ), MAKE_RGB( 0x00, 0xaa, 0xaa ), MAKE_RGB( 0x00, 0x00, 0x00 ), MAKE_RGB( 0x00, 0x00, 0xaa ), MAKE_RGB( 0x00, 0xaa, 0x00 ), MAKE_RGB( 0x00, 0xaa, 0xaa ),
@ -453,6 +462,7 @@ static WRITE32_HANDLER(at_page32_w)
DEV_READWRITE8TO32LE( gamecstl_pit8254_32le, pit8253_r, pit8253_w ) DEV_READWRITE8TO32LE( gamecstl_pit8254_32le, pit8253_r, pit8253_w )
DEV_READWRITE8TO32LE( gamecstl_dma8237_32le, dma8237_r, dma8237_w ) DEV_READWRITE8TO32LE( gamecstl_dma8237_32le, dma8237_r, dma8237_w )
DEV_READWRITE8TO32LE( gamecstl_pic8259_32le, pic8259_r, pic8259_w )
/*****************************************************************************/ /*****************************************************************************/
@ -470,12 +480,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(gamecstl_io, ADDRESS_SPACE_IO, 32) static ADDRESS_MAP_START(gamecstl_io, ADDRESS_SPACE_IO, 32)
AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE(DMA8237, "dma8237_1", gamecstl_dma8237_32le_r, gamecstl_dma8237_32le_w) AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE(DMA8237, "dma8237_1", gamecstl_dma8237_32le_r, gamecstl_dma8237_32le_w)
AM_RANGE(0x0020, 0x003f) AM_READWRITE(pic8259_32le_0_r, pic8259_32le_0_w) AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE(PIC8259, "pic8259_1", gamecstl_pic8259_32le_r, gamecstl_pic8259_32le_w)
AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE(PIT8254, "pit8254", gamecstl_pit8254_32le_r, gamecstl_pit8254_32le_w) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE(PIT8254, "pit8254", gamecstl_pit8254_32le_r, gamecstl_pit8254_32le_w)
AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r, kbdc8042_32le_w)
AM_RANGE(0x0070, 0x007f) AM_READWRITE(mc146818_port32le_r, mc146818_port32le_w) AM_RANGE(0x0070, 0x007f) AM_READWRITE(mc146818_port32le_r, mc146818_port32le_w)
AM_RANGE(0x0080, 0x009f) AM_READWRITE(at_page32_r, at_page32_w) AM_RANGE(0x0080, 0x009f) AM_READWRITE(at_page32_r, at_page32_w)
AM_RANGE(0x00a0, 0x00bf) AM_READWRITE(pic8259_32le_1_r, pic8259_32le_1_w) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE(PIC8259, "pic8259_2", gamecstl_pic8259_32le_r, gamecstl_pic8259_32le_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE(DMA8237, "dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE(DMA8237, "dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00e8, 0x00eb) AM_NOP AM_RANGE(0x00e8, 0x00eb) AM_NOP
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide0_r, ide0_w) AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide0_r, ide0_w)
@ -548,10 +558,10 @@ INPUT_PORTS_END
static IRQ_CALLBACK(irq_callback) static IRQ_CALLBACK(irq_callback)
{ {
int r = 0; int r = 0;
r = pic8259_acknowledge(1); r = pic8259_acknowledge(gamecstl_devices.pic8259_2);
if (r==0) if (r==0)
{ {
r = pic8259_acknowledge(0); r = pic8259_acknowledge(gamecstl_devices.pic8259_1);
} }
return r; return r;
} }
@ -561,11 +571,50 @@ static MACHINE_RESET(gamecstl)
memory_set_bankptr(1, memory_region(REGION_USER1) + 0x30000); memory_set_bankptr(1, memory_region(REGION_USER1) + 0x30000);
cpunum_set_irq_callback(0, irq_callback); cpunum_set_irq_callback(0, irq_callback);
gamecstl_devices.pit8254 = (device_config*)device_list_find_by_tag( machine->config->devicelist, PIT8254, "pit8254" );
gamecstl_devices.pic8259_1 = (device_config*)device_list_find_by_tag( machine->config->devicelist, PIC8259, "pic8259_1" );
gamecstl_devices.pic8259_2 = (device_config*)device_list_find_by_tag( machine->config->devicelist, PIC8259, "pic8259_2" );
gamecstl_devices.dma8237_1 = (device_config*)device_list_find_by_tag( machine->config->devicelist, DMA8237, "dma8237_1" );
gamecstl_devices.dma8237_2 = (device_config*)device_list_find_by_tag( machine->config->devicelist, DMA8237, "dma8237_2" );
} }
/*************************************************************
*
* pic8259 configuration
*
*************************************************************/
static PIC8259_SET_INT_LINE( gamecstl_pic8259_1_set_int_line ) {
cpunum_set_input_line(device->machine, 0, 0, interrupt ? HOLD_LINE : CLEAR_LINE);
}
static PIC8259_SET_INT_LINE( gamecstl_pic8259_2_set_int_line ) {
pic8259_set_irq_line( gamecstl_devices.pic8259_1, 2, interrupt);
}
static const struct pic8259_interface gamecstl_pic8259_1_config = {
gamecstl_pic8259_1_set_int_line
};
static const struct pic8259_interface gamecstl_pic8259_2_config = {
gamecstl_pic8259_2_set_int_line
};
/*************************************************************
*
* pit8254 configuration
*
*************************************************************/
static PIT8253_OUTPUT_CHANGED( pc_timer0_w ) static PIT8253_OUTPUT_CHANGED( pc_timer0_w )
{ {
pic8259_set_irq_line(0, 0, state); pic8259_set_irq_line(gamecstl_devices.pic8259_1, 0, state);
} }
static const struct pit8253_config gamecstl_pit8254_config = static const struct pit8253_config gamecstl_pit8254_config =
@ -605,6 +654,12 @@ static MACHINE_DRIVER_START(gamecstl)
MDRV_DEVICE_ADD( "dma8237_2", DMA8237 ) MDRV_DEVICE_ADD( "dma8237_2", DMA8237 )
MDRV_DEVICE_CONFIG( dma8237_2_config ) MDRV_DEVICE_CONFIG( dma8237_2_config )
MDRV_DEVICE_ADD( "pic8259_1", PIC8259 )
MDRV_DEVICE_CONFIG( gamecstl_pic8259_1_config )
MDRV_DEVICE_ADD( "pic8259_2", PIC8259 )
MDRV_DEVICE_CONFIG( gamecstl_pic8259_2_config )
MDRV_NVRAM_HANDLER( mc146818 ) MDRV_NVRAM_HANDLER( mc146818 )
/* video hardware */ /* video hardware */
@ -642,16 +697,16 @@ static void set_gate_a20(int a20)
static void keyboard_interrupt(int state) static void keyboard_interrupt(int state)
{ {
pic8259_set_irq_line(0, 1, state); pic8259_set_irq_line( gamecstl_devices.pic8259_1, 1, state);
} }
static void ide_interrupt(int state) static void ide_interrupt(int state)
{ {
pic8259_set_irq_line(1, 6, state); pic8259_set_irq_line( gamecstl_devices.pic8259_2, 6, state);
} }
static int gamecstl_get_out2(running_machine *machine) { static int gamecstl_get_out2(running_machine *machine) {
return pit8253_get_output((device_config*)device_list_find_by_tag( machine->config->devicelist, PIT8254, "pit8254" ), 2 ); return pit8253_get_output( gamecstl_devices.pit8254, 2 );
} }
static const struct kbdc8042_interface at8042 = static const struct kbdc8042_interface at8042 =
@ -664,11 +719,15 @@ static const struct ide_interface ide_intf =
ide_interrupt ide_interrupt
}; };
static void gamecstl_set_keyb_int(int state) {
pic8259_set_irq_line(gamecstl_devices.pic8259_1, 1, state);
}
static DRIVER_INIT( gamecstl ) static DRIVER_INIT( gamecstl )
{ {
bios_ram = auto_malloc(0x10000); bios_ram = auto_malloc(0x10000);
init_pc_common(PCCOMMON_KEYBOARD_AT); init_pc_common(PCCOMMON_KEYBOARD_AT, gamecstl_set_keyb_int);
mc146818_init(MC146818_STANDARD); mc146818_init(MC146818_STANDARD);
intel82439tx_init(); intel82439tx_init();

77
src/mame/drivers/mediagx.c
View File

@ -119,6 +119,14 @@ static UINT8 ad1847_regs[16];
static UINT32 ad1847_sample_counter = 0; static UINT32 ad1847_sample_counter = 0;
static UINT32 ad1847_sample_rate; static UINT32 ad1847_sample_rate;
static struct {
const device_config *pit8254;
const device_config *pic8259_1;
const device_config *pic8259_2;
const device_config *dma8237_1;
const device_config *dma8237_2;
} mediagx_devices;
// Display controller registers // Display controller registers
#define DC_UNLOCK 0x00/4 #define DC_UNLOCK 0x00/4
@ -468,7 +476,7 @@ static READ32_HANDLER( io20_r )
// 0x20 - 0x21, PIC // 0x20 - 0x21, PIC
if (ACCESSING_BITS_0_15) if (ACCESSING_BITS_0_15)
{ {
r |= pic8259_32le_0_r(machine, offset, mem_mask); r |= read32le_with_read8_device_handler( pic8259_r, (device_config*)mediagx_devices.pic8259_1, offset, mem_mask);
} }
// 0x22, 0x23, Cyrix configuration registers // 0x22, 0x23, Cyrix configuration registers
@ -488,7 +496,7 @@ static WRITE32_HANDLER( io20_w )
// 0x20 - 0x21, PIC // 0x20 - 0x21, PIC
if (ACCESSING_BITS_0_15) if (ACCESSING_BITS_0_15)
{ {
pic8259_32le_0_w(machine, offset, data, mem_mask); write32le_with_write8_device_handler( pic8259_w, (device_config*)mediagx_devices.pic8259_1, offset, data, mem_mask);
} }
// 0x22, 0x23, Cyrix configuration registers // 0x22, 0x23, Cyrix configuration registers
@ -839,6 +847,7 @@ static WRITE32_HANDLER(at_page32_w)
DEV_READWRITE8TO32LE( mediagx_pit8254_32le, pit8253_r, pit8253_w ) DEV_READWRITE8TO32LE( mediagx_pit8254_32le, pit8253_r, pit8253_w )
DEV_READWRITE8TO32LE( mediagx_dma8237_32le, dma8237_r, dma8237_w ) DEV_READWRITE8TO32LE( mediagx_dma8237_32le, dma8237_r, dma8237_w )
DEV_READWRITE8TO32LE( mediagx_pic8259_32le, pic8259_r, pic8259_w )
/*****************************************************************************/ /*****************************************************************************/
@ -863,7 +872,7 @@ static ADDRESS_MAP_START(mediagx_io, ADDRESS_SPACE_IO, 32)
AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r, kbdc8042_32le_w)
AM_RANGE(0x0070, 0x007f) AM_READWRITE(mc146818_port32le_r, mc146818_port32le_w) AM_RANGE(0x0070, 0x007f) AM_READWRITE(mc146818_port32le_r, mc146818_port32le_w)
AM_RANGE(0x0080, 0x009f) AM_READWRITE(at_page32_r, at_page32_w) AM_RANGE(0x0080, 0x009f) AM_READWRITE(at_page32_r, at_page32_w)
AM_RANGE(0x00a0, 0x00af) AM_READWRITE(pic8259_32le_1_r, pic8259_32le_1_w) AM_RANGE(0x00a0, 0x00af) AM_DEVREADWRITE(PIC8259, "pic8259_2", mediagx_pic8259_32le_r, mediagx_pic8259_32le_w)
AM_RANGE(0x00c0, 0x00cf) AM_DEVREADWRITE(DMA8237, "dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) AM_RANGE(0x00c0, 0x00cf) AM_DEVREADWRITE(DMA8237, "dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00e8, 0x00eb) AM_NOP // I/O delay port AM_RANGE(0x00e8, 0x00eb) AM_NOP // I/O delay port
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide0_r, ide0_w) AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide0_r, ide0_w)
@ -956,10 +965,10 @@ INPUT_PORTS_END
static IRQ_CALLBACK(irq_callback) static IRQ_CALLBACK(irq_callback)
{ {
int r; int r;
r = pic8259_acknowledge(1); r = pic8259_acknowledge( mediagx_devices.pic8259_2);
if (r==0) if (r==0)
{ {
r = pic8259_acknowledge(0); r = pic8259_acknowledge( mediagx_devices.pic8259_1);
} }
return r; return r;
} }
@ -980,11 +989,49 @@ static MACHINE_RESET(mediagx)
dmadac_enable(0, 2, 1); dmadac_enable(0, 2, 1);
ide_controller_reset(0); ide_controller_reset(0);
mediagx_devices.pit8254 = (device_config*)device_list_find_by_tag( machine->config->devicelist, PIT8254, "pit8254" );
mediagx_devices.pic8259_1 = (device_config*)device_list_find_by_tag( machine->config->devicelist, PIC8259, "pic8259_1" );
mediagx_devices.pic8259_2 = (device_config*)device_list_find_by_tag( machine->config->devicelist, PIC8259, "pic8259_2" );
mediagx_devices.dma8237_1 = (device_config*)device_list_find_by_tag( machine->config->devicelist, DMA8237, "dma8237_1" );
mediagx_devices.dma8237_2 = (device_config*)device_list_find_by_tag( machine->config->devicelist, DMA8237, "dma8237_2" );
} }
/*************************************************************
*
* pic8259 configuration
*
*************************************************************/
static PIC8259_SET_INT_LINE( mediagx_pic8259_1_set_int_line ) {
cpunum_set_input_line(device->machine, 0, 0, interrupt ? HOLD_LINE : CLEAR_LINE);
}
static PIC8259_SET_INT_LINE( mediagx_pic8259_2_set_int_line ) {
pic8259_set_irq_line( mediagx_devices.pic8259_1, 2, interrupt);
}
static const struct pic8259_interface mediagx_pic8259_1_config = {
mediagx_pic8259_1_set_int_line
};
static const struct pic8259_interface mediagx_pic8259_2_config = {
mediagx_pic8259_2_set_int_line
};
/*************************************************************
*
* pit8254 configuration
*
*************************************************************/
static PIT8253_OUTPUT_CHANGED( pc_timer0_w ) static PIT8253_OUTPUT_CHANGED( pc_timer0_w )
{ {
pic8259_set_irq_line(0, 0, state); pic8259_set_irq_line( mediagx_devices.pic8259_1, 0, state);
} }
@ -1026,6 +1073,12 @@ static MACHINE_DRIVER_START(mediagx)
MDRV_DEVICE_ADD( "dma8237_2", DMA8237 ) MDRV_DEVICE_ADD( "dma8237_2", DMA8237 )
MDRV_DEVICE_CONFIG( dma8237_2_config ) MDRV_DEVICE_CONFIG( dma8237_2_config )
MDRV_DEVICE_ADD( "pic8259_1", PIC8259 )
MDRV_DEVICE_CONFIG( mediagx_pic8259_1_config )
MDRV_DEVICE_ADD( "pic8259_2", PIC8259 )
MDRV_DEVICE_CONFIG( mediagx_pic8259_2_config )
MDRV_NVRAM_HANDLER( mc146818 ) MDRV_NVRAM_HANDLER( mc146818 )
/* video hardware */ /* video hardware */
@ -1058,16 +1111,16 @@ static void set_gate_a20(int a20)
static void keyboard_interrupt(int state) static void keyboard_interrupt(int state)
{ {
pic8259_set_irq_line(0, 1, state); pic8259_set_irq_line(mediagx_devices.pic8259_1, 1, state);
} }
static void ide_interrupt(int state) static void ide_interrupt(int state)
{ {
pic8259_set_irq_line(1, 6, state); pic8259_set_irq_line(mediagx_devices.pic8259_2, 6, state);
} }
static int mediagx_get_out2(running_machine *machine) { static int mediagx_get_out2(running_machine *machine) {
return pit8253_get_output((device_config*)device_list_find_by_tag( machine->config->devicelist, PIT8254, "pit8254" ), 2 ); return pit8253_get_output( mediagx_devices.pit8254, 2 );
} }
static const struct kbdc8042_interface at8042 = static const struct kbdc8042_interface at8042 =
@ -1086,9 +1139,13 @@ static const struct pci_device_info cx5510 =
cx5510_pci_w cx5510_pci_w
}; };
static void mediagx_set_keyb_int(int state) {
pic8259_set_irq_line(mediagx_devices.pic8259_1, 1, state);
}
static void init_mediagx(running_machine *machine) static void init_mediagx(running_machine *machine)
{ {
init_pc_common(PCCOMMON_KEYBOARD_AT); init_pc_common(PCCOMMON_KEYBOARD_AT,mediagx_set_keyb_int);
mc146818_init(MC146818_STANDARD); mc146818_init(MC146818_STANDARD);
pci_init(); pci_init();

77
src/mame/drivers/taitowlf.c
View File

@ -21,6 +21,15 @@
static UINT32 *cga_ram; static UINT32 *cga_ram;
static UINT32 *bios_ram; static UINT32 *bios_ram;
static struct {
const device_config *pit8254;
const device_config *pic8259_1;
const device_config *pic8259_2;
const device_config *dma8237_1;
const device_config *dma8237_2;
} taitowlf_devices;
static const rgb_t cga_palette[16] = static const rgb_t cga_palette[16] =
{ {
MAKE_RGB( 0x00, 0x00, 0x00 ), MAKE_RGB( 0x00, 0x00, 0xaa ), MAKE_RGB( 0x00, 0xaa, 0x00 ), MAKE_RGB( 0x00, 0xaa, 0xaa ), MAKE_RGB( 0x00, 0x00, 0x00 ), MAKE_RGB( 0x00, 0x00, 0xaa ), MAKE_RGB( 0x00, 0xaa, 0x00 ), MAKE_RGB( 0x00, 0xaa, 0xaa ),
@ -419,6 +428,7 @@ static WRITE32_HANDLER(at_page32_w)
DEV_READWRITE8TO32LE( taitowlf_pit8254_32le, pit8253_r, pit8253_w ) DEV_READWRITE8TO32LE( taitowlf_pit8254_32le, pit8253_r, pit8253_w )
DEV_READWRITE8TO32LE( taitowlf_dma8237_32le, dma8237_r, dma8237_w ) DEV_READWRITE8TO32LE( taitowlf_dma8237_32le, dma8237_r, dma8237_w )
DEV_READWRITE8TO32LE( taitowlf_pic8259_32le, pic8259_r, pic8259_w )
/*****************************************************************************/ /*****************************************************************************/
@ -436,12 +446,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START(taitowlf_io, ADDRESS_SPACE_IO, 32) static ADDRESS_MAP_START(taitowlf_io, ADDRESS_SPACE_IO, 32)
AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE(DMA8237, "dma8237_1", taitowlf_dma8237_32le_r, taitowlf_dma8237_32le_w) AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE(DMA8237, "dma8237_1", taitowlf_dma8237_32le_r, taitowlf_dma8237_32le_w)
AM_RANGE(0x0020, 0x003f) AM_READWRITE(pic8259_32le_0_r, pic8259_32le_0_w) AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE(PIC8259, "pic8259_1", taitowlf_pic8259_32le_r, taitowlf_pic8259_32le_w)
AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE(PIT8254, "pit8254", taitowlf_pit8254_32le_r, taitowlf_pit8254_32le_w) AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE(PIT8254, "pit8254", taitowlf_pit8254_32le_r, taitowlf_pit8254_32le_w)
AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r, kbdc8042_32le_w) AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r, kbdc8042_32le_w)
AM_RANGE(0x0070, 0x007f) AM_READWRITE(mc146818_port32le_r, mc146818_port32le_w) AM_RANGE(0x0070, 0x007f) AM_READWRITE(mc146818_port32le_r, mc146818_port32le_w)
AM_RANGE(0x0080, 0x009f) AM_READWRITE(at_page32_r, at_page32_w) AM_RANGE(0x0080, 0x009f) AM_READWRITE(at_page32_r, at_page32_w)
AM_RANGE(0x00a0, 0x00bf) AM_READWRITE(pic8259_32le_1_r, pic8259_32le_1_w) AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE(PIC8259, "pic8259_2", taitowlf_pic8259_32le_r, taitowlf_pic8259_32le_w)
AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE(DMA8237, "dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w) AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE(DMA8237, "dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
AM_RANGE(0x00e8, 0x00eb) AM_NOP AM_RANGE(0x00e8, 0x00eb) AM_NOP
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide0_r, ide0_w) AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide0_r, ide0_w)
@ -514,10 +524,10 @@ INPUT_PORTS_END
static IRQ_CALLBACK(irq_callback) static IRQ_CALLBACK(irq_callback)
{ {
int r = 0; int r = 0;
r = pic8259_acknowledge(1); r = pic8259_acknowledge( taitowlf_devices.pic8259_2);
if (r==0) if (r==0)
{ {
r = pic8259_acknowledge(0); r = pic8259_acknowledge( taitowlf_devices.pic8259_1);
} }
return r; return r;
} }
@ -527,11 +537,50 @@ static MACHINE_RESET(taitowlf)
memory_set_bankptr(1, memory_region(REGION_USER1) + 0x30000); memory_set_bankptr(1, memory_region(REGION_USER1) + 0x30000);
cpunum_set_irq_callback(0, irq_callback); cpunum_set_irq_callback(0, irq_callback);
taitowlf_devices.pit8254 = (device_config*)device_list_find_by_tag( machine->config->devicelist, PIT8254, "pit8254" );
taitowlf_devices.pic8259_1 = (device_config*)device_list_find_by_tag( machine->config->devicelist, PIC8259, "pic8259_1" );
taitowlf_devices.pic8259_2 = (device_config*)device_list_find_by_tag( machine->config->devicelist, PIC8259, "pic8259_2" );
taitowlf_devices.dma8237_1 = (device_config*)device_list_find_by_tag( machine->config->devicelist, DMA8237, "dma8237_1" );
taitowlf_devices.dma8237_2 = (device_config*)device_list_find_by_tag( machine->config->devicelist, DMA8237, "dma8237_2" );
} }
/*************************************************************
*
* pic8259 configuration
*
*************************************************************/
static PIC8259_SET_INT_LINE( taitowlf_pic8259_1_set_int_line ) {
cpunum_set_input_line(device->machine, 0, 0, interrupt ? HOLD_LINE : CLEAR_LINE);
}
static PIC8259_SET_INT_LINE( taitowlf_pic8259_2_set_int_line ) {
pic8259_set_irq_line( taitowlf_devices.pic8259_1, 2, interrupt);
}
static const struct pic8259_interface taitowlf_pic8259_1_config = {
taitowlf_pic8259_1_set_int_line
};
static const struct pic8259_interface taitowlf_pic8259_2_config = {
taitowlf_pic8259_2_set_int_line
};
/*************************************************************
*
* pit8254 configuration
*
*************************************************************/
static PIT8253_OUTPUT_CHANGED( pc_timer0_w ) static PIT8253_OUTPUT_CHANGED( pc_timer0_w )
{ {
pic8259_set_irq_line(0, 0, state); pic8259_set_irq_line(taitowlf_devices.pic8259_1, 0, state);
} }
static const struct pit8253_config taitowlf_pit8254_config = static const struct pit8253_config taitowlf_pit8254_config =
@ -571,6 +620,12 @@ static MACHINE_DRIVER_START(taitowlf)
MDRV_DEVICE_ADD( "dma8237_2", DMA8237 ) MDRV_DEVICE_ADD( "dma8237_2", DMA8237 )
MDRV_DEVICE_CONFIG( dma8237_2_config ) MDRV_DEVICE_CONFIG( dma8237_2_config )
MDRV_DEVICE_ADD( "pic8259_1", PIC8259 )
MDRV_DEVICE_CONFIG( taitowlf_pic8259_1_config )
MDRV_DEVICE_ADD( "pic8259_2", PIC8259 )
MDRV_DEVICE_CONFIG( taitowlf_pic8259_2_config )
MDRV_NVRAM_HANDLER( mc146818 ) MDRV_NVRAM_HANDLER( mc146818 )
/* video hardware */ /* video hardware */
@ -608,16 +663,16 @@ static void set_gate_a20(int a20)
static void keyboard_interrupt(int state) static void keyboard_interrupt(int state)
{ {
pic8259_set_irq_line(0, 1, state); pic8259_set_irq_line(taitowlf_devices.pic8259_1, 1, state);
} }
static void ide_interrupt(int state) static void ide_interrupt(int state)
{ {
pic8259_set_irq_line(1, 6, state); pic8259_set_irq_line(taitowlf_devices.pic8259_2, 6, state);
} }
static int taitowlf_get_out2(running_machine *machine) { static int taitowlf_get_out2(running_machine *machine) {
return pit8253_get_output((device_config*)device_list_find_by_tag( machine->config->devicelist, PIT8254, "pit8254" ), 2 ); return pit8253_get_output(taitowlf_devices.pit8254, 2 );
} }
static const struct kbdc8042_interface at8042 = static const struct kbdc8042_interface at8042 =
@ -630,11 +685,15 @@ static const struct ide_interface ide_intf =
ide_interrupt ide_interrupt
}; };
static void taitowlf_set_keyb_int(int state) {
pic8259_set_irq_line(taitowlf_devices.pic8259_1, 1, state);
}
static DRIVER_INIT( taitowlf ) static DRIVER_INIT( taitowlf )
{ {
bios_ram = auto_malloc(0x10000); bios_ram = auto_malloc(0x10000);
init_pc_common(PCCOMMON_KEYBOARD_AT); init_pc_common(PCCOMMON_KEYBOARD_AT, taitowlf_set_keyb_int);
mc146818_init(MC146818_STANDARD); mc146818_init(MC146818_STANDARD);
intel82439tx_init(); intel82439tx_init();

44
src/mame/machine/pcshare.c
View File

@ -21,16 +21,7 @@
***************************************************************************/ ***************************************************************************/
#include "driver.h" #include "driver.h"
#include "deprecat.h"
#include "memconv.h"
#include "machine/8255ppi.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
#include "machine/mc146818.h"
#include "machine/pcshare.h" #include "machine/pcshare.h"
#include "machine/8237dma.h"
#include "machine/pckeybrd.h" #include "machine/pckeybrd.h"
#define VERBOSE_DBG 0 /* general debug messages */ #define VERBOSE_DBG 0 /* general debug messages */
@ -43,31 +34,11 @@
static emu_timer *pc_keyboard_timer; static emu_timer *pc_keyboard_timer;
static void (*set_keyb_int)(int);
static TIMER_CALLBACK( pc_keyb_timer ); static TIMER_CALLBACK( pc_keyb_timer );
/* ----------------------------------------------------------------------- */ void init_pc_common(UINT32 flags, void (*set_keyb_int_func)(int))
static void pc_pic_set_int_line(int which, int interrupt)
{
switch(which)
{
case 0:
/* Master */
cpunum_set_input_line(Machine, 0, 0, interrupt ? HOLD_LINE : CLEAR_LINE);
break;
case 1:
/* Slave */
pic8259_set_irq_line(0, 2, interrupt);
break;
}
}
void init_pc_common(UINT32 flags)
{ {
/* PC-XT keyboard */ /* PC-XT keyboard */
if (flags & PCCOMMON_KEYBOARD_AT) if (flags & PCCOMMON_KEYBOARD_AT)
@ -76,8 +47,7 @@ void init_pc_common(UINT32 flags)
at_keyboard_init(AT_KEYBOARD_TYPE_PC); at_keyboard_init(AT_KEYBOARD_TYPE_PC);
at_keyboard_set_scan_code_set(1); at_keyboard_set_scan_code_set(1);
/* PIC */ set_keyb_int = set_keyb_int_func;
pic8259_init(2, pc_pic_set_int_line);
pc_keyboard_timer = timer_alloc(pc_keyb_timer, NULL); pc_keyboard_timer = timer_alloc(pc_keyb_timer, NULL);
} }
@ -140,7 +110,9 @@ void pc_keyb_set_clock(int on)
void pc_keyb_clear(void) void pc_keyb_clear(void)
{ {
pc_keyb.data = 0; pc_keyb.data = 0;
pic8259_set_irq_line(0, 1, 0); if ( set_keyb_int ) {
set_keyb_int(0);
}
} }
void pc_keyboard(void) void pc_keyboard(void)
@ -154,7 +126,9 @@ void pc_keyboard(void)
if ( (data=at_keyboard_read())!=-1) { if ( (data=at_keyboard_read())!=-1) {
pc_keyb.data = data; pc_keyb.data = data;
DBG_LOG(1,"KB_scancode",("$%02x\n", pc_keyb.data)); DBG_LOG(1,"KB_scancode",("$%02x\n", pc_keyb.data));
pic8259_set_irq_line(0, 1, 1); if ( set_keyb_int ) {
set_keyb_int(1);
}
pc_keyb.self_test = 0; pc_keyb.self_test = 0;
} }
} }

2
src/mame/machine/pcshare.h
View File

@ -4,7 +4,7 @@
#define PCCOMMON_KEYBOARD_PC 0 #define PCCOMMON_KEYBOARD_PC 0
#define PCCOMMON_KEYBOARD_AT 1 #define PCCOMMON_KEYBOARD_AT 1
void init_pc_common(UINT32 flags); void init_pc_common(UINT32 flags, void (*set_keyb_int_func)(int));
void pc_keyboard(void); void pc_keyboard(void);
UINT8 pc_keyb_read(void); UINT8 pc_keyb_read(void);