Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-05-21 21:29:15 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

A few more conversions.

Browse Source
This commit is contained in:
Aaron Giles 2008-11-22 22:45:11 +00:00
parent e1c619230f
commit 7fbd73c60c
8 changed files with 425 additions and 428 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/emu/cpu/mb86233/mb86233.c
View File

@ -13,6 +13,7 @@
***************************************************************************/
#define NO_LEGACY_MEMORY_HANDLERS 1
#include "mb86233.h"
#include "debugger.h"
@ -46,6 +47,9 @@ typedef struct
UINT32 gpr[16];
UINT32 extport[0x30];
const device_config *device;
const address_space *program;
/* FIFO */
int fifo_wait;
int (*fifo_read_cb)( UINT32 *data );
@ -87,9 +91,9 @@ static int mb86233_icount;
#define ALU(a) mb86233_alu(a)
#define GETREPCNT() mb86233.repcnt
#define ROPCODE(a) program_decrypted_read_dword(a<<2)
#define RDMEM(a) program_read_dword_32le((a<<2))
#define WRMEM(a,v) program_write_dword_32le((a<<2),v)
#define ROPCODE(a) memory_decrypted_read_dword(mb86233.program, a<<2)
#define RDMEM(a) memory_read_dword_32le(mb86233.program, (a<<2))
#define WRMEM(a,v) memory_write_dword_32le(mb86233.program, (a<<2), v)
/***************************************************************************
Context Switching
@ -122,6 +126,8 @@ static CPU_INIT( mb86233 )
(void)irqcallback;
memset(&mb86233, 0, sizeof( MB86233_REGS ) );
mb86233.device = device;
mb86233.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
if ( _config )
{

17
src/emu/cpu/mb88xx/mb88xx.c
View File

@ -13,6 +13,7 @@
***************************************************************************/
#define NO_LEGACY_MEMORY_HANDLERS 1
#include "debugger.h"
#include "mb88xx.h"
@ -53,6 +54,9 @@ typedef struct
int pending_interrupt;
cpu_irq_callback irqcallback;
const device_config *device;
const address_space *program;
const address_space *data;
const address_space *io;
} mb88Regs;
/***************************************************************************
@ -66,13 +70,13 @@ static int mb88_icount;
MACROS
***************************************************************************/
#define READOP(a) (program_decrypted_read_byte(a))
#define READOP(a) (memory_decrypted_read_byte(mb88.program, a))
#define RDMEM(a) (data_read_byte_8be(a))
#define WRMEM(a,v) (data_write_byte_8be((a), (v)))
#define RDMEM(a) (memory_read_byte_8be(mb88.data, a))
#define WRMEM(a,v) (memory_write_byte_8be(mb88.data, (a), (v)))
#define READPORT(a) (io_read_byte_8be(a))
#define WRITEPORT(a,v) (io_write_byte_8be((a), (v)))
#define READPORT(a) (memory_read_byte_8be(mb88.io, a))
#define WRITEPORT(a,v) (memory_write_byte_8be(mb88.io, (a), (v)))
#define TEST_ST() (mb88.st & 1)
#define TEST_ZF() (mb88.zf & 1)
@ -128,6 +132,9 @@ static CPU_INIT( mb88 )
mb88.irqcallback = irqcallback;
mb88.device = device;
mb88.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
mb88.data = memory_find_address_space(device, ADDRESS_SPACE_DATA);
mb88.io = memory_find_address_space(device, ADDRESS_SPACE_IO);
state_save_register_item("mb88", device->tag, 0, mb88.PC);
state_save_register_item("mb88", device->tag, 0, mb88.PA);

47
src/emu/cpu/mc68hc11/mc68hc11.c
View File

@ -4,6 +4,7 @@
Written by Ville Linde
*/
#define NO_LEGACY_MEMORY_HANDLERS 1
#include "debugger.h"
#include "mc68hc11.h"
@ -53,6 +54,8 @@ typedef struct
cpu_irq_callback irq_callback;
const device_config *device;
const address_space *program;
const address_space *io;
int icount;
int ram_position;
int reg_position;
@ -74,7 +77,7 @@ static UINT8 hc11_regs_r(UINT32 address)
switch(reg)
{
case 0x00: /* PORTA */
return io_read_byte(MC68HC11_IO_PORTA);
return memory_read_byte(hc11.io, MC68HC11_IO_PORTA);
case 0x01: /* DDRA */
return 0;
case 0x09: /* DDRD */
@ -87,44 +90,44 @@ static UINT8 hc11_regs_r(UINT32 address)
{
if (hc11.adctl & 0x10)
{
return io_read_byte((hc11.adctl & 0x4) + MC68HC11_IO_AD0);
return memory_read_byte(hc11.io, (hc11.adctl & 0x4) + MC68HC11_IO_AD0);
}
else
{
return io_read_byte((hc11.adctl & 0x7) + MC68HC11_IO_AD0);
return memory_read_byte(hc11.io, (hc11.adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x32: /* ADR2 */
{
if (hc11.adctl & 0x10)
{
return io_read_byte((hc11.adctl & 0x4) + MC68HC11_IO_AD1);
return memory_read_byte(hc11.io, (hc11.adctl & 0x4) + MC68HC11_IO_AD1);
}
else
{
return io_read_byte((hc11.adctl & 0x7) + MC68HC11_IO_AD0);
return memory_read_byte(hc11.io, (hc11.adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x33: /* ADR3 */
{
if (hc11.adctl & 0x10)
{
return io_read_byte((hc11.adctl & 0x4) + MC68HC11_IO_AD2);
return memory_read_byte(hc11.io, (hc11.adctl & 0x4) + MC68HC11_IO_AD2);
}
else
{
return io_read_byte((hc11.adctl & 0x7) + MC68HC11_IO_AD0);
return memory_read_byte(hc11.io, (hc11.adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x34: /* ADR4 */
{
if (hc11.adctl & 0x10)
{
return io_read_byte((hc11.adctl & 0x4) + MC68HC11_IO_AD3);
return memory_read_byte(hc11.io, (hc11.adctl & 0x4) + MC68HC11_IO_AD3);
}
else
{
return io_read_byte((hc11.adctl & 0x7) + MC68HC11_IO_AD0);
return memory_read_byte(hc11.io, (hc11.adctl & 0x7) + MC68HC11_IO_AD0);
}
}
case 0x38: /* OPT2 */
@ -140,9 +143,9 @@ static UINT8 hc11_regs_r(UINT32 address)
case 0x74: /* SCSR1 */
return 0x40;
case 0x7c: /* PORTH */
return io_read_byte(MC68HC11_IO_PORTH);
return memory_read_byte(hc11.io, MC68HC11_IO_PORTH);
case 0x7e: /* PORTG */
return io_read_byte(MC68HC11_IO_PORTG);
return memory_read_byte(hc11.io, MC68HC11_IO_PORTG);
case 0x7f: /* DDRG */
return 0;
@ -151,7 +154,7 @@ static UINT8 hc11_regs_r(UINT32 address)
case 0x89: /* SPSR2 */
return 0x80;
case 0x8a: /* SPDR2 */
return io_read_byte(MC68HC11_IO_SPI2_DATA);
return memory_read_byte(hc11.io, MC68HC11_IO_SPI2_DATA);
case 0x8b: /* OPT4 */
return 0;
@ -168,13 +171,13 @@ static void hc11_regs_w(UINT32 address, UINT8 value)
switch(reg)
{
case 0x00: /* PORTA */
io_write_byte(MC68HC11_IO_PORTA, value);
memory_write_byte(hc11.io, MC68HC11_IO_PORTA, value);
return;
case 0x01: /* DDRA */
//mame_printf_debug("HC11: ddra = %02X\n", value);
return;
case 0x08: /* PORTD */
io_write_byte(MC68HC11_IO_PORTD, value);
memory_write_byte(hc11.io, MC68HC11_IO_PORTD, value);
return;
case 0x09: /* DDRD */
//mame_printf_debug("HC11: ddrd = %02X\n", value);
@ -222,13 +225,13 @@ static void hc11_regs_w(UINT32 address, UINT8 value)
case 0x77: /* SCDRL */
return;
case 0x7c: /* PORTH */
io_write_byte(MC68HC11_IO_PORTH, value);
memory_write_byte(hc11.io, MC68HC11_IO_PORTH, value);
return;
case 0x7d: /* DDRH */
//mame_printf_debug("HC11: ddrh = %02X at %04X\n", value, hc11.pc);
return;
case 0x7e: /* PORTG */
io_write_byte(MC68HC11_IO_PORTG, value);
memory_write_byte(hc11.io, MC68HC11_IO_PORTG, value);
return;
case 0x7f: /* DDRG */
//mame_printf_debug("HC11: ddrg = %02X at %04X\n", value, hc11.pc);
@ -239,7 +242,7 @@ static void hc11_regs_w(UINT32 address, UINT8 value)
case 0x89: /* SPSR2 */
return;
case 0x8a: /* SPDR2 */
io_write_byte(MC68HC11_IO_SPI2_DATA, value);
memory_write_byte(hc11.io, MC68HC11_IO_SPI2_DATA, value);
return;
case 0x8b: /* OPT4 */
@ -253,13 +256,13 @@ static void hc11_regs_w(UINT32 address, UINT8 value)
INLINE UINT8 FETCH(void)
{
return program_decrypted_read_byte(hc11.pc++);
return memory_decrypted_read_byte(hc11.program, hc11.pc++);
}
INLINE UINT16 FETCH16(void)
{
UINT16 w;
w = (program_decrypted_read_byte(hc11.pc) << 8) | (program_decrypted_read_byte(hc11.pc+1));
w = (memory_decrypted_read_byte(hc11.program, hc11.pc) << 8) | (memory_decrypted_read_byte(hc11.program, hc11.pc+1));
hc11.pc += 2;
return w;
}
@ -274,7 +277,7 @@ INLINE UINT8 READ8(UINT32 address)
{
return internal_ram[address-hc11.ram_position];
}
return program_read_byte(address);
return memory_read_byte(hc11.program, address);
}
INLINE void WRITE8(UINT32 address, UINT8 value)
@ -289,7 +292,7 @@ INLINE void WRITE8(UINT32 address, UINT8 value)
internal_ram[address-hc11.ram_position] = value;
return;
}
program_write_byte(address, value);
memory_write_byte(hc11.program, address, value);
}
INLINE UINT16 READ16(UINT32 address)
@ -351,6 +354,8 @@ static CPU_INIT( hc11 )
hc11.ram_position = 0x100;
hc11.irq_callback = irqcallback;
hc11.device = device;
hc11.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
hc11.io = memory_find_address_space(device, ADDRESS_SPACE_IO);
}
static CPU_RESET( hc11 )

7
src/emu/cpu/minx/minx.c
View File

@ -42,6 +42,7 @@ TODO:
*/
#define NO_LEGACY_MEMORY_HANDLERS 1
#include "minx.h"
#include "debugger.h"
#include "deprecat.h"
@ -85,13 +86,14 @@ typedef struct {
UINT8 interrupt_pending;
cpu_irq_callback irq_callback;
const device_config *device;
const address_space *program;
} minx_regs;
static minx_regs regs;
static int minx_icount;
#define RD(offset) program_read_byte_8be( offset )
#define WR(offset,data) program_write_byte_8be( offset, data )
#define RD(offset) memory_read_byte_8be( regs.program, offset )
#define WR(offset,data) memory_write_byte_8be( regs.program, offset, data )
#define GET_MINX_PC ( ( regs.PC & 0x8000 ) ? ( regs.V << 15 ) | (regs.PC & 0x7FFF ) : regs.PC )
@ -112,6 +114,7 @@ static CPU_INIT( minx )
{
regs.irq_callback = irqcallback;
regs.device = device;
regs.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
if ( device->static_config != NULL )
{
}

3
src/emu/cpu/mips/mips3.c
View File

@ -9,6 +9,7 @@
***************************************************************************/
#define NO_LEGACY_MEMORY_HANDLERS 1
#include "debugger.h"
#include "mips3com.h"
@ -150,7 +151,7 @@ static mips3_regs mips3;
MEMORY ACCESSORS
***************************************************************************/
#define ROPCODE(pc) program_decrypted_read_dword(pc)
#define ROPCODE(pc) memory_decrypted_read_dword(mips3.core.program, pc)

3
src/emu/cpu/mips/mips3com.c
View File

@ -83,12 +83,13 @@ void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, const
mips->cpu_clock = clock;
mips->irq_callback = irqcallback;
mips->device = device;
mips->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
mips->icache_size = config->icache;
mips->dcache_size = config->dcache;
mips->system_clock = config->system_clock;
/* set up the endianness */
mips->memory = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM)->accessors;
mips->memory = mips->program->accessors;
/* allocate the virtual TLB */
mips->vtlb = vtlb_alloc(device, ADDRESS_SPACE_PROGRAM, 2 * MIPS3_TLB_ENTRIES + 2, 0);

1
src/emu/cpu/mips/mips3com.h
View File

@ -196,6 +196,7 @@ struct _mips3_state
mips3_flavor flavor;
cpu_irq_callback irq_callback;
const device_config *device;
const address_space *program;
UINT32 system_clock;
UINT32 cpu_clock;
UINT64 count_zero_time;

763
src/emu/cpu/mips/r3000.c
View File

File diff suppressed because it is too large Load Diff