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Rewrote 8080/8085 interrupt handling so that it makes sense.

Browse Source 
Changed 8080/8085 callbacks to be specified in a config structure.
Converted 8080/8085 core to cpu_state_table.
Changed to a single HAS_808X define for both cores.
Fixed several drivers that used interrupts in odd ways.
Converted warpwarp driver to raw video parameters.
This commit is contained in:
Aaron Giles 2008-12-22 03:18:03 +00:00
parent 9f29926c2f
commit 8213a7af4f
16 changed files with 758 additions and 795 deletions
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5
src/emu/cpu/cpu.mak
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@ -622,10 +622,9 @@ $(CPUOBJ)/e132xs/e132xs.o: $(CPUSRC)/e132xs/e132xs.c \
# Intel 8080/8085A
#-------------------------------------------------
CPUDEFS += -DHAS_8080=$(if $(filter 8080,$(CPUS)),1,0)
CPUDEFS += -DHAS_8085A=$(if $(filter 8085A,$(CPUS)),1,0)
CPUDEFS += -DHAS_I8085=$(if $(filter I8085,$(CPUS)),1,0)
ifneq ($(filter 8080 8085A,$(CPUS)),)
ifneq ($(filter I8085,$(CPUS)),)
OBJDIRS += $(CPUOBJ)/i8085
CPUOBJS += $(CPUOBJ)/i8085/i8085.o
DBGOBJS += $(CPUOBJ)/i8085/8085dasm.o

1243
src/emu/cpu/i8085/i8085.c
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File diff suppressed because it is too large Load Diff

111
src/emu/cpu/i8085/i8085.h
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@ -1,94 +1,65 @@
#ifndef I8085_H
#define I8085_H
#ifndef __I8085_H__
#define __I8085_H__
#include "cpuintrf.h"
enum
{
I8085_PC=1, I8085_SP, I8085_AF ,I8085_BC, I8085_DE, I8085_HL,
I8085_HALT, I8085_IM, I8085_IREQ, I8085_ISRV, I8085_VECTOR,
I8085_TRAP_STATE, I8085_INTR_STATE,
I8085_RST55_STATE, I8085_RST65_STATE, I8085_RST75_STATE, I8085_STATUS
};
/***************************************************************************
CONSTANTS
***************************************************************************/
enum
{
CPUINFO_FCT_I8085_SOD_CALLBACK = CPUINFO_FCT_CPU_SPECIFIC,
CPUINFO_FCT_I8085_SID_CALLBACK,
CPUINFO_FCT_I8085_INTE_CALLBACK,
CPUINFO_FCT_I8085_STATUS_CALLBACK,
CPUINFO_INT_I8085_SID = CPUINFO_INT_CPU_SPECIFIC
I8085_PC, I8085_SP, I8085_AF, I8085_BC, I8085_DE, I8085_HL,
I8085_A, I8085_B, I8085_C, I8085_D, I8085_E, I8085_H, I8085_L,
I8085_STATUS, I8085_SOD, I8085_SID, I8085_INTE,
I8085_HALT, I8085_IM,
I8085_GENPC = REG_GENPC,
I8085_GENSP = REG_GENSP,
I8085_GENPCBASE = REG_GENPCBASE
};
typedef void (*i8085_sod_func)(const device_config *device, int state);
typedef int (*i8085_sid_func)(const device_config *device);
typedef void (*i8085_inte_func)(const device_config *device, int state);
typedef void (*i8085_status_func)(const device_config *device, UINT8 status);
#define I8085_INTR_LINE 0
#define I8085_RST55_LINE 1
#define I8085_RST65_LINE 2
#define I8085_RST75_LINE 3
CPU_GET_INFO( i8085 );
#define CPU_8085A CPU_GET_INFO_NAME( i8085 )
/**************************************************************************
* I8080 section
**************************************************************************/
#if (HAS_8080)
#define I8080_PC I8085_PC
#define I8080_SP I8085_SP
#define I8080_BC I8085_BC
#define I8080_DE I8085_DE
#define I8080_HL I8085_HL
#define I8080_AF I8085_AF
#define I8080_HALT I8085_HALT
#define I8080_IREQ I8085_IREQ
#define I8080_ISRV I8085_ISRV
#define I8080_VECTOR I8085_VECTOR
#define I8080_TRAP_STATE I8085_TRAP_STATE
#define I8080_INTR_STATE I8085_INTR_STATE
#define I8080_STATUS I8085_STATUS
#define I8080_REG_LAYOUT \
{ CPU_8080, \
I8080_AF,I8080_BC,I8080_DE,I8080_HL,I8080_SP,I8080_PC, DBG_ROW, \
I8080_HALT,I8080_IREQ,I8080_ISRV,I8080_VECTOR, I8080_STATUS, \
DBG_END }
#define I8080_INTR_LINE I8085_INTR_LINE
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
typedef void (*i8085_sod_func)(const device_config *device, int state);
typedef int (*i8085_sid_func)(const device_config *device);
typedef void (*i8085_inte_func)(const device_config *device, int state);
typedef void (*i8085_status_func)(const device_config *device, UINT8 status);
typedef struct _i8085_config i8085_config;
struct _i8085_config
{
i8085_inte_func inte; /* INTE changed callback */
i8085_status_func status; /* STATUS changed callback */
i8085_sod_func sod; /* SOD changed callback (8085A only) */
i8085_sid_func sid; /* SID changed callback (8085A only) */
};
/***************************************************************************
FUNCTION PROTOTYPES
***************************************************************************/
CPU_GET_INFO( i8080 );
#define CPU_8080 CPU_GET_INFO_NAME( i8080 )
#endif
CPU_GET_INFO( i8085 );
#define CPU_8085A CPU_GET_INFO_NAME( i8085 )
CPU_DISASSEMBLE( i8085 );
INLINE void i8085_set_sod_callback(const device_config *device, i8085_sod_func callback)
{
device_set_info_fct(device, CPUINFO_FCT_I8085_SOD_CALLBACK, (genf *)callback);
}
INLINE void i8085_set_sid_callback(const device_config *device, i8085_sid_func callback)
{
device_set_info_fct(device, CPUINFO_FCT_I8085_SID_CALLBACK, (genf *)callback);
}
INLINE void i8085_set_inte_callback(const device_config *device, i8085_inte_func callback)
{
device_set_info_fct(device, CPUINFO_FCT_I8085_INTE_CALLBACK, (genf *)callback);
}
INLINE void i8085_set_status_callback(const device_config *device, i8085_status_func callback)
{
device_set_info_fct(device, CPUINFO_FCT_I8085_STATUS_CALLBACK, (genf *)callback);
}
INLINE void i8085_set_sid(const device_config *device, int sid)
{
device_set_info_int(device, CPUINFO_INT_I8085_SID, sid);
}
#define i8085_set_sid(cpu, sid) cpu_set_reg(cpu, I8085_SID, sid)
#endif

16
src/emu/cpu/i8085/i8085cpu.h
View File

@ -21,15 +21,13 @@
#define CF 0x01
#define IM_SID 0x80
#define IM_SOD 0x40
//#define IM_IEN 0x20
#define IM_INTR 0x20 //AT: the 8085 ignores bit 0x20. we move IM_INTR here for compatibility.
#define IM_TRAP 0x10
//#define IM_INTR 0x08
#define IM_IEN 0x08 //AT: RIM returns IEN status on this bit. SIM checks this bit to allow masking RST55-75
#define IM_RST75 0x04
#define IM_RST65 0x02
#define IM_RST55 0x01
#define IM_I75 0x40
#define IM_I65 0x20
#define IM_I55 0x10
#define IM_IE 0x08
#define IM_M75 0x04
#define IM_M65 0x02
#define IM_M55 0x01
#define ADDR_TRAP 0x0024
#define ADDR_RST55 0x002c

78
src/emu/cpu/z80/z80.c
View File

@ -3621,15 +3621,15 @@ static CPU_SET_INFO( z80 )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(z80, INPUT_LINE_NMI, info->i); break;
case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(z80, 0, info->i); break;
case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(z80, 0, info->i); break;
/* --- the following bits of info are set as pointers to data or functions --- */
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_op: cc[Z80_TABLE_op] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_cb: cc[Z80_TABLE_cb] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ed: cc[Z80_TABLE_ed] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_xy: cc[Z80_TABLE_xy] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_xycb: cc[Z80_TABLE_xycb] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ex: cc[Z80_TABLE_ex] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_op: cc[Z80_TABLE_op] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_cb: cc[Z80_TABLE_cb] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ed: cc[Z80_TABLE_ed] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_xy: cc[Z80_TABLE_xy] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_xycb: cc[Z80_TABLE_xycb] = info->p; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ex: cc[Z80_TABLE_ex] = info->p; break;
}
}
@ -3645,40 +3645,40 @@ CPU_GET_INFO( z80 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z80_state); break;
case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z80_state); break;
case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
case CPUINFO_INT_DATABUS_WIDTH_PROGRAM: info->i = 8; break;
case CPUINFO_INT_ADDRBUS_WIDTH_PROGRAM: info->i = 16; break;
case CPUINFO_INT_ADDRBUS_SHIFT_PROGRAM: info->i = 0; break;
case CPUINFO_INT_DATABUS_WIDTH_IO: info->i = 8; break;
case CPUINFO_INT_ADDRBUS_WIDTH_IO: info->i = 16; break;
case CPUINFO_INT_ADDRBUS_SHIFT_IO: info->i = 0; break;
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = z80->nmi_state; break;
case CPUINFO_INT_INPUT_STATE + 0: info->i = z80->irq_state; break;
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = z80->nmi_state; break;
case CPUINFO_INT_INPUT_STATE + 0: info->i = z80->irq_state; break;
/* --- the following bits of info are returned as pointers to functions --- */
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z80); break;
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z80); break;
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z80); break;
case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(z80); break;
case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z80); break;
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z80); break;
case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z80); break;
case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z80); break;
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z80); break;
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z80); break;
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z80); break;
case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(z80); break;
case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z80); break;
case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z80); break;
case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z80); break;
case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z80); break;
/* --- the following bits of info are returned as pointers --- */
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z80->icount; break;
case CPUINFO_PTR_STATE_TABLE: info->state_table = &z80->state; break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z80->icount; break;
case CPUINFO_PTR_STATE_TABLE: info->state_table = &z80->state; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_op: info->p = (void *)cc[Z80_TABLE_op]; break;
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_cb: info->p = (void *)cc[Z80_TABLE_cb]; break;
@ -3688,10 +3688,10 @@ CPU_GET_INFO( z80 )
case CPUINFO_PTR_Z80_CYCLE_TABLE + Z80_TABLE_ex: info->p = (void *)cc[Z80_TABLE_ex]; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s, "Z80"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Zilog Z80"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "3.8"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_NAME: strcpy(info->s, "Z80"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Zilog Z80"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "3.8"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
case CPUINFO_STR_FLAGS:

12
src/mame/audio/redalert.c
View File

@ -183,11 +183,13 @@ static int sid_callback(const device_config *device)
}
static SOUND_START( redalert_voice )
static const i8085_config redalert_voice_i8085_config =
{
i8085_set_sod_callback(machine->cpu[2], sod_callback);
i8085_set_sid_callback(machine->cpu[2], sid_callback);
}
NULL, /* INTE changed callback */
NULL, /* STATUS changed callback */
sod_callback, /* SOD changed callback (8085A only) */
sid_callback /* SID changed callback (8085A only) */
};
static ADDRESS_MAP_START( redalert_voice_map, ADDRESS_SPACE_PROGRAM, 8 )
@ -208,7 +210,6 @@ ADDRESS_MAP_END
static SOUND_START( redalert )
{
SOUND_START_CALL(redalert_audio);
SOUND_START_CALL(redalert_voice);
}
@ -242,6 +243,7 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( redalert_audio_voice )
MDRV_CPU_ADD("voice", 8085A, REDALERT_VOICE_CPU_CLOCK)
MDRV_CPU_CONFIG(redalert_voice_i8085_config)
MDRV_CPU_PROGRAM_MAP(redalert_voice_map,0)
MDRV_SOUND_ADD("cvsd", HC55516, REDALERT_HC55516_CLOCK)

15
src/mame/drivers/dwarfd.c
View File

@ -539,12 +539,21 @@ static void dwarfd_sod_callback(const device_config *device, int nSO)
crt_access=nSO;
}
static const i8085_config dwarfd_i8085_config =
{
NULL, /* INTE changed callback */
NULL, /* STATUS changed callback */
dwarfd_sod_callback, /* SOD changed callback (8085A only) */
NULL /* SID changed callback (8085A only) */
};
#define NUM_LINES 25
static INTERRUPT_GEN( dwarfd_interrupt )
{
if(cpu_getiloops(device) < NUM_LINES)
{
i8085_set_sod_callback(device, dwarfd_sod_callback);
cpu_set_input_line(device,I8085_RST65_LINE,HOLD_LINE); // 34 - every 8th line
line=cpu_getiloops(device);
idx=0;
@ -689,7 +698,7 @@ static MACHINE_DRIVER_START( dwarfd )
/* basic machine hardware */
/* FIXME: The 8085A had a max clock of 6MHz, internally divided by 2! */
MDRV_CPU_ADD("main", 8085A, 10595000/3*2) /* ? MHz */
MDRV_CPU_CONFIG(dwarfd_i8085_config)
MDRV_CPU_PROGRAM_MAP(mem_map, 0)
MDRV_CPU_IO_MAP(io_map, 0)
@ -776,8 +785,6 @@ static DRIVER_INIT(dwarfd)
// src[i] = src[i]&0xe0;
}
i8085_set_sod_callback(machine->cpu[0], dwarfd_sod_callback);
videobuf=auto_malloc(0x8000);
dwarfd_ram=auto_malloc(0x1000);
memset(videobuf,0,0x8000);

21
src/mame/drivers/n8080.c
View File

@ -93,23 +93,22 @@ static void n8080_status_callback(const device_config *device, UINT8 status)
}
}
static MACHINE_START( spacefev )
static const i8085_config n8080_cpu_config =
{
const device_config *cpu = cputag_get_cpu(machine, "main");
i8085_set_status_callback(cpu, n8080_status_callback);
i8085_set_inte_callback(cpu, n8080_inte_callback);
}
n8080_inte_callback, /* INTE changed callback */
n8080_status_callback, /* STATUS changed callback */
NULL, /* SOD changed callback (8085A only) */
NULL, /* SID changed callback (8085A only) */
};
static MACHINE_DRIVER_START( spacefev )
/* basic machine hardware */
MDRV_CPU_ADD("main", 8080, 20160000 / 10)
MDRV_CPU_CONFIG(n8080_cpu_config)
MDRV_CPU_PROGRAM_MAP(main_cpu_map, 0)
MDRV_CPU_IO_MAP(main_io_map, 0)
MDRV_MACHINE_START(spacefev)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
@ -134,11 +133,10 @@ static MACHINE_DRIVER_START( sheriff )
/* basic machine hardware */
MDRV_CPU_ADD("main", 8080, 20160000 / 10)
MDRV_CPU_CONFIG(n8080_cpu_config)
MDRV_CPU_PROGRAM_MAP(main_cpu_map, 0)
MDRV_CPU_IO_MAP(main_io_map, 0)
MDRV_MACHINE_START(spacefev)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
@ -163,11 +161,10 @@ static MACHINE_DRIVER_START( helifire )
/* basic machine hardware */
MDRV_CPU_ADD("main", 8080, 20160000 / 10)
MDRV_CPU_CONFIG(n8080_cpu_config)
MDRV_CPU_PROGRAM_MAP(helifire_main_cpu_map, 0)
MDRV_CPU_IO_MAP(main_io_map, 0)
MDRV_MACHINE_START(spacefev)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)

16
src/mame/drivers/phoenix.c
View File

@ -504,10 +504,19 @@ MACHINE_DRIVER_END
/* Same as Phoenix, but uses an AY8910 and an extra visible line (column) */
static const i8085_config survival_i8085_config =
{
NULL, /* INTE changed callback */
NULL, /* STATUS changed callback */
NULL, /* SOD changed callback (8085A only) */
survival_sid_callback /* SID changed callback (8085A only) */
};
static MACHINE_DRIVER_START( survival )
/* basic machine hardware */
MDRV_CPU_ADD("main", 8085A, CPU_CLOCK) /* 5.50 MHz */
MDRV_CPU_CONFIG(survival_i8085_config)
MDRV_CPU_PROGRAM_MAP(survival_memory_map, 0)
MDRV_MACHINE_RESET(phoenix)
@ -1019,11 +1028,6 @@ static DRIVER_INIT( condor )
memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5000, 0x5000, 0, 0, input_port_read_handler8(machine->portconfig, "DSW1") );
}
static DRIVER_INIT( survival )
{
i8085_set_sid_callback(machine->cpu[0], survival_sid_callback);
}
GAME( 1980, phoenix, 0, phoenix, phoenix, 0, ROT90, "Amstar", "Phoenix (Amstar)", GAME_SUPPORTS_SAVE )
@ -1049,4 +1053,4 @@ GAME( 1981, pleiadbl, pleiads, pleiads, pleiads, 0, ROT90, "bootleg",
GAME( 1981, pleiadce, pleiads, pleiads, pleiadce, 0, ROT90, "Tehkan (Centuri license)", "Pleiads (Centuri)", GAME_IMPERFECT_COLORS )
GAME( 1981, capitol, pleiads, phoenix, capitol, 0, ROT90, "Universal Video Spiel", "Capitol", GAME_IMPERFECT_COLORS )
GAME( 1982, survival, 0, survival, survival, survival, ROT90, "Rock-ola", "Survival", GAME_IMPERFECT_COLORS )
GAME( 1982, survival, 0, survival, survival, 0, ROT90, "Rock-ola", "Survival", GAME_IMPERFECT_COLORS )

6
src/mame/drivers/rotaryf.c
View File

@ -31,8 +31,10 @@ static INTERRUPT_GEN( rotaryf_interrupt )
if (video_screen_get_vblank(device->machine->primary_screen))
cpu_set_input_line(device, I8085_RST55_LINE, HOLD_LINE);
else
cpu_set_input_line(device, I8085_RST75_LINE, HOLD_LINE);
{
cpu_set_input_line(device, I8085_RST75_LINE, ASSERT_LINE);
cpu_set_input_line(device, I8085_RST75_LINE, CLEAR_LINE);
}
}

2
src/mame/drivers/spcforce.c
View File

@ -256,7 +256,7 @@ static MACHINE_DRIVER_START( spcforce )
/* FIXME: The 8085A had a max clock of 6MHz, internally divided by 2! */
MDRV_CPU_ADD("main", 8085A, 8000000 * 2) /* 4.00 MHz??? */
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
MDRV_CPU_VBLANK_INT("main", irq3_line_hold)
MDRV_CPU_VBLANK_INT("main", irq3_line_pulse)
MDRV_CPU_ADD("audio", I8035, 6144000) /* divisor ??? */
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)

3
src/mame/drivers/statriv2.c
View File

@ -620,7 +620,8 @@ GFXDECODE_END
static INTERRUPT_GEN( statriv2_interrupt )
{
cpu_set_input_line(device, I8085_RST75_LINE, HOLD_LINE);
cpu_set_input_line(device, I8085_RST75_LINE, ASSERT_LINE);
cpu_set_input_line(device, I8085_RST75_LINE, CLEAR_LINE);
}
static MACHINE_DRIVER_START( statriv2 )

18
src/mame/drivers/warpwarp.c
View File

@ -133,6 +133,8 @@ TODO:
#include "geebee.lh"
#include "sos.lh"
#define MASTER_CLOCK XTAL_18_432MHz
/*******************************************************
*
@ -734,18 +736,15 @@ static const custom_sound_interface warpwarp_custom_interface =
static MACHINE_DRIVER_START( geebee )
/* basic machine hardware */
MDRV_CPU_ADD("main", 8080,XTAL_18_432MHz/9) /* verified on pcb */
MDRV_CPU_ADD("main", 8080, MASTER_CLOCK/9) /* verified on pcb */
MDRV_CPU_PROGRAM_MAP(geebee_map,0)
MDRV_CPU_IO_MAP(geebee_port_map,0)
MDRV_CPU_VBLANK_INT("main", irq0_line_pulse)
MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(34*8, 28*8)
MDRV_SCREEN_VISIBLE_AREA(0*8, 34*8-1, 0*8, 28*8-1)
MDRV_SCREEN_RAW_PARAMS(MASTER_CLOCK/3, 384, 0, 272, 264, 0, 224)
MDRV_GFXDECODE(1k)
MDRV_PALETTE_LENGTH(4*2)
@ -778,17 +777,14 @@ MACHINE_DRIVER_END
static MACHINE_DRIVER_START( bombbee )
/* basic machine hardware */
MDRV_CPU_ADD("main", 8080,18432000/9) /* 18.432 MHz / 9 */
MDRV_CPU_ADD("main", 8080, MASTER_CLOCK/9) /* 18.432 MHz / 9 */
MDRV_CPU_PROGRAM_MAP(bombbee_map,0)
MDRV_CPU_VBLANK_INT("main", irq0_line_assert)
/* video hardware */
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_REFRESH_RATE(60)
MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* frames per second, vblank duration */)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
MDRV_SCREEN_SIZE(34*8, 28*8)
MDRV_SCREEN_VISIBLE_AREA(0*8, 34*8-1, 0*8, 28*8-1)
MDRV_SCREEN_RAW_PARAMS(MASTER_CLOCK/3, 384, 0, 272, 264, 0, 224)
MDRV_GFXDECODE(color)
MDRV_PALETTE_LENGTH(2*256+1)

3
src/mame/mame.mak
View File

@ -35,8 +35,7 @@ OBJDIRS += \
CPUS += Z80
CPUS += Z180
CPUS += 8080
CPUS += 8085A
CPUS += I8085
CPUS += M6502
CPUS += M65C02
CPUS += M65SC02

2
src/mame/video/hyprduel.c
View File

@ -483,6 +483,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta
gfx.line_modulo = width;
gfx.char_modulo = 0; /* doesn't matter */
gfx.flags = 0;
gfx.machine = machine;
/* Bounds checking */
if ( (gfxdata + width * height - 1) >= gfx_max )
@ -514,6 +515,7 @@ static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const recta
gfx.line_modulo = width/2;
gfx.char_modulo = 0; /* doesn't matter */
gfx.flags = GFX_ELEMENT_PACKED;
gfx.machine = machine;
/* Bounds checking */
if ( (gfxdata + width/2 * height - 1) >= gfx_max )

2
src/mame/video/metro.c
View File

@ -704,6 +704,7 @@ void metro_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectan
gfx.line_modulo = width;
gfx.char_modulo = 0; /* doesn't matter */
gfx.flags = 0;
gfx.machine = machine;
/* Bounds checking */
if ( (gfxdata + width * height - 1) >= gfx_max )
@ -735,6 +736,7 @@ void metro_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectan
gfx.line_modulo = width/2;
gfx.char_modulo = 0; /* doesn't matter */
gfx.flags = GFX_ELEMENT_PACKED;
gfx.machine = machine;
/* Bounds checking */
if ( (gfxdata + width/2 * height - 1) >= gfx_max )