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ins8250: Allow writes to MSR with lower 4 bits zero to clear the associated interrupt. This is not confirmed behavior, but is logically consistent with nonzero bits causing interrupts when written.

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This commit is contained in:
AJR 2019-01-21 14:00:19 -05:00
parent c1e0711dc4
commit 83bc3035e6
1 changed files with 2 additions and 0 deletions
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src/devices/machine/ins8250.cpp
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@ -390,6 +390,8 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
if ( m_regs.msr & 0x0f )
trigger_int(COM_INT_PENDING_MODEM_STATUS_REGISTER);
else
clear_int(COM_INT_PENDING_MODEM_STATUS_REGISTER);
break;
case 7:
m_regs.scr = data;