Adds readmes for Cosmo, Don Den Lover, Beatmania (CHD dumping), Dragon Master, Gals Panic, Fantasia II, Grand Tour, New Dyna Blaster Global Quest, Daytona "To The MAXX" upgrade, Namco System FL, Great Sluggers, Gun Nail, Gun & Frontier, Elevator Action Returns, and Battle Bakraid.

(It's easy to do this while watching the olympics.  110 down today, 245 more to go.)
This commit is contained in:
Andrew Gardner 2008-08-10 06:46:41 +00:00
parent 3fd8c0941b
commit 842d5e37a1
20 changed files with 686 additions and 34 deletions

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@ -2104,6 +2104,23 @@ ROM_START( lrescuem )
ROM_LOAD( "cv02-7643.1c", 0x0400, 0x0400, CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) )
ROM_END
/*
Cosmo
TDS & Mints, 1979/80?
Notes:
This game runs on modified "original" Taito (3 board) Space Invaders hardware.
There are approx. 70 (or more) wires tied to various parts of the boards, plus
there is an extra board on top of the sound board with a *HUGE* amount of wires
running to it from the main boards. There are 2 EPROMs on the top board that appear
to be for use with colour generation or extra sounds(?) The PROMs on the middle board
have been removed and in their place are a pile of wires that join to the top board.
The remainder of the hardware is just standard Taito Space Invaders..... including
a SN76477 and the discrete components for sound generation.
Note that the sounds and gameplay of Cosmo are VERY different from Space Invaders.
*/
ROM_START( cosmo )
ROM_REGION( 0x10000, "main", 0 )
ROM_LOAD( "1.36", 0x0000, 0x0800, CRC(445c9a98) SHA1(89bce80a061e9c12544231f970d9dec801eb1b94) )

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@ -15,6 +15,10 @@
Super Bishi Bashi Champ (Korean version)
Konami, 1998
[Identical]
Bishi Bashi Champ (Korean version)
Konami, 1996
PCB Layout ROM
---------- Daughterboard (on top)
||

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@ -7586,7 +7586,36 @@ ROM_START( ddenlovr )
ROM_LOAD( "1132h.1e", 0x100000, 0x080000, CRC(2de6363d) SHA1(2000328e41bc0261f19e02323434e9dfdc61013a) ) // bank 4, 5
ROM_END
/* Korean bootleg board */
/*
Don Den Lover (bootleg)
PCB Layout
----------
|------------------------------------|
| ROM1 TC524258 |
| PAL PAL TC524258 |
| M6295 TC524258 |
| YM2413 6264 TC524258 PAL |
|J 28MHz TC524258 |
|A BATTERY |
|M ACTEL |
|M A1020 |
|A PAL |
| 32MHz ACTEL ROM4|
| DSW1 PAL A1020 ROM5|
| 62256 ROM2 ROM6|
| 62256 ROM3 ACTEL ROM7|
| 68000 A1020 ROM8|
|------------------------------------|
Notes:
68000 clock 14.00MHz [28/2]
YM2413 clock 3.50MHz [28/8]
M6295 clock 1.00MHz [32/32]
HSync 15.30kHz
VSync 60Hz
*/
ROM_START( ddenlovb )
ROM_REGION( 0x080000, "main", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "rom2", 0x000000, 0x040000, CRC(cabdf78f) SHA1(789d4754c7b84964ee317b8a618f26a417f50bcc) )

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@ -37,6 +37,32 @@
*
*/
/*
Dumping a HD image.
2.5 inch 2.5 to 2.5 to
hard drive 3.5 adapter long 3.5 IDE cable 3.5 adapter PCB
/---|- |----------------------| -|---\
|------|- |-/ |- |----------------------| -| \-| -|
| |- | |- |----------------------| -| | -|
|------|- |-\ |- |----------------------| -| /-| -|
\---|- |----------------------| -|---/
|| ||
|| /\ ||<-- Power connector
|| || not used
|| ||
||
--------- unplug here
| PC | when game PCB is booted
|Power | and working. Boot Windows and stop at menu (F8)
|Supply | Then plug HD into PC IDE controller, and continue boot process
|+5V and| then dump the hard drive with Winhex
|GND | once PC is booted up again.
---------
*/
#include "driver.h"
#include "deprecat.h"
#include "cpu/m68000/m68000.h"

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@ -6,6 +6,32 @@ the hardware seems to fall somewhere between the
hardware playmark commonly used and the hardware
unico used for zero point etc.
PCB Layout
----------
DM1001 DM1002 6116 6116 DM1003
6295 6295 6116 *PLCC84 DM1004
6116 DM1005
PIC16C55 DM1006
6116 6116 DM1007
6116 6116 DM1008
6116
6116
TPC1020
DSW1 62256 62256 (PLCC84)
DM1000A DM1000B
DSW2 68000 TPC1020 62256
(PLCC84) 62256
12MHz 32MHz
Notes:
*: Unknown PLCC84 chip (surface scratched)
VSync: 60Hz
HSync: 15.625kHz
68K clock: 16MHz
*/
#include "driver.h"

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@ -43,11 +43,23 @@ EXPRO-02
Notes
-----
GP-U27/U41 - These are DIP40 chips, but are not MCUs because there is no stable
clock input on any of the pins of these chips. They're not ROMs either
because the pinout doesn't match any known EPROMs.
There are no markings on the chips other than 'GP-U27' & 'GP-U41'
If GP-U41 is removed, on bootup the PCB gives an error 'BG ERROR' and
a memory address. If GP-U27 is removed, the PCB works but there are no
background graphics.
68000 clock - 12.0MHz
CALC1-CHIP clock - 16.0MHz
GP-U41 clocks - pins 21 & 22 - 12.0MHz, pins 1 & 2 - 6.0MHz, pins 8 & 9 - 15.6249kHz (HSync?)
GP-U27 clock - none (so it's not an MCU)
OKI M6295 clock - 2.0MHz (12/6). pin7 = low
(TODO: which is correct?)
OKI M6295 clock - 2.0MHz (12/6). pin7 = low
OKI M6295 clock - 2.000 MHz [16/8]. Sample rate 2000000/165
VSync - 60Hz
HSync - 15.68kHz
MC-8282 - Kaneko custom I/O JAMMA ceramic module

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@ -2,7 +2,7 @@
TS 2004.10.22. analog[at]op.pl
- fixed sprite issues
- added backgrounds and terrain info (external roms)
- added backgrounds and terrain info (external roms)
(press buttons 1+2 at the same time, to release 'army' ;)
@ -10,7 +10,7 @@
- fix colours (sprites , bg)
*/
/* dump info
/*
Field Combat (c)1985 Jaleco
@ -24,7 +24,6 @@ RAM: 6116 (x3)
X-TAL: 20 MHz
inputs + notes by stephh
*/

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@ -1097,6 +1097,32 @@ ROM_START( galpania ) /* PAMERA-04 PCB with the CALC1 MCU used */
ROM_LOAD( "pm007e.u", 0xc0000, 0x80000, CRC(c7ed7950) SHA1(133258b058d3c562208d0d00b9fac71202647c32) )
ROM_END
/*
Fantasia II
Comad, 1997
Game is a copy/clone of Qix etc, with the usual Comad theme.....
The hardware looks much nicer/cleaner and more professionally made than previous
Comad boards I've seen also.
CPU : MC68000P12
Sound : AD-65 (OKI M6295)
Osc. : 12.000MHz, 16.000MHz (both near 68000 & PLCC84)
DIP Sw: 8 position (x2)
RAM : 62256 (x12), 6116 (x4)
PALs : plenty .....
OTHER : ACTEL A1020B (84 Pin PLCC)
ROMs: (all type 27C040)
music* - oki samples / music
prog* - main program
obj* - objects
scr* - gfx
*/
ROM_START( fantasia )
ROM_REGION( 0x500000, "main", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "prog2_16.rom", 0x000000, 0x80000, CRC(e27c6c57) SHA1(420b66928c46e76fa2496f221691dd6c34542287) )

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@ -22,17 +22,22 @@ lev 7 : 0x7c : 0000 0142 -
PCB Layout
----------
M6295 U210 6264 U512
6264 U511
ACTEL
A1020A 14.31818MHz
DSW1 6116
6116
6116
6116
6264 6264
U1 U2 U425 U426
68000P10 U421 U420
|---------------------------------|
| |
| M6295 U210 6264 U512 |
| 6264 U511 |
| ACTEL |
|J A1020A 14.31818MHz |
|A |
|M DSW1 6116 |
|M 6116 |
|A |
| 6116 |
| 6116 |
| 6264 6264 |
| U1 U2 |
| 68000P10 U421 U420 |
|---------------------------------|
*/

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@ -356,6 +356,49 @@ ROM_START( iqblock )
ROM_LOAD( "u24.5", 0x4000, 0x4000, CRC(61050e1e) SHA1(1f7185b2a5a2e237120276c95344744b146b4bf6) )
ROM_END
/*
Grand Tour
IGS, 1993
This game probably runs on the same board as IGS's IQ Block.
Two of the PALs are labelled GRAND3 and GRAND4. However, there may be other
games that run on this same PCB also, since three of the PALs are
labelled AF1, AF2 and AF3, meaning the main/first game to run on this
hardware was called A-something F-something.
PCB Layout
----------
IGS PCB N0. 0036-5
----------------------------------------------
| 6264 |
| UM3567 GRAND6 |
| 3.579545MHz GRAND1 |
| GRAND7 |
| GRAND2 |
|J |
|A GRAND3 |
|M Z80 |
|M GRAND4 |
|A PAL |
| 6116 GRAND5 |
| 6116 IGS001 IGS002 PAL |
| 6264 |
| PAL |
| 8255 PAL |
| PAL 12MHz |
| DSW2(8) DSW1(8) |
----------------------------------------------
Notes:
Z80 clock: 5.997MHz
VSync: 60Hz
HSync: 15.21kHz
UM3567 compatible with YM2413
*/
ROM_START( grndtour )
ROM_REGION( 0x20000, "main", 0 ) /* 64k for code + 64K for extra RAM */
ROM_LOAD( "grand7.u7", 0x0000, 0x10000, CRC(95cac31e) SHA1(47bbcce6981ea3d38e0aa49ccd3762a4529f3c96) )

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@ -2123,7 +2123,7 @@ static DRIVER_INIT( samplebank )
U19 "
U18 "
Bakuretsu Breaker
Bakuretsu Breaker / Explosive Breaker
Kaneko, 1992
PCB Layout

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@ -1075,6 +1075,46 @@ ROM_START( dynablsb )
/* Does this have a sample rom? */
ROM_END
/*
New Dyna Blaster Global Quest
Irem, 1992
PCB Layout
----------
M99-A-A 05C04369A1 MADE IN JAPAN
License Sticker - 'BOMBER MAN WORLD NEW DYNA BLASTER'
|--------------------------------------------------|
| |----------| |
| YM3014 |IREM | |
|VOL 3.579545MHZ|D9000001A1| PAL2 4364 |
| LM358 |----------| |
| BBM2-V0- 4364 |
| |----------| |
| 4364 |NANAO | BBM2-H0-B|
|J M51953|08J27291A5| |
|A BBM2-SP- |015 | |
|M D70008AC-6 | | BBM2-L0-B|
|M |----------| |
|A 6116 32MHz BBM2-C0- |
| |
| DSW1 6116 26.6666MHz BBM2-C1- |
| |
| PAL1 43256 |-------| BBM2-C2- |
| | NANAO | |
| DSW2 43256 | GA25 | BBM2-C3- |
| |-------| |
|--------------------------------------------------|
Notes:
D70008AC-6 : NEC D70008AC-6 Z80 compatible CPU, clock 3.579545MHz
YM2151 clock: 3.579545MHz
PAL1 : PAL16L8 labelled 'M99 A-4S-'
PAL2 : PAL16L8 labelled 'M99 A-8C-'
HSync : 15.42kHz
VSync : 60Hz
*/
ROM_START( bbmanw )
ROM_REGION( CODE_SIZE, "main", 0 )
ROM_LOAD16_BYTE( "bbm2-h0-b.77", 0x00001, 0x40000, CRC(567d3709) SHA1(1447fc68798589a8757ee2d133d053b80f052113) )

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@ -4174,6 +4174,17 @@ ROM_START( daytonat )
ROM_LOAD("epr-14869c.25", 0x000000, 0x010000, CRC(24b68e64) SHA1(c19d044d4c2fe551474492aa51922587394dd371) )
ROM_END
/*
Daytona "To The MAXX" upgrade.
Unofficial Sega hack for Model 2 Daytona machines
Kits contains 4 IC's
3 of them are standard 27C1024 EPROMS
1 of them is a PIC 16F84 mounted to a small board the size of an EPROM
with a 40 pin socket mounted on it, which plugs into position IC15
*/
ROM_START( daytonam )
ROM_REGION( 0x200000, "main", 0 ) // i960 program
ROM_LOAD32_WORD( "maxx.12", 0x000000, 0x020000, CRC(604ef2d9) SHA1(b1d5f0d41bea2e74fb9346da35a5041f4464265e) )

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@ -52,6 +52,40 @@ SYSTEM-FL MAIN PCB 8636960100 (8636970100)
|25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 |
|--------------------------------------------------------------------------------------------|
RAM
---
4Y : CY7C199-25PC
4Z : CY7C199-25PC
5A : TC514256BZ-60
5P : LH528256N-70LL
6A : TC514256BZ-60
7A : TC514256BZ-60
7P : LH528256N-70LL
8A : TC514256BZ-60
8P : LH528256N-70LL
9A : TC514256BZ-60
10A: TC514256BZ-60
10P: LH528256N-70LL
11A: TC514256BZ-60
12A: TC514256BZ-60
12U: TC511632FL-70
12Y: TC511632FL-70
13U: TC511632FL-70
13Y: TC511632FL-70
14U: TC511632FL-70
14Y: TC511632FL-70
16U: TC511632FL-70
16Y: TC511632FL-70
19Y: M5M5178AFP-25
20Y: M5M5178AFP-25
21A: 65256BLFP-10T
21Y: M5M5178AFP-25
22A: 65256BLFP-10T
22T: LH528256N-70LL
22U: LH528256N-70LL
23E: M5M5256BFP-70LL
23F: M5M5256BFP-70LL
CUSTOM
------
4X : NAMCO C355 (sprite chip)

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@ -929,6 +929,132 @@ ROM_START( gslgr94u )
ROM_LOAD( "gse-sha0.bin", 0, 0x80000, CRC(6b2beabb) SHA1(815f7aef44735584edd4a9ca7e672471d07f225e) )
ROM_END
/*
Great Sluggers (Japan)
Namco, 1993
This game runs on Namco NB-1 hardware.
PCB Layout
----------
NB-1 MAIN PCB MEMEXT OBJ2 PCB
8634961101 (8634963101) 8635901201 (8635901301)
|------------------------------------------------------|---------|
| 62256 62256 | |
|LA4705 VOL M5M5178 62256 62256 |GS1OBJ-0 |
| M5M5178 C347 | |
| 4558 M5M5178 62256 62256 | |
| 62256 62256 | |
| LC78815 C116 156 | |
|JP3 62256 62256 62256 | |
| 145 62256 62256 62256 |GS1OBJ-1 |
| GS1SHA-0 | |
|J JP2 62256 62256 C355|---------|
|A 62256 62256 62256 |
|M 123 62256 |
|M JP12 |
|A %3 JP11 |
| JP5 GS1CHR-0 GS1CHR-2 JP10 137 187 M3771|
| GS1VOI-0 JP6 GS1CHR-1 GS1CHR-3 48.384MHz |
| |
| C352 |
|SW1 75 |
| |
| TC551001 %1 |
| KM28C16 GS1MPRU JP9 |
| TC551001 PAL2 %2 GS1MPRL |
| JP1 JP7 JP8 |
| GS1SPR0 PAL1 C329 68EC020 |
| |
|----------------------------------------------------------------|
Notes:
CLOCKs
------
MASTER clock : 48.384 MHz
68020 clock : 24.192MHz (MASTER / 2)
HSYNC : 15.75kHz
VSYNC : 59.7Hz
DIPs
----
SW1: 2 position, both are OFF. Position 1 toggles TEST mode, position 2 is freeze.
RAM
---
TC551001AFL x 2 (SOP32, 128k x8 SRAM)
62256 x 20 (SOP28, 32k x8 SRAM)
M5M5178 x 3 (SOP28, 8k x8 SRAM)
NAMCO CUSTOM CHIPS
------------------
75 (QFP80, M37702 in disguise; sound CPU with internal BIOS)
123 (QFP80)
137 (NDIP28)
145 (QFP80)
156 (QFP64)
187 (QFP120)
C116 (QFP64)
C329 (QFP100)
C347 (QFP80)
C351 (QFP160)
C352 (QFP100)
C355 (QFP160)
OTHER
-----
KM28C16 2K x8 EEPROM (DIP24)
%1 Unpopulated KEYCUS socket
%2 Unpopulated DATA ROM socket
%3 Unpopulated position for 28MHz OSC
PALs
----
PAL1 PALCE16V8 (NAMCO CODE = NB1-1)
PAL2 PAL16L8 (NAMCO CODE = NB1-2)
JUMPERs
-------
JP1 4M O-O O 1M Config jumper for ROM size, 4M = 27C4096, 1M = 27C1024
JP2 4M O-O O 1M Config jumper for ROM size, 4M = 27C4096, 1M = 27C1024
JP3 O-O (2 pins shorted, hardwired on PCB)
JP5 /1M O-O O 1M Config jumper for ROM size (hardwired on PCB)
JP6 8M O-O O /8M Config jumper for ROM size (hardwired on PCB)
JP7 4M O-O O 1M Config jumper for ROM size (hardwired on PCB), 4M = 27C4096, 1M = 27C1024
JP8 4M O-O O 1M Config jumper for ROM size (hardwired on PCB), 4M = 27C4096, 1M = 27C1024
JP9 CON O-O O COFF (hardwired on PCB)
JP10 24M O-O O 28M Config jumper for 28MHz OSC (hardwired on PCB)
JP11 24M O-O O 12M Config jumper for 28MHz OSC (hardwired on PCB)
JP12 F32 O O-O 355 (hardwired on PCB)
ROMs, MAIN PCB
--------------
Filename / PCB ROM
ROM Label Label Type
------------------------------------------------------------------------------
GS1MPRU.13B PRGU 27C240 \ Main program
GS1MPRL.15B PRGL 27C240 /
GS1SPR0.5B SPRG 27C240 Sound program, linked to 75, C351 and C352
GS1VOI-0.5J VOICE 16M MASK Sound voices
GS1CHR-0.8J CHR0 8M MASK Character
GS1CHR-1.9J CHR1 8M MASK Character
GS1CHR-2.10J CHR2 8M MASK Character
GS1CHR-3.11J CHR3 8M MASK Character
GS1SHA-0.5M SHAPE 4M MASK Shape
ROMs, MEMEXT OBJ2 PCB (All ROMs surface mounted)
---------------------
Filename / PCB ROM
ROM Label Label Type
----------------------------------------
GS1OBJ-0.IC1 OBJL 16M MASK SOP44
GS1OBJ-1.IC2 OBJU 16M MASK SOP44
Note! All ROMs are different to the Great Sluggers '94 set.
*/
ROM_START( gslugrsj )
ROM_REGION( 0x100000, "main", 0 ) /* main program */
ROM_LOAD32_WORD( "gs1mprl.15b", 0x00002, 0x80000, CRC(1e6c3626) SHA1(56abe21884fd87df10996db19c49ce14214d4b73) )
@ -1551,6 +1677,6 @@ GAME( 1997, sws97, 0, namconb1, namconb1, sws97, ROT0, "Namco", "S
GAME( 1994, vshoot, 0, namconb1, namconb1, vshoot, ROT0, "Namco", "J-League Soccer V-Shoot", GAME_IMPERFECT_SOUND )
/* YEAR, NAME, PARENT, MACHINE, INPUT, INIT, MNTR, COMPANY, FULLNAME, FLAGS */
GAME( 1994, outfxies, 0, namconb2, outfxies, outfxies, ROT0, "Namco", "Outfoxies", GAME_IMPERFECT_SOUND )
GAME( 1994, outfxies, 0, namconb2, outfxies, outfxies, ROT0, "Namco", "Outfoxies", GAME_IMPERFECT_SOUND )
GAME( 1994, outfxesj, outfxies, namconb2, outfxies, outfxies, ROT0, "Namco", "Outfoxies (Japan)", GAME_IMPERFECT_SOUND )
GAME( 1995, machbrkr, 0, namconb2, namconb1, machbrkr, ROT0, "Namco", "Mach Breakers - Numan Athletics 2 (Japan)", GAME_IMPERFECT_SOUND )
GAME( 1995, machbrkr, 0, namconb2, namconb1, machbrkr, ROT0, "Namco", "Mach Breakers - Numan Athletics 2 (Japan)", GAME_IMPERFECT_SOUND )

View File

@ -5782,16 +5782,77 @@ ROM_START( macross )
ROM_LOAD( "921a10", 0x0200, 0x0020, CRC(8371e42d) SHA1(6cfd70dfa00e85ec1df8832d41df331cc3e3733a) ) /* unknown */
ROM_END
/*
Gunnail (JPN Ver.)
(c)1992 NMK
AK92077
CPU :MC68000P12
Gun Nail
NMK/Tecmo, 1993
PCB Layout
----------
AK92077
|-------------------------------------------------------------|
| LA4460 VOL YM2203 6116 92077-2.U10 62256 62256 |
|-| 16MHz |------| 62256 62256 |
| 4558 6295 92077-6.U57 |NMK004| 62256 62256 |
|-| 12MHz | | 62256 62256 |
| YM3014 6295 92077-5.U56 |------| |
| |------| DIP2 |------| |------| |
|J |NMK005| |NMK009| |NMK009| |
|A | | DIP1 | | | | |
|M |------| 92077-10.U96 |------| |------| |
|M 6116 |
|A |------| 6116 6116 |------| |----------| |
| |NMK111| 6116 |NMK008| | NMK214 | |
| |------| | | |----------| |
|-| 92077-8.U35 |------|92077-9.U72|------| |
| |NMK902| |----------| |
|-| 6116 |------| | NMK215 | 92077-7.U134 |
| 6116 |------| |----------| |
| |------| 92077-1.U21 |NMK903| 92077-3O.U133|
| |NMK111| |----------| |------| 62256 92077-3E.U131|
| |------| | NMK214 | |------| 62256 |
| |----------| |NMK903| |----------------| |
| |------| |------| 6116 | | |
| |NMK111| 92077-4.U19 |------| | 68000 | |
| |------| |NMK901| 6116 | | |
| 6264 |------| |----------------| |
| 6264 10MHz |
|-------------------------------------------------------------|
Notes:
68000 - Motorola MC68000P12 CPU running at 10.000MHz (DIP64)
6116 - 2K x8 SRAM (x9, DIP24)
6264 - 8K x8 SRAM (x2, DIP28)
62256 - 32K x8 SRAM (x10, DIP28)
YM2203- Yamaha YM2203 (DIP40)
YM3014- Yamaha YM3014 (DIP8)
4558 - BA4558 Op Amp (DIP8)
LA4460- Power Amplifier
6295 - Oki M6295, running at MHz, sample rate (x2, QFP44)
DIP1/2- 8 position Dip Switches
VOL - Volume Potentiometer
NMK CUSTOM IC'S
- NMK004; Actually a TLCS90-based Toshiba TMP91P640F-10 MCU
with 16K internal OTP PROM, running at 8.000MHz [16 / 2] (QFP64)
Note that the internal ROM is secured :(
- NMK005 (x1, Square QFP64)
- NMK008 (x1, Square QFP84)
- NMK009 (x2, Square QFP100)
- NMK111 (x3, QFP64)
- NMK901 (x1, QFP80)
- NMK903 (x2, QFP44)
- NMK214 (x2, SDIP64)
- NMK215 (x1, SDIP64)
Sound:YM2203C,OKI M6295 x2
OSC :12.0000MHz,16.0000MHz,10.0000MHz
Other:NMK 111 x3,214 x2,901,903 x2,902,005,004,215,008,009 x2
*/
ROM_START( gunnail )
ROM_REGION( 0x80000, "main", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "3e.bin", 0x00000, 0x40000, CRC(61d985b2) SHA1(96daca603f18accb47f98a3e584b2c84fc5a2ca4) )
@ -6626,8 +6687,8 @@ static DRIVER_INIT( bubl2000 )
/*
Fire Hawk - ESD
---------------
Fire Hawk - ESD, 2001
---------------------
- To enter test mode, hold on button 1 at boot up

View File

@ -32,18 +32,13 @@ Notes:
68000 clock - 11.000MHz [22/2]
VSync - 58Hz
Hsync - none (dead board, no signal)
M6295 clock - 1.100MHz [22/20], sample rate = 1100000 / 165, chip is
printed 'AD-65'
YM2151 clock- 2.750MHz [22/8], chip is printed 'K-666'. YM3014 chip is
printed 'K-664'
M6295 clock - 1.100MHz [22/20], sample rate = 1100000 / 165, chip is printed 'AD-65'
YM2151 clock- 2.750MHz [22/8], chip is printed 'K-666'. YM3014 chip is printed 'K-664'
* - Unpopulated position for PIC16F84
3.6V_BATT - Purpose of battery unknown, does not appear to be used
for backup of suicide RAM,
3.6V_BATT - Purpose of battery unknown, does not appear to be used for backup of suicide RAM,
and there's no RTC on the board.
93C46 - 128 x8 EEPROM. This chip was covered by a plactic cover.
There's nothing else under
the cover, but there was an unpopulated position for a
PIC16F84
93C46 - 128 x8 EEPROM. This chip was covered by a plactic cover. There's nothing else under
the cover, but there was an unpopulated position for a PIC16F84
89C51 - Atmel 89C51 Microcontroller (protected)
ROMs -
@ -52,7 +47,6 @@ PIC16F84
A1 - Atmel AT27C080 (GFX)
B1 - Macronix MX261000 (GFX?? or PRG/data for 89C51?)
S1 - Macronix MX27C2000 (OKI samples)
*/
#include "driver.h"

View File

@ -4875,6 +4875,72 @@ ROM_START( majest12 )
/* no Delta-T samples */
ROM_END
/*
Gun & Frontier
Taito, 1990
This game runs on Taito F2 hardware.
PCB Layout
K1100624A
J1100251A (sticker K1100629A)
|-----------------------------------------------------|
| TL074 YM3016F C71-01.29 TC51832 TC51832|
| MB3737 TL074 TC51832 TC51832|
| YM2610 TCO530SYC |
| TC51832 TC51832|
| C71-12.49 Z80B 24MHz TC51832 TC51832|
| 5563 |
| TC51832 TC51832|
| TCO260DAR TCO520TBC TC51832 TC51832|
|J TCO360PRI |
|A TC51832 TC51832|
|M 2088 TC51832 TC51832|
|M TCO540OBN |
|A TC51832 C71-03.19 |
| |
| TC51832 |
| TCO100SCN |
| 66256 66256 66256 66256 |
| C71-02.59 |
| MB3771 C71-16.38 C71-15.37 |
| TCO510NIO C71-10.40 C71-14.39 |
| 26.686MHz C71-09.42 C71-08.41 68000 |
| DSWB DSWA PAL1 PAL2 |
|-----------------------------------------------------|
Notes:
Clocks:
68000 clock : 12.000MHz
Z80 clock : 4.000MHz
YM2610 clock: 8.000MHz
VSync : 60Hz
Taito Custom Chips:
TCO530SYC - Sound Communication (QFP160)
TCO260DAR - Palette Controller (QFP100)
TCO360PRI - Priority Controller (QFP100)
TCO520TBC - \ Sprite Controllers (QFP100)
TCO540OBN - / (QFP160)
TCO100SCN - Tilemap Controller (QFP160)
TCO510NIO - I/O (QFP100)
RAM:
62256 : 32K x8 SRAM
TC51832: 32K x8 SRAM
2088 : 8K x8 SRAM
5563 : 8K x8 SRAM
OTHER:
PAL1 : PAL16L8 labelled 'C71-06' at location IC28
PAL2 : PAL16L8 labelled 'C71-07' at location IC27
TL074 : Quad JFET Op AMP
MB3737: Main power AMP
*/
ROM_START( gunfront )
ROM_REGION( 0xc0000, "main", 0 ) /* 768k for 68000 code */
ROM_LOAD16_BYTE( "c71-09.ic42", 0x00000, 0x20000, CRC(10a544a2) SHA1(3b46bbd494b432d36aed3fd4b429cef074050c1d) )

View File

@ -2198,6 +2198,91 @@ ROM_START( akkanvdr )
ROM_LOAD16_BYTE("e06-05", 0x400000, 0x200000, CRC(f370ff15) SHA1(4bc464d1c3a28326c8b1ae2036387954cb1dd813) ) // CC CD CE CF
ROM_END
/*
Elevator Action Returns (Asia)
Taito, 1994
This game runs on Taito F3 System (F3 Motherboard and game cart)
PCB Layout
----------
Main Board
NEW F3 MOTHER (ASIA) M20A0001B MOTHER PCB J1100335B
|------------------------------------------------------|
| MB87078 51832 D77-07 D77-05 |
| MC33274 51832 68000 D77-04 HM511664|
| TDA1543 D77-08 D77-03 TCO630FDP |
| HM511664|
| HM511664 HM511664|
| 5510-ESPR5 TC518128 HM511664|
|J MB8421 TC518128 |
| |
|A TC0650FDA MB8421 |
| |
|M 16MHz |
| 2088 D77-06 TC0660FCM|
|M 2088 30.4761MHz |
| 2088 |
|A 68681 26.686MHz |
| |
| JP3 D77-02 |
| |
| ENSONIC |
| TCO640FIO 5701 |
| D77-01 |
| 51832 |
| |
| 51832 |
| ENSONIC |
| 5505-OTISR2 51832 |
| SW1 93C46 3771 68EC020 |
| 51832 |
|------------------------------------------------------|
Notes:
68020 clock : 15.23809 (30.47618 / 2)
68000 clock : 15.23809 (30.47618 / 2)
68681 clocks : pin2- 500kHz, pin32- 4.000MHz, pin36- 1.000MHz, pin38- 1.000MHz, pin39- 500kHz,
5505 clocks : pin12- 2.6686MHz, pin34- 15.23809MHz,
5510 clocks : pin1- 8.000MHz, pins4-6- 2.6686MHz, pin16- 2.6686MHz
VSync : 59Hz
HSync : 15.78kHz
D77* = PALs
ROM Board
J9100361A ROM PCB (sticker M20A0112A 223101651)
|-------------------------------------------------------|
|D77-09 E02-03.12 IC10* E02-02.8 IC6* E02-01.4 IC2* |
| IC11* IC9* IC7* IC5* IC3* IC1*|
| |
| |
| |
| |
| |
| E02-14.33 D77-15 E02-12.20 E02-10.18 |
| E02-13.32 D77-10 E02-11.19 E02-16.17|
| |
| |
| |
| |
|D77-12 |
| E02-08.47 E02-07.45 E02-06.43 IC40* E02-05.39 |
| IC46* IC44* IC42* IC41* E02-04.38 |
| D77-11 |
|-------------------------------------------------------|
Notes:
*: Unpopulated socket
D77* = PALs
E02-13/14 = 27C020 EPROMs
E02-10/11/12/16 = 27C4001 EPROMs
Remainder of ROMs are 42 pin 16M MASK or 8M MASK.
*/
ROM_START( elvactr )
ROM_REGION(0x200000, "main", 0) /* 68020 code */
ROM_LOAD32_BYTE("e02-12.20", 0x000000, 0x80000, CRC(ea5f5a32) SHA1(4f30c56fbf068fee6d3afb2479043c7e89f6c055) )

View File

@ -4878,6 +4878,54 @@ ROM_START( batridrk )
ROM_END
/*
Battle Bakraid
Raizing/8ing, 1999
PCB Layout
----------
ET68-V99
|-----------------------------------------------------|
|TA8201 16.93MHz ROM-6 6264 |
| YAC516 |
| YMZ280B-F ROM-7 SND_U0720 |
| |
| VOL ROM-8 Z80 |
| |
| 341256 |
| 93C66 |
| 341256 XILINX |
|J XC95108 |
|A 27MHz 32MHz |
|M |
|M DIPSW1 341256 341256|
|A XILINX XILINK |
| DIPSW2 XC95144 XC95108 341256 341256|
| |
| DIPSW3 |
| MACH211 PRG1_U023 |
| TEST_SW 68000 |
| PRG0_U022 |
| |
| PRG3_U024 |
| L7A0498 |
| GP9001 PRG2_U021 |
| ROM-0 ROM-1 (QFP208) |
| |
| 6264 MN414260 |
| ROM-2 ROM-3 |
| 6264 MN414260 |
|-----------------------------------------------------|
Notes:
ROM-0 to ROM-3 - 32M DIP42
ROM-6 to ROM-8 - 32M DIP42 Byte Mode
68000 clock - 16.000MHz (32/2)
Z80 clock - 5.33333MHz (32/6)
VSync - 60Hz
HSync - 15.39kHz
*/
ROM_START( bbakraid )
ROM_REGION( 0x200000, "main", 0 ) /* Main 68k code */
ROM_LOAD16_BYTE( "prg0u022.bin", 0x000000, 0x080000, CRC(0dd59512) SHA1(c6a4e6aa49c6ac3b04ae62a0a4cc8084ae048381) )