This commit is contained in:
dankan1890 2015-10-31 02:04:18 +01:00
commit 88c5e62b9a
6 changed files with 32 additions and 26 deletions

View File

@ -154,8 +154,8 @@ Timming
#include "alph8201.h"
const device_type ALPHA8201 = &device_creator<alpha8201_cpu_device>;
const device_type ALPHA8301 = &device_creator<alpha8301_cpu_device>;
const device_type ALPHA8201L = &device_creator<alpha8201_cpu_device>;
const device_type ALPHA8301L = &device_creator<alpha8301_cpu_device>;
/* instruction cycle count */
@ -174,7 +174,7 @@ const device_type ALPHA8301 = &device_creator<alpha8301_cpu_device>;
alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, ALPHA8201, "ALPHA-8201", tag, owner, clock, "alpha8201", __FILE__)
: cpu_device(mconfig, ALPHA8201L, "ALPHA-8201L", tag, owner, clock, "alpha8201l", __FILE__)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 10, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 6, 0)
, m_opmap(opcode_8201)
@ -191,7 +191,7 @@ alpha8201_cpu_device::alpha8201_cpu_device(const machine_config &mconfig, device
}
alpha8301_cpu_device::alpha8301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: alpha8201_cpu_device(mconfig, ALPHA8301, "ALPHA-8301", tag, owner, clock, "alpha8301", __FILE__)
: alpha8201_cpu_device(mconfig, ALPHA8301L, "ALPHA-8301L", tag, owner, clock, "alpha8301l", __FILE__)
{
m_opmap = opcode_8301;
}

View File

@ -401,8 +401,8 @@ public:
};
extern const device_type ALPHA8201;
extern const device_type ALPHA8301;
extern const device_type ALPHA8201L;
extern const device_type ALPHA8301L;
#endif /* __ALPH8201_H__ */

View File

@ -178,14 +178,14 @@ void hmcs40_cpu_device::device_start()
reset_prescaler();
// resolve callbacks
m_read_r0.resolve_safe(0);
m_read_r1.resolve_safe(0);
m_read_r2.resolve_safe(0);
m_read_r3.resolve_safe(0);
m_read_r4.resolve_safe(0);
m_read_r5.resolve_safe(0);
m_read_r6.resolve_safe(0);
m_read_r7.resolve_safe(0);
m_read_r0.resolve_safe(m_polarity & 0xf);
m_read_r1.resolve_safe(m_polarity & 0xf);
m_read_r2.resolve_safe(m_polarity & 0xf);
m_read_r3.resolve_safe(m_polarity & 0xf);
m_read_r4.resolve_safe(m_polarity & 0xf);
m_read_r5.resolve_safe(m_polarity & 0xf);
m_read_r6.resolve_safe(m_polarity & 0xf);
m_read_r7.resolve_safe(m_polarity & 0xf);
m_write_r0.resolve_safe();
m_write_r1.resolve_safe();
@ -196,7 +196,7 @@ void hmcs40_cpu_device::device_start()
m_write_r6.resolve_safe();
m_write_r7.resolve_safe();
m_read_d.resolve_safe(0);
m_read_d.resolve_safe(m_polarity);
m_write_d.resolve_safe();
// zerofill
@ -293,10 +293,10 @@ void hmcs40_cpu_device::device_reset()
// clear i/o
m_d = m_polarity;
for (int i = 0; i < 16; i++)
hmcs40_cpu_device::write_d(i, 0);
hmcs40_cpu_device::write_d(i, m_polarity);
for (int i = 0; i < 8; i++)
hmcs40_cpu_device::write_r(i, 0);
hmcs40_cpu_device::write_r(i, m_polarity & 0xf);
}
@ -322,13 +322,16 @@ UINT8 hmcs40_cpu_device::read_r(int index)
case 7: inp = m_read_r7(index, 0xff); break;
}
return ((inp ^ m_polarity) | m_r[index]) & 0xf;
if (m_polarity)
return (inp & m_r[index]) & 0xf;
else
return (inp | m_r[index]) & 0xf;
}
void hmcs40_cpu_device::write_r(int index, UINT8 data)
{
index &= 7;
data = (data ^ m_polarity) & 0xf;
data &= 0xf;
m_r[index] = data;
switch (index)
@ -348,13 +351,16 @@ int hmcs40_cpu_device::read_d(int index)
{
index &= 15;
return ((m_read_d(index, 0xffff) ^ m_polarity) | m_d) >> index & 1;
if (m_polarity)
return (m_read_d(index, 0xffff) & m_d) >> index & 1;
else
return (m_read_d(index, 0xffff) | m_d) >> index & 1;
}
void hmcs40_cpu_device::write_d(int index, int state)
{
index &= 15;
state = (((state) ? 1 : 0) ^ m_polarity) & 1;
state = (state) ? 1 : 0;
m_d = (m_d & ~(1 << index)) | state << index;
m_write_d(index, m_d, 0xffff);

View File

@ -610,7 +610,7 @@ static MACHINE_CONFIG_START( talbot, champbas_state )
MCFG_CPU_VBLANK_INT_DRIVER("screen", champbas_state, vblank_irq)
/* MCU */
MCFG_CPU_ADD("mcu", ALPHA8201, XTAL_18_432MHz/6/8)
MCFG_CPU_ADD("mcu", ALPHA8201L, XTAL_18_432MHz/6/8)
MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_MACHINE_START_OVERRIDE(champbas_state,champbas)
@ -683,7 +683,7 @@ static MACHINE_CONFIG_DERIVED( champmcu, champbas )
/* basic machine hardware */
/* MCU */
MCFG_CPU_ADD("mcu", ALPHA8201, XTAL_18_432MHz/6/8)
MCFG_CPU_ADD("mcu", ALPHA8201L, XTAL_18_432MHz/6/8)
MCFG_CPU_PROGRAM_MAP(mcu_map)
/* to MCU timeout champbbj */

View File

@ -1212,7 +1212,7 @@ static MACHINE_CONFIG_START( equites, equites_state )
MCFG_FRAGMENT_ADD(common_sound)
MCFG_CPU_ADD("mcu", ALPHA8301, 4000000/8)
MCFG_CPU_ADD("mcu", ALPHA8301L, 4000000/8)
MCFG_CPU_PROGRAM_MAP(mcu_map)
/* video hardware */
@ -1252,7 +1252,7 @@ static MACHINE_CONFIG_START( splndrbt, equites_state )
MCFG_FRAGMENT_ADD(common_sound)
MCFG_CPU_ADD("mcu", ALPHA8301, 4000000/8)
MCFG_CPU_ADD("mcu", ALPHA8301L, 4000000/8)
MCFG_CPU_PROGRAM_MAP(mcu_map)
/* video hardware */

View File

@ -400,7 +400,7 @@ static MACHINE_CONFIG_START( shougi, shougi_state )
MCFG_CPU_PROGRAM_MAP(sub_map)
MCFG_CPU_IO_MAP(readport_sub)
MCFG_CPU_ADD("mcu", ALPHA8201, XTAL_10MHz/4/8)
MCFG_CPU_ADD("mcu", ALPHA8201L, XTAL_10MHz/4/8)
MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_QUANTUM_PERFECT_CPU("maincpu")