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Minor netlist syntax changes, (nw)

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This commit is contained in:
therealmogminer@gmail.com 2016-12-14 01:40:48 +01:00
parent 4a71e6bdcf
commit 8dfbe8e538
5 changed files with 171 additions and 196 deletions
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17
src/lib/netlist/devices/nld_74161.h
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@ -27,8 +27,21 @@
#include "nl_setup.h"
#define TTL_74161(name) \
NET_REGISTER_DEV(TTL_74161, name)
#define TTL_74161(name, cA, cB, cC, cD, cCLEAR, cLOAD, cCLK, cENABLEP, cENABLET, cQA, cQB, cQC, cQD) \
NET_REGISTER_DEV(TTL_74161, name) \
NET_CONNECT(name, A, cA) \
NET_CONNECT(name, B, cB) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, CLEAR, cCLEAR) \
NET_CONNECT(name, LOAD, cLOAD) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, ENABLEP, cENABLEP) \
NET_CONNECT(name, ENABLET, cENABLET) \
NET_CONNECT(name, QA, cQA) \
NET_CONNECT(name, QB, cQB) \
NET_CONNECT(name, QC, cQC) \
NET_CONNECT(name, QD, cQD) \
#define TTL_74161_DIP(name) \
NET_REGISTER_DEV(TTL_74161_DIP, name)

270
src/lib/netlist/devices/nld_7473.cpp
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@ -1,194 +1,132 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
/*
* nld_74107.c
* nld_7473.c
*
*/
#include "nld_74107.h"
#include "nld_7473.h"
namespace netlist
{
namespace devices
{
NETLIB_OBJECT(7473_flipflop_base)
{
NETLIB_CONSTRUCTOR(7473_flipflop_base)
, m_CLK(*this, "CLK")
, m_CLR(*this, "CLR")
, m_J(*this, "J")
, m_K(*this, "K")
, m_Q(*this, "Q")
, m_QQ(*this, "QQ")
, m_last_CLK(*this, "m_last_CLK", 0)
{
}
NETLIB_RESETI();
public:
logic_input_t m_CLK;
logic_input_t m_CLR;
logic_input_t m_J;
logic_input_t m_K;
logic_output_t m_Q;
logic_output_t m_QQ;
state_var<netlist_sig_t> m_last_CLK;
void tick();
};
NETLIB_RESET(7473_flipflop_base)
{
m_last_CLK = 0;
}
inline NETLIB_FUNC_VOID(7473_flipflop_base, tick, (void))
{
const netlist_time delay[2] = { NLTIME_FROM_NS(40), NLTIME_FROM_NS(25) };
const netlist_sig_t j = m_J();
const netlist_sig_t k = m_K();
const netlist_sig_t old_q = m_Q.net().Q();
netlist_sig_t q = old_q;
if (j && k)
{
q ^= 1;
}
else if (j)
{
q = 1;
}
else if (k)
{
q = 0;
}
if (q != old_q)
{
m_Q.push(q, delay[q]);
m_QQ.push(q ^ 1, delay[q ^ 1]);
}
}
NETLIB_OBJECT_DERIVED(7473_flipflop, 7473_flipflop_base)
{
public:
NETLIB_CONSTRUCTOR_DERIVED(7473_flipflop, 7473_flipflop_base) { }
NETLIB_UPDATEI();
};
NETLIB_UPDATE(7473_flipflop)
{
if (m_CLR())
{
m_Q.push(0, NLTIME_FROM_NS(40));
m_QQ.push(1, NLTIME_FROM_NS(25));
}
else if (m_CLK())
{
tick();
}
m_last_CLK = m_CLK();
}
NETLIB_OBJECT_DERIVED(7473A_flipflop, 7473_flipflop_base)
{
public:
NETLIB_CONSTRUCTOR_DERIVED(7473A_flipflop, 7473_flipflop_base) { }
NETLIB_UPDATEI();
};
NETLIB_UPDATE(7473A_flipflop)
{
if (m_CLR())
{
m_Q.push(0, NLTIME_FROM_NS(40));
m_QQ.push(1, NLTIME_FROM_NS(25));
}
else if (!m_CLK() && m_last_CLK)
{
tick();
}
m_last_CLK = m_CLK();
};
NETLIB_OBJECT(7473)
{
NETLIB_CONSTRUCTOR(7473)
, m_FF1(*this, "FF1")
, m_FF2(*this, "FF2")
{ }
protected:
NETLIB_SUB(7473_flipflop) m_FF1;
NETLIB_SUB(7473_flipflop) m_FF2;
};
NETLIB_OBJECT(7473A)
, m_CLK(*this, "CLK")
, m_J(*this, "J")
, m_K(*this, "K")
, m_CLRQ(*this, "CLRQ")
, m_Q(*this, "Q")
, m_QQ(*this, "QQ")
{
NETLIB_CONSTRUCTOR(7473A)
, m_FF1(*this, "FF1")
, m_FF2(*this, "FF2")
{ }
protected:
NETLIB_SUB(7473A_flipflop) m_FF1;
NETLIB_SUB(7473A_flipflop) m_FF2;
};
NETLIB_OBJECT_DERIVED(7473_dip, 7473)
{
NETLIB_CONSTRUCTOR_DERIVED(7473_dip, 7473)
{
register_subalias("1", m_FF1.m_CLK);
register_subalias("2", m_FF1.m_CLR);
register_subalias("3", m_FF1.m_K);
// register_subalias("4", ); ==> VCC
register_subalias("5", m_FF2.m_CLK);
register_subalias("6", m_FF2.m_CLR);
register_subalias("7", m_FF2.m_J);
register_subalias("8", m_FF2.m_QQ);
register_subalias("9", m_FF2.m_Q);
register_subalias("10", m_FF2.m_K);
// register_subalias("11", ); ==> GND
register_subalias("12", m_FF1.m_Q);
register_subalias("13", m_FF1.m_QQ);
register_subalias("14", m_FF1.m_J);
}
NETLIB_UPDATEI();
public:
logic_input_t m_CLK;
logic_input_t m_J;
logic_input_t m_K;
logic_input_t m_CLRQ;
logic_output_t m_Q;
logic_output_t m_QQ;
};
NETLIB_OBJECT_DERIVED(7473A_dip, 7473A)
NETLIB_OBJECT_DERIVED(7473A, 7473)
{
NETLIB_CONSTRUCTOR_DERIVED(7473A_dip, 7473A)
{
register_subalias("1", m_FF1.m_CLK);
register_subalias("2", m_FF1.m_CLR);
register_subalias("3", m_FF1.m_K);
// register_subalias("4", ); ==> VCC
register_subalias("5", m_FF2.m_CLK);
register_subalias("6", m_FF2.m_CLR);
register_subalias("7", m_FF2.m_J);
public:
NETLIB_CONSTRUCTOR_DERIVED(7473A, 7473) { }
register_subalias("8", m_FF2.m_QQ);
register_subalias("9", m_FF2.m_Q);
register_subalias("10", m_FF2.m_K);
// register_subalias("11", ); ==> GND
register_subalias("12", m_FF1.m_Q);
register_subalias("13", m_FF1.m_QQ);
register_subalias("14", m_FF1.m_J);
};
NETLIB_OBJECT(7473_dip)
{
NETLIB_CONSTRUCTOR(7473_dip)
, m_1(*this, "1")
, m_2(*this, "2")
{
register_subalias("1", m_1.m_CLK);
register_subalias("2", m_1.m_CLRQ);
register_subalias("3", m_1.m_K);
//register_subalias("4", ); ==> VCC
register_subalias("5", m_2.m_CLK);
register_subalias("6", m_2.m_CLRQ);
register_subalias("7", m_2.m_J);
register_subalias("8", m_2.m_QQ);
register_subalias("9", m_2.m_Q);
register_subalias("10", m_2.m_K);
//register_subalias("11", ); ==> VCC
register_subalias("12", m_2.m_Q);
register_subalias("13", m_1.m_QQ);
register_subalias("14", m_1.m_J);
}
//NETLIB_RESETI();
//NETLIB_UPDATEI();
private:
NETLIB_SUB(7473) m_1;
NETLIB_SUB(7473) m_2;
};
NETLIB_OBJECT(7473A_dip)
{
NETLIB_CONSTRUCTOR(7473A_dip)
, m_1(*this, "1")
, m_2(*this, "2")
{
register_subalias("1", m_1.m_CLK);
register_subalias("2", m_1.m_CLRQ);
register_subalias("3", m_1.m_K);
//register_subalias("4", ); ==> VCC
register_subalias("5", m_2.m_CLK);
register_subalias("6", m_2.m_CLRQ);
register_subalias("7", m_2.m_J);
register_subalias("8", m_2.m_QQ);
register_subalias("9", m_2.m_Q);
register_subalias("10", m_2.m_K);
//register_subalias("11", ); ==> VCC
register_subalias("12", m_2.m_Q);
register_subalias("13", m_1.m_QQ);
register_subalias("14", m_1.m_J);
}
private:
NETLIB_SUB(7473A) m_1;
NETLIB_SUB(7473A) m_2;
};
NETLIB_UPDATE(7473)
{
const auto JK = (m_J() << 1) | m_K();
unsigned q = 0;
if (!m_CLRQ())
{
q = m_Q.net().Q();
switch (JK)
{
case 1: // (!m_J) & m_K))
q = 0;
break;
case 2: // (m_J) & !m_K))
q = 1;
break;
case 3: // (m_J) & m_K))
q ^= 1;
break;
default:
case 0:
break;
}
}
m_Q.push(q, NLTIME_FROM_NS(20)); // FIXME: timing
m_QQ.push(q ^ 1, NLTIME_FROM_NS(20)); // FIXME: timing
}
NETLIB_DEVICE_IMPL(7473)
NETLIB_DEVICE_IMPL(7473A)
NETLIB_DEVICE_IMPL(7473_dip)

47
src/lib/netlist/devices/nld_7473.h
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@ -3,24 +3,24 @@
/*
* nld_7473.h
*
* DM7473: Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
* DM7473A: Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
* 7473: Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
* 7473A: Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
*
* +--------------+
* CLK1 |1 ++ 14| J1
* CLR1 |2 13| QQ1
* K1 |3 12| Q1
* +----------+
* 1CLK |1 ++ 14| 1J
* 1CLRQ |2 13| 1QQ
* 1K |3 12| 1Q
* VCC |4 7473 11| GND
* CLK2 |5 10| K2
* CLR2 |6 9| Q2
* J2 |7 8| QQ2
* +--------------+
* 2CLK |5 10| 2K
* 2CLRQ |6 9| 2Q
* 2J |7 8| 2QQ
* +----------+
*
*
* Function table 73
*
* +-----+-----+-----+---++---+-----+
* | CLR | CLK | J | K || Q | QQ |
* | CLRQ| CLK | J | K || Q | QQ |
* +=====+=====+=====+===++===+=====+
* | 0 | X | X | X || 0 | 1 |
* | 1 | * | 0 | 0 || Q0| Q0Q |
@ -38,7 +38,7 @@
* Function table 73A
*
* +-----+-----+-----+---++---+-----+
* | CLR | CLK | J | K || Q | QQ |
* | CLRQ| CLK | J | K || Q | QQ |
* +=====+=====+=====+===++===+=====+
* | 0 | X | X | X || 0 | 1 |
* | 1 | F | 0 | 0 || Q0| Q0Q |
@ -50,7 +50,10 @@
*
* THe 73A is negative triggered.
*
* Naming conventions follow Fairchild Semiconductor datasheet
* Naming conventions follow Texas instruments datasheet
*
* FIXME: Currently, only the 73 is implemented.
* The 73 uses the same model.
*
*/
@ -59,17 +62,21 @@
#include "nl_setup.h"
#define TTL_7473A(name, cCLK, cJ, cK, cCLR) \
NET_REGISTER_DEV(TTL_7473A, name) \
#define TTL_7473(name, cCLK, cJ, cK, cCLRQ) \
NET_REGISTER_DEV(TTL_7473, name) \
NET_CONNECT(name, CLK, cCLK) \
NET_CONNECT(name, J, cJ) \
NET_CONNECT(name, K, cK) \
NET_CONNECT(name, CLRQ, cCLRQ)
#define TTL_74107(name, cCLK, cJ, cK, cCLRQ) \
TTL_74107A(name, cCLK, cJ, cK, cCLRQ)
#define TTL_7473A(name, cCLK, cJ, cK, cCLRQ) \
TTL_7473(name, cCLK, cJ, cK, cCLRQ)
#define TTL_74107_DIP(name) \
NET_REGISTER_DEV(TTL_74107_DIP, name)
#define TTL_7473_DIP(name) \
NET_REGISTER_DEV(TTL_7473_DIP, name)
#endif /* NLD_74107_H_ */
#define TTL_7473A_DIP(name) \
NET_REGISTER_DEV(TTL_7473A_DIP, name)
#endif /* NLD_7473_H_ */

15
src/lib/netlist/devices/nld_82S126.h
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@ -26,8 +26,19 @@
#include "nl_setup.h"
#define TTL_82S126(name) \
NET_REGISTER_DEV(TTL_82S126, name)
#define TTL_82S126(name, cCE1Q, cCE2Q, cA0, cA1, cA2, cA3, cA4, cA5, cA6, cA7) \
NET_REGISTER_DEV(TTL_82S126, name) \
NET_CONNECT(name, CE1Q, cCE1Q) \
NET_CONNECT(name, CE2Q, cCE2Q) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2) \
NET_CONNECT(name, A3, cA3) \
NET_CONNECT(name, A4, cA4) \
NET_CONNECT(name, A5, cA5) \
NET_CONNECT(name, A6, cA6) \
NET_CONNECT(name, A7, cA7)
#define TTL_82S126_DIP(name) \
NET_REGISTER_DEV(TTL_82S126_DIP, name)

10
src/lib/netlist/devices/nld_dm9334.h
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@ -67,8 +67,14 @@
#include "nl_setup.h"
#define TTL_DM9334(name) \
NET_REGISTER_DEV(TTL_DM9334, name)
#define TTL_DM9334(name, cC, cE, cD, cA0, cA1, cA2) \
NET_REGISTER_DEV(TTL_DM9334, name) \
NET_CONNECT(name, C, cC) \
NET_CONNECT(name, E, cE) \
NET_CONNECT(name, D, cD) \
NET_CONNECT(name, A0, cA0) \
NET_CONNECT(name, A1, cA1) \
NET_CONNECT(name, A2, cA2)
#define TTL_DM9334_DIP(name) \
NET_REGISTER_DEV(TTL_DM9334_DIP, name)