mirror of
https://github.com/holub/mame
synced 2025-04-16 13:34:55 +03:00
newbrain: Dumped the COP internal ROM. [Chris Despinidis]
newbrain: Rewrote the driver to modern standards. [Curt Coder] cop400: Implemented the MICROBUS interface. [Curt Coder]
This commit is contained in:
Curt Coder
parent
7ccca7f3fc
commit
99ba45ff75
@ -2572,3 +2572,18 @@ if (BUSES["M5"]~=null) then
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}
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end
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---------------------------------------------------
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--
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--@src/devices/bus/newbrain/exp.h,BUSES["NEWBRAIN"] = true
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---------------------------------------------------
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if (BUSES["NEWBRAIN"]~=null) then
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files {
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MAME_DIR .. "src/devices/bus/newbrain/exp.cpp",
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MAME_DIR .. "src/devices/bus/newbrain/exp.h",
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MAME_DIR .. "src/devices/bus/newbrain/eim.cpp",
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MAME_DIR .. "src/devices/bus/newbrain/eim.h",
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MAME_DIR .. "src/devices/bus/newbrain/fdc.cpp",
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MAME_DIR .. "src/devices/bus/newbrain/fdc.h",
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}
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end
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@ -629,6 +629,7 @@ BUSES["NASBUS"] = true
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BUSES["NEOGEO"] = true
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BUSES["NES"] = true
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BUSES["NES_CTRL"] = true
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BUSES["NEWBRAIN"] = true
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BUSES["NUBUS"] = true
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BUSES["O2"] = true
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BUSES["ORICEXT"] = true
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@ -954,7 +955,7 @@ files {
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MAME_DIR .. "src/mame/video/jaguar.cpp",
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MAME_DIR .. "src/mame/video/jagblit.h",
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MAME_DIR .. "src/mame/video/jagblit.inc",
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MAME_DIR .. "src/mame/video/jagobj.inc",
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MAME_DIR .. "src/mame/video/jagobj.inc",
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MAME_DIR .. "src/mame/audio/gorf.cpp",
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MAME_DIR .. "src/mame/audio/wow.cpp",
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MAME_DIR .. "src/mame/drivers/astrocde.cpp",
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@ -971,7 +972,7 @@ files {
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MAME_DIR .. "src/mame/machine/n64.cpp",
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MAME_DIR .. "src/mame/video/n64.cpp",
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MAME_DIR .. "src/mame/video/n64types.h",
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MAME_DIR .. "src/mame/video/rdpfiltr.inc",
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MAME_DIR .. "src/mame/video/rdpfiltr.inc",
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MAME_DIR .. "src/mame/video/n64.h",
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MAME_DIR .. "src/mame/video/rdpblend.cpp",
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MAME_DIR .. "src/mame/video/rdpblend.h",
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303
src/devices/bus/newbrain/eim.cpp
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303
src/devices/bus/newbrain/eim.cpp
Normal file
@ -0,0 +1,303 @@
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// license:BSD-3-Clause
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// copyright-holders:Curt Coder
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/**********************************************************************
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Grundy NewBrain Expansion Interface Module emulation
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**********************************************************************/
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/*
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TODO:
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- everything
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*/
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#include "eim.h"
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//**************************************************************************
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// MACROS / CONSTANTS
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//**************************************************************************
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#define LOG 0
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#define MC6850_TAG "459"
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#define ADC0809_TAG "427"
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#define DAC0808_TAG "461"
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#define Z80CTC_TAG "458"
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#define RS232_TAG "rs232"
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//**************************************************************************
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// DEVICE DEFINITIONS
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//**************************************************************************
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const device_type NEWBRAIN_EIM = &device_creator<newbrain_eim_t>;
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//-------------------------------------------------
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// ROM( newbrain_eim )
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//-------------------------------------------------
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ROM_START( newbrain_eim )
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ROM_REGION( 0x10000, "eim", 0 )
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ROM_LOAD( "e415-2.rom", 0x4000, 0x2000, CRC(5b0e390c) SHA1(0f99cae57af2e64f3f6b02e5325138d6ba015e72) )
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ROM_LOAD( "e415-3.rom", 0x4000, 0x2000, CRC(2f88bae5) SHA1(04e03f230f4b368027442a7c2084dae877f53713) ) // 18/8/83.aci
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ROM_LOAD( "e416-3.rom", 0x6000, 0x2000, CRC(8b5099d8) SHA1(19b0cfce4c8b220eb1648b467f94113bafcb14e0) ) // 10/8/83.mtv
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ROM_LOAD( "e417-2.rom", 0x8000, 0x2000, CRC(6a7afa20) SHA1(f90db4f8318777313a862b3d5bab83c2fd260010) )
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ROM_END
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//-------------------------------------------------
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// rom_region - device-specific ROM region
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//-------------------------------------------------
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const rom_entry *newbrain_eim_t::device_rom_region() const
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{
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return ROM_NAME( newbrain_eim );
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}
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//-------------------------------------------------
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// MACHINE_CONFIG_FRAGMENT( newbrain_eim )
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//-------------------------------------------------
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static MACHINE_CONFIG_FRAGMENT( newbrain_eim )
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// devices
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MCFG_DEVICE_ADD(Z80CTC_TAG, Z80CTC, XTAL_16MHz/8)
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MCFG_Z80CTC_ZC0_CB(DEVWRITELINE(MC6850_TAG, acia6850_device, write_rxc))
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MCFG_Z80CTC_ZC1_CB(DEVWRITELINE(MC6850_TAG, acia6850_device, write_txc))
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MCFG_Z80CTC_ZC2_CB(WRITELINE(newbrain_eim_t, ctc_z2_w))
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MCFG_TIMER_DRIVER_ADD_PERIODIC("z80ctc_c2", newbrain_eim_t, ctc_c2_tick, attotime::from_hz(XTAL_16MHz/4/13))
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MCFG_DEVICE_ADD(ADC0809_TAG, ADC0808, 500000)
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MCFG_ADC0808_OUT_EOC_CB(WRITELINE(newbrain_eim_t, adc_eoc_w))
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MCFG_ADC0808_IN_VREF_POS_CB(newbrain_eim_t, adc_vref_pos_r)
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MCFG_ADC0808_IN_VREF_NEG_CB(newbrain_eim_t, adc_vref_neg_r)
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MCFG_ADC0808_IN_IN_0_CB(newbrain_eim_t, adc_input_r)
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MCFG_ADC0808_IN_IN_1_CB(newbrain_eim_t, adc_input_r)
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MCFG_ADC0808_IN_IN_2_CB(newbrain_eim_t, adc_input_r)
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MCFG_ADC0808_IN_IN_3_CB(newbrain_eim_t, adc_input_r)
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MCFG_ADC0808_IN_IN_4_CB(newbrain_eim_t, adc_input_r)
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MCFG_ADC0808_IN_IN_5_CB(newbrain_eim_t, adc_input_r)
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MCFG_ADC0808_IN_IN_6_CB(newbrain_eim_t, adc_input_r)
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MCFG_ADC0808_IN_IN_7_CB(newbrain_eim_t, adc_input_r)
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MCFG_DEVICE_ADD(MC6850_TAG, ACIA6850, 0)
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MCFG_ACIA6850_IRQ_HANDLER(WRITELINE(newbrain_eim_t, acia_interrupt))
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MCFG_RS232_PORT_ADD(RS232_TAG, default_rs232_devices, nullptr)
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MCFG_NEWBRAIN_EXPANSION_SLOT_ADD(NEWBRAIN_EXPANSION_SLOT_TAG, XTAL_16MHz/8, newbrain_expansion_cards, "fdc")
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// internal ram
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MCFG_RAM_ADD(RAM_TAG)
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MCFG_RAM_DEFAULT_SIZE("96K")
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MACHINE_CONFIG_END
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//-------------------------------------------------
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// machine_config_additions - device-specific
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// machine configurations
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//-------------------------------------------------
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machine_config_constructor newbrain_eim_t::device_mconfig_additions() const
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{
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return MACHINE_CONFIG_NAME( newbrain_eim );
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}
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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//-------------------------------------------------
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// newbrain_eim_t - constructor
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//-------------------------------------------------
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newbrain_eim_t::newbrain_eim_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, NEWBRAIN_EIM, "Newbrain EIM", tag, owner, clock, "newbrain_eim", __FILE__),
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device_newbrain_expansion_slot_interface(mconfig, *this),
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m_ctc(*this, Z80CTC_TAG),
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m_acia(*this, MC6850_TAG),
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m_exp(*this, NEWBRAIN_EXPANSION_SLOT_TAG),
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m_rom(*this, "eim"),
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m_ram(*this, RAM_TAG)
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{
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void newbrain_eim_t::device_start()
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{
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// state saving
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save_item(NAME(m_aciaint));
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save_item(NAME(m_anint));
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void newbrain_eim_t::device_reset()
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{
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}
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//-------------------------------------------------
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// mreq_r - memory request read
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//-------------------------------------------------
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UINT8 newbrain_eim_t::mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh)
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{
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return m_exp->mreq_r(space, offset, data, romov, exrm, raminh);
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}
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//-------------------------------------------------
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// mreq_w - memory request write
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//-------------------------------------------------
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void newbrain_eim_t::mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh)
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{
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m_exp->mreq_w(space, offset, data, romov, exrm, raminh);
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}
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//-------------------------------------------------
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// iorq_r - I/O request read
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//-------------------------------------------------
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UINT8 newbrain_eim_t::iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov)
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{
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return m_exp->iorq_r(space, offset, data, prtov);
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}
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//-------------------------------------------------
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// iorq_w - I/O request write
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//-------------------------------------------------
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void newbrain_eim_t::iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov)
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{
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m_exp->iorq_w(space, offset, data, prtov);
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}
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//-------------------------------------------------
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// anout_r -
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//-------------------------------------------------
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READ8_MEMBER( newbrain_eim_t::anout_r )
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{
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return 0xff;
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}
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//-------------------------------------------------
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// anout_w -
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//-------------------------------------------------
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WRITE8_MEMBER( newbrain_eim_t::anout_w )
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{
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}
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//-------------------------------------------------
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// anin_r -
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//-------------------------------------------------
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READ8_MEMBER( newbrain_eim_t::anin_r )
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{
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return 0;
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}
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//-------------------------------------------------
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// anio_w -
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//-------------------------------------------------
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WRITE8_MEMBER( newbrain_eim_t::anio_w )
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{
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}
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//-------------------------------------------------
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// adc_eoc_w -
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//-------------------------------------------------
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WRITE_LINE_MEMBER( newbrain_eim_t::adc_eoc_w )
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{
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m_anint = state;
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}
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//-------------------------------------------------
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// adc_vref_pos_r -
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//-------------------------------------------------
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ADC0808_ANALOG_READ_CB( newbrain_eim_t::adc_vref_pos_r )
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{
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return 5.0;
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}
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//-------------------------------------------------
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// adc_vref_neg_r -
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//-------------------------------------------------
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ADC0808_ANALOG_READ_CB( newbrain_eim_t::adc_vref_neg_r )
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{
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return 0.0;
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}
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//-------------------------------------------------
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// adc_input_r -
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//-------------------------------------------------
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ADC0808_ANALOG_READ_CB( newbrain_eim_t::adc_input_r )
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{
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return 0.0;
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}
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//-------------------------------------------------
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// acia_interrupt -
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//-------------------------------------------------
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WRITE_LINE_MEMBER( newbrain_eim_t::acia_interrupt )
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{
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m_aciaint = state;
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}
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//-------------------------------------------------
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// ctc_z2_w -
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//-------------------------------------------------
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WRITE_LINE_MEMBER( newbrain_eim_t::ctc_z2_w )
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{
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// connected to CTC channel 0/1 clock inputs
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m_ctc->trg0(state);
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m_ctc->trg1(state);
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}
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//-------------------------------------------------
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// adc_input_r -
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//-------------------------------------------------
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TIMER_DEVICE_CALLBACK_MEMBER(newbrain_eim_t::ctc_c2_tick)
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{
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m_ctc->trg2(1);
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m_ctc->trg2(0);
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}
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90
src/devices/bus/newbrain/eim.h
Normal file
90
src/devices/bus/newbrain/eim.h
Normal file
@ -0,0 +1,90 @@
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// license:BSD-3-Clause
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// copyright-holders:Curt Coder
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/**********************************************************************
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Grundy NewBrain Expansion Interface Module emulation
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**********************************************************************/
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#pragma once
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#ifndef __NEWBRAIN_EIM__
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#define __NEWBRAIN_EIM__
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#include "emu.h"
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#include "exp.h"
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#include "bus/rs232/rs232.h"
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#include "machine/6850acia.h"
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#include "machine/adc0808.h"
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#include "machine/z80ctc.h"
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#include "machine/ram.h"
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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// ======================> newbrain_eim_t
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class newbrain_eim_t : public device_t,
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public device_newbrain_expansion_slot_interface
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{
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public:
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// construction/destruction
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newbrain_eim_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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// optional information overrides
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virtual const rom_entry *device_rom_region() const override;
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virtual machine_config_constructor device_mconfig_additions() const override;
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DECLARE_READ8_MEMBER( anout_r );
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DECLARE_WRITE8_MEMBER( anout_w );
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DECLARE_READ8_MEMBER( anin_r );
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DECLARE_WRITE8_MEMBER( anio_w );
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DECLARE_READ8_MEMBER( st0_r );
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DECLARE_READ8_MEMBER( st1_r );
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DECLARE_READ8_MEMBER( st2_r );
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DECLARE_READ8_MEMBER( usbs_r );
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DECLARE_WRITE8_MEMBER( usbs_w );
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DECLARE_WRITE8_MEMBER( paging_w );
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DECLARE_WRITE_LINE_MEMBER( acia_tx );
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DECLARE_WRITE_LINE_MEMBER( acia_interrupt );
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DECLARE_WRITE_LINE_MEMBER( ctc_z2_w );
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DECLARE_WRITE_LINE_MEMBER( adc_eoc_w );
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ADC0808_ANALOG_READ_CB(adc_vref_pos_r);
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ADC0808_ANALOG_READ_CB(adc_vref_neg_r);
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ADC0808_ANALOG_READ_CB(adc_input_r);
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TIMER_DEVICE_CALLBACK_MEMBER(ctc_c2_tick);
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protected:
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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// device_newbrain_expansion_slot_interface overrides
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virtual UINT8 mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) override;
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virtual void mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) override;
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virtual UINT8 iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov) override;
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virtual void iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov) override;
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private:
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required_device<z80ctc_device> m_ctc;
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required_device<acia6850_device> m_acia;
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required_device<newbrain_expansion_slot_t> m_exp;
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required_memory_region m_rom;
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optional_shared_ptr<UINT8> m_ram;
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int m_aciaint;
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int m_anint;
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};
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// device type definition
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extern const device_type NEWBRAIN_EIM;
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#endif
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142
src/devices/bus/newbrain/exp.cpp
Normal file
142
src/devices/bus/newbrain/exp.cpp
Normal file
@ -0,0 +1,142 @@
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// license:BSD-3-Clause
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// copyright-holders:Curt Coder
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/**********************************************************************
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Grundy NewBrain Expansion Port emulation
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**********************************************************************/
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#include "exp.h"
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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const device_type NEWBRAIN_EXPANSION_SLOT = &device_creator<newbrain_expansion_slot_t>;
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//**************************************************************************
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// CARD INTERFACE
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//**************************************************************************
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//-------------------------------------------------
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// device_newbrain_expansion_slot_interface - constructor
|
||||
//-------------------------------------------------
|
||||
|
||||
device_newbrain_expansion_slot_interface::device_newbrain_expansion_slot_interface(const machine_config &mconfig, device_t &device) :
|
||||
device_slot_card_interface(mconfig,device)
|
||||
{
|
||||
m_slot = dynamic_cast<newbrain_expansion_slot_t *>(device.owner());
|
||||
}
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// LIVE DEVICE
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// newbrain_expansion_slot_t - constructor
|
||||
//-------------------------------------------------
|
||||
|
||||
newbrain_expansion_slot_t::newbrain_expansion_slot_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
|
||||
device_t(mconfig, NEWBRAIN_EXPANSION_SLOT, "NewBrain expansion port", tag, owner, clock, "newbrain_expansion_slot", __FILE__),
|
||||
device_slot_interface(mconfig, *this), m_card(nullptr)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void newbrain_expansion_slot_t::device_start()
|
||||
{
|
||||
m_card = dynamic_cast<device_newbrain_expansion_slot_interface *>(get_card_device());
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_reset - device-specific reset
|
||||
//-------------------------------------------------
|
||||
|
||||
void newbrain_expansion_slot_t::device_reset()
|
||||
{
|
||||
if (m_card != nullptr)
|
||||
{
|
||||
m_card->device().reset();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// mreq_r - memory request read
|
||||
//-------------------------------------------------
|
||||
|
||||
UINT8 newbrain_expansion_slot_t::mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh)
|
||||
{
|
||||
if (m_card != nullptr)
|
||||
{
|
||||
data = m_card->mreq_r(space, offset, data, romov, exrm, raminh);
|
||||
}
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// mreq_w - memory request write
|
||||
//-------------------------------------------------
|
||||
|
||||
void newbrain_expansion_slot_t::mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh)
|
||||
{
|
||||
if (m_card != nullptr)
|
||||
{
|
||||
m_card->mreq_w(space, offset, data, romov, exrm, raminh);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// iorq_r - I/O request read
|
||||
//-------------------------------------------------
|
||||
|
||||
UINT8 newbrain_expansion_slot_t::iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov)
|
||||
{
|
||||
if (m_card != nullptr)
|
||||
{
|
||||
data = m_card->iorq_r(space, offset, data, prtov);
|
||||
}
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// iorq_w - I/O request write
|
||||
//-------------------------------------------------
|
||||
|
||||
void newbrain_expansion_slot_t::iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov)
|
||||
{
|
||||
if (m_card != nullptr)
|
||||
{
|
||||
m_card->iorq_w(space, offset, data, prtov);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// SLOT_INTERFACE( newbrain_expansion_cards )
|
||||
//-------------------------------------------------
|
||||
|
||||
// slot devices
|
||||
#include "eim.h"
|
||||
#include "fdc.h"
|
||||
|
||||
SLOT_INTERFACE_START( newbrain_expansion_cards )
|
||||
SLOT_INTERFACE("eim", NEWBRAIN_EIM)
|
||||
SLOT_INTERFACE("fdc", NEWBRAIN_FDC)
|
||||
SLOT_INTERFACE_END
|
||||
127
src/devices/bus/newbrain/exp.h
Normal file
127
src/devices/bus/newbrain/exp.h
Normal file
@ -0,0 +1,127 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Curt Coder
|
||||
/**********************************************************************
|
||||
|
||||
Grundy NewBrain Expansion Port emulation
|
||||
|
||||
**********************************************************************
|
||||
|
||||
GND 1 26 A6
|
||||
1/8C 2 27 _RAMENB
|
||||
A14 3 28 EXRM2
|
||||
A13 4 29 EXRM1
|
||||
D5 5 30 EXRM0
|
||||
RMSL 6 31 _ROMOV
|
||||
D4 7 32 _BUSRQ
|
||||
D3 8 33 _M1
|
||||
D6 9 34 _RST
|
||||
D7 10 35 _RFRSH
|
||||
A11 11 36 _WAIT
|
||||
A10 12 37 A4
|
||||
A8 13 38 _BUSAK
|
||||
A9 14 39 A15
|
||||
A12 15 40 _WR
|
||||
A7 16 41 _INT
|
||||
A3 17 42 _RD
|
||||
A2 18 43 _NMI
|
||||
A1 19 44 _HALT
|
||||
A0 20 45 _MREQ
|
||||
D0 21 46 _IORQ
|
||||
D1 22 47 PRTOV
|
||||
_FCTR 23 48 _RAMINH
|
||||
D2 24 49 +5V
|
||||
A5 25 50 .
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __NEWBRAIN_EXPANSION_SLOT__
|
||||
#define __NEWBRAIN_EXPANSION_SLOT__
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// CONSTANTS
|
||||
//**************************************************************************
|
||||
|
||||
#define NEWBRAIN_EXPANSION_SLOT_TAG "exp"
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// INTERFACE CONFIGURATION MACROS
|
||||
//**************************************************************************
|
||||
|
||||
#define MCFG_NEWBRAIN_EXPANSION_SLOT_ADD(_tag, _clock, _slot_intf, _def_slot) \
|
||||
MCFG_DEVICE_ADD(_tag, NEWBRAIN_EXPANSION_SLOT, _clock) \
|
||||
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
// ======================> newbrain_expansion_slot_t
|
||||
|
||||
class device_newbrain_expansion_slot_interface;
|
||||
|
||||
class newbrain_expansion_slot_t : public device_t,
|
||||
public device_slot_interface
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
newbrain_expansion_slot_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
virtual ~newbrain_expansion_slot_t() { }
|
||||
|
||||
// computer interface
|
||||
UINT8 mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh);
|
||||
void mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh);
|
||||
|
||||
UINT8 iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov);
|
||||
void iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
device_newbrain_expansion_slot_interface *m_card;
|
||||
};
|
||||
|
||||
|
||||
// ======================> device_newbrain_expansion_slot_interface
|
||||
|
||||
// class representing interface-specific live newbrain_expansion card
|
||||
class device_newbrain_expansion_slot_interface : public device_slot_card_interface
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
device_newbrain_expansion_slot_interface(const machine_config &mconfig, device_t &device);
|
||||
virtual ~device_newbrain_expansion_slot_interface() { }
|
||||
|
||||
// memory access
|
||||
virtual UINT8 mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) { return data; };
|
||||
virtual void mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) { };
|
||||
|
||||
// I/O access
|
||||
virtual UINT8 iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov) { return data; };
|
||||
virtual void iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov) { };
|
||||
|
||||
protected:
|
||||
newbrain_expansion_slot_t *m_slot;
|
||||
};
|
||||
|
||||
|
||||
// device type definition
|
||||
extern const device_type NEWBRAIN_EXPANSION_SLOT;
|
||||
|
||||
|
||||
SLOT_INTERFACE_EXTERN( newbrain_expansion_cards );
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
340
src/devices/bus/newbrain/fdc.cpp
Normal file
340
src/devices/bus/newbrain/fdc.cpp
Normal file
@ -0,0 +1,340 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Curt Coder
|
||||
/**********************************************************************
|
||||
|
||||
Grundy NewBrain Expansion Interface Module emulation
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
/*
|
||||
|
||||
TODO:
|
||||
|
||||
- map d413 ROM to computer space
|
||||
- paging
|
||||
|
||||
*/
|
||||
|
||||
#include "fdc.h"
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// MACROS / CONSTANTS
|
||||
//**************************************************************************
|
||||
|
||||
#define LOG 0
|
||||
|
||||
#define Z80_TAG "416"
|
||||
#define UPD765_TAG "418"
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// DEVICE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
const device_type NEWBRAIN_FDC = &device_creator<newbrain_fdc_t>;
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ROM( newbrain_fdc )
|
||||
//-------------------------------------------------
|
||||
|
||||
ROM_START( newbrain_fdc )
|
||||
ROM_REGION( 0x2000, "d413", 0 )
|
||||
ROM_LOAD( "d413-2.rom", 0x0000, 0x2000, CRC(097591f1) SHA1(c2aa1d27d4f3a24ab0c8135df746a4a44201a7f4) )
|
||||
|
||||
ROM_REGION( 0x2000, Z80_TAG, 0 )
|
||||
ROM_DEFAULT_BIOS("issue2")
|
||||
ROM_SYSTEM_BIOS( 0, "issue1", "Issue 1" )
|
||||
ROMX_LOAD( "d417-1.rom", 0x0000, 0x2000, CRC(40fad31c) SHA1(5137be4cc026972c0ffd4fa6990e8583bdfce163), ROM_BIOS(1) )
|
||||
ROM_SYSTEM_BIOS( 1, "issue2", "Issue 2" )
|
||||
ROMX_LOAD( "d417-2.rom", 0x0000, 0x2000, CRC(e8bda8b9) SHA1(c85a76a5ff7054f4ef4a472ce99ebaed1abd269c), ROM_BIOS(2) )
|
||||
ROM_END
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// rom_region - device-specific ROM region
|
||||
//-------------------------------------------------
|
||||
|
||||
const rom_entry *newbrain_fdc_t::device_rom_region() const
|
||||
{
|
||||
return ROM_NAME( newbrain_fdc );
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( newbrain_fdc_mem )
|
||||
//-------------------------------------------------
|
||||
|
||||
static ADDRESS_MAP_START( newbrain_fdc_mem, AS_PROGRAM, 8, newbrain_fdc_t )
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x0000, 0x1fff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( newbrain_fdc_io )
|
||||
//-------------------------------------------------
|
||||
|
||||
static ADDRESS_MAP_START( newbrain_fdc_io, AS_IO, 8, newbrain_fdc_t )
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xd1)
|
||||
AM_RANGE(0x00, 0x01) AM_MIRROR(0x1e) AM_DEVICE(UPD765_TAG, upd765a_device, map)
|
||||
AM_RANGE(0x20, 0x20) AM_MIRROR(0x1f) AM_WRITE(fdc_auxiliary_w)
|
||||
AM_RANGE(0x40, 0x40) AM_MIRROR(0x1f) AM_READ(fdc_control_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// newbrain_floppies
|
||||
//-------------------------------------------------
|
||||
|
||||
static SLOT_INTERFACE_START( newbrain_floppies )
|
||||
SLOT_INTERFACE( "525dd", FLOPPY_525_DD )
|
||||
SLOT_INTERFACE_END
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// MACHINE_CONFIG_FRAGMENT( newbrain_fdc )
|
||||
//-------------------------------------------------
|
||||
|
||||
static MACHINE_CONFIG_FRAGMENT( newbrain_fdc )
|
||||
MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_4MHz)
|
||||
MCFG_CPU_PROGRAM_MAP(newbrain_fdc_mem)
|
||||
MCFG_CPU_IO_MAP(newbrain_fdc_io)
|
||||
|
||||
MCFG_UPD765A_ADD(UPD765_TAG, false, true)
|
||||
MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(newbrain_fdc_t, fdc_int_w))
|
||||
|
||||
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":0", newbrain_floppies, "525dd", floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":1", newbrain_floppies, "525dd", floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":2", newbrain_floppies, nullptr, floppy_image_device::default_floppy_formats)
|
||||
MCFG_FLOPPY_DRIVE_ADD(UPD765_TAG ":3", newbrain_floppies, nullptr, floppy_image_device::default_floppy_formats)
|
||||
|
||||
MCFG_NEWBRAIN_EXPANSION_SLOT_ADD(NEWBRAIN_EXPANSION_SLOT_TAG, XTAL_16MHz/8, newbrain_expansion_cards, nullptr)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// machine_config_additions - device-specific
|
||||
// machine configurations
|
||||
//-------------------------------------------------
|
||||
|
||||
machine_config_constructor newbrain_fdc_t::device_mconfig_additions() const
|
||||
{
|
||||
return MACHINE_CONFIG_NAME( newbrain_fdc );
|
||||
}
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// LIVE DEVICE
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// newbrain_fdc_t - constructor
|
||||
//-------------------------------------------------
|
||||
|
||||
newbrain_fdc_t::newbrain_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
|
||||
device_t(mconfig, NEWBRAIN_FDC, "NewBrain FDC", tag, owner, clock, "newbrain_fdc", __FILE__),
|
||||
device_newbrain_expansion_slot_interface(mconfig, *this),
|
||||
m_maincpu(*this, Z80_TAG),
|
||||
m_fdc(*this, UPD765_TAG),
|
||||
m_floppy0(*this, UPD765_TAG ":0"),
|
||||
m_floppy1(*this, UPD765_TAG ":1"),
|
||||
m_floppy2(*this, UPD765_TAG ":2"),
|
||||
m_floppy3(*this, UPD765_TAG ":3"),
|
||||
m_exp(*this, NEWBRAIN_EXPANSION_SLOT_TAG)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void newbrain_fdc_t::device_start()
|
||||
{
|
||||
save_item(NAME(m_paging));
|
||||
save_item(NAME(m_ma16));
|
||||
save_item(NAME(m_mpm));
|
||||
save_item(NAME(m_fdc_att));
|
||||
save_item(NAME(m_fdc_int));
|
||||
save_item(NAME(m_pa15));
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_reset - device-specific reset
|
||||
//-------------------------------------------------
|
||||
|
||||
void newbrain_fdc_t::device_reset()
|
||||
{
|
||||
m_maincpu->reset();
|
||||
|
||||
moton(0);
|
||||
m_fdc->tc_w(0);
|
||||
m_pa15 = 0;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// mreq_r - memory request read
|
||||
//-------------------------------------------------
|
||||
|
||||
UINT8 newbrain_fdc_t::mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh)
|
||||
{
|
||||
return m_exp->mreq_r(space, offset, data, romov, exrm, raminh);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// mreq_w - memory request write
|
||||
//-------------------------------------------------
|
||||
|
||||
void newbrain_fdc_t::mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh)
|
||||
{
|
||||
m_exp->mreq_w(space, offset, data, romov, exrm, raminh);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// iorq_r - I/O request read
|
||||
//-------------------------------------------------
|
||||
|
||||
UINT8 newbrain_fdc_t::iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov)
|
||||
{
|
||||
return m_exp->iorq_r(space, offset, data, prtov);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// iorq_w - I/O request write
|
||||
//-------------------------------------------------
|
||||
|
||||
void newbrain_fdc_t::iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov)
|
||||
{
|
||||
m_exp->iorq_w(space, offset, data, prtov);
|
||||
|
||||
if ((offset & 0x20f) == 0x20f)
|
||||
{
|
||||
io_dec_w(space, 0, data);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// moton - floppy motor on
|
||||
//-------------------------------------------------
|
||||
|
||||
void newbrain_fdc_t::moton(int state)
|
||||
{
|
||||
if (m_floppy0->get_device()) m_floppy0->get_device()->mon_w(!state);
|
||||
if (m_floppy1->get_device()) m_floppy1->get_device()->mon_w(!state);
|
||||
if (m_floppy2->get_device()) m_floppy2->get_device()->mon_w(!state);
|
||||
if (m_floppy3->get_device()) m_floppy3->get_device()->mon_w(!state);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// fdc_int_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE_LINE_MEMBER( newbrain_fdc_t::fdc_int_w )
|
||||
{
|
||||
m_fdc_int = state;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// fdc_auxiliary_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( newbrain_fdc_t::fdc_auxiliary_w )
|
||||
{
|
||||
/*
|
||||
|
||||
bit description
|
||||
|
||||
0 MOTON
|
||||
1 765 RESET
|
||||
2 TC
|
||||
3
|
||||
4
|
||||
5 PA15
|
||||
6
|
||||
7
|
||||
|
||||
*/
|
||||
|
||||
moton(BIT(data, 0));
|
||||
|
||||
if (BIT(data, 1))
|
||||
{
|
||||
m_fdc->reset();
|
||||
}
|
||||
|
||||
m_fdc->tc_w(BIT(data, 2));
|
||||
|
||||
m_pa15 = BIT(data, 5);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// fdc_control_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( newbrain_fdc_t::fdc_control_r )
|
||||
{
|
||||
/*
|
||||
|
||||
bit description
|
||||
|
||||
0
|
||||
1
|
||||
2
|
||||
3
|
||||
4
|
||||
5 FDC INT
|
||||
6 PAGING
|
||||
7 FDC ATT
|
||||
|
||||
*/
|
||||
|
||||
return (m_fdc_att << 7) | (m_paging << 6) | (m_fdc_int << 5);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// io_dec_w - 0x20f
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( newbrain_fdc_t::io_dec_w )
|
||||
{
|
||||
/*
|
||||
|
||||
bit description
|
||||
|
||||
0 PAGING
|
||||
1
|
||||
2 MA16
|
||||
3 MPM
|
||||
4
|
||||
5 _FDC RESET
|
||||
6
|
||||
7 FDC ATT
|
||||
|
||||
*/
|
||||
|
||||
m_paging = BIT(data, 0);
|
||||
m_ma16 = BIT(data, 2);
|
||||
m_mpm = BIT(data, 3);
|
||||
|
||||
if (!BIT(data, 5))
|
||||
{
|
||||
device_reset();
|
||||
}
|
||||
|
||||
m_fdc_att = BIT(data, 7);
|
||||
}
|
||||
79
src/devices/bus/newbrain/fdc.h
Normal file
79
src/devices/bus/newbrain/fdc.h
Normal file
@ -0,0 +1,79 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Curt Coder
|
||||
/**********************************************************************
|
||||
|
||||
Grundy NewBrain FDC emulation
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __NEWBRAIN_FDC__
|
||||
#define __NEWBRAIN_FDC__
|
||||
|
||||
#include "emu.h"
|
||||
#include "exp.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "machine/upd765.h"
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
// ======================> newbrain_fdc_t
|
||||
|
||||
class newbrain_fdc_t : public device_t,
|
||||
public device_newbrain_expansion_slot_interface
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
newbrain_fdc_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
// optional information overrides
|
||||
virtual const rom_entry *device_rom_region() const override;
|
||||
virtual machine_config_constructor device_mconfig_additions() const override;
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( fdc_int_w );
|
||||
DECLARE_WRITE8_MEMBER( fdc_auxiliary_w );
|
||||
DECLARE_READ8_MEMBER( fdc_control_r );
|
||||
DECLARE_WRITE8_MEMBER( io_dec_w );
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
// device_newbrain_expansion_slot_interface overrides
|
||||
virtual UINT8 mreq_r(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) override;
|
||||
virtual void mreq_w(address_space &space, offs_t offset, UINT8 data, bool &romov, int &exrm, bool &raminh) override;
|
||||
virtual UINT8 iorq_r(address_space &space, offs_t offset, UINT8 data, bool &prtov) override;
|
||||
virtual void iorq_w(address_space &space, offs_t offset, UINT8 data, bool &prtov) override;
|
||||
|
||||
private:
|
||||
required_device<z80_device> m_maincpu;
|
||||
required_device<upd765a_device> m_fdc;
|
||||
required_device<floppy_connector> m_floppy0;
|
||||
required_device<floppy_connector> m_floppy1;
|
||||
required_device<floppy_connector> m_floppy2;
|
||||
required_device<floppy_connector> m_floppy3;
|
||||
required_device<newbrain_expansion_slot_t> m_exp;
|
||||
|
||||
void moton(int state);
|
||||
|
||||
int m_paging;
|
||||
int m_ma16;
|
||||
int m_mpm;
|
||||
int m_fdc_att;
|
||||
int m_fdc_int;
|
||||
int m_pa15;
|
||||
};
|
||||
|
||||
|
||||
// device type definition
|
||||
extern const device_type NEWBRAIN_FDC;
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
@ -86,6 +86,8 @@ const device_type COP445 = &device_creator<cop445_cpu_device>;
|
||||
CONSTANTS
|
||||
***************************************************************************/
|
||||
|
||||
#define LOG_MICROBUS 0
|
||||
|
||||
/* feature masks */
|
||||
#define COP410_FEATURE 0x01
|
||||
#define COP420_FEATURE 0x02
|
||||
@ -182,7 +184,7 @@ cop400_cpu_device::cop400_cpu_device(const machine_config &mconfig, device_type
|
||||
, m_read_cko(*this)
|
||||
, m_cki(COP400_CKI_DIVISOR_16)
|
||||
, m_cko(COP400_CKO_OSCILLATOR_OUTPUT)
|
||||
, m_microbus(COP400_MICROBUS_DISABLED)
|
||||
, m_has_microbus(false)
|
||||
, m_has_counter(has_counter)
|
||||
, m_has_inil(has_inil)
|
||||
, m_featuremask(featuremask)
|
||||
@ -324,7 +326,7 @@ void cop400_cpu_device::WRITE_Q(UINT8 data)
|
||||
{
|
||||
Q = data;
|
||||
|
||||
if (BIT(EN, 2))
|
||||
if (!m_has_microbus && BIT(EN, 2))
|
||||
{
|
||||
OUT_L(Q);
|
||||
}
|
||||
@ -332,11 +334,6 @@ void cop400_cpu_device::WRITE_Q(UINT8 data)
|
||||
|
||||
void cop400_cpu_device::WRITE_G(UINT8 data)
|
||||
{
|
||||
if (m_microbus == COP400_MICROBUS_ENABLED)
|
||||
{
|
||||
data = (data & 0x0e) | m_microbus_int;
|
||||
}
|
||||
|
||||
G = data;
|
||||
|
||||
OUT_G(G);
|
||||
@ -864,35 +861,6 @@ void cop400_cpu_device::inil_tick()
|
||||
}
|
||||
}
|
||||
|
||||
void cop400_cpu_device::microbus_tick()
|
||||
{
|
||||
UINT8 in;
|
||||
|
||||
in = IN_IN();
|
||||
|
||||
if (!BIT(in, 2))
|
||||
{
|
||||
// chip select
|
||||
|
||||
if (!BIT(in, 1))
|
||||
{
|
||||
// read strobe
|
||||
|
||||
OUT_L(Q);
|
||||
|
||||
m_microbus_int = 1;
|
||||
}
|
||||
else if (!BIT(in, 3))
|
||||
{
|
||||
// write strobe
|
||||
|
||||
Q = IN_L();
|
||||
|
||||
m_microbus_int = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
INITIALIZATION
|
||||
***************************************************************************/
|
||||
@ -900,8 +868,7 @@ void cop400_cpu_device::microbus_tick()
|
||||
enum {
|
||||
TIMER_SERIAL,
|
||||
TIMER_COUNTER,
|
||||
TIMER_INIL,
|
||||
TIMER_MICROBUS
|
||||
TIMER_INIL
|
||||
};
|
||||
|
||||
void cop400_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
|
||||
@ -919,10 +886,6 @@ void cop400_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int p
|
||||
case TIMER_INIL:
|
||||
inil_tick();
|
||||
break;
|
||||
|
||||
case TIMER_MICROBUS:
|
||||
microbus_tick();
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -971,15 +934,6 @@ void cop400_cpu_device::device_start()
|
||||
m_inil_timer->adjust(attotime::zero, 0, attotime::from_ticks(16, clock()));
|
||||
}
|
||||
|
||||
/* allocate Microbus timer */
|
||||
|
||||
m_microbus_timer = nullptr;
|
||||
if (m_microbus == COP400_MICROBUS_ENABLED)
|
||||
{
|
||||
m_microbus_timer = timer_alloc(TIMER_MICROBUS);
|
||||
m_microbus_timer->adjust(attotime::zero, 0, attotime::from_ticks(16, clock()));
|
||||
}
|
||||
|
||||
/* register for state saving */
|
||||
|
||||
save_item(NAME(m_pc));
|
||||
@ -1005,7 +959,6 @@ void cop400_cpu_device::device_start()
|
||||
save_item(NAME(m_si));
|
||||
save_item(NAME(m_last_skip));
|
||||
save_item(NAME(m_in));
|
||||
save_item(NAME(m_microbus_int));
|
||||
save_item(NAME(m_halt));
|
||||
save_item(NAME(m_idle));
|
||||
|
||||
@ -1070,7 +1023,6 @@ void cop400_cpu_device::device_start()
|
||||
m_si = 0;
|
||||
m_skip_lbi = 0;
|
||||
m_last_skip = 0;
|
||||
m_microbus_int = 0;
|
||||
m_skip = 0;
|
||||
}
|
||||
|
||||
@ -1237,3 +1189,19 @@ offs_t cop400_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT
|
||||
|
||||
return CPU_DISASSEMBLE_NAME(cop410)(this, buffer, pc, oprom, opram, options);
|
||||
}
|
||||
|
||||
READ8_MEMBER( cop400_cpu_device::microbus_rd )
|
||||
{
|
||||
if (LOG_MICROBUS) logerror("%s %s MICROBUS RD %02x\n", machine().time().as_string(), machine().describe_context(), Q);
|
||||
|
||||
return Q;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( cop400_cpu_device::microbus_wr )
|
||||
{
|
||||
if (LOG_MICROBUS) logerror("%s %s MICROBUS WR %02x\n", machine().time().as_string(), machine().describe_context(), data);
|
||||
|
||||
WRITE_G(G & 0xe);
|
||||
|
||||
Q = data;
|
||||
}
|
||||
|
||||
@ -111,12 +111,6 @@ enum cop400_cko_bond {
|
||||
COP400_CKO_GENERAL_PURPOSE_INPUT
|
||||
};
|
||||
|
||||
/* microbus bonding options */
|
||||
enum cop400_microbus {
|
||||
COP400_MICROBUS_DISABLED = 0,
|
||||
COP400_MICROBUS_ENABLED
|
||||
};
|
||||
|
||||
|
||||
#define MCFG_COP400_CONFIG(_cki, _cko, _microbus) \
|
||||
cop400_cpu_device::set_cki(*device, _cki); \
|
||||
@ -146,7 +140,10 @@ public:
|
||||
|
||||
static void set_cki(device_t &device, cop400_cki_bond cki) { downcast<cop400_cpu_device &>(device).m_cki = cki; }
|
||||
static void set_cko(device_t &device, cop400_cko_bond cko) { downcast<cop400_cpu_device &>(device).m_cko = cko; }
|
||||
static void set_microbus(device_t &device, cop400_microbus microbus) { downcast<cop400_cpu_device &>(device).m_microbus = microbus; }
|
||||
static void set_microbus(device_t &device, bool has_microbus) { downcast<cop400_cpu_device &>(device).m_has_microbus = has_microbus; }
|
||||
|
||||
DECLARE_READ8_MEMBER( microbus_rd );
|
||||
DECLARE_WRITE8_MEMBER( microbus_wr );
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
@ -194,7 +191,7 @@ protected:
|
||||
|
||||
cop400_cki_bond m_cki;
|
||||
cop400_cko_bond m_cko;
|
||||
cop400_microbus m_microbus;
|
||||
bool m_has_microbus;
|
||||
|
||||
bool m_has_counter;
|
||||
bool m_has_inil;
|
||||
@ -241,9 +238,6 @@ protected:
|
||||
int m_halt; /* halt mode */
|
||||
int m_idle; /* idle mode */
|
||||
|
||||
/* microbus */
|
||||
int m_microbus_int; /* microbus interrupt */
|
||||
|
||||
/* execution logic */
|
||||
int m_InstLen[256]; /* instruction length in bytes */
|
||||
int m_icount; /* instruction counter */
|
||||
@ -252,7 +246,6 @@ protected:
|
||||
emu_timer *m_serial_timer;
|
||||
emu_timer *m_counter_timer;
|
||||
emu_timer *m_inil_timer;
|
||||
emu_timer *m_microbus_timer;
|
||||
|
||||
typedef void ( cop400_cpu_device::*cop400_opcode_func ) (UINT8 opcode);
|
||||
|
||||
@ -277,7 +270,6 @@ protected:
|
||||
void serial_tick();
|
||||
void counter_tick();
|
||||
void inil_tick();
|
||||
void microbus_tick();
|
||||
|
||||
void PUSH(UINT16 data);
|
||||
void POP();
|
||||
|
||||
@ -68,7 +68,7 @@ static MACHINE_CONFIG_START( advision, advision_state )
|
||||
MCFG_CPU_IO_MAP(io_map)
|
||||
|
||||
MCFG_CPU_ADD(COP411_TAG, COP411, 52631*16) // COP411L-KCN/N
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_RAM_POWER_SUPPLY, COP400_MICROBUS_DISABLED)
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_RAM_POWER_SUPPLY, false)
|
||||
MCFG_COP400_READ_L_CB(READ8(advision_state, sound_cmd_r))
|
||||
MCFG_COP400_WRITE_G_CB(WRITE8(advision_state, sound_g_w))
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(advision_state, sound_d_w))
|
||||
|
||||
@ -460,7 +460,7 @@ static MACHINE_CONFIG_START( draco, draco_state )
|
||||
|
||||
MCFG_CPU_ADD(COP402N_TAG, COP402, DRACO_SND_CHR1)
|
||||
MCFG_CPU_PROGRAM_MAP(draco_sound_map)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED )
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false )
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(draco_state, sound_bankswitch_w))
|
||||
MCFG_COP400_WRITE_G_CB(WRITE8(draco_state, sound_g_w))
|
||||
MCFG_COP400_READ_L_CB(READ8(draco_state, psg_r))
|
||||
|
||||
@ -261,7 +261,7 @@ static MACHINE_CONFIG_START( ctstein, ctstein_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", COP421, 1000000) // approximation - RC osc. R=12K to +6V, C=100pf to GND
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_cop400_state, display_decay_tick, attotime::from_msec(1))
|
||||
// MCFG_DEFAULT_LAYOUT(layout_ctstein)
|
||||
@ -306,7 +306,7 @@ static MACHINE_CONFIG_START( h2hbaskb, h2hbaskb_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", COP420, 1000000) // approximation - RC osc. R=43K to +9V, C=101pf to GND
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
|
||||
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_cop400_state, display_decay_tick, attotime::from_msec(1))
|
||||
// MCFG_DEFAULT_LAYOUT(layout_h2hbaskb)
|
||||
@ -416,7 +416,7 @@ static MACHINE_CONFIG_START( einvaderc, einvaderc_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", COP444, 1000000) // approximation - RC osc. R=47K to +9V, C=100pf to GND(-9V)
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
|
||||
MCFG_COP400_READ_IN_CB(IOPORT("IN.0"))
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(einvaderc_state, write_d))
|
||||
MCFG_COP400_WRITE_G_CB(WRITE8(einvaderc_state, write_g))
|
||||
@ -524,7 +524,7 @@ static MACHINE_CONFIG_START( funjacks, funjacks_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", COP410, 2000000) // approximation - RC osc. R=47K, C=56pf
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED) // guessed
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(funjacks_state, write_d))
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(funjacks_state, write_l))
|
||||
MCFG_COP400_WRITE_G_CB(WRITE8(funjacks_state, write_g))
|
||||
@ -620,7 +620,7 @@ static MACHINE_CONFIG_START( funrlgl, funrlgl_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", COP410, 2000000) // approximation - RC osc. R=51K, C=91pf
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED) // guessed
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(funrlgl_state, write_d))
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(funrlgl_state, write_l))
|
||||
MCFG_COP400_WRITE_G_CB(WRITE8(funrlgl_state, write_g))
|
||||
@ -669,7 +669,7 @@ static MACHINE_CONFIG_START( plus1, plus1_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", COP410, 1000000) // approximation - RC osc. R=51K to +5V, C=100pf to GND
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED) // guessed
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true) // guessed
|
||||
|
||||
/* no visual feedback! */
|
||||
|
||||
@ -800,7 +800,7 @@ static MACHINE_CONFIG_START( lightfgt, lightfgt_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", COP421, 950000) // approximation - RC osc. R=82K to +6V, C=56pf to GND(-6V)
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
|
||||
MCFG_COP400_WRITE_SO_CB(WRITELINE(lightfgt_state, write_so))
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(lightfgt_state, write_d))
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(lightfgt_state, write_l))
|
||||
|
||||
@ -2788,7 +2788,7 @@ static MACHINE_CONFIG_START( eturtles, eturtles_state )
|
||||
MCFG_HMCS40_WRITE_D_CB(WRITE16(eturtles_state, grid_w))
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", COP411, 215000) // approximation
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
|
||||
MCFG_COP400_WRITE_SK_CB(WRITELINE(eturtles_state, speaker_w))
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(eturtles_state, cop_irq_w))
|
||||
MCFG_COP400_READ_L_CB(READ8(eturtles_state, cop_latch_r))
|
||||
@ -2895,7 +2895,7 @@ static MACHINE_CONFIG_START( estargte, estargte_state )
|
||||
MCFG_HMCS40_WRITE_D_CB(WRITE16(eturtles_state, grid_w))
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", COP411, 190000) // approximation
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed
|
||||
MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, false) // guessed
|
||||
MCFG_COP400_WRITE_SK_CB(WRITELINE(eturtles_state, speaker_w))
|
||||
MCFG_COP400_WRITE_D_CB(WRITE8(eturtles_state, cop_irq_w))
|
||||
MCFG_COP400_READ_L_CB(READ8(estargte_state, cop_data_r))
|
||||
|
||||
@ -102,10 +102,10 @@ static MACHINE_CONFIG_START( lisa, lisa_state )
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", lisa_state, lisa_interrupt)
|
||||
|
||||
MCFG_CPU_ADD(COP421_TAG, COP421, 3900000)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED )
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true )
|
||||
|
||||
MCFG_CPU_ADD(KB_COP421_TAG, COP421, 3900000) // ?
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED )
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true )
|
||||
|
||||
MCFG_CPU_ADD("fdccpu", M6504, 2000000) /* 16.000 MHz / 8 in when DIS asserted, 16.000 MHz / 9 otherwise (?) */
|
||||
MCFG_CPU_PROGRAM_MAP(lisa_fdc_map)
|
||||
|
||||
@ -626,7 +626,7 @@ static MACHINE_CONFIG_START( looping, looping_state )
|
||||
MCFG_TMS99xx_ADD("audiocpu", TMS9980A, SOUND_CLOCK/4, looping_sound_map, looping_sound_io_map)
|
||||
|
||||
MCFG_CPU_ADD("mcu", COP420, COP_CLOCK)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED )
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false )
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(looping_state, cop_l_w))
|
||||
MCFG_COP400_READ_L_CB(READ8(looping_state, cop_unk_r))
|
||||
MCFG_COP400_READ_G_CB(READ8(looping_state, cop_unk_r))
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -29,13 +29,13 @@ WRITE8_MEMBER( t400_test_suite_state::port_l_w )
|
||||
|
||||
static MACHINE_CONFIG_START( test_t410, t400_test_suite_state )
|
||||
MCFG_CPU_ADD("maincpu", COP410, 1000000)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED )
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, false )
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(t400_test_suite_state, port_l_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( test_t420, t400_test_suite_state )
|
||||
MCFG_CPU_ADD("maincpu", COP420, 1000000)
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED )
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, true )
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(t400_test_suite_state, port_l_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
@ -780,7 +780,7 @@ static MACHINE_CONFIG_START( thayers, thayers_state )
|
||||
MCFG_CPU_IO_MAP(thayers_io_map)
|
||||
|
||||
MCFG_CPU_ADD("mcu", COP421, XTAL_4MHz/2) // COP421L-PCA/N
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED )
|
||||
MCFG_COP400_CONFIG( COP400_CKI_DIVISOR_4, COP400_CKO_OSCILLATOR_OUTPUT, false )
|
||||
MCFG_COP400_READ_L_CB(READ8(thayers_state, cop_l_r))
|
||||
MCFG_COP400_WRITE_L_CB(WRITE8(thayers_state, cop_l_w))
|
||||
MCFG_COP400_READ_G_CB(READ8(thayers_state, cop_g_r))
|
||||
|
||||
@ -7,51 +7,22 @@
|
||||
|
||||
|
||||
#include "emu.h"
|
||||
#include "bus/newbrain/exp.h"
|
||||
#include "bus/rs232/rs232.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "cpu/z80/z80daisy.h"
|
||||
#include "cpu/cop400/cop400.h"
|
||||
#include "imagedev/cassette.h"
|
||||
#include "machine/6850acia.h"
|
||||
#include "machine/adc0808.h"
|
||||
#include "machine/z80ctc.h"
|
||||
#include "machine/rescap.h"
|
||||
#include "machine/ram.h"
|
||||
#include "machine/upd765.h"
|
||||
|
||||
#define SCREEN_TAG "screen"
|
||||
#define Z80_TAG "409"
|
||||
#define COP420_TAG "419"
|
||||
#define MC6850_TAG "459"
|
||||
#define ADC0809_TAG "427"
|
||||
#define DAC0808_TAG "461"
|
||||
#define Z80CTC_TAG "458"
|
||||
#define FDC_Z80_TAG "416"
|
||||
#define UPD765_TAG "418"
|
||||
|
||||
#define NEWBRAIN_EIM_RAM_SIZE 0x10000
|
||||
|
||||
#define NEWBRAIN_ENRG1_CLK 0x01
|
||||
#define NEWBRAIN_ENRG1_TVP 0x04
|
||||
#define NEWBRAIN_ENRG1_CTS 0x10
|
||||
#define NEWBRAIN_ENRG1_DO 0x20
|
||||
#define NEWBRAIN_ENRG1_PO 0x80
|
||||
#define NEWBRAIN_ENRG1_UST_BIT_1_MASK 0x30
|
||||
#define NEWBRAIN_ENRG1_UST_BIT_0_MASK 0xc0
|
||||
|
||||
#define NEWBRAIN_ENRG2_USERP 0x01
|
||||
#define NEWBRAIN_ENRG2_ANP 0x02
|
||||
#define NEWBRAIN_ENRG2_MLTMD 0x04
|
||||
#define NEWBRAIN_ENRG2_MSPD 0x08
|
||||
#define NEWBRAIN_ENRG2_ENOR 0x10
|
||||
#define NEWBRAIN_ENRG2_ANSW 0x20
|
||||
#define NEWBRAIN_ENRG2_ENOT 0x40
|
||||
#define NEWBRAIN_ENRG2_CENTRONICS_OUT 0x80
|
||||
|
||||
#define NEWBRAIN_VIDEO_RV 0x01
|
||||
#define NEWBRAIN_VIDEO_FS 0x02
|
||||
#define NEWBRAIN_VIDEO_32_40 0x04
|
||||
#define NEWBRAIN_VIDEO_UCR 0x08
|
||||
#define NEWBRAIN_VIDEO_80L 0x40
|
||||
#define CASSETTE_TAG "cassette"
|
||||
#define CASSETTE2_TAG "cassette2"
|
||||
#define RS232_V24_TAG "to"
|
||||
#define RS232_PRN_TAG "po"
|
||||
|
||||
class newbrain_state : public driver_device
|
||||
{
|
||||
@ -59,12 +30,15 @@ public:
|
||||
newbrain_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, Z80_TAG),
|
||||
m_copcpu(*this, COP420_TAG),
|
||||
m_cop(*this, COP420_TAG),
|
||||
m_palette(*this, "palette"),
|
||||
m_cassette1(*this, "cassette"),
|
||||
m_cassette2(*this, "cassette2"),
|
||||
m_exp(*this, NEWBRAIN_EXPANSION_SLOT_TAG),
|
||||
m_cassette1(*this, CASSETTE_TAG),
|
||||
m_cassette2(*this, CASSETTE2_TAG),
|
||||
m_rs232_v24(*this, RS232_V24_TAG),
|
||||
m_rs232_prn(*this, RS232_PRN_TAG),
|
||||
m_ram(*this, RAM_TAG),
|
||||
m_rom(*this, Z80_TAG),
|
||||
m_eim_rom(*this, "eim"),
|
||||
m_char_rom(*this, "chargen"),
|
||||
m_y0(*this, "Y0"),
|
||||
m_y1(*this, "Y1"),
|
||||
@ -81,39 +55,37 @@ public:
|
||||
m_y12(*this, "Y12"),
|
||||
m_y13(*this, "Y13"),
|
||||
m_y14(*this, "Y14"),
|
||||
m_y15(*this, "Y15")
|
||||
m_y15(*this, "Y15"),
|
||||
m_pwrup(0),
|
||||
m_userint(1),
|
||||
m_clkint(1),
|
||||
m_copint(1),
|
||||
m_keylatch(0),
|
||||
m_keydata(0xf)
|
||||
{
|
||||
}
|
||||
|
||||
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
DECLARE_READ8_MEMBER( mreq_r );
|
||||
DECLARE_WRITE8_MEMBER( mreq_w );
|
||||
DECLARE_READ8_MEMBER( iorq_r );
|
||||
DECLARE_WRITE8_MEMBER( iorq_w );
|
||||
|
||||
DECLARE_WRITE8_MEMBER( enrg1_w );
|
||||
DECLARE_WRITE8_MEMBER( a_enrg1_w );
|
||||
DECLARE_READ8_MEMBER( ust_r );
|
||||
DECLARE_READ8_MEMBER( a_ust_r );
|
||||
DECLARE_READ8_MEMBER( user_r );
|
||||
DECLARE_WRITE8_MEMBER( user_w );
|
||||
DECLARE_READ8_MEMBER( clclk_r );
|
||||
DECLARE_WRITE8_MEMBER( clclk_w );
|
||||
DECLARE_READ8_MEMBER( clusr_r );
|
||||
DECLARE_WRITE8_MEMBER( clusr_w );
|
||||
DECLARE_READ8_MEMBER( cop_l_r );
|
||||
DECLARE_WRITE8_MEMBER( cop_l_w );
|
||||
DECLARE_WRITE8_MEMBER( tvtl_w );
|
||||
DECLARE_READ8_MEMBER( ust_a_r );
|
||||
DECLARE_READ8_MEMBER( ust_b_r );
|
||||
|
||||
DECLARE_WRITE8_MEMBER( cop_g_w );
|
||||
DECLARE_READ8_MEMBER( cop_g_r );
|
||||
DECLARE_WRITE8_MEMBER( cop_d_w );
|
||||
DECLARE_READ8_MEMBER( cop_in_r );
|
||||
DECLARE_WRITE_LINE_MEMBER( cop_sk_w );
|
||||
DECLARE_READ_LINE_MEMBER( cop_si_r );
|
||||
DECLARE_WRITE_LINE_MEMBER( cop_so_w );
|
||||
DECLARE_READ8_MEMBER( tvl_r );
|
||||
DECLARE_WRITE8_MEMBER( tvl_w );
|
||||
DECLARE_WRITE8_MEMBER( tvctl_w );
|
||||
DECLARE_READ8_MEMBER( cop_r );
|
||||
DECLARE_WRITE8_MEMBER( cop_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( k2_w );
|
||||
DECLARE_READ_LINE_MEMBER( tdi_r );
|
||||
DECLARE_WRITE_LINE_MEMBER( k1_w );
|
||||
|
||||
INTERRUPT_GEN_MEMBER(newbrain_interrupt);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(cop_regint_tick);
|
||||
|
||||
protected:
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
|
||||
@ -129,19 +101,26 @@ protected:
|
||||
};
|
||||
|
||||
void check_interrupt();
|
||||
void bankswitch();
|
||||
void tvram_w(UINT8 data, int a6);
|
||||
inline int get_reset_t();
|
||||
inline int get_pwrup_t();
|
||||
void screen_update(bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
void clclk();
|
||||
int tpin();
|
||||
void tm();
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<cpu_device> m_copcpu;
|
||||
int get_reset_t();
|
||||
int get_pwrup_t();
|
||||
|
||||
void screen_update(bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
void tvl(UINT8 data, int a6);
|
||||
|
||||
required_device<z80_device> m_maincpu;
|
||||
required_device<cop400_cpu_device> m_cop;
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<newbrain_expansion_slot_t> m_exp;
|
||||
required_device<cassette_image_device> m_cassette1;
|
||||
required_device<cassette_image_device> m_cassette2;
|
||||
required_device<rs232_port_device> m_rs232_v24;
|
||||
required_device<rs232_port_device> m_rs232_prn;
|
||||
required_device<ram_device> m_ram;
|
||||
required_memory_region m_rom;
|
||||
optional_memory_region m_eim_rom;
|
||||
required_memory_region m_char_rom;
|
||||
required_ioport m_y0;
|
||||
required_ioport m_y1;
|
||||
@ -160,112 +139,31 @@ protected:
|
||||
required_ioport m_y14;
|
||||
required_ioport m_y15;
|
||||
|
||||
// processor state
|
||||
int m_pwrup; // power up
|
||||
int m_userint; // user interrupt
|
||||
int m_userint0; // parallel port interrupt
|
||||
int m_clkint; // clock interrupt
|
||||
int m_aciaint; // ACIA interrupt
|
||||
int m_copint; // COP interrupt
|
||||
int m_anint; // A/DC interrupt
|
||||
int m_bee; // identity
|
||||
UINT8 m_enrg1; // enable register 1
|
||||
UINT8 m_enrg2; // enable register 2
|
||||
int m_acia_txd; // ACIA transmit
|
||||
int m_clk;
|
||||
int m_tvp;
|
||||
int m_pwrup;
|
||||
int m_userint;
|
||||
int m_clkint;
|
||||
int m_copint;
|
||||
|
||||
// COP420 state
|
||||
UINT8 m_cop_bus; // data bus
|
||||
int m_cop_so; // serial out
|
||||
int m_cop_tdo; // tape data output
|
||||
int m_cop_tdi; // tape data input
|
||||
int m_cop_rd; // memory read
|
||||
int m_cop_wr; // memory write
|
||||
int m_cop_access; // COP access
|
||||
int m_cop_so;
|
||||
int m_cop_tdo;
|
||||
int m_cop_g1;
|
||||
int m_cop_g3;
|
||||
int m_cop_k6;
|
||||
|
||||
// keyboard state
|
||||
ioport_port* m_key_row[16];
|
||||
int m_keylatch; // keyboard row
|
||||
int m_keydata; // keyboard column
|
||||
int m_keylatch;
|
||||
int m_keydata;
|
||||
UINT16 m_segment_data;
|
||||
|
||||
// video state
|
||||
int m_segment_data[16]; // VF segment data
|
||||
int m_tvcnsl; // TV console required
|
||||
int m_tvctl; // TV control register
|
||||
UINT16 m_tvram; // TV start address
|
||||
|
||||
// user bus state
|
||||
UINT8 m_user;
|
||||
|
||||
// devices
|
||||
UINT8 m_copdata;
|
||||
int m_copstate;
|
||||
int m_copbytes;
|
||||
int m_copregint;
|
||||
int m_rv;
|
||||
int m_fs;
|
||||
int m_32_40;
|
||||
int m_ucr;
|
||||
int m_80l;
|
||||
UINT16 m_tvl;
|
||||
};
|
||||
|
||||
class newbrain_eim_state : public newbrain_state
|
||||
{
|
||||
public:
|
||||
newbrain_eim_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: newbrain_state(mconfig, type, tag),
|
||||
m_fdccpu(*this, FDC_Z80_TAG),
|
||||
m_ctc(*this, Z80CTC_TAG),
|
||||
m_acia(*this, MC6850_TAG),
|
||||
m_fdc(*this, UPD765_TAG),
|
||||
m_floppy(*this, UPD765_TAG ":0:525dd"),
|
||||
m_eim_ram(*this, "eim_ram")
|
||||
{ }
|
||||
|
||||
required_device<cpu_device> m_fdccpu;
|
||||
required_device<z80ctc_device> m_ctc;
|
||||
required_device<acia6850_device> m_acia;
|
||||
required_device<upd765a_device> m_fdc;
|
||||
required_device<floppy_image_device> m_floppy;
|
||||
optional_shared_ptr<UINT8> m_eim_ram;
|
||||
|
||||
virtual void machine_start() override;
|
||||
|
||||
DECLARE_WRITE8_MEMBER( fdc_auxiliary_w );
|
||||
DECLARE_READ8_MEMBER( fdc_control_r );
|
||||
DECLARE_READ8_MEMBER( ust2_r );
|
||||
DECLARE_WRITE8_MEMBER( enrg2_w );
|
||||
DECLARE_WRITE8_MEMBER( pr_w );
|
||||
DECLARE_READ8_MEMBER( user_r );
|
||||
DECLARE_WRITE8_MEMBER( user_w );
|
||||
DECLARE_READ8_MEMBER( anout_r );
|
||||
DECLARE_WRITE8_MEMBER( anout_w );
|
||||
DECLARE_READ8_MEMBER( anin_r );
|
||||
DECLARE_WRITE8_MEMBER( anio_w );
|
||||
DECLARE_READ8_MEMBER( st0_r );
|
||||
DECLARE_READ8_MEMBER( st1_r );
|
||||
DECLARE_READ8_MEMBER( st2_r );
|
||||
DECLARE_READ8_MEMBER( usbs_r );
|
||||
DECLARE_WRITE8_MEMBER( usbs_w );
|
||||
DECLARE_WRITE8_MEMBER( paging_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( acia_tx );
|
||||
DECLARE_WRITE_LINE_MEMBER( acia_interrupt );
|
||||
DECLARE_WRITE_LINE_MEMBER( fdc_interrupt );
|
||||
DECLARE_WRITE_LINE_MEMBER( ctc_z2_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( adc_eoc_w );
|
||||
|
||||
ADC0808_ANALOG_READ_CB(adc_vref_pos_r);
|
||||
ADC0808_ANALOG_READ_CB(adc_vref_neg_r);
|
||||
ADC0808_ANALOG_READ_CB(adc_input_r);
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(ctc_c2_tick);
|
||||
|
||||
void bankswitch();
|
||||
|
||||
// paging state
|
||||
int m_paging; // paging enabled
|
||||
int m_mpm; // multi paging mode ?
|
||||
int m_a16; // address line 16
|
||||
UINT8 m_pr[16]; // expansion interface paging register
|
||||
|
||||
// floppy state
|
||||
int m_fdc_int; // interrupt
|
||||
int m_fdc_att; // attention
|
||||
};
|
||||
|
||||
// ---------- defined in video/newbrain.c ----------
|
||||
|
||||
|
||||
@ -1,11 +1,17 @@
|
||||
<?xml version="1.0"?>
|
||||
<mamelayout version="2">
|
||||
<element name="digit" defstate="0">
|
||||
<led16seg>
|
||||
<color red="0.0" green="1.0" blue="1.0" />
|
||||
</led16seg>
|
||||
<led16seg>
|
||||
<color red="0.0" green="1.0" blue="1.0" />
|
||||
</led16seg>
|
||||
</element>
|
||||
|
||||
<view name="Standard">
|
||||
<screen index="0">
|
||||
<bounds left="0" top="0" right="4" bottom="3" />
|
||||
</screen>
|
||||
</view>
|
||||
|
||||
<view name="VF Display">
|
||||
<bezel name="digit0" element="digit">
|
||||
<bounds x="0" y="0" width="20" height="30" />
|
||||
@ -13,53 +19,47 @@
|
||||
<bezel name="digit1" element="digit">
|
||||
<bounds x="20" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit2" element="digit">
|
||||
<bounds x="40" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit3" element="digit">
|
||||
<bounds x="60" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit4" element="digit">
|
||||
<bounds x="80" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit5" element="digit">
|
||||
<bounds x="100" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit6" element="digit">
|
||||
<bounds x="120" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit7" element="digit">
|
||||
<bounds x="140" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit8" element="digit">
|
||||
<bounds x="160" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit9" element="digit">
|
||||
<bounds x="180" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit10" element="digit">
|
||||
<bounds x="200" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit11" element="digit">
|
||||
<bounds x="220" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit12" element="digit">
|
||||
<bounds x="240" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit13" element="digit">
|
||||
<bounds x="260" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit14" element="digit">
|
||||
<bounds x="280" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit15" element="digit">
|
||||
<bounds x="300" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
</view>
|
||||
|
||||
<view name="Standard">
|
||||
<screen index="0">
|
||||
<bounds left="0" top="0" right="4" bottom="3" />
|
||||
</screen>
|
||||
<bezel name="digit2" element="digit">
|
||||
<bounds x="40" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit3" element="digit">
|
||||
<bounds x="60" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit4" element="digit">
|
||||
<bounds x="80" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit5" element="digit">
|
||||
<bounds x="100" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit6" element="digit">
|
||||
<bounds x="120" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit7" element="digit">
|
||||
<bounds x="140" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit8" element="digit">
|
||||
<bounds x="160" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit9" element="digit">
|
||||
<bounds x="180" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit10" element="digit">
|
||||
<bounds x="200" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit11" element="digit">
|
||||
<bounds x="220" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit12" element="digit">
|
||||
<bounds x="240" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit13" element="digit">
|
||||
<bounds x="260" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit14" element="digit">
|
||||
<bounds x="280" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
<bezel name="digit15" element="digit">
|
||||
<bounds x="300" y="0" width="20" height="30" />
|
||||
</bezel>
|
||||
</view>
|
||||
</mamelayout>
|
||||
|
||||
@ -28221,7 +28221,6 @@ nespal // Nintendo Entertainment System PAL
|
||||
//@source:newbrain.cpp
|
||||
newbrain //
|
||||
newbraina //
|
||||
newbraineim //
|
||||
newbrainmd //
|
||||
|
||||
//@source:news.cpp
|
||||
|
||||
@ -4,39 +4,81 @@
|
||||
#include "rendlay.h"
|
||||
#include "newbrain.lh"
|
||||
|
||||
#define LOG 0
|
||||
|
||||
#define NEWBRAIN_VIDEO_RV 0x01
|
||||
#define NEWBRAIN_VIDEO_FS 0x02
|
||||
#define NEWBRAIN_VIDEO_32_40 0x04
|
||||
#define NEWBRAIN_VIDEO_UCR 0x08
|
||||
#define NEWBRAIN_VIDEO_80L 0x40
|
||||
|
||||
void newbrain_state::tvl(UINT8 data, int a6)
|
||||
{
|
||||
/* latch video address counter bits A5-A0 */
|
||||
m_tvl = m_80l ? 0x04 : 0x02;
|
||||
|
||||
/* latch video address counter bit A6 */
|
||||
m_tvl |= a6 << 6;
|
||||
|
||||
/* latch data to video address counter bits A14-A7 */
|
||||
m_tvl |= (data << 7);
|
||||
|
||||
if (LOG) logerror("%s %s TVL %04x\n", machine().time().as_string(), machine().describe_context(), m_tvl);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( newbrain_state::tvtl_w )
|
||||
{
|
||||
/*
|
||||
|
||||
bit signal description
|
||||
|
||||
0 RV 1 reverses video over entire field, ie. black on white
|
||||
1 FS 0 generates 128 characters and 128 reverse field characters from 8 bit character code. 1 generates 256 characters from 8 bit character code
|
||||
2 32/_40 0 generates 320 or 640 horizontal dots in pixel graphics mode. 1 generates 256 or 512 horizontal dots in pixel graphics mode
|
||||
3 UCR 0 selects 256 characters expressed in an 8x10 matrix, and 25 lines (max) displayed. 1 selects 256 characters in an 8x8 matrix, and 31 lines (max) displayed
|
||||
4
|
||||
5
|
||||
6 80L 0 selects 40 character line length. 1 selects 80 character line length
|
||||
7
|
||||
|
||||
*/
|
||||
|
||||
if (LOG) logerror("%s %s TVTL %02x\n", machine().time().as_string(), machine().describe_context(), data);
|
||||
|
||||
m_rv = BIT(data, 0);
|
||||
m_fs = BIT(data, 1);
|
||||
m_32_40 = BIT(data, 2);
|
||||
m_ucr = BIT(data, 3);
|
||||
m_80l = BIT(data, 6);
|
||||
}
|
||||
|
||||
void newbrain_state::video_start()
|
||||
{
|
||||
/* register for state saving */
|
||||
save_item(NAME(m_tvcnsl));
|
||||
save_item(NAME(m_tvctl));
|
||||
save_item(NAME(m_tvram));
|
||||
save_item(NAME(m_segment_data));
|
||||
// state saving
|
||||
save_item(NAME(m_rv));
|
||||
save_item(NAME(m_fs));
|
||||
save_item(NAME(m_32_40));
|
||||
save_item(NAME(m_ucr));
|
||||
save_item(NAME(m_80l));
|
||||
save_item(NAME(m_tvl));
|
||||
}
|
||||
|
||||
void newbrain_state::screen_update(bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
address_space &program = m_maincpu->space(AS_PROGRAM);
|
||||
|
||||
int y, sx;
|
||||
int columns = (m_tvctl & NEWBRAIN_VIDEO_80L) ? 80 : 40;
|
||||
int excess = (m_tvctl & NEWBRAIN_VIDEO_32_40) ? 24 : 4;
|
||||
int ucr = (m_tvctl & NEWBRAIN_VIDEO_UCR) ? 1 : 0;
|
||||
int fs = (m_tvctl & NEWBRAIN_VIDEO_FS) ? 1 : 0;
|
||||
int rv = (m_tvctl & NEWBRAIN_VIDEO_RV) ? 1 : 0;
|
||||
int columns = m_80l ? 80 : 40;
|
||||
int excess = m_32_40 ? 4 : 24;
|
||||
int gr = 0;
|
||||
|
||||
UINT16 videoram_addr = m_tvram;
|
||||
UINT16 videoram_addr = m_tvl;
|
||||
UINT8 rc = 0;
|
||||
|
||||
for (y = 0; y < 250; y++)
|
||||
for (int y = 0; y < 200; y++)
|
||||
{
|
||||
int x = 0;
|
||||
|
||||
for (sx = 0; sx < columns; sx++)
|
||||
for (int sx = 0; sx < columns; sx++)
|
||||
{
|
||||
int bit;
|
||||
|
||||
UINT8 videoram_data = program.read_byte(videoram_addr + sx);
|
||||
UINT8 videoram_data = m_ram->pointer()[(videoram_addr + sx) & 0x7fff];
|
||||
UINT8 charrom_data;
|
||||
|
||||
if (gr)
|
||||
@ -47,25 +89,25 @@ void newbrain_state::screen_update(bitmap_rgb32 &bitmap, const rectangle &clipre
|
||||
else
|
||||
{
|
||||
/* render character rom data */
|
||||
UINT16 charrom_addr = (rc << 8) | ((BIT(videoram_data, 7) & fs) << 7) | (videoram_data & 0x7f);
|
||||
UINT16 charrom_addr = (rc << 8) | ((BIT(videoram_data, 7) && m_fs) << 7) | (videoram_data & 0x7f);
|
||||
charrom_data = m_char_rom->base()[charrom_addr & 0xfff];
|
||||
|
||||
if ((videoram_data & 0x80) && !fs)
|
||||
if ((videoram_data & 0x80) && !m_fs)
|
||||
{
|
||||
/* invert character */
|
||||
charrom_data ^= 0xff;
|
||||
}
|
||||
|
||||
if ((videoram_data & 0x60) && !ucr)
|
||||
if ((videoram_data & 0x60) && !m_ucr)
|
||||
{
|
||||
/* strip bit D0 */
|
||||
charrom_data &= 0xfe;
|
||||
}
|
||||
}
|
||||
|
||||
for (bit = 0; bit < 8; bit++)
|
||||
for (int bit = 0; bit < 8; bit++)
|
||||
{
|
||||
int color = BIT(charrom_data, 7) ^ rv;
|
||||
int color = BIT(charrom_data, 7) ^ m_rv;
|
||||
|
||||
bitmap.pix32(y, x++) = m_palette->pen(color);
|
||||
|
||||
@ -89,7 +131,7 @@ void newbrain_state::screen_update(bitmap_rgb32 &bitmap, const rectangle &clipre
|
||||
/* increase row counter */
|
||||
rc++;
|
||||
|
||||
if (rc == (ucr ? 8 : 10))
|
||||
if (rc == (m_ucr ? 8 : 10))
|
||||
{
|
||||
/* reset row counter */
|
||||
rc = 0;
|
||||
@ -103,7 +145,7 @@ void newbrain_state::screen_update(bitmap_rgb32 &bitmap, const rectangle &clipre
|
||||
|
||||
UINT32 newbrain_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
if (m_enrg1 & NEWBRAIN_ENRG1_TVP)
|
||||
if (m_tvp)
|
||||
{
|
||||
screen_update(bitmap, cliprect);
|
||||
}
|
||||
@ -115,6 +157,24 @@ UINT32 newbrain_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* F4 Character Displayer */
|
||||
static const gfx_layout newbrain_charlayout =
|
||||
{
|
||||
8, 10, /* 8 x 10 characters */
|
||||
256, /* 256 characters */
|
||||
1, /* 1 bits per pixel */
|
||||
{ 0 }, /* no bitplanes */
|
||||
/* x offsets */
|
||||
{ 0, 1, 2, 3, 4, 5, 6, 7 },
|
||||
/* y offsets */
|
||||
{ 0*256*8, 1*256*8, 2*256*8, 3*256*8, 4*256*8, 5*256*8, 6*256*8, 7*256*8, 8*256*8, 9*256*8, 10*256*8, 11*256*8, 12*256*8, 13*256*8, 14*256*8, 15*256*8 },
|
||||
8 /* every char takes 16 x 1 bytes */
|
||||
};
|
||||
|
||||
static GFXDECODE_START( newbrain )
|
||||
GFXDECODE_ENTRY( "chargen", 0x0000, newbrain_charlayout, 0, 1 )
|
||||
GFXDECODE_END
|
||||
|
||||
/* Machine Drivers */
|
||||
|
||||
MACHINE_CONFIG_FRAGMENT( newbrain_video )
|
||||
@ -127,5 +187,7 @@ MACHINE_CONFIG_FRAGMENT( newbrain_video )
|
||||
MCFG_SCREEN_SIZE(640, 250)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 249)
|
||||
|
||||
MCFG_PALETTE_ADD_BLACK_AND_WHITE("palette")
|
||||
MCFG_PALETTE_ADD_MONOCHROME_GREEN("palette")
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", newbrain)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
Loading…
Reference in New Issue
Block a user