mirror of
https://github.com/holub/mame
synced 2025-10-06 17:08:28 +03:00
-st62xx: Various updates: [Ryan Holtz]
* Init peripheral registers to the correct values on reset. * Reworked stack display in the debugger. * Hooked up data RAM. * Hooked up ROM and RAM banking. * Added named registers to the disassembler.
This commit is contained in:
mooglyguy
parent
d16825eca7
commit
9c3661b004
@ -65,7 +65,12 @@ void st6228_device::device_start()
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state_add(STATE_FLAGS, "FLAGS", m_flags[0]).mask(0x3f);
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state_add(STATE_PC, "PC", m_pc).mask(0xfff);
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state_add(STATE_SP, "SP", m_stack_index).mask(0x7);
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state_add(STATE_STACK, "STACK", m_stack[0]).callimport().callexport().formatstr("%04X");
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state_add(STATE_STACK0, "STACK0", m_stack[0]).formatstr("%03X");
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state_add(STATE_STACK1, "STACK1", m_stack[1]).formatstr("%03X");
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state_add(STATE_STACK2, "STACK2", m_stack[2]).formatstr("%03X");
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state_add(STATE_STACK3, "STACK3", m_stack[3]).formatstr("%03X");
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state_add(STATE_STACK4, "STACK4", m_stack[4]).formatstr("%03X");
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state_add(STATE_STACK5, "STACK5", m_stack[5]).formatstr("%03X");
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state_add(STATE_A, "A", m_regs[REG_A]);
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state_add(STATE_X, "X", m_regs[REG_X]);
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state_add(STATE_Y, "Y", m_regs[REG_Y]);
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@ -105,6 +110,11 @@ void st6228_device::device_reset()
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m_rambank->set_entry(0);
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m_program_rombank->set_entry(0);
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m_data_rombank->set_entry(0);
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m_regs[REG_TIMER_COUNT] = 0xff;
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m_regs[REG_TIMER_PRESCALE] = 0x7f;
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m_regs[REG_WATCHDOG] = 0xfe;
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m_regs[REG_AD_CONTROL] = 0x40;
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}
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device_memory_interface::space_config_vector st6228_device::memory_space_config() const
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@ -128,9 +138,6 @@ void st6228_device::state_string_export(const device_state_entry &entry, std::st
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(m_flags[0] & FLAG_C) ? 'C' : '.',
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(m_flags[0] & FLAG_Z) ? 'Z' : '.');
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break;
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case STATE_STACK:
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str = string_format("%04X", m_stack[m_stack_index]);
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break;
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}
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}
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@ -143,6 +150,13 @@ WRITE8_MEMBER(st6228_device::regs_w)
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{
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offset += 0x80;
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if (offset > REG_W && offset < REG_PORTA_DATA)
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{
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// Data RAM
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m_regs[offset] = data;
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return;
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}
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switch (offset)
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{
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case REG_X:
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@ -152,6 +166,23 @@ WRITE8_MEMBER(st6228_device::regs_w)
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case REG_A:
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m_regs[offset] = data;
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break;
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case REG_DATA_ROM_WINDOW:
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m_data_rombank->set_entry(data & 0x7f);
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break;
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case REG_ROM_BANK_SELECT:
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m_program_rombank->set_entry(data & 3);
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break;
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case REG_RAM_BANK_SELECT:
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m_rambank->set_entry(data & 1);
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break;
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case REG_WATCHDOG:
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// Do nothing for now
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break;
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default:
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logerror("%s: Unknown register write: %02x = %02x\n", machine().describe_context(), offset, data);
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break;
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@ -163,6 +194,12 @@ READ8_MEMBER(st6228_device::regs_r)
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uint8_t ret = 0;
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offset += 0x80;
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if (offset > REG_W && offset < REG_PORTA_DATA)
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{
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// Data RAM
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return m_regs[offset];
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}
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switch (offset)
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{
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case REG_X:
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@ -395,7 +432,7 @@ void st6228_device::execute_run()
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case 0x0d: // LDI rr,nn
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{
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const uint8_t rr = m_program->read_byte(m_pc);
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const uint8_t nn = m_program->read_byte(m_pc);
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const uint8_t nn = m_program->read_byte(m_pc + 1);
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m_data->write_byte(rr, nn);
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if (nn)
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@ -69,7 +69,12 @@ protected:
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STATE_FLAGS = 1,
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STATE_PC,
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STATE_SP,
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STATE_STACK,
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STATE_STACK0,
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STATE_STACK1,
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STATE_STACK2,
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STATE_STACK3,
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STATE_STACK4,
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STATE_STACK5,
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STATE_A,
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STATE_X,
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STATE_Y,
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@ -17,6 +17,37 @@ uint32_t st62xx_disassembler::opcode_alignment() const
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return 1;
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}
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std::string st62xx_disassembler::reg_name(const uint8_t reg)
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{
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static const char* REG_NAMES[256] =
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{
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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"X", "Y", "V", "W", nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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"DRA", "DRB", "DRC", "DRD", "DDRA", "DDRB", "DDRC", "DDRD", "IOR", "DWR", "PRPR", "DRBR", "ORA", "ORB", "ORC", "ORD",
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"ADR", "ADCR", "PSC", "TCR", "TSCR", nullptr, "UARTDR","UARTCR", "DWDR", nullptr, "IPR", nullptr, "SIDR", "SDSR", nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, "ARMC", "ARSC0", "ARSC1", nullptr, "ARRC", "ARCP", "ARLR", nullptr, nullptr, nullptr, nullptr,
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nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
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};
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if (REG_NAMES[reg])
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return std::string(REG_NAMES[reg]);
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else
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return util::string_format("$%02Xh", reg);
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}
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offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
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{
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offs_t base_pc = pc;
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@ -141,22 +172,14 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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break;
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case 0x0d:
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{
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const uint8_t nn = opcodes.r8(pc);
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pc++;
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const uint8_t rr = opcodes.r8(pc);
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pc++;
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if (rr == 0 && nn == 0x80)
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util::stream_format(stream, "CLR X");
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else if (rr == 0 && nn == 0x81)
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util::stream_format(stream, "CLR Y");
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else if (rr == 0 && nn == 0x82)
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util::stream_format(stream, "CLR V");
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else if (rr == 0 && nn == 0x83)
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util::stream_format(stream, "CLR W");
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else if (rr == 0)
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util::stream_format(stream, "CLR $%Xh", nn);
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const uint8_t nn = opcodes.r8(pc);
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pc++;
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if (nn == 0)
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util::stream_format(stream, "CLR %s", reg_name(rr));
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else
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util::stream_format(stream, "LDI $%Xh,%Xh", rr, nn);
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util::stream_format(stream, "LDI %s,%Xh", reg_name(rr), nn);
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break;
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}
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case 0x1d:
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@ -206,9 +229,9 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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break;
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case 0x17:
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{
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const uint8_t rr = opcodes.r8(pc);
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const uint8_t nn = opcodes.r8(pc);
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pc++;
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util::stream_format(stream, "LDI A,%Xh", rr);
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util::stream_format(stream, "LDI A,%Xh", nn);
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break;
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}
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case 0x27:
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@ -267,7 +290,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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{
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const uint8_t rr = opcodes.r8(pc);
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pc++;
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util::stream_format(stream, "LD A,%Xh", rr);
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util::stream_format(stream, "LD A,%s", reg_name(rr));
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break;
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}
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case 0x2f:
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@ -277,7 +300,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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{
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const uint8_t rr = opcodes.r8(pc);
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pc++;
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util::stream_format(stream, "CP A,%Xh", rr); // rr
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util::stream_format(stream, "CP A,%s", reg_name(rr)); // rr
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break;
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}
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case 0x4f:
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@ -290,7 +313,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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if (rr == 0xff)
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util::stream_format(stream, "SLA A");
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else
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util::stream_format(stream, "ADD A,%Xh", rr);
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util::stream_format(stream, "ADD A,%s", reg_name(rr));
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break;
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}
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case 0x6f:
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@ -300,18 +323,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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{
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const uint8_t rr = opcodes.r8(pc);
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pc++;
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if (rr == 0xff)
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util::stream_format(stream, "INC A"); // rr
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else if (rr == 0x80)
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util::stream_format(stream, "INC X"); // rr
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else if (rr == 0x81)
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util::stream_format(stream, "INC Y"); // rr
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else if (rr == 0x82)
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util::stream_format(stream, "INC V"); // rr
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else if (rr == 0x83)
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util::stream_format(stream, "INC W"); // rr
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else
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util::stream_format(stream, "INC %Xh", rr); // rr
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util::stream_format(stream, "INC %s", reg_name(rr)); // rr
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break;
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}
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case 0x8f:
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@ -321,7 +333,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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{
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const uint8_t rr = opcodes.r8(pc);
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pc++;
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util::stream_format(stream, "LD %Xh,A", rr); // rr
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util::stream_format(stream, "LD %s,A", reg_name(rr)); // rr
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break;
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}
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case 0xaf:
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@ -331,18 +343,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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{
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const uint8_t rr = opcodes.r8(pc);
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pc++;
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if (rr == 0xff)
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util::stream_format(stream, "AND A,A"); // rr
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else if (rr == 0x80)
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util::stream_format(stream, "AND A,X"); // rr
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else if (rr == 0x81)
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util::stream_format(stream, "AND A,Y"); // rr
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else if (rr == 0x82)
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util::stream_format(stream, "AND A,V"); // rr
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else if (rr == 0x83)
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util::stream_format(stream, "AND A,W"); // rr
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else
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util::stream_format(stream, "AND A,%Xh", rr); // rr
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util::stream_format(stream, "AND A,%s", reg_name(rr)); // rr
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break;
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}
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case 0xcf:
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@ -355,7 +356,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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if (rr == 0xff)
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util::stream_format(stream, "CLR A", rr);
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else
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util::stream_format(stream, "SUB A,%Xh", rr);
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util::stream_format(stream, "SUB A,%s", reg_name(rr));
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break;
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}
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case 0xef:
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@ -365,18 +366,7 @@ offs_t st62xx_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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{
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const uint8_t rr = opcodes.r8(pc);
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pc++;
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if (rr == 0xff)
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util::stream_format(stream, "DEC A"); // rr
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else if (rr == 0x80)
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util::stream_format(stream, "DEC X"); // rr
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else if (rr == 0x81)
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util::stream_format(stream, "DEC Y"); // rr
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else if (rr == 0x82)
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util::stream_format(stream, "DEC V"); // rr
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else if (rr == 0x83)
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util::stream_format(stream, "DEC W"); // rr
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else
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util::stream_format(stream, "DEC %Xh", rr); // rr
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util::stream_format(stream, "DEC %s", reg_name(rr)); // rr
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break;
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}
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default:
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@ -19,6 +19,9 @@ public:
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virtual uint32_t opcode_alignment() const override;
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virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
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protected:
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std::string reg_name(const uint8_t reg);
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};
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#endif // MAME_CPU_ST62XX_DASM_H
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