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rsp simd: Clamp DMEM fetches to 4kb, nw

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therealmogminer@gmail.com 2015-07-01 21:28:40 +02:00
parent 857be8d170
commit a0dfb8c523
2 changed files with 7 additions and 1 deletions
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2
src/emu/cpu/rsp/rspcp2.h
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@ -251,7 +251,7 @@ protected:
rsp_vec_t vec_load_and_shuffle_operand(const UINT16* src, UINT32 element);
static inline UINT32 sign_extend_6(INT32 i) {
return (i << (32 - 7)) >> (32 - 7);
return ((i << (32 - 7)) >> (32 - 7)) & 0xfff;
}
static inline rsp_vec_t vec_load_unshuffled_operand(const UINT16* src)
{

6
src/emu/cpu/rsp/vldst.h
View File

@ -4,6 +4,8 @@
// LBV, LDV, LLV, LSV, SBV, SDV, SLV, SSV
inline void vec_lbdlsv_sbdlsv(UINT32 iw, UINT32 rs)
{
rs &= 0xfff;
const UINT32 shift_and_idx = (iw >> 11) & 0x3;
rsp_vec_t dqm = _mm_loadl_epi64((rsp_vec_t *) (m_vec_helpers.bdls_lut[shift_and_idx]));
@ -31,6 +33,8 @@ inline void vec_lfhpuv_sfhpuv(UINT32 iw, UINT32 rs)
RSP_MEM_REQUEST_FOURTH
};
rs &= 0xfff;
const UINT32 addr = rs + (sign_extend_6(iw) << 3);
const UINT32 element = (iw >> 21) & 0xf;
UINT16* regp = m_v[(iw >> 16) & 0x1f].s;
@ -49,6 +53,8 @@ inline void vec_lfhpuv_sfhpuv(UINT32 iw, UINT32 rs)
// LQV, LRV, SQV, SRV
inline void vec_lqrv_sqrv(UINT32 iw, UINT32 rs)
{
rs &= 0xfff;
const UINT32 addr = rs + (sign_extend_6(iw) << 4);
const UINT32 element = (iw >> 21) & 0xf;
UINT16* regp = m_v[(iw >> 16) & 0x1f].s;