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rsp simd: Clamp DMEM fetches to 4kb, nw
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857be8d170
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a0dfb8c523
@ -251,7 +251,7 @@ protected:
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rsp_vec_t vec_load_and_shuffle_operand(const UINT16* src, UINT32 element);
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rsp_vec_t vec_load_and_shuffle_operand(const UINT16* src, UINT32 element);
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static inline UINT32 sign_extend_6(INT32 i) {
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static inline UINT32 sign_extend_6(INT32 i) {
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return (i << (32 - 7)) >> (32 - 7);
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return ((i << (32 - 7)) >> (32 - 7)) & 0xfff;
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}
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}
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static inline rsp_vec_t vec_load_unshuffled_operand(const UINT16* src)
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static inline rsp_vec_t vec_load_unshuffled_operand(const UINT16* src)
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{
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{
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@ -4,6 +4,8 @@
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// LBV, LDV, LLV, LSV, SBV, SDV, SLV, SSV
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// LBV, LDV, LLV, LSV, SBV, SDV, SLV, SSV
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inline void vec_lbdlsv_sbdlsv(UINT32 iw, UINT32 rs)
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inline void vec_lbdlsv_sbdlsv(UINT32 iw, UINT32 rs)
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{
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{
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rs &= 0xfff;
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const UINT32 shift_and_idx = (iw >> 11) & 0x3;
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const UINT32 shift_and_idx = (iw >> 11) & 0x3;
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rsp_vec_t dqm = _mm_loadl_epi64((rsp_vec_t *) (m_vec_helpers.bdls_lut[shift_and_idx]));
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rsp_vec_t dqm = _mm_loadl_epi64((rsp_vec_t *) (m_vec_helpers.bdls_lut[shift_and_idx]));
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@ -31,6 +33,8 @@ inline void vec_lfhpuv_sfhpuv(UINT32 iw, UINT32 rs)
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RSP_MEM_REQUEST_FOURTH
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RSP_MEM_REQUEST_FOURTH
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};
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};
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rs &= 0xfff;
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const UINT32 addr = rs + (sign_extend_6(iw) << 3);
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const UINT32 addr = rs + (sign_extend_6(iw) << 3);
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const UINT32 element = (iw >> 21) & 0xf;
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const UINT32 element = (iw >> 21) & 0xf;
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UINT16* regp = m_v[(iw >> 16) & 0x1f].s;
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UINT16* regp = m_v[(iw >> 16) & 0x1f].s;
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@ -49,6 +53,8 @@ inline void vec_lfhpuv_sfhpuv(UINT32 iw, UINT32 rs)
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// LQV, LRV, SQV, SRV
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// LQV, LRV, SQV, SRV
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inline void vec_lqrv_sqrv(UINT32 iw, UINT32 rs)
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inline void vec_lqrv_sqrv(UINT32 iw, UINT32 rs)
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{
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{
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rs &= 0xfff;
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const UINT32 addr = rs + (sign_extend_6(iw) << 4);
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const UINT32 addr = rs + (sign_extend_6(iw) << 4);
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const UINT32 element = (iw >> 21) & 0xf;
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const UINT32 element = (iw >> 21) & 0xf;
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UINT16* regp = m_v[(iw >> 16) & 0x1f].s;
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UINT16* regp = m_v[(iw >> 16) & 0x1f].s;
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