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remove lots of MCFG_ (nw)

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This commit is contained in:
Vas Crabb 2018-07-17 04:46:25 +10:00
parent 18eb2b394f
commit a28b2b5a19
53 changed files with 1156 additions and 1309 deletions
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49
src/devices/bus/a2bus/pc_xporter.cpp
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@ -122,30 +122,30 @@ MACHINE_CONFIG_START(a2bus_pcxporter_device::device_add_mconfig)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("pic8259", pic8259_device, inta_cb)
MCFG_DEVICE_DISABLE()
MCFG_DEVICE_ADD(m_pit8253, PIT8253, 0)
MCFG_PIT8253_CLK0(A2BUS_7M_CLOCK / 6.0) // heartbeat IRQ
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(m_pic8259, pic8259_device, ir0_w))
MCFG_PIT8253_CLK1(A2BUS_7M_CLOCK / 6.0) // dram refresh
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, a2bus_pcxporter_device, pc_pit8253_out1_changed))
MCFG_PIT8253_CLK2(A2BUS_7M_CLOCK / 6.0) // pio port c pin 4, and speaker polling enough
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, a2bus_pcxporter_device, pc_pit8253_out2_changed))
PIT8253(config, m_pit8253, 0);
m_pit8253->set_clk<0>(A2BUS_7M_CLOCK / 6.0); // heartbeat IRQ
m_pit8253->out_handler<0>().set(m_pic8259, FUNC(pic8259_device::ir0_w));
m_pit8253->set_clk<1>(A2BUS_7M_CLOCK / 6.0); // DRAM refresh
m_pit8253->out_handler<1>().set(FUNC(a2bus_pcxporter_device::pc_pit8253_out1_changed));
m_pit8253->set_clk<2>(A2BUS_7M_CLOCK / 6.0); // PIO port C pin 4, and speaker polling enough
m_pit8253->out_handler<2>().set(FUNC(a2bus_pcxporter_device::pc_pit8253_out2_changed));
MCFG_DEVICE_ADD(m_dma8237, PCXPORT_DMAC, A2BUS_7M_CLOCK / 2)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, a2bus_pcxporter_device, pc_dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, a2bus_pcxporter_device, pc_dma8237_out_eop))
MCFG_I8237_IN_MEMR_CB(READ8(*this, a2bus_pcxporter_device, pc_dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, a2bus_pcxporter_device, pc_dma_write_byte))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, a2bus_pcxporter_device, pc_dma8237_1_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, a2bus_pcxporter_device, pc_dma8237_2_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, a2bus_pcxporter_device, pc_dma8237_3_dack_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, a2bus_pcxporter_device, pc_dma8237_0_dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, a2bus_pcxporter_device, pc_dma8237_1_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, a2bus_pcxporter_device, pc_dma8237_2_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, a2bus_pcxporter_device, pc_dma8237_3_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, a2bus_pcxporter_device, pc_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, a2bus_pcxporter_device, pc_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, a2bus_pcxporter_device, pc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, a2bus_pcxporter_device, pc_dack3_w))
PCXPORT_DMAC(config, m_dma8237, A2BUS_7M_CLOCK / 2);
m_dma8237->out_hreq_callback().set(FUNC(a2bus_pcxporter_device::pc_dma_hrq_changed));
m_dma8237->out_eop_callback().set(FUNC(a2bus_pcxporter_device::pc_dma8237_out_eop));
m_dma8237->in_memr_callback().set(FUNC(a2bus_pcxporter_device::pc_dma_read_byte));
m_dma8237->out_memw_callback().set(FUNC(a2bus_pcxporter_device::pc_dma_write_byte));
m_dma8237->in_ior_callback<1>().set(FUNC(a2bus_pcxporter_device::pc_dma8237_1_dack_r));
m_dma8237->in_ior_callback<2>().set(FUNC(a2bus_pcxporter_device::pc_dma8237_2_dack_r));
m_dma8237->in_ior_callback<3>().set(FUNC(a2bus_pcxporter_device::pc_dma8237_3_dack_r));
m_dma8237->out_iow_callback<0>().set(FUNC(a2bus_pcxporter_device::pc_dma8237_0_dack_w));
m_dma8237->out_iow_callback<1>().set(FUNC(a2bus_pcxporter_device::pc_dma8237_1_dack_w));
m_dma8237->out_iow_callback<2>().set(FUNC(a2bus_pcxporter_device::pc_dma8237_2_dack_w));
m_dma8237->out_iow_callback<3>().set(FUNC(a2bus_pcxporter_device::pc_dma8237_3_dack_w));
m_dma8237->out_dack_callback<0>().set(FUNC(a2bus_pcxporter_device::pc_dack0_w));
m_dma8237->out_dack_callback<1>().set(FUNC(a2bus_pcxporter_device::pc_dack1_w));
m_dma8237->out_dack_callback<2>().set(FUNC(a2bus_pcxporter_device::pc_dack2_w));
m_dma8237->out_dack_callback<3>().set(FUNC(a2bus_pcxporter_device::pc_dack3_w));
PIC8259(config, m_pic8259, 0);
m_pic8259->out_int_callback().set_inputline(m_v30, 0);
@ -169,8 +169,7 @@ MACHINE_CONFIG_START(a2bus_pcxporter_device::device_add_mconfig)
/* sound hardware */
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 1.00);
MCFG_DEVICE_ADD("isa1", ISA8_SLOT, 0, m_isabus, pc_isa8_cards, "cga", true) // FIXME: determine ISA bus clock
MCFG_DEVICE_ADD("isa2", ISA8_SLOT, 0, m_isabus, pc_isa8_cards, "fdc_xt", true)

53
src/devices/bus/cpc/magicsound.cpp
View File

@ -21,40 +21,40 @@ DEFINE_DEVICE_TYPE(AL_MAGICSOUND, al_magicsound_device, "al_magicsound", "Aleste
MACHINE_CONFIG_START(al_magicsound_device::device_add_mconfig)
MCFG_DEVICE_ADD( "dmac", AM9517A, XTAL(4'000'000) ) // CLK from expansion port
AM9517A(config, m_dmac, 4_MHz_XTAL); // CLK from expansion port
// According to the schematics, the TC pin (EOP on western chips) is connected to NMI on the expansion port.
// NMIs seem to occur too quickly when this is active, so either EOP is not triggered at the correct time, or
// the K1810WT37 is different to the i8237/AM9517A
//MCFG_I8237_OUT_EOP_CB(WRITELINE("^", cpc_expansion_slot_device, nmi_w)) // MCFG_DEVCB_INVERT
MCFG_I8237_OUT_HREQ_CB(WRITELINE("dmac", am9517a_device, hack_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, al_magicsound_device, dma_read_byte))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, al_magicsound_device, dma_write_byte))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, al_magicsound_device, dma_write_byte))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, al_magicsound_device, dma_write_byte))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, al_magicsound_device, dma_write_byte))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, al_magicsound_device, dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, al_magicsound_device, dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, al_magicsound_device, dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, al_magicsound_device, dack3_w))
//m_dmac->out_eop_callback().set(DEVICE_SELF_OWNER, FUNC(cpc_expansion_slot_device::nmi_w))/*.invert()*/;
m_dmac->out_hreq_callback().set(m_dmac, FUNC(am9517a_device::hack_w));
m_dmac->in_memr_callback().set(FUNC(al_magicsound_device::dma_read_byte));
m_dmac->out_iow_callback<0>().set(FUNC(al_magicsound_device::dma_write_byte));
m_dmac->out_iow_callback<1>().set(FUNC(al_magicsound_device::dma_write_byte));
m_dmac->out_iow_callback<2>().set(FUNC(al_magicsound_device::dma_write_byte));
m_dmac->out_iow_callback<3>().set(FUNC(al_magicsound_device::dma_write_byte));
m_dmac->out_dack_callback<0>().set(FUNC(al_magicsound_device::dack0_w));
m_dmac->out_dack_callback<1>().set(FUNC(al_magicsound_device::dack1_w));
m_dmac->out_dack_callback<2>().set(FUNC(al_magicsound_device::dack2_w));
m_dmac->out_dack_callback<3>().set(FUNC(al_magicsound_device::dack3_w));
// Timing does not seem to be correct.
// According to the schematics, the clock is from the clock pin on the expansion port (4MHz), and
// passes through an inverter to each CLK pin on both timers. This seems to be too fast.
// Timer outputs to SAM0/1/2/3 are sample clocks for each sound channel, D/A0 is the low bit of the channel select.
MCFG_DEVICE_ADD("timer1", PIT8254, 0)
MCFG_PIT8253_CLK0(XTAL(4'000'000))
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(*this, al_magicsound_device, sam0_w))
MCFG_PIT8253_CLK1(XTAL(4'000'000))
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, al_magicsound_device, sam1_w))
MCFG_PIT8253_CLK2(XTAL(4'000'000))
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, al_magicsound_device, sam2_w))
PIT8254(config, m_timer1, 0);
m_timer1->set_clk<0>(4_MHz_XTAL);
m_timer1->out_handler<0>().set(FUNC(al_magicsound_device::sam0_w));
m_timer1->set_clk<1>(4_MHz_XTAL);
m_timer1->out_handler<1>().set(FUNC(al_magicsound_device::sam1_w));
m_timer1->set_clk<2>(4_MHz_XTAL);
m_timer1->out_handler<2>().set(FUNC(al_magicsound_device::sam2_w));
MCFG_DEVICE_ADD("timer2", PIT8254, 0)
MCFG_PIT8253_CLK0(XTAL(4'000'000))
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(*this, al_magicsound_device, sam3_w))
MCFG_PIT8253_CLK1(XTAL(4'000'000))
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, al_magicsound_device, da0_w))
MCFG_PIT8253_CLK2(XTAL(4'000'000))
PIT8254(config, m_timer2, 0);
m_timer2->set_clk<0>(4_MHz_XTAL);
m_timer2->out_handler<0>().set(FUNC(al_magicsound_device::sam3_w));
m_timer2->set_clk<1>(4_MHz_XTAL);
m_timer2->out_handler<1>().set(FUNC(al_magicsound_device::da0_w));
m_timer2->set_clk<2>(4_MHz_XTAL);
SPEAKER(config, "speaker").front_center();
MCFG_DEVICE_ADD("dac", DAC_8BIT_R2R, 0) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "speaker", 0.5) // unknown DAC
@ -74,7 +74,8 @@ al_magicsound_device::al_magicsound_device(const machine_config &mconfig, const
m_dac(*this,"dac"),
m_dmac(*this,"dmac"),
m_timer1(*this,"timer1"),
m_timer2(*this,"timer2"), m_current_channel(0), m_ramptr(nullptr), m_current_output(0)
m_timer2(*this,"timer2"),
m_current_channel(0), m_ramptr(nullptr), m_current_output(0)
{
}

97
src/devices/bus/lpci/southbridge.cpp
View File

@ -26,55 +26,55 @@
//-------------------------------------------------
MACHINE_CONFIG_START(southbridge_device::device_add_mconfig)
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
MCFG_PIT8253_CLK0(4772720/4) // heartbeat IRQ
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(*this, southbridge_device, at_pit8254_out0_changed))
MCFG_PIT8253_CLK1(4772720/4) // dram refresh
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, southbridge_device, at_pit8254_out1_changed))
MCFG_PIT8253_CLK2(4772720/4) // pio port c pin 4, and speaker polling enough
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, southbridge_device, at_pit8254_out2_changed))
PIT8254(config, m_pit8254, 0);
m_pit8254->set_clk<0>(4772720/4); // heartbeat IRQ
m_pit8254->out_handler<0>().set(FUNC(southbridge_device::at_pit8254_out0_changed));
m_pit8254->set_clk<1>(4772720/4); // DRAM refresh
m_pit8254->out_handler<1>().set(FUNC(southbridge_device::at_pit8254_out1_changed));
m_pit8254->set_clk<2>(4772720/4); // PIO port C pin 4, and speaker polling enough
m_pit8254->out_handler<2>().set(FUNC(southbridge_device::at_pit8254_out2_changed));
MCFG_DEVICE_ADD( "dma8237_1", AM9517A, XTAL(14'318'181)/3 )
MCFG_I8237_OUT_HREQ_CB(WRITELINE("dma8237_2", am9517a_device, dreq0_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, southbridge_device, at_dma8237_out_eop))
MCFG_I8237_IN_MEMR_CB(READ8(*this, southbridge_device, pc_dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, southbridge_device, pc_dma_write_byte))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, southbridge_device, pc_dma8237_0_dack_r))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, southbridge_device, pc_dma8237_1_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, southbridge_device, pc_dma8237_2_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, southbridge_device, pc_dma8237_3_dack_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, southbridge_device, pc_dma8237_0_dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, southbridge_device, pc_dma8237_1_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, southbridge_device, pc_dma8237_2_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, southbridge_device, pc_dma8237_3_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, southbridge_device, pc_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, southbridge_device, pc_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, southbridge_device, pc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, southbridge_device, pc_dack3_w))
AM9517A(config, m_dma8237_1, XTAL(14'318'181)/3);
m_dma8237_1->out_hreq_callback().set(m_dma8237_2, FUNC(am9517a_device::dreq0_w));
m_dma8237_1->out_eop_callback().set(FUNC(southbridge_device::at_dma8237_out_eop));
m_dma8237_1->in_memr_callback().set(FUNC(southbridge_device::pc_dma_read_byte));
m_dma8237_1->out_memw_callback().set(FUNC(southbridge_device::pc_dma_write_byte));
m_dma8237_1->in_ior_callback<0>().set(FUNC(southbridge_device::pc_dma8237_0_dack_r));
m_dma8237_1->in_ior_callback<1>().set(FUNC(southbridge_device::pc_dma8237_1_dack_r));
m_dma8237_1->in_ior_callback<2>().set(FUNC(southbridge_device::pc_dma8237_2_dack_r));
m_dma8237_1->in_ior_callback<3>().set(FUNC(southbridge_device::pc_dma8237_3_dack_r));
m_dma8237_1->out_iow_callback<0>().set(FUNC(southbridge_device::pc_dma8237_0_dack_w));
m_dma8237_1->out_iow_callback<1>().set(FUNC(southbridge_device::pc_dma8237_1_dack_w));
m_dma8237_1->out_iow_callback<2>().set(FUNC(southbridge_device::pc_dma8237_2_dack_w));
m_dma8237_1->out_iow_callback<3>().set(FUNC(southbridge_device::pc_dma8237_3_dack_w));
m_dma8237_1->out_dack_callback<0>().set(FUNC(southbridge_device::pc_dack0_w));
m_dma8237_1->out_dack_callback<1>().set(FUNC(southbridge_device::pc_dack1_w));
m_dma8237_1->out_dack_callback<2>().set(FUNC(southbridge_device::pc_dack2_w));
m_dma8237_1->out_dack_callback<3>().set(FUNC(southbridge_device::pc_dack3_w));
MCFG_DEVICE_ADD( "dma8237_2", AM9517A, XTAL(14'318'181)/3 )
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, southbridge_device, pc_dma_hrq_changed))
MCFG_I8237_IN_MEMR_CB(READ8(*this, southbridge_device, pc_dma_read_word))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, southbridge_device, pc_dma_write_word))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, southbridge_device, pc_dma8237_5_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, southbridge_device, pc_dma8237_6_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, southbridge_device, pc_dma8237_7_dack_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, southbridge_device, pc_dma8237_5_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, southbridge_device, pc_dma8237_6_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, southbridge_device, pc_dma8237_7_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, southbridge_device, pc_dack4_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, southbridge_device, pc_dack5_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, southbridge_device, pc_dack6_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, southbridge_device, pc_dack7_w))
AM9517A(config, m_dma8237_2, XTAL(14'318'181)/3);
m_dma8237_2->out_hreq_callback().set(FUNC(southbridge_device::pc_dma_hrq_changed));
m_dma8237_2->in_memr_callback().set(FUNC(southbridge_device::pc_dma_read_word));
m_dma8237_2->out_memw_callback().set(FUNC(southbridge_device::pc_dma_write_word));
m_dma8237_2->in_ior_callback<1>().set(FUNC(southbridge_device::pc_dma8237_5_dack_r));
m_dma8237_2->in_ior_callback<2>().set(FUNC(southbridge_device::pc_dma8237_6_dack_r));
m_dma8237_2->in_ior_callback<3>().set(FUNC(southbridge_device::pc_dma8237_7_dack_r));
m_dma8237_2->out_iow_callback<1>().set(FUNC(southbridge_device::pc_dma8237_5_dack_w));
m_dma8237_2->out_iow_callback<2>().set(FUNC(southbridge_device::pc_dma8237_6_dack_w));
m_dma8237_2->out_iow_callback<3>().set(FUNC(southbridge_device::pc_dma8237_7_dack_w));
m_dma8237_2->out_dack_callback<0>().set(FUNC(southbridge_device::pc_dack4_w));
m_dma8237_2->out_dack_callback<1>().set(FUNC(southbridge_device::pc_dack5_w));
m_dma8237_2->out_dack_callback<2>().set(FUNC(southbridge_device::pc_dack6_w));
m_dma8237_2->out_dack_callback<3>().set(FUNC(southbridge_device::pc_dack7_w));
MCFG_DEVICE_ADD("pic8259_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(":maincpu", 0))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, southbridge_device, get_slave_ack))
PIC8259(config, m_pic8259_master, 0);
m_pic8259_master->out_int_callback().set_inputline(m_maincpu, 0);
m_pic8259_master->in_sp_callback().set_constant(1);
m_pic8259_master->read_slave_ack_callback().set(FUNC(southbridge_device::get_slave_ack));
MCFG_DEVICE_ADD("pic8259_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("pic8259_master", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_pic8259_slave, 0);
m_pic8259_slave->out_int_callback().set(m_pic8259_master, FUNC(pic8259_device::ir2_w));
m_pic8259_slave->in_sp_callback().set_constant(0);
MCFG_BUS_MASTER_IDE_CONTROLLER_ADD("ide", ata_devices, "hdd", nullptr, false)
MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE("pic8259_slave", pic8259_device, ir6_w))
@ -86,8 +86,7 @@ MACHINE_CONFIG_START(southbridge_device::device_add_mconfig)
// sound hardware
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.50);
MCFG_DEVICE_ADD("isabus", ISA16, 0)
MCFG_ISA16_CPU(":maincpu")
@ -111,8 +110,8 @@ MACHINE_CONFIG_START(southbridge_device::device_add_mconfig)
MCFG_ISA_OUT_DRQ7_CB(WRITELINE("dma8237_2", am9517a_device, dreq3_w))
MACHINE_CONFIG_END
southbridge_device::southbridge_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock),
southbridge_device::southbridge_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, type, tag, owner, clock),
m_maincpu(*this, ":maincpu"),
m_pic8259_master(*this, "pic8259_master"),
m_pic8259_slave(*this, "pic8259_slave"),

60
src/devices/cpu/nec/v53.cpp
View File

@ -488,36 +488,36 @@ WRITE_LINE_MEMBER(v53_base_device::internal_irq_w)
MACHINE_CONFIG_START(v53_base_device::device_add_mconfig)
MCFG_DEVICE_ADD("pit", PIT8254, 0) // functionality identical to uPD71054
MCFG_PIT8253_CLK0(16000000) // manual implicitly claims that these runs at same speed as the CPU
MCFG_PIT8253_CLK1(16000000)
MCFG_PIT8253_CLK2(16000000)
MCFG_PIT8253_OUT0_HANDLER(WRITELINE( *this, v53_base_device, tcu_out0_trampoline_cb ))
MCFG_PIT8253_OUT1_HANDLER(WRITELINE( *this, v53_base_device, tcu_out1_trampoline_cb ))
MCFG_PIT8253_OUT2_HANDLER(WRITELINE( *this, v53_base_device, tcu_out2_trampoline_cb ))
PIT8254(config, m_v53tcu, 0); // functionality identical to uPD71054
m_v53tcu->set_clk<0>(16000000); // manual implicitly claims that these runs at same speed as the CPU
m_v53tcu->set_clk<1>(16000000);
m_v53tcu->set_clk<2>(16000000);
m_v53tcu->out_handler<0>().set([this] (int state) { m_out0_handler(state); });
m_v53tcu->out_handler<1>().set([this] (int state) { m_out1_handler(state); });
m_v53tcu->out_handler<2>().set([this] (int state) { m_out2_handler(state); });
MCFG_DEVICE_ADD("upd71071dma", V53_DMAU, 4000000)
MCFG_AM9517A_OUT_HREQ_CB(WRITELINE(*this, v53_base_device, hreq_trampoline_cb))
MCFG_AM9517A_OUT_EOP_CB(WRITELINE(*this, v53_base_device, eop_trampoline_cb))
MCFG_AM9517A_IN_MEMR_CB(READ8(*this, v53_base_device, dma_memr_trampoline_r))
MCFG_AM9517A_OUT_MEMW_CB(WRITE8(*this, v53_base_device, dma_memw_trampoline_w))
MCFG_AM9517A_IN_IOR_0_CB(READ8(*this, v53_base_device, dma_io_0_trampoline_r))
MCFG_AM9517A_IN_IOR_1_CB(READ8(*this, v53_base_device, dma_io_1_trampoline_r))
MCFG_AM9517A_IN_IOR_2_CB(READ8(*this, v53_base_device, dma_io_2_trampoline_r))
MCFG_AM9517A_IN_IOR_3_CB(READ8(*this, v53_base_device, dma_io_3_trampoline_r))
MCFG_AM9517A_OUT_IOW_0_CB(WRITE8(*this, v53_base_device, dma_io_0_trampoline_w))
MCFG_AM9517A_OUT_IOW_1_CB(WRITE8(*this, v53_base_device, dma_io_1_trampoline_w))
MCFG_AM9517A_OUT_IOW_2_CB(WRITE8(*this, v53_base_device, dma_io_2_trampoline_w))
MCFG_AM9517A_OUT_IOW_3_CB(WRITE8(*this, v53_base_device, dma_io_3_trampoline_w))
MCFG_AM9517A_OUT_DACK_0_CB(WRITELINE(*this, v53_base_device, dma_dack0_trampoline_w))
MCFG_AM9517A_OUT_DACK_1_CB(WRITELINE(*this, v53_base_device, dma_dack1_trampoline_w))
MCFG_AM9517A_OUT_DACK_2_CB(WRITELINE(*this, v53_base_device, dma_dack2_trampoline_w))
MCFG_AM9517A_OUT_DACK_3_CB(WRITELINE(*this, v53_base_device, dma_dack3_trampoline_w))
V53_DMAU(config, m_v53dmau, 4000000);
m_v53dmau->out_hreq_callback().set([this] (int state) { m_out_hreq_cb(state); });
m_v53dmau->out_eop_callback().set([this] (int state) { m_out_eop_cb(state); });
m_v53dmau->in_memr_callback().set([this] (address_space &space, offs_t offset) { return m_in_memr_cb(space, offset); });
m_v53dmau->out_memw_callback().set([this] (address_space &space, offs_t offset, uint8_t data) { m_out_memw_cb(space, offset, data); });
m_v53dmau->in_ior_callback<0>().set([this] (address_space &space, offs_t offset) { return m_in_ior_0_cb(space, offset); });
m_v53dmau->in_ior_callback<1>().set([this] (address_space &space, offs_t offset) { return m_in_ior_1_cb(space, offset); });
m_v53dmau->in_ior_callback<2>().set([this] (address_space &space, offs_t offset) { return m_in_ior_2_cb(space, offset); });
m_v53dmau->in_ior_callback<3>().set([this] (address_space &space, offs_t offset) { return m_in_ior_3_cb(space, offset); });
m_v53dmau->out_iow_callback<0>().set([this] (address_space &space, offs_t offset, uint8_t data) { m_out_iow_0_cb(space, offset, data); });
m_v53dmau->out_iow_callback<1>().set([this] (address_space &space, offs_t offset, uint8_t data) { m_out_iow_1_cb(space, offset, data); });
m_v53dmau->out_iow_callback<2>().set([this] (address_space &space, offs_t offset, uint8_t data) { m_out_iow_2_cb(space, offset, data); });
m_v53dmau->out_iow_callback<3>().set([this] (address_space &space, offs_t offset, uint8_t data) { m_out_iow_3_cb(space, offset, data); });
m_v53dmau->out_dack_callback<0>().set([this] (int state) { m_out_dack_0_cb(state); });
m_v53dmau->out_dack_callback<1>().set([this] (int state) { m_out_dack_1_cb(state); });
m_v53dmau->out_dack_callback<2>().set([this] (int state) { m_out_dack_2_cb(state); });
m_v53dmau->out_dack_callback<3>().set([this] (int state) { m_out_dack_3_cb(state); });
pic8259_device &upd71059pic(PIC8259(config, "upd71059pic", 0));
upd71059pic.out_int_callback().set(FUNC(v53_base_device::internal_irq_w));
upd71059pic.in_sp_callback().set_constant(1);
upd71059pic.read_slave_ack_callback().set(FUNC(v53_base_device::get_pic_ack));
PIC8259(config, m_v53icu, 0);
m_v53icu->out_int_callback().set(FUNC(v53_base_device::internal_irq_w));
m_v53icu->in_sp_callback().set_constant(1);
m_v53icu->read_slave_ack_callback().set(FUNC(v53_base_device::get_pic_ack));
MCFG_DEVICE_ADD("v53scu", V53_SCU, 0)
MCFG_I8251_TXD_HANDLER(WRITELINE(*this, v53_base_device, scu_txd_trampoline_cb))
@ -531,8 +531,8 @@ MACHINE_CONFIG_START(v53_base_device::device_add_mconfig)
MACHINE_CONFIG_END
v53_base_device::v53_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type)
: nec_common_device(mconfig, type, tag, owner, clock, true, prefetch_size, prefetch_cycles, chip_type),
v53_base_device::v53_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type) :
nec_common_device(mconfig, type, tag, owner, clock, true, prefetch_size, prefetch_cycles, chip_type),
m_io_space_config( "io", ENDIANNESS_LITTLE, 16, 16, 0, address_map_constructor(FUNC(v53_base_device::v53_internal_port_map), this) ),
m_v53tcu(*this, "pit"),
m_v53dmau(*this, "upd71071dma"),

19
src/devices/cpu/nec/v53.h
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@ -164,9 +164,6 @@ public:
template <class Object> devcb_base &set_out0_handler(Object &&cb) { return m_out0_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out1_handler(Object &&cb) { return m_out1_handler.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out2_handler(Object &&cb) { return m_out2_handler.set_callback(std::forward<Object>(cb)); }
DECLARE_WRITE_LINE_MEMBER(tcu_out0_trampoline_cb){ m_out0_handler(state); }
DECLARE_WRITE_LINE_MEMBER(tcu_out1_trampoline_cb){ m_out1_handler(state); }
DECLARE_WRITE_LINE_MEMBER(tcu_out2_trampoline_cb){ m_out2_handler(state); }
// DMAU
template<class Object> devcb_base &set_out_hreq_callback(Object &&cb) { return m_out_hreq_cb.set_callback(std::forward<Object>(cb)); }
@ -260,22 +257,6 @@ protected:
devcb_write_line m_out_dack_2_cb;
devcb_write_line m_out_dack_3_cb;
DECLARE_WRITE_LINE_MEMBER(hreq_trampoline_cb) { m_out_hreq_cb(state); }
DECLARE_WRITE_LINE_MEMBER(eop_trampoline_cb) { m_out_eop_cb(state); }
DECLARE_READ8_MEMBER(dma_memr_trampoline_r) { return m_in_memr_cb(space, offset); }
DECLARE_WRITE8_MEMBER(dma_memw_trampoline_w) { m_out_memw_cb(space, offset, data); }
DECLARE_READ8_MEMBER(dma_io_0_trampoline_r) { return m_in_ior_0_cb(space, offset); }
DECLARE_READ8_MEMBER(dma_io_1_trampoline_r) { return m_in_ior_1_cb(space, offset); }
DECLARE_READ8_MEMBER(dma_io_2_trampoline_r) { return m_in_ior_2_cb(space, offset); }
DECLARE_READ8_MEMBER(dma_io_3_trampoline_r) { return m_in_ior_3_cb(space, offset); }
DECLARE_WRITE8_MEMBER(dma_io_0_trampoline_w) { m_out_iow_0_cb(space, offset, data); }
DECLARE_WRITE8_MEMBER(dma_io_1_trampoline_w) { m_out_iow_1_cb(space, offset, data); }
DECLARE_WRITE8_MEMBER(dma_io_2_trampoline_w) { m_out_iow_2_cb(space, offset, data); }
DECLARE_WRITE8_MEMBER(dma_io_3_trampoline_w) { m_out_iow_3_cb(space, offset, data); }
DECLARE_WRITE_LINE_MEMBER(dma_dack0_trampoline_w) { m_out_dack_0_cb(state); }
DECLARE_WRITE_LINE_MEMBER(dma_dack1_trampoline_w) { m_out_dack_1_cb(state); }
DECLARE_WRITE_LINE_MEMBER(dma_dack2_trampoline_w) { m_out_dack_2_cb(state); }
DECLARE_WRITE_LINE_MEMBER(dma_dack3_trampoline_w) { m_out_dack_3_cb(state); }
DECLARE_READ8_MEMBER(get_pic_ack);
DECLARE_WRITE_LINE_MEMBER(internal_irq_w);
};

5
src/devices/machine/8042kbdc.h
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@ -63,6 +63,11 @@ public:
template <class Object> devcb_base &set_input_buffer_full_callback(Object &&cb) { return m_input_buffer_full_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_output_buffer_empty_callback(Object &&cb) { return m_output_buffer_empty_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_speaker_callback(Object &&cb) { return m_speaker_cb.set_callback(std::forward<Object>(cb)); }
auto system_reset_callback() { return m_system_reset_cb.bind(); }
auto gate_a20_callback() { return m_gate_a20_cb.bind(); }
auto input_buffer_full_callback() { return m_input_buffer_full_cb.bind(); }
auto output_buffer_empty_callback() { return m_output_buffer_empty_cb.bind(); }
auto speaker_callback() { return m_speaker_cb.bind(); }
DECLARE_READ8_MEMBER( data_r );
DECLARE_WRITE8_MEMBER( data_w );

77
src/devices/machine/am9517a.h
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@ -51,19 +51,12 @@ public:
// construction/destruction
am9517a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_out_hreq_callback(Object &&cb) { return m_out_hreq_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_eop_callback(Object &&cb) { return m_out_eop_cb.set_callback(std::forward<Object>(cb)); }
auto out_hreq_callback() { return m_out_hreq_cb.bind(); }
auto out_eop_callback() { return m_out_eop_cb.bind(); }
template <class Object> devcb_base &set_in_memr_callback(Object &&cb) { return m_in_memr_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_out_memw_callback(Object &&cb) { return m_out_memw_cb.set_callback(std::forward<Object>(cb)); }
auto in_memr_callback() { return m_in_memr_cb.bind(); }
auto out_memw_callback() { return m_out_memw_cb.bind(); }
template <unsigned C, class Object> devcb_base &set_in_ior_callback(Object &&cb) { return m_in_ior_cb[C].set_callback(std::forward<Object>(cb)); }
template <unsigned C, class Object> devcb_base &set_out_iow_callback(Object &&cb) { return m_out_iow_cb[C].set_callback(std::forward<Object>(cb)); }
template <unsigned C, class Object> devcb_base &set_out_dack_callback(Object &&cb) { return m_out_dack_cb[C].set_callback(std::forward<Object>(cb)); }
template <unsigned C> auto in_ior_callback() { return m_in_ior_cb[C].bind(); }
template <unsigned C> auto out_iow_callback() { return m_out_iow_cb[C].bind(); }
template <unsigned C> auto out_dack_callback() { return m_out_dack_cb[C].bind(); }
@ -180,74 +173,4 @@ DECLARE_DEVICE_TYPE(AM9517A, am9517a_device)
DECLARE_DEVICE_TYPE(V53_DMAU, upd71071_v53_device)
DECLARE_DEVICE_TYPE(PCXPORT_DMAC, pcxport_dmac_device)
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
#define MCFG_AM9517A_OUT_HREQ_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_hreq_callback(DEVCB_##_devcb);
#define MCFG_AM9517A_OUT_EOP_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_eop_callback(DEVCB_##_devcb);
#define MCFG_AM9517A_IN_MEMR_CB(_devcb) \
downcast<am9517a_device &>(*device).set_in_memr_callback(DEVCB_##_devcb);
#define MCFG_AM9517A_OUT_MEMW_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_memw_callback(DEVCB_##_devcb);
#define MCFG_AM9517A_IN_IOR_0_CB(_devcb) \
downcast<am9517a_device &>(*device).set_in_ior_callback<0>(DEVCB_##_devcb);
#define MCFG_AM9517A_IN_IOR_1_CB(_devcb) \
downcast<am9517a_device &>(*device).set_in_ior_callback<1>(DEVCB_##_devcb);
#define MCFG_AM9517A_IN_IOR_2_CB(_devcb) \
downcast<am9517a_device &>(*device).set_in_ior_callback<2>(DEVCB_##_devcb);
#define MCFG_AM9517A_IN_IOR_3_CB(_devcb) \
downcast<am9517a_device &>(*device).set_in_ior_callback<3>(DEVCB_##_devcb);
#define MCFG_AM9517A_OUT_IOW_0_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_iow_callback<0>(DEVCB_##_devcb);
#define MCFG_AM9517A_OUT_IOW_1_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_iow_callback<1>(DEVCB_##_devcb);
#define MCFG_AM9517A_OUT_IOW_2_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_iow_callback<2>(DEVCB_##_devcb);
#define MCFG_AM9517A_OUT_IOW_3_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_iow_callback<3>(DEVCB_##_devcb);
#define MCFG_AM9517A_OUT_DACK_0_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_dack_callback<0>(DEVCB_##_devcb);
#define MCFG_AM9517A_OUT_DACK_1_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_dack_callback<1>(DEVCB_##_devcb);
#define MCFG_AM9517A_OUT_DACK_2_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_dack_callback<2>(DEVCB_##_devcb);
#define MCFG_AM9517A_OUT_DACK_3_CB(_devcb) \
downcast<am9517a_device &>(*device).set_out_dack_callback<3>(DEVCB_##_devcb);
#define MCFG_I8237_OUT_HREQ_CB MCFG_AM9517A_OUT_HREQ_CB
#define MCFG_I8237_OUT_EOP_CB MCFG_AM9517A_OUT_EOP_CB
#define MCFG_I8237_IN_MEMR_CB MCFG_AM9517A_IN_MEMR_CB
#define MCFG_I8237_OUT_MEMW_CB MCFG_AM9517A_OUT_MEMW_CB
#define MCFG_I8237_IN_IOR_0_CB MCFG_AM9517A_IN_IOR_0_CB
#define MCFG_I8237_IN_IOR_1_CB MCFG_AM9517A_IN_IOR_1_CB
#define MCFG_I8237_IN_IOR_2_CB MCFG_AM9517A_IN_IOR_2_CB
#define MCFG_I8237_IN_IOR_3_CB MCFG_AM9517A_IN_IOR_3_CB
#define MCFG_I8237_OUT_IOW_0_CB MCFG_AM9517A_OUT_IOW_0_CB
#define MCFG_I8237_OUT_IOW_1_CB MCFG_AM9517A_OUT_IOW_1_CB
#define MCFG_I8237_OUT_IOW_2_CB MCFG_AM9517A_OUT_IOW_2_CB
#define MCFG_I8237_OUT_IOW_3_CB MCFG_AM9517A_OUT_IOW_3_CB
#define MCFG_I8237_OUT_DACK_0_CB MCFG_AM9517A_OUT_DACK_0_CB
#define MCFG_I8237_OUT_DACK_1_CB MCFG_AM9517A_OUT_DACK_1_CB
#define MCFG_I8237_OUT_DACK_2_CB MCFG_AM9517A_OUT_DACK_2_CB
#define MCFG_I8237_OUT_DACK_3_CB MCFG_AM9517A_OUT_DACK_3_CB
#endif // MAME_MACHINE_AM9517_H

102
src/devices/machine/cs4031.cpp
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@ -96,60 +96,62 @@ const float cs4031_device::m_dma_clock_divider[] =
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(cs4031_device::device_add_mconfig)
MCFG_DEVICE_ADD("dma1", AM9517A, 0)
MCFG_I8237_OUT_HREQ_CB(WRITELINE("dma2", am9517a_device, dreq0_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, cs4031_device, dma1_eop_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, cs4031_device, dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, cs4031_device, dma_write_byte))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, cs4031_device, dma1_ior0_r))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, cs4031_device, dma1_ior1_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, cs4031_device, dma1_ior2_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, cs4031_device, dma1_ior3_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, cs4031_device, dma1_iow0_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, cs4031_device, dma1_iow1_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, cs4031_device, dma1_iow2_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, cs4031_device, dma1_iow3_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, cs4031_device, dma1_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, cs4031_device, dma1_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, cs4031_device, dma1_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, cs4031_device, dma1_dack3_w))
MCFG_DEVICE_ADD("dma2", AM9517A, 0)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, cs4031_device, dma2_hreq_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, cs4031_device, dma_read_word))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, cs4031_device, dma_write_word))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, cs4031_device, dma2_ior1_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, cs4031_device, dma2_ior2_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, cs4031_device, dma2_ior3_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, cs4031_device, dma2_iow1_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, cs4031_device, dma2_iow2_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, cs4031_device, dma2_iow3_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, cs4031_device, dma2_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, cs4031_device, dma2_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, cs4031_device, dma2_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, cs4031_device, dma2_dack3_w))
void cs4031_device::device_add_mconfig(machine_config &config)
{
AM9517A(config, m_dma1, 0);
m_dma1->out_hreq_callback().set(m_dma2, FUNC(am9517a_device::dreq0_w));
m_dma1->out_eop_callback().set(FUNC(cs4031_device::dma1_eop_w));
m_dma1->in_memr_callback().set(FUNC(cs4031_device::dma_read_byte));
m_dma1->out_memw_callback().set(FUNC(cs4031_device::dma_write_byte));
m_dma1->in_ior_callback<0>().set(FUNC(cs4031_device::dma1_ior0_r));
m_dma1->in_ior_callback<1>().set(FUNC(cs4031_device::dma1_ior1_r));
m_dma1->in_ior_callback<2>().set(FUNC(cs4031_device::dma1_ior2_r));
m_dma1->in_ior_callback<3>().set(FUNC(cs4031_device::dma1_ior3_r));
m_dma1->out_iow_callback<0>().set(FUNC(cs4031_device::dma1_iow0_w));
m_dma1->out_iow_callback<1>().set(FUNC(cs4031_device::dma1_iow1_w));
m_dma1->out_iow_callback<2>().set(FUNC(cs4031_device::dma1_iow2_w));
m_dma1->out_iow_callback<3>().set(FUNC(cs4031_device::dma1_iow3_w));
m_dma1->out_dack_callback<0>().set(FUNC(cs4031_device::dma1_dack0_w));
m_dma1->out_dack_callback<1>().set(FUNC(cs4031_device::dma1_dack1_w));
m_dma1->out_dack_callback<2>().set(FUNC(cs4031_device::dma1_dack2_w));
m_dma1->out_dack_callback<3>().set(FUNC(cs4031_device::dma1_dack3_w));
MCFG_DEVICE_ADD("intc1", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(*this, cs4031_device, intc1_int_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, cs4031_device, intc1_slave_ack_r))
AM9517A(config, m_dma2, 0);
m_dma2->out_hreq_callback().set(FUNC(cs4031_device::dma2_hreq_w));
m_dma2->in_memr_callback().set(FUNC(cs4031_device::dma_read_word));
m_dma2->out_memw_callback().set(FUNC(cs4031_device::dma_write_word));
m_dma2->in_ior_callback<1>().set(FUNC(cs4031_device::dma2_ior1_r));
m_dma2->in_ior_callback<2>().set(FUNC(cs4031_device::dma2_ior2_r));
m_dma2->in_ior_callback<3>().set(FUNC(cs4031_device::dma2_ior3_r));
m_dma2->out_iow_callback<1>().set(FUNC(cs4031_device::dma2_iow1_w));
m_dma2->out_iow_callback<2>().set(FUNC(cs4031_device::dma2_iow2_w));
m_dma2->out_iow_callback<3>().set(FUNC(cs4031_device::dma2_iow3_w));
m_dma2->out_dack_callback<0>().set(FUNC(cs4031_device::dma2_dack0_w));
m_dma2->out_dack_callback<1>().set(FUNC(cs4031_device::dma2_dack1_w));
m_dma2->out_dack_callback<2>().set(FUNC(cs4031_device::dma2_dack2_w));
m_dma2->out_dack_callback<3>().set(FUNC(cs4031_device::dma2_dack3_w));
MCFG_DEVICE_ADD("intc2", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("intc1", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_intc1, 0);
m_intc1->out_int_callback().set(FUNC(cs4031_device::intc1_int_w));
m_intc1->in_sp_callback().set_constant(1);
m_intc1->read_slave_ack_callback().set(FUNC(cs4031_device::intc1_slave_ack_r));
MCFG_DEVICE_ADD("ctc", PIT8254, 0)
MCFG_PIT8253_CLK0(XTAL(14'318'181) / 12.0)
MCFG_PIT8253_OUT0_HANDLER(WRITELINE("intc1", pic8259_device, ir0_w))
MCFG_PIT8253_CLK1(XTAL(14'318'181) / 12.0)
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, cs4031_device, ctc_out1_w))
MCFG_PIT8253_CLK2(XTAL(14'318'181) / 12.0)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, cs4031_device, ctc_out2_w))
PIC8259(config, m_intc2, 0);
m_intc2->out_int_callback().set(m_intc1, FUNC(pic8259_device::ir2_w));
m_intc2->in_sp_callback().set_constant(0);
MCFG_DS12885_ADD("rtc")
MCFG_MC146818_IRQ_HANDLER(WRITELINE("intc2", pic8259_device, ir0_w))
MCFG_MC146818_CENTURY_INDEX(0x32)
MACHINE_CONFIG_END
PIT8254(config, m_ctc, 0);
m_ctc->set_clk<0>(XTAL(14'318'181) / 12.0);
m_ctc->out_handler<0>().set(m_intc1, FUNC(pic8259_device::ir0_w));
m_ctc->set_clk<1>(XTAL(14'318'181) / 12.0);
m_ctc->out_handler<1>().set(FUNC(cs4031_device::ctc_out1_w));
m_ctc->set_clk<2>(XTAL(14'318'181) / 12.0);
m_ctc->out_handler<2>().set(FUNC(cs4031_device::ctc_out2_w));
DS12885(config, m_rtc);
m_rtc->irq_callback().set(m_intc2, FUNC(pic8259_device::ir0_w));
m_rtc->set_century_index(0x32);
}
//**************************************************************************

2
src/devices/machine/ds128x.h
View File

@ -14,7 +14,7 @@ class ds12885_device : public mc146818_device
{
public:
// construction/destruction
ds12885_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
ds12885_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768);
protected:
virtual int data_size() override { return 128; }

61
src/devices/machine/genpc.cpp
View File

@ -406,38 +406,38 @@ DEFINE_DEVICE_TYPE(IBM5160_MOTHERBOARD, ibm5160_mb_device, "ibm5160_mb", "IBM 51
//-------------------------------------------------
MACHINE_CONFIG_START(ibm5160_mb_device::device_add_mconfig)
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
MCFG_PIT8253_CLK0(XTAL(14'318'181)/12.0) /* heartbeat IRQ */
MCFG_PIT8253_OUT0_HANDLER(WRITELINE("pic8259", pic8259_device, ir0_w))
MCFG_PIT8253_CLK1(XTAL(14'318'181)/12.0) /* dram refresh */
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, ibm5160_mb_device, pc_pit8253_out1_changed))
MCFG_PIT8253_CLK2(XTAL(14'318'181)/12.0) /* pio port c pin 4, and speaker polling enough */
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, ibm5160_mb_device, pc_pit8253_out2_changed))
PIT8253(config, m_pit8253, 0);
m_pit8253->set_clk<0>(XTAL(14'318'181)/12.0); // heartbeat IRQ
m_pit8253->out_handler<0>().set(m_pic8259, FUNC(pic8259_device::ir0_w));
m_pit8253->set_clk<1>(XTAL(14'318'181)/12.0); // DRAM refresh
m_pit8253->out_handler<1>().set(FUNC(ibm5160_mb_device::pc_pit8253_out1_changed));
m_pit8253->set_clk<2>(XTAL(14'318'181)/12.0); // PIO port C pin 4, and speaker polling enough
m_pit8253->out_handler<2>().set(FUNC(ibm5160_mb_device::pc_pit8253_out2_changed));
MCFG_DEVICE_ADD( "dma8237", AM9517A, XTAL(14'318'181)/3.0 )
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, ibm5160_mb_device, pc_dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, ibm5160_mb_device, pc_dma8237_out_eop))
MCFG_I8237_IN_MEMR_CB(READ8(*this, ibm5160_mb_device, pc_dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, ibm5160_mb_device, pc_dma_write_byte))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, ibm5160_mb_device, pc_dma8237_1_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, ibm5160_mb_device, pc_dma8237_2_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, ibm5160_mb_device, pc_dma8237_3_dack_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, ibm5160_mb_device, pc_dma8237_0_dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, ibm5160_mb_device, pc_dma8237_1_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, ibm5160_mb_device, pc_dma8237_2_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, ibm5160_mb_device, pc_dma8237_3_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, ibm5160_mb_device, pc_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, ibm5160_mb_device, pc_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, ibm5160_mb_device, pc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, ibm5160_mb_device, pc_dack3_w))
AM9517A(config, m_dma8237, XTAL(14'318'181)/3.0);
m_dma8237->out_hreq_callback().set(FUNC(ibm5160_mb_device::pc_dma_hrq_changed));
m_dma8237->out_eop_callback().set(FUNC(ibm5160_mb_device::pc_dma8237_out_eop));
m_dma8237->in_memr_callback().set(FUNC(ibm5160_mb_device::pc_dma_read_byte));
m_dma8237->out_memw_callback().set(FUNC(ibm5160_mb_device::pc_dma_write_byte));
m_dma8237->in_ior_callback<1>().set(FUNC(ibm5160_mb_device::pc_dma8237_1_dack_r));
m_dma8237->in_ior_callback<2>().set(FUNC(ibm5160_mb_device::pc_dma8237_2_dack_r));
m_dma8237->in_ior_callback<3>().set(FUNC(ibm5160_mb_device::pc_dma8237_3_dack_r));
m_dma8237->out_iow_callback<0>().set(FUNC(ibm5160_mb_device::pc_dma8237_0_dack_w));
m_dma8237->out_iow_callback<1>().set(FUNC(ibm5160_mb_device::pc_dma8237_1_dack_w));
m_dma8237->out_iow_callback<2>().set(FUNC(ibm5160_mb_device::pc_dma8237_2_dack_w));
m_dma8237->out_iow_callback<3>().set(FUNC(ibm5160_mb_device::pc_dma8237_3_dack_w));
m_dma8237->out_dack_callback<0>().set(FUNC(ibm5160_mb_device::pc_dack0_w));
m_dma8237->out_dack_callback<1>().set(FUNC(ibm5160_mb_device::pc_dack1_w));
m_dma8237->out_dack_callback<2>().set(FUNC(ibm5160_mb_device::pc_dack2_w));
m_dma8237->out_dack_callback<3>().set(FUNC(ibm5160_mb_device::pc_dack3_w));
MCFG_DEVICE_ADD("pic8259", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(*this, ibm5160_mb_device, pic_int_w))
PIC8259(config, m_pic8259, 0);
m_pic8259->out_int_callback().set(FUNC(ibm5160_mb_device::pic_int_w));
MCFG_DEVICE_ADD("ppi8255", I8255A, 0)
MCFG_I8255_IN_PORTA_CB(READ8(*this, ibm5160_mb_device, pc_ppi_porta_r))
MCFG_I8255_OUT_PORTB_CB(WRITE8(*this, ibm5160_mb_device, pc_ppi_portb_w))
MCFG_I8255_IN_PORTC_CB(READ8(*this, ibm5160_mb_device, pc_ppi_portc_r))
I8255A(config, m_ppi8255, 0);
m_ppi8255->in_pa_callback().set(FUNC(ibm5160_mb_device::pc_ppi_porta_r));
m_ppi8255->out_pb_callback().set(FUNC(ibm5160_mb_device::pc_ppi_portb_w));
m_ppi8255->in_pc_callback().set(FUNC(ibm5160_mb_device::pc_ppi_portc_r));
MCFG_DEVICE_ADD("isa", ISA8, 0)
MCFG_ISA8_CPU(":maincpu")
@ -457,8 +457,7 @@ MACHINE_CONFIG_START(ibm5160_mb_device::device_add_mconfig)
/* sound hardware */
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 1.00);
MACHINE_CONFIG_END

4
src/devices/machine/i8212.h
View File

@ -69,6 +69,10 @@ public:
template <class Object> devcb_base &set_di_rd_callback(Object &&cb) { return m_read_di.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_do_wr_callback(Object &&cb) { return m_write_do.set_callback(std::forward<Object>(cb)); }
template <class Object> devcb_base &set_md_rd_callback(Object &&cb) { return m_read_md.set_callback(std::forward<Object>(cb)); }
auto int_wr_callback() { return m_write_int.bind(); }
auto di_rd_callback() { return m_read_di.bind(); }
auto do_wr_callback() { return m_write_do.bind(); }
auto md_rd_callback() { return m_read_md.bind(); }
// data read handlers
DECLARE_READ8_MEMBER(read);

93
src/devices/machine/i82371sb.cpp
View File

@ -47,60 +47,59 @@ void i82371sb_isa_device::internal_io_map(address_map &map)
//-------------------------------------------------
MACHINE_CONFIG_START(i82371sb_isa_device::device_add_mconfig)
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
MCFG_PIT8253_CLK0(4772720/4) /* heartbeat IRQ */
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(*this, i82371sb_isa_device, at_pit8254_out0_changed))
MCFG_PIT8253_CLK1(4772720/4) /* dram refresh */
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, i82371sb_isa_device, at_pit8254_out1_changed))
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, i82371sb_isa_device, at_pit8254_out2_changed))
PIT8254(config, m_pit8254, 0);
m_pit8254->set_clk<0>(4772720/4); // heartbeat IRQ
m_pit8254->out_handler<0>().set(FUNC(i82371sb_isa_device::at_pit8254_out0_changed));
m_pit8254->set_clk<1>(4772720/4); // DRAM refresh
m_pit8254->out_handler<1>().set(FUNC(i82371sb_isa_device::at_pit8254_out1_changed));
m_pit8254->set_clk<2>(4772720/4); // PIO port C pin 4, and speaker polling enough
m_pit8254->out_handler<2>().set(FUNC(i82371sb_isa_device::at_pit8254_out2_changed));
MCFG_DEVICE_ADD( "dma8237_1", AM9517A, XTAL(14'318'181)/3 )
MCFG_I8237_OUT_HREQ_CB(WRITELINE("dma8237_2", am9517a_device, dreq0_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, i82371sb_isa_device, at_dma8237_out_eop))
MCFG_I8237_IN_MEMR_CB(READ8(*this, i82371sb_isa_device, pc_dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, i82371sb_isa_device, pc_dma_write_byte))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, i82371sb_isa_device, pc_dma8237_0_dack_r))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, i82371sb_isa_device, pc_dma8237_1_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, i82371sb_isa_device, pc_dma8237_2_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, i82371sb_isa_device, pc_dma8237_3_dack_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, i82371sb_isa_device, pc_dma8237_0_dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, i82371sb_isa_device, pc_dma8237_1_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, i82371sb_isa_device, pc_dma8237_2_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, i82371sb_isa_device, pc_dma8237_3_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, i82371sb_isa_device, pc_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, i82371sb_isa_device, pc_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, i82371sb_isa_device, pc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, i82371sb_isa_device, pc_dack3_w))
AM9517A(config, m_dma8237_1, XTAL(14'318'181)/3);
m_dma8237_1->out_hreq_callback().set(m_dma8237_2, FUNC(am9517a_device::dreq0_w));
m_dma8237_1->out_eop_callback().set(FUNC(i82371sb_isa_device::at_dma8237_out_eop));
m_dma8237_1->in_memr_callback().set(FUNC(i82371sb_isa_device::pc_dma_read_byte));
m_dma8237_1->out_memw_callback().set(FUNC(i82371sb_isa_device::pc_dma_write_byte));
m_dma8237_1->in_ior_callback<0>().set(FUNC(i82371sb_isa_device::pc_dma8237_0_dack_r));
m_dma8237_1->in_ior_callback<1>().set(FUNC(i82371sb_isa_device::pc_dma8237_1_dack_r));
m_dma8237_1->in_ior_callback<2>().set(FUNC(i82371sb_isa_device::pc_dma8237_2_dack_r));
m_dma8237_1->in_ior_callback<3>().set(FUNC(i82371sb_isa_device::pc_dma8237_3_dack_r));
m_dma8237_1->out_iow_callback<0>().set(FUNC(i82371sb_isa_device::pc_dma8237_0_dack_w));
m_dma8237_1->out_iow_callback<1>().set(FUNC(i82371sb_isa_device::pc_dma8237_1_dack_w));
m_dma8237_1->out_iow_callback<2>().set(FUNC(i82371sb_isa_device::pc_dma8237_2_dack_w));
m_dma8237_1->out_iow_callback<3>().set(FUNC(i82371sb_isa_device::pc_dma8237_3_dack_w));
m_dma8237_1->out_dack_callback<0>().set(FUNC(i82371sb_isa_device::pc_dack0_w));
m_dma8237_1->out_dack_callback<1>().set(FUNC(i82371sb_isa_device::pc_dack1_w));
m_dma8237_1->out_dack_callback<2>().set(FUNC(i82371sb_isa_device::pc_dack2_w));
m_dma8237_1->out_dack_callback<3>().set(FUNC(i82371sb_isa_device::pc_dack3_w));
MCFG_DEVICE_ADD( "dma8237_2", AM9517A, XTAL(14'318'181)/3 )
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, i82371sb_isa_device, pc_dma_hrq_changed))
MCFG_I8237_IN_MEMR_CB(READ8(*this, i82371sb_isa_device, pc_dma_read_word))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, i82371sb_isa_device, pc_dma_write_word))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, i82371sb_isa_device, pc_dma8237_5_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, i82371sb_isa_device, pc_dma8237_6_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, i82371sb_isa_device, pc_dma8237_7_dack_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, i82371sb_isa_device, pc_dma8237_5_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, i82371sb_isa_device, pc_dma8237_6_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, i82371sb_isa_device, pc_dma8237_7_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, i82371sb_isa_device, pc_dack4_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, i82371sb_isa_device, pc_dack5_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, i82371sb_isa_device, pc_dack6_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, i82371sb_isa_device, pc_dack7_w))
AM9517A(config, m_dma8237_2, XTAL(14'318'181)/3);
m_dma8237_2->out_hreq_callback().set(FUNC(i82371sb_isa_device::pc_dma_hrq_changed));
m_dma8237_2->in_memr_callback().set(FUNC(i82371sb_isa_device::pc_dma_read_word));
m_dma8237_2->out_memw_callback().set(FUNC(i82371sb_isa_device::pc_dma_write_word));
m_dma8237_2->in_ior_callback<1>().set(FUNC(i82371sb_isa_device::pc_dma8237_5_dack_r));
m_dma8237_2->in_ior_callback<2>().set(FUNC(i82371sb_isa_device::pc_dma8237_6_dack_r));
m_dma8237_2->in_ior_callback<3>().set(FUNC(i82371sb_isa_device::pc_dma8237_7_dack_r));
m_dma8237_2->out_iow_callback<1>().set(FUNC(i82371sb_isa_device::pc_dma8237_5_dack_w));
m_dma8237_2->out_iow_callback<2>().set(FUNC(i82371sb_isa_device::pc_dma8237_6_dack_w));
m_dma8237_2->out_iow_callback<3>().set(FUNC(i82371sb_isa_device::pc_dma8237_7_dack_w));
m_dma8237_2->out_dack_callback<0>().set(FUNC(i82371sb_isa_device::pc_dack4_w));
m_dma8237_2->out_dack_callback<1>().set(FUNC(i82371sb_isa_device::pc_dack5_w));
m_dma8237_2->out_dack_callback<2>().set(FUNC(i82371sb_isa_device::pc_dack6_w));
m_dma8237_2->out_dack_callback<3>().set(FUNC(i82371sb_isa_device::pc_dack7_w));
MCFG_DEVICE_ADD("pic8259_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(":maincpu", 0))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, i82371sb_isa_device, get_slave_ack))
PIC8259(config, m_pic8259_master, 0);
m_pic8259_master->out_int_callback().set_inputline(m_maincpu, 0);
m_pic8259_master->in_sp_callback().set_constant(1);
m_pic8259_master->read_slave_ack_callback().set(FUNC(i82371sb_isa_device::get_slave_ack));
MCFG_DEVICE_ADD("pic8259_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("pic8259_master", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_pic8259_slave, 0);
m_pic8259_slave->out_int_callback().set(m_pic8259_master, FUNC(pic8259_device::ir2_w));
m_pic8259_slave->in_sp_callback().set_constant(0);
/* sound hardware */
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.50);
MCFG_DEVICE_ADD("isabus", ISA16, 0)
MCFG_ISA16_CPU(":maincpu")

23
src/devices/machine/mb89374.h
View File

@ -37,25 +37,6 @@ Data Link Controller
#include "osdcore.h"
//**************************************************************************
// DEVICE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_MB89374_IRQ_CB(_devcb) \
downcast<mb89374_device &>(*device).set_out_irq_callback(DEVCB_##_devcb);
#define MCFG_MB89374_PO0_CB(_devcb) \
downcast<mb89374_device &>(*device).set_out_po_callback<0>(DEVCB_##_devcb);
#define MCFG_MB89374_PO1_CB(_devcb) \
downcast<mb89374_device &>(*device).set_out_po_callback<1>(DEVCB_##_devcb);
#define MCFG_MB89374_PO2_CB(_devcb) \
downcast<mb89374_device &>(*device).set_out_po_callback<2>(DEVCB_##_devcb);
#define MCFG_MB89374_PO3_CB(_devcb) \
downcast<mb89374_device &>(*device).set_out_po_callback<3>(DEVCB_##_devcb);
class mb89374_device : public device_t,
public device_execute_interface
@ -64,8 +45,8 @@ public:
// construction/destruction
mb89374_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_out_irq_callback(Object &&cb) { return m_out_irq_cb.set_callback(std::forward<Object>(cb)); }
template <unsigned N, class Object> devcb_base &set_out_po_callback(Object &&cb) { return m_out_po_cb[N].set_callback(std::forward<Object>(cb)); }
auto out_irq_callback() { return m_out_irq_cb.bind(); }
template <unsigned N> auto out_po_callback() { return m_out_po_cb[N].bind(); }
// read/write handlers
DECLARE_READ8_MEMBER( read );

18
src/devices/machine/pdc.cpp
View File

@ -273,15 +273,15 @@ MACHINE_CONFIG_START(pdc_device::device_add_mconfig)
/* DMA Controller - Intel P8237A-5 */
/* Channel 0: uPD765a Floppy Disk Controller */
/* Channel 1: M68K main system memory */
MCFG_DEVICE_ADD(FDCDMA_TAG, AM9517A, XTAL(10'000'000) / 2)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, pdc_device, i8237_hreq_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, pdc_device, i8237_eop_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, pdc_device, i8237_dma_mem_r))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, pdc_device, i8237_dma_mem_w))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, pdc_device, i8237_fdc_dma_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, pdc_device, i8237_fdc_dma_w))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, pdc_device, m68k_dma_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, pdc_device, m68k_dma_w))
AM9517A(config, m_dma8237, 10_MHz_XTAL / 2);
m_dma8237->out_hreq_callback().set(FUNC(pdc_device::i8237_hreq_w));
m_dma8237->out_eop_callback().set(FUNC(pdc_device::i8237_eop_w));
m_dma8237->in_memr_callback().set(FUNC(pdc_device::i8237_dma_mem_r));
m_dma8237->out_memw_callback().set(FUNC(pdc_device::i8237_dma_mem_w));
m_dma8237->in_ior_callback<0>().set(FUNC(pdc_device::i8237_fdc_dma_r));
m_dma8237->out_iow_callback<0>().set(FUNC(pdc_device::i8237_fdc_dma_w));
m_dma8237->in_ior_callback<1>().set(FUNC(pdc_device::m68k_dma_r));
m_dma8237->out_iow_callback<1>().set(FUNC(pdc_device::m68k_dma_w));
/* Hard Disk Controller - HDC9224 */
MCFG_DEVICE_ADD(HDC_TAG, HDC9224, 0)

99
src/devices/machine/sis85c496.cpp
View File

@ -46,55 +46,55 @@ void sis85c496_host_device::internal_io_map(address_map &map)
}
MACHINE_CONFIG_START(sis85c496_host_device::device_add_mconfig)
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
MCFG_PIT8253_CLK0(4772720/4) /* heartbeat IRQ */
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(*this, sis85c496_host_device, at_pit8254_out0_changed))
MCFG_PIT8253_CLK1(4772720/4) /* dram refresh */
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, sis85c496_host_device, at_pit8254_out1_changed))
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, sis85c496_host_device, at_pit8254_out2_changed))
PIT8254(config, m_pit8254, 0);
m_pit8254->set_clk<0>(4772720/4); // heartbeat IRQ
m_pit8254->out_handler<0>().set(FUNC(sis85c496_host_device::at_pit8254_out0_changed));
m_pit8254->set_clk<1>(4772720/4); // DRAM refresh
m_pit8254->out_handler<1>().set(FUNC(sis85c496_host_device::at_pit8254_out1_changed));
m_pit8254->set_clk<2>(4772720/4); // PIO port C pin 4, and speaker polling enough
m_pit8254->out_handler<2>().set(FUNC(sis85c496_host_device::at_pit8254_out2_changed));
MCFG_DEVICE_ADD( "dma8237_1", AM9517A, XTAL(14'318'181)/3 )
MCFG_I8237_OUT_HREQ_CB(WRITELINE("dma8237_2", am9517a_device, dreq0_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, sis85c496_host_device, at_dma8237_out_eop))
MCFG_I8237_IN_MEMR_CB(READ8(*this, sis85c496_host_device, pc_dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, sis85c496_host_device, pc_dma_write_byte))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, sis85c496_host_device, pc_dma8237_0_dack_r))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, sis85c496_host_device, pc_dma8237_1_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, sis85c496_host_device, pc_dma8237_2_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, sis85c496_host_device, pc_dma8237_3_dack_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, sis85c496_host_device, pc_dma8237_0_dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, sis85c496_host_device, pc_dma8237_1_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, sis85c496_host_device, pc_dma8237_2_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, sis85c496_host_device, pc_dma8237_3_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, sis85c496_host_device, pc_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, sis85c496_host_device, pc_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, sis85c496_host_device, pc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, sis85c496_host_device, pc_dack3_w))
AM9517A(config, m_dma8237_1, XTAL(14'318'181)/3);
m_dma8237_1->out_hreq_callback().set(m_dma8237_2, FUNC(am9517a_device::dreq0_w));
m_dma8237_1->out_eop_callback().set(FUNC(sis85c496_host_device::at_dma8237_out_eop));
m_dma8237_1->in_memr_callback().set(FUNC(sis85c496_host_device::pc_dma_read_byte));
m_dma8237_1->out_memw_callback().set(FUNC(sis85c496_host_device::pc_dma_write_byte));
m_dma8237_1->in_ior_callback<0>().set(FUNC(sis85c496_host_device::pc_dma8237_0_dack_r));
m_dma8237_1->in_ior_callback<1>().set(FUNC(sis85c496_host_device::pc_dma8237_1_dack_r));
m_dma8237_1->in_ior_callback<2>().set(FUNC(sis85c496_host_device::pc_dma8237_2_dack_r));
m_dma8237_1->in_ior_callback<3>().set(FUNC(sis85c496_host_device::pc_dma8237_3_dack_r));
m_dma8237_1->out_iow_callback<0>().set(FUNC(sis85c496_host_device::pc_dma8237_0_dack_w));
m_dma8237_1->out_iow_callback<1>().set(FUNC(sis85c496_host_device::pc_dma8237_1_dack_w));
m_dma8237_1->out_iow_callback<2>().set(FUNC(sis85c496_host_device::pc_dma8237_2_dack_w));
m_dma8237_1->out_iow_callback<3>().set(FUNC(sis85c496_host_device::pc_dma8237_3_dack_w));
m_dma8237_1->out_dack_callback<0>().set(FUNC(sis85c496_host_device::pc_dack0_w));
m_dma8237_1->out_dack_callback<1>().set(FUNC(sis85c496_host_device::pc_dack1_w));
m_dma8237_1->out_dack_callback<2>().set(FUNC(sis85c496_host_device::pc_dack2_w));
m_dma8237_1->out_dack_callback<3>().set(FUNC(sis85c496_host_device::pc_dack3_w));
MCFG_DEVICE_ADD( "dma8237_2", AM9517A, XTAL(14'318'181)/3 )
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, sis85c496_host_device, pc_dma_hrq_changed))
MCFG_I8237_IN_MEMR_CB(READ8(*this, sis85c496_host_device, pc_dma_read_word))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, sis85c496_host_device, pc_dma_write_word))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, sis85c496_host_device, pc_dma8237_5_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, sis85c496_host_device, pc_dma8237_6_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, sis85c496_host_device, pc_dma8237_7_dack_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, sis85c496_host_device, pc_dma8237_5_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, sis85c496_host_device, pc_dma8237_6_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, sis85c496_host_device, pc_dma8237_7_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, sis85c496_host_device, pc_dack4_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, sis85c496_host_device, pc_dack5_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, sis85c496_host_device, pc_dack6_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, sis85c496_host_device, pc_dack7_w))
AM9517A(config, m_dma8237_2, XTAL(14'318'181)/3);
m_dma8237_2->out_hreq_callback().set(FUNC(sis85c496_host_device::pc_dma_hrq_changed));
m_dma8237_2->in_memr_callback().set(FUNC(sis85c496_host_device::pc_dma_read_word));
m_dma8237_2->out_memw_callback().set(FUNC(sis85c496_host_device::pc_dma_write_word));
m_dma8237_2->in_ior_callback<1>().set(FUNC(sis85c496_host_device::pc_dma8237_5_dack_r));
m_dma8237_2->in_ior_callback<2>().set(FUNC(sis85c496_host_device::pc_dma8237_6_dack_r));
m_dma8237_2->in_ior_callback<3>().set(FUNC(sis85c496_host_device::pc_dma8237_7_dack_r));
m_dma8237_2->out_iow_callback<1>().set(FUNC(sis85c496_host_device::pc_dma8237_5_dack_w));
m_dma8237_2->out_iow_callback<2>().set(FUNC(sis85c496_host_device::pc_dma8237_6_dack_w));
m_dma8237_2->out_iow_callback<3>().set(FUNC(sis85c496_host_device::pc_dma8237_7_dack_w));
m_dma8237_2->out_dack_callback<0>().set(FUNC(sis85c496_host_device::pc_dack4_w));
m_dma8237_2->out_dack_callback<1>().set(FUNC(sis85c496_host_device::pc_dack5_w));
m_dma8237_2->out_dack_callback<2>().set(FUNC(sis85c496_host_device::pc_dack6_w));
m_dma8237_2->out_dack_callback<3>().set(FUNC(sis85c496_host_device::pc_dack7_w));
MCFG_DEVICE_ADD("pic8259_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(*this, sis85c496_host_device, cpu_int_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, sis85c496_host_device, get_slave_ack))
PIC8259(config, m_pic8259_master, 0);
m_pic8259_master->out_int_callback().set(FUNC(sis85c496_host_device::cpu_int_w));
m_pic8259_master->in_sp_callback().set_constant(1);
m_pic8259_master->read_slave_ack_callback().set(FUNC(sis85c496_host_device::get_slave_ack));
MCFG_DEVICE_ADD("pic8259_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("pic8259_master", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_pic8259_slave, 0);
m_pic8259_slave->out_int_callback().set(m_pic8259_master, FUNC(pic8259_device::ir2_w));
m_pic8259_slave->in_sp_callback().set_constant(0);
MCFG_DEVICE_ADD("keybc", AT_KEYBOARD_CONTROLLER, XTAL(12'000'000))
MCFG_AT_KEYBOARD_CONTROLLER_SYSTEM_RESET_CB(WRITELINE(*this, sis85c496_host_device, cpu_reset_w))
@ -107,14 +107,13 @@ MACHINE_CONFIG_START(sis85c496_host_device::device_add_mconfig)
MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, keyboard_data_w))
MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)
MCFG_DS12885_ADD("rtc")
MCFG_MC146818_IRQ_HANDLER(WRITELINE("pic8259_slave", pic8259_device, ir0_w))
MCFG_MC146818_CENTURY_INDEX(0x32)
DS12885(config, m_ds12885);
m_ds12885->irq_callback().set(m_pic8259_slave, FUNC(pic8259_device::ir0_w));
m_ds12885->set_century_index(0x32);
/* sound hardware */
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND, 0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.50);
MACHINE_CONFIG_END

120
src/devices/machine/wd7600.cpp
View File

@ -22,58 +22,59 @@
DEFINE_DEVICE_TYPE(WD7600, wd7600_device, "wd7600", "Western Digital WD7600 chipset")
MACHINE_CONFIG_START(wd7600_device::device_add_mconfig)
MCFG_DEVICE_ADD("dma1", AM9517A, 0)
MCFG_I8237_OUT_HREQ_CB(WRITELINE("dma2", am9517a_device, dreq0_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, wd7600_device, dma1_eop_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, wd7600_device, dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, wd7600_device, dma_write_byte))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, wd7600_device, dma1_ior0_r))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, wd7600_device, dma1_ior1_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, wd7600_device, dma1_ior2_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, wd7600_device, dma1_ior3_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, wd7600_device, dma1_iow0_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, wd7600_device, dma1_iow1_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, wd7600_device, dma1_iow2_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, wd7600_device, dma1_iow3_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, wd7600_device, dma1_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, wd7600_device, dma1_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, wd7600_device, dma1_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, wd7600_device, dma1_dack3_w))
MCFG_DEVICE_ADD("dma2", AM9517A, 0)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, wd7600_device, dma2_hreq_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, wd7600_device, dma_read_word))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, wd7600_device, dma_write_word))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, wd7600_device, dma2_ior1_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, wd7600_device, dma2_ior2_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, wd7600_device, dma2_ior3_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, wd7600_device, dma2_iow1_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, wd7600_device, dma2_iow2_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, wd7600_device, dma2_iow3_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, wd7600_device, dma2_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, wd7600_device, dma2_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, wd7600_device, dma2_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, wd7600_device, dma2_dack3_w))
AM9517A(config, m_dma1, 0);
m_dma1->out_hreq_callback().set(m_dma2, FUNC(am9517a_device::dreq0_w));
m_dma1->out_eop_callback().set(FUNC(wd7600_device::dma1_eop_w));
m_dma1->in_memr_callback().set(FUNC(wd7600_device::dma_read_byte));
m_dma1->out_memw_callback().set(FUNC(wd7600_device::dma_write_byte));
m_dma1->in_ior_callback<0>().set(FUNC(wd7600_device::dma1_ior0_r));
m_dma1->in_ior_callback<1>().set(FUNC(wd7600_device::dma1_ior1_r));
m_dma1->in_ior_callback<2>().set(FUNC(wd7600_device::dma1_ior2_r));
m_dma1->in_ior_callback<3>().set(FUNC(wd7600_device::dma1_ior3_r));
m_dma1->out_iow_callback<0>().set(FUNC(wd7600_device::dma1_iow0_w));
m_dma1->out_iow_callback<1>().set(FUNC(wd7600_device::dma1_iow1_w));
m_dma1->out_iow_callback<2>().set(FUNC(wd7600_device::dma1_iow2_w));
m_dma1->out_iow_callback<3>().set(FUNC(wd7600_device::dma1_iow3_w));
m_dma1->out_dack_callback<0>().set(FUNC(wd7600_device::dma1_dack0_w));
m_dma1->out_dack_callback<1>().set(FUNC(wd7600_device::dma1_dack1_w));
m_dma1->out_dack_callback<2>().set(FUNC(wd7600_device::dma1_dack2_w));
m_dma1->out_dack_callback<3>().set(FUNC(wd7600_device::dma1_dack3_w));
MCFG_DEVICE_ADD("intc1", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE(*this, wd7600_device, pic1_int_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, wd7600_device, pic1_slave_ack_r))
AM9517A(config, m_dma2, 0);
m_dma2->out_hreq_callback().set(FUNC(wd7600_device::dma2_hreq_w));
m_dma2->in_memr_callback().set(FUNC(wd7600_device::dma_read_word));
m_dma2->out_memw_callback().set(FUNC(wd7600_device::dma_write_word));
m_dma2->in_ior_callback<1>().set(FUNC(wd7600_device::dma2_ior1_r));
m_dma2->in_ior_callback<2>().set(FUNC(wd7600_device::dma2_ior2_r));
m_dma2->in_ior_callback<3>().set(FUNC(wd7600_device::dma2_ior3_r));
m_dma2->out_iow_callback<1>().set(FUNC(wd7600_device::dma2_iow1_w));
m_dma2->out_iow_callback<2>().set(FUNC(wd7600_device::dma2_iow2_w));
m_dma2->out_iow_callback<3>().set(FUNC(wd7600_device::dma2_iow3_w));
m_dma2->out_dack_callback<0>().set(FUNC(wd7600_device::dma2_dack0_w));
m_dma2->out_dack_callback<1>().set(FUNC(wd7600_device::dma2_dack1_w));
m_dma2->out_dack_callback<2>().set(FUNC(wd7600_device::dma2_dack2_w));
m_dma2->out_dack_callback<3>().set(FUNC(wd7600_device::dma2_dack3_w));
MCFG_DEVICE_ADD("intc2", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("intc1", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_pic1, 0);
m_pic1->out_int_callback().set(FUNC(wd7600_device::pic1_int_w));
m_pic1->in_sp_callback().set_constant(1);
m_pic1->read_slave_ack_callback().set(FUNC(wd7600_device::pic1_slave_ack_r));
MCFG_DEVICE_ADD("ctc", PIT8254, 0)
MCFG_PIT8253_CLK0(XTAL(14'318'181) / 12.0)
MCFG_PIT8253_OUT0_HANDLER(WRITELINE("intc1", pic8259_device, ir0_w))
MCFG_PIT8253_CLK1(XTAL(14'318'181) / 12.0)
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, wd7600_device, ctc_out1_w))
MCFG_PIT8253_CLK2(XTAL(14'318'181) / 12.0)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, wd7600_device, ctc_out2_w))
PIC8259(config, m_pic2, 0);
m_pic2->out_int_callback().set(m_pic1, FUNC(pic8259_device::ir2_w));
m_pic2->in_sp_callback().set_constant(0);
MCFG_DS12885_ADD("rtc")
MCFG_MC146818_IRQ_HANDLER(WRITELINE("intc2", pic8259_device, ir0_w))
MCFG_MC146818_CENTURY_INDEX(0x32)
PIT8254(config, m_ctc, 0);
m_ctc->set_clk<0>(XTAL(14'318'181) / 12.0);
m_ctc->out_handler<0>().set(m_pic1, FUNC(pic8259_device::ir0_w));
m_ctc->set_clk<1>(XTAL(14'318'181) / 12.0);
m_ctc->out_handler<1>().set(FUNC(wd7600_device::ctc_out1_w));
m_ctc->set_clk<2>(XTAL(14'318'181) / 12.0);
m_ctc->out_handler<2>().set(FUNC(wd7600_device::ctc_out2_w));
DS12885(config, m_rtc);
m_rtc->irq_callback().set(m_pic2, FUNC(pic8259_device::ir0_w));
m_rtc->set_century_index(0x32);
MACHINE_CONFIG_END
@ -94,6 +95,9 @@ wd7600_device::wd7600_device(const machine_config &mconfig, const char *tag, dev
m_pic2(*this, "intc2"),
m_ctc(*this, "ctc"),
m_rtc(*this, "rtc"),
m_cpu(*this, finder_base::DUMMY_TAG),
m_keybc(*this, finder_base::DUMMY_TAG),
m_bios(*this, finder_base::DUMMY_TAG),
m_portb(0x0f),
m_iochck(1),
m_nmi_mask(1),
@ -104,7 +108,8 @@ wd7600_device::wd7600_device(const machine_config &mconfig, const char *tag, dev
m_dma_eop(0),
m_dma_high_byte(0xff),
m_dma_channel(-1)
{}
{
}
void wd7600_device::device_start()
@ -126,13 +131,10 @@ void wd7600_device::device_start()
m_write_a20m.resolve_safe();
m_write_spkr.resolve_safe();
device_t *cpu = machine().device(m_cputag);
m_space = &cpu->memory().space(AS_PROGRAM);
m_space_io = &cpu->memory().space(AS_IO);
m_space = &m_cpu->space(AS_PROGRAM);
m_space_io = &m_cpu->space(AS_IO);
m_isa = machine().root_device().memregion(m_isatag)->base();
m_bios = machine().root_device().memregion(m_biostag)->base();
m_keybc = downcast<at_keyboard_controller_device *>(machine().device(m_keybctag));
m_ram = ram_dev->pointer();
uint32_t ram_size = ram_dev->size();
@ -147,15 +149,15 @@ void wd7600_device::device_start()
// install video BIOS (we should use the VGA BIOS at the beginning of the system BIOS ROM, but that gives a
// blank display (but still runs))
//m_space->install_rom(0x000c0000, 0x000cffff, m_bios);
//m_space->install_rom(0x000c0000, 0x000cffff, &m_bios[0x00000]);
m_space->install_rom(0x000c0000, 0x000cffff, m_isa);
// install BIOS ROM at cpu initial pc
m_space->install_rom(0x000f0000, 0x000fffff, m_bios + 0x10000);
m_space->install_rom(0x000f0000, 0x000fffff, &m_bios[0x10000]);
if(m_space->addrmask() == 0xffffffff) // 32-bit address space only
m_space->install_rom(0xffff0000, 0xffffffff, m_bios + 0x10000);
m_space->install_rom(0xffff0000, 0xffffffff, &m_bios[0x10000]);
else
m_space->install_rom(0x00ff0000, 0x00ffffff, m_bios + 0x10000);
m_space->install_rom(0x00ff0000, 0x00ffffff, &m_bios[0x10000]);
// install i/o accesses
if (m_space_io->data_width() == 16)
@ -300,7 +302,7 @@ READ8_MEMBER( wd7600_device::keyb_data_r )
{
uint8_t ret = m_keybc->data_r(space,0);
// LOG("WD7600: keyboard data read %02x\n", ret);
return ret;
return ret;
}
WRITE8_MEMBER( wd7600_device::keyb_cmd_w )

15
src/devices/machine/wd7600.h
View File

@ -78,10 +78,10 @@ public:
template <class Object> devcb_base &set_spkr_callback(Object &&spkr) { return m_write_spkr.set_callback(std::forward<Object>(spkr)); }
// inline configuration
void set_cputag(const char *tag) { m_cputag = tag; }
template <typename T> void set_cputag(T &&tag) { m_cpu.set_tag(std::forward<T>(tag)); }
void set_isatag(const char *tag) { m_isatag = tag; }
void set_biostag(const char *tag) { m_biostag = tag; }
void set_keybctag(const char *tag) { m_keybctag = tag; }
template <typename T> void set_biostag(T &&tag) { m_bios.set_tag(std::forward<T>(tag)); }
template <typename T> void set_keybctag(T &&tag) { m_keybc.set_tag(std::forward<T>(tag)); }
// input lines
DECLARE_WRITE_LINE_MEMBER( irq01_w ) { m_pic1->ir1_w(state); }
@ -195,6 +195,10 @@ private:
required_device<pit8254_device> m_ctc;
required_device<ds12885_device> m_rtc;
required_device<device_memory_interface> m_cpu;
required_device<at_keyboard_controller_device> m_keybc;
required_region_ptr<uint8_t> m_bios;
offs_t page_offset();
void set_dma_channel(int channel, bool state);
void keyboard_gatea20(int state);
@ -202,10 +206,7 @@ private:
void a20m();
// internal state
const char *m_cputag;
const char *m_isatag;
const char *m_biostag;
const char *m_keybctag;
uint8_t m_portb;
int m_iochck;
int m_nmi_mask;
@ -228,9 +229,7 @@ private:
address_space *m_space;
address_space *m_space_io;
uint8_t *m_isa;
uint8_t *m_bios;
uint8_t *m_ram;
at_keyboard_controller_device *m_keybc;
};
// device type definition

19
src/devices/sound/mm5837.h
View File

@ -20,21 +20,6 @@
#pragma once
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_MM5837_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, MM5837, 0)
#define MCFG_MM5837_VDD(_voltage) \
downcast<mm5837_device &>(*device).set_vdd_voltage(_voltage);
#define MCFG_MM5837_OUTPUT_CB(_devcb) \
downcast<mm5837_device &>(*device).set_output_callback(DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -43,11 +28,11 @@ class mm5837_device : public device_t
{
public:
// construction/destruction
mm5837_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
mm5837_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
// configuration
void set_vdd_voltage(int voltage) { m_vdd = voltage; }
template <class Object> devcb_base &set_output_callback(Object &&cb) { return m_output_cb.set_callback(std::forward<Object>(cb)); }
auto output_callback() { return m_output_cb.bind(); }
protected:
// device-level overrides

52
src/mame/drivers/a7150.cpp
View File

@ -28,6 +28,7 @@
#include "machine/pit8253.h"
#include "machine/pic8259.h"
#include "machine/bankdev.h"
#include "machine/input_merger.h"
#include "cpu/z80/z80.h"
#include "machine/clock.h"
@ -489,29 +490,30 @@ MACHINE_CONFIG_START(a7150_state::a7150)
// MCFG_I8255_OUT_PORTB_CB(WRITE8("cent_data_out", output_latch_device, bus_w))
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, a7150_state, ppi_c_w))
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
MCFG_PIT8253_CLK0(XTAL(14'745'600)/4)
MCFG_PIT8253_OUT0_HANDLER(WRITELINE("pic8259", pic8259_device, ir2_w))
MCFG_PIT8253_CLK1(XTAL(14'745'600)/4)
MCFG_PIT8253_CLK2(XTAL(14'745'600)/4)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, a7150_state, a7150_tmr2_w))
PIT8253(config, m_pit8253, 0);
m_pit8253->set_clk<0>(14.7456_MHz_XTAL/4);
m_pit8253->out_handler<0>().set(m_pic8259, FUNC(pic8259_device::ir2_w));
m_pit8253->set_clk<1>(14.7456_MHz_XTAL/4);
m_pit8253->set_clk<2>(14.7456_MHz_XTAL/4);
m_pit8253->out_handler<2>().set(FUNC(a7150_state::a7150_tmr2_w));
MCFG_DEVICE_ADD("uart8251", I8251, 0)
MCFG_I8251_TXD_HANDLER(WRITELINE(*this, a7150_state, ifss_write_txd))
MCFG_I8251_DTR_HANDLER(WRITELINE(*this, a7150_state, ifss_write_dtr))
MCFG_I8251_RTS_HANDLER(WRITELINE(*this, a7150_state, ifss_loopback_w))
MCFG_I8251_RXRDY_HANDLER(WRITELINE("pic8259", pic8259_device, ir4_w))
MCFG_I8251_TXRDY_HANDLER(WRITELINE("pic8259", pic8259_device, ir4_w))
INPUT_MERGER_ANY_HIGH(config, "uart_irq").output_handler().set(m_pic8259, FUNC(pic8259_device::ir4_w));
I8251(config, m_uart8251, 0);
m_uart8251->txd_handler().set(FUNC(a7150_state::ifss_write_txd));
m_uart8251->dtr_handler().set(FUNC(a7150_state::ifss_write_dtr));
m_uart8251->rts_handler().set(FUNC(a7150_state::ifss_loopback_w));
m_uart8251->rxrdy_handler().set("uart_irq", FUNC(input_merger_device::in_w<0>));
m_uart8251->txrdy_handler().set("uart_irq", FUNC(input_merger_device::in_w<1>));
// IFSS port on processor card -- keyboard runs at 28800 8N2
MCFG_DEVICE_ADD("rs232", RS232_PORT, default_rs232_devices, "keyboard")
MCFG_RS232_RXD_HANDLER(WRITELINE("uart8251", i8251_device, write_rxd))
MCFG_RS232_CTS_HANDLER(WRITELINE("uart8251", i8251_device, write_cts))
MCFG_RS232_DSR_HANDLER(WRITELINE("uart8251", i8251_device, write_dsr))
MCFG_SLOT_OPTION_DEVICE_INPUT_DEFAULTS("keyboard", kbd_rs232_defaults)
RS232_PORT(config, m_rs232, default_rs232_devices, "keyboard");
m_rs232->rxd_handler().set(m_uart8251, FUNC(i8251_device::write_rxd));
m_rs232->cts_handler().set(m_uart8251, FUNC(i8251_device::write_cts));
m_rs232->dsr_handler().set(m_uart8251, FUNC(i8251_device::write_dsr));
m_rs232->set_option_device_input_defaults("keyboard", DEVICE_INPUT_DEFAULTS_NAME(kbd_rs232_defaults));
MCFG_DEVICE_ADD("isbc_215g", ISBC_215G, 0x4a, "maincpu")
MCFG_ISBC_215_IRQ(WRITELINE("pic8259", pic8259_device, ir5_w))
ISBC_215G(config, "isbc_215g", 0, 0x4a, m_maincpu).irq_callback().set(m_pic8259, FUNC(pic8259_device::ir5_w));
// KGS K7070 graphics terminal controlling ABG K7072 framebuffer
MCFG_DEVICE_ADD("gfxcpu", Z80, XTAL(16'000'000)/4)
@ -519,12 +521,12 @@ MACHINE_CONFIG_START(a7150_state::a7150)
MCFG_DEVICE_IO_MAP(k7070_cpu_io)
MCFG_Z80_DAISY_CHAIN(k7070_daisy_chain)
MCFG_DEVICE_ADD("video_bankdev", ADDRESS_MAP_BANK, 0)
MCFG_DEVICE_PROGRAM_MAP(k7070_cpu_banked)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(18)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x10000)
ADDRESS_MAP_BANK(config, m_video_bankdev, 0);
m_video_bankdev->set_map(&a7150_state::k7070_cpu_banked);
m_video_bankdev->set_endianness(ENDIANNESS_BIG);
m_video_bankdev->set_addr_width(18);
m_video_bankdev->set_data_width(8);
m_video_bankdev->set_stride(0x10000);
clock_device &ctc_clock(CLOCK(config, "ctc_clock", 1230750));
ctc_clock.signal_handler().set(m_ctc, FUNC(z80ctc_device::trg0));

44
src/mame/drivers/apc.cpp
View File

@ -943,11 +943,11 @@ MACHINE_CONFIG_START(apc_state::apc)
MCFG_DEVICE_IO_MAP(apc_io)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("pic8259_master", pic8259_device, inta_cb)
MCFG_DEVICE_ADD(m_pit, PIT8253, 0)
MCFG_PIT8253_CLK0(MAIN_CLOCK) /* heartbeat IRQ */
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(m_i8259_m, pic8259_device, ir3_w))
MCFG_PIT8253_CLK1(MAIN_CLOCK) /* Memory Refresh */
MCFG_PIT8253_CLK2(MAIN_CLOCK) /* RS-232c */
PIT8253(config, m_pit, 0);
m_pit->set_clk<0>(MAIN_CLOCK); // heartbeat IRQ
m_pit->out_handler<0>().set(m_i8259_m, FUNC(pic8259_device::ir3_w));
m_pit->set_clk<1>(MAIN_CLOCK); // Memory Refresh
m_pit->set_clk<2>(MAIN_CLOCK); // RS-232c
PIC8259(config, m_i8259_m, 0);
m_i8259_m->out_int_callback().set_inputline(m_maincpu, 0);
@ -958,17 +958,17 @@ MACHINE_CONFIG_START(apc_state::apc)
m_i8259_s->out_int_callback().set(m_i8259_m, FUNC(pic8259_device::ir7_w)); // TODO: check ir7_w
m_i8259_s->in_sp_callback().set_constant(0);
MCFG_DEVICE_ADD(m_dmac, AM9517A, MAIN_CLOCK)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, apc_state, apc_dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, apc_state, apc_tc_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, apc_state, apc_dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, apc_state, apc_dma_write_byte))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, apc_state, fdc_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, apc_state, fdc_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, apc_state, apc_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, apc_state, apc_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, apc_state, apc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, apc_state, apc_dack3_w))
AM9517A(config, m_dmac, MAIN_CLOCK);
m_dmac->out_hreq_callback().set(FUNC(apc_state::apc_dma_hrq_changed));
m_dmac->out_eop_callback().set(FUNC(apc_state::apc_tc_w));
m_dmac->in_memr_callback().set(FUNC(apc_state::apc_dma_read_byte));
m_dmac->out_memw_callback().set(FUNC(apc_state::apc_dma_write_byte));
m_dmac->in_ior_callback<1>().set(FUNC(apc_state::fdc_r));
m_dmac->out_iow_callback<1>().set(FUNC(apc_state::fdc_w));
m_dmac->out_dack_callback<0>().set(FUNC(apc_state::apc_dack0_w));
m_dmac->out_dack_callback<1>().set(FUNC(apc_state::apc_dack1_w));
m_dmac->out_dack_callback<2>().set(FUNC(apc_state::apc_dack2_w));
m_dmac->out_dack_callback<3>().set(FUNC(apc_state::apc_dack3_w));
MCFG_NVRAM_ADD_1FILL(m_cmos)
MCFG_UPD1990A_ADD(m_rtc, XTAL(32'768), NOOP, NOOP)
@ -981,12 +981,12 @@ MACHINE_CONFIG_START(apc_state::apc)
MCFG_SOFTWARE_LIST_ADD("disk_list","apc")
/* video hardware */
MCFG_SCREEN_ADD(m_screen, RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
MCFG_SCREEN_UPDATE_DRIVER(apc_state, screen_update)
MCFG_SCREEN_SIZE(640, 494)
MCFG_SCREEN_VISIBLE_AREA(0*8, 640-1, 0*8, 494-1)
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(60);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500));
m_screen->set_screen_update(FUNC(apc_state::screen_update));
m_screen->set_size(640, 494);
m_screen->set_visarea(0*8, 640-1, 0*8, 494-1);
MCFG_PALETTE_ADD_3BIT_BRG(m_palette)

81
src/mame/drivers/apricotp.cpp
View File

@ -50,15 +50,12 @@
#define I8086_TAG "ic7"
#define I8284_TAG "ic30"
#define I8237_TAG "ic17"
#define I8259A_TAG "ic51"
#define I8253A5_TAG "ic20"
#define TMS4500_TAG "ic42"
#define MC6845_TAG "ic69"
#define HD63B01V1_TAG "ic29"
#define AD7574_TAG "ic34"
#define AD1408_TAG "ic37"
#define Z80SIO0_TAG "ic6"
#define WD2797_TAG "ic5"
#define SN76489AN_TAG "ic13"
#define CENTRONICS_TAG "centronics"
@ -87,22 +84,22 @@ class fp_state : public driver_device
{
public:
fp_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, I8086_TAG),
m_soundcpu(*this, HD63B01V1_TAG),
m_dmac(*this, I8237_TAG),
m_pic(*this, I8259A_TAG),
m_pit(*this, I8253A5_TAG),
m_sio(*this, Z80SIO0_TAG),
m_fdc(*this, WD2797_TAG),
m_crtc(*this, MC6845_TAG),
m_ram(*this, RAM_TAG),
m_floppy0(*this, WD2797_TAG":0"),
m_floppy1(*this, WD2797_TAG":1"),
m_floppy(nullptr),
m_centronics(*this, CENTRONICS_TAG),
m_work_ram(*this, "work_ram"),
m_video_ram(*this, "video_ram")
: driver_device(mconfig, type, tag)
, m_maincpu(*this, I8086_TAG)
, m_soundcpu(*this, HD63B01V1_TAG)
, m_dmac(*this, "ic17")
, m_pic(*this, I8259A_TAG)
, m_pit(*this, "ic20")
, m_sio(*this, "ic6")
, m_fdc(*this, WD2797_TAG)
, m_crtc(*this, MC6845_TAG)
, m_ram(*this, RAM_TAG)
, m_floppy0(*this, WD2797_TAG":0")
, m_floppy1(*this, WD2797_TAG":1")
, m_floppy(nullptr)
, m_centronics(*this, CENTRONICS_TAG)
, m_work_ram(*this, "work_ram")
, m_video_ram(*this, "video_ram")
{ }
void fp(machine_config &config);
@ -634,35 +631,35 @@ MACHINE_CONFIG_START(fp_state::fp)
/* Devices */
MCFG_DEVICE_ADD(APRICOT_KEYBOARD_TAG, APRICOT_KEYBOARD, 0)
MCFG_DEVICE_ADD(I8237_TAG, AM9517A, 250000)
MCFG_I8237_OUT_EOP_CB(WRITELINE(I8259A_TAG, pic8259_device, ir7_w))
MCFG_I8237_IN_IOR_1_CB(READ8(WD2797_TAG, wd_fdc_device_base, data_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(WD2797_TAG, wd_fdc_device_base, data_w))
AM9517A(config, m_dmac, 250000);
m_dmac->out_eop_callback().set(m_pic, FUNC(pic8259_device::ir7_w));
m_dmac->in_ior_callback<1>().set(m_fdc, FUNC(wd_fdc_device_base::data_r));
m_dmac->out_iow_callback<1>().set(m_fdc, FUNC(wd_fdc_device_base::data_w));
MCFG_DEVICE_ADD(I8259A_TAG, PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0))
PIC8259(config, m_pic, 0);
m_pic->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
MCFG_DEVICE_ADD(I8253A5_TAG, PIT8253, 0)
MCFG_PIT8253_CLK0(2000000)
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(I8259A_TAG, pic8259_device, ir0_w))
MCFG_PIT8253_CLK1(2000000)
MCFG_PIT8253_CLK2(2000000)
PIT8253(config, m_pit, 0);
m_pit->set_clk<0>(2000000);
m_pit->out_handler<0>().set(m_pic, FUNC(pic8259_device::ir0_w));
m_pit->set_clk<1>(2000000);
m_pit->set_clk<2>(2000000);
MCFG_DEVICE_ADD(Z80SIO0_TAG, Z80SIO, 2500000)
MCFG_Z80SIO_OUT_INT_CB(WRITELINE(I8259A_TAG, pic8259_device, ir4_w))
Z80SIO(config, m_sio, 2500000);
m_sio->out_int_callback().set(m_pic, FUNC(pic8259_device::ir4_w));
MCFG_DEVICE_ADD(WD2797_TAG, WD2797, 2000000)
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(I8259A_TAG, pic8259_device, ir1_w))
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(I8237_TAG, am9517a_device, dreq1_w))
WD2797(config, m_fdc, 2000000);
m_fdc->intrq_wr_callback().set(m_pic, FUNC(pic8259_device::ir1_w));
m_fdc->drq_wr_callback().set(m_dmac, FUNC(am9517a_device::dreq1_w));
MCFG_FLOPPY_DRIVE_ADD(WD2797_TAG ":0", fp_floppies, "d32w", fp_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(WD2797_TAG ":1", fp_floppies, nullptr, fp_state::floppy_formats)
FLOPPY_CONNECTOR(config, m_floppy0, fp_floppies, "d32w", fp_state::floppy_formats);
FLOPPY_CONNECTOR(config, m_floppy1, fp_floppies, nullptr, fp_state::floppy_formats);
MCFG_DEVICE_ADD(m_centronics, CENTRONICS, centronics_devices, "printer")
MCFG_CENTRONICS_BUSY_HANDLER(WRITELINE(*this, fp_state, write_centronics_busy))
MCFG_CENTRONICS_SELECT_HANDLER(WRITELINE(*this, fp_state, write_centronics_select))
MCFG_CENTRONICS_FAULT_HANDLER(WRITELINE(*this, fp_state, write_centronics_fault))
MCFG_CENTRONICS_PERROR_HANDLER(WRITELINE(*this, fp_state, write_centronics_perror))
CENTRONICS(config, m_centronics, centronics_devices, "printer");
m_centronics->busy_handler().set(FUNC(fp_state::write_centronics_busy));
m_centronics->select_handler().set(FUNC(fp_state::write_centronics_select));
m_centronics->fault_handler().set(FUNC(fp_state::write_centronics_fault));
m_centronics->perror_handler().set(FUNC(fp_state::write_centronics_perror));
MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", CENTRONICS_TAG)

88
src/mame/drivers/attache.cpp
View File

@ -1136,23 +1136,23 @@ MACHINE_CONFIG_START(attache_state::attache)
MCFG_PALETTE_ADD_MONOCHROME_HIGHLIGHT("palette")
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("psg", AY8912, 8_MHz_XTAL / 4)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
AY8912(config, m_psg, 8_MHz_XTAL / 4);
m_psg->add_route(ALL_OUTPUTS, "mono", 0.25);
MCFG_DEVICE_ADD("rtc", MSM5832, 32.768_kHz_XTAL)
MSM5832(config, m_rtc, 32.768_kHz_XTAL);
MCFG_DEVICE_ADD("pio", Z80PIO, 8_MHz_XTAL / 2)
MCFG_Z80PIO_IN_PA_CB(READ8(*this, attache_state, pio_portA_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(*this, attache_state, pio_portA_w))
MCFG_Z80PIO_IN_PB_CB(READ8(*this, attache_state, pio_portB_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(*this, attache_state, pio_portB_w))
Z80PIO(config, m_pio, 8_MHz_XTAL / 2);
m_pio->in_pa_callback().set(FUNC(attache_state::pio_portA_r));
m_pio->out_pa_callback().set(FUNC(attache_state::pio_portA_w));
m_pio->in_pb_callback().set(FUNC(attache_state::pio_portB_r));
m_pio->out_pb_callback().set(FUNC(attache_state::pio_portB_w));
MCFG_DEVICE_ADD("sio", Z80SIO, 8_MHz_XTAL / 2)
MCFG_Z80SIO_OUT_TXDA_CB(WRITELINE("rs232a", rs232_port_device, write_txd))
MCFG_Z80SIO_OUT_RTSA_CB(WRITELINE("rs232a", rs232_port_device, write_rts))
MCFG_Z80SIO_OUT_TXDB_CB(WRITELINE("rs232b", rs232_port_device, write_txd))
MCFG_Z80SIO_OUT_RTSB_CB(WRITELINE("rs232b", rs232_port_device, write_rts))
MCFG_Z80SIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
Z80SIO(config, m_sio, 8_MHz_XTAL / 2);
m_sio->out_txda_callback().set("rs232a", FUNC(rs232_port_device::write_txd));
m_sio->out_rtsa_callback().set("rs232a", FUNC(rs232_port_device::write_rts));
m_sio->out_txdb_callback().set("rs232b", FUNC(rs232_port_device::write_txd));
m_sio->out_rtsb_callback().set("rs232b", FUNC(rs232_port_device::write_rts));
m_sio->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
MCFG_DEVICE_ADD("rs232a", RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE("sio", z80sio_device, rxa_w))
@ -1172,14 +1172,14 @@ MACHINE_CONFIG_START(attache_state::attache)
brc.signal_handler().set(m_ctc, FUNC(z80ctc_device::trg0));
brc.signal_handler().append(m_ctc, FUNC(z80ctc_device::trg1));
MCFG_DEVICE_ADD("dma", AM9517A, 8_MHz_XTAL / 4)
MCFG_AM9517A_OUT_HREQ_CB(WRITELINE(*this, attache_state, hreq_w))
MCFG_AM9517A_OUT_EOP_CB(WRITELINE(*this, attache_state, eop_w))
MCFG_AM9517A_IN_MEMR_CB(READ8(*this, attache_state, dma_mem_r))
MCFG_AM9517A_OUT_MEMW_CB(WRITE8(*this, attache_state, dma_mem_w))
MCFG_AM9517A_IN_IOR_0_CB(READ8(*this, attache_state, fdc_dma_r))
MCFG_AM9517A_OUT_IOW_0_CB(WRITE8(*this, attache_state, fdc_dma_w))
// MCFG_AM9517A_OUT_DACK_0_CB(WRITELINE(*this, attache_state, fdc_dack_w))
AM9517A(config, m_dma, 8_MHz_XTAL / 4);
m_dma->out_hreq_callback().set(FUNC(attache_state::hreq_w));
m_dma->out_eop_callback().set(FUNC(attache_state::eop_w));
m_dma->in_memr_callback().set(FUNC(attache_state::dma_mem_r));
m_dma->out_memw_callback().set(FUNC(attache_state::dma_mem_w));
m_dma->in_ior_callback<0>().set(FUNC(attache_state::fdc_dma_r));
m_dma->out_iow_callback<0>().set(FUNC(attache_state::fdc_dma_w));
// m_dma->out_dack_callback<0>().set(FUNC(attache_state::fdc_dack_w));
UPD765A(config, m_fdc, true, true);
m_fdc->intrq_wr_callback().set(m_ctc, FUNC(z80ctc_device::trg3));
@ -1220,23 +1220,23 @@ MACHINE_CONFIG_START(attache816_state::attache816)
MCFG_PALETTE_ADD_MONOCHROME_HIGHLIGHT("palette")
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("psg", AY8912, 8_MHz_XTAL / 4)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
AY8912(config, m_psg, 8_MHz_XTAL / 4);
m_psg->add_route(ALL_OUTPUTS, "mono", 0.25);
MCFG_DEVICE_ADD("rtc", MSM5832, 32.768_kHz_XTAL)
MSM5832(config, m_rtc, 32.768_kHz_XTAL);
MCFG_DEVICE_ADD("pio", Z80PIO, 8_MHz_XTAL / 2)
MCFG_Z80PIO_IN_PA_CB(READ8(*this, attache_state, pio_portA_r))
MCFG_Z80PIO_OUT_PA_CB(WRITE8(*this, attache_state, pio_portA_w))
MCFG_Z80PIO_IN_PB_CB(READ8(*this, attache_state, pio_portB_r))
MCFG_Z80PIO_OUT_PB_CB(WRITE8(*this, attache_state, pio_portB_w))
Z80PIO(config, m_pio, 8_MHz_XTAL / 2);
m_pio->in_pa_callback().set(FUNC(attache_state::pio_portA_r));
m_pio->out_pa_callback().set(FUNC(attache_state::pio_portA_w));
m_pio->in_pb_callback().set(FUNC(attache_state::pio_portB_r));
m_pio->out_pb_callback().set(FUNC(attache_state::pio_portB_w));
MCFG_DEVICE_ADD("sio", Z80SIO, 8_MHz_XTAL / 2)
MCFG_Z80SIO_OUT_TXDA_CB(WRITELINE("rs232a", rs232_port_device, write_txd))
MCFG_Z80SIO_OUT_RTSA_CB(WRITELINE("rs232a", rs232_port_device, write_rts))
MCFG_Z80SIO_OUT_TXDB_CB(WRITELINE("rs232b", rs232_port_device, write_txd))
MCFG_Z80SIO_OUT_RTSB_CB(WRITELINE("rs232b", rs232_port_device, write_rts))
MCFG_Z80SIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
Z80SIO(config, m_sio, 8_MHz_XTAL / 2);
m_sio->out_txda_callback().set("rs232a", FUNC(rs232_port_device::write_txd));
m_sio->out_rtsa_callback().set("rs232a", FUNC(rs232_port_device::write_rts));
m_sio->out_txdb_callback().set("rs232b", FUNC(rs232_port_device::write_txd));
m_sio->out_rtsb_callback().set("rs232b", FUNC(rs232_port_device::write_rts));
m_sio->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
MCFG_DEVICE_ADD("rs232a", RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE("sio", z80sio_device, rxa_w))
@ -1263,14 +1263,14 @@ MACHINE_CONFIG_START(attache816_state::attache816)
m_ppi->out_pc_callback().set(FUNC(attache816_state::x86_dsr)).bit(0);
m_ppi->out_pc_callback().append(FUNC(attache816_state::ppi_irq)).bit(7).invert();
MCFG_DEVICE_ADD("dma", AM9517A, 8_MHz_XTAL / 4)
MCFG_AM9517A_OUT_HREQ_CB(WRITELINE(*this, attache_state, hreq_w))
MCFG_AM9517A_OUT_EOP_CB(WRITELINE(*this, attache_state, eop_w))
MCFG_AM9517A_IN_MEMR_CB(READ8(*this, attache_state, dma_mem_r))
MCFG_AM9517A_OUT_MEMW_CB(WRITE8(*this, attache_state, dma_mem_w))
MCFG_AM9517A_IN_IOR_0_CB(READ8(*this, attache_state, fdc_dma_r))
MCFG_AM9517A_OUT_IOW_0_CB(WRITE8(*this, attache_state, fdc_dma_w))
// MCFG_AM9517A_OUT_DACK_0_CB(WRITELINE(*this, attache_state, fdc_dack_w))
AM9517A(config, m_dma, 8_MHz_XTAL / 4);
m_dma->out_hreq_callback().set(FUNC(attache_state::hreq_w));
m_dma->out_eop_callback().set(FUNC(attache_state::eop_w));
m_dma->in_memr_callback().set(FUNC(attache_state::dma_mem_r));
m_dma->out_memw_callback().set(FUNC(attache_state::dma_mem_w));
m_dma->in_ior_callback<0>().set(FUNC(attache_state::fdc_dma_r));
m_dma->out_iow_callback<0>().set(FUNC(attache_state::fdc_dma_w));
// m_dma->out_dack_callback<0>().set(FUNC(attache_state::fdc_dack_w));
UPD765A(config, m_fdc, true, true);
m_fdc->intrq_wr_callback().set(m_ctc, FUNC(z80ctc_device::trg3));

15
src/mame/drivers/b16.cpp
View File

@ -21,19 +21,19 @@
#include "screen.h"
class b16_state : public driver_device
{
public:
b16_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
b16_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_vram(*this, "vram"),
m_mc6845(*this, "crtc"),
m_dma8237(*this, "8237dma"),
m_maincpu(*this, "maincpu"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_char_rom(*this, "pcg") { }
m_char_rom(*this, "pcg")
{ }
void b16(machine_config &config);
@ -272,7 +272,6 @@ MACHINE_CONFIG_START(b16_state::b16)
MCFG_DEVICE_PROGRAM_MAP(b16_map)
MCFG_DEVICE_IO_MAP(b16_io)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@ -286,9 +285,9 @@ MACHINE_CONFIG_START(b16_state::b16)
MCFG_MC6845_SHOW_BORDER_AREA(false)
MCFG_MC6845_CHAR_WIDTH(8)
MCFG_DEVICE_ADD(m_dma8237, AM9517A, XTAL(14'318'181)/2)
MCFG_I8237_IN_MEMR_CB(READ8(*this, b16_state, memory_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, b16_state, memory_write_byte))
AM9517A(config, m_dma8237, XTAL(14'318'181)/2);
m_dma8237->in_memr_callback().set(FUNC(b16_state::memory_read_byte));
m_dma8237->out_memw_callback().set(FUNC(b16_state::memory_write_byte));
MCFG_DEVICE_ADD(m_gfxdecode, GFXDECODE, m_palette, gfx_b16)
MCFG_PALETTE_ADD(m_palette, 8)

24
src/mame/drivers/bebox.cpp
View File

@ -162,19 +162,19 @@ MACHINE_CONFIG_START(bebox_state::bebox)
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
MCFG_PIT8253_OUT2_HANDLER(WRITELINE("kbdc", kbdc8042_device, write_out2))
MCFG_DEVICE_ADD( "dma8237_1", AM9517A, XTAL(14'318'181)/3 )
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, bebox_state, bebox_dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, bebox_state, bebox_dma8237_out_eop))
MCFG_I8237_IN_MEMR_CB(READ8(*this, bebox_state, bebox_dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, bebox_state, bebox_dma_write_byte))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, bebox_state, bebox_dma8237_fdc_dack_r))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, bebox_state, bebox_dma8237_fdc_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, bebox_state, pc_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, bebox_state, pc_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, bebox_state, pc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, bebox_state, pc_dack3_w))
AM9517A(config, m_dma8237_1, XTAL(14'318'181)/3);
m_dma8237_1->out_hreq_callback().set(FUNC(bebox_state::bebox_dma_hrq_changed));
m_dma8237_1->out_eop_callback().set(FUNC(bebox_state::bebox_dma8237_out_eop));
m_dma8237_1->in_memr_callback().set(FUNC(bebox_state::bebox_dma_read_byte));
m_dma8237_1->out_memw_callback().set(FUNC(bebox_state::bebox_dma_write_byte));
m_dma8237_1->in_ior_callback<2>().set(FUNC(bebox_state::bebox_dma8237_fdc_dack_r));
m_dma8237_1->out_iow_callback<2>().set(FUNC(bebox_state::bebox_dma8237_fdc_dack_w));
m_dma8237_1->out_dack_callback<0>().set(FUNC(bebox_state::pc_dack0_w));
m_dma8237_1->out_dack_callback<1>().set(FUNC(bebox_state::pc_dack1_w));
m_dma8237_1->out_dack_callback<2>().set(FUNC(bebox_state::pc_dack2_w));
m_dma8237_1->out_dack_callback<3>().set(FUNC(bebox_state::pc_dack3_w));
MCFG_DEVICE_ADD( "dma8237_2", AM9517A, XTAL(14'318'181)/3 )
AM9517A(config, m_dma8237_2, XTAL(14'318'181)/3);
PIC8259(config, m_pic8259_1, 0);
m_pic8259_1->out_int_callback().set(FUNC(bebox_state::bebox_pic8259_master_set_int_line));

10
src/mame/drivers/beezer.cpp
View File

@ -46,8 +46,8 @@
class beezer_state : public driver_device
{
public:
beezer_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
beezer_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_sysbank(*this, "sysbank"),
m_banked_roms(*this, "banked"),
@ -527,9 +527,9 @@ MACHINE_CONFIG_START(beezer_state::beezer)
MCFG_PTM6840_IRQ_CB(WRITELINE("audio_irqs", input_merger_device, in_w<1>))
// schematics show an input labeled VCO to channel 2, but the source is unknown
MCFG_MM5837_ADD("noise")
MCFG_MM5837_VDD(12)
MCFG_MM5837_OUTPUT_CB(WRITELINE(*this, beezer_state, noise_w))
mm5837_device &noise(MM5837(config, "noise"));
noise.set_vdd_voltage(12);
noise.output_callback().set(FUNC(beezer_state::noise_w));
SPEAKER(config, "speaker").front_center();
MCFG_DEVICE_ADD("dac", DAC76, 0)

20
src/mame/drivers/duet16.cpp
View File

@ -358,18 +358,18 @@ MACHINE_CONFIG_START(duet16_state::duet16)
MCFG_DEVICE_IO_MAP(duet16_io)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("pic", pic8259_device, inta_cb)
MCFG_DEVICE_ADD("i8741", I8741, 20_MHz_XTAL / 4)
I8741(config, "i8741", 20_MHz_XTAL / 4);
MCFG_DEVICE_ADD("pic", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
PIC8259(config, m_pic, 0);
m_pic->out_int_callback().set_inputline(m_maincpu, 0);
MCFG_DEVICE_ADD("dmac", AM9517A, 20_MHz_XTAL / 4)
MCFG_AM9517A_OUT_HREQ_CB(WRITELINE(*this, duet16_state, hrq_w))
MCFG_AM9517A_IN_MEMR_CB(READ8(*this, duet16_state, dma_mem_r))
MCFG_AM9517A_OUT_MEMW_CB(WRITE8(*this, duet16_state, dma_mem_w))
MCFG_AM9517A_IN_IOR_0_CB(READ8("fdc", upd765a_device, mdma_r))
MCFG_AM9517A_OUT_IOW_0_CB(WRITE8("fdc", upd765a_device, mdma_w))
MCFG_AM9517A_OUT_EOP_CB(WRITELINE("fdc", upd765a_device, tc_line_w))
AM9517A(config, m_dmac, 20_MHz_XTAL / 4);
m_dmac->out_hreq_callback().set(FUNC(duet16_state::hrq_w));
m_dmac->in_memr_callback().set(FUNC(duet16_state::dma_mem_r));
m_dmac->out_memw_callback().set(FUNC(duet16_state::dma_mem_w));
m_dmac->in_ior_callback<0>().set(m_fdc, FUNC(upd765a_device::mdma_r));
m_dmac->out_iow_callback<0>().set(m_fdc, FUNC(upd765a_device::mdma_w));
m_dmac->out_eop_callback().set(m_fdc, FUNC(upd765a_device::tc_line_w));
pit8253_device &bgpit(PIT8253(config, "bgpit", 0));
bgpit.set_clk<0>(8_MHz_XTAL / 13);

26
src/mame/drivers/fruitpc.cpp
View File

@ -29,20 +29,14 @@ public:
fruitpc_state(const machine_config &mconfig, device_type type, const char *tag)
: pcat_base_state(mconfig, type, tag)
, m_isabus(*this, "isa")
, m_inp1(*this, "INP1")
, m_inp2(*this, "INP2")
, m_inp3(*this, "INP3")
, m_inp4(*this, "INP4")
, m_inp(*this, "INP%u", 1U)
{ }
void fruitpc(machine_config &config);
private:
required_device<isa8_device> m_isabus;
required_ioport m_inp1;
required_ioport m_inp2;
required_ioport m_inp3;
required_ioport m_inp4;
required_ioport_array<4> m_inp;
DECLARE_READ8_MEMBER(fruit_inp_r);
DECLARE_WRITE8_MEMBER(dma8237_1_dack_w);
@ -53,18 +47,7 @@ private:
READ8_MEMBER(fruitpc_state::fruit_inp_r)
{
switch(offset)
{
case 0:
return m_inp1->read();
case 1:
return m_inp2->read();
case 2:
return m_inp3->read();
case 3:
return m_inp4->read();
}
return 0;
return m_inp[offset & 0x03]->read();
}
void fruitpc_state::fruitpc_map(address_map &map)
@ -146,8 +129,7 @@ MACHINE_CONFIG_START(fruitpc_state::fruitpc)
/* video hardware */
pcvideo_vga(config);
MCFG_DEVICE_MODIFY("dma8237_1")
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, fruitpc_state, dma8237_1_dack_w))
m_dma8237_1->out_iow_callback<1>().set(FUNC(fruitpc_state::dma8237_1_dack_w));
MCFG_DEVICE_ADD("isa", ISA8, 0)
MCFG_ISA8_CPU("maincpu")

63
src/mame/drivers/isbc.cpp
View File

@ -328,13 +328,13 @@ WRITE_LINE_MEMBER(isbc_state::bus_intr_out2_w)
MACHINE_CONFIG_START(isbc_state::isbc86)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", I8086, XTAL(5'000'000))
MCFG_DEVICE_ADD(m_maincpu, I8086, XTAL(5'000'000))
MCFG_DEVICE_PROGRAM_MAP(isbc86_mem)
MCFG_DEVICE_IO_MAP(isbc_io)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("pic_0", pic8259_device, inta_cb)
MCFG_DEVICE_ADD("pic_0", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
PIC8259(config, m_pic_0, 0);
m_pic_0->out_int_callback().set_inputline(m_maincpu, 0);
MCFG_DEVICE_ADD("pit", PIT8253, 0)
MCFG_PIT8253_CLK0(XTAL(22'118'400)/18)
@ -361,13 +361,13 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(isbc_state::rpc86)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", I8086, XTAL(5'000'000))
MCFG_DEVICE_ADD(m_maincpu, I8086, XTAL(5'000'000))
MCFG_DEVICE_PROGRAM_MAP(rpc86_mem)
MCFG_DEVICE_IO_MAP(rpc86_io)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("pic_0", pic8259_device, inta_cb)
MCFG_DEVICE_ADD("pic_0", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
PIC8259(config, m_pic_0, 0);
m_pic_0->out_int_callback().set_inputline(m_maincpu, 0);
MCFG_DEVICE_ADD("pit", PIT8253, 0)
MCFG_PIT8253_CLK0(XTAL(22'118'400)/18)
@ -400,22 +400,22 @@ MACHINE_CONFIG_START(isbc_state::rpc86)
//MCFG_ISBX_SLOT_MINTR1_CALLBACK(WRITELINE("pic_0", pic8259_device, ir6_w))
MACHINE_CONFIG_END
MACHINE_CONFIG_START(isbc_state::isbc8605)
void isbc_state::isbc8605(machine_config &config)
{
rpc86(config);
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_IO_MAP(isbc8605_io)
MCFG_DEVICE_ADD("isbc_208", ISBC_208, "maincpu")
MCFG_ISBC_208_IRQ(WRITELINE("pic_0", pic8259_device, ir5_w))
MACHINE_CONFIG_END
m_maincpu->set_addrmap(AS_IO, &isbc_state::isbc8605_io);
MACHINE_CONFIG_START(isbc_state::isbc8630)
ISBC_208(config, "isbc_208", 0, m_maincpu).irq_callback().set(m_pic_0, FUNC(pic8259_device::ir5_w));
}
void isbc_state::isbc8630(machine_config &config)
{
rpc86(config);
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_IO_MAP(isbc8630_io)
MCFG_DEVICE_ADD("isbc_215g", ISBC_215G, 0x100, "maincpu")
MCFG_ISBC_215_IRQ(WRITELINE("pic_0", pic8259_device, ir5_w))
m_maincpu->set_addrmap(AS_IO, &isbc_state::isbc8630_io);
ISBC_215G(config, "isbc_215g", 0, 0x100, m_maincpu).irq_callback().set(m_pic_0, FUNC(pic8259_device::ir5_w));
LS259(config, m_statuslatch); // U14
// m_statuslatch->q_out_cb<0>().set("pit", FUNC(pit8253_device::write_gate0));
@ -427,23 +427,23 @@ MACHINE_CONFIG_START(isbc_state::isbc8630)
m_statuslatch->q_out_cb<5>().append_output("led0").invert(); // ds1
m_statuslatch->q_out_cb<6>().set_output("led1").invert(); // ds3
m_statuslatch->q_out_cb<7>().set([this] (int state) { m_megabyte_enable = !state; });
MACHINE_CONFIG_END
}
MACHINE_CONFIG_START(isbc_state::isbc286)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu", I80286, XTAL(16'000'000)/2)
MCFG_DEVICE_ADD(m_maincpu, I80286, XTAL(16'000'000)/2)
MCFG_DEVICE_PROGRAM_MAP(isbc286_mem)
MCFG_DEVICE_IO_MAP(isbc286_io)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("pic_0", pic8259_device, inta_cb)
MCFG_DEVICE_ADD("pic_0", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, isbc_state, get_slave_ack))
PIC8259(config, m_pic_0, 0);
m_pic_0->out_int_callback().set_inputline(m_maincpu, 0);
m_pic_0->in_sp_callback().set_constant(1);
m_pic_0->read_slave_ack_callback().set(FUNC(isbc_state::get_slave_ack));
MCFG_DEVICE_ADD("pic_1", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("pic_0", pic8259_device, ir7_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_pic_1, 0);
m_pic_1->out_int_callback().set(m_pic_0, FUNC(pic8259_device::ir7_w));
m_pic_1->in_sp_callback().set_constant(0);
MCFG_DEVICE_ADD("pit", PIT8254, 0)
MCFG_PIT8253_CLK0(XTAL(22'118'400)/18)
@ -519,15 +519,14 @@ MACHINE_CONFIG_START(isbc_state::isbc286)
MCFG_ISBX_SLOT_MINTR0_CALLBACK(WRITELINE("pic_1", pic8259_device, ir5_w))
MCFG_ISBX_SLOT_MINTR1_CALLBACK(WRITELINE("pic_1", pic8259_device, ir6_w))
MCFG_DEVICE_ADD("isbc_215g", ISBC_215G, 0x100, "maincpu")
MCFG_ISBC_215_IRQ(WRITELINE("pic_0", pic8259_device, ir5_w))
ISBC_215G(config, "isbc_215g", 0, 0x100, m_maincpu).irq_callback().set(m_pic_0, FUNC(pic8259_device::ir5_w));
MACHINE_CONFIG_END
MACHINE_CONFIG_START(isbc_state::isbc2861)
void isbc_state::isbc2861(machine_config &config)
{
isbc286(config);
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_PROGRAM_MAP(isbc2861_mem)
MACHINE_CONFIG_END
m_maincpu->set_addrmap(AS_PROGRAM, &isbc_state::isbc2861_mem);
}
/* ROM definition */
ROM_START( isbc86 )

6
src/mame/drivers/m24.cpp
View File

@ -294,10 +294,8 @@ MACHINE_CONFIG_START(m24_state::olivetti)
MCFG_DEVICE_ADD("z8000_apb", M24_Z8000, 0)
MCFG_M24_Z8000_HALT(WRITELINE(*this, m24_state, halt_i86_w))
MCFG_DEVICE_MODIFY("mb:dma8237")
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, m24_state, dma_hrq_w))
MCFG_DEVICE_MODIFY("mb:pic8259")
downcast<pic8259_device &>(*device).set_out_int_callback(DEVCB_WRITELINE(*this, m24_state, int_w));
subdevice<am9517a_device>("mb:dma8237")->out_hreq_callback().set(FUNC(m24_state::dma_hrq_w));
subdevice<pic8259_device>("mb:pic8259")->out_int_callback().set(FUNC(m24_state::int_w));
/* software lists */
MCFG_SOFTWARE_LIST_ADD("disk_list","ibm5150")

12
src/mame/drivers/magtouch.cpp
View File

@ -89,10 +89,11 @@ class magtouch_state : public pcat_base_state
{
public:
magtouch_state(const machine_config &mconfig, device_type type, const char *tag)
: pcat_base_state(mconfig, type, tag),
m_isabus(*this, "isa"),
m_rombank(*this, "rombank"),
m_in0(*this, "IN0"){ }
: pcat_base_state(mconfig, type, tag)
, m_isabus(*this, "isa")
, m_rombank(*this, "rombank")
, m_in0(*this, "IN0")
{ }
void magtouch(machine_config &config);
@ -211,8 +212,7 @@ MACHINE_CONFIG_START(magtouch_state::magtouch)
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEVICE_MODIFY("dma8237_1")
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, magtouch_state, dma8237_1_dack_w))
m_dma8237_1->out_iow_callback<1>().set(FUNC(magtouch_state::dma8237_1_dack_w));
MCFG_DEVICE_ADD("isa", ISA8, 0)
MCFG_ISA8_CPU("maincpu")

42
src/mame/drivers/mikromik.cpp
View File

@ -466,29 +466,29 @@ MACHINE_CONFIG_START(mm1_state::mm1)
MCFG_QUANTUM_PERFECT_CPU(I8085A_TAG)
// peripheral hardware
MCFG_DEVICE_ADD(I8212_TAG, I8212, 0)
MCFG_I8212_INT_CALLBACK(INPUTLINE(I8085A_TAG, I8085_RST65_LINE))
MCFG_I8212_DI_CALLBACK(READ8(KB_TAG, mm1_keyboard_device, read))
I8212(config, m_iop, 0);
m_iop->int_wr_callback().set_inputline(m_maincpu, I8085_RST65_LINE);
m_iop->di_rd_callback().set(KB_TAG, FUNC(mm1_keyboard_device::read));
MCFG_DEVICE_ADD(I8237_TAG, AM9517A, 6.144_MHz_XTAL/2)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, mm1_state, dma_hrq_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, mm1_state, dma_eop_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, mm1_state, read))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, mm1_state, write))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, mm1_state, mpsc_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(UPD765_TAG, upd765_family_device, mdma_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(I8275_TAG, i8275_device, dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, mm1_state, mpsc_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(UPD765_TAG, upd765_family_device, mdma_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, mm1_state, dack3_w))
AM9517A(config, m_dmac, 6.144_MHz_XTAL/2);
m_dmac->out_hreq_callback().set(FUNC(mm1_state::dma_hrq_w));
m_dmac->out_eop_callback().set(FUNC(mm1_state::dma_eop_w));
m_dmac->in_memr_callback().set(FUNC(mm1_state::read));
m_dmac->out_memw_callback().set(FUNC(mm1_state::write));
m_dmac->in_ior_callback<2>().set(FUNC(mm1_state::mpsc_dack_r));
m_dmac->in_ior_callback<3>().set(m_fdc, FUNC(upd765_family_device::mdma_r));
m_dmac->out_iow_callback<0>().set(m_crtc, FUNC(i8275_device::dack_w));
m_dmac->out_iow_callback<1>().set(FUNC(mm1_state::mpsc_dack_w));
m_dmac->out_iow_callback<3>().set(m_fdc, FUNC(upd765_family_device::mdma_w));
m_dmac->out_dack_callback<3>().set(FUNC(mm1_state::dack3_w));
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
MCFG_PIT8253_CLK0(6.144_MHz_XTAL/2/2)
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(*this, mm1_state, itxc_w))
MCFG_PIT8253_CLK1(6.144_MHz_XTAL/2/2)
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, mm1_state, irxc_w))
MCFG_PIT8253_CLK2(6.144_MHz_XTAL/2/2)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, mm1_state, auxc_w))
PIT8253(config, m_pit, 0);
m_pit->set_clk<0>(6.144_MHz_XTAL/2/2);
m_pit->out_handler<0>().set(FUNC(mm1_state::itxc_w));
m_pit->set_clk<1>(6.144_MHz_XTAL/2/2);
m_pit->out_handler<1>().set(FUNC(mm1_state::irxc_w));
m_pit->set_clk<2>(6.144_MHz_XTAL/2/2);
m_pit->out_handler<2>().set(FUNC(mm1_state::auxc_w));
MCFG_UPD765A_ADD(UPD765_TAG, /* 16_MHz_XTAL/2/2 */ true, true)
MCFG_UPD765_INTRQ_CALLBACK(INPUTLINE(I8085A_TAG, I8085_RST55_LINE))

33
src/mame/drivers/mtouchxl.cpp
View File

@ -52,15 +52,15 @@
class mtxl_state : public driver_device
{
public:
mtxl_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
mtxl_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
#ifndef REAL_PCI_CHIPSET
m_mb(*this, "mb"),
m_mb(*this, "mb"),
#endif
m_ram(*this, RAM_TAG),
m_iocard(*this, "dbank"),
m_multikey(*this, "multikey")
m_ram(*this, RAM_TAG),
m_iocard(*this, "dbank"),
m_multikey(*this, "multikey")
{ }
void at486(machine_config &config);
@ -110,19 +110,19 @@ WRITE8_MEMBER(mtxl_state::key_w)
void mtxl_state::at32_map(address_map &map)
{
map.unmap_value_high();
#ifndef REAL_PCI_CHIPSET
#ifndef REAL_PCI_CHIPSET
map(0x00000000, 0x0009ffff).bankrw("bank10");
map(0x000c8000, 0x000cffff).ram().share("nvram");
map(0x000d0000, 0x000dffff).m(m_iocard, FUNC(address_map_bank_device::amap32));
map(0x000e0000, 0x000fffff).rom().region("bios", 0);
map(0xfffe0000, 0xffffffff).rom().region("bios", 0);
#endif
#endif
}
void mtxl_state::at32_io(address_map &map)
{
map.unmap_value_high();
#ifndef REAL_PCI_CHIPSET
#ifndef REAL_PCI_CHIPSET
map(0x0000, 0x001f).rw("mb:dma8237_1", FUNC(am9517a_device::read), FUNC(am9517a_device::write));
map(0x0020, 0x003f).rw("mb:pic8259_master", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
map(0x0040, 0x005f).rw("mb:pit8254", FUNC(pit8254_device::read), FUNC(pit8254_device::write));
@ -133,14 +133,14 @@ void mtxl_state::at32_io(address_map &map)
map(0x00a0, 0x00bf).rw("mb:pic8259_slave", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
map(0x00c0, 0x00df).rw("mb:dma8237_2", FUNC(am9517a_device::read), FUNC(am9517a_device::write)).umask32(0x00ff00ff);
map(0x0224, 0x0227).rw("cs4231", FUNC(ad1848_device::read), FUNC(ad1848_device::write));
#endif
#endif
map(0x0228, 0x022b).portr("Unknown");
map(0x022f, 0x022f).w(FUNC(mtxl_state::bank_w));
map(0x022d, 0x022d).rw(FUNC(mtxl_state::key_r), FUNC(mtxl_state::key_w));
map(0x022c, 0x022c).r(FUNC(mtxl_state::coin_r));
#ifndef REAL_PCI_CHIPSET
#ifndef REAL_PCI_CHIPSET
map(0x03f8, 0x03ff).rw("ns16550", FUNC(ns16550_device::ins8250_r), FUNC(ns16550_device::ins8250_w));
#endif
#endif
}
void mtxl_state::dbank_map(address_map &map)
@ -208,11 +208,11 @@ void mtxl_state::cdrom(device_t *device)
auto ide1 = dynamic_cast<device_slot_interface *>(device->subdevice("ide:1"));
ide1->set_default_option("");
ide1->set_fixed(true);
MACHINE_CONFIG_END
}
#endif
MACHINE_CONFIG_START(mtxl_state::at486)
MCFG_DEVICE_ADD("maincpu", I486DX4, 33000000)
MCFG_DEVICE_ADD(m_maincpu, I486DX4, 33000000)
MCFG_DEVICE_PROGRAM_MAP(at32_map)
MCFG_DEVICE_IO_MAP(at32_io)
#ifndef REAL_PCI_CHIPSET
@ -235,8 +235,7 @@ MACHINE_CONFIG_START(mtxl_state::at486)
MCFG_AD1848_IRQ_CALLBACK(WRITELINE("mb:pic8259_master", pic8259_device, ir5_w))
MCFG_AD1848_DRQ_CALLBACK(WRITELINE("mb:dma8237_1", am9517a_device, dreq1_w))
MCFG_DEVICE_MODIFY("mb:dma8237_1")
MCFG_I8237_OUT_IOW_1_CB(WRITE8("cs4231", ad1848_device, dack_w))
subdevice<am9517a_device>("mb:dma8237_1")->out_iow_callback<1>().set("cs4231", FUNC(ad1848_device::dack_w));
// remove the keyboard controller and use the HLE one which allow keys to be unmapped
MCFG_DEVICE_REMOVE("mb:keybc");

175
src/mame/drivers/ngen.cpp
View File

@ -82,8 +82,8 @@
class ngen_state : public driver_device
{
public:
ngen_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
ngen_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this,"maincpu"),
m_i386cpu(*this,"i386cpu"),
m_crtc(*this,"crtc"),
@ -99,10 +99,12 @@ public:
m_hdc(*this,"hdc"),
m_hdc_timer(*this,"hdc_timer"),
m_hd_buffer(*this,"hd_buffer_ram")
{}
{
}
void ngen(machine_config &config);
protected:
DECLARE_READ8_MEMBER(hd_buffer_r);
DECLARE_WRITE8_MEMBER(hd_buffer_w);
@ -123,10 +125,10 @@ public:
DECLARE_READ8_MEMBER( dma_1_dack_r ) { uint16_t ret = 0xffff; m_dma_high_byte = ret & 0xff00; return ret; }
DECLARE_READ8_MEMBER( dma_2_dack_r ) { uint16_t ret = 0xffff; m_dma_high_byte = ret & 0xff00; return ret; }
DECLARE_READ8_MEMBER( dma_3_dack_r );
DECLARE_WRITE8_MEMBER( dma_0_dack_w ){ popmessage("IOW0: data %02x",data); }
DECLARE_WRITE8_MEMBER( dma_1_dack_w ){ }
DECLARE_WRITE8_MEMBER( dma_2_dack_w ){ }
DECLARE_WRITE8_MEMBER( dma_3_dack_w ){ popmessage("IOW3: data %02x",data); }
DECLARE_WRITE8_MEMBER( dma_0_dack_w ) { popmessage("IOW0: data %02x",data); }
DECLARE_WRITE8_MEMBER( dma_1_dack_w ) { }
DECLARE_WRITE8_MEMBER( dma_2_dack_w ) { }
DECLARE_WRITE8_MEMBER( dma_3_dack_w ) { popmessage("IOW3: data %02x",data); }
MC6845_UPDATE_ROW(crtc_update_row);
@ -134,11 +136,18 @@ public:
DECLARE_WRITE_LINE_MEMBER(fdc_irq_w);
protected:
void ngen386_io(address_map &map);
void ngen386_mem(address_map &map);
void ngen386i_mem(address_map &map);
optional_device<i80186_cpu_device> m_maincpu;
optional_device<i386_device> m_i386cpu;
required_device<mc6845_device> m_crtc;
required_device<i8251_device> m_viduart;
required_device<upd7201_device> m_iouart;
required_device<am9517a_device> m_dmac;
required_device<pic8259_device> m_pic;
required_device<pit8254_device> m_pit;
private:
DECLARE_WRITE16_MEMBER(cpu_peripheral_cb);
@ -167,14 +176,6 @@ private:
virtual void machine_reset() override;
virtual void machine_start() override;
optional_device<i80186_cpu_device> m_maincpu;
optional_device<i386_device> m_i386cpu;
required_device<mc6845_device> m_crtc;
required_device<i8251_device> m_viduart;
required_device<upd7201_device> m_iouart;
required_device<am9517a_device> m_dmac;
required_device<pic8259_device> m_pic;
required_device<pit8254_device> m_pit;
optional_memory_region m_disk_rom;
memory_array m_vram;
memory_array m_fontram;
@ -946,43 +947,43 @@ MACHINE_CONFIG_START(ngen_state::ngen)
MCFG_80186_TMROUT0_HANDLER(WRITELINE(*this, ngen_state, cpu_timer_w))
MCFG_80186_IRQ_SLAVE_ACK(READ8(*this, ngen_state, irq_cb))
MCFG_DEVICE_ADD("pic", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("maincpu", i80186_cpu_device, int0_w))
PIC8259(config, m_pic, 0);
m_pic->out_int_callback().set(m_maincpu, FUNC(i80186_cpu_device::int0_w));
MCFG_DEVICE_ADD("pit", PIT8254, 0)
MCFG_PIT8253_CLK0(78120/4) // 19.53kHz, /4 of the CPU timer output?
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(*this, ngen_state, pit_out0_w)) // RS232 channel B baud rate
MCFG_PIT8253_CLK1(14.7456_MHz_XTAL / 12) // correct? - based on patent
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, ngen_state, pit_out1_w)) // RS232 channel A baud rate
MCFG_PIT8253_CLK2(14.7456_MHz_XTAL / 12)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, ngen_state, pit_out2_w))
PIT8254(config, m_pit, 0);
m_pit->set_clk<0>(78120/4); // 19.53kHz, /4 of the CPU timer output?
m_pit->out_handler<0>().set(FUNC(ngen_state::pit_out0_w)); // RS232 channel B baud rate
m_pit->set_clk<1>(14.7456_MHz_XTAL / 12); // correct? - based on patent
m_pit->out_handler<1>().set(FUNC(ngen_state::pit_out1_w)); // RS232 channel A baud rate
m_pit->set_clk<2>(14.7456_MHz_XTAL / 12);
m_pit->out_handler<2>().set(FUNC(ngen_state::pit_out2_w));
MCFG_DEVICE_ADD("dmac", AM9517A, 14.7456_MHz_XTAL / 3) // NEC D8237A, divisor unknown
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, ngen_state, dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, ngen_state, dma_eop_changed))
MCFG_I8237_IN_MEMR_CB(READ8(*this, ngen_state, dma_read_word)) // DMA is always 16-bit
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, ngen_state, dma_write_word))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, ngen_state, dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, ngen_state, dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, ngen_state, dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, ngen_state, dack3_w))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, ngen_state, dma_0_dack_r))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, ngen_state, dma_1_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, ngen_state, dma_2_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, ngen_state, dma_3_dack_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, ngen_state, dma_0_dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, ngen_state, dma_1_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, ngen_state, dma_2_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, ngen_state, dma_3_dack_w))
AM9517A(config, m_dmac, 14.7456_MHz_XTAL / 3); // NEC D8237A, divisor unknown
m_dmac->out_hreq_callback().set(FUNC(ngen_state::dma_hrq_changed));
m_dmac->out_eop_callback().set(FUNC(ngen_state::dma_eop_changed));
m_dmac->in_memr_callback().set(FUNC(ngen_state::dma_read_word)); // DMA is always 16-bit
m_dmac->out_memw_callback().set(FUNC(ngen_state::dma_write_word));
m_dmac->out_dack_callback<0>().set(FUNC(ngen_state::dack0_w));
m_dmac->out_dack_callback<1>().set(FUNC(ngen_state::dack1_w));
m_dmac->out_dack_callback<2>().set(FUNC(ngen_state::dack2_w));
m_dmac->out_dack_callback<3>().set(FUNC(ngen_state::dack3_w));
m_dmac->in_ior_callback<0>().set(FUNC(ngen_state::dma_0_dack_r));
m_dmac->in_ior_callback<1>().set(FUNC(ngen_state::dma_1_dack_r));
m_dmac->in_ior_callback<2>().set(FUNC(ngen_state::dma_2_dack_r));
m_dmac->in_ior_callback<3>().set(FUNC(ngen_state::dma_3_dack_r));
m_dmac->out_iow_callback<0>().set(FUNC(ngen_state::dma_0_dack_w));
m_dmac->out_iow_callback<1>().set(FUNC(ngen_state::dma_1_dack_w));
m_dmac->out_iow_callback<2>().set(FUNC(ngen_state::dma_2_dack_w));
m_dmac->out_iow_callback<3>().set(FUNC(ngen_state::dma_3_dack_w));
// I/O board
MCFG_DEVICE_ADD("iouart", UPD7201, 0) // clocked by PIT channel 2?
MCFG_Z80DART_OUT_TXDA_CB(WRITELINE("rs232_a", rs232_port_device, write_txd))
MCFG_Z80DART_OUT_TXDB_CB(WRITELINE("rs232_b", rs232_port_device, write_txd))
MCFG_Z80DART_OUT_DTRA_CB(WRITELINE("rs232_a", rs232_port_device, write_dtr))
MCFG_Z80DART_OUT_DTRB_CB(WRITELINE("rs232_b", rs232_port_device, write_dtr))
MCFG_Z80DART_OUT_RTSA_CB(WRITELINE("rs232_a", rs232_port_device, write_rts))
MCFG_Z80DART_OUT_RTSB_CB(WRITELINE("rs232_b", rs232_port_device, write_rts))
UPD7201(config, m_iouart, 0); // clocked by PIT channel 2?
m_iouart->out_txda_callback().set("rs232_a", FUNC(rs232_port_device::write_txd));
m_iouart->out_txdb_callback().set("rs232_b", FUNC(rs232_port_device::write_txd));
m_iouart->out_dtra_callback().set("rs232_a", FUNC(rs232_port_device::write_dtr));
m_iouart->out_dtrb_callback().set("rs232_b", FUNC(rs232_port_device::write_dtr));
m_iouart->out_rtsa_callback().set("rs232_a", FUNC(rs232_port_device::write_rts));
m_iouart->out_rtsb_callback().set("rs232_b", FUNC(rs232_port_device::write_rts));
MCFG_DEVICE_ADD("rs232_a", RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE("iouart", upd7201_device, rxa_w))
@ -1057,43 +1058,43 @@ MACHINE_CONFIG_START(ngen386_state::ngen386)
MCFG_DEVICE_IO_MAP(ngen386_io)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("pic", pic8259_device, inta_cb)
MCFG_DEVICE_ADD("pic", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("i386cpu", 0))
PIC8259(config, m_pic, 0);
m_pic->out_int_callback().set_inputline(m_i386cpu, 0);
MCFG_DEVICE_ADD("pit", PIT8254, 0)
MCFG_PIT8253_CLK0(78120/4) // 19.53kHz, /4 of the CPU timer output?
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(*this, ngen_state, pit_out0_w)) // RS232 channel B baud rate
MCFG_PIT8253_CLK1(14.7456_MHz_XTAL / 12) // correct? - based on patent
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, ngen_state, pit_out1_w)) // RS232 channel A baud rate
MCFG_PIT8253_CLK2(14.7456_MHz_XTAL / 12)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, ngen_state, pit_out2_w))
PIT8254(config, m_pit, 0);
m_pit->set_clk<0>(78120/4); // 19.53kHz, /4 of the CPU timer output?
m_pit->out_handler<0>().set(FUNC(ngen386_state::pit_out0_w)); // RS232 channel B baud rate
m_pit->set_clk<1>(14.7456_MHz_XTAL / 12); // correct? - based on patent
m_pit->out_handler<1>().set(FUNC(ngen386_state::pit_out1_w)); // RS232 channel A baud rate
m_pit->set_clk<2>(14.7456_MHz_XTAL / 12);
m_pit->out_handler<2>().set(FUNC(ngen386_state::pit_out2_w));
MCFG_DEVICE_ADD("dmac", AM9517A, 14.7456_MHz_XTAL / 3) // NEC D8237A, divisor unknown
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, ngen_state, dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, ngen_state, dma_eop_changed))
MCFG_I8237_IN_MEMR_CB(READ8(*this, ngen_state, dma_read_word)) // DMA is always 16-bit
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, ngen_state, dma_write_word))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, ngen_state, dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, ngen_state, dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, ngen_state, dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, ngen_state, dack3_w))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, ngen_state, dma_0_dack_r))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, ngen_state, dma_1_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, ngen_state, dma_2_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, ngen_state, dma_3_dack_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, ngen_state, dma_0_dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, ngen_state, dma_1_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, ngen_state, dma_2_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, ngen_state, dma_3_dack_w))
AM9517A(config, m_dmac, 14.7456_MHz_XTAL / 3); // NEC D8237A, divisor unknown
m_dmac->out_hreq_callback().set(FUNC(ngen386_state::dma_hrq_changed));
m_dmac->out_eop_callback().set(FUNC(ngen386_state::dma_eop_changed));
m_dmac->in_memr_callback().set(FUNC(ngen386_state::dma_read_word)); // DMA is always 16-bit
m_dmac->out_memw_callback().set(FUNC(ngen386_state::dma_write_word));
m_dmac->out_dack_callback<0>().set(FUNC(ngen386_state::dack0_w));
m_dmac->out_dack_callback<1>().set(FUNC(ngen386_state::dack1_w));
m_dmac->out_dack_callback<2>().set(FUNC(ngen386_state::dack2_w));
m_dmac->out_dack_callback<3>().set(FUNC(ngen386_state::dack3_w));
m_dmac->in_ior_callback<0>().set(FUNC(ngen386_state::dma_0_dack_r));
m_dmac->in_ior_callback<1>().set(FUNC(ngen386_state::dma_1_dack_r));
m_dmac->in_ior_callback<2>().set(FUNC(ngen386_state::dma_2_dack_r));
m_dmac->in_ior_callback<3>().set(FUNC(ngen386_state::dma_3_dack_r));
m_dmac->out_iow_callback<0>().set(FUNC(ngen386_state::dma_0_dack_w));
m_dmac->out_iow_callback<1>().set(FUNC(ngen386_state::dma_1_dack_w));
m_dmac->out_iow_callback<2>().set(FUNC(ngen386_state::dma_2_dack_w));
m_dmac->out_iow_callback<3>().set(FUNC(ngen386_state::dma_3_dack_w));
// I/O board
MCFG_DEVICE_ADD("iouart", UPD7201, 0) // clocked by PIT channel 2?
MCFG_Z80DART_OUT_TXDA_CB(WRITELINE("rs232_a", rs232_port_device, write_txd))
MCFG_Z80DART_OUT_TXDB_CB(WRITELINE("rs232_b", rs232_port_device, write_txd))
MCFG_Z80DART_OUT_DTRA_CB(WRITELINE("rs232_a", rs232_port_device, write_dtr))
MCFG_Z80DART_OUT_DTRB_CB(WRITELINE("rs232_b", rs232_port_device, write_dtr))
MCFG_Z80DART_OUT_RTSA_CB(WRITELINE("rs232_a", rs232_port_device, write_rts))
MCFG_Z80DART_OUT_RTSB_CB(WRITELINE("rs232_b", rs232_port_device, write_rts))
UPD7201(config, m_iouart, 0); // clocked by PIT channel 2?
m_iouart->out_txda_callback().set("rs232_a", FUNC(rs232_port_device::write_txd));
m_iouart->out_txdb_callback().set("rs232_b", FUNC(rs232_port_device::write_txd));
m_iouart->out_dtra_callback().set("rs232_a", FUNC(rs232_port_device::write_dtr));
m_iouart->out_dtrb_callback().set("rs232_b", FUNC(rs232_port_device::write_dtr));
m_iouart->out_rtsa_callback().set("rs232_a", FUNC(rs232_port_device::write_rts));
m_iouart->out_rtsb_callback().set("rs232_b", FUNC(rs232_port_device::write_rts));
MCFG_DEVICE_ADD("rs232_a", RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE("iouart", upd7201_device, rxa_w))
@ -1119,7 +1120,7 @@ MACHINE_CONFIG_START(ngen386_state::ngen386)
MCFG_MC6845_ADD("crtc", MC6845, nullptr, 19980000 / 9) // divisor unknown -- /9 gives 60Hz output, so likely correct
MCFG_MC6845_SHOW_BORDER_AREA(false)
MCFG_MC6845_CHAR_WIDTH(9)
MCFG_MC6845_UPDATE_ROW_CB(ngen_state, crtc_update_row)
MCFG_MC6845_UPDATE_ROW_CB(ngen386_state, crtc_update_row)
MCFG_VIDEO_SET_SCREEN("screen")
// keyboard UART (patent says i8251 is used for keyboard communications, it is located on the video board)
@ -1130,11 +1131,11 @@ MACHINE_CONFIG_START(ngen386_state::ngen386)
MCFG_RS232_RXD_HANDLER(WRITELINE("videouart", i8251_device, write_rxd))
MCFG_DEVICE_ADD("refresh_clock", CLOCK, 19200*16) // should be 19530Hz
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(*this, ngen_state,timer_clk_out))
MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(*this, ngen386_state,timer_clk_out))
// floppy disk / hard disk module (WD2797 FDC, WD1010 HDC, plus an 8253 timer for each)
MCFG_DEVICE_ADD("fdc", WD2797, 20_MHz_XTAL / 20)
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(*this, ngen_state,fdc_irq_w))
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(*this, ngen386_state,fdc_irq_w))
// MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE("i386cpu",i80186_cpu_device,drq1_w))
MCFG_WD_FDC_FORCE_READY
MCFG_DEVICE_ADD("fdc_timer", PIT8253, 0)
@ -1148,8 +1149,8 @@ MACHINE_CONFIG_START(ngen386_state::ngen386)
// TODO: WD1010 HDC (not implemented), use WD2010 for now
MCFG_DEVICE_ADD("hdc", WD2010, 20_MHz_XTAL / 4)
MCFG_WD2010_OUT_INTRQ_CB(WRITELINE("pic",pic8259_device,ir2_w))
MCFG_WD2010_IN_BCS_CB(READ8(*this, ngen_state,hd_buffer_r))
MCFG_WD2010_OUT_BCS_CB(WRITE8(*this, ngen_state,hd_buffer_w))
MCFG_WD2010_IN_BCS_CB(READ8(*this, ngen386_state,hd_buffer_r))
MCFG_WD2010_OUT_BCS_CB(WRITE8(*this, ngen386_state,hd_buffer_w))
MCFG_WD2010_IN_DRDY_CB(CONSTANT(1))
MCFG_WD2010_IN_INDEX_CB(CONSTANT(1))
MCFG_WD2010_IN_WF_CB(CONSTANT(1))

97
src/mame/drivers/octopus.cpp
View File

@ -891,59 +891,60 @@ MACHINE_CONFIG_START(octopus_state::octopus)
MCFG_DEVICE_PROGRAM_MAP(octopus_sub_mem)
MCFG_DEVICE_IO_MAP(octopus_sub_io)
MCFG_DEVICE_ADD("dma1", AM9517A, 24_MHz_XTAL / 6) // 4MHz
MCFG_I8237_OUT_HREQ_CB(WRITELINE("dma2", am9517a_device, dreq0_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, octopus_state,dma_read))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, octopus_state,dma_write))
//MCFG_I8237_IN_IOR_0_CB(NOOP)
//MCFG_I8237_IN_IOR_1_CB(NOOP) // HDC
//MCFG_I8237_IN_IOR_2_CB(NOOP) // RAM Refresh
//MCFG_I8237_IN_IOR_3_CB(NOOP)
//MCFG_I8237_OUT_IOW_0_CB(NOOP)
//MCFG_I8237_OUT_IOW_1_CB(NOOP) // HDC
//MCFG_I8237_OUT_IOW_2_CB(NOOP) // RAM Refresh
//MCFG_I8237_OUT_IOW_3_CB(NOOP)
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, octopus_state, dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, octopus_state, dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, octopus_state, dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, octopus_state, dack3_w))
MCFG_DEVICE_ADD("dma2", AM9517A, 24_MHz_XTAL / 6) // 4MHz
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, octopus_state, dma_hrq_changed))
MCFG_I8237_IN_MEMR_CB(READ8(*this, octopus_state,dma_read))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, octopus_state,dma_write))
//MCFG_I8237_IN_IOR_0_CB(NOOP)
MCFG_I8237_IN_IOR_1_CB(READ8("fdc",fd1793_device,data_r)) // FDC
//MCFG_I8237_IN_IOR_2_CB(NOOP)
//MCFG_I8237_IN_IOR_3_CB(NOOP)
//MCFG_I8237_OUT_IOW_0_CB(NOOP)
MCFG_I8237_OUT_IOW_1_CB(WRITE8("fdc",fd1793_device,data_w)) // FDC
//MCFG_I8237_OUT_IOW_2_CB(NOOP)
//MCFG_I8237_OUT_IOW_3_CB(NOOP)
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, octopus_state, dack4_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, octopus_state, dack5_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, octopus_state, dack6_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, octopus_state, dack7_w))
AM9517A(config, m_dma1, 24_MHz_XTAL / 6); // 4MHz
m_dma1->out_hreq_callback().set(m_dma2, FUNC(am9517a_device::dreq0_w));
m_dma1->in_memr_callback().set(FUNC(octopus_state::dma_read));
m_dma1->out_memw_callback().set(FUNC(octopus_state::dma_write));
//m_dma1->in_ior_callback<0>().set_nop();
//m_dma1->in_ior_callback<1>().set_nop(); // HDC
//m_dma1->in_ior_callback<2>().set_nop(); // RAM Refresh
//m_dma1->in_ior_callback<3>().set_nop();
//m_dma1->out_iow_callback<0>().set_nop();
//m_dma1->out_iow_callback<1>().set_nop(); // HDC
//m_dma1->out_iow_callback<2>().set_nop(); // RAM Refresh
//m_dma1->out_iow_callback<3>().set_nop();
m_dma1->out_dack_callback<0>().set(FUNC(octopus_state::dack0_w));
m_dma1->out_dack_callback<1>().set(FUNC(octopus_state::dack1_w));
m_dma1->out_dack_callback<2>().set(FUNC(octopus_state::dack2_w));
m_dma1->out_dack_callback<3>().set(FUNC(octopus_state::dack3_w));
MCFG_DEVICE_ADD("pic_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, octopus_state, get_slave_ack))
AM9517A(config, m_dma2, 24_MHz_XTAL / 6); // 4MHz
m_dma2->out_hreq_callback().set(FUNC(octopus_state::dma_hrq_changed));
m_dma2->in_memr_callback().set(FUNC(octopus_state::dma_read));
m_dma2->out_memw_callback().set(FUNC(octopus_state::dma_write));
//m_dma2->in_ior_callback<0>().set_nop();
m_dma2->in_ior_callback<1>().set(m_fdc, FUNC(fd1793_device::data_r)); // FDC
//m_dma2->in_ior_callback<2>().set_nop();
//m_dma2->in_ior_callback<3>().set_nop();
//m_dma2->out_iow_callback<0>().set_nop();
m_dma2->out_iow_callback<1>().set(m_fdc, FUNC(fd1793_device::data_w)); // FDC
//m_dma2->out_iow_callback<2>().set_nop();
//m_dma2->out_iow_callback<3>().set_nop();
m_dma2->out_dack_callback<0>().set(FUNC(octopus_state::dack4_w));
m_dma2->out_dack_callback<1>().set(FUNC(octopus_state::dack5_w));
m_dma2->out_dack_callback<2>().set(FUNC(octopus_state::dack6_w));
m_dma2->out_dack_callback<3>().set(FUNC(octopus_state::dack7_w));
MCFG_DEVICE_ADD("pic_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("pic_master", pic8259_device, ir7_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_pic1, 0);
m_pic1->out_int_callback().set_inputline(m_maincpu, 0);
m_pic1->in_sp_callback().set_constant(1);
m_pic1->read_slave_ack_callback().set(FUNC(octopus_state::get_slave_ack));
PIC8259(config, m_pic2, 0);
m_pic2->out_int_callback().set(m_pic1, FUNC(pic8259_device::ir7_w));
m_pic2->in_sp_callback().set_constant(0);
// RTC (MC146818 via i8255 PPI)
MCFG_DEVICE_ADD("ppi", I8255, 0)
MCFG_I8255_IN_PORTA_CB(READ8(*this, octopus_state,rtc_r))
MCFG_I8255_IN_PORTB_CB(READ8(*this, octopus_state,cntl_r))
MCFG_I8255_IN_PORTC_CB(READ8(*this, octopus_state,gpo_r))
MCFG_I8255_OUT_PORTA_CB(WRITE8(*this, octopus_state,rtc_w))
MCFG_I8255_OUT_PORTB_CB(WRITE8(*this, octopus_state,cntl_w))
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, octopus_state,gpo_w))
I8255(config, m_ppi, 0);
m_ppi->in_pa_callback().set(FUNC(octopus_state::rtc_r));
m_ppi->in_pb_callback().set(FUNC(octopus_state::cntl_r));
m_ppi->in_pc_callback().set(FUNC(octopus_state::gpo_r));
m_ppi->out_pa_callback().set(FUNC(octopus_state::rtc_w));
m_ppi->out_pb_callback().set(FUNC(octopus_state::cntl_w));
m_ppi->out_pc_callback().set(FUNC(octopus_state::gpo_w));
MCFG_DEVICE_ADD("rtc", MC146818, 32.768_kHz_XTAL)
MCFG_MC146818_IRQ_HANDLER(WRITELINE("pic_slave",pic8259_device, ir2_w))
MC146818(config, m_rtc, 32.768_kHz_XTAL);
m_rtc->irq_callback().set(m_pic2, FUNC(pic8259_device::ir2_w));
// Keyboard UART
MCFG_DEVICE_ADD("keyboard", I8251, 0)

10
src/mame/drivers/paso1600.cpp
View File

@ -329,12 +329,12 @@ MACHINE_CONFIG_START(paso1600_state::paso1600)
MCFG_MC6845_SHOW_BORDER_AREA(false)
MCFG_MC6845_CHAR_WIDTH(8)
MCFG_DEVICE_ADD("pic8259", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
PIC8259(config, m_pic, 0);
m_pic->out_int_callback().set_inputline(m_maincpu, 0);
MCFG_DEVICE_ADD("8237dma", AM9517A, 16000000/4)
MCFG_I8237_IN_MEMR_CB(READ8(*this, paso1600_state, pc_dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, paso1600_state, pc_dma_write_byte))
AM9517A(config, m_dma, 16000000/4);
m_dma->in_memr_callback().set(FUNC(paso1600_state::pc_dma_read_byte));
m_dma->out_memw_callback().set(FUNC(paso1600_state::pc_dma_write_byte));
MACHINE_CONFIG_END
ROM_START( paso1600 )

78
src/mame/drivers/pc1512.cpp
View File

@ -1166,8 +1166,7 @@ MACHINE_CONFIG_START(pc1512_state::pc1512)
// sound
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.80);
// devices
MCFG_DEVICE_ADD(PC1512_KEYBOARD_TAG, PC1512_KEYBOARD, 0)
@ -1180,25 +1179,25 @@ MACHINE_CONFIG_START(pc1512_state::pc1512)
MCFG_PC1512_MOUSE_PORT_M1_CB(WRITELINE(PC1512_KEYBOARD_TAG, pc1512_keyboard_device, m1_w))
MCFG_PC1512_MOUSE_PORT_M2_CB(WRITELINE(PC1512_KEYBOARD_TAG, pc1512_keyboard_device, m2_w))
MCFG_DEVICE_ADD(I8237A5_TAG, AM9517A, 24_MHz_XTAL / 6)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, pc1512_state, hrq_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, pc1512_state, eop_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, pc1512_state, memr_r))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, pc1512_state, memw_w))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, pc1512_state, ior1_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, pc1512_state, ior2_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, pc1512_state, ior3_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, pc1512_state, iow0_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, pc1512_state, iow1_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, pc1512_state, iow2_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, pc1512_state, iow3_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, pc1512_state, dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, pc1512_state, dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, pc1512_state, dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, pc1512_state, dack3_w))
AM9517A(config, m_dmac, 24_MHz_XTAL / 6);
m_dmac->out_hreq_callback().set(FUNC(pc1512_state::hrq_w));
m_dmac->out_eop_callback().set(FUNC(pc1512_state::eop_w));
m_dmac->in_memr_callback().set(FUNC(pc1512_state::memr_r));
m_dmac->out_memw_callback().set(FUNC(pc1512_state::memw_w));
m_dmac->in_ior_callback<1>().set(FUNC(pc1512_state::ior1_r));
m_dmac->in_ior_callback<2>().set(FUNC(pc1512_state::ior2_r));
m_dmac->in_ior_callback<3>().set(FUNC(pc1512_state::ior3_r));
m_dmac->out_iow_callback<0>().set(FUNC(pc1512_state::iow0_w));
m_dmac->out_iow_callback<1>().set(FUNC(pc1512_state::iow1_w));
m_dmac->out_iow_callback<2>().set(FUNC(pc1512_state::iow2_w));
m_dmac->out_iow_callback<3>().set(FUNC(pc1512_state::iow3_w));
m_dmac->out_dack_callback<0>().set(FUNC(pc1512_state::dack0_w));
m_dmac->out_dack_callback<1>().set(FUNC(pc1512_state::dack1_w));
m_dmac->out_dack_callback<2>().set(FUNC(pc1512_state::dack2_w));
m_dmac->out_dack_callback<3>().set(FUNC(pc1512_state::dack3_w));
MCFG_DEVICE_ADD(I8259A2_TAG, PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0))
PIC8259(config, m_pic, 0);
m_pic->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
MCFG_PIT8253_CLK0(28.636363_MHz_XTAL / 24)
@ -1300,8 +1299,7 @@ MACHINE_CONFIG_START(pc1640_state::pc1640)
// sound
SPEAKER(config, "mono").front_center();
MCFG_DEVICE_ADD("speaker", SPEAKER_SOUND)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.80);
// devices
MCFG_DEVICE_ADD(PC1512_KEYBOARD_TAG, PC1512_KEYBOARD, 0)
@ -1314,25 +1312,25 @@ MACHINE_CONFIG_START(pc1640_state::pc1640)
MCFG_PC1512_MOUSE_PORT_M1_CB(WRITELINE(PC1512_KEYBOARD_TAG, pc1512_keyboard_device, m1_w))
MCFG_PC1512_MOUSE_PORT_M2_CB(WRITELINE(PC1512_KEYBOARD_TAG, pc1512_keyboard_device, m2_w))
MCFG_DEVICE_ADD(I8237A5_TAG, AM9517A, 24_MHz_XTAL / 6)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, pc1512_base_state, hrq_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, pc1512_base_state, eop_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, pc1512_base_state, memr_r))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, pc1512_base_state, memw_w))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, pc1512_base_state, ior1_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, pc1512_base_state, ior2_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, pc1512_base_state, ior3_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, pc1512_base_state, iow0_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, pc1512_base_state, iow1_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, pc1512_base_state, iow2_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, pc1512_base_state, iow3_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, pc1512_base_state, dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, pc1512_base_state, dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, pc1512_base_state, dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, pc1512_base_state, dack3_w))
AM9517A(config, m_dmac, 24_MHz_XTAL / 6);
m_dmac->out_hreq_callback().set(FUNC(pc1640_state::hrq_w));
m_dmac->out_eop_callback().set(FUNC(pc1640_state::eop_w));
m_dmac->in_memr_callback().set(FUNC(pc1640_state::memr_r));
m_dmac->out_memw_callback().set(FUNC(pc1640_state::memw_w));
m_dmac->in_ior_callback<1>().set(FUNC(pc1640_state::ior1_r));
m_dmac->in_ior_callback<2>().set(FUNC(pc1640_state::ior2_r));
m_dmac->in_ior_callback<3>().set(FUNC(pc1640_state::ior3_r));
m_dmac->out_iow_callback<0>().set(FUNC(pc1640_state::iow0_w));
m_dmac->out_iow_callback<1>().set(FUNC(pc1640_state::iow1_w));
m_dmac->out_iow_callback<2>().set(FUNC(pc1640_state::iow2_w));
m_dmac->out_iow_callback<3>().set(FUNC(pc1640_state::iow3_w));
m_dmac->out_dack_callback<0>().set(FUNC(pc1640_state::dack0_w));
m_dmac->out_dack_callback<1>().set(FUNC(pc1640_state::dack1_w));
m_dmac->out_dack_callback<2>().set(FUNC(pc1640_state::dack2_w));
m_dmac->out_dack_callback<3>().set(FUNC(pc1640_state::dack3_w));
MCFG_DEVICE_ADD(I8259A2_TAG, PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0))
PIC8259(config, m_pic, 0);
m_pic->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
MCFG_PIT8253_CLK0(28.636363_MHz_XTAL / 24)

32
src/mame/drivers/pc88va.cpp
View File

@ -1631,28 +1631,28 @@ MACHINE_CONFIG_START(pc88va_state::pc88va)
MCFG_I8255_IN_PORTC_CB(READ8(*this, pc88va_state, fdc_8255_c_r))
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, pc88va_state, fdc_8255_c_w))
MCFG_DEVICE_ADD("pic8259_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, pc88va_state, get_slave_ack))
PIC8259(config, m_pic1, 0);
m_pic1->out_int_callback().set_inputline(m_maincpu, 0);
m_pic1->in_sp_callback().set_constant(1);
m_pic1->read_slave_ack_callback().set(FUNC(pc88va_state::get_slave_ack));
MCFG_DEVICE_ADD("pic8259_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("pic8259_master", pic8259_device, ir7_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_pic2, 0);
m_pic2->out_int_callback().set(m_pic1, FUNC(pic8259_device::ir7_w));
m_pic2->in_sp_callback().set_constant(0);
MCFG_DEVICE_ADD("dmac", AM9517A, 8000000) /* ch2 is FDC, ch0/3 are "user". ch1 is unused */
MCFG_AM9517A_OUT_HREQ_CB(WRITELINE(*this, pc88va_state, pc88va_hlda_w))
MCFG_AM9517A_OUT_EOP_CB(WRITELINE(*this, pc88va_state, pc88va_tc_w))
MCFG_AM9517A_IN_IOR_2_CB(READ8(*this, pc88va_state, fdc_dma_r))
MCFG_AM9517A_OUT_IOW_2_CB(WRITE8(*this, pc88va_state, fdc_dma_w))
MCFG_AM9517A_IN_MEMR_CB(READ8(*this, pc88va_state, dma_memr_cb))
MCFG_AM9517A_OUT_MEMW_CB(WRITE8(*this, pc88va_state, dma_memw_cb))
AM9517A(config, m_dmac, 8000000); // ch2 is FDC, ch0/3 are "user". ch1 is unused
m_dmac->out_hreq_callback().set(FUNC(pc88va_state::pc88va_hlda_w));
m_dmac->out_eop_callback().set(FUNC(pc88va_state::pc88va_tc_w));
m_dmac->in_ior_callback<2>().set(FUNC(pc88va_state::fdc_dma_r));
m_dmac->out_iow_callback<2>().set(FUNC(pc88va_state::fdc_dma_w));
m_dmac->in_memr_callback().set(FUNC(pc88va_state::dma_memr_cb));
m_dmac->out_memw_callback().set(FUNC(pc88va_state::dma_memw_cb));
MCFG_UPD765A_ADD("upd765", false, true)
MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pc88va_state, fdc_irq))
MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, pc88va_state, fdc_drq))
MCFG_FLOPPY_DRIVE_ADD("upd765:0", pc88va_floppies, "525hd", pc88va_state::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("upd765:1", pc88va_floppies, "525hd", pc88va_state::floppy_formats)
FLOPPY_CONNECTOR(config, m_fdd[0], pc88va_floppies, "525hd", pc88va_state::floppy_formats);
FLOPPY_CONNECTOR(config, m_fdd[1], pc88va_floppies, "525hd", pc88va_state::floppy_formats);
MCFG_SOFTWARE_LIST_ADD("disk_list","pc88va")
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)

64
src/mame/drivers/pc9801.cpp
View File

@ -2277,9 +2277,8 @@ MACHINE_CONFIG_START(pc9801_state::pc9801_sasi)
MCFG_DEVICE_ADD("sasi_data_in", INPUT_BUFFER, 0)
MCFG_DEVICE_ADD("sasi_ctrl_in", INPUT_BUFFER, 0)
MCFG_DEVICE_MODIFY("i8237")
MCFG_I8237_IN_IOR_0_CB(READ8(*this, pc9801_state, sasi_data_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, pc9801_state, sasi_data_w))
m_dmac->in_ior_callback<0>().set(FUNC(pc9801_state::sasi_data_r));
m_dmac->out_iow_callback<0>().set(FUNC(pc9801_state::sasi_data_w));
MACHINE_CONFIG_END
void pc9801_state::cdrom_headphones(device_t *device)
@ -2314,42 +2313,42 @@ MACHINE_CONFIG_START(pc9801_state::pc9801_common)
m_pit8253->out_handler<2>().set(m_sio, FUNC(i8251_device::write_txc));
m_pit8253->out_handler<2>().append(m_sio, FUNC(i8251_device::write_rxc));
MCFG_DEVICE_ADD("i8237", AM9517A, 5000000) // unknown clock, TODO: check channels 0 - 1
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, pc9801_state, dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, pc9801_state, tc_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, pc9801_state, dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, pc9801_state, dma_write_byte))
MCFG_I8237_IN_IOR_2_CB(READ8("upd765_2hd", upd765a_device, mdma_r))
MCFG_I8237_OUT_IOW_2_CB(WRITE8("upd765_2hd", upd765a_device, mdma_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, pc9801_state, dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, pc9801_state, dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, pc9801_state, dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, pc9801_state, dack3_w))
AM9517A(config, m_dmac, 5000000); // unknown clock, TODO: check channels 0 - 1
m_dmac->out_hreq_callback().set(FUNC(pc9801_state::dma_hrq_changed));
m_dmac->out_eop_callback().set(FUNC(pc9801_state::tc_w));
m_dmac->in_memr_callback().set(FUNC(pc9801_state::dma_read_byte));
m_dmac->out_memw_callback().set(FUNC(pc9801_state::dma_write_byte));
m_dmac->in_ior_callback<2>().set(m_fdc_2hd, FUNC(upd765a_device::mdma_r));
m_dmac->out_iow_callback<2>().set(m_fdc_2hd, FUNC(upd765a_device::mdma_w));
m_dmac->out_dack_callback<0>().set(FUNC(pc9801_state::dack0_w));
m_dmac->out_dack_callback<1>().set(FUNC(pc9801_state::dack1_w));
m_dmac->out_dack_callback<2>().set(FUNC(pc9801_state::dack2_w));
m_dmac->out_dack_callback<3>().set(FUNC(pc9801_state::dack3_w));
MCFG_DEVICE_ADD("pic8259_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, pc9801_state, get_slave_ack))
PIC8259(config, m_pic1, 0);
m_pic1->out_int_callback().set_inputline(m_maincpu, 0);
m_pic1->in_sp_callback().set_constant(1);
m_pic1->read_slave_ack_callback().set(FUNC(pc9801_state::get_slave_ack));
MCFG_DEVICE_ADD("pic8259_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("pic8259_master", pic8259_device, ir7_w)) // TODO: Check ir7_w
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_pic2, 0);
m_pic2->out_int_callback().set(m_pic1, FUNC(pic8259_device::ir7_w)); // TODO: Check ir7_w
m_pic2->in_sp_callback().set_constant(0);
MCFG_DEVICE_ADD("ppi8255_sys", I8255, 0)
MCFG_I8255_IN_PORTA_CB(IOPORT("DSW2"))
MCFG_I8255_IN_PORTB_CB(IOPORT("DSW1"))
MCFG_I8255_IN_PORTC_CB(CONSTANT(0xa0)) // 0x80 cpu triple fault reset flag?
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, pc9801_state, ppi_sys_portc_w))
I8255(config, m_ppi_sys, 0);
m_ppi_sys->in_pa_callback().set_ioport("DSW2");
m_ppi_sys->in_pb_callback().set_ioport("DSW1");
m_ppi_sys->in_pc_callback().set_constant(0xa0); // 0x80 cpu triple fault reset flag?
m_ppi_sys->out_pc_callback().set(FUNC(pc9801_state::ppi_sys_portc_w));
MCFG_DEVICE_ADD("ppi8255_prn", I8255, 0)
/* TODO: check this one */
MCFG_I8255_IN_PORTB_CB(IOPORT("DSW5"))
I8255(config, m_ppi_prn, 0);
// TODO: check this one
m_ppi_prn->in_pb_callback().set_ioport("DSW5");
pc9801_keyboard(config);
pc9801_mouse(config);
pc9801_cbus(config);
MCFG_DEVICE_ADD(UPD8251_TAG, I8251, 0)
I8251(config, m_sio, 0);
UPD765A(config, m_fdc_2hd, true, true);
m_fdc_2hd->intrq_wr_callback().set(m_pic2, FUNC(pic8259_device::ir3_w));
@ -2412,9 +2411,8 @@ MACHINE_CONFIG_START(pc9801_state::pc9801)
pc9801_sasi(config);
MCFG_UPD1990A_ADD(UPD1990A_TAG, XTAL(32'768), NOOP, NOOP)
MCFG_DEVICE_MODIFY("i8237")
MCFG_I8237_IN_IOR_3_CB(READ8("upd765_2dd", upd765a_device, mdma_r))
MCFG_I8237_OUT_IOW_3_CB(WRITE8("upd765_2dd", upd765a_device, mdma_w))
m_dmac->in_ior_callback<3>().set(m_fdc_2dd, FUNC(upd765a_device::mdma_r));
m_dmac->out_iow_callback<3>().set(m_fdc_2dd, FUNC(upd765a_device::mdma_w));
MCFG_PALETTE_ADD("palette", 16)
MCFG_PALETTE_INIT_OWNER(pc9801_state,pc9801)

5
src/mame/drivers/pcat_dyn.cpp
View File

@ -187,9 +187,8 @@ MACHINE_CONFIG_START(pcat_dyn_state::pcat_dyn)
MCFG_AD1848_IRQ_CALLBACK(WRITELINE("pic8259_1", pic8259_device, ir5_w))
MCFG_AD1848_DRQ_CALLBACK(WRITELINE("dma8237_1", am9517a_device, dreq0_w))
MCFG_DEVICE_MODIFY("dma8237_1")
MCFG_I8237_OUT_IOW_0_CB(WRITE8("ad1848", ad1848_device, dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, pcat_dyn_state, dma8237_1_dack_w))
m_dma8237_1->out_iow_callback<0>().set("ad1848", FUNC(ad1848_device::dack_w));
m_dma8237_1->out_iow_callback<1>().set(FUNC(pcat_dyn_state::dma8237_1_dack_w));
MCFG_NVRAM_ADD_CUSTOM_DRIVER("nvram", pcat_dyn_state, nvram_init)

81
src/mame/drivers/qx10.cpp
View File

@ -728,12 +728,12 @@ MACHINE_CONFIG_START(qx10_state::qx10)
MCFG_DEVICE_IRQ_ACKNOWLEDGE_DEVICE("pic8259_master", pic8259_device, inta_cb)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(50)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
MCFG_SCREEN_UPDATE_DRIVER(qx10_state, screen_update)
MCFG_SCREEN_SIZE(640, 480)
MCFG_SCREEN_VISIBLE_AREA(0, 640-1, 0, 480-1)
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
m_screen->set_refresh_hz(50);
m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // not accurate
m_screen->set_screen_update(FUNC(qx10_state::screen_update));
m_screen->set_size(640, 480);
m_screen->set_visarea(0, 640-1, 0, 480-1);
MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_qx10)
MCFG_PALETTE_ADD("palette", 8)
MCFG_PALETTE_INIT_OWNER(qx10_state, qx10)
@ -747,11 +747,10 @@ MACHINE_CONFIG_START(qx10_state::qx10)
1 Keyboard clock (1200bps) +5V 8259A (10E) IR5 Software timer
2 Clock 1,9668MHz Memory register D7 8259 (12E) IR1 Software timer
*/
MCFG_DEVICE_ADD("pit8253_1", PIT8253, 0)
MCFG_PIT8253_CLK0(1200)
MCFG_PIT8253_CLK1(1200)
MCFG_PIT8253_CLK2(MAIN_CLK / 8)
PIT8253(config, m_pit_1, 0);
m_pit_1->set_clk<0>(1200);
m_pit_1->set_clk<1>(1200);
m_pit_1->set_clk<2>(MAIN_CLK / 8);
/*
Timer 1
@ -760,21 +759,21 @@ MACHINE_CONFIG_START(qx10_state::qx10)
1 Clock 1,9668MHz +5V Keyboard clock 1200bps (Clock / 1664)
2 Clock 1,9668MHz +5V RS-232C baud rate 9600bps (Clock / 208)
*/
MCFG_DEVICE_ADD("pit8253_2", PIT8253, 0)
MCFG_PIT8253_CLK0(MAIN_CLK / 8)
MCFG_PIT8253_CLK1(MAIN_CLK / 8)
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(*this, qx10_state, keyboard_clk))
MCFG_PIT8253_CLK2(MAIN_CLK / 8)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE("upd7201", z80dart_device, rxtxcb_w))
PIT8253(config, m_pit_2, 0);
m_pit_2->set_clk<0>(MAIN_CLK / 8);
m_pit_2->set_clk<1>(MAIN_CLK / 8);
m_pit_2->out_handler<1>().set(FUNC(qx10_state::keyboard_clk));
m_pit_2->set_clk<2>(MAIN_CLK / 8);
m_pit_2->out_handler<2>().set(m_scc, FUNC(z80dart_device::rxtxcb_w));
MCFG_DEVICE_ADD("pic8259_master", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, qx10_state, get_slave_ack))
PIC8259(config, m_pic_m, 0);
m_pic_m->out_int_callback().set_inputline(m_maincpu, 0);
m_pic_m->in_sp_callback().set_constant(1);
m_pic_m->read_slave_ack_callback().set(FUNC(qx10_state::get_slave_ack));
MCFG_DEVICE_ADD("pic8259_slave", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("pic8259_master", pic8259_device, ir7_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_pic_s, 0);
m_pic_s->out_int_callback().set(m_pic_m, FUNC(pic8259_device::ir7_w));
m_pic_s->in_sp_callback().set_constant(0);
MCFG_DEVICE_ADD("upd7201", UPD7201, MAIN_CLK/4) // channel b clock set by pit2 channel 2
// Channel A: Keyboard
@ -785,20 +784,20 @@ MACHINE_CONFIG_START(qx10_state::qx10)
MCFG_Z80DART_OUT_RTSB_CB(WRITELINE(RS232_TAG, rs232_port_device, write_rts))
MCFG_Z80DART_OUT_INT_CB(WRITELINE(*this, qx10_state, keyboard_irq))
MCFG_DEVICE_ADD("8237dma_1", AM9517A, MAIN_CLK/4)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, qx10_state, dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, qx10_state, tc_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, qx10_state, memory_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, qx10_state, memory_write_byte))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, qx10_state, fdc_dma_r))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, qx10_state, gdc_dack_r))
//MCFG_I8237_IN_IOR_2_CB(READ8("upd7220", upd7220_device, dack_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, qx10_state, fdc_dma_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, qx10_state, gdc_dack_w))
//MCFG_I8237_OUT_IOW_2_CB(WRITE8("upd7220", upd7220_device, dack_w))
MCFG_DEVICE_ADD("8237dma_2", AM9517A, MAIN_CLK/4)
AM9517A(config, m_dma_1, MAIN_CLK/4);
m_dma_1->out_hreq_callback().set(FUNC(qx10_state::dma_hrq_changed));
m_dma_1->out_eop_callback().set(FUNC(qx10_state::tc_w));
m_dma_1->in_memr_callback().set(FUNC(qx10_state::memory_read_byte));
m_dma_1->out_memw_callback().set(FUNC(qx10_state::memory_write_byte));
m_dma_1->in_ior_callback<0>().set(FUNC(qx10_state::fdc_dma_r));
m_dma_1->in_ior_callback<1>().set(FUNC(qx10_state::gdc_dack_r));
//m_dma_1->in_ior_callback<2>().set(m_hgdc, FUNC(upd7220_device::dack_r));
m_dma_1->out_iow_callback<0>().set(FUNC(qx10_state::fdc_dma_w));
m_dma_1->out_iow_callback<1>().set(FUNC(qx10_state::gdc_dack_w));
//m_dma_1->out_iow_callback<2>().set(m_hgdc, FUNC(upd7220_device::dack_w));
AM9517A(config, m_dma_2, MAIN_CLK/4);
MCFG_DEVICE_ADD("i8255", I8255, 0)
I8255(config, m_ppi, 0);
MCFG_DEVICE_ADD("upd7220", UPD7220, MAIN_CLK/6) // unk clock
MCFG_DEVICE_ADDRESS_MAP(0, upd7220_map)
@ -806,14 +805,14 @@ MACHINE_CONFIG_START(qx10_state::qx10)
MCFG_UPD7220_DRAW_TEXT_CALLBACK_OWNER(qx10_state, hgdc_draw_text)
MCFG_VIDEO_SET_SCREEN("screen")
MCFG_DEVICE_ADD("rtc", MC146818, 32.768_kHz_XTAL)
MCFG_MC146818_IRQ_HANDLER(WRITELINE("pic8259_slave", pic8259_device, ir2_w))
MC146818(config, m_rtc, 32.768_kHz_XTAL);
m_rtc->irq_callback().set(m_pic_s, FUNC(pic8259_device::ir2_w));
UPD765A(config, m_fdc, true, true);
m_fdc->intrq_wr_callback().set(FUNC(qx10_state::qx10_upd765_interrupt));
m_fdc->drq_wr_callback().set(m_dma_1, FUNC(am9517a_device::dreq0_w)).invert();
MCFG_FLOPPY_DRIVE_ADD("upd765:0", qx10_floppies, "525dd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("upd765:1", qx10_floppies, "525dd", floppy_image_device::default_floppy_formats)
FLOPPY_CONNECTOR(config, m_floppy[0], qx10_floppies, "525dd", floppy_image_device::default_floppy_formats);
FLOPPY_CONNECTOR(config, m_floppy[1], qx10_floppies, "525dd", floppy_image_device::default_floppy_formats);
MCFG_DEVICE_ADD(RS232_TAG, RS232_PORT, default_rs232_devices, nullptr)
MCFG_RS232_RXD_HANDLER(WRITELINE("upd7201", upd7201_device, rxb_w))

32
src/mame/drivers/rc702.cpp
View File

@ -63,7 +63,7 @@ public:
void init_rc702();
private:
DECLARE_MACHINE_RESET(rc702);
virtual void machine_reset() override;
DECLARE_READ8_MEMBER(memory_read_byte);
DECLARE_WRITE8_MEMBER(memory_write_byte);
DECLARE_WRITE8_MEMBER(port14_w);
@ -151,7 +151,7 @@ static INPUT_PORTS_START( rc702 )
PORT_DIPSETTING( 0x00, DEF_STR( On ))
INPUT_PORTS_END
MACHINE_RESET_MEMBER( rc702_state, rc702 )
void rc702_state::machine_reset()
{
membank("bankr0")->set_entry(0); // point at rom
membank("bankw0")->set_entry(0); // always write to ram
@ -338,8 +338,6 @@ MACHINE_CONFIG_START(rc702_state::rc702)
MCFG_DEVICE_IO_MAP(rc702_io)
MCFG_Z80_DAISY_CHAIN(daisy_chain_intf)
MCFG_MACHINE_RESET_OVERRIDE(rc702_state, rc702)
CLOCK(config, "ctc_clock", 614000).signal_handler().set(FUNC(rc702_state::clock_w));
Z80CTC(config, m_ctc1, 8_MHz_XTAL / 2);
@ -351,20 +349,20 @@ MACHINE_CONFIG_START(rc702_state::rc702)
MCFG_DEVICE_ADD("sio1", Z80DART, XTAL(8'000'000) / 2)
MCFG_Z80DART_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
MCFG_DEVICE_ADD("pio", Z80PIO, XTAL(8'000'000) / 2)
MCFG_Z80PIO_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
// MCFG_Z80PIO_OUT_PB_CB(WRITE8(*this, rc702_state, portxx_w)) // parallel port
Z80PIO(config, m_pio, 8_MHz_XTAL / 2);
m_pio->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
// m_pio->out_pb_callback().set(FUNC(rc702_state::portxx_w)); // parallel port
MCFG_DEVICE_ADD("dma", AM9517A, XTAL(8'000'000) / 2)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, rc702_state, busreq_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, rc702_state, tc_w)) // inverted
MCFG_I8237_IN_MEMR_CB(READ8(*this, rc702_state, memory_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, rc702_state, memory_write_byte))
MCFG_I8237_IN_IOR_1_CB(READ8("fdc", upd765a_device, mdma_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8("fdc", upd765a_device, mdma_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8("crtc", i8275_device, dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8("crtc", i8275_device, dack_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, rc702_state, dack1_w)) // inverted
AM9517A(config, m_dma, 8_MHz_XTAL / 2);
m_dma->out_hreq_callback().set(FUNC(rc702_state::busreq_w));
m_dma->out_eop_callback().set(FUNC(rc702_state::tc_w)); // inverted
m_dma->in_memr_callback().set(FUNC(rc702_state::memory_read_byte));
m_dma->out_memw_callback().set(FUNC(rc702_state::memory_write_byte));
m_dma->in_ior_callback<1>().set(m_fdc, FUNC(upd765a_device::mdma_r));
m_dma->out_iow_callback<1>().set(m_fdc, FUNC(upd765a_device::mdma_w));
m_dma->out_iow_callback<2>().set("crtc", FUNC(i8275_device::dack_w));
m_dma->out_iow_callback<3>().set("crtc", FUNC(i8275_device::dack_w));
m_dma->out_dack_callback<1>().set(FUNC(rc702_state::dack1_w)); // inverted
MCFG_UPD765A_ADD("fdc", false, true)
MCFG_UPD765_INTRQ_CALLBACK(WRITELINE("ctc1", z80ctc_device, trg3))

56
src/mame/drivers/wangpc.cpp
View File

@ -1282,37 +1282,37 @@ MACHINE_CONFIG_START(wangpc_state::wangpc)
//MCFG_QUANTUM_PERFECT_CPU(I8086_TAG)
// devices
MCFG_DEVICE_ADD(AM9517A_TAG, AM9517A, 4000000)
MCFG_AM9517A_OUT_HREQ_CB(WRITELINE(*this, wangpc_state, hrq_w))
MCFG_AM9517A_OUT_EOP_CB(WRITELINE(*this, wangpc_state, eop_w))
MCFG_AM9517A_IN_MEMR_CB(READ8(*this, wangpc_state, memr_r))
MCFG_AM9517A_OUT_MEMW_CB(WRITE8(*this, wangpc_state, memw_w))
MCFG_AM9517A_IN_IOR_1_CB(READ8(WANGPC_BUS_TAG, wangpcbus_device, dack1_r))
MCFG_AM9517A_IN_IOR_2_CB(READ8(*this, wangpc_state, ior2_r))
MCFG_AM9517A_IN_IOR_3_CB(READ8(WANGPC_BUS_TAG, wangpcbus_device, dack3_r))
MCFG_AM9517A_OUT_IOW_1_CB(WRITE8(WANGPC_BUS_TAG, wangpcbus_device, dack1_w))
MCFG_AM9517A_OUT_IOW_2_CB(WRITE8(*this, wangpc_state, iow2_w))
MCFG_AM9517A_OUT_IOW_3_CB(WRITE8(WANGPC_BUS_TAG, wangpcbus_device, dack3_w))
MCFG_AM9517A_OUT_DACK_0_CB(WRITELINE(*this, wangpc_state, dack0_w))
MCFG_AM9517A_OUT_DACK_1_CB(WRITELINE(*this, wangpc_state, dack1_w))
MCFG_AM9517A_OUT_DACK_2_CB(WRITELINE(*this, wangpc_state, dack2_w))
MCFG_AM9517A_OUT_DACK_3_CB(WRITELINE(*this, wangpc_state, dack3_w))
AM9517A(config, m_dmac, 4000000);
m_dmac->out_hreq_callback().set(FUNC(wangpc_state::hrq_w));
m_dmac->out_eop_callback().set(FUNC(wangpc_state::eop_w));
m_dmac->in_memr_callback().set(FUNC(wangpc_state::memr_r));
m_dmac->out_memw_callback().set(FUNC(wangpc_state::memw_w));
m_dmac->in_ior_callback<1>().set(m_bus, FUNC(wangpcbus_device::dack1_r));
m_dmac->in_ior_callback<2>().set(FUNC(wangpc_state::ior2_r));
m_dmac->in_ior_callback<3>().set(m_bus, FUNC(wangpcbus_device::dack3_r));
m_dmac->out_iow_callback<1>().set(m_bus, FUNC(wangpcbus_device::dack1_w));
m_dmac->out_iow_callback<2>().set(FUNC(wangpc_state::iow2_w));
m_dmac->out_iow_callback<3>().set(m_bus, FUNC(wangpcbus_device::dack3_w));
m_dmac->out_dack_callback<0>().set(FUNC(wangpc_state::dack0_w));
m_dmac->out_dack_callback<1>().set(FUNC(wangpc_state::dack1_w));
m_dmac->out_dack_callback<2>().set(FUNC(wangpc_state::dack2_w));
m_dmac->out_dack_callback<3>().set(FUNC(wangpc_state::dack3_w));
MCFG_DEVICE_ADD(I8259A_TAG, PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE(I8086_TAG, INPUT_LINE_IRQ0))
PIC8259(config, m_pic, 0);
m_pic->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
MCFG_DEVICE_ADD(I8255A_TAG, I8255A, 0)
MCFG_I8255_IN_PORTA_CB(READ8(*this, wangpc_state, ppi_pa_r))
MCFG_I8255_IN_PORTB_CB(READ8(*this, wangpc_state, ppi_pb_r))
MCFG_I8255_IN_PORTC_CB(READ8(*this, wangpc_state, ppi_pc_r))
MCFG_I8255_OUT_PORTC_CB(WRITE8(*this, wangpc_state, ppi_pc_w))
I8255A(config, m_ppi, 0);
m_ppi->in_pa_callback().set(FUNC(wangpc_state::ppi_pa_r));
m_ppi->in_pb_callback().set(FUNC(wangpc_state::ppi_pb_r));
m_ppi->in_pc_callback().set(FUNC(wangpc_state::ppi_pc_r));
m_ppi->out_pc_callback().set(FUNC(wangpc_state::ppi_pc_w));
MCFG_DEVICE_ADD(I8253_TAG, PIT8253, 0)
MCFG_PIT8253_CLK0(500000)
MCFG_PIT8253_OUT0_HANDLER(WRITELINE(I8259A_TAG, pic8259_device, ir0_w))
MCFG_PIT8253_CLK1(2000000)
MCFG_PIT8253_CLK2(500000)
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, wangpc_state, pit2_w))
PIT8253(config, m_pit, 0);
m_pit->set_clk<0>(500000);
m_pit->out_handler<0>().set(m_pic, FUNC(pic8259_device::ir0_w));
m_pit->set_clk<1>(2000000);
m_pit->set_clk<2>(500000);
m_pit->out_handler<2>().set(FUNC(wangpc_state::pit2_w));
MCFG_IM6402_ADD(IM6402_TAG, 62500*16, 62500*16)
MCFG_IM6402_TRO_CALLBACK(WRITELINE("wangpckb", wangpc_keyboard_device, write_rxd))

29
src/mame/drivers/wicat.cpp
View File

@ -842,31 +842,28 @@ MACHINE_CONFIG_START(wicat_state::wicat)
MCFG_DEVICE_PROGRAM_MAP(wicat_video_mem)
MCFG_DEVICE_IO_MAP(wicat_video_io)
MCFG_INPUT_MERGER_ANY_HIGH("videoirq")
MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("videocpu", INPUT_LINE_IRQ0))
INPUT_MERGER_ANY_HIGH(config, m_videoirq).output_handler().set_inputline(m_videocpu, INPUT_LINE_IRQ0);
MCFG_DEVICE_ADD("videoctrl", LS259, 0)
MCFG_ADDRESSABLE_LATCH_Q0_OUT_CB(WRITELINE(*this, wicat_state, crtc_irq_clear_w))
MCFG_ADDRESSABLE_LATCH_Q6_OUT_CB(WRITELINE("tbreirq", input_merger_device, in_w<1>))
MCFG_ADDRESSABLE_LATCH_Q7_OUT_CB(WRITELINE("dmairq", input_merger_device, in_w<1>))
LS259(config, m_videoctrl);
m_videoctrl->q_out_cb<0>().set(FUNC(wicat_state::crtc_irq_clear_w));
m_videoctrl->q_out_cb<6>().set("tbreirq", FUNC(input_merger_device::in_w<1>));
m_videoctrl->q_out_cb<7>().set("dmairq", FUNC(input_merger_device::in_w<1>));
// Q1-Q5 are all used but unknown
MCFG_DEVICE_ADD("videodma", AM9517A, 8_MHz_XTAL) // clock is a bit of guess
MCFG_AM9517A_OUT_HREQ_CB(WRITELINE(*this, wicat_state, dma_hrq_w))
MCFG_AM9517A_OUT_EOP_CB(WRITELINE("dmairq", input_merger_device, in_w<0>))
MCFG_AM9517A_IN_MEMR_CB(READ8(*this, wicat_state, vram_r))
MCFG_AM9517A_OUT_MEMW_CB(WRITE8(*this, wicat_state, vram_w))
MCFG_AM9517A_OUT_IOW_0_CB(WRITE8("video", i8275_device, dack_w))
AM9517A(config, m_videodma, 8_MHz_XTAL); // clock is a bit of guess
m_videodma->out_hreq_callback().set(FUNC(wicat_state::dma_hrq_w));
m_videodma->out_eop_callback().set("dmairq", FUNC(input_merger_device::in_w<0>));
m_videodma->in_memr_callback().set(FUNC(wicat_state::vram_r));
m_videodma->out_memw_callback().set(FUNC(wicat_state::vram_w));
m_videodma->out_iow_callback<0>().set(m_crtc, FUNC(i8275_device::dack_w));
MCFG_INPUT_MERGER_ALL_HIGH("dmairq")
MCFG_INPUT_MERGER_OUTPUT_HANDLER(INPUTLINE("videocpu", INPUT_LINE_NMI))
INPUT_MERGER_ALL_HIGH(config, "dmairq").output_handler().set_inputline(m_videocpu, INPUT_LINE_NMI);
MCFG_IM6402_ADD("videouart", 0, 1200)
MCFG_IM6402_DR_CALLBACK(WRITELINE("videoirq", input_merger_device, in_w<2>))
MCFG_IM6402_TBRE_CALLBACK(WRITELINE("tbreirq", input_merger_device, in_w<0>))
MCFG_INPUT_MERGER_ALL_HIGH("tbreirq")
MCFG_INPUT_MERGER_OUTPUT_HANDLER(WRITELINE("videoirq", input_merger_device, in_w<3>))
INPUT_MERGER_ALL_HIGH(config, "tbreirq").output_handler().set(m_videoirq, FUNC(input_merger_device::in_w<3>));
// terminal (2x INS2651, 1x IM6042 - one of these is for the keyboard, another communicates with the main board, the third is unknown)
MCFG_DEVICE_ADD("videouart0", MC2661, 5.0688_MHz_XTAL) // the INS2651 looks similar enough to the MC2661...

3
src/mame/includes/pc1512.h
View File

@ -38,7 +38,6 @@
#define INS8250_TAG "ic106"
#define AMS40041_TAG "ic126"
#define CENTRONICS_TAG "centronics"
#define SPEAKER_TAG "speaker"
#define ISA_BUS_TAG "isa"
#define RS232_TAG "rs232"
#define SCREEN_TAG "screen"
@ -57,7 +56,7 @@ public:
m_uart(*this, INS8250_TAG),
m_centronics(*this, CENTRONICS_TAG),
m_cent_data_out(*this, "cent_data_out"),
m_speaker(*this, SPEAKER_TAG),
m_speaker(*this, "speaker"),
m_kb(*this, PC1512_KEYBOARD_TAG),
m_ram(*this, RAM_TAG),
m_floppy0(*this, PC_FDC_XT_TAG ":0:525dd" ),

40
src/mame/includes/pc88va.h
View File

@ -35,23 +35,6 @@
struct tsp_t
{
uint16_t tvram_vreg_offset;
uint16_t attr_offset;
uint16_t spr_offset;
uint8_t disp_on;
uint8_t spr_on;
uint8_t pitch;
uint8_t line_height;
uint8_t h_line_pos;
uint8_t blink;
uint16_t cur_pos_x,cur_pos_y;
uint8_t curn;
uint8_t curn_blink;
};
class pc88va_state : public driver_device
{
public:
@ -64,8 +47,8 @@ public:
TIMER_PC88VA_FDC_MOTOR_START_1
};
pc88va_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
pc88va_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_screen(*this, "screen"),
m_fdc(*this, "upd765"),
@ -79,10 +62,27 @@ public:
m_gvram(*this, "gvram"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette")
{ }
{ }
void pc88va(machine_config &config);
protected:
struct tsp_t
{
uint16_t tvram_vreg_offset;
uint16_t attr_offset;
uint16_t spr_offset;
uint8_t disp_on;
uint8_t spr_on;
uint8_t pitch;
uint8_t line_height;
uint8_t h_line_pos;
uint8_t blink;
uint16_t cur_pos_x,cur_pos_y;
uint8_t curn;
uint8_t curn_blink;
};
virtual void machine_start() override;
virtual void machine_reset() override;
virtual void video_start() override;

64
src/mame/machine/apollo.cpp
View File

@ -1049,40 +1049,40 @@ static void apollo_isa_cards(device_slot_interface &device)
MACHINE_CONFIG_START(apollo_state::common)
// configuration MUST be reset first !
MCFG_DEVICE_ADD(APOLLO_CONF_TAG, APOLLO_CONF, 0)
APOLLO_CONF(config, APOLLO_CONF_TAG, 0);
MCFG_DEVICE_ADD(APOLLO_DMA1_TAG, AM9517A, 14.318181_MHz_XTAL / 3)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, apollo_state, apollo_dma_1_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, apollo_state, apollo_dma8237_out_eop))
MCFG_I8237_IN_MEMR_CB(READ8(*this, apollo_state, apollo_dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, apollo_state, apollo_dma_write_byte))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, apollo_state, pc_dma8237_0_dack_r))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, apollo_state, pc_dma8237_1_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, apollo_state, pc_dma8237_2_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, apollo_state, pc_dma8237_3_dack_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, apollo_state, pc_dma8237_0_dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, apollo_state, pc_dma8237_1_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, apollo_state, pc_dma8237_2_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, apollo_state, pc_dma8237_3_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, apollo_state, pc_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, apollo_state, pc_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, apollo_state, pc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, apollo_state, pc_dack3_w))
AM9517A(config, m_dma8237_1, 14.318181_MHz_XTAL / 3);
m_dma8237_1->out_hreq_callback().set(FUNC(apollo_state::apollo_dma_1_hrq_changed));
m_dma8237_1->out_eop_callback().set(FUNC(apollo_state::apollo_dma8237_out_eop));
m_dma8237_1->in_memr_callback().set(FUNC(apollo_state::apollo_dma_read_byte));
m_dma8237_1->out_memw_callback().set(FUNC(apollo_state::apollo_dma_write_byte));
m_dma8237_1->in_ior_callback<0>().set(FUNC(apollo_state::pc_dma8237_0_dack_r));
m_dma8237_1->in_ior_callback<1>().set(FUNC(apollo_state::pc_dma8237_1_dack_r));
m_dma8237_1->in_ior_callback<2>().set(FUNC(apollo_state::pc_dma8237_2_dack_r));
m_dma8237_1->in_ior_callback<3>().set(FUNC(apollo_state::pc_dma8237_3_dack_r));
m_dma8237_1->out_iow_callback<0>().set(FUNC(apollo_state::pc_dma8237_0_dack_w));
m_dma8237_1->out_iow_callback<1>().set(FUNC(apollo_state::pc_dma8237_1_dack_w));
m_dma8237_1->out_iow_callback<2>().set(FUNC(apollo_state::pc_dma8237_2_dack_w));
m_dma8237_1->out_iow_callback<3>().set(FUNC(apollo_state::pc_dma8237_3_dack_w));
m_dma8237_1->out_dack_callback<0>().set(FUNC(apollo_state::pc_dack0_w));
m_dma8237_1->out_dack_callback<1>().set(FUNC(apollo_state::pc_dack1_w));
m_dma8237_1->out_dack_callback<2>().set(FUNC(apollo_state::pc_dack2_w));
m_dma8237_1->out_dack_callback<3>().set(FUNC(apollo_state::pc_dack3_w));
MCFG_DEVICE_ADD(APOLLO_DMA2_TAG, AM9517A, 14.318181_MHz_XTAL / 3)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, apollo_state, apollo_dma_2_hrq_changed))
MCFG_I8237_IN_MEMR_CB(READ8(*this, apollo_state, apollo_dma_read_word))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, apollo_state, apollo_dma_write_word))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, apollo_state, pc_dma8237_5_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, apollo_state, pc_dma8237_6_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, apollo_state, pc_dma8237_7_dack_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, apollo_state, pc_dma8237_5_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, apollo_state, pc_dma8237_6_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, apollo_state, pc_dma8237_7_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, apollo_state, pc_dack4_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, apollo_state, pc_dack5_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, apollo_state, pc_dack6_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, apollo_state, pc_dack7_w))
AM9517A(config, m_dma8237_2, 14.318181_MHz_XTAL / 3);
m_dma8237_2->out_hreq_callback().set(FUNC(apollo_state::apollo_dma_2_hrq_changed));
m_dma8237_2->in_memr_callback().set(FUNC(apollo_state::apollo_dma_read_word));
m_dma8237_2->out_memw_callback().set(FUNC(apollo_state::apollo_dma_write_word));
m_dma8237_2->in_ior_callback<1>().set(FUNC(apollo_state::pc_dma8237_5_dack_r));
m_dma8237_2->in_ior_callback<2>().set(FUNC(apollo_state::pc_dma8237_6_dack_r));
m_dma8237_2->in_ior_callback<3>().set(FUNC(apollo_state::pc_dma8237_7_dack_r));
m_dma8237_2->out_iow_callback<1>().set(FUNC(apollo_state::pc_dma8237_5_dack_w));
m_dma8237_2->out_iow_callback<2>().set(FUNC(apollo_state::pc_dma8237_6_dack_w));
m_dma8237_2->out_iow_callback<3>().set(FUNC(apollo_state::pc_dma8237_7_dack_w));
m_dma8237_2->out_dack_callback<0>().set(FUNC(apollo_state::pc_dack4_w));
m_dma8237_2->out_dack_callback<1>().set(FUNC(apollo_state::pc_dack5_w));
m_dma8237_2->out_dack_callback<2>().set(FUNC(apollo_state::pc_dack6_w));
m_dma8237_2->out_dack_callback<3>().set(FUNC(apollo_state::pc_dack7_w));
PIC8259(config, m_pic8259_master, 0);
m_pic8259_master->out_int_callback().set(FUNC(apollo_state::apollo_pic8259_master_set_int_line));

68
src/mame/machine/at.cpp
View File

@ -19,8 +19,8 @@
DEFINE_DEVICE_TYPE(AT_MB, at_mb_device, "at_mb", "PC/AT Motherboard")
at_mb_device::at_mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, AT_MB, tag, owner, clock),
at_mb_device::at_mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, AT_MB, tag, owner, clock),
m_maincpu(*this, ":maincpu"),
m_isabus(*this, "isabus"),
m_pic8259_slave(*this, "pic8259_slave"),
@ -61,39 +61,39 @@ MACHINE_CONFIG_START(at_mb_device::device_add_mconfig)
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, at_mb_device, pit8254_out2_changed))
MCFG_DEVICE_ADD("dma8237_1", AM9517A, 14.318181_MHz_XTAL / 3)
MCFG_I8237_OUT_HREQ_CB(WRITELINE("dma8237_2", am9517a_device, dreq0_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, at_mb_device, dma8237_out_eop))
MCFG_I8237_IN_MEMR_CB(READ8(*this, at_mb_device, dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, at_mb_device, dma_write_byte))
MCFG_I8237_IN_IOR_0_CB(READ8(*this, at_mb_device, dma8237_0_dack_r))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, at_mb_device, dma8237_1_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, at_mb_device, dma8237_2_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, at_mb_device, dma8237_3_dack_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8(*this, at_mb_device, dma8237_0_dack_w))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, at_mb_device, dma8237_1_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, at_mb_device, dma8237_2_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, at_mb_device, dma8237_3_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, at_mb_device, dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, at_mb_device, dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, at_mb_device, dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, at_mb_device, dack3_w))
AM9517A(config, m_dma8237_1, 14.318181_MHz_XTAL / 3);
m_dma8237_1->out_hreq_callback().set(m_dma8237_2, FUNC(am9517a_device::dreq0_w));
m_dma8237_1->out_eop_callback().set(FUNC(at_mb_device::dma8237_out_eop));
m_dma8237_1->in_memr_callback().set(FUNC(at_mb_device::dma_read_byte));
m_dma8237_1->out_memw_callback().set(FUNC(at_mb_device::dma_write_byte));
m_dma8237_1->in_ior_callback<0>().set(FUNC(at_mb_device::dma8237_0_dack_r));
m_dma8237_1->in_ior_callback<1>().set(FUNC(at_mb_device::dma8237_1_dack_r));
m_dma8237_1->in_ior_callback<2>().set(FUNC(at_mb_device::dma8237_2_dack_r));
m_dma8237_1->in_ior_callback<3>().set(FUNC(at_mb_device::dma8237_3_dack_r));
m_dma8237_1->out_iow_callback<0>().set(FUNC(at_mb_device::dma8237_0_dack_w));
m_dma8237_1->out_iow_callback<1>().set(FUNC(at_mb_device::dma8237_1_dack_w));
m_dma8237_1->out_iow_callback<2>().set(FUNC(at_mb_device::dma8237_2_dack_w));
m_dma8237_1->out_iow_callback<3>().set(FUNC(at_mb_device::dma8237_3_dack_w));
m_dma8237_1->out_dack_callback<0>().set(FUNC(at_mb_device::dack0_w));
m_dma8237_1->out_dack_callback<1>().set(FUNC(at_mb_device::dack1_w));
m_dma8237_1->out_dack_callback<2>().set(FUNC(at_mb_device::dack2_w));
m_dma8237_1->out_dack_callback<3>().set(FUNC(at_mb_device::dack3_w));
MCFG_DEVICE_ADD( "dma8237_2", AM9517A, 14.318181_MHz_XTAL / 3)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, at_mb_device, dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, at_mb_device, dma8237_2_out_eop))
MCFG_I8237_IN_MEMR_CB(READ8(*this, at_mb_device, dma_read_word))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, at_mb_device, dma_write_word))
MCFG_I8237_IN_IOR_1_CB(READ8(*this, at_mb_device, dma8237_5_dack_r))
MCFG_I8237_IN_IOR_2_CB(READ8(*this, at_mb_device, dma8237_6_dack_r))
MCFG_I8237_IN_IOR_3_CB(READ8(*this, at_mb_device, dma8237_7_dack_r))
MCFG_I8237_OUT_IOW_1_CB(WRITE8(*this, at_mb_device, dma8237_5_dack_w))
MCFG_I8237_OUT_IOW_2_CB(WRITE8(*this, at_mb_device, dma8237_6_dack_w))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(*this, at_mb_device, dma8237_7_dack_w))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, at_mb_device, dack4_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, at_mb_device, dack5_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, at_mb_device, dack6_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, at_mb_device, dack7_w))
AM9517A(config, m_dma8237_2, 14.318181_MHz_XTAL / 3);
m_dma8237_2->out_hreq_callback().set(FUNC(at_mb_device::dma_hrq_changed));
m_dma8237_2->out_eop_callback().set(FUNC(at_mb_device::dma8237_2_out_eop));
m_dma8237_2->in_memr_callback().set(FUNC(at_mb_device::dma_read_word));
m_dma8237_2->out_memw_callback().set(FUNC(at_mb_device::dma_write_word));
m_dma8237_2->in_ior_callback<1>().set(FUNC(at_mb_device::dma8237_5_dack_r));
m_dma8237_2->in_ior_callback<2>().set(FUNC(at_mb_device::dma8237_6_dack_r));
m_dma8237_2->in_ior_callback<3>().set(FUNC(at_mb_device::dma8237_7_dack_r));
m_dma8237_2->out_iow_callback<1>().set(FUNC(at_mb_device::dma8237_5_dack_w));
m_dma8237_2->out_iow_callback<2>().set(FUNC(at_mb_device::dma8237_6_dack_w));
m_dma8237_2->out_iow_callback<3>().set(FUNC(at_mb_device::dma8237_7_dack_w));
m_dma8237_2->out_dack_callback<0>().set(FUNC(at_mb_device::dack4_w));
m_dma8237_2->out_dack_callback<1>().set(FUNC(at_mb_device::dack5_w));
m_dma8237_2->out_dack_callback<2>().set(FUNC(at_mb_device::dack6_w));
m_dma8237_2->out_dack_callback<3>().set(FUNC(at_mb_device::dack7_w));
pic8259_device &pic8259_master(PIC8259(config, "pic8259_master", 0));
pic8259_master.out_int_callback().set_inputline(":maincpu", 0);

24
src/mame/machine/isbc_208.cpp
View File

@ -32,25 +32,25 @@ static void isbc_208_floppies(device_slot_interface &device)
}
MACHINE_CONFIG_START(isbc_208_device::device_add_mconfig)
MCFG_DEVICE_ADD("dmac", AM9517A, XTAL(8'000'000)/4)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, isbc_208_device, hreq_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(*this, isbc_208_device, out_eop_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, isbc_208_device, dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, isbc_208_device, dma_write_byte))
MCFG_I8237_IN_IOR_0_CB(READ8("fdc", i8272a_device, mdma_r))
MCFG_I8237_OUT_IOW_0_CB(WRITE8("fdc", i8272a_device, mdma_w))
AM9517A(config, m_dmac, 8_MHz_XTAL/4);
m_dmac->out_hreq_callback().set(FUNC(isbc_208_device::hreq_w));
m_dmac->out_eop_callback().set(FUNC(isbc_208_device::out_eop_w));
m_dmac->in_memr_callback().set(FUNC(isbc_208_device::dma_read_byte));
m_dmac->out_memw_callback().set(FUNC(isbc_208_device::dma_write_byte));
m_dmac->in_ior_callback<0>().set(m_fdc, FUNC(i8272a_device::mdma_r));
m_dmac->out_iow_callback<0>().set(m_fdc, FUNC(i8272a_device::mdma_w));
MCFG_I8272A_ADD("fdc", true)
MCFG_I8272A_ADD(m_fdc, true)
MCFG_UPD765_INTRQ_CALLBACK(WRITELINE(*this, isbc_208_device, irq_w))
MCFG_UPD765_DRQ_CALLBACK(WRITELINE("dmac", am9517a_device, dreq0_w))
MCFG_FLOPPY_DRIVE_ADD("fdc:0", isbc_208_floppies, "525dd", isbc_208_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", isbc_208_floppies, "525dd", isbc_208_device::floppy_formats)
FLOPPY_CONNECTOR(config, "fdc:0", isbc_208_floppies, "525dd", isbc_208_device::floppy_formats);
FLOPPY_CONNECTOR(config, "fdc:1", isbc_208_floppies, "525dd", isbc_208_device::floppy_formats);
MACHINE_CONFIG_END
void isbc_208_device::map(address_map &map)
{
map(0x00, 0x0f).rw("dmac", FUNC(am9517a_device::read), FUNC(am9517a_device::write));
map(0x10, 0x11).m("fdc", FUNC(i8272a_device::map));
map(0x00, 0x0f).rw(m_dmac, FUNC(am9517a_device::read), FUNC(am9517a_device::write));
map(0x10, 0x11).m(m_fdc, FUNC(i8272a_device::map));
map(0x12, 0x15).rw(FUNC(isbc_208_device::stat_r), FUNC(isbc_208_device::aux_w));
}

12
src/mame/machine/isbc_208.h
View File

@ -1,6 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Carl
#ifndef MAME_MACHINE_ISBC_208_H
#define MAME_MACHINE_ISBC_208_H
@ -13,8 +12,8 @@ class isbc_208_device : public device_t
{
public:
template <typename T>
isbc_208_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu_tag)
: isbc_208_device(mconfig, tag, owner, (uint32_t)0)
isbc_208_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag)
: isbc_208_device(mconfig, tag, owner, clock)
{
m_maincpu.set_tag(std::forward<T>(cpu_tag));
}
@ -25,7 +24,7 @@ public:
DECLARE_READ8_MEMBER(stat_r);
DECLARE_WRITE8_MEMBER(aux_w);
template <class Object> devcb_base &set_irq_callback(Object &&cb) { return m_out_irq_func.set_callback(std::forward<Object>(cb)); }
auto irq_callback() { return m_out_irq_func.bind(); }
protected:
virtual void device_start() override;
@ -47,12 +46,9 @@ private:
DECLARE_READ8_MEMBER(dma_read_byte);
DECLARE_WRITE8_MEMBER(dma_write_byte);
DECLARE_WRITE_LINE_MEMBER(irq_w);
DECLARE_FLOPPY_FORMATS( floppy_formats );
DECLARE_FLOPPY_FORMATS(floppy_formats);
};
#define MCFG_ISBC_208_IRQ(_irq_line) \
downcast<isbc_208_device &>(*device).set_irq_callback(DEVCB_##_irq_line);
DECLARE_DEVICE_TYPE(ISBC_208, isbc_208_device)
#endif // MAME_MACHINE_ISBC_208_H

15
src/mame/machine/isbc_215g.h
View File

@ -1,6 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Carl
#ifndef MAME_MACHINE_ISBC_215G_H
#define MAME_MACHINE_ISBC_215G_H
@ -14,8 +13,8 @@ class isbc_215g_device : public device_t
{
public:
template <typename T>
isbc_215g_device(const machine_config &mconfig, const char *tag, device_t *owner, uint16_t wakeup, T &&cpu_tag)
: isbc_215g_device(mconfig, tag, owner, (uint32_t)0)
isbc_215g_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint16_t wakeup, T &&cpu_tag)
: isbc_215g_device(mconfig, tag, owner, clock)
{
m_wakeup = wakeup;
m_maincpu.set_tag(std::forward<T>(cpu_tag));
@ -23,7 +22,7 @@ public:
isbc_215g_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
template <class Object> devcb_base &set_irq_callback(Object &&cb) { return m_out_irq_func.set_callback(std::forward<Object>(cb)); }
auto irq_callback() { return m_out_irq_func.bind(); }
DECLARE_WRITE8_MEMBER(write);
DECLARE_READ16_MEMBER(io_r);
@ -31,14 +30,15 @@ public:
DECLARE_READ16_MEMBER(mem_r);
DECLARE_WRITE16_MEMBER(mem_w);
void isbc_215g_io(address_map &map);
void isbc_215g_mem(address_map &map);
protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
const tiny_rom_entry *device_rom_region() const override;
void isbc_215g_io(address_map &map);
void isbc_215g_mem(address_map &map);
private:
void find_sector();
uint16_t read_sector();
@ -84,9 +84,6 @@ private:
DECLARE_WRITE_LINE_MEMBER(isbx_irq_11_w);
};
#define MCFG_ISBC_215_IRQ(_irq_line) \
downcast<isbc_215g_device &>(*device).set_irq_callback(DEVCB_##_irq_line);
DECLARE_DEVICE_TYPE(ISBC_215G, isbc_215g_device)
#endif // MAME_MACHINE_ISBC_215G_H

43
src/mame/machine/m1comm.cpp
View File

@ -56,8 +56,6 @@ Notes:
#include "emuopts.h"
#define Z80_TAG "commcpu"
#define DMA_TAG "commdma"
#define DLC_TAG "commdlc"
/*************************************
* M1COMM Memory Map
@ -104,26 +102,27 @@ DEFINE_DEVICE_TYPE(M1COMM, m1comm_device, "m1comm", "Model-1 Communication Board
// device_add_mconfig - add device configuration
//-------------------------------------------------
MACHINE_CONFIG_START(m1comm_device::device_add_mconfig)
MCFG_DEVICE_ADD(Z80_TAG, Z80, 8000000) /* 32 MHz / 4 */
MCFG_DEVICE_PROGRAM_MAP(m1comm_mem)
MCFG_DEVICE_IO_MAP(m1comm_io)
void m1comm_device::device_add_mconfig(machine_config &config)
{
Z80(config, m_cpu, 8000000); // 32 MHz / 4
m_cpu->set_memory_map(&m1comm_device::m1comm_mem);
m_cpu->set_io_map(&m1comm_device::m1comm_io);
MCFG_DEVICE_ADD(DMA_TAG, AM9517A, 8000000) /* 32 MHz / 4 */
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, m1comm_device, dma_hreq_w))
MCFG_I8237_IN_MEMR_CB(READ8(*this, m1comm_device, dma_mem_r))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, m1comm_device, dma_mem_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(DLC_TAG, mb89374_device, pi3_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(DLC_TAG, mb89374_device, pi2_w))
MCFG_I8237_OUT_EOP_CB(WRITELINE(DLC_TAG, mb89374_device, ci_w))
MCFG_I8237_IN_IOR_2_CB(READ8(DLC_TAG, mb89374_device, dma_r))
MCFG_I8237_OUT_IOW_3_CB(WRITE8(DLC_TAG, mb89374_device, dma_w))
AM9517A(config, m_dma, 8000000); // 32 MHz / 4
m_dma->out_hreq_callback().set(FUNC(m1comm_device::dma_hreq_w));
m_dma->in_memr_callback().set(FUNC(m1comm_device::dma_mem_r));
m_dma->out_memw_callback().set(FUNC(m1comm_device::dma_mem_w));
m_dma->out_dack_callback<2>().set(m_dlc, FUNC(mb89374_device::pi3_w));
m_dma->out_dack_callback<3>().set(m_dlc, FUNC(mb89374_device::pi2_w));
m_dma->out_eop_callback().set(m_dlc, FUNC(mb89374_device::ci_w));
m_dma->in_ior_callback<2>().set(m_dlc, FUNC(mb89374_device::dma_r));
m_dma->out_iow_callback<3>().set(m_dlc, FUNC(mb89374_device::dma_w));
MCFG_DEVICE_ADD(DLC_TAG, MB89374, 8000000) /* 32 MHz / 4 */
MCFG_MB89374_PO2_CB(WRITELINE(DMA_TAG, am9517a_device, dreq3_w))
MCFG_MB89374_PO3_CB(WRITELINE(DMA_TAG, am9517a_device, dreq2_w))
MCFG_MB89374_IRQ_CB(WRITELINE(*this, m1comm_device, dlc_int7_w))
MACHINE_CONFIG_END
MB89374(config, m_dlc, 8000000); // 32 MHz / 4
m_dlc->out_po_callback<2>().set(m_dma, FUNC(am9517a_device::dreq3_w));
m_dlc->out_po_callback<3>().set(m_dma, FUNC(am9517a_device::dreq2_w));
m_dlc->out_irq_callback().set(FUNC(m1comm_device::dlc_int7_w));
}
//-------------------------------------------------
// rom_region - device-specific ROM region
@ -144,8 +143,8 @@ const tiny_rom_entry *m1comm_device::device_rom_region() const
m1comm_device::m1comm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, M1COMM, tag, owner, clock),
m_cpu(*this, Z80_TAG),
m_dma(*this, DMA_TAG),
m_dlc(*this, DLC_TAG)
m_dma(*this, "commdma"),
m_dlc(*this, "commdlc")
{
#ifdef M1COMM_SIMULATION
// prepare localhost "filename"

65
src/mame/machine/pcshare.cpp
View File

@ -187,41 +187,42 @@ MACHINE_CONFIG_START(pcat_base_state::pcvideo_cirrus_gd5430)
MCFG_VIDEO_SET_SCREEN("screen")
MACHINE_CONFIG_END
MACHINE_CONFIG_START(pcat_base_state::pcat_common)
MCFG_DEVICE_ADD("pic8259_1", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(INPUTLINE("maincpu", 0))
MCFG_PIC8259_IN_SP_CB(CONSTANT(1))
MCFG_PIC8259_CASCADE_ACK_CB(READ8(*this, pcat_base_state, get_slave_ack))
void pcat_base_state::pcat_common(machine_config &config)
{
PIC8259(config, m_pic8259_1, 0);
m_pic8259_1->out_int_callback().set_inputline(m_maincpu, 0);
m_pic8259_1->in_sp_callback().set_constant(1);
m_pic8259_1->read_slave_ack_callback().set(FUNC(pcat_base_state::get_slave_ack));
MCFG_DEVICE_ADD("pic8259_2", PIC8259, 0)
MCFG_PIC8259_OUT_INT_CB(WRITELINE("pic8259_1", pic8259_device, ir2_w))
MCFG_PIC8259_IN_SP_CB(CONSTANT(0))
PIC8259(config, m_pic8259_2, 0);
m_pic8259_2->out_int_callback().set(m_pic8259_1, FUNC(pic8259_device::ir2_w));
m_pic8259_2->in_sp_callback().set_constant(0);
MCFG_DEVICE_ADD("dma8237_1", AM9517A, 14.318181_MHz_XTAL / 3)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(*this, pcat_base_state, pc_dma_hrq_changed))
MCFG_I8237_IN_MEMR_CB(READ8(*this, pcat_base_state, pc_dma_read_byte))
MCFG_I8237_OUT_MEMW_CB(WRITE8(*this, pcat_base_state, pc_dma_write_byte))
MCFG_I8237_OUT_DACK_0_CB(WRITELINE(*this, pcat_base_state, pc_dack0_w))
MCFG_I8237_OUT_DACK_1_CB(WRITELINE(*this, pcat_base_state, pc_dack1_w))
MCFG_I8237_OUT_DACK_2_CB(WRITELINE(*this, pcat_base_state, pc_dack2_w))
MCFG_I8237_OUT_DACK_3_CB(WRITELINE(*this, pcat_base_state, pc_dack3_w))
AM9517A(config, m_dma8237_1, 14.318181_MHz_XTAL / 3);
m_dma8237_1->out_hreq_callback().set(FUNC(pcat_base_state::pc_dma_hrq_changed));
m_dma8237_1->in_memr_callback().set(FUNC(pcat_base_state::pc_dma_read_byte));
m_dma8237_1->out_memw_callback().set(FUNC(pcat_base_state::pc_dma_write_byte));
m_dma8237_1->out_dack_callback<0>().set(FUNC(pcat_base_state::pc_dack0_w));
m_dma8237_1->out_dack_callback<1>().set(FUNC(pcat_base_state::pc_dack1_w));
m_dma8237_1->out_dack_callback<2>().set(FUNC(pcat_base_state::pc_dack2_w));
m_dma8237_1->out_dack_callback<3>().set(FUNC(pcat_base_state::pc_dack3_w));
MCFG_DEVICE_ADD("dma8237_2", AM9517A, 14.318181_MHz_XTAL / 3)
AM9517A(config, m_dma8237_2, 14.318181_MHz_XTAL / 3);
MCFG_DEVICE_ADD("pit8254", PIT8254, 0)
MCFG_PIT8253_CLK0(4772720/4) /* heartbeat IRQ */
MCFG_PIT8253_OUT0_HANDLER(WRITELINE("pic8259_1", pic8259_device, ir0_w))
MCFG_PIT8253_CLK1(4772720/4) /* dram refresh */
MCFG_PIT8253_CLK2(4772720/4) /* pio port c pin 4, and speaker polling enough */
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(*this, pcat_base_state, at_pit8254_out2_changed))
PIT8254(config, m_pit8254, 0);
m_pit8254->set_clk<0>(4772720/4); // heartbeat IRQ
m_pit8254->out_handler<0>().set(m_pic8259_1, FUNC(pic8259_device::ir0_w));
m_pit8254->set_clk<1>(4772720/4); // DRAM refresh
m_pit8254->set_clk<2>(4772720/4); // PIO port C pin 4, and speaker polling enough
m_pit8254->out_handler<2>().set(FUNC(pcat_base_state::at_pit8254_out2_changed));
MCFG_DEVICE_ADD("rtc", MC146818, 32.768_kHz_XTAL)
MCFG_MC146818_IRQ_HANDLER(WRITELINE("pic8259_2", pic8259_device, ir0_w))
MCFG_MC146818_CENTURY_INDEX(0x32)
MC146818(config, m_mc146818, 32.768_kHz_XTAL);
m_mc146818->irq_callback().set(m_pic8259_2, FUNC(pic8259_device::ir0_w));
m_mc146818->set_century_index(0x32);
MCFG_DEVICE_ADD("kbdc", KBDC8042, 0)
MCFG_KBDC8042_KEYBOARD_TYPE(KBDC8042_AT386)
MCFG_KBDC8042_SYSTEM_RESET_CB(INPUTLINE("maincpu", INPUT_LINE_RESET))
MCFG_KBDC8042_GATE_A20_CB(INPUTLINE("maincpu", INPUT_LINE_A20))
MCFG_KBDC8042_INPUT_BUFFER_FULL_CB(WRITELINE("pic8259_1", pic8259_device, ir1_w))
MACHINE_CONFIG_END
KBDC8042(config, m_kbdc, 0);
m_kbdc->set_keyboard_type(kbdc8042_device::KBDC8042_AT386);
m_kbdc->system_reset_callback().set_inputline(m_maincpu, INPUT_LINE_RESET);
m_kbdc->gate_a20_callback().set_inputline(m_maincpu, INPUT_LINE_A20);
m_kbdc->input_buffer_full_callback().set(m_pic8259_1, FUNC(pic8259_device::ir1_w));
}

40
src/mame/machine/pcshare.h
View File

@ -1,5 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:Peter Trauner
#ifndef MAME_MACHINE_PCSHARE_H
#define MAME_MACHINE_PCSHARE_H
#pragma once
#include "machine/am9517a.h"
#include "machine/pic8259.h"
#include "machine/pit8253.h"
@ -9,8 +14,8 @@
class pcat_base_state : public driver_device
{
public:
pcat_base_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
pcat_base_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_dma8237_1(*this, "dma8237_1"),
m_dma8237_2(*this, "dma8237_2"),
@ -22,15 +27,6 @@ public:
{
}
required_device<cpu_device> m_maincpu;
required_device<am9517a_device> m_dma8237_1;
required_device<am9517a_device> m_dma8237_2;
required_device<pic8259_device> m_pic8259_1;
required_device<pic8259_device> m_pic8259_2;
required_device<pit8254_device> m_pit8254;
optional_device<mc146818_device> m_mc146818;
required_device<kbdc8042_device> m_kbdc;
DECLARE_WRITE_LINE_MEMBER(pc_dma_hrq_changed);
DECLARE_READ8_MEMBER(pc_dma_read_byte);
DECLARE_WRITE8_MEMBER(pc_dma_write_byte);
@ -43,10 +39,8 @@ public:
DECLARE_WRITE_LINE_MEMBER( pc_dack3_w );
DECLARE_READ8_MEMBER( get_slave_ack );
DECLARE_WRITE_LINE_MEMBER( at_pit8254_out2_changed );
int m_dma_channel;
uint8_t m_dma_offset[2][4];
uint8_t m_at_pages[0x10];
int m_pit_out2;
protected:
void pcat_common(machine_config &config);
void pcvideo_vga(machine_config &config);
void pcvideo_trident_vga(machine_config &config);
@ -55,4 +49,20 @@ public:
void pcvideo_cirrus_gd5430(machine_config &config);
void pcat32_io_common(address_map &map);
required_device<cpu_device> m_maincpu;
required_device<am9517a_device> m_dma8237_1;
required_device<am9517a_device> m_dma8237_2;
required_device<pic8259_device> m_pic8259_1;
required_device<pic8259_device> m_pic8259_2;
required_device<pit8254_device> m_pit8254;
optional_device<mc146818_device> m_mc146818;
required_device<kbdc8042_device> m_kbdc;
int m_dma_channel;
uint8_t m_dma_offset[2][4];
uint8_t m_at_pages[0x10];
int m_pit_out2;
};
#endif // MAME_MACHINE_PCSHARE_H