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Implemented player-2 inputs

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This commit is contained in:
Angelo Salese 2010-06-16 16:36:09 +00:00
parent cdf7bec80a
commit a2fd54ce47
1 changed files with 82 additions and 141 deletions
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223
src/mame/drivers/pinkiri8.c
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@ -44,23 +44,23 @@ static UINT8* janshi_crtc_regs;
static ADDRESS_MAP_START( janshi_vdp_map8, 0, 8 )
AM_RANGE(0x00000, 0x007ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_split1_w) AM_BASE_GENERIC(paletteram)
AM_RANGE(0x02000, 0x027ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_split2_w) AM_BASE_GENERIC(paletteram2)
AM_RANGE(0x06000, 0x0601f) AM_RAM AM_BASE(&janshi_crtc_regs)
AM_RANGE(0x12000, 0x12fff) AM_RAM AM_BASE(&janshi_vram1)
AM_RANGE(0x13700, 0x137ff) AM_RAM //??
AM_RANGE(0x13800, 0x13fff) AM_RAM AM_BASE(&janshi_vram2)
AM_RANGE(0x20000, 0x21fff) AM_RAM AM_BASE(&janshi_back_vram)
ADDRESS_MAP_END
/* VDP device to give us our own memory map */
class janshi_vdp_device_config : public device_config,
class janshi_vdp_device_config : public device_config,
public device_config_memory_interface
{
friend class janshi_vdp_device;
@ -76,7 +76,7 @@ protected:
address_space_config m_space_config;
};
class janshi_vdp_device : public device_t,
class janshi_vdp_device : public device_t,
public device_memory_interface
{
friend class janshi_vdp_device_config;
@ -110,7 +110,7 @@ device_t *janshi_vdp_device_config::alloc_device(running_machine &machine) const
void janshi_vdp_device_config::device_config_complete()
{
// int address_bits = 24;
// m_space_config = address_space_config("janshi_vdp", ENDIANNESS_BIG, 8, address_bits, 0, *ADDRESS_MAP_NAME(janshi_vdp_map8));
}
@ -359,6 +359,8 @@ static WRITE8_HANDLER( output_regs_w )
if(data & 0x40)
cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
//data & 0x80 is probably NMI mask
popmessage("%02x",data);
}
static int prev_writes = 0;
@ -394,11 +396,11 @@ static WRITE8_HANDLER( pinkiri8_vram_w )
break;
case 3:
const address_space *vdp_space = space->machine->device<janshi_vdp_device>("janshivdp")->space();
const address_space *vdp_space = space->machine->device<janshi_vdp_device>("janshivdp")->space();
if (LOG_VRAM) printf("%02x ", data);
prev_writes++;
vram_addr++;
@ -406,11 +408,11 @@ static WRITE8_HANDLER( pinkiri8_vram_w )
memory_write_byte_8le(vdp_space, (vram_addr) | (vram_bank << 16), data);
//vram[(vram_addr) | (vram_bank << 16)] = data;
/*
vram[(vram_addr) | (vram_bank << 16)] = data;
if(vram_addr <= 0xffff)
{
static UINT16 datax,pal_offs;
@ -439,7 +441,21 @@ static WRITE8_HANDLER( mux_w )
mux_data = data;
}
static READ8_HANDLER( mux1_r )
static READ8_HANDLER( mux_p2_r )
{
switch(mux_data)
{
case 0x01: return input_port_read(space->machine, "PL2_01");
case 0x02: return input_port_read(space->machine, "PL2_02");
case 0x04: return input_port_read(space->machine, "PL2_03");
case 0x08: return input_port_read(space->machine, "PL2_04");
case 0x10: return input_port_read(space->machine, "PL2_05");
}
return 0xff;
}
static READ8_HANDLER( mux_p1_r )
{
switch(mux_data)
{
@ -453,20 +469,6 @@ static READ8_HANDLER( mux1_r )
return 0xff;
}
static READ8_HANDLER( mux2_r )
{
switch(mux_data)
{
case 0x01: return input_port_read(space->machine, "PL1_06");
case 0x02: return input_port_read(space->machine, "PL1_07");
case 0x04: return input_port_read(space->machine, "PL1_08");
case 0x08: return input_port_read(space->machine, "PL1_09");
case 0x10: return input_port_read(space->machine, "PL1_10");
}
return 0xff;
}
static ADDRESS_MAP_START( pinkiri8_io, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x3f) AM_RAM //Z180 internal I/O
@ -475,8 +477,8 @@ static ADDRESS_MAP_START( pinkiri8_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0xa0, 0xa0) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w ) //correct?
AM_RANGE(0xb0, 0xb0) AM_WRITE(mux_w) //mux
AM_RANGE(0xb0, 0xb0) AM_READ(mux1_r) // mux inputs
AM_RANGE(0xb1, 0xb1) AM_READ(mux2_r) // mux inputs
AM_RANGE(0xb0, 0xb0) AM_READ(mux_p2_r) // mux inputs
AM_RANGE(0xb1, 0xb1) AM_READ(mux_p1_r) // mux inputs
AM_RANGE(0xb2, 0xb2) AM_READ_PORT("SYSTEM")
AM_RANGE(0xf8, 0xf8) AM_READ_PORT("DSW1")
AM_RANGE(0xf9, 0xf9) AM_READ_PORT("DSW2")
@ -514,108 +516,7 @@ static INPUT_PORTS_START( pinkiri8 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
/* what are these for? */
PORT_START("PL1_01")
PORT_DIPNAME( 0x01, 0x01, "PL1_1" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("PL1_02")
PORT_DIPNAME( 0x01, 0x01, "PL1_2" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("PL1_03")
PORT_DIPNAME( 0x01, 0x01, "PL1_3" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("PL1_04")
PORT_DIPNAME( 0x01, 0x01, "PL1_4" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("PL1_05")
PORT_DIPNAME( 0x01, 0x01, "PL1_5" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("PL1_06")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I )
@ -623,7 +524,7 @@ static INPUT_PORTS_START( pinkiri8 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
PORT_START("PL1_07")
PORT_START("PL1_02")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J )
@ -631,7 +532,7 @@ static INPUT_PORTS_START( pinkiri8 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_BET )
PORT_START("PL1_08")
PORT_START("PL1_03")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K )
@ -639,7 +540,7 @@ static INPUT_PORTS_START( pinkiri8 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_RON )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("PL1_09")
PORT_START("PL1_04")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L )
@ -647,7 +548,7 @@ static INPUT_PORTS_START( pinkiri8 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("PL1_10")
PORT_START("PL1_05")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP )
@ -655,6 +556,46 @@ static INPUT_PORTS_START( pinkiri8 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_BIG )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL )
PORT_START("PL2_01")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_PLAYER(2)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_PLAYER(2)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_PLAYER(2)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
PORT_START("PL2_02")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_PLAYER(2)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_PLAYER(2)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_PLAYER(2)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_PLAYER(2)
PORT_START("PL2_03")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_PLAYER(2)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_PLAYER(2)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_PLAYER(2)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("PL2_04")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_PLAYER(2)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_PLAYER(2)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("PL2_05")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) PORT_PLAYER(2)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) PORT_PLAYER(2)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) PORT_PLAYER(2)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) PORT_PLAYER(2)
PORT_START("DSW1")
PORT_DIPNAME( 0x01, 0x01, "DSW1" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
@ -808,7 +749,7 @@ static INPUT_PORTS_START( janshi )
PORT_DIPNAME( 0x40, 0x40, "Nudity" ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )