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https://github.com/holub/mame
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Apple Laserwriter II NT: Updated driver quite a bit, improved the overlay emulation and ram mapping, passes more self tests, added as much info about memory maps as could be easily derived without PAL dumps. [Lord Nightmare]
This commit is contained in:
Lord-Nightmare
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d1974dda9e
commit
a7f9dcd63b
@ -1,22 +1,39 @@
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// license:BSD-3-Clause
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// copyright-holders:Joakim Larsson Edstrom
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// copyright-holders:Joakim Larsson Edstrom, Jonathan Gevaryahu
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/******************************************************************************
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Apple LaserWriter II NT driver
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TODO:
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- Figure out what VIA pins is connected to switch on front that selects LocalTalk
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- Let the board identify itself to a emulated mac driver so it displays the printer icon on the desktop
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- Get the board to pass its self test, it fails long before it even bothers reading the dipswitches
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- Hook up SCC and VIA interrupt pins to the 68k
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- Hook up the rest of the VIA pins to a canon printer HLE stub
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- Hook up ADB bitbang device to the VIA CB1, CB2 and PortA pins
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- Hook up VIA Port A, bits 5 and 6 to the SW1 and SW2 panel switches
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- Everything else
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Future:
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- Let the board identify itself to a emulated mac driver so it displays the printer icon on the desktop
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Self Test LEDs at 0x800000-800001 most significant nybble:
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0x8 - <Passes> cpu check? (displayed before the overlay is disabled)
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0xF - <Passes> 200000-3fffff ROM checksum
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0xE - <Passes> 400000-400007 Low half of DRAM individual bit tests (walking ones and zeroes)
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0xD - <Passes> 5ffff8-5fffff High half of DRAM individual bit tests (walking ones and zeroes)
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0xC - <Passes> 400000-5fffff comprehensive DRAM data test
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0xB - <Passes?> Unknown test
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0xA - <Hacked to pass, not understood> dies if something to do with 600000-7fffff doesn't mirror 400000-5fffff ?
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0x8 - <Fails> Unknown test
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If one of the self tests fails, the uppermost bit will oscillate (c000 4000 c000 4000 etc) forever
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******************************************************************************/
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/*
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* Hardware: 68000@11.16 MHz
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8530 SCC
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6523 TPI or 6522 VIA on newer pcb:s
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65C22 VIA on newer pcbs (older pcbs might have a 6523/6525 TPI but the pinout is completely different?)
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2MB DRAM
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2KB SRAM
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custom 335-0022 EEPROM
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X2804 EEPROM (custom marked as 335-0022) [note that technically a 2808 or 2816 can go here and will work too]
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1MB ROM
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+------------------------------------------------------------------------------------------------------------------------+=====+
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@ -79,9 +96,19 @@ public:
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, m_maincpu(*this, "maincpu")
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, m_scc(*this, "scc")
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, m_via(*this, "via")
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, m_overlay(1)
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{ }
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DECLARE_READ16_MEMBER (bootvect_r);
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DECLARE_WRITE16_MEMBER (bootvect_w);
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DECLARE_READ16_MEMBER(bankedarea_r);
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DECLARE_WRITE16_MEMBER(bankedarea_w);
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DECLARE_WRITE8_MEMBER(led_w);
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DECLARE_READ8_MEMBER(via_pa_r);
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DECLARE_WRITE8_MEMBER(via_pa_w);
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DECLARE_WRITE_LINE_MEMBER(via_ca2_w);
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DECLARE_READ8_MEMBER(via_pb_r);
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DECLARE_WRITE8_MEMBER(via_pb_w);
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DECLARE_WRITE_LINE_MEMBER(via_cb1_w);
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DECLARE_WRITE_LINE_MEMBER(via_cb2_w);
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DECLARE_WRITE_LINE_MEMBER(via_int_w);
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virtual void machine_start () override;
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virtual void machine_reset () override;
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private:
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@ -95,32 +122,89 @@ private:
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required_device<via6522_device> m_via;
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#endif
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// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
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uint16_t *m_sysrom;
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uint16_t m_sysram[2];
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//
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bool m_overlay;
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};
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/*
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Address maps (x = ignored; * = selects address within this range)
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68k address map:
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a23 a22 a21 a20 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 (a0 via UDS/LDS)
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* * * PAL16R6 U80
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* * * * * * decoded by pals
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0 0 A * * * * * * * * * * * * * * * * * * * * * R ROM
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0 0 A 0 0 0 * * * * * * * * * * * * * * * * * * R ROMEN1
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0 0 A 0 0 1 * * * * * * * * * * * * * * * * * * R ROMEN2
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0 0 A 0 1 0 * * * * * * * * * * * * * * * * * * R ROMEN3
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0 0 A 0 1 1 * * * * * * * * * * * * * * * * * * R ROMEN4
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0 0 A 1 x x x x x x x x x x x x x x x x x x x x OPEN BUS
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0 1 * * * * * * * * * * * * * * * * * * * * * * RW DRAM
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1 0 0 ? ? ? x x x x x x x x x x x x x x x x x 1 W Status LEDs and mech
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1 0 1 ? ? ? x x x x x x x x x x x x x x x * * 1 R 8530 SCC Read
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1 1 0 ? ? ? x x x x x x x x x x x x x x x * * 0 W 8530 SCC Write
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1 1 1 ?x? ?0? ? x x x x x x x x x x x x x * * * * 0 RW 65C22 VIA
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1 1 1 ?x? ?1? ? x x x x x x x x x x x x x * * * * 0 RW debugger rom/pod area
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TODO:
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? ? ? ? ? ? x x x x x x * * * * * * * * * * * * RW SRAM
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? ? ? ? ? ? x x x x x x (*) (*) * * * * * * * * * 1 RW 2804 EEPROM
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(technically a10 and a11 are ignored, but if a 2808 or 2816 is put in this spot the address lines do connect to the appropriate pins)
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| | | | |
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map when overlay is set, i.e. A above is considered 'x':
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000000-1fffff ROM (second half is open bus)
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200000-3fffff ROM (second half is open bus)
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400000-5fffff DRAM?
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600000-7fffff unknown
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800000-83ffff LEDs and status bits to printer mechanism
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840000-9fffff unknown
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a00000-a3ffff SCC read
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a40000-bfffff unknown
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c00000-c3ffff SCC write
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c40000-dfffff unknown
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e00000-e3ffff VIA
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e40000-f7ffff unknown
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f80000-fbffff debug area (first read must be 0xAAAA5555, then 68k will jump to address of second read)
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fc0000-ffffff unknown
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map when overlay is clear, i.e. A above is considered '1':
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000000-1fffff unknown, maybe RAM???? maybe eeprom goes here too? eeprom is specifically disabled when overlay is set
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200000-3fffff ROM (second half is open bus)
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400000-5fffff DRAM?
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600000-7fffff unknown
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800000-83ffff LEDs and status bits to printer mechanism
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840000-9fffff unknown
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a00000-a3ffff SCC read
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a40000-bfffff unknown
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c00000-c3ffff SCC write
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c40000-dfffff unknown
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e00000-e3ffff VIA
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e40000-f7ffff unknown
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f80000-fbffff unknown
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fc0000-ffffff unknown
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The ADB bitbang transceiver connects to the
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*/
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static ADDRESS_MAP_START (maincpu_map, AS_PROGRAM, 16, lwriter_state)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x00000000, 0x00000007) AM_ROM AM_READ(bootvect_r) /* ROM mirror just during reset */
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AM_RANGE(0x00000000, 0x00000007) AM_RAM AM_WRITE(bootvect_w) /* After first write we act as RAM */
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AM_RANGE(0x00000008, 0x001fffff) AM_RAM /* 2 Mb DRAM */
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AM_RANGE(0x00200000, 0x003fffff) AM_ROM AM_REGION("roms", 0)
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AM_RANGE(0x000000, 0x1fffff) AM_READWRITE(bankedarea_r, bankedarea_w)
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AM_RANGE(0x200000, 0x2fffff) AM_ROM AM_REGION("rom", 0) // 1MB ROM
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//AM_RANGE(0x300000, 0x3fffff) // open bus?
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AM_RANGE(0x400000, 0x5fffff) AM_RAM AM_REGION("mainram", 0) AM_MIRROR(0x200000) // 2MB DRAM; the AM_MIRROR is probably wrong, but it gets the selftest to failing on test 08 instead of 0A
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AM_RANGE(0x800000, 0x800001) AM_WRITE8(led_w, 0xff00) AM_MIRROR(0x1ffffe) // mirror is a guess given that the pals can only decode A18-A23
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AM_RANGE(0xc00000, 0xc00001) AM_DEVWRITE8("scc", scc8530_device, ca_w, 0x00ff) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xc00004, 0xc00005) AM_DEVWRITE8("scc", scc8530_device, da_w, 0x00ff) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xa00000, 0xa00001) AM_DEVREAD8 ("scc", scc8530_device, ca_r, 0xff00) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xa00004, 0xa00005) AM_DEVREAD8 ("scc", scc8530_device, da_r, 0xff00) AM_MIRROR(0x1ffff8)
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AM_RANGE(0x00c00000, 0x00c00001) AM_DEVWRITE8("scc", scc8530_device, ca_w, 0x00ff)
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AM_RANGE(0x00c00004, 0x00c00005) AM_DEVWRITE8("scc", scc8530_device, da_w, 0x00ff)
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AM_RANGE(0x00a00000, 0x00a00001) AM_DEVREAD8 ("scc", scc8530_device, ca_r, 0xff00)
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AM_RANGE(0x00a00004, 0x00a00005) AM_DEVREAD8 ("scc", scc8530_device, da_r, 0xff00)
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AM_RANGE(0x00c00002, 0x00c00003) AM_DEVWRITE8("scc", scc8530_device, cb_w, 0x00ff)
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AM_RANGE(0x00c00006, 0x00c00007) AM_DEVWRITE8("scc", scc8530_device, db_w, 0x00ff)
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AM_RANGE(0x00a00002, 0x00a00003) AM_DEVREAD8 ("scc", scc8530_device, cb_r, 0xff00)
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AM_RANGE(0x00a00006, 0x00a00007) AM_DEVREAD8 ("scc", scc8530_device, db_r, 0xff00)
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AM_RANGE(0xc00002, 0xc00003) AM_DEVWRITE8("scc", scc8530_device, cb_w, 0x00ff) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xc00006, 0xc00007) AM_DEVWRITE8("scc", scc8530_device, db_w, 0x00ff) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xa00002, 0xa00003) AM_DEVREAD8 ("scc", scc8530_device, cb_r, 0xff00) AM_MIRROR(0x1ffff8)
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AM_RANGE(0xa00006, 0xa00007) AM_DEVREAD8 ("scc", scc8530_device, db_r, 0xff00) AM_MIRROR(0x1ffff8)
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#if TPI
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AM_RANGE(0x00e00010, 0x00e0001f) AM_DEVREADWRITE8 ("tpi", tpi6523_device, read, write, 0x00ff) // Used on older boards, needs proper mapping
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AM_RANGE(0xe00010, 0xe0001f) AM_DEVREADWRITE8 ("tpi", tpi6523_device, read, write, 0x00ff) AM_MIRROR(0x17ffe0) // Used on older boards, needs proper mapping
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#else
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AM_RANGE(0x00e00000, 0x00e0001f) AM_DEVREADWRITE8 ("via", via6522_device, read, write, 0x00ff)
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AM_RANGE(0xe00000, 0xe0001f) AM_DEVREADWRITE8 ("via", via6522_device, read, write, 0x00ff) AM_MIRROR(0x17ffe0)
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#endif
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ADDRESS_MAP_END
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@ -130,26 +214,90 @@ INPUT_PORTS_END
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/* Start it up */
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void lwriter_state::machine_start()
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{
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/* Setup pointer to bootvector in ROM for bootvector handler bootvect_r */
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m_sysrom = (uint16_t*)(memregion ("roms")->base ());
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// do stuff here later on like setting up printer mechanisms HLE timers etc
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}
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void lwriter_state::machine_reset ()
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void lwriter_state::machine_reset()
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{
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/* Reset pointer to bootvector in ROM for bootvector handler bootvect_r */
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if (m_sysrom == &m_sysram[0]) /* Condition needed because memory map is not setup first time */
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m_sysrom = (uint16_t*)(memregion ("roms")->base ());
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/* Reset the VIA */
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m_via->reset();
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}
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/* Boot vector handler, the PCB hardwires the first 8 bytes from 0xff800000 to 0x0 at reset*/
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READ16_MEMBER (lwriter_state::bootvect_r){
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return m_sysrom[offset];
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/* 4 diagnostic LEDs, plus 4 i/o lines for the printer */
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WRITE8_MEMBER(lwriter_state::led_w)
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{
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//popmessage("LED status: %02X\n", data&0xFF);
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logerror("LED status: %02X\n", data&0xFF);
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popmessage("LED status: %x %x %x %x %x %x %x %x\n", data&0x80, data&0x40, data&0x20, data&0x10, data&0x8, data&0x4, data&0x2, data&0x1);
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}
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WRITE16_MEMBER (lwriter_state::bootvect_w){
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m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
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m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
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m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset.
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/* via stuff */
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// second via
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READ8_MEMBER(lwriter_state::via_pa_r)
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{
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logerror(" VIA: Port A read!\n");
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return 0xFF;
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}
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WRITE8_MEMBER(lwriter_state::via_pa_w)
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{
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logerror(" VIA: Port A written with data of 0x%02x!\n", data);
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}
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WRITE_LINE_MEMBER(lwriter_state::via_ca2_w)
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{
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logerror(" VIA: CA2 written with %d!\n", state);
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}
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READ8_MEMBER(lwriter_state::via_pb_r)
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{
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logerror(" VIA: Port B read!\n");
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return 0xFF;
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}
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WRITE8_MEMBER(lwriter_state::via_pb_w)
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{
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logerror(" VIA: Port B written with data of 0x%02x!\n", data);
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m_overlay = BIT(data,3);
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}
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WRITE_LINE_MEMBER (lwriter_state::via_cb1_w)
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{
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logerror(" VIA: CB1 written with %d!\n", state);
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}
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WRITE_LINE_MEMBER(lwriter_state::via_cb2_w)
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{
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logerror(" VIA: CB2 written with %d!\n", state);
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}
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WRITE_LINE_MEMBER(lwriter_state::via_int_w)
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{
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logerror(" VIA: INT output set to %d!\n", state);
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}
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READ16_MEMBER(lwriter_state::bankedarea_r)
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{
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uint16_t *rom = (uint16_t *)(memregion("rom")->base());
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//uint16_t *ram = (uint16_t *)(memregion("mainram")->base());
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if (m_overlay == 1)
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{
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rom += (offset&0x1fffff);
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return *rom;
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}
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else
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{
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// what actually maps here? the sram and eeprom?
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//ram += (offset&0x1fffff);
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//return *ram;
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return 0xFFFF; /** TODO: fix me */
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}
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}
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WRITE16_MEMBER (lwriter_state::bankedarea_w)
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{
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uint16_t *ram = (uint16_t *)(memregion("mainram")->base());
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COMBINE_DATA(&ram[offset]);
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}
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#define CPU_CLK (XTAL_22_3210MHz / 2) // Based on pictures form here: http://picclick.co.uk/Apple-Postscript-LaserWriter-IINT-Printer-640-4105-M6009-Mainboard-282160713108.html#&gid=1&pid=7
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@ -180,6 +328,14 @@ static MACHINE_CONFIG_START( lwriter, lwriter_state )
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MCFG_DEVICE_ADD("tpi", TPI6525, 0)
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#else
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MCFG_DEVICE_ADD("via", VIA6522, 0)
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MCFG_VIA6522_READPA_HANDLER(READ8(lwriter_state, via_pa_r))
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MCFG_VIA6522_READPB_HANDLER(READ8(lwriter_state, via_pb_r))
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MCFG_VIA6522_WRITEPA_HANDLER(WRITE8(lwriter_state, via_pa_w))
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MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(lwriter_state, via_pb_w))
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MCFG_VIA6522_CB1_HANDLER(WRITELINE(lwriter_state, via_cb1_w))
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MCFG_VIA6522_CA2_HANDLER(WRITELINE(lwriter_state, via_ca2_w))
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MCFG_VIA6522_CB2_HANDLER(WRITELINE(lwriter_state, via_cb2_w))
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MCFG_VIA6522_IRQ_HANDLER(WRITELINE(lwriter_state, via_int_w))
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#endif
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MACHINE_CONFIG_END
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@ -214,9 +370,9 @@ MACHINE_CONFIG_END
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* - last three loops
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*/
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ROM_START(lwriter)
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ROM_REGION16_BE (0x1000000, "roms", 0)
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ROM_START(lwriter)
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ROM_REGION16_BE (0x1000000, "rom", 0)
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ROM_LOAD16_BYTE ("342-0545.l0", 0x000001, 0x20000, CRC (6431742d) SHA1 (040bd5b84b49b86f2b0fe9ece378bbc7a10a94ec))
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ROM_LOAD16_BYTE ("342-0546.h0", 0x000000, 0x20000, CRC (c592bfb7) SHA1 (b595ae225238f7fabd1566a3133ea6154e082e2d))
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ROM_LOAD16_BYTE ("342-0547.l1", 0x040001, 0x20000, CRC (205a5ea8) SHA1 (205fefbb5c67a07d57cb6184c69648321a34a8fe))
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@ -225,6 +381,8 @@ ROM_START(lwriter)
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ROM_LOAD16_BYTE ("342-0550.h2", 0x080000, 0x20000, CRC (82adcf85) SHA1 (e2ab728afdae802c0c67fc25c9ba278b9cb04e31))
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ROM_LOAD16_BYTE ("342-0551.l3", 0x0c0001, 0x20000, CRC (176b3346) SHA1 (eb8dfc7e44f2bc884097e51a47e2f10ee091c9e9))
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ROM_LOAD16_BYTE ("342-0552.h3", 0x0c0000, 0x20000, CRC (69b175c6) SHA1 (a84c82be1ec7e373bb097ee74b941920a3b091aa))
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ROM_REGION( 0x200000, "mainram", ROMREGION_ERASEFF )
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ROM_END
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/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT, COMPANY, FULLNAME, FLAGS */
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