tms9995: Fixed READY check on RESET (auto-waitstate)

This commit is contained in:
Michael Zapf 2017-12-23 00:46:12 +01:00
parent 50ee57f1b3
commit a8cbdbc89c
14 changed files with 52 additions and 44 deletions

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@ -291,7 +291,7 @@ void tms9995_device::device_start()
save_item(NAME(m_mid_flag));
save_item(NAME(m_mid_active));
save_item(NAME(m_decrementer_clkdiv));
save_item(NAME(m_servicing_interrupt));
save_item(NAME(m_log_interrupt));
save_item(NAME(m_int_pending));
save_item(NAME(m_check_overflow));
save_item(NAME(m_intmask));
@ -326,27 +326,6 @@ void tms9995_device::device_start()
// save_item(NAME(m_first_cycle)); // only for log output
}
void tms9995_device::device_stop()
{
}
/*
TMS9995 hard reset
The device reset is just the emulator's trigger for the reset procedure
which is invoked via the main loop.
This also allows us to check the READY line at reset time, which is used
to enable automatic wait state creation.
*/
void tms9995_device::device_reset()
{
m_reset = true; // for the main loop
m_servicing_interrupt = false; // only for debugging
m_request_auto_wait_state = false;
m_hold_requested = false;
memset(m_flag, 0, sizeof(m_flag));
}
const char* tms9995_device::s_statename[20] =
{
"PC", "WP", "ST", "IR",
@ -1316,7 +1295,7 @@ void tms9995_device::execute_set_input(int irqline, int state)
if (state == ASSERT_LINE)
{
logerror("RESET interrupt line; READY=%d\n", m_ready_bufd);
m_reset = true;
reset_line(ASSERT_LINE);
}
}
else
@ -1363,7 +1342,14 @@ void tms9995_device::execute_set_input(int irqline, int state)
*/
WRITE_LINE_MEMBER( tms9995_device::reset_line )
{
if (state==ASSERT_LINE) m_reset = true;
if (state==ASSERT_LINE)
{
m_reset = true; // for the main loop
m_log_interrupt = false; // only for debugging
m_request_auto_wait_state = false;
m_hold_requested = false;
memset(m_flag, 0, sizeof(m_flag));
}
}
/*
@ -1616,7 +1602,7 @@ void tms9995_device::next_command()
if (TRACE_EXEC)
{
if (m_servicing_interrupt) logerror("i%04x\n", PC-2);
if (m_log_interrupt) logerror("i%04x\n", PC-2);
else logerror("%04x\n", PC-2);
}
PC_debug = PC - 2;
@ -1752,7 +1738,7 @@ void tms9995_device::service_interrupt()
if (TRACE_INT) logerror("********* triggered an interrupt with vector %04x/%04x\n", vectorpos, vectorpos+2);
// just for debugging purposes
if (!m_reset) m_servicing_interrupt = true;
if (!m_reset) m_log_interrupt = true;
// The microinstructions will do the context switch
m_address = vectorpos;
@ -3081,7 +3067,7 @@ void tms9995_device::alu_rtwp()
WP = m_current_value & 0xfffe;
// Just for debugging purposes
m_servicing_interrupt = false;
m_log_interrupt = false;
if (TRACE_OP) logerror("RTWP restored old context (WP=%04x, PC=%04x, ST=%04x)\n", WP, PC, ST);
break;

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@ -83,8 +83,6 @@ protected:
// device-level overrides
virtual void device_start() override;
virtual void device_stop() override;
virtual void device_reset() override;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const override;
@ -186,7 +184,7 @@ private:
bool m_mid_active;
int m_decrementer_clkdiv;
bool m_servicing_interrupt;
bool m_log_interrupt;
// Flag field
int m_int_pending;

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@ -162,6 +162,7 @@ void cortex_state::machine_reset()
membank("bankr0")->set_entry(1); // point at rom
membank("bankw0")->set_entry(0); // always write to ram
m_maincpu->ready_line(ASSERT_LINE);
m_maincpu->reset_line(ASSERT_LINE);
}
DRIVER_INIT_MEMBER( cortex_state, init )

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@ -104,6 +104,7 @@ void evmbug_state::machine_reset()
m_rbrl = 0;
// Disable auto wait state generation by raising the READY line on reset
m_maincpu->ready_line(ASSERT_LINE);
m_maincpu->reset_line(ASSERT_LINE);
}
static MACHINE_CONFIG_START( evmbug )

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@ -670,9 +670,11 @@ void geneve_state::machine_reset()
m_int2 = CLEAR_LINE; // flag reflecting the INT2 line
m_keyint = CLEAR_LINE;
// No automatic wait state (auto wait state is enabled with READY=CLEAR at RESET)
// READY=ASSERT; RESET -> no additional wait states
// READY=CLEAR; RESET -> create wait state in every memory cycle
m_cpu->ready_line(ASSERT_LINE);
m_cpu->hold_line(CLEAR_LINE);
m_cpu->reset_line(ASSERT_LINE);
m_ready_line = m_ready_line1 = ASSERT_LINE;

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@ -234,7 +234,9 @@ WRITE8_MEMBER(jpmmps_state::jpmmps_ic22_portc_w)
void jpmmps_state::machine_reset()
{
// Disable auto wait state generation by raising the READY line on reset
static_cast<tms9995_device*>(machine().device("maincpu"))->ready_line(ASSERT_LINE);
tms9995_device* cpu = static_cast<tms9995_device*>(machine().device("maincpu"));
cpu->ready_line(ASSERT_LINE);
cpu->reset_line(ASSERT_LINE);
}
static MACHINE_CONFIG_START( jpmmps )

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@ -121,7 +121,9 @@ INPUT_PORTS_END
void jpms80_state::machine_reset()
{
// Disable auto wait state generation by raising the READY line on reset
static_cast<tms9995_device*>(machine().device("maincpu"))->ready_line(ASSERT_LINE);
tms9995_device* cpu = static_cast<tms9995_device*>(machine().device("maincpu"));
cpu->ready_line(ASSERT_LINE);
cpu->reset_line(ASSERT_LINE);
}
static MACHINE_CONFIG_START( jpms80 )

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@ -349,7 +349,9 @@ void looping_state::machine_start()
void looping_state::machine_reset()
{
// Disable auto wait state generation by raising the READY line on reset
static_cast<tms9995_device*>(machine().device("maincpu"))->ready_line(ASSERT_LINE);
tms9995_device* cpu = static_cast<tms9995_device*>(machine().device("maincpu"));
cpu->ready_line(ASSERT_LINE);
cpu->reset_line(ASSERT_LINE);
}
/*************************************

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@ -116,7 +116,9 @@ WRITE8_MEMBER( nsm_state::cru_w )
void nsm_state::machine_reset()
{
// Disable auto wait state generation by raising the READY line on reset
static_cast<tms9995_device*>(machine().device("maincpu"))->ready_line(ASSERT_LINE);
tms9995_device* cpu = static_cast<tms9995_device*>(machine().device("maincpu"));
cpu->ready_line(ASSERT_LINE);
cpu->reset_line(ASSERT_LINE);
}
static MACHINE_CONFIG_START( nsm )

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@ -400,7 +400,9 @@ GFXDECODE_END
void nsmpoker_state::machine_reset()
{
// Disable auto wait state generation by raising the READY line on reset
static_cast<tms9995_device*>(machine().device("maincpu"))->ready_line(ASSERT_LINE);
tms9995_device* cpu = static_cast<tms9995_device*>(machine().device("maincpu"));
cpu->ready_line(ASSERT_LINE);
cpu->reset_line(ASSERT_LINE);
}
/*************************

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@ -283,9 +283,11 @@ WRITE_LINE_MEMBER(pachifev_state::pf_adpcm_int)
void pachifev_state::machine_reset()
{
tms9995_device* cpu = static_cast<tms9995_device*>(machine().device("maincpu"));
// Pulling down the line on RESET configures the CPU to insert one wait
// state on external memory accesses
static_cast<tms9995_device*>(machine().device("maincpu"))->ready_line(CLEAR_LINE);
cpu->ready_line(CLEAR_LINE);
cpu->reset_line(ASSERT_LINE);
m_power=0;
m_max_power=0;

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@ -90,6 +90,9 @@ public:
ti99_2_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_videoram(*this, "videoram"),
m_ROM_paged(0),
m_irq_state(0),
m_keyRow(0),
m_maincpu(*this, "maincpu"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette") { }
@ -97,7 +100,7 @@ public:
required_shared_ptr<uint8_t> m_videoram;
int m_ROM_paged;
int m_irq_state;
int m_KeyRow;
int m_keyRow;
DECLARE_WRITE8_MEMBER(ti99_2_write_kbd);
DECLARE_WRITE8_MEMBER(ti99_2_write_misc_cru);
DECLARE_READ8_MEMBER(ti99_2_read_kbd);
@ -140,7 +143,9 @@ void ti99_2_state::machine_reset()
// Configure CPU to insert 1 wait state for each external memory access
// by lowering the READY line on reset
// TODO: Check with specs
static_cast<tms9995_device*>(machine().device("maincpu"))->ready_line(CLEAR_LINE);
tms9995_device* cpu = static_cast<tms9995_device*>(machine().device("maincpu"));
cpu->ready_line(CLEAR_LINE);
cpu->reset_line(ASSERT_LINE);
}
INTERRUPT_GEN_MEMBER(ti99_2_state::ti99_2_vblank_interrupt)
@ -237,14 +242,14 @@ WRITE8_MEMBER(ti99_2_state::ti99_2_write_kbd)
{
/* this implementation is just a guess */
if (data)
m_KeyRow |= 1 << offset;
m_keyRow |= 1 << offset;
else
m_KeyRow &= ~ (1 << offset);
m_keyRow &= ~ (1 << offset);
}
/* now, we handle ROM paging */
if (m_ROM_paged)
{ /* if we have paged ROMs, page according to S0 keyboard interface line */
membank("bank1")->set_base((m_KeyRow == 0) ? TI99_2_32_ROMPAGE1 : TI99_2_32_ROMPAGE0);
membank("bank1")->set_base((m_keyRow == 0) ? TI99_2_32_ROMPAGE1 : TI99_2_32_ROMPAGE0);
}
}
@ -280,7 +285,7 @@ READ8_MEMBER(ti99_2_state::ti99_2_read_kbd)
{
static const char *const keynames[] = { "LINE0", "LINE1", "LINE2", "LINE3", "LINE4", "LINE5", "LINE6", "LINE7" };
return ioport(keynames[m_KeyRow])->read();
return ioport(keynames[m_keyRow])->read();
}
READ8_MEMBER(ti99_2_state::ti99_2_read_misc_cru)

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@ -702,13 +702,15 @@ MACHINE_RESET_MEMBER(ti99_8_state, ti99_8)
// Pulling down the line on RESET configures the CPU to insert one wait
// state on external memory accesses
m_cpu->ready_line(CLEAR_LINE);
// m_cpu->ready_line(ASSERT_LINE);
// m_gromport->set_grom_base(0x9800, 0xfff1);
// Clear INT1 and INT2 latch
m_int1 = CLEAR_LINE;
m_int2 = CLEAR_LINE;
console_reset(ASSERT_LINE);
console_reset(CLEAR_LINE);
}
static MACHINE_CONFIG_START( ti99_8 )

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@ -267,6 +267,7 @@ void tutor_state::machine_reset()
// Enable auto wait states by lowering READY during reset
m_maincpu->ready_line(CLEAR_LINE);
m_maincpu->reset_line(ASSERT_LINE);
}
/*