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srccleaned + minor fixes. nw.

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This commit is contained in:
Fabio Priuli 2013-03-05 12:01:47 +00:00
parent 24837775a4
commit aa2b3bb471
20 changed files with 845 additions and 826 deletions
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199
src/mess/drivers/snes.c
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@ -165,7 +165,7 @@ static READ8_HANDLER( snes_lo_r )
{ {
if (address >= 0x3000 && address < 0x3300) if (address >= 0x3000 && address < 0x3300)
return superfx_mmio_read(state->m_superfx, address); return superfx_mmio_read(state->m_superfx, address);
if (address >= 0x6000 && address < 0x8000) // here it should be snes_ram[0xe00000+...] but there are mirroring issues if (address >= 0x6000 && address < 0x8000) // here it should be snes_ram[0xe00000+...] but there are mirroring issues
return superfx_access_ram(state->m_superfx) ? snes_ram[0xf00000 + (offset & 0x1fff)] : snes_open_bus_r(space, 0); return superfx_access_ram(state->m_superfx) ? snes_ram[0xf00000 + (offset & 0x1fff)] : snes_open_bus_r(space, 0);
} }
if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL
@ -257,7 +257,7 @@ static READ8_HANDLER( snes_hi_r )
&& offset >= 0x500000) && offset >= 0x500000)
return spc7110_bank7_read(space, offset - 0x400000); return spc7110_bank7_read(space, offset - 0x400000);
if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL) if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL)
return space.read_byte(offset); // [80-ff] same as [00-7f] return space.read_byte(offset); // [80-ff] same as [00-7f]
// base cart access // base cart access
if (offset < 0x400000) if (offset < 0x400000)
@ -274,47 +274,47 @@ static WRITE8_HANDLER( snes_lo_w )
// take care of add-on chip access // take care of add-on chip access
if (state->m_has_addon_chip == HAS_OBC1 if (state->m_has_addon_chip == HAS_OBC1
&& (offset < 0x400000 && address >= 0x6000 && address < 0x8000)) && (offset < 0x400000 && address >= 0x6000 && address < 0x8000))
{ obc1_write(space, offset, data, mem_mask); return; } { obc1_write(space, offset, data, mem_mask); return; }
if (state->m_has_addon_chip == HAS_CX4 if (state->m_has_addon_chip == HAS_CX4
&& (offset < 0x400000 && address >= 0x6000 && address < 0x8000)) && (offset < 0x400000 && address >= 0x6000 && address < 0x8000))
{ CX4_write(space.machine(), address - 0x6000, data); return; } { CX4_write(space.machine(), address - 0x6000, data); return; }
if (state->m_has_addon_chip == HAS_RTC if (state->m_has_addon_chip == HAS_RTC
&& (offset < 0x400000 && (address == 0x2800 || address == 0x2801))) && (offset < 0x400000 && (address == 0x2800 || address == 0x2801)))
{ srtc_write(space.machine(), offset, data); return; } { srtc_write(space.machine(), offset, data); return; }
if (state->m_has_addon_chip == HAS_ST010 || state->m_has_addon_chip == HAS_ST011) if (state->m_has_addon_chip == HAS_ST010 || state->m_has_addon_chip == HAS_ST011)
{ {
if (offset >= 0x680000 && offset < 0x700000 && address < 0x1000) if (offset >= 0x680000 && offset < 0x700000 && address < 0x1000)
{ st010_write_ram(state, address, data); return; } { st010_write_ram(state, address, data); return; }
if (offset == 0x600000) if (offset == 0x600000)
{ st010_set_dr(data); return; } { st010_set_dr(data); return; }
if (offset == 0x600001) if (offset == 0x600001)
{ st010_set_sr(data); return; } { st010_set_sr(data); return; }
} }
if (state->m_cart[0].mode == SNES_MODE_21 && state->m_has_addon_chip == HAS_DSP1 if (state->m_cart[0].mode == SNES_MODE_21 && state->m_has_addon_chip == HAS_DSP1
&& (offset < 0x200000 && address >= 0x6000 && address < 0x8000)) && (offset < 0x200000 && address >= 0x6000 && address < 0x8000))
{ dsp_set_dr(data); return; } { dsp_set_dr(data); return; }
if (state->m_cart[0].mode == SNES_MODE_20 && state->m_has_addon_chip == HAS_DSP1) if (state->m_cart[0].mode == SNES_MODE_20 && state->m_has_addon_chip == HAS_DSP1)
{ {
if (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000) if (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)
{ dsp_set_dr(data); return; } { dsp_set_dr(data); return; }
if (offset >= 0x600000 && offset < 0x700000 && (offset & 0x8000) == 0x0000) if (offset >= 0x600000 && offset < 0x700000 && (offset & 0x8000) == 0x0000)
{ dsp_set_dr(data); return; } { dsp_set_dr(data); return; }
} }
if ((state->m_has_addon_chip == HAS_DSP2 || state->m_has_addon_chip == HAS_DSP3) if ((state->m_has_addon_chip == HAS_DSP2 || state->m_has_addon_chip == HAS_DSP3)
&& (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
{ {
if (address < 0xc000) if (address < 0xc000)
{ dsp_set_dr(data); return; } { dsp_set_dr(data); return; }
else else
{ dsp_set_sr(data); return; } { dsp_set_sr(data); return; }
} }
if (state->m_has_addon_chip == HAS_DSP4 if (state->m_has_addon_chip == HAS_DSP4
&& (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
{ {
if (address < 0xc000) if (address < 0xc000)
{ dsp_set_dr(data); return; } { dsp_set_dr(data); return; }
else else
{ dsp_set_sr(data); return; } { dsp_set_sr(data); return; }
} }
if (state->m_has_addon_chip == HAS_SDD1 && offset < 0x400000) if (state->m_has_addon_chip == HAS_SDD1 && offset < 0x400000)
{ {
@ -328,23 +328,23 @@ static WRITE8_HANDLER( snes_lo_w )
{ {
UINT16 limit = (state->m_has_addon_chip == HAS_SPC7110_RTC) ? 0x4842 : 0x483f; UINT16 limit = (state->m_has_addon_chip == HAS_SPC7110_RTC) ? 0x4842 : 0x483f;
if (address >= 0x4800 && address <= limit) if (address >= 0x4800 && address <= limit)
{ spc7110_mmio_write(space.machine(), (UINT32)address, data); return; } { spc7110_mmio_write(space.machine(), (UINT32)address, data); return; }
if (offset < 0x10000 && address >= 0x6000 && address < 0x8000) if (offset < 0x10000 && address >= 0x6000 && address < 0x8000)
{ snes_ram[0x306000 + (address & 0x1fff)] = data; return; } { snes_ram[0x306000 + (address & 0x1fff)] = data; return; }
if (offset >= 0x300000 && offset < 0x310000 && address >= 0x6000 && address < 0x8000) if (offset >= 0x300000 && offset < 0x310000 && address >= 0x6000 && address < 0x8000)
{ snes_ram[0x306000 + (address & 0x1fff)] = data; return; } { snes_ram[0x306000 + (address & 0x1fff)] = data; return; }
} }
if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL
&& offset < 0x400000) && offset < 0x400000)
{ {
if (address >= 0x3000 && address < 0x3300) if (address >= 0x3000 && address < 0x3300)
{ superfx_mmio_write(state->m_superfx, address, data); return; } { superfx_mmio_write(state->m_superfx, address, data); return; }
if (address >= 0x6000 && address < 0x8000) // here it should be snes_ram[0xe00000+...] but there are mirroring issues if (address >= 0x6000 && address < 0x8000) // here it should be snes_ram[0xe00000+...] but there are mirroring issues
{ snes_ram[0xf00000 + (offset & 0x1fff)] = data; return; } { snes_ram[0xf00000 + (offset & 0x1fff)] = data; return; }
} }
if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL
&& offset >= 0x600000) && offset >= 0x600000)
{ snes_ram[0x800000 + offset] = data; return; } { snes_ram[0x800000 + offset] = data; return; }
// base cart access // base cart access
if (offset < 0x300000) if (offset < 0x300000)
@ -367,47 +367,47 @@ static WRITE8_HANDLER( snes_hi_w )
// take care of add-on chip access // take care of add-on chip access
if (state->m_has_addon_chip == HAS_OBC1 if (state->m_has_addon_chip == HAS_OBC1
&& (offset < 0x400000 && address >= 0x6000 && address < 0x8000)) && (offset < 0x400000 && address >= 0x6000 && address < 0x8000))
{ obc1_write(space, offset, data, mem_mask); return; } { obc1_write(space, offset, data, mem_mask); return; }
if (state->m_has_addon_chip == HAS_CX4 if (state->m_has_addon_chip == HAS_CX4
&& (offset < 0x400000 && address >= 0x6000 && address < 0x8000)) && (offset < 0x400000 && address >= 0x6000 && address < 0x8000))
{ CX4_write(space.machine(), address - 0x6000, data); return; } { CX4_write(space.machine(), address - 0x6000, data); return; }
if (state->m_has_addon_chip == HAS_RTC if (state->m_has_addon_chip == HAS_RTC
&& (offset < 0x400000 && (address == 0x2800 || address == 0x2801))) && (offset < 0x400000 && (address == 0x2800 || address == 0x2801)))
{ srtc_write(space.machine(), offset, data); return; } { srtc_write(space.machine(), offset, data); return; }
if (state->m_has_addon_chip == HAS_ST010 || state->m_has_addon_chip == HAS_ST011) if (state->m_has_addon_chip == HAS_ST010 || state->m_has_addon_chip == HAS_ST011)
{ {
if (offset >= 0x680000 && offset < 0x700000 && address < 0x1000) if (offset >= 0x680000 && offset < 0x700000 && address < 0x1000)
{ st010_write_ram(state, address, data); return; } { st010_write_ram(state, address, data); return; }
if (offset == 0x600000) if (offset == 0x600000)
{ st010_set_dr(data); return; } { st010_set_dr(data); return; }
if (offset == 0x600001) if (offset == 0x600001)
{ st010_set_sr(data); return; } { st010_set_sr(data); return; }
} }
if (state->m_cart[0].mode == SNES_MODE_21 && state->m_has_addon_chip == HAS_DSP1 if (state->m_cart[0].mode == SNES_MODE_21 && state->m_has_addon_chip == HAS_DSP1
&& (offset < 0x200000 && address >= 0x6000 && address < 0x8000)) && (offset < 0x200000 && address >= 0x6000 && address < 0x8000))
{ dsp_set_dr(data); return; } { dsp_set_dr(data); return; }
if (state->m_cart[0].mode == SNES_MODE_20 && state->m_has_addon_chip == HAS_DSP1) if (state->m_cart[0].mode == SNES_MODE_20 && state->m_has_addon_chip == HAS_DSP1)
{ {
if (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000) if (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)
{ dsp_set_dr(data); return; } { dsp_set_dr(data); return; }
if (offset >= 0x600000 && offset < 0x700000 && (offset & 0x8000) == 0x0000) if (offset >= 0x600000 && offset < 0x700000 && (offset & 0x8000) == 0x0000)
{ dsp_set_dr(data); return; } { dsp_set_dr(data); return; }
} }
if ((state->m_has_addon_chip == HAS_DSP2 || state->m_has_addon_chip == HAS_DSP3) if ((state->m_has_addon_chip == HAS_DSP2 || state->m_has_addon_chip == HAS_DSP3)
&& (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
{ {
if (address < 0xc000) if (address < 0xc000)
{ dsp_set_dr(data); return; } { dsp_set_dr(data); return; }
else else
{ dsp_set_sr(data); return; } { dsp_set_sr(data); return; }
} }
if (state->m_has_addon_chip == HAS_DSP4 if (state->m_has_addon_chip == HAS_DSP4
&& (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
{ {
if (address < 0xc000) if (address < 0xc000)
{ dsp_set_dr(data); return; } { dsp_set_dr(data); return; }
else else
{ dsp_set_sr(data); return; } { dsp_set_sr(data); return; }
} }
if (state->m_has_addon_chip == HAS_SDD1 && offset < 0x400000) if (state->m_has_addon_chip == HAS_SDD1 && offset < 0x400000)
{ {
@ -421,14 +421,14 @@ static WRITE8_HANDLER( snes_hi_w )
{ {
UINT16 limit = (state->m_has_addon_chip == HAS_SPC7110_RTC) ? 0x4842 : 0x483f; UINT16 limit = (state->m_has_addon_chip == HAS_SPC7110_RTC) ? 0x4842 : 0x483f;
if (address >= 0x4800 && address <= limit) if (address >= 0x4800 && address <= limit)
{ spc7110_mmio_write(space.machine(), (UINT32)address, data); return; } { spc7110_mmio_write(space.machine(), (UINT32)address, data); return; }
if (offset < 0x10000 && address >= 0x6000 && address < 0x8000) if (offset < 0x10000 && address >= 0x6000 && address < 0x8000)
{ snes_ram[0x306000 + (address & 0x1fff)] = data; return; } { snes_ram[0x306000 + (address & 0x1fff)] = data; return; }
if (offset >= 0x300000 && offset < 0x310000 && address >= 0x6000 && address < 0x8000) if (offset >= 0x300000 && offset < 0x310000 && address >= 0x6000 && address < 0x8000)
{ snes_ram[0x306000 + (address & 0x1fff)] = data; return; } { snes_ram[0x306000 + (address & 0x1fff)] = data; return; }
} }
if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL) if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL)
{ space.write_byte(offset, data); return; } // [80-ff] same as [00-7f] { space.write_byte(offset, data); return; } // [80-ff] same as [00-7f]
// base cart access // base cart access
if (offset < 0x400000) if (offset < 0x400000)
@ -1524,7 +1524,7 @@ static WRITE8_HANDLER( snes20_hi_w )
if (address >= 0x2000 && address < 0x6000) if (address >= 0x2000 && address < 0x6000)
snes_w_io(space, address, data); snes_w_io(space, address, data);
} }
else if (offset >= 0x700000) // NVRAM access else if (offset >= 0x700000) // NVRAM access
{ {
state->m_slotcart->m_cart->write_h(space, offset, data); state->m_slotcart->m_cart->write_h(space, offset, data);
} }
@ -1615,7 +1615,7 @@ static WRITE8_HANDLER( snes21_lo_w )
} }
} }
} }
else if (offset >= 0x700000) // NVRAM access else if (offset >= 0x700000) // NVRAM access
state->m_slotcart->m_cart->write_l(space, offset, data); state->m_slotcart->m_cart->write_l(space, offset, data);
} }
@ -1668,7 +1668,7 @@ static WRITE8_HANDLER( snes21_hi_w )
} }
} }
} }
else if (offset >= 0x700000) // NVRAM access else if (offset >= 0x700000) // NVRAM access
state->m_slotcart->m_cart->write_h(space, offset, data); state->m_slotcart->m_cart->write_h(space, offset, data);
} }
@ -1692,15 +1692,15 @@ static READ8_HANDLER( snesfx_hi_r )
} }
if (address >= 0x6000 && address < 0x8000) if (address >= 0x6000 && address < 0x8000)
{ {
return state->m_slotcart->m_cart->read_h(space, offset); //RAM return state->m_slotcart->m_cart->read_h(space, offset); //RAM
} }
if (address >= 0x8000) if (address >= 0x8000)
return state->m_slotcart->m_cart->read_h(space, offset); //ROM return state->m_slotcart->m_cart->read_h(space, offset); //ROM
} }
else if (offset < 0x600000) else if (offset < 0x600000)
return state->m_slotcart->m_cart->read_h(space, offset); //ROM return state->m_slotcart->m_cart->read_h(space, offset); //ROM
return state->m_slotcart->m_cart->read_h(space, offset); //RAM return state->m_slotcart->m_cart->read_h(space, offset); //RAM
} }
static READ8_HANDLER( snesfx_lo_r ) static READ8_HANDLER( snesfx_lo_r )
@ -1721,15 +1721,15 @@ static READ8_HANDLER( snesfx_lo_r )
} }
if (address >= 0x6000 && address < 0x8000) if (address >= 0x6000 && address < 0x8000)
{ {
return state->m_slotcart->m_cart->read_l(space, offset); //RAM return state->m_slotcart->m_cart->read_l(space, offset); //RAM
} }
if (address >= 0x8000) if (address >= 0x8000)
return state->m_slotcart->m_cart->read_l(space, offset); //ROM return state->m_slotcart->m_cart->read_l(space, offset); //ROM
} }
else if (offset < 0x600000) else if (offset < 0x600000)
return state->m_slotcart->m_cart->read_l(space, offset); //ROM return state->m_slotcart->m_cart->read_l(space, offset); //ROM
return state->m_slotcart->m_cart->read_l(space, offset); //RAM return state->m_slotcart->m_cart->read_l(space, offset); //RAM
} }
static WRITE8_HANDLER( snesfx_hi_w ) static WRITE8_HANDLER( snesfx_hi_w )
@ -2054,19 +2054,19 @@ static READ8_HANDLER( snesnew_lo_r )
&& (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
return state->m_slotcart->m_cart->chip_read(space, offset & 0x7fff); return state->m_slotcart->m_cart->chip_read(space, offset & 0x7fff);
else if (state->m_slotcart->get_type() == SNES_DSP_MODE21 else if (state->m_slotcart->get_type() == SNES_DSP_MODE21
&& (offset < 0x200000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) && (offset < 0x200000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000))
return state->m_slotcart->m_cart->chip_read(space, offset & 0x1fff); return state->m_slotcart->m_cart->chip_read(space, offset & 0x1fff);
else if (state->m_slotcart->get_type() == SNES_DSP4 else if (state->m_slotcart->get_type() == SNES_DSP4
&& (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
return state->m_slotcart->m_cart->chip_read(space, offset & 0x7fff); return state->m_slotcart->m_cart->chip_read(space, offset & 0x7fff);
else if (state->m_slotcart->get_type() == SNES_OBC1 else if (state->m_slotcart->get_type() == SNES_OBC1
&& (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) && (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000))
return state->m_slotcart->m_cart->chip_read(space, offset); return state->m_slotcart->m_cart->chip_read(space, offset);
else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011) else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011)
&& (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x1000)) && (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x1000))
return state->m_slotcart->m_cart->chip_read(space, offset); return state->m_slotcart->m_cart->chip_read(space, offset);
else if (state->m_slotcart->get_type() == SNES_SRTC else if (state->m_slotcart->get_type() == SNES_SRTC
&& (offset < 0x400000 && (offset & 0xffff) == 0x2800)) && (offset < 0x400000 && (offset & 0xffff) == 0x2800))
return state->m_slotcart->m_cart->chip_read(space, offset & 0xffff); return state->m_slotcart->m_cart->chip_read(space, offset & 0xffff);
else else
{ {
@ -2117,24 +2117,27 @@ static READ8_HANDLER( snesnew_hi_r )
&& (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
return state->m_slotcart->m_cart->chip_read(space, offset & 0x7fff); return state->m_slotcart->m_cart->chip_read(space, offset & 0x7fff);
else if (state->m_slotcart->get_type() == SNES_DSP_MODE21 else if (state->m_slotcart->get_type() == SNES_DSP_MODE21
&& (offset < 0x200000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) && (offset < 0x200000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000))
return state->m_slotcart->m_cart->chip_read(space, offset & 0x1fff); return state->m_slotcart->m_cart->chip_read(space, offset & 0x1fff);
else if (state->m_slotcart->get_type() == SNES_DSP4 else if (state->m_slotcart->get_type() == SNES_DSP4
&& (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
return state->m_slotcart->m_cart->chip_read(space, offset & 0x7fff); return state->m_slotcart->m_cart->chip_read(space, offset & 0x7fff);
else if (state->m_slotcart->get_type() == SNES_OBC1 else if (state->m_slotcart->get_type() == SNES_OBC1
&& (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) && (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000))
return state->m_slotcart->m_cart->chip_read(space, offset); return state->m_slotcart->m_cart->chip_read(space, offset);
else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011) else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011)
&& (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x1000)) && (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x1000))
return state->m_slotcart->m_cart->chip_read(space, offset);
else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011)
&& (offset == 0x600000 || offset == 0x600001))
return state->m_slotcart->m_cart->chip_read(space, offset); return state->m_slotcart->m_cart->chip_read(space, offset);
else if (state->m_slotcart->get_type() == SNES_SRTC else if (state->m_slotcart->get_type() == SNES_SRTC
&& (offset < 0x400000 && (offset & 0xffff) == 0x2800)) && (offset < 0x400000 && (offset & 0xffff) == 0x2800))
return state->m_slotcart->m_cart->chip_read(space, offset & 0xffff); return state->m_slotcart->m_cart->chip_read(space, offset & 0xffff);
else if ((state->m_slotcart->get_type() == SNES_POKEMON || state->m_slotcart->get_type() == SNES_BANANA) else if ((state->m_slotcart->get_type() == SNES_POKEMON || state->m_slotcart->get_type() == SNES_BANANA)
&& (offset & 0x70000) == 0x0000) && (offset & 0x70000) == 0x0000)
{ {
// printf("hi read %x\n", offset); // printf("hi read %x\n", offset);
return state->m_slotcart->m_cart->chip_read(space, offset); return state->m_slotcart->m_cart->chip_read(space, offset);
} }
else else
@ -2186,24 +2189,27 @@ static WRITE8_HANDLER( snesnew_lo_w )
&& (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
state->m_slotcart->m_cart->chip_write(space, offset & 0x7fff, data); state->m_slotcart->m_cart->chip_write(space, offset & 0x7fff, data);
else if (state->m_slotcart->get_type() == SNES_DSP_MODE21 else if (state->m_slotcart->get_type() == SNES_DSP_MODE21
&& (offset < 0x200000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) && (offset < 0x200000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000))
state->m_slotcart->m_cart->chip_write(space, offset & 0x1fff, data); state->m_slotcart->m_cart->chip_write(space, offset & 0x1fff, data);
else if (state->m_slotcart->get_type() == SNES_DSP4 else if (state->m_slotcart->get_type() == SNES_DSP4
&& (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
state->m_slotcart->m_cart->chip_write(space, offset & 0x7fff, data); state->m_slotcart->m_cart->chip_write(space, offset & 0x7fff, data);
else if (state->m_slotcart->get_type() == SNES_OBC1 else if (state->m_slotcart->get_type() == SNES_OBC1
&& (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) && (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000))
state->m_slotcart->m_cart->chip_write(space, offset, data); state->m_slotcart->m_cart->chip_write(space, offset, data);
else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011) else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011)
&& (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x1000)) && (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x1000))
state->m_slotcart->m_cart->chip_write(space, offset, data);
else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011)
&& (offset == 0x600000 || offset == 0x600001))
state->m_slotcart->m_cart->chip_write(space, offset, data); state->m_slotcart->m_cart->chip_write(space, offset, data);
else if (state->m_slotcart->get_type() == SNES_SRTC else if (state->m_slotcart->get_type() == SNES_SRTC
&& (offset < 0x400000 && (offset & 0xffff) == 0x2801)) && (offset < 0x400000 && (offset & 0xffff) == 0x2801))
state->m_slotcart->m_cart->chip_write(space, offset & 0xffff, data); state->m_slotcart->m_cart->chip_write(space, offset & 0xffff, data);
else if (state->m_slotcart->get_type() == SNES_BANANA else if (state->m_slotcart->get_type() == SNES_BANANA
&& (offset & 0x78000) == 0x8000) && (offset & 0x78000) == 0x8000)
{ {
// printf("lo write %x\n", offset); // printf("lo write %x\n", offset);
state->m_slotcart->m_cart->chip_write(space, offset, data); state->m_slotcart->m_cart->chip_write(space, offset, data);
} }
else else
@ -2260,24 +2266,27 @@ static WRITE8_HANDLER( snesnew_hi_w )
&& (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x200000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
state->m_slotcart->m_cart->chip_write(space, offset & 0x7fff, data); state->m_slotcart->m_cart->chip_write(space, offset & 0x7fff, data);
else if (state->m_slotcart->get_type() == SNES_DSP_MODE21 else if (state->m_slotcart->get_type() == SNES_DSP_MODE21
&& (offset < 0x200000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) && (offset < 0x200000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000))
state->m_slotcart->m_cart->chip_write(space, offset & 0x1fff, data); state->m_slotcart->m_cart->chip_write(space, offset & 0x1fff, data);
else if (state->m_slotcart->get_type() == SNES_DSP4 else if (state->m_slotcart->get_type() == SNES_DSP4
&& (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000)) && (offset >= 0x300000 && offset < 0x400000 && (offset & 0x8000) == 0x8000))
state->m_slotcart->m_cart->chip_write(space, offset & 0x7fff, data); state->m_slotcart->m_cart->chip_write(space, offset & 0x7fff, data);
else if (state->m_slotcart->get_type() == SNES_OBC1 else if (state->m_slotcart->get_type() == SNES_OBC1
&& (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000)) && (offset < 0x400000 && (offset & 0xffff) >= 0x6000 && (offset & 0xffff) < 0x8000))
return state->m_slotcart->m_cart->chip_write(space, offset, data); return state->m_slotcart->m_cart->chip_write(space, offset, data);
else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011) else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011)
&& (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x1000)) && (offset >= 0x680000 && offset < 0x700000 && (offset & 0xffff) < 0x1000))
state->m_slotcart->m_cart->chip_write(space, offset, data);
else if ((state->m_slotcart->get_type() == SNES_ST010 || state->m_slotcart->get_type() == SNES_ST011)
&& (offset == 0x600000 || offset == 0x600001))
state->m_slotcart->m_cart->chip_write(space, offset, data); state->m_slotcart->m_cart->chip_write(space, offset, data);
else if (state->m_slotcart->get_type() == SNES_SRTC else if (state->m_slotcart->get_type() == SNES_SRTC
&& (offset < 0x400000 && (offset & 0xffff) == 0x2801)) && (offset < 0x400000 && (offset & 0xffff) == 0x2801))
state->m_slotcart->m_cart->chip_write(space, offset & 0xffff, data); state->m_slotcart->m_cart->chip_write(space, offset & 0xffff, data);
else if ((state->m_slotcart->get_type() == SNES_POKEMON) else if ((state->m_slotcart->get_type() == SNES_POKEMON)
&& (offset & 0x70000) == 0x0000) && (offset & 0x70000) == 0x0000)
{ {
// printf("hi write %x\n", offset); // printf("hi write %x\n", offset);
state->m_slotcart->m_cart->chip_write(space, offset, data); state->m_slotcart->m_cart->chip_write(space, offset, data);
} }
else else
@ -2334,26 +2343,26 @@ ADDRESS_MAP_END
static SLOT_INTERFACE_START(snes_cart) static SLOT_INTERFACE_START(snes_cart)
SLOT_INTERFACE_INTERNAL("lorom", SNS_LOROM) SLOT_INTERFACE_INTERNAL("lorom", SNS_LOROM)
SLOT_INTERFACE_INTERNAL("lorom_bsx", SNS_LOROM_BSX) // LoROM + BS-X slot - unsupported SLOT_INTERFACE_INTERNAL("lorom_bsx", SNS_LOROM_BSX) // LoROM + BS-X slot - unsupported
SLOT_INTERFACE_INTERNAL("lorom_cx4", SNS_LOROM) // Cart + CX4 - unsupported SLOT_INTERFACE_INTERNAL("lorom_cx4", SNS_LOROM) // Cart + CX4 - unsupported
SLOT_INTERFACE_INTERNAL("lorom_dsp", SNS_LOROM_NECDSP) SLOT_INTERFACE_INTERNAL("lorom_dsp", SNS_LOROM_NECDSP)
SLOT_INTERFACE_INTERNAL("lorom_dsp4", SNS_LOROM_NECDSP) SLOT_INTERFACE_INTERNAL("lorom_dsp4", SNS_LOROM_NECDSP)
SLOT_INTERFACE_INTERNAL("lorom_obc1", SNS_LOROM_OBC1) SLOT_INTERFACE_INTERNAL("lorom_obc1", SNS_LOROM_OBC1)
SLOT_INTERFACE_INTERNAL("lorom_sa1", SNS_LOROM) // Cart + SA1 - unsupported SLOT_INTERFACE_INTERNAL("lorom_sa1", SNS_LOROM) // Cart + SA1 - unsupported
SLOT_INTERFACE_INTERNAL("lorom_sdd1", SNS_LOROM_SDD1) SLOT_INTERFACE_INTERNAL("lorom_sdd1", SNS_LOROM_SDD1)
SLOT_INTERFACE_INTERNAL("lorom_sfx", SNS_LOROM_SUPERFX) SLOT_INTERFACE_INTERNAL("lorom_sfx", SNS_LOROM_SUPERFX)
SLOT_INTERFACE_INTERNAL("lorom_sgb", SNS_LOROM) // SuperGB base cart - unsupported SLOT_INTERFACE_INTERNAL("lorom_sgb", SNS_LOROM) // SuperGB base cart - unsupported
SLOT_INTERFACE_INTERNAL("lorom_st010", SNS_LOROM_SETA10) SLOT_INTERFACE_INTERNAL("lorom_st010", SNS_LOROM_SETA10)
SLOT_INTERFACE_INTERNAL("lorom_st011", SNS_LOROM_SETA11) SLOT_INTERFACE_INTERNAL("lorom_st011", SNS_LOROM_SETA11)
SLOT_INTERFACE_INTERNAL("lorom_st018", SNS_LOROM) // Cart + ST018 - unsupported SLOT_INTERFACE_INTERNAL("lorom_st018", SNS_LOROM) // Cart + ST018 - unsupported
SLOT_INTERFACE_INTERNAL("lorom_sufami", SNS_LOROM_SUFAMI) // Sufami Turbo base cart SLOT_INTERFACE_INTERNAL("lorom_sufami", SNS_LOROM_SUFAMI) // Sufami Turbo base cart
SLOT_INTERFACE_INTERNAL("hirom", SNS_HIROM) SLOT_INTERFACE_INTERNAL("hirom", SNS_HIROM)
SLOT_INTERFACE_INTERNAL("hirom_bsx", SNS_HIROM_BSX) // HiROM + BS-X slot - unsupported SLOT_INTERFACE_INTERNAL("hirom_bsx", SNS_HIROM_BSX) // HiROM + BS-X slot - unsupported
SLOT_INTERFACE_INTERNAL("hirom_dsp", SNS_HIROM_NECDSP) SLOT_INTERFACE_INTERNAL("hirom_dsp", SNS_HIROM_NECDSP)
SLOT_INTERFACE_INTERNAL("hirom_spc7110", SNS_HIROM_SPC7110) SLOT_INTERFACE_INTERNAL("hirom_spc7110", SNS_HIROM_SPC7110)
SLOT_INTERFACE_INTERNAL("hirom_spcrtc", SNS_HIROM_SPC7110_RTC) SLOT_INTERFACE_INTERNAL("hirom_spcrtc", SNS_HIROM_SPC7110_RTC)
SLOT_INTERFACE_INTERNAL("hirom_srtc", SNS_HIROM_SRTC) SLOT_INTERFACE_INTERNAL("hirom_srtc", SNS_HIROM_SRTC)
SLOT_INTERFACE_INTERNAL("bsxrom", SNS_ROM_BSX) // BS-X base cart - partial support only SLOT_INTERFACE_INTERNAL("bsxrom", SNS_ROM_BSX) // BS-X base cart - partial support only
// pirate carts // pirate carts
SLOT_INTERFACE_INTERNAL("lorom_poke", SNS_LOROM_POKEMON) SLOT_INTERFACE_INTERNAL("lorom_poke", SNS_LOROM_POKEMON)
SLOT_INTERFACE_END SLOT_INTERFACE_END
@ -2365,18 +2374,30 @@ static MACHINE_START( snesnew )
state->m_type = state->m_slotcart->get_type(); state->m_type = state->m_slotcart->get_type();
MACHINE_START_CALL(snes); MACHINE_START_CALL(snes_mess);
// FIXME: why installing handlers here does not work? it would allow to clean up handlers above... // in progress...
switch (state->m_type) switch (state->m_type)
{ {
case SNES_MODE21: case SNES_MODE21:
case SNES_MODE25:
case SNES_DSP_MODE21:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x000000, 0x7dffff, FUNC(snes21_lo_r), FUNC(snes21_lo_w)); machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x000000, 0x7dffff, FUNC(snes21_lo_r), FUNC(snes21_lo_w));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x800000, 0xffffff, FUNC(snes21_hi_r), FUNC(snes21_hi_w)); machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x800000, 0xffffff, FUNC(snes21_hi_r), FUNC(snes21_hi_w));
set_5a22_map(*state->m_maincpu); set_5a22_map(*state->m_maincpu);
break; break;
case SNES_DSP_MODE21:
// machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x000000, 0x7dffff, FUNC(snes21_lo_r), FUNC(snes21_lo_w));
// machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x800000, 0xffffff, FUNC(snes21_hi_r), FUNC(snes21_hi_w));
// machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x006000, 0x007fff, 0x1f0000, 0, read8_delegate(FUNC(device_sns_cart_interface::chip_read),state->m_slotcart->m_cart));
// machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x006000, 0x007fff, 0x1f0000, 0, write8_delegate(FUNC(device_sns_cart_interface::chip_write),state->m_slotcart->m_cart));
// set_5a22_map(*state->m_maincpu);
break;
case SNES_SRTC:
// machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x000000, 0x7dffff, FUNC(snes21_lo_r), FUNC(snes21_lo_w));
// machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x800000, 0xffffff, FUNC(snes21_hi_r), FUNC(snes21_hi_w));
// machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x002800, 0x002800, 0x3f0000, 0, read8_delegate(FUNC(device_sns_cart_interface::chip_read),state->m_slotcart->m_cart));
// machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x002801, 0x002801, 0x3f0000, 0, write8_delegate(FUNC(device_sns_cart_interface::chip_write),state->m_slotcart->m_cart));
// set_5a22_map(*state->m_maincpu);
break;
} }
} }

1
src/mess/machine/snescart.c
View File

@ -1312,4 +1312,3 @@ DRIVER_INIT_MEMBER(snes_state,snesst)
#include "machine/snesrtc.c" #include "machine/snesrtc.c"
#include "machine/snessdd1.c" #include "machine/snessdd1.c"
#include "machine/snes7110.c" #include "machine/snes7110.c"

21
src/mess/machine/sns_bsx.c
View File

@ -196,9 +196,9 @@ void BSX_base::write(UINT32 offset, UINT8 data)
{ {
// no 218d? no 2190? no 2195? no 2196? no 2198? no 219a-219f? // no 218d? no 2190? no 2195? no 2196? no 2198? no 219a-219f?
case 0x218f: case 0x218f:
regs[6] >>= 1; // 0x218e regs[6] >>= 1; // 0x218e
regs[6] = regs[7] - regs[6]; // 0x218f - 0x218e regs[6] = regs[7] - regs[6]; // 0x218f - 0x218e
regs[7] >>= 1; // 0x218f regs[7] >>= 1; // 0x218f
break; break;
case 0x2191: case 0x2191:
@ -207,7 +207,7 @@ void BSX_base::write(UINT32 offset, UINT8 data)
break; break;
case 0x2192: case 0x2192:
regs[8] = data; // sets 0x2190 regs[8] = data; // sets 0x2190
break; break;
default: default:
@ -266,8 +266,8 @@ void sns_rom_bsx_device::access_update()
rom_access = 0; rom_access = 0;
else else
{ {
// rom_access = BIT(m_cart_regs[0x02], 7) + 1; // rom_access = BIT(m_cart_regs[0x02], 7) + 1;
rom_access = 1; // for whatever reason bsxsore changes access mode here and then fails to read the ROM properly! rom_access = 1; // for whatever reason bsxsore changes access mode here and then fails to read the ROM properly!
printf("rom_access %s\n", !BIT(m_cart_regs[0x02], 7) ? "Lo" : "Hi"); printf("rom_access %s\n", !BIT(m_cart_regs[0x02], 7) ? "Lo" : "Hi");
} }
} }
@ -408,13 +408,13 @@ READ8_MEMBER(sns_rom_bsx_device::chip_read)
if ((offset & 0xffff) >= 0x2188 && (offset & 0xffff) < 0x21a0) if ((offset & 0xffff) >= 0x2188 && (offset & 0xffff) < 0x21a0)
return m_base_unit->read(offset & 0xffff); return m_base_unit->read(offset & 0xffff);
if ((offset & 0xf0ffff) == 0x005000) //$[00-0f]:5000 reg access if ((offset & 0xf0ffff) == 0x005000) //$[00-0f]:5000 reg access
{ {
UINT8 n = (offset >> 16) & 0x0f; UINT8 n = (offset >> 16) & 0x0f;
return m_cart_regs[n]; return m_cart_regs[n];
} }
if ((offset & 0xf8f000) == 0x105000) //$[10-17]:[5000-5fff] SRAM access if ((offset & 0xf8f000) == 0x105000) //$[10-17]:[5000-5fff] SRAM access
{ {
return m_nvram[((offset >> 16) & 7) * 0x1000 + (offset & 0xfff)]; return m_nvram[((offset >> 16) & 7) * 0x1000 + (offset & 0xfff)];
} }
@ -427,7 +427,7 @@ WRITE8_MEMBER(sns_rom_bsx_device::chip_write)
if ((offset & 0xffff) >= 0x2188 && (offset & 0xffff) < 0x21a0) if ((offset & 0xffff) >= 0x2188 && (offset & 0xffff) < 0x21a0)
m_base_unit->write(offset & 0xffff, data); m_base_unit->write(offset & 0xffff, data);
if ((offset & 0xf0ffff) == 0x005000) //$[00-0f]:5000 reg access if ((offset & 0xf0ffff) == 0x005000) //$[00-0f]:5000 reg access
{ {
UINT8 n = (offset >> 16) & 0x0f; UINT8 n = (offset >> 16) & 0x0f;
m_cart_regs[n] = data; m_cart_regs[n] = data;
@ -435,7 +435,7 @@ WRITE8_MEMBER(sns_rom_bsx_device::chip_write)
access_update(); access_update();
} }
if ((offset & 0xf8f000) == 0x105000) //$[10-17]:[5000-5fff] SRAM access if ((offset & 0xf8f000) == 0x105000) //$[10-17]:[5000-5fff] SRAM access
{ {
m_nvram[((offset >> 16) & 7) * 0x1000 + (offset & 0xfff)] = data; m_nvram[((offset >> 16) & 7) * 0x1000 + (offset & 0xfff)] = data;
} }
@ -583,4 +583,3 @@ READ8_MEMBER(sns_rom_bsmempak_device::read_h)
WRITE8_MEMBER(sns_rom_bsmempak_device::write_l) WRITE8_MEMBER(sns_rom_bsmempak_device::write_l)
{ {
} }

32
src/mess/machine/sns_bsx.h
View File

@ -17,7 +17,7 @@ public:
private: private:
// regs // regs
UINT8 regs[0x18]; // 0x2188-0x219f UINT8 regs[0x18]; // 0x2188-0x219f
// counter + clock // counter + clock
UINT8 r2192_counter; UINT8 r2192_counter;
@ -53,12 +53,12 @@ public:
// cart regs // cart regs
UINT8 m_cart_regs[16]; UINT8 m_cart_regs[16];
UINT8 access_00_1f; // 1 = CART, 0 = NOTHING UINT8 access_00_1f; // 1 = CART, 0 = NOTHING
UINT8 access_80_9f; // 1 = CART, 0 = NOTHING UINT8 access_80_9f; // 1 = CART, 0 = NOTHING
UINT8 access_40_4f; // 1 = NOTHING, 0 = PRAM UINT8 access_40_4f; // 1 = NOTHING, 0 = PRAM
UINT8 access_50_5f; // 1 = NOTHING, 0 = PRAM UINT8 access_50_5f; // 1 = NOTHING, 0 = PRAM
UINT8 access_60_6f; // 1 = PRAM, 0 = NOTHING UINT8 access_60_6f; // 1 = PRAM, 0 = NOTHING
UINT8 rom_access; // 2 = HiROM, 1 = LoROM, 0 = PRAM UINT8 rom_access; // 2 = HiROM, 1 = LoROM, 0 = PRAM
void access_update(); void access_update();
@ -84,10 +84,10 @@ public:
// additional reading and writing // additional reading and writing
virtual DECLARE_READ8_MEMBER(read_l); virtual DECLARE_READ8_MEMBER(read_l);
virtual DECLARE_READ8_MEMBER(read_h); virtual DECLARE_READ8_MEMBER(read_h);
// virtual DECLARE_WRITE8_MEMBER(write_l); // virtual DECLARE_WRITE8_MEMBER(write_l);
// virtual DECLARE_WRITE8_MEMBER(write_h); // virtual DECLARE_WRITE8_MEMBER(write_h);
// virtual DECLARE_READ8_MEMBER(chip_read); // virtual DECLARE_READ8_MEMBER(chip_read);
// virtual DECLARE_WRITE8_MEMBER(chip_write); // virtual DECLARE_WRITE8_MEMBER(chip_write);
private: private:
required_device<sns_bsx_cart_slot_device> m_slot; required_device<sns_bsx_cart_slot_device> m_slot;
@ -111,8 +111,8 @@ public:
virtual DECLARE_READ8_MEMBER(read_h); virtual DECLARE_READ8_MEMBER(read_h);
virtual DECLARE_WRITE8_MEMBER(write_l); virtual DECLARE_WRITE8_MEMBER(write_l);
virtual DECLARE_WRITE8_MEMBER(write_h); virtual DECLARE_WRITE8_MEMBER(write_h);
// virtual DECLARE_READ8_MEMBER(chip_read); // virtual DECLARE_READ8_MEMBER(chip_read);
// virtual DECLARE_WRITE8_MEMBER(chip_write); // virtual DECLARE_WRITE8_MEMBER(chip_write);
private: private:
required_device<sns_bsx_cart_slot_device> m_slot; required_device<sns_bsx_cart_slot_device> m_slot;
@ -135,9 +135,9 @@ public:
virtual DECLARE_READ8_MEMBER(read_l); virtual DECLARE_READ8_MEMBER(read_l);
virtual DECLARE_READ8_MEMBER(read_h); virtual DECLARE_READ8_MEMBER(read_h);
virtual DECLARE_WRITE8_MEMBER(write_l); virtual DECLARE_WRITE8_MEMBER(write_l);
// virtual DECLARE_WRITE8_MEMBER(write_h); // virtual DECLARE_WRITE8_MEMBER(write_h);
// virtual DECLARE_READ8_MEMBER(chip_read); // virtual DECLARE_READ8_MEMBER(chip_read);
// virtual DECLARE_WRITE8_MEMBER(chip_write); // virtual DECLARE_WRITE8_MEMBER(chip_write);
// flash regs // flash regs
UINT32 m_command; UINT32 m_command;

5
src/mess/machine/sns_rom.c
View File

@ -107,7 +107,7 @@ READ8_MEMBER(sns_rom_device::read_h)
value = m_nvram[offset & mask]; value = m_nvram[offset & mask];
} }
else else
value = 0xff; // this should never happened... value = 0xff; // this should never happened...
} }
else else
{ {
@ -125,7 +125,7 @@ WRITE8_MEMBER(sns_rom_device::write_l)
WRITE8_MEMBER(sns_rom_device::write_h) WRITE8_MEMBER(sns_rom_device::write_h)
{ {
if (offset >= 0x700000) // SRAM if (offset >= 0x700000) // SRAM
{ {
if (m_nvram_size > 0x8000) if (m_nvram_size > 0x8000)
{ {
@ -257,4 +257,3 @@ WRITE8_MEMBER( sns_rom_obc1_device::chip_write )
break; break;
} }
} }

6
src/mess/machine/sns_rom.h
View File

@ -7,7 +7,7 @@
// ======================> sns_rom_device // ======================> sns_rom_device
class sns_rom_device : public device_t, class sns_rom_device : public device_t,
public device_sns_cart_interface public device_sns_cart_interface
{ {
public: public:
// construction/destruction // construction/destruction
@ -38,8 +38,8 @@ public:
virtual void device_config_complete() { m_shortname = "sns_rom_pokemon"; } virtual void device_config_complete() { m_shortname = "sns_rom_pokemon"; }
// reading and writing // reading and writing
virtual DECLARE_READ8_MEMBER(chip_read); // protection device virtual DECLARE_READ8_MEMBER(chip_read); // protection device
virtual DECLARE_WRITE8_MEMBER(chip_write); // protection device virtual DECLARE_WRITE8_MEMBER(chip_write); // protection device
UINT8 m_latch; UINT8 m_latch;
}; };

3
src/mess/machine/sns_rom21.c
View File

@ -51,7 +51,7 @@ void sns_rom21_srtc_device::device_start()
m_index = -1; m_index = -1;
// at this stage, rtc_ram is not yet allocated. this will be fixed when converting RTC to be a separate device. // at this stage, rtc_ram is not yet allocated. this will be fixed when converting RTC to be a separate device.
// update_time(); // update_time();
save_item(NAME(m_mode)); save_item(NAME(m_mode));
save_item(NAME(m_index)); save_item(NAME(m_index));
@ -303,4 +303,3 @@ WRITE8_MEMBER(sns_rom21_srtc_device::chip_write)
} }
} }
} }

2
src/mess/machine/sns_rom21.h
View File

@ -7,7 +7,7 @@
// ======================> sns_rom21_device // ======================> sns_rom21_device
class sns_rom21_device : public device_t, class sns_rom21_device : public device_t,
public device_sns_cart_interface public device_sns_cart_interface
{ {
public: public:
// construction/destruction // construction/destruction

6
src/mess/machine/sns_sdd1.c
View File

@ -381,7 +381,7 @@ SDD1__emu::SDD1__emu(running_machine &machine)
m_BG6 = auto_alloc(machine, SDD1__BG(m_GCD, 6)); m_BG6 = auto_alloc(machine, SDD1__BG(m_GCD, 6));
m_BG7 = auto_alloc(machine, SDD1__BG(m_GCD, 7)); m_BG7 = auto_alloc(machine, SDD1__BG(m_GCD, 7));
m_PEM = auto_alloc(machine, SDD1__PEM(m_BG0, m_BG1, m_BG2, m_BG3, m_PEM = auto_alloc(machine, SDD1__PEM(m_BG0, m_BG1, m_BG2, m_BG3,
m_BG4, m_BG5, m_BG6, m_BG7)); m_BG4, m_BG5, m_BG6, m_BG7));
m_CM = auto_alloc(machine, SDD1__CM(m_PEM)); m_CM = auto_alloc(machine, SDD1__CM(m_PEM));
m_OL = auto_alloc(machine, SDD1__OL(m_CM)); m_OL = auto_alloc(machine, SDD1__OL(m_CM));
} }
@ -474,7 +474,7 @@ READ8_MEMBER( sns_rom_sdd1_device::chip_read )
return (m_mmc[3] >> 20) & 7; return (m_mmc[3] >> 20) & 7;
} }
// we should never get here, but... // we should never get here, but...
return 0; return 0;
} }
@ -597,6 +597,6 @@ READ8_MEMBER(sns_rom_sdd1_device::read_h)
WRITE8_MEMBER(sns_rom_sdd1_device::write_l) WRITE8_MEMBER(sns_rom_sdd1_device::write_l)
{ {
if (offset >= 0x700000 && (offset & 0xffff) < 0x8000 && m_nvram_size > 0) // SRAM if (offset >= 0x700000 && (offset & 0xffff) < 0x8000 && m_nvram_size > 0) // SRAM
m_nvram[offset & 0x1fff] = data; m_nvram[offset & 0x1fff] = data;
} }

10
src/mess/machine/sns_sdd1.h
View File

@ -54,10 +54,10 @@ class SDD1__PEM //Probability Estimation Module
{ {
public: public:
SDD1__PEM( SDD1__PEM(
SDD1__BG* associatedBG0, SDD1__BG* associatedBG1, SDD1__BG* associatedBG0, SDD1__BG* associatedBG1,
SDD1__BG* associatedBG2, SDD1__BG* associatedBG3, SDD1__BG* associatedBG2, SDD1__BG* associatedBG3,
SDD1__BG* associatedBG4, SDD1__BG* associatedBG5, SDD1__BG* associatedBG4, SDD1__BG* associatedBG5,
SDD1__BG* associatedBG6, SDD1__BG* associatedBG7) SDD1__BG* associatedBG6, SDD1__BG* associatedBG7)
{ {
m_BG[0] = associatedBG0; m_BG[0] = associatedBG0;
m_BG[1] = associatedBG1; m_BG[1] = associatedBG1;
@ -136,7 +136,7 @@ private:
// ======================> sns_rom_sdd1_device // ======================> sns_rom_sdd1_device
class sns_rom_sdd1_device : public device_t, class sns_rom_sdd1_device : public device_t,
public device_sns_cart_interface public device_sns_cart_interface
{ {
public: public:
// construction/destruction // construction/destruction

13
src/mess/machine/sns_sfx.c
View File

@ -116,7 +116,7 @@ READ8_MEMBER( sns_rom_superfx_device::read_l )
if (address >= 0x6000 && address < 0x8000) if (address >= 0x6000 && address < 0x8000)
{ {
if (superfx_access_ram(m_superfx)) if (superfx_access_ram(m_superfx))
return sfx_ram[offset & 0x1fff]; return sfx_ram[offset & 0x1fff];
} }
if (address >= 0x8000) if (address >= 0x8000)
return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)]; return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)];
@ -139,10 +139,10 @@ READ8_MEMBER( sns_rom_superfx_device::read_l )
else else
{ {
if (superfx_access_ram(m_superfx)) if (superfx_access_ram(m_superfx))
return sfx_ram[offset & 0xfffff]; return sfx_ram[offset & 0xfffff];
} }
return 0xff; // should be open bus... return 0xff; // should be open bus...
} }
@ -173,7 +173,7 @@ READ8_MEMBER(sns_rom_superfx_device::read_h)
if (address >= 0x6000 && address < 0x8000) if (address >= 0x6000 && address < 0x8000)
{ {
if (superfx_access_ram(m_superfx)) if (superfx_access_ram(m_superfx))
return sfx_ram[offset & 0x1fff]; return sfx_ram[offset & 0x1fff];
} }
if (address >= 0x8000) if (address >= 0x8000)
return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)]; return m_rom[rom_bank_map[offset / 0x10000] * 0x8000 + (offset & 0x7fff)];
@ -196,10 +196,10 @@ READ8_MEMBER(sns_rom_superfx_device::read_h)
else else
{ {
if (superfx_access_ram(m_superfx)) if (superfx_access_ram(m_superfx))
return sfx_ram[offset & 0xfffff]; return sfx_ram[offset & 0xfffff];
} }
return 0xff; // should be open bus... return 0xff; // should be open bus...
} }
WRITE8_MEMBER( sns_rom_superfx_device::write_h ) WRITE8_MEMBER( sns_rom_superfx_device::write_h )
@ -219,4 +219,3 @@ WRITE8_MEMBER( sns_rom_superfx_device::write_h )
sfx_ram[offset & 0xfffff] = data; sfx_ram[offset & 0xfffff] = data;
} }
} }

34
src/mess/machine/sns_slot.c
View File

@ -135,12 +135,12 @@ void device_sns_cart_interface::rom_map_setup(UINT32 size)
} }
// check bank map! // check bank map!
// for (i = 0; i < 256; i++) // for (i = 0; i < 256; i++)
// { // {
// printf("bank %3d = %3d\t", i, rom_bank_map[i]); // printf("bank %3d = %3d\t", i, rom_bank_map[i]);
// if ((i%8) == 7) // if ((i%8) == 7)
// printf("\n"); // printf("\n");
// } // }
} }
//************************************************************************** //**************************************************************************
@ -244,8 +244,8 @@ static const sns_slot slot_list[] =
{ SNES_STROM, "strom"}, { SNES_STROM, "strom"},
// pirate carts // pirate carts
{ SNES_POKEMON, "lorom_poke"}, { SNES_POKEMON, "lorom_poke"},
{ SNES_BANANA, "lorom_paja"}, // wip { SNES_BANANA, "lorom_paja"}, // wip
{ SNES_SOULBLAD, "lorom_sbld"} // wip { SNES_SOULBLAD, "lorom_sbld"} // wip
}; };
static int sns_get_pcb_id(const char *slot) static int sns_get_pcb_id(const char *slot)
@ -454,10 +454,10 @@ static UINT32 snes_find_hilo_mode( UINT8 *buffer, UINT32 buf_len )
retvalue = 0x40ffc0; retvalue = 0x40ffc0;
logerror( "\t HiROM/LoROM id: %s (LoROM: %d , HiROM: %d, ExHiROM: %d)\n", logerror( "\t HiROM/LoROM id: %s (LoROM: %d , HiROM: %d, ExHiROM: %d)\n",
(retvalue == 0x007fc0) ? "LoROM" : (retvalue == 0x007fc0) ? "LoROM" :
(retvalue == 0x00ffc0) ? "HiROM" : (retvalue == 0x00ffc0) ? "HiROM" :
(retvalue == 0x40ffc0) ? "ExHiROM" : "Other", (retvalue == 0x40ffc0) ? "ExHiROM" : "Other",
valid_mode20, valid_mode21, valid_mode25); valid_mode20, valid_mode21, valid_mode25);
return retvalue; return retvalue;
} }
@ -676,7 +676,7 @@ void base_sns_cart_slot_device::setup_nvram()
UINT8 sram_size = (m_type == SNES_SFX) ? (ROM[0x00ffbd] & 0x07) : (ROM[hilo_mode + 0x18] & 0x07); UINT8 sram_size = (m_type == SNES_SFX) ? (ROM[0x00ffbd] & 0x07) : (ROM[hilo_mode + 0x18] & 0x07);
if (sram_size) if (sram_size)
{ {
UINT32 max = (hilo_mode == 0x007fc0) ? 0x80000 : 0x20000; // MODE20 vs MODE21 UINT32 max = (hilo_mode == 0x007fc0) ? 0x80000 : 0x20000; // MODE20 vs MODE21
size = 1024 << (ROM[0x00ffbd] & 0x07); size = 1024 << (ROM[0x00ffbd] & 0x07);
if (size > max) if (size > max)
size = max; size = max;
@ -1074,10 +1074,10 @@ void base_sns_cart_slot_device::internal_header_logging(UINT8 *ROM, UINT32 len)
logerror( "===========\n\n" ); logerror( "===========\n\n" );
logerror( "\tTotal blocks: 0x%x\n", len); logerror( "\tTotal blocks: 0x%x\n", len);
logerror( "\tROM bank size: %s \n", logerror( "\tROM bank size: %s \n",
(type == SNES_MODE20) ? "LoROM" : (type == SNES_MODE20) ? "LoROM" :
(type == SNES_MODE21) ? "HiROM" : (type == SNES_MODE21) ? "HiROM" :
(type == SNES_MODE22) ? "ExLoROM" : (type == SNES_MODE22) ? "ExLoROM" :
(type == SNES_MODE25) ? "ExHiROM" : "Other (BSX or ST)" ); (type == SNES_MODE25) ? "ExHiROM" : "Other (BSX or ST)" );
logerror( "\tCompany: %s [%.2s]\n", companies[company], company_id ); logerror( "\tCompany: %s [%.2s]\n", companies[company], company_id );
logerror( "\tROM ID: %.4s\n\n", rom_id ); logerror( "\tROM ID: %.4s\n\n", rom_id );

16
src/mess/machine/sns_slot.h
View File

@ -11,8 +11,8 @@ enum
{ {
SNES_MODE20 = 0, SNES_MODE20 = 0,
SNES_MODE21, SNES_MODE21,
SNES_MODE22, // ExLoROM - not used anymore in emulation (only to log info), will be removed SNES_MODE22, // ExLoROM - not used anymore in emulation (only to log info), will be removed
SNES_MODE25, // ExHiROM - not used anymore in emulation (only to log info), will be removed SNES_MODE25, // ExHiROM - not used anymore in emulation (only to log info), will be removed
SNES_CX4, SNES_CX4,
SNES_DSP, SNES_DSP,
SNES_DSP_MODE21, SNES_DSP_MODE21,
@ -36,8 +36,8 @@ enum
SNES_STROM, SNES_STROM,
// pirate carts // pirate carts
SNES_POKEMON, SNES_POKEMON,
SNES_BANANA, // wip SNES_BANANA, // wip
SNES_SOULBLAD // wip SNES_SOULBLAD // wip
}; };
@ -84,13 +84,13 @@ public:
UINT8 *m_rom; UINT8 *m_rom;
UINT8 *m_nvram; UINT8 *m_nvram;
UINT8 *m_bios; UINT8 *m_bios;
UINT8 *m_rtc_ram; // temp pointer to save RTC ram to nvram (will disappear when RTCs become devices) UINT8 *m_rtc_ram; // temp pointer to save RTC ram to nvram (will disappear when RTCs become devices)
UINT32 m_rom_size; UINT32 m_rom_size;
UINT32 m_nvram_size; UINT32 m_nvram_size;
UINT32 m_bios_size; UINT32 m_bios_size;
UINT32 m_rtc_ram_size; // temp UINT32 m_rtc_ram_size; // temp
UINT8 rom_bank_map[256]; // 32K chunks of rom UINT8 rom_bank_map[256]; // 32K chunks of rom
}; };
@ -146,7 +146,7 @@ public:
// this should be private, but then there is some problem installing delegates in the driver... // this should be private, but then there is some problem installing delegates in the driver...
//private: //private:
device_sns_cart_interface* m_cart; device_sns_cart_interface* m_cart;
int m_type; int m_type;
}; };

9
src/mess/machine/sns_spc7110.c
View File

@ -92,11 +92,11 @@ void sns_rom_spc7110_device::spc7110_start()
m_r4830 = 0x00; m_r4830 = 0x00;
m_r4831 = 0; m_r4831 = 0;
m_dx_offset = spc7110_datarom_addr(0 * 0x100000, 0x200000); // we would need the rom length here... m_dx_offset = spc7110_datarom_addr(0 * 0x100000, 0x200000); // we would need the rom length here...
m_r4832 = 1; m_r4832 = 1;
m_ex_offset = spc7110_datarom_addr(1 * 0x100000, 0x200000); // we would need the rom length here... m_ex_offset = spc7110_datarom_addr(1 * 0x100000, 0x200000); // we would need the rom length here...
m_r4833 = 2; m_r4833 = 2;
m_fx_offset = spc7110_datarom_addr(2 * 0x100000, 0x200000); // we would need the rom length here... m_fx_offset = spc7110_datarom_addr(2 * 0x100000, 0x200000); // we would need the rom length here...
m_r4834 = 0x00; m_r4834 = 0x00;
m_r4840 = 0x00; m_r4840 = 0x00;
@ -179,7 +179,7 @@ void sns_rom_spc7110rtc_device::device_start()
m_rtc_offset = 0; m_rtc_offset = 0;
// at this stage, rtc_ram is not yet allocated. this will be fixed when converting RTC to be a separate device. // at this stage, rtc_ram is not yet allocated. this will be fixed when converting RTC to be a separate device.
// spc7110_update_time(0); // spc7110_update_time(0);
save_item(NAME(m_rtc_state)); save_item(NAME(m_rtc_state));
save_item(NAME(m_rtc_mode)); save_item(NAME(m_rtc_mode));
@ -1640,4 +1640,3 @@ WRITE8_MEMBER(sns_rom_spc7110_device::chip_write)
break; break;
} }
} }

10
src/mess/machine/sns_spc7110.h
View File

@ -196,12 +196,12 @@ public:
// reading and writing // reading and writing
// we just use the spc7110 ones for the moment, pending the split of regs 0x4840-0x4842 (RTC) from the base add-on // we just use the spc7110 ones for the moment, pending the split of regs 0x4840-0x4842 (RTC) from the base add-on
// virtual DECLARE_READ8_MEMBER(read_l); // virtual DECLARE_READ8_MEMBER(read_l);
// virtual DECLARE_READ8_MEMBER(read_h); // virtual DECLARE_READ8_MEMBER(read_h);
// virtual DECLARE_WRITE8_MEMBER(write_l); // virtual DECLARE_WRITE8_MEMBER(write_l);
// virtual DECLARE_READ8_MEMBER(chip_read); // virtual DECLARE_READ8_MEMBER(chip_read);
// virtual DECLARE_WRITE8_MEMBER(chip_write); // virtual DECLARE_WRITE8_MEMBER(chip_write);
}; };
// device type definition // device type definition

16
src/mess/machine/sns_sufami.c
View File

@ -81,27 +81,27 @@ READ8_MEMBER(sns_rom_sufami_device::read_l)
READ8_MEMBER(sns_rom_sufami_device::read_h) READ8_MEMBER(sns_rom_sufami_device::read_h)
{ {
if (offset < 0x200000) // SUFAMI TURBO ROM if (offset < 0x200000) // SUFAMI TURBO ROM
{ {
int bank = offset / 0x10000; int bank = offset / 0x10000;
return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)]; return m_rom[rom_bank_map[bank] * 0x8000 + (offset & 0x7fff)];
} }
if (offset >= 0x200000 && offset < 0x400000) // SLOT1 STROM if (offset >= 0x200000 && offset < 0x400000) // SLOT1 STROM
{ {
if (m_slot1->m_cart) if (m_slot1->m_cart)
return m_slot1->m_cart->read_l(space, offset - 0x200000); return m_slot1->m_cart->read_l(space, offset - 0x200000);
} }
if (offset >= 0x400000 && offset < 0x600000) // SLOT2 STROM if (offset >= 0x400000 && offset < 0x600000) // SLOT2 STROM
{ {
if (m_slot2->m_cart) if (m_slot2->m_cart)
return m_slot2->m_cart->read_l(space, offset - 0x400000); return m_slot2->m_cart->read_l(space, offset - 0x400000);
} }
if (offset >= 0x600000 && offset < 0x640000) // SLOT1 RAM if (offset >= 0x600000 && offset < 0x640000) // SLOT1 RAM
{ {
if (m_slot1->m_cart && (offset & 0xffff) > 0x8000) if (m_slot1->m_cart && (offset & 0xffff) > 0x8000)
return m_slot1->m_cart->read_h(space, offset - 0x600000); return m_slot1->m_cart->read_h(space, offset - 0x600000);
} }
if (offset >= 0x700000 && offset < 0x740000) // SLOT2 RAM if (offset >= 0x700000 && offset < 0x740000) // SLOT2 RAM
{ {
if (m_slot2->m_cart && (offset & 0xffff) > 0x8000) if (m_slot2->m_cart && (offset & 0xffff) > 0x8000)
return m_slot2->m_cart->read_h(space, offset - 0x700000); return m_slot2->m_cart->read_h(space, offset - 0x700000);
@ -117,13 +117,13 @@ WRITE8_MEMBER(sns_rom_sufami_device::write_l)
WRITE8_MEMBER(sns_rom_sufami_device::write_h) WRITE8_MEMBER(sns_rom_sufami_device::write_h)
{ {
if (offset >= 0x600000 && offset < 0x640000) // SLOT1 RAM if (offset >= 0x600000 && offset < 0x640000) // SLOT1 RAM
{ {
if (m_slot1->m_cart && (offset & 0xffff) > 0x8000) if (m_slot1->m_cart && (offset & 0xffff) > 0x8000)
return m_slot1->m_cart->write_h(space, offset - 0x600000, data); return m_slot1->m_cart->write_h(space, offset - 0x600000, data);
} }
if (offset >= 0x700000 && offset < 0x740000) // SLOT2 RAM if (offset >= 0x700000 && offset < 0x740000) // SLOT2 RAM
{ {
if (m_slot2->m_cart && (offset & 0xffff) > 0x8000) if (m_slot2->m_cart && (offset & 0xffff) > 0x8000)
return m_slot2->m_cart->write_h(space, offset - 0x700000, data); return m_slot2->m_cart->write_h(space, offset - 0x700000, data);
@ -172,5 +172,3 @@ WRITE8_MEMBER(sns_rom_strom_device::write_h)
m_nvram[bank * 0x8000 + (offset & 0x7fff)] = data; m_nvram[bank * 0x8000 + (offset & 0x7fff)] = data;
} }
} }

8
src/mess/machine/sns_sufami.h
View File

@ -42,10 +42,10 @@ public:
virtual void device_config_complete() { m_shortname = "sns_strom"; } virtual void device_config_complete() { m_shortname = "sns_strom"; }
// additional reading and writing // additional reading and writing
virtual DECLARE_READ8_MEMBER(read_l); // used for ROM virtual DECLARE_READ8_MEMBER(read_l); // used for ROM
virtual DECLARE_READ8_MEMBER(read_h); // used for ROM virtual DECLARE_READ8_MEMBER(read_h); // used for ROM
virtual DECLARE_WRITE8_MEMBER(write_l); // used for RAM virtual DECLARE_WRITE8_MEMBER(write_l); // used for RAM
virtual DECLARE_WRITE8_MEMBER(write_h); // used for RAM virtual DECLARE_WRITE8_MEMBER(write_h); // used for RAM
}; };

14
src/mess/machine/sns_upd.c
View File

@ -24,19 +24,19 @@ const device_type SNS_LOROM_SETA11 = &device_creator<sns_rom_seta11dsp_device>;
sns_rom20_necdsp_device::sns_rom20_necdsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) sns_rom20_necdsp_device::sns_rom20_necdsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: sns_rom_device(mconfig, SNS_LOROM_NECDSP, "SNES Cart (LoROM) + NEC DSP", tag, owner, clock), : sns_rom_device(mconfig, SNS_LOROM_NECDSP, "SNES Cart (LoROM) + NEC DSP", tag, owner, clock),
m_upd7725(*this, "dsp") m_upd7725(*this, "dsp")
{ {
} }
sns_rom21_necdsp_device::sns_rom21_necdsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) sns_rom21_necdsp_device::sns_rom21_necdsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: sns_rom21_device(mconfig, SNS_HIROM_NECDSP, "SNES Cart (HiROM) + NEC DSP", tag, owner, clock), : sns_rom21_device(mconfig, SNS_HIROM_NECDSP, "SNES Cart (HiROM) + NEC DSP", tag, owner, clock),
m_upd7725(*this, "dsp") m_upd7725(*this, "dsp")
{ {
} }
sns_rom_setadsp_device::sns_rom_setadsp_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) sns_rom_setadsp_device::sns_rom_setadsp_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: sns_rom_device(mconfig, type, name, tag, owner, clock), : sns_rom_device(mconfig, type, name, tag, owner, clock),
m_upd96050(*this, "dsp") m_upd96050(*this, "dsp")
{ {
} }
@ -223,6 +223,9 @@ READ8_MEMBER( sns_rom_setadsp_device::chip_read )
else else
return temp & 0xff; return temp & 0xff;
} }
if (offset == 0x600000 || offset == 0x600001)
return (offset & 1) ? m_upd96050->snesdsp_read(FALSE) : m_upd96050->snesdsp_read(TRUE);
return 0xff; return 0xff;
} }
@ -248,6 +251,10 @@ WRITE8_MEMBER( sns_rom_setadsp_device::chip_write )
m_upd96050->dataram_w(address/2, temp); m_upd96050->dataram_w(address/2, temp);
return; return;
} }
if (offset == 0x600000)
m_upd96050->snesdsp_write(TRUE, data);
if (offset == 0x600001)
m_upd96050->snesdsp_write(FALSE, data);
} }
@ -316,4 +323,3 @@ machine_config_constructor sns_rom_seta11dsp_device::device_mconfig_additions()
{ {
return MACHINE_CONFIG_NAME( snes_st011 ); return MACHINE_CONFIG_NAME( snes_st011 );
} }