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Split out Namco 51xx and 53xx into separate modules.

Browse Source 
Converted Namco 51xx and 53xx into proper devices. The MB84xx is not
yet emulated, but is now present.

Converted 51xx and 53xx interfaces to use the devcb system for 
port I/O callbacks.

Dig Dug is known to be somewhat broken at the moment.
This commit is contained in:
Aaron Giles 2009-05-26 15:16:58 +00:00
parent ca0bee02b5
commit adffaf795b
17 changed files with 942 additions and 518 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
.gitattributes vendored
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@ -2425,7 +2425,6 @@ src/mame/includes/mw8080bw.h svneol=native#text/plain
src/mame/includes/mystston.h svneol=native#text/plain
src/mame/includes/n64.h svneol=native#text/plain
src/mame/includes/n8080.h svneol=native#text/plain
src/mame/includes/nam_cust.h svneol=native#text/plain
src/mame/includes/namcoic.h svneol=native#text/plain
src/mame/includes/namcona1.h svneol=native#text/plain
src/mame/includes/namconb1.h svneol=native#text/plain
@ -2773,6 +2772,10 @@ src/mame/machine/mw8080bw.c svneol=native#text/plain
src/mame/machine/n64.c svneol=native#text/plain
src/mame/machine/namco50.c svneol=native#text/plain
src/mame/machine/namco50.h svneol=native#text/plain
src/mame/machine/namco51.c svneol=native#text/plain
src/mame/machine/namco51.h svneol=native#text/plain
src/mame/machine/namco53.c svneol=native#text/plain
src/mame/machine/namco53.h svneol=native#text/plain
src/mame/machine/namcoio.c svneol=native#text/plain
src/mame/machine/namcoio.h svneol=native#text/plain
src/mame/machine/namcond1.c svneol=native#text/plain

6
src/emu/sound/namco52.c
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@ -2,7 +2,7 @@
Namco 52XX
This instance of the Fujitsu MB8852 MCU is programmed to act as a sample player.
This instance of the Fujitsu MB8843 MCU is programmed to act as a sample player.
It is used by just two games: Bosconian and Pole Position.
A0-A15 = address to read from sample ROMs
@ -180,7 +180,7 @@ static DEVICE_START( namco_52xx )
}
void namco_52xx_write(const device_config *device, int data)
WRITE8_DEVICE_HANDLER( namco_52xx_write )
{
namco_52xx *chip = get_safe_token(device);
data &= 0x0f;
@ -224,7 +224,7 @@ ADDRESS_MAP_END
static MACHINE_DRIVER_START( namco_52xx )
MDRV_CPU_ADD("mcu", MB8842/*MB8852*/, DERIVED_CLOCK(1,6)) /* parent clock, internally divided by 6 */
MDRV_CPU_ADD("mcu", MB8843, DERIVED_CLOCK(1,6)) /* parent clock, internally divided by 6 */
MDRV_CPU_PROGRAM_MAP(namco_52xx_map_program)
MDRV_CPU_DATA_MAP(namco_52xx_map_data)
MDRV_CPU_IO_MAP(namco_52xx_map_io)

4
src/emu/sound/namco52.h
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@ -28,7 +28,9 @@ struct _namco_52xx_interface
double filt_gain;
};
void namco_52xx_write(const device_config *device, int data);
WRITE8_DEVICE_HANDLER( namco_52xx_write );
DEVICE_GET_INFO( namco_52xx );
#define SOUND_NAMCO_52XX DEVICE_GET_INFO_NAME( namco_52xx )

4
src/mame/audio/namco54.c
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@ -118,7 +118,7 @@ static TIMER_CALLBACK( namco_54xx_irq_clear )
cpu_set_input_line(state->cpu, 0, CLEAR_LINE);
}
void namco_54xx_write(const device_config *device, UINT8 data)
WRITE8_DEVICE_HANDLER( namco_54xx_write )
{
namco_54xx_state *state = get_safe_token(device);
@ -165,7 +165,7 @@ MACHINE_DRIVER_END
ROM_START( namco_54xx )
ROM_REGION( 0x400, "mcu", 0 )
ROM_REGION( 0x400, "mcu", ROMREGION_LOADBYNAME )
ROM_LOAD( "54xx.bin", 0x0000, 0x0400, CRC(ee7357e0) SHA1(01bdf984a49e8d0cc8761b2cc162fd6434d5afbe) )
ROM_END

5
src/mame/audio/namco54.h
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@ -12,7 +12,6 @@ struct _namco_54xx_config
};
#define MDRV_NAMCO_54XX_ADD(_tag, _clock, _discrete, _firstnode) \
MDRV_DEVICE_ADD(_tag, NAMCO_54XX, _clock) \
MDRV_DEVICE_CONFIG_DATAPTR(namco_54xx_config, discrete, _discrete) \
@ -22,12 +21,14 @@ struct _namco_54xx_config
MDRV_DEVICE_REMOVE(_tag)
void namco_54xx_write(const device_config *device, UINT8 data);
WRITE8_DEVICE_HANDLER( namco_54xx_write );
/* device get info callback */
#define NAMCO_54XX DEVICE_GET_INFO_NAME(namco_54xx)
DEVICE_GET_INFO( namco_54xx );
/* discrete nodes */
#define NAMCO_54XX_0_DATA(base) (NODE_RELATIVE(base, 0))
#define NAMCO_54XX_1_DATA(base) (NODE_RELATIVE(base, 1))

238
src/mame/drivers/galaga.c
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@ -700,13 +700,14 @@ TODO:
#include "machine/atari_vg.h"
#include "machine/namcoio.h"
#include "machine/namco50.h"
#include "machine/namco51.h"
#include "machine/namco53.h"
#include "includes/galaga.h"
#include "sound/namco.h"
#include "sound/namco52.h"
#include "machine/rescap.h"
#include "sound/samples.h"
#include "audio/namco54.h"
#include "nam_cust.h"
#define MASTER_CLOCK (XTAL_18_432MHz)
@ -773,36 +774,47 @@ static WRITE8_HANDLER( bosco_latch_w )
}
}
static CUSTOM_INPUT( shifted_port_r ) { return input_port_read(field->port->machine, param) >> 4; }
static READ8_HANDLER( in0_l ) { return input_port_read(space->machine, "IN0"); } // fire and start buttons
static READ8_HANDLER( in0_h ) { return input_port_read(space->machine, "IN0") >> 4; } // coins
static READ8_HANDLER( in1_l ) { return input_port_read(space->machine, "IN1"); } // P1 joystick
static READ8_HANDLER( in1_h ) { return input_port_read(space->machine, "IN1") >> 4; } // P2 joystick
static READ8_HANDLER( dipA_l ) { return input_port_read(space->machine, "DSWA"); } // dips A
static READ8_HANDLER( dipA_h ) { return input_port_read(space->machine, "DSWA") >> 4; } // dips A
static READ8_HANDLER( dipB_l ) { return input_port_read(space->machine, "DSWB"); } // dips B
static READ8_HANDLER( dipB_h ) { return input_port_read(space->machine, "DSWB") >> 4; } // dips B
static WRITE8_HANDLER( out_0 )
static WRITE8_DEVICE_HANDLER( out_0 )
{
set_led_status(1,data & 1);
set_led_status(0,data & 2);
coin_counter_w(1,~data & 4);
coin_counter_w(0,~data & 8);
}
static WRITE8_HANDLER( out_1 )
static WRITE8_DEVICE_HANDLER( out_1 )
{
coin_lockout_global_w(data & 1);
}
static const struct namcoio_interface intf0 =
static const namco_51xx_interface namco_51xx_intf =
{
{ in0_l, in0_h, in1_l, in1_h }, /* port read handlers */
{ out_0, out_1 } /* port write handlers */
{ /* port read handlers */
DEVCB_INPUT_PORT("IN0L"),
DEVCB_INPUT_PORT("IN0H"),
DEVCB_INPUT_PORT("IN1L"),
DEVCB_INPUT_PORT("IN1H")
},
{ /* port write handlers */
DEVCB_HANDLER(out_0),
DEVCB_HANDLER(out_1)
}
};
static const struct namcoio_interface intf1 =
static const namco_53xx_interface namco_53xx_intf =
{
{ dipA_l, dipA_h, dipB_l, dipB_h }, /* port read handlers */
{ NULL, NULL } /* port write handlers */
{ /* port read handlers */
DEVCB_INPUT_PORT("DSWA"),
DEVCB_INPUT_PORT("DSWA_HI"),
DEVCB_INPUT_PORT("DSWB"),
DEVCB_INPUT_PORT("DSWB_HI")
},
{ /* port write handlers */
DEVCB_NULL,
DEVCB_NULL
}
};
@ -843,7 +855,7 @@ static MACHINE_RESET( bosco )
bosco_latch_reset(machine);
namco_06xx_init(machine, 0, 0,
NAMCOIO_51XX, &intf0, NULL,
NAMCOIO_51XX, NULL, "51xx",
NAMCOIO_NONE, NULL, NULL,
NAMCOIO_50XX, NULL, "50xx_1",
NAMCOIO_54XX, NULL, "54xx");
@ -863,7 +875,7 @@ static MACHINE_RESET( galaga )
bosco_latch_reset(machine);
namco_06xx_init(machine, 0, 0,
NAMCOIO_51XX, &intf0, NULL,
NAMCOIO_51XX, NULL, "51xx",
NAMCOIO_NONE, NULL, NULL,
NAMCOIO_NONE, NULL, NULL,
NAMCOIO_54XX, NULL, "54xx");
@ -877,7 +889,7 @@ static MACHINE_RESET( xevious )
bosco_latch_reset(machine);
namco_06xx_init(machine, 0, 0,
NAMCOIO_51XX, &intf0, NULL,
NAMCOIO_51XX, NULL, "51xx",
NAMCOIO_NONE, NULL, NULL,
NAMCOIO_50XX, NULL, "50xx",
NAMCOIO_54XX, NULL, "54xx");
@ -901,8 +913,8 @@ static MACHINE_RESET( digdug )
bosco_latch_reset(machine);
namco_06xx_init(machine, 0, 0,
NAMCOIO_51XX, &intf0, NULL,
NAMCOIO_53XX_DIGDUG, &intf1, NULL,
NAMCOIO_51XX, NULL, "51xx",
NAMCOIO_53XX, NULL, "53xx",
NAMCOIO_NONE, NULL, NULL,
NAMCOIO_NONE, NULL, NULL);
@ -1015,25 +1027,29 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( bosco )
PORT_START("IN0")
PORT_START("IN0L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
PORT_START("IN1")
PORT_START("IN0H")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
PORT_START("IN1L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
PORT_START("IN1H")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
PORT_START("DSWA")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
@ -1059,7 +1075,7 @@ static INPUT_PORTS_START( bosco )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) )
PORT_DIPSETTING( 0x80, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
PORT_START("DSWB")
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) )
PORT_DIPSETTING( 0x01, DEF_STR( 4C_1C ) )
@ -1118,25 +1134,29 @@ INPUT_PORTS_END
static INPUT_PORTS_START( galaga )
PORT_START("IN0")
PORT_START("IN0L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
PORT_START("IN1")
PORT_START("IN0H")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
PORT_START("IN1L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_COCKTAIL
PORT_START("IN1H")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_COCKTAIL
PORT_START("DSWA")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
@ -1223,38 +1243,44 @@ INPUT_PORTS_END
static INPUT_PORTS_START( gatsbee )
PORT_INCLUDE( galaga )
PORT_MODIFY("IN1")
PORT_MODIFY("IN1L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_COCKTAIL
PORT_MODIFY("IN1L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_COCKTAIL
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_COCKTAIL
INPUT_PORTS_END
static INPUT_PORTS_START( xevious )
PORT_START("IN0")
PORT_START("IN0L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
PORT_START("IN1")
PORT_START("IN0H")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
PORT_START("IN1L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
PORT_START("IN1H")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
PORT_START("DSWA")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) )
@ -1388,25 +1414,29 @@ INPUT_PORTS_END
static INPUT_PORTS_START( digdug )
PORT_START("IN0")
PORT_START("IN0L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
PORT_START("IN1")
PORT_START("IN0H")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
PORT_START("IN1L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_COCKTAIL
PORT_START("IN1H")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_COCKTAIL
PORT_START("DSWA")
PORT_DIPNAME( 0x07, 0x01, DEF_STR( Coin_B ) )
@ -1441,6 +1471,9 @@ static INPUT_PORTS_START( digdug )
PORT_DIPSETTING( 0x80, "3" )
PORT_DIPSETTING( 0xc0, "5" )
PORT_START("DSWA_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
PORT_START("DSWB")
PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_A ) )
PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
@ -1464,6 +1497,9 @@ static INPUT_PORTS_START( digdug )
PORT_DIPSETTING( 0x02, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x03, DEF_STR( Hardest ) )
PORT_START("DSWB_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWB")
INPUT_PORTS_END
@ -1635,6 +1671,7 @@ static MACHINE_DRIVER_START( bosco )
MDRV_NAMCO_50XX_ADD("50xx_1", MASTER_CLOCK/12) /* 1.536 MHz */
MDRV_NAMCO_50XX_ADD("50xx_2", MASTER_CLOCK/12) /* 1.536 MHz */
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
MDRV_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/12, "discrete", NODE_01) /* 1.536 MHz */
MDRV_WATCHDOG_VBLANK_INIT(8)
@ -1691,6 +1728,7 @@ static MACHINE_DRIVER_START( galaga )
MDRV_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
MDRV_CPU_PROGRAM_MAP(galaga_map)
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
MDRV_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/12, "discrete", NODE_01) /* 1.536 MHz */
MDRV_WATCHDOG_VBLANK_INIT(8)
@ -1758,6 +1796,7 @@ static MACHINE_DRIVER_START( xevious )
MDRV_CPU_PROGRAM_MAP(xevious_map)
MDRV_NAMCO_50XX_ADD("50xx", MASTER_CLOCK/12) /* 1.536 MHz */
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
MDRV_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/12, "discrete", NODE_01) /* 1.536 MHz */
MDRV_WATCHDOG_VBLANK_INIT(8)
@ -1834,6 +1873,9 @@ static MACHINE_DRIVER_START( digdug )
MDRV_CPU_ADD("sub2", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
MDRV_CPU_PROGRAM_MAP(digdug_map)
MDRV_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/12, namco_51xx_intf) /* 1.536 MHz */
MDRV_NAMCO_53XX_ADD("53xx", MASTER_CLOCK/12, namco_53xx_intf) /* 1.536 MHz */
MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
/* synchronization of the CPUs */
MDRV_MACHINE_START(galaga)
@ -1891,10 +1933,6 @@ Namco/Midway, 1981
*/
#define BOSCO_CUSTOMS \
ROM_REGION_NAMCO_51XX( "51xx" ) \
ROM_START( bosco )
ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU */
ROM_LOAD( "bos3_1.bin", 0x0000, 0x1000, CRC(96021267) SHA1(bd49b0caabcccf9df45a272d767456a4fc8a7c07) )
@ -1909,8 +1947,6 @@ ROM_START( bosco )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "2900.3e", 0x0000, 0x1000, CRC(d45a4911) SHA1(547236adca9174f5cc0ec05b9649618bb92ba630) )
BOSCO_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "5300.5d", 0x0000, 0x1000, CRC(a956d3c5) SHA1(c5a9d7b1f9b4acda8fb9762414e085cb5fb80c9e) )
@ -1950,8 +1986,6 @@ ROM_START( boscoo )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "2900.3e", 0x0000, 0x1000, CRC(d45a4911) SHA1(547236adca9174f5cc0ec05b9649618bb92ba630) )
BOSCO_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "5300.5d", 0x0000, 0x1000, CRC(a956d3c5) SHA1(c5a9d7b1f9b4acda8fb9762414e085cb5fb80c9e) )
@ -1991,8 +2025,6 @@ ROM_START( boscoo2 )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "2900.3e", 0x0000, 0x1000, CRC(d45a4911) SHA1(547236adca9174f5cc0ec05b9649618bb92ba630) )
BOSCO_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "5300.5d", 0x0000, 0x1000, CRC(a956d3c5) SHA1(c5a9d7b1f9b4acda8fb9762414e085cb5fb80c9e) )
@ -2039,8 +2071,6 @@ ROM_START( boscomd )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "2900.3e", 0x0000, 0x1000, CRC(d45a4911) SHA1(547236adca9174f5cc0ec05b9649618bb92ba630) )
BOSCO_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "5300.5d", 0x0000, 0x1000, CRC(a956d3c5) SHA1(c5a9d7b1f9b4acda8fb9762414e085cb5fb80c9e) )
@ -2083,8 +2113,6 @@ ROM_START( boscomdo )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "2900.3e", 0x0000, 0x1000, CRC(d45a4911) SHA1(547236adca9174f5cc0ec05b9649618bb92ba630) )
BOSCO_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "5300.5d", 0x0000, 0x1000, CRC(a956d3c5) SHA1(c5a9d7b1f9b4acda8fb9762414e085cb5fb80c9e) )
@ -2280,10 +2308,6 @@ Notes:
*/
#define GALAGA_CUSTOMS \
ROM_REGION_NAMCO_51XX( "51xx" ) \
ROM_START( galaga )
ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU */
ROM_LOAD( "gg1-1b.3p", 0x0000, 0x1000, CRC(ab036c9f) SHA1(ca7f5da42d4e76fd89bb0b35198a23c01462fbfe) )
@ -2297,8 +2321,6 @@ ROM_START( galaga )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "gg1-7b.2c", 0x0000, 0x1000, CRC(d016686b) SHA1(44c1a04fba3c7c826ff484185cb881b4b22e6657) )
GALAGA_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "gg1-9.4l", 0x0000, 0x1000, CRC(58b2f47c) SHA1(62f1279a784ab2f8218c4137c7accda00e6a3490) )
@ -2329,8 +2351,6 @@ ROM_START( galagao )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "gg1-7", 0x0000, 0x1000, CRC(8995088d) SHA1(d6cb439de0718826d1a0363c9d77de8740b18ecf) )
GALAGA_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "gg1-9.4l", 0x0000, 0x1000, CRC(58b2f47c) SHA1(62f1279a784ab2f8218c4137c7accda00e6a3490) )
@ -2361,8 +2381,6 @@ ROM_START( galagamw )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "3700g.bin", 0x0000, 0x1000, CRC(b07f0aa4) SHA1(7528644a8480d0be2d0d37069515ed319e94778f) )
GALAGA_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "gg1-9.4l", 0x0000, 0x1000, CRC(58b2f47c) SHA1(62f1279a784ab2f8218c4137c7accda00e6a3490) )
@ -2393,8 +2411,6 @@ ROM_START( galagamf )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "3700g.bin", 0x0000, 0x1000, CRC(b07f0aa4) SHA1(7528644a8480d0be2d0d37069515ed319e94778f) )
GALAGA_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "gg1-9.4l", 0x0000, 0x1000, CRC(58b2f47c) SHA1(62f1279a784ab2f8218c4137c7accda00e6a3490) )
@ -2425,8 +2441,6 @@ ROM_START( galagamk )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "gg1-7b.2c", 0x0000, 0x1000, CRC(d016686b) SHA1(44c1a04fba3c7c826ff484185cb881b4b22e6657) )
GALAGA_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "gg1-9.4l", 0x0000, 0x1000, CRC(58b2f47c) SHA1(62f1279a784ab2f8218c4137c7accda00e6a3490) )
@ -2514,9 +2528,6 @@ ROM_END
Xevious & clones
**********************************************************************************************/
#define XEVIOUS_CUSTOMS \
ROM_REGION_NAMCO_51XX( "51xx" ) \
/*
Xevious - Namco Version
@ -2537,8 +2548,6 @@ ROM_START( xevious )
ROM_REGION( 0x10000, "sub2", 0 )
ROM_LOAD( "xvi_7.2c", 0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
XEVIOUS_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "xvi_12.3b", 0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) ) /* foreground characters */
@ -2591,8 +2600,6 @@ ROM_START( xeviousa )
ROM_REGION( 0x10000, "sub2", 0 )
ROM_LOAD( "xvi_7.2c", 0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
XEVIOUS_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "xvi_12.3b", 0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) ) /* foreground characters */
@ -2641,8 +2648,6 @@ ROM_START( xeviousb )
ROM_REGION( 0x10000, "sub2", 0 )
ROM_LOAD( "xvi_7.2c", 0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
XEVIOUS_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "xvi_12.3b", 0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) ) /* foreground characters */
@ -2694,8 +2699,6 @@ ROM_START( xeviousc )
ROM_REGION( 0x10000, "sub2", 0 )
ROM_LOAD( "xvi_7.2c", 0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
XEVIOUS_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "xvi_12.3b", 0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) ) /* foreground characters */
@ -2753,9 +2756,6 @@ ROM_START( xevios )
ROM_REGION( 0x10000, "sub2", 0 )
ROM_LOAD( "xvi_7.2c", 0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
/* This is a bootleg, it probably shouldn't be loading these, see 'unknown roms' below */
XEVIOUS_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "xvi_12.3b", 0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) ) /* foreground characters */
@ -2858,8 +2858,6 @@ ROM_START( sxevious )
ROM_REGION( 0x10000, "sub2", 0 )
ROM_LOAD( "xvi_7.2c", 0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
XEVIOUS_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "xvi_12.3b", 0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) ) /* foreground characters */
@ -2908,8 +2906,6 @@ ROM_START( sxeviousj )
ROM_REGION( 0x10000, "sub2", 0 )
ROM_LOAD( "xvi_7.2c", 0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
XEVIOUS_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "xvi_12.3b", 0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) ) /* foreground characters */
@ -2948,10 +2944,6 @@ ROM_END
Dig Dug & clones
**********************************************************************************************/
#define DIGDUG_CUSTOMS \
ROM_REGION_NAMCO_51XX( "51xx" ) \
ROM_REGION_NAMCO_53XX( "53xx" ) \
ROM_START( digdug )
ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code for the first CPU */
ROM_LOAD( "dd1a.1", 0x0000, 0x1000, CRC(a80ec984) SHA1(86689980410b9429cd7582c7a76342721c87d030) )
@ -2966,8 +2958,6 @@ ROM_START( digdug )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "136007.107", 0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
DIGDUG_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "dd1.9", 0x0000, 0x0800, CRC(f14a6fe1) SHA1(0aa63300c2cb887196de590aceb98f3cf06fead4) )
@ -3007,8 +2997,6 @@ ROM_START( digdugb )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "136007.107", 0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
DIGDUG_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "dd1.9", 0x0000, 0x0800, CRC(f14a6fe1) SHA1(0aa63300c2cb887196de590aceb98f3cf06fead4) )
@ -3067,8 +3055,6 @@ ROM_START( digdugat )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "136007.107", 0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
DIGDUG_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "136007.108", 0x0000, 0x0800, CRC(3d24a3af) SHA1(857ae93e2a41258a129dcecbaed2df359540b735) )
@ -3108,8 +3094,6 @@ ROM_START( digduga1 )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "136007.107", 0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
DIGDUG_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "136007.108", 0x0000, 0x0800, CRC(3d24a3af) SHA1(857ae93e2a41258a129dcecbaed2df359540b735) )
@ -3250,8 +3234,6 @@ ROM_START( digsid )
ROM_REGION( 0x10000, "sub2", 0 ) /* 64k for the third CPU */
ROM_LOAD( "digdug6.6", 0x0000, 0x1000, CRC(a41bce72) SHA1(2b9b74f56aa7939d9d47cf29497ae11f10d78598) )
DIGDUG_CUSTOMS
ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
ROM_LOAD( "digdug8.8", 0x0000, 0x0800, CRC(f14a6fe1) SHA1(0aa63300c2cb887196de590aceb98f3cf06fead4) )

140
src/mame/drivers/polepos.c
View File

@ -212,15 +212,17 @@ Notes:
#include "driver.h"
#include "cpu/z80/z80.h"
#include "cpu/z8000/z8000.h"
#include "cpu/mb88xx/mb88xx.h"
#include "deprecat.h"
#include "machine/namcoio.h"
#include "machine/namco51.h"
#include "machine/namco53.h"
#include "sound/namco.h"
#include "sound/namco52.h"
#include "sound/samples.h"
#include "audio/namco54.h"
#include "polepos.h"
#include "nam_cust.h"
#include "polepos.lh"
@ -320,7 +322,7 @@ static WRITE8_HANDLER( polepos_latch_w )
break;
case 0x06: /* SB0 */
auto_start_mask = 0xfb | (bit << 2);
auto_start_mask = !bit;
break;
case 0x07: /* CHACL */
@ -339,15 +341,10 @@ static WRITE16_HANDLER( polepos_z8002_nvi_enable_w )
}
static READ8_HANDLER( in0_l ) { return input_port_read(space->machine, "IN0") & auto_start_mask; } // fire and start buttons
static READ8_HANDLER( in0_h ) { return input_port_read(space->machine, "IN0") >> 4; } // coins
static READ8_HANDLER( dipA_l ) { return input_port_read(space->machine, "DSWA"); } // dips A
static READ8_HANDLER( dipA_h ) { return input_port_read(space->machine, "DSWA") >> 4; } // dips A
static READ8_HANDLER( dipB_l ) { return input_port_read(space->machine, "DSWB"); } // dips B
static READ8_HANDLER( dipB_h ) { return input_port_read(space->machine, "DSWB") >> 4; } // dips B
static READ8_HANDLER( in1_l ) { return input_port_read(space->machine, "STEER"); } // wheel
static READ8_HANDLER( in1_h ) { return input_port_read(space->machine, "STEER") >> 4; } // wheel
static WRITE8_HANDLER( out_0 )
static CUSTOM_INPUT( shifted_port_r ) { return input_port_read(field->port->machine, param) >> 4; }
static CUSTOM_INPUT( auto_start_r ) { return auto_start_mask; }
static WRITE8_DEVICE_HANDLER( out_0 )
{
// no start lamps in pole position
// set_led_status(1,data & 1);
@ -355,24 +352,41 @@ static WRITE8_HANDLER( out_0 )
coin_counter_w(1,~data & 4);
coin_counter_w(0,~data & 8);
}
static WRITE8_HANDLER( out_1 )
static WRITE8_DEVICE_HANDLER( out_1 )
{
coin_lockout_global_w(data & 1);
}
static const struct namcoio_interface intf0 =
static const namco_51xx_interface namco_51xx_intf =
{
{ in0_l, in0_h, dipB_l, dipB_h }, /* port read handlers */
{ out_0, out_1 } /* port write handlers */
{ /* port read handlers */
DEVCB_INPUT_PORT("IN0L"),
DEVCB_INPUT_PORT("IN0H"),
DEVCB_INPUT_PORT("DSWB"),
DEVCB_INPUT_PORT("DSWB_HI")
},
{ /* port write handlers */
DEVCB_HANDLER(out_0),
DEVCB_HANDLER(out_1)
}
};
static const struct namcoio_interface intf1 =
static const namco_53xx_interface namco_53xx_intf =
{
{ in1_l, in1_h, dipA_l, dipA_h }, /* port read handlers */
{ NULL, NULL } /* port write handlers */
{ /* port read handlers */
DEVCB_INPUT_PORT("STEER"),
DEVCB_INPUT_PORT("STEER_HI"),
DEVCB_INPUT_PORT("DSWA"),
DEVCB_INPUT_PORT("DSWA_HI")
},
{ /* port write handlers */
DEVCB_NULL,
DEVCB_NULL
}
};
#include "cpu/z8000/z8000.h"
static MACHINE_RESET( polepos )
{
const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
@ -383,8 +397,8 @@ static MACHINE_RESET( polepos )
polepos_latch_w(space, i, 0);
namco_06xx_init(machine, 0, 0,
NAMCOIO_51XX, &intf0, NULL,
NAMCOIO_53XX_POLEPOS, &intf1, NULL,
NAMCOIO_51XX, NULL, "51xx",
NAMCOIO_53XX, NULL, "53xx",
NAMCOIO_52XX, NULL, "namco52",
NAMCOIO_54XX, NULL, "54xx");
@ -445,15 +459,17 @@ ADDRESS_MAP_END
*********************************************************************/
static INPUT_PORTS_START( polepos )
PORT_START("IN0")
PORT_START("IN0L")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Gear Change") PORT_CODE(KEYCODE_SPACE) POLEPOS_TOGGLE /* Gear */
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) // start 1, program controlled
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(auto_start_r, NULL) // start 1, program controlled
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
PORT_START("IN0H")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
PORT_START("DSWA")
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
@ -478,6 +494,9 @@ static INPUT_PORTS_START( polepos )
PORT_DIPNAME( 0x80, 0x80, "Nr. of Laps" )
PORT_DIPSETTING( 0x80, "3" )
PORT_DIPSETTING( 0x00, "4" )
PORT_START("DSWA_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
PORT_START("DSWB")
PORT_DIPNAME( 0x07, 0x07, "Extended Rank" )
@ -504,6 +523,9 @@ static INPUT_PORTS_START( polepos )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
PORT_DIPSETTING( 0x80, DEF_STR( Off ))
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSWB_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWB")
PORT_START("BRAKE")
PORT_BIT( 0xff, 0x00, IPT_PEDAL2 ) PORT_MINMAX(0,0x90) PORT_SENSITIVITY(100) PORT_KEYDELTA(16)
@ -513,6 +535,9 @@ static INPUT_PORTS_START( polepos )
PORT_START("STEER")
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(4)
PORT_START("STEER_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "STEER")
INPUT_PORTS_END
@ -520,7 +545,7 @@ static INPUT_PORTS_START( poleposa )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Gear Change") PORT_CODE(KEYCODE_SPACE) POLEPOS_TOGGLE /* Gear */
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) // start 1, program controlled
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(auto_start_r, NULL) // start 1, program controlled
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
@ -550,6 +575,9 @@ static INPUT_PORTS_START( poleposa )
PORT_DIPNAME( 0x01, 0x01, "Nr. of Laps" )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x00, "4" )
PORT_START("DSWA_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
PORT_START("DSWB")
PORT_DIPNAME( 0xe0, 0xe0, "Practice Rank" )
@ -577,6 +605,9 @@ static INPUT_PORTS_START( poleposa )
PORT_DIPSETTING( 0x01, DEF_STR( Off ))
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSWB_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWB")
PORT_START("BRAKE")
PORT_BIT( 0xff, 0x00, IPT_PEDAL2 ) PORT_MINMAX(0,0x90) PORT_SENSITIVITY(100) PORT_KEYDELTA(16)
@ -585,6 +616,9 @@ static INPUT_PORTS_START( poleposa )
PORT_START("STEER")
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(4)
PORT_START("STEER_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "STEER")
INPUT_PORTS_END
@ -593,7 +627,7 @@ static INPUT_PORTS_START( topracra )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) // start 1, program controlled
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(auto_start_r, NULL) // start 1, program controlled
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Gear Change") PORT_CODE(KEYCODE_SPACE) POLEPOS_TOGGLE /* Gear */
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
@ -622,6 +656,9 @@ static INPUT_PORTS_START( topracra )
PORT_DIPNAME( 0x80, 0x80, "Nr. of Laps" )
PORT_DIPSETTING( 0x80, "3" )
PORT_DIPSETTING( 0x00, "4" )
PORT_START("DSWA_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
PORT_START("DSWB")
PORT_DIPNAME( 0x07, 0x07, "Extended Rank" )
@ -649,6 +686,9 @@ static INPUT_PORTS_START( topracra )
PORT_DIPSETTING( 0x80, DEF_STR( Off ))
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSWB_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWB")
PORT_START("BRAKE")
PORT_BIT( 0xff, 0x00, IPT_PEDAL2 ) PORT_MINMAX(0,0x90) PORT_SENSITIVITY(100) PORT_KEYDELTA(16)
@ -657,6 +697,9 @@ static INPUT_PORTS_START( topracra )
PORT_START("STEER")
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(4)
PORT_START("STEER_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "STEER")
INPUT_PORTS_END
@ -664,7 +707,7 @@ static INPUT_PORTS_START( polepos2 )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Gear Change") PORT_CODE(KEYCODE_SPACE) POLEPOS_TOGGLE /* Gear */
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) // start 1, program controlled
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(auto_start_r, NULL) // start 1, program controlled
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
@ -695,6 +738,9 @@ static INPUT_PORTS_START( polepos2 )
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) /* docs say "freeze", but it doesn't seem to work */
PORT_DIPSETTING( 0x01, DEF_STR( Off ))
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSWA_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWA")
PORT_START("DSWB")
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Game_Time ) )
@ -719,6 +765,9 @@ static INPUT_PORTS_START( polepos2 )
PORT_DIPSETTING( 0x01, "Average" )
PORT_DIPSETTING( 0x00, DEF_STR( High ) )
PORT_START("DSWB_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "DSWB")
PORT_START("BRAKE")
PORT_BIT( 0xff, 0x00, IPT_PEDAL2 ) PORT_MINMAX(0,0x90) PORT_SENSITIVITY(100) PORT_KEYDELTA(16)
@ -727,6 +776,9 @@ static INPUT_PORTS_START( polepos2 )
PORT_START("STEER")
PORT_BIT ( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(4)
PORT_START("STEER_HI")
PORT_BIT( 0x0f, 0x00, IPT_SPECIAL ) PORT_CUSTOM(shifted_port_r, "STEER")
INPUT_PORTS_END
@ -846,6 +898,8 @@ static MACHINE_DRIVER_START( polepos )
MDRV_CPU_PROGRAM_MAP(z8002_map)
MDRV_CPU_VBLANK_INT("screen", irq0_line_assert)
MDRV_NAMCO_51XX_ADD("51xx", 18432000/12, namco_51xx_intf) /* 1.536 MHz */
MDRV_NAMCO_53XX_ADD("53xx", 18432000/12, namco_53xx_intf) /* 1.536 MHz */
MDRV_NAMCO_54XX_ADD("54xx", 18432000/12, "discrete", NODE_01) /* 1.536 MHz */
MDRV_WATCHDOG_VBLANK_INIT(16) // 128V clocks the same as VBLANK
@ -901,10 +955,6 @@ MACHINE_DRIVER_END
* ROM definitions
*********************************************************************/
#define POLEPOS_CUSTOMS \
ROM_REGION_NAMCO_51XX( "51xx" ) \
ROM_REGION_NAMCO_53XX( "53xx" ) \
/*
Pole Position - Namco Version
*/
@ -925,8 +975,6 @@ ROM_START( polepos )
ROM_LOAD16_BYTE( "pp1_5b.4m", 0x0001, 0x2000, CRC(5cdf5294) SHA1(dbdf327a541fd71aadafda9c925fa4cf7f7c4a24) )
ROM_LOAD16_BYTE( "pp1_6b.4l", 0x0000, 0x2000, CRC(81696272) SHA1(27041a7c24297a6f317537c44922b51d2b2278a6) )
POLEPOS_CUSTOMS
/* graphics data */
ROM_REGION( 0x01000, "gfx1", ROMREGION_DISPOSE ) /* 2bpp alpha layer */
ROM_LOAD( "pp1_28.1f", 0x0000, 0x1000, CRC(5b277daf) SHA1(0b1feeb2c0c63a5db5ba9b0115aa1b2388636a70) )
@ -1011,8 +1059,6 @@ ROM_START( poleposa )
ROM_LOAD16_BYTE( "136014.203", 0x0001, 0x2000, CRC(eedea6e7) SHA1(e1459c5e3f824e589e624c3acb18a183fd160df6) )
ROM_LOAD16_BYTE( "136014.204", 0x0000, 0x2000, CRC(c52c98ed) SHA1(2e33c487deaf8afb941e07e511a9828d2d8f6b31) )
POLEPOS_CUSTOMS
/* graphics data */
ROM_REGION( 0x01000, "gfx1", ROMREGION_DISPOSE ) /* 2bpp alpha layer */
ROM_LOAD( "136014.132", 0x0000, 0x1000, CRC(a949aa85) SHA1(2d6414196b6071101001128418233e585279ffb9) )
@ -1092,8 +1138,6 @@ ROM_START( polepos1 )
ROM_LOAD16_BYTE( "136014.103", 0x0001, 0x2000, CRC(af4fc019) SHA1(1bb6c0f3ffada2e1df72e1767581f8e8bb2b18f9) )
ROM_LOAD16_BYTE( "136014.104", 0x0000, 0x2000, CRC(ba0045f3) SHA1(aedb8d8c56407963aa4ffb66243288c8fd6d845a) )
POLEPOS_CUSTOMS
/* graphics data */
ROM_REGION( 0x01000, "gfx1", ROMREGION_DISPOSE ) /* 2bpp alpha layer */
ROM_LOAD( "136014.132", 0x0000, 0x1000, CRC(a949aa85) SHA1(2d6414196b6071101001128418233e585279ffb9) )
@ -1270,9 +1314,6 @@ ROM_START( topracer )
ROM_LOAD16_BYTE( "tr5b.bin", 0x0001, 0x2000, CRC(4e5f7b9c) SHA1(d26b1f24dd9ef00388987890bc5b95d4db403815) )
ROM_LOAD16_BYTE( "tr6b.bin", 0x0000, 0x2000, CRC(9d038ada) SHA1(7a9496c3fb93fd1945393656f8510a0c6421a9ab) )
/* this is a bootleg, should we really be loading these? */
POLEPOS_CUSTOMS
/* graphics data */
ROM_REGION( 0x01000, "gfx1", ROMREGION_DISPOSE ) /* 2bpp alpha layer */
ROM_LOAD( "tr28.bin", 0x0000, 0x1000, CRC(b8217c96) SHA1(aba311bc3c4b118ba322a00e33e2d5cbe7bc6e4a) )
@ -1347,9 +1388,6 @@ ROM_START( topracra )
ROM_LOAD16_BYTE( "tr5b.bin", 0x0001, 0x2000, CRC(4e5f7b9c) SHA1(d26b1f24dd9ef00388987890bc5b95d4db403815) )
ROM_LOAD16_BYTE( "pole-d", 0x0000, 0x2000, CRC(932bb5a7) SHA1(8045fe1f9b4b1973ec0d6705adf3ba3891bddaa1) )
/* this is a bootleg, should we really be loading these? */
POLEPOS_CUSTOMS
/* graphics data */
ROM_REGION( 0x01000, "gfx1", ROMREGION_DISPOSE ) /* 2bpp alpha layer */
ROM_LOAD( "tr28.bin", 0x0000, 0x1000, CRC(b8217c96) SHA1(aba311bc3c4b118ba322a00e33e2d5cbe7bc6e4a) )
@ -1427,9 +1465,6 @@ ROM_START( topracrb )
ROM_LOAD16_BYTE( "tr5b.f7", 0x0001, 0x2000, CRC(4e5f7b9c) SHA1(d26b1f24dd9ef00388987890bc5b95d4db403815) )
ROM_LOAD16_BYTE( "tr6b.f5", 0x0000, 0x2000, CRC(b3641d0c) SHA1(38ce172b2e38895749cbd3cc1c0e2c0fe8be744a) )
/* this is a bootleg, should we really be loading these? */
POLEPOS_CUSTOMS
/* graphics data */
ROM_REGION( 0x01000, "gfx1", ROMREGION_DISPOSE ) /* 2bpp alpha layer */
ROM_LOAD( "tr28.j9", 0x0000, 0x1000, CRC(b8217c96) SHA1(aba311bc3c4b118ba322a00e33e2d5cbe7bc6e4a) )
@ -1511,8 +1546,6 @@ ROM_START( polepos2 )
ROM_LOAD16_BYTE( "pp4_7.3m", 0x4001, 0x1000, CRC(ad1c8994) SHA1(2877de9641516767170c0109900955cc7d1ff402) )
ROM_LOAD16_BYTE( "pp4_8.3l", 0x4000, 0x1000, CRC(ef25a2ee) SHA1(45959355cad1a48f19ae14193374e03d4f9965c7) )
POLEPOS_CUSTOMS
/* graphics data */
ROM_REGION( 0x02000, "gfx1", ROMREGION_DISPOSE ) /* 2bpp alpha layer */
ROM_LOAD( "pp4_28.1f", 0x0000, 0x2000, CRC(280dde7d) SHA1(b7c7fb3a5076aa4d0e0cf3256ece9a6194315626) )
@ -1605,8 +1638,6 @@ ROM_START( poleps2a )
ROM_LOAD16_BYTE( "136014.184", 0x4001, 0x2000, CRC(d893c4ed) SHA1(60d39abefbb0c8df68864a30b1f5fcbf4780c86c) )
ROM_LOAD16_BYTE( "136014.185", 0x4000, 0x2000, CRC(899de75e) SHA1(4a16535115e37a3d342b2cb53f610a87c0d0abe1) )
POLEPOS_CUSTOMS
/* graphics data */
ROM_REGION( 0x02000, "gfx1", ROMREGION_DISPOSE ) /* 2bpp alpha layer */
ROM_LOAD( "136014.172", 0x0000, 0x2000, CRC(fbe5e72f) SHA1(07965d6e98ac1332ac6192b5e9cc927dd9eb706f) )
@ -1691,9 +1722,6 @@ ROM_START( poleps2b )
ROM_LOAD16_BYTE( "136014.184", 0x4001, 0x2000, CRC(d893c4ed) SHA1(60d39abefbb0c8df68864a30b1f5fcbf4780c86c) )
ROM_LOAD16_BYTE( "136014.185", 0x4000, 0x2000, CRC(899de75e) SHA1(4a16535115e37a3d342b2cb53f610a87c0d0abe1) )
/* this is a bootleg, should we really be loading these? */
POLEPOS_CUSTOMS
/* graphics data */
ROM_REGION( 0x02000, "gfx1", ROMREGION_DISPOSE ) /* 2bpp alpha layer */
ROM_LOAD( "136014.172", 0x0000, 0x2000, CRC(fbe5e72f) SHA1(07965d6e98ac1332ac6192b5e9cc927dd9eb706f) )

19
src/mame/includes/nam_cust.h
View File

@ -1,19 +0,0 @@
/* Namco Custom Chip ROM loading Macros */
/* the 50XX is a player score controller, used for protection */
/* the 51XX is an I/O controller */
#define ROM_REGION_NAMCO_51XX( region ) \
ROM_REGION( 0x400, region, 0 ) /* 1k for the 51xx */ \
ROM_LOAD( "51xx.bin", 0x0000, 0x0400, CRC(c2f57ef8) SHA1(50de79e0d6a76bda95ffb02fcce369a79e6abfec) ) \
/* the 52XX is a sample player */
/* the 53XX is an I/O controller */
#define ROM_REGION_NAMCO_53XX( region ) \
ROM_REGION( 0x400, region, 0 ) /* 1k for the 53xx */ \
ROM_LOAD( "53xx.bin", 0x0000, 0x0400, CRC(b326fecb) SHA1(758d8583d658e4f1df93184009d86c3eb8713899) ) \
/* the 54XX is an explosion sound generator */

4
src/mame/machine/namco50.c
View File

@ -222,7 +222,7 @@ static void namco_50xx_irq_set(const device_config *device)
timer_set(device->machine, ATTOTIME_IN_USEC(21), (void *)device, 0, namco_50xx_irq_clear);
}
void namco_50xx_write(const device_config *device, UINT8 data)
WRITE8_DEVICE_HANDLER( namco_50xx_write )
{
timer_call_after_resynch(device->machine, (void *)device, data, namco_50xx_latch_callback);
@ -238,7 +238,7 @@ void namco_50xx_read_request(const device_config *device)
}
UINT8 namco_50xx_read(const device_config *device)
READ8_DEVICE_HANDLER( namco_50xx_read )
{
namco_50xx_state *state = get_safe_token(device);
UINT8 res = state->portO;

5
src/mame/machine/namco50.h
View File

@ -9,9 +9,10 @@
MDRV_DEVICE_REMOVE(_tag)
UINT8 namco_50xx_read(const device_config *device);
READ8_DEVICE_HANDLER( namco_50xx_read );
void namco_50xx_read_request(const device_config *device);
void namco_50xx_write(const device_config *device, UINT8 data);
WRITE8_DEVICE_HANDLER( namco_50xx_write );
/* device get info callback */
#define NAMCO_50XX DEVICE_GET_INFO_NAME(namco_50xx)

452
src/mame/machine/namco51.c Normal file
View File

@ -0,0 +1,452 @@
/***************************************************************************
Namco 51XX
This custom chip is a Fujitsu MB8843 MCU programmed to act as an I/O device
with built-in coin management.
protection
device. It keeps track of the players scores, and checks if a high score has
been obtained or bonus lives should be awarded. The main CPU has a range of
commands to increment/decrement the score by various fixed amounts.
The device is used to its full potential only by Bosconian; Xevious uses it
too, but only to do a protection check on startup.
CMD = command from main CPU
ANS = answer to main CPU
The chip reads/writes the I/O ports when the /IRQ is pulled down. Pin 21
determines whether a read or write should happen (1=R, 0=W).
MB8843
+------+
EXTAL|1 42|Vcc
XTAL|2 41|K3
/RESET|3 40|K2
/IRQ|4 39|K1
SO|5 38|K0
SI|6 37|R15
/SC /TO|7 36|R14
/TC|8 35|R13
P0|9 34|R12
P1|10 33|R11
P2|11 32|R10
P3|12 31|R9
O0|13 30|R8
O1|14 29|R7
O2|15 28|R6
O3|16 27|R5
O4|17 26|R4
O5|18 25|R3
O6|19 24|R2
O7|20 23|R1
GND|21 22|R0
+------+
commands:
00: nop
01 + 4 arguments: set coinage (xevious, possibly because of a bug, is different)
02: go in "credit" mode and enable start buttons
03: disable joystick remapping
04: enable joystick remapping
05: go in "switch" mode
06: nop
07: nop
***************************************************************************/
#include "driver.h"
#include "namco51.h"
#include "cpu/mb88xx/mb88xx.h"
#define VERBOSE 0
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
#define READ_PORT(st,num) devcb_call_read8(&(st)->in[num], 0)
#define WRITE_PORT(st,num,data) devcb_call_write8(&(st)->out[num], 0, data)
typedef struct _namco_51xx_state namco_51xx_state;
struct _namco_51xx_state
{
const device_config * cpu;
devcb_resolved_read8 in[4];
devcb_resolved_write8 out[2];
INT32 lastcoins,lastbuttons;
INT32 credits;
INT32 coins[2];
INT32 coins_per_cred[2];
INT32 creds_per_coin[2];
INT32 in_count;
INT32 mode,coincred_mode,remap_joy;
};
INLINE namco_51xx_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == NAMCO_51XX);
return (namco_51xx_state *)device->token;
}
WRITE8_DEVICE_HANDLER( namco_51xx_write )
{
namco_51xx_state *state = get_safe_token(device);
data &= 0x07;
LOG(("%s: custom 51XX write %02x\n",cpuexec_describe_context(device->machine),data));
if (state->coincred_mode)
{
switch (state->coincred_mode--)
{
case 4: state->coins_per_cred[0] = data; break;
case 3: state->creds_per_coin[0] = data; break;
case 2: state->coins_per_cred[1] = data; break;
case 1: state->creds_per_coin[1] = data; break;
}
}
else
{
switch (data)
{
case 0: // nop
break;
case 1: // set coinage
state->coincred_mode = 4;
/* this is a good time to reset the credits counter */
state->credits = 0;
{
/* kludge for a possible bug in Xevious */
static const game_driver *namcoio_51XX_driver = NULL;
static int namcoio_51XX_kludge = 0;
/* Only compute namcoio_51XX_kludge when gamedrv changes */
if (namcoio_51XX_driver != device->machine->gamedrv)
{
namcoio_51XX_driver = device->machine->gamedrv;
if (strcmp(namcoio_51XX_driver->name, "xevious") == 0 ||
strcmp(namcoio_51XX_driver->parent, "xevious") == 0)
namcoio_51XX_kludge = 1;
else
namcoio_51XX_kludge = 0;
}
if (namcoio_51XX_kludge)
{
state->coincred_mode = 6;
state->remap_joy = 1;
}
}
break;
case 2: // go in "credits" mode and enable start buttons
state->mode = 1;
state->in_count = 0;
break;
case 3: // disable joystick remapping
state->remap_joy = 0;
break;
case 4: // enable joystick remapping
state->remap_joy = 1;
break;
case 5: // go in "switch" mode
state->mode = 0;
state->in_count = 0;
break;
default:
logerror("unknown 51XX command %02x\n",data);
break;
}
}
}
/* joystick input mapping
The joystick is parsed and a number corresponding to the direction is returned,
according to the following table:
0
7 1
6 8 2
5 3
4
The values for directions impossible to obtain on a joystick have not been
verified on Namco original hardware, but they are the same in all the bootlegs,
so we can assume they are right.
*/
static const int joy_map[16] =
/* LDRU, LDR, LDU, LD, LRU, LR, LU, L, DRU, DR, DU, D, RU, R, U, center */
{ 0xf, 0xe, 0xd, 0x5, 0xc, 0x9, 0x7, 0x6, 0xb, 0x3, 0xa, 0x4, 0x1, 0x2, 0x0, 0x8 };
READ8_DEVICE_HANDLER( namco_51xx_read )
{
namco_51xx_state *state = get_safe_token(device);
LOG(("%s: custom 51XX read\n",cpuexec_describe_context(device->machine)));
if (state->mode == 0) /* switch mode */
{
switch ((state->in_count++) % 3)
{
default:
case 0: return READ_PORT(state,0) | (READ_PORT(state,1) << 4);
case 1: return READ_PORT(state,2) | (READ_PORT(state,3) << 4);
case 2: return 0; // nothing?
}
}
else /* credits mode */
{
switch ((state->in_count++) % 3)
{
default:
case 0: // number of credits in BCD format
{
int in,toggle;
in = ~(READ_PORT(state,0) | (READ_PORT(state,1) << 4));
toggle = in ^ state->lastcoins;
state->lastcoins = in;
if (state->coins_per_cred[0] > 0)
{
if (state->credits >= 99)
{
WRITE_PORT(state,1,1); // coin lockout
}
else
{
WRITE_PORT(state,1,0); // coin lockout
/* check if the user inserted a coin */
if (toggle & in & 0x10)
{
state->coins[0]++;
WRITE_PORT(state,0,0x04); // coin counter
WRITE_PORT(state,0,0x0c);
if (state->coins[0] >= state->coins_per_cred[0])
{
state->credits += state->creds_per_coin[0];
state->coins[0] -= state->coins_per_cred[0];
}
}
if (toggle & in & 0x20)
{
state->coins[1]++;
WRITE_PORT(state,0,0x08); // coin counter
WRITE_PORT(state,0,0x0c);
if (state->coins[1] >= state->coins_per_cred[1])
{
state->credits += state->creds_per_coin[1];
state->coins[1] -= state->coins_per_cred[1];
}
}
if (toggle & in & 0x40)
{
state->credits++;
}
}
}
else state->credits = 100; // free play
if (state->mode == 1)
{
int on = (video_screen_get_frame_number(device->machine->primary_screen) & 0x10) >> 4;
if (state->credits >= 2)
WRITE_PORT(state,0,0x0c | 3*on); // lamps
else if (state->credits >= 1)
WRITE_PORT(state,0,0x0c | 2*on); // lamps
else
WRITE_PORT(state,0,0x0c); // lamps off
/* check for 1 player start button */
if (toggle & in & 0x04)
{
if (state->credits >= 1)
{
state->credits--;
state->mode = 2;
WRITE_PORT(state,0,0x0c); // lamps off
}
}
/* check for 2 players start button */
else if (toggle & in & 0x08)
{
if (state->credits >= 2)
{
state->credits -= 2;
state->mode = 2;
WRITE_PORT(state, 0,0x0c); // lamps off
}
}
}
}
if (~READ_PORT(state, 1) & 0x08) /* check test mode switch */
return 0xbb;
return (state->credits / 10) * 16 + state->credits % 10;
case 1:
{
int joy = READ_PORT(state,2) & 0x0f;
int in,toggle;
in = ~READ_PORT(state,0);
toggle = in ^ state->lastbuttons;
state->lastbuttons = (state->lastbuttons & 2) | (in & 1);
/* remap joystick */
if (state->remap_joy) joy = joy_map[joy];
/* fire */
joy |= ((toggle & in & 0x01)^1) << 4;
joy |= ((in & 0x01)^1) << 5;
return joy;
}
case 2:
{
int joy = READ_PORT(state,3) & 0x0f;
int in,toggle;
in = ~READ_PORT(state,0);
toggle = in ^ state->lastbuttons;
state->lastbuttons = (state->lastbuttons & 1) | (in & 2);
/* remap joystick */
if (state->remap_joy) joy = joy_map[joy];
/* fire */
joy |= ((toggle & in & 0x02)^2) << 3;
joy |= ((in & 0x02)^2) << 4;
return joy;
}
}
}
}
/***************************************************************************
DEVICE INTERFACE
***************************************************************************/
ADDRESS_MAP_START( namco_51xx_map_program, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x000, 0x3ff) AM_ROM
ADDRESS_MAP_END
ADDRESS_MAP_START( namco_51xx_map_data, ADDRESS_SPACE_DATA, 8 )
AM_RANGE(0x00, 0x7f) AM_RAM
ADDRESS_MAP_END
ADDRESS_MAP_START( namco_51xx_map_io, ADDRESS_SPACE_IO, 8 )
// AM_RANGE(MB88_PORTK, MB88_PORTK) AM_READ(namco_51xx_K_r)
// AM_RANGE(MB88_PORTO, MB88_PORTO) AM_WRITE(namco_51xx_O_w)
// AM_RANGE(MB88_PORTR0, MB88_PORTR0) AM_READ(namco_51xx_R0_r)
// AM_RANGE(MB88_PORTR2, MB88_PORTR2) AM_READ(namco_51xx_R2_r)
ADDRESS_MAP_END
static MACHINE_DRIVER_START( namco_51xx )
MDRV_CPU_ADD("mcu", MB8843, DERIVED_CLOCK(1,6)) /* parent clock, internally divided by 6 */
MDRV_CPU_PROGRAM_MAP(namco_51xx_map_program)
MDRV_CPU_DATA_MAP(namco_51xx_map_data)
MDRV_CPU_IO_MAP(namco_51xx_map_io)
MDRV_CPU_FLAGS(CPU_DISABLE)
MACHINE_DRIVER_END
ROM_START( namco_51xx )
ROM_REGION( 0x400, "mcu", ROMREGION_LOADBYNAME )
ROM_LOAD( "51xx.bin", 0x0000, 0x0400, CRC(c2f57ef8) SHA1(50de79e0d6a76bda95ffb02fcce369a79e6abfec) )
ROM_END
/*-------------------------------------------------
device start callback
-------------------------------------------------*/
static DEVICE_START( namco_51xx )
{
const namco_51xx_interface *config = (const namco_51xx_interface *)device->static_config;
namco_51xx_state *state = get_safe_token(device);
astring *tempstring = astring_alloc();
assert(config != NULL);
/* find our CPU */
state->cpu = cputag_get_cpu(device->machine, device_build_tag(tempstring, device, "mcu"));
assert(state->cpu != NULL);
astring_free(tempstring);
/* resolve our read callbacks */
devcb_resolve_read8(&state->in[0], &config->in[0], device);
devcb_resolve_read8(&state->in[1], &config->in[1], device);
devcb_resolve_read8(&state->in[2], &config->in[2], device);
devcb_resolve_read8(&state->in[3], &config->in[3], device);
/* resolve our write callbacks */
devcb_resolve_write8(&state->out[0], &config->out[0], device);
devcb_resolve_write8(&state->out[1], &config->out[1], device);
}
/*-------------------------------------------------
device reset callback
-------------------------------------------------*/
static DEVICE_RESET( namco_51xx )
{
// namco_51xx_state *state = get_safe_token(device);
}
/*-------------------------------------------------
device get info callback
-------------------------------------------------*/
DEVICE_GET_INFO( namco_51xx )
{
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_51xx_state); break;
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
/* --- the following bits of info are returned as pointers --- */
case DEVINFO_PTR_ROM_REGION: info->romregion = ROM_NAME(namco_51xx); break;
case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = MACHINE_DRIVER_NAME(namco_51xx); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(namco_51xx); break;
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(namco_51xx); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: strcpy(info->s, "Namco 51xx"); break;
case DEVINFO_STR_FAMILY: strcpy(info->s, "Namco I/O"); break;
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
}
}

32
src/mame/machine/namco51.h Normal file
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@ -0,0 +1,32 @@
#ifndef NAMCO51_H
#define NAMCO51_H
#include "devcb.h"
typedef struct _namco_51xx_interface namco_51xx_interface;
struct _namco_51xx_interface
{
devcb_read8 in[4]; /* read handlers for ports A-D */
devcb_write8 out[2]; /* write handlers for ports A-B */
};
#define MDRV_NAMCO_51XX_ADD(_tag, _clock, _interface) \
MDRV_DEVICE_ADD(_tag, NAMCO_51XX, _clock) \
MDRV_DEVICE_CONFIG(_interface)
#define MDRV_NAMCO_51XX_REMOVE(_tag) \
MDRV_DEVICE_REMOVE(_tag)
READ8_DEVICE_HANDLER( namco_51xx_read );
WRITE8_DEVICE_HANDLER( namco_51xx_write );
/* device get info callback */
#define NAMCO_51XX DEVICE_GET_INFO_NAME(namco_51xx)
DEVICE_GET_INFO( namco_51xx );
#endif /* NAMCO51_H */

201
src/mame/machine/namco53.c Normal file
View File

@ -0,0 +1,201 @@
/***************************************************************************
Namco 53XX
This custom chip is a Fujitsu MB8843 MCU programmed to act as an I/O device.
The chip reads/writes the I/O ports when the /IRQ is pulled down. Pin 21
determines whether a read or write should happen (1=R, 0=W).
MB8843
+------+
EXTAL|1 42|Vcc
XTAL|2 41|K3
/RESET|3 40|K2
/IRQ|4 39|K1
SO|5 38|K0
SI|6 37|R15
/SC /TO|7 36|R14
/TC|8 35|R13
P0|9 34|R12
P1|10 33|R11
P2|11 32|R10
P3|12 31|R9
O0|13 30|R8
O1|14 29|R7
O2|15 28|R6
O3|16 27|R5
O4|17 26|R4
O5|18 25|R3
O6|19 24|R2
O7|20 23|R1
GND|21 22|R0
+------+
commands:
00: nop
01 + 4 arguments: set coinage (xevious, possibly because of a bug, is different)
02: go in "credit" mode and enable start buttons
03: disable joystick remapping
04: enable joystick remapping
05: go in "switch" mode
06: nop
07: nop
***************************************************************************/
#include "driver.h"
#include "namco53.h"
#include "cpu/mb88xx/mb88xx.h"
#define VERBOSE 0
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
#define READ_PORT(st,num) devcb_call_read8(&(st)->in[num], 0)
#define WRITE_PORT(st,num,data) devcb_call_write8(&(st)->out[num], 0, data)
typedef struct _namco_53xx_state namco_53xx_state;
struct _namco_53xx_state
{
const device_config * cpu;
int in_count;
devcb_resolved_read8 in[4];
devcb_resolved_write8 out[2];
};
INLINE namco_53xx_state *get_safe_token(const device_config *device)
{
assert(device != NULL);
assert(device->token != NULL);
assert(device->type == NAMCO_53XX);
return (namco_53xx_state *)device->token;
}
READ8_DEVICE_HANDLER( namco_53xx_read )
{
namco_53xx_state *state = get_safe_token(device);
LOG(("%s: custom 53XX read\n",cpuexec_describe_context(device->machine)));
// digdug: ((state->in_count++) % 2)
switch ((state->in_count++) % 8)
{
case 0: return READ_PORT(state,0) | (READ_PORT(state,1) << 4); // steering
// digdug: case 1:
case 4: return READ_PORT(state,2) | (READ_PORT(state,3) << 4); // dip switches
default: return 0xff; // polepos2 hangs if 0 is returned
}
}
/***************************************************************************
DEVICE INTERFACE
***************************************************************************/
ADDRESS_MAP_START( namco_53xx_map_program, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x000, 0x3ff) AM_ROM
ADDRESS_MAP_END
ADDRESS_MAP_START( namco_53xx_map_data, ADDRESS_SPACE_DATA, 8 )
AM_RANGE(0x00, 0x7f) AM_RAM
ADDRESS_MAP_END
ADDRESS_MAP_START( namco_53xx_map_io, ADDRESS_SPACE_IO, 8 )
// AM_RANGE(MB88_PORTK, MB88_PORTK) AM_READ(namco_53xx_K_r)
// AM_RANGE(MB88_PORTO, MB88_PORTO) AM_WRITE(namco_53xx_O_w)
// AM_RANGE(MB88_PORTR0, MB88_PORTR0) AM_READ(namco_53xx_R0_r)
// AM_RANGE(MB88_PORTR2, MB88_PORTR2) AM_READ(namco_53xx_R2_r)
ADDRESS_MAP_END
static MACHINE_DRIVER_START( namco_53xx )
MDRV_CPU_ADD("mcu", MB8843, DERIVED_CLOCK(1,6)) /* parent clock, internally divided by 6 */
MDRV_CPU_PROGRAM_MAP(namco_53xx_map_program)
MDRV_CPU_DATA_MAP(namco_53xx_map_data)
MDRV_CPU_IO_MAP(namco_53xx_map_io)
MDRV_CPU_FLAGS(CPU_DISABLE)
MACHINE_DRIVER_END
ROM_START( namco_53xx )
ROM_REGION( 0x400, "mcu", ROMREGION_LOADBYNAME )
ROM_LOAD( "53xx.bin", 0x0000, 0x0400, CRC(b326fecb) SHA1(758d8583d658e4f1df93184009d86c3eb8713899) )
ROM_END
/*-------------------------------------------------
device start callback
-------------------------------------------------*/
static DEVICE_START( namco_53xx )
{
const namco_53xx_interface *config = (const namco_53xx_interface *)device->static_config;
namco_53xx_state *state = get_safe_token(device);
astring *tempstring = astring_alloc();
assert(config != NULL);
/* find our CPU */
state->cpu = cputag_get_cpu(device->machine, device_build_tag(tempstring, device, "mcu"));
assert(state->cpu != NULL);
astring_free(tempstring);
/* resolve our read callbacks */
devcb_resolve_read8(&state->in[0], &config->in[0], device);
devcb_resolve_read8(&state->in[1], &config->in[1], device);
devcb_resolve_read8(&state->in[2], &config->in[2], device);
devcb_resolve_read8(&state->in[3], &config->in[3], device);
/* resolve our write callbacks */
devcb_resolve_write8(&state->out[0], &config->out[0], device);
devcb_resolve_write8(&state->out[1], &config->out[1], device);
}
/*-------------------------------------------------
device reset callback
-------------------------------------------------*/
static DEVICE_RESET( namco_53xx )
{
// namco_53xx_state *state = get_safe_token(device);
}
/*-------------------------------------------------
device get info callback
-------------------------------------------------*/
DEVICE_GET_INFO( namco_53xx )
{
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_53xx_state); break;
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
/* --- the following bits of info are returned as pointers --- */
case DEVINFO_PTR_ROM_REGION: info->romregion = ROM_NAME(namco_53xx); break;
case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = MACHINE_DRIVER_NAME(namco_53xx); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(namco_53xx); break;
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(namco_53xx); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: strcpy(info->s, "Namco 53xx"); break;
case DEVINFO_STR_FAMILY: strcpy(info->s, "Namco I/O"); break;
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
}
}

31
src/mame/machine/namco53.h Normal file
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@ -0,0 +1,31 @@
#ifndef NAMCO53_H
#define NAMCO53_H
#include "devcb.h"
typedef struct _namco_53xx_interface namco_53xx_interface;
struct _namco_53xx_interface
{
devcb_read8 in[4]; /* read handlers for ports A-D */
devcb_write8 out[2]; /* write handlers for ports A-B */
};
#define MDRV_NAMCO_53XX_ADD(_tag, _clock, _interface) \
MDRV_DEVICE_ADD(_tag, NAMCO_53XX, _clock) \
MDRV_DEVICE_CONFIG(_interface)
#define MDRV_NAMCO_53XX_REMOVE(_tag) \
MDRV_DEVICE_REMOVE(_tag)
READ8_DEVICE_HANDLER( namco_53xx_read );
/* device get info callback */
#define NAMCO_53XX DEVICE_GET_INFO_NAME(namco_53xx)
DEVICE_GET_INFO( namco_53xx );
#endif /* NAMCO53_H */

309
src/mame/machine/namcoio.c
View File

@ -135,6 +135,8 @@ TODO:
#include "driver.h"
#include "machine/namcoio.h"
#include "machine/namco50.h"
#include "machine/namco51.h"
#include "machine/namco53.h"
#include "sound/namco52.h"
#include "audio/namco54.h"
@ -170,268 +172,6 @@ static WRITE8_HANDLER( nop_w ) { }
/*
51XX
commands:
00: nop
01 + 4 arguments: set coinage (xevious, possibly because of a bug, is different)
02: go in "credit" mode and enable start buttons
03: disable joystick remapping
04: enable joystick remapping
05: go in "switch" mode
06: nop
07: nop
*/
static void namcoio_51XX_write(running_machine *machine,int chip,int data)
{
data &= 0x07;
LOG(("%s: custom 51XX write %02x\n",cpuexec_describe_context(machine),data));
if (io[chip].coincred_mode)
{
switch (io[chip].coincred_mode--)
{
case 4: io[chip].coins_per_cred[0] = data; break;
case 3: io[chip].creds_per_coin[0] = data; break;
case 2: io[chip].coins_per_cred[1] = data; break;
case 1: io[chip].creds_per_coin[1] = data; break;
}
}
else
{
switch (data)
{
case 0: // nop
break;
case 1: // set coinage
io[chip].coincred_mode = 4;
/* this is a good time to reset the credits counter */
io[chip].credits = 0;
{
/* kludge for a possible bug in Xevious */
static const game_driver *namcoio_51XX_driver = NULL;
static int namcoio_51XX_kludge = 0;
/* Only compute namcoio_51XX_kludge when gamedrv changes */
if (namcoio_51XX_driver != machine->gamedrv)
{
namcoio_51XX_driver = machine->gamedrv;
if (strcmp(namcoio_51XX_driver->name, "xevious") == 0 ||
strcmp(namcoio_51XX_driver->parent, "xevious") == 0)
namcoio_51XX_kludge = 1;
else
namcoio_51XX_kludge = 0;
}
if (namcoio_51XX_kludge)
{
io[chip].coincred_mode = 6;
io[chip].remap_joy = 1;
}
}
break;
case 2: // go in "credits" mode and enable start buttons
io[chip].mode = 1;
io[chip].in_count = 0;
break;
case 3: // disable joystick remapping
io[chip].remap_joy = 0;
break;
case 4: // enable joystick remapping
io[chip].remap_joy = 1;
break;
case 5: // go in "switch" mode
io[chip].mode = 0;
io[chip].in_count = 0;
break;
default:
logerror("unknown 51XX command %02x\n",data);
break;
}
}
}
/* joystick input mapping
The joystick is parsed and a number corresponding to the direction is returned,
according to the following table:
0
7 1
6 8 2
5 3
4
The values for directions impossible to obtain on a joystick have not been
verified on Namco original hardware, but they are the same in all the bootlegs,
so we can assume they are right.
*/
static const int joy_map[16] =
/* LDRU, LDR, LDU, LD, LRU, LR, LU, L, DRU, DR, DU, D, RU, R, U, center */
{ 0xf, 0xe, 0xd, 0x5, 0xc, 0x9, 0x7, 0x6, 0xb, 0x3, 0xa, 0x4, 0x1, 0x2, 0x0, 0x8 };
static UINT8 namcoio_51XX_read(running_machine *machine, int chip)
{
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
LOG(("%s: custom 51XX read\n",cpuexec_describe_context(machine)));
if (io[chip].mode == 0) /* switch mode */
{
switch ((io[chip].in_count++) % 3)
{
default:
case 0: return READ_PORT(space,0) | (READ_PORT(space,1) << 4);
case 1: return READ_PORT(space,2) | (READ_PORT(space,3) << 4);
case 2: return 0; // nothing?
}
}
else /* credits mode */
{
switch ((io[chip].in_count++) % 3)
{
default:
case 0: // number of credits in BCD format
{
int in,toggle;
in = ~(READ_PORT(space,0) | (READ_PORT(space,1) << 4));
toggle = in ^ io[chip].lastcoins;
io[chip].lastcoins = in;
if (io[chip].coins_per_cred[0] > 0)
{
if (io[chip].credits >= 99)
{
WRITE_PORT(space,1,1); // coin lockout
}
else
{
WRITE_PORT(space,1,0); // coin lockout
/* check if the user inserted a coin */
if (toggle & in & 0x10)
{
io[chip].coins[0]++;
WRITE_PORT(space,0,0x04); // coin counter
WRITE_PORT(space,0,0x0c);
if (io[chip].coins[0] >= io[chip].coins_per_cred[0])
{
io[chip].credits += io[chip].creds_per_coin[0];
io[chip].coins[0] -= io[chip].coins_per_cred[0];
}
}
if (toggle & in & 0x20)
{
io[chip].coins[1]++;
WRITE_PORT(space,0,0x08); // coin counter
WRITE_PORT(space,0,0x0c);
if (io[chip].coins[1] >= io[chip].coins_per_cred[1])
{
io[chip].credits += io[chip].creds_per_coin[1];
io[chip].coins[1] -= io[chip].coins_per_cred[1];
}
}
if (toggle & in & 0x40)
{
io[chip].credits++;
}
}
}
else io[chip].credits = 100; // free play
if (io[chip].mode == 1)
{
int on = (video_screen_get_frame_number(machine->primary_screen) & 0x10) >> 4;
if (io[chip].credits >= 2)
WRITE_PORT(space,0,0x0c | 3*on); // lamps
else if (io[chip].credits >= 1)
WRITE_PORT(space,0,0x0c | 2*on); // lamps
else
WRITE_PORT(space,0,0x0c); // lamps off
/* check for 1 player start button */
if (toggle & in & 0x04)
{
if (io[chip].credits >= 1)
{
io[chip].credits--;
io[chip].mode = 2;
WRITE_PORT(space,0,0x0c); // lamps off
}
}
/* check for 2 players start button */
else if (toggle & in & 0x08)
{
if (io[chip].credits >= 2)
{
io[chip].credits -= 2;
io[chip].mode = 2;
WRITE_PORT(space, 0,0x0c); // lamps off
}
}
}
}
if (~input_port_read(machine, "IN0") & 0x80) /* check test mode switch */
return 0xbb;
return (io[chip].credits / 10) * 16 + io[chip].credits % 10;
case 1:
{
int joy = READ_PORT(space,2) & 0x0f;
int in,toggle;
in = ~READ_PORT(space,0);
toggle = in ^ io[chip].lastbuttons;
io[chip].lastbuttons = (io[chip].lastbuttons & 2) | (in & 1);
/* remap joystick */
if (io[chip].remap_joy) joy = joy_map[joy];
/* fire */
joy |= ((toggle & in & 0x01)^1) << 4;
joy |= ((in & 0x01)^1) << 5;
return joy;
}
case 2:
{
int joy = READ_PORT(space,3) & 0x0f;
int in,toggle;
in = ~READ_PORT(space,0);
toggle = in ^ io[chip].lastbuttons;
io[chip].lastbuttons = (io[chip].lastbuttons & 1) | (in & 2);
/* remap joystick */
if (io[chip].remap_joy) joy = joy_map[joy];
/* fire */
joy |= ((toggle & in & 0x02)^2) << 3;
joy |= ((in & 0x02)^2) << 4;
return joy;
}
}
}
}
/***************************************************************************/
@ -876,46 +616,15 @@ void namco_06xx_init(running_machine *machine, int chipnum, int cpu,
static UINT8 namcoio_53XX_digdug_read(running_machine *machine, int chip)
{
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
LOG(("%s: custom 53XX read\n",cpuexec_describe_context(machine)));
switch ((io[chip].in_count++) % 2)
{
default:
case 0: return READ_PORT(space,0) | (READ_PORT(space,1) << 4);
case 1: return READ_PORT(space,2) | (READ_PORT(space,3) << 4);
}
}
static UINT8 namcoio_53XX_polepos_read(running_machine *machine,int chip)
{
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
LOG(("%s: custom 53XX read\n",cpuexec_describe_context(machine)));
switch ((io[chip].in_count++) % 8)
{
case 0: return READ_PORT(space,0) | (READ_PORT(space,1) << 4); // steering
case 4: return READ_PORT(space,2) | (READ_PORT(space,3) << 4); // dip switches
default: return 0xff; // polepos2 hangs if 0 is returned
}
}
static UINT8 namco_06xx_data_read(running_machine *machine, int chipnum)
{
LOG(("forwarding read to chip %d\n",chipnum%3));
switch (io[chipnum].type)
{
case NAMCOIO_50XX: return namco_50xx_read(io[chipnum].device);
case NAMCOIO_51XX: return namcoio_51XX_read(machine, chipnum);
case NAMCOIO_53XX_DIGDUG: return namcoio_53XX_digdug_read(machine, chipnum);
case NAMCOIO_53XX_POLEPOS: return namcoio_53XX_polepos_read(machine, chipnum);
case NAMCOIO_50XX: return namco_50xx_read(io[chipnum].device, 0);
case NAMCOIO_51XX: return namco_51xx_read(io[chipnum].device, 0);
case NAMCOIO_53XX: return namco_53xx_read(io[chipnum].device, 0);
default:
logerror("%s: custom IO type %d unsupported read\n",cpuexec_describe_context(machine),io[chipnum].type);
return 0xff;
@ -929,10 +638,10 @@ static void namco_06xx_data_write(running_machine *machine,int chipnum,UINT8 dat
switch (io[chipnum].type)
{
case NAMCOIO_50XX: namco_50xx_write(io[chipnum].device, data); break;
case NAMCOIO_51XX: namcoio_51XX_write(machine,chipnum,data); break;
case NAMCOIO_52XX: namco_52xx_write(io[chipnum].device, data); break;
case NAMCOIO_54XX: namco_54xx_write(io[chipnum].device, data); break;
case NAMCOIO_50XX: namco_50xx_write(io[chipnum].device, 0, data); break;
case NAMCOIO_51XX: namco_51xx_write(io[chipnum].device, 0, data); break;
case NAMCOIO_52XX: namco_52xx_write(io[chipnum].device, 0, data); break;
case NAMCOIO_54XX: namco_54xx_write(io[chipnum].device, 0, data); break;
default:
logerror("%s: custom IO type %d unsupported write\n",cpuexec_describe_context(machine),io[chipnum].type);
break;

3
src/mame/machine/namcoio.h
View File

@ -9,8 +9,7 @@ enum
NAMCOIO_50XX,
NAMCOIO_51XX,
NAMCOIO_52XX,
NAMCOIO_53XX_DIGDUG,
NAMCOIO_53XX_POLEPOS,
NAMCOIO_53XX,
NAMCOIO_54XX,
NAMCOIO_56XX,
NAMCOIO_58XX,

2
src/mame/mame.mak
View File

@ -940,6 +940,8 @@ $(MAMEOBJ)/namco.a: \
$(MACHINE)/namcoio.o \
$(AUDIO)/geebee.o \
$(MACHINE)/namco50.o \
$(MACHINE)/namco51.o \
$(MACHINE)/namco53.o \
$(AUDIO)/namco54.o \
$(AUDIO)/namcoc7x.o \
$(VIDEO)/bosco.o \