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https://github.com/holub/mame
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clpoker: Hook up devices; improve documentation (nw)
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@ -10,48 +10,139 @@ Main CPU ROM contains the following string:
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PCB is marked Chain Leisure CL-001
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- 1x Z0840004PSC Z80 CPU
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- 1x 12.000 X-TAL
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- 1x 12.000 XTAL (second XTAL location is unpopulated)
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- 1x AY38910A/P sound chip
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- 2x M5L8255AP-5
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- 1x HM86171 RAMDAC
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- 1x GM76C88L-15 SRAM (8,192 x 8 Bit)
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- 1x HY6116ALP-12 CMOS SRAM (2,048 x 8 Bit)
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- 1x MACH110-20JC CMOS
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- 2x ATV2500H PLDs
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- 1x PLSI1024-60LJ CPLD
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- 1x GAL20V8A-15LNC
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- 1x bank of 8 dip-switches
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- 1x (should be 2x) bank of 8 dip-switches
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There also are unpopulated locations that might fit a YM3812 and YM3014.
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*/
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#include "emu.h"
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#include "screen.h"
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#include "speaker.h"
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#include "cpu/z80/z80.h"
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#include "machine/i8255.h"
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#include "machine/nvram.h"
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#include "sound/ay8910.h"
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#include "video/ramdac.h"
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class clpoker_state : public driver_device
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{
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public:
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clpoker_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu") { }
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, m_maincpu(*this, "maincpu")
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, m_videoram(*this, "videoram")
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{
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}
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uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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DECLARE_WRITE8_MEMBER(output_a_w);
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DECLARE_WRITE8_MEMBER(output_b_w);
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DECLARE_WRITE8_MEMBER(output_c_w);
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u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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private:
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required_device<cpu_device> m_maincpu;
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required_shared_ptr<u8> m_videoram;
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};
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static ADDRESS_MAP_START( prg_map, AS_PROGRAM, 8, clpoker_state )
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AM_RANGE(0x0000, 0x7fff) AM_ROM
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AM_RANGE(0x0000, 0xbfff) AM_ROM
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AM_RANGE(0xc000, 0xdfff) AM_RAM AM_SHARE("videoram")
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AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("nvram")
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AM_RANGE(0xf000, 0xf000) AM_DEVWRITE("ramdac", ramdac_device, index_w)
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AM_RANGE(0xf001, 0xf001) AM_DEVWRITE("ramdac", ramdac_device, pal_w)
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AM_RANGE(0xf002, 0xf002) AM_DEVWRITE("ramdac", ramdac_device, mask_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( io_map, AS_IO, 8, clpoker_state )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ppi_outputs", i8255_device, read, write)
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AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("ppi_inputs", i8255_device, read, write)
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AM_RANGE(0x30, 0x30) AM_DEVREAD("aysnd", ay8910_device, data_r)
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AM_RANGE(0x32, 0x32) AM_DEVWRITE("aysnd", ay8910_device, data_w)
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AM_RANGE(0x34, 0x34) AM_DEVWRITE("aysnd", ay8910_device, address_w)
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AM_RANGE(0xc0, 0xc0) AM_READNOP // mystery read at startup
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( ramdac_map, AS_0, 8, clpoker_state )
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AM_RANGE(0x000, 0x3ff) AM_DEVREADWRITE("ramdac", ramdac_device, ramdac_pal_r, ramdac_rgb666_w)
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ADDRESS_MAP_END
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WRITE8_MEMBER(clpoker_state::output_a_w)
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{
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}
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WRITE8_MEMBER(clpoker_state::output_b_w)
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{
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}
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WRITE8_MEMBER(clpoker_state::output_c_w)
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{
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}
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static INPUT_PORTS_START( clpoker )
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PORT_START("INA")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_START("INB")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_START("INC")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_START("DSW1")
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PORT_DIPUNKNOWN( 0x01, 0x01 )
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PORT_DIPUNKNOWN( 0x02, 0x02 )
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PORT_DIPUNKNOWN( 0x04, 0x04 )
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PORT_DIPUNKNOWN( 0x08, 0x08 )
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PORT_DIPUNKNOWN( 0x10, 0x10 )
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PORT_DIPUNKNOWN( 0x20, 0x20 )
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PORT_DIPUNKNOWN( 0x40, 0x40 )
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PORT_DIPUNKNOWN( 0x80, 0x80 )
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PORT_START("DSW2")
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PORT_DIPUNKNOWN( 0x01, 0x01 )
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PORT_DIPUNKNOWN( 0x02, 0x02 )
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PORT_DIPUNKNOWN( 0x04, 0x04 )
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PORT_DIPUNKNOWN( 0x08, 0x08 )
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PORT_DIPUNKNOWN( 0x10, 0x10 )
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PORT_DIPUNKNOWN( 0x20, 0x20 )
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PORT_DIPUNKNOWN( 0x40, 0x40 )
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PORT_DIPUNKNOWN( 0x80, 0x80 )
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INPUT_PORTS_END
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uint32_t clpoker_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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u32 clpoker_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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return 0;
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}
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@ -62,7 +153,17 @@ static MACHINE_CONFIG_START( clpoker, clpoker_state )
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MCFG_CPU_PROGRAM_MAP(prg_map)
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MCFG_CPU_IO_MAP(io_map)
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// 2x M5L8255AP-5
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MCFG_NVRAM_ADD_0FILL("nvram") // HY6116ALP-12
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MCFG_DEVICE_ADD("ppi_outputs", I8255, 0) // M5L8255AP-5
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MCFG_I8255_OUT_PORTA_CB(WRITE8(clpoker_state, output_a_w))
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MCFG_I8255_OUT_PORTB_CB(WRITE8(clpoker_state, output_b_w))
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MCFG_I8255_OUT_PORTC_CB(WRITE8(clpoker_state, output_c_w))
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MCFG_DEVICE_ADD("ppi_inputs", I8255, 0) // M5L8255AP-5
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MCFG_I8255_IN_PORTA_CB(IOPORT("INA"))
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MCFG_I8255_IN_PORTB_CB(IOPORT("INB"))
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MCFG_I8255_IN_PORTC_CB(IOPORT("INC"))
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE(60) // wrong
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@ -72,10 +173,15 @@ static MACHINE_CONFIG_START( clpoker, clpoker_state )
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MCFG_SCREEN_UPDATE_DRIVER(clpoker_state, screen_update)
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MCFG_SCREEN_PALETTE("palette")
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MCFG_PALETTE_ADD("palette", 0x1000)
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MCFG_PALETTE_ADD("palette", 0x100)
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MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette") // HM86171
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/* sound hardware */
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// AY38910A/P
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("aysnd", AY8910, XTAL_12MHz / 8) // AY38910A/P, divider not verified
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MCFG_AY8910_PORT_A_READ_CB(IOPORT("DSW1"))
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MCFG_AY8910_PORT_B_READ_CB(IOPORT("DSW2"))
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
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MACHINE_CONFIG_END
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