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on 'C2x-compatible opcodes that set treg(0), treg1/2 are set too if TRM=0

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This commit is contained in:
Michaël Banaan Ananas 2012-07-15 16:35:50 +00:00
parent 7018fde0a3
commit aefabca2f9
1 changed files with 10 additions and 0 deletions
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10
src/emu/cpu/tms32051/32051ops.c
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@ -1493,6 +1493,11 @@ static void op_lt(tms32051_state *cpustate)
UINT16 data = DM_READ16(cpustate, ea);
cpustate->treg0 = data;
if (cpustate->pmst.trm == 0)
{
cpustate->treg1 = data;
cpustate->treg2 = data;
}
CYCLES(1);
}
@ -1506,6 +1511,11 @@ static void op_lta(tms32051_state *cpustate)
cpustate->treg0 = data;
spreg = PREG_PSCALER(cpustate, cpustate->preg);
cpustate->acc = ADD(cpustate, cpustate->acc, spreg, 0);
if (cpustate->pmst.trm == 0)
{
cpustate->treg1 = data;
cpustate->treg2 = data;
}
CYCLES(1);
}