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https://github.com/holub/mame
synced 2025-04-25 09:50:04 +03:00
Some harmless mods to DC GD-Rom
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@ -116,7 +116,7 @@ static ADDRESS_MAP_START( dc_map, AS_PROGRAM, 64, dc_cons_state )
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AM_RANGE(0x005f6800, 0x005f69ff) AM_READWRITE(dc_sysctrl_r, dc_sysctrl_w )
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AM_RANGE(0x005f6c00, 0x005f6cff) AM_DEVICE32( "maple_dc", maple_dc_device, amap, U64(0xffffffffffffffff) )
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AM_RANGE(0x005f7000, 0x005f70ff) AM_READWRITE(dc_mess_gdrom_r, dc_mess_gdrom_w )
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AM_RANGE(0x005f7400, 0x005f74ff) AM_READWRITE(dc_mess_g1_ctrl_r, dc_mess_g1_ctrl_w )
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AM_RANGE(0x005f7400, 0x005f74ff) AM_READWRITE32(dc_mess_g1_ctrl_r, dc_mess_g1_ctrl_w, U64(0xffffffffffffffff) )
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AM_RANGE(0x005f7800, 0x005f78ff) AM_READWRITE(dc_g2_ctrl_r, dc_g2_ctrl_w )
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AM_RANGE(0x005f7c00, 0x005f7cff) AM_DEVICE32("powervr2", powervr2_device, pd_dma_map, U64(0xffffffffffffffff))
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AM_RANGE(0x005f8000, 0x005f9fff) AM_DEVICE32("powervr2", powervr2_device, ta_map, U64(0xffffffffffffffff))
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@ -30,8 +30,8 @@ public:
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inline int decode_reg32_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift);
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READ64_MEMBER( dc_mess_gdrom_r );
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WRITE64_MEMBER( dc_mess_gdrom_w );
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READ64_MEMBER( dc_mess_g1_ctrl_r );
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WRITE64_MEMBER( dc_mess_g1_ctrl_w );
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READ32_MEMBER( dc_mess_g1_ctrl_r );
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WRITE32_MEMBER( dc_mess_g1_ctrl_w );
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private:
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UINT64 PDTRA, PCTRA;
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@ -11,6 +11,9 @@
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cfffee0 - stack location when bad happens
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TODO:
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- gdrom_alt_status is identical to normal status except that "but it does not clear DMA status information when it is accessed"
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*/
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#include "emu.h"
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@ -267,6 +270,8 @@ WRITE32_MEMBER(dc_cons_state::atapi_w )
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atapi_data[atapi_data_ptr++] = data & 0xff;
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atapi_data[atapi_data_ptr++] = data >> 8;
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//printf("%02x %02x %d\n",data & 0xff, data >> 8,atapi_data_ptr);
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if (atapi_cdata_wait)
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{
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// printf("ATAPI: waiting, ptr %d wait %d\n", atapi_data_ptr, atapi_cdata_wait);
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@ -651,32 +656,30 @@ int dc_cons_state::decode_reg32_64( UINT32 offset, UINT64 mem_mask, UINT64 *shif
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return reg;
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}
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READ64_MEMBER(dc_cons_state::dc_mess_g1_ctrl_r )
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READ32_MEMBER(dc_cons_state::dc_mess_g1_ctrl_r )
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{
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int reg;
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UINT64 shift;
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reg = decode_reg32_64(offset, mem_mask, &shift);
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mame_printf_verbose("G1CTRL: Unmapped read %08x\n", 0x5f7400+reg*4);
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return (UINT64)g1bus_regs[reg] << shift;
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switch(offset)
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{
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case SB_GDST:
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break;
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case SB_GDLEND:
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//debugger_break(machine());
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return atapi_xferlen; // TODO: check me
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default:
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printf("G1CTRL: Unmapped read %08x\n", 0x5f7400+offset*4);
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debugger_break(machine());
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}
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return g1bus_regs[offset];
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}
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WRITE64_MEMBER(dc_cons_state::dc_mess_g1_ctrl_w )
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WRITE32_MEMBER(dc_cons_state::dc_mess_g1_ctrl_w )
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{
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int reg;
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UINT64 shift;
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UINT32 dat; //, old
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reg = decode_reg32_64(offset, mem_mask, &shift);
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dat = (UINT32)(data >> shift);
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// old = g1bus_regs[reg];
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g1bus_regs[reg] = dat; // 5f7400+reg*4=dat
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mame_printf_verbose("G1CTRL: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x5f7400+reg*4, dat, data, offset, mem_mask);
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switch (reg)
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g1bus_regs[offset] = data; // 5f7400+reg*4=dat
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// mame_printf_verbose("G1CTRL: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x5f7400+reg*4, dat, data, offset, mem_mask);
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switch (offset)
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{
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case SB_GDST:
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if (dat & 1 && g1bus_regs[SB_GDEN] == 1) // 0 -> 1
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if (data & 1 && g1bus_regs[SB_GDEN] == 1) // 0 -> 1
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{
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if (g1bus_regs[SB_GDDIR] == 0)
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{
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