mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
added preliminary tmpz84c015, stupid daisy chain
This commit is contained in:
Michaël Banaan Ananas
parent
68145a8b1d
commit
b9f6fdc7dd
3
.gitattributes
vendored
3
.gitattributes
vendored
@ -2260,9 +2260,10 @@ src/emu/cpu/z8/z8.c svneol=native#text/plain
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src/emu/cpu/z8/z8.h svneol=native#text/plain
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src/emu/cpu/z8/z8dasm.c svneol=native#text/plain
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src/emu/cpu/z8/z8ops.inc svneol=native#text/plain
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src/emu/cpu/z80/tlcs_z80.c svneol=native#text/plain
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src/emu/cpu/z80/tmpz84c011.c svneol=native#text/plain
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src/emu/cpu/z80/tmpz84c011.h svneol=native#text/plain
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src/emu/cpu/z80/tmpz84c015.c svneol=native#text/plain
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src/emu/cpu/z80/tmpz84c015.h svneol=native#text/plain
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src/emu/cpu/z80/z80.c svneol=native#text/plain
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src/emu/cpu/z80/z80.h svneol=native#text/plain
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src/emu/cpu/z80/z80daisy.c svneol=native#text/plain
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@ -2228,16 +2228,17 @@ $(CPUOBJ)/tlcs900/dasm900.o: $(CPUSRC)/tlcs900/dasm900.c
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ifneq ($(filter Z80,$(CPUS)),)
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OBJDIRS += $(CPUOBJ)/z80
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CPUOBJS += $(CPUOBJ)/z80/z80.o $(CPUOBJ)/z80/tlcs_z80.o $(CPUOBJ)/z80/z80daisy.o
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CPUOBJS += $(CPUOBJ)/z80/tmpz84c011.o
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CPUOBJS += $(CPUOBJ)/z80/z80.o \
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$(CPUOBJ)/z80/z80daisy.o \
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$(CPUOBJ)/z80/tmpz84c011.o \
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$(CPUOBJ)/z80/tmpz84c015.o
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DASMOBJS += $(CPUOBJ)/z80/z80dasm.o
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endif
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$(CPUOBJ)/z80/z80.o: $(CPUSRC)/z80/z80.c \
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$(CPUSRC)/z80/z80.h
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$(CPUOBJ)/z80/tlcs_z80.o: $(CPUSRC)/z80/tlcs_z80.c \
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$(CPUSRC)/z80/z80.h
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#-------------------------------------------------
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# Sharp LR35902 (Game Boy CPU)
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@ -1,75 +0,0 @@
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/*****************************************************************************
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*
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* tlcs_z80.c
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* TOSHIBA TLCS Z80 emulation
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*/
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#include "emu.h"
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#include "z80.h"
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#include "machine/z80ctc.h"
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#include "machine/z80pio.h"
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#include "machine/z80dart.h"
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//TODO: These interfaces should default to DEVCB_NULL pointers and
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// the actual callbacks should be provided by the driver that instantiates the TLCS-Z80 CPU.
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// We need methods for the driver to provide these interface configurations to the CPU core.
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// something like:
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// m_tlcsz80->set_internal_ctc_interface (ctc_intf);
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// m_tlcsz80->set_internal_pio_interface (pio_intf);
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// m_tlcsz80->set_internal_sio_interface (sio_intf);
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/* Daisy Chaining */
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#ifdef UNUSED
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static const z80_daisy_config tlcsz80_daisy_chain[] =
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{
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{ TLCSZ80_INTERNAL_CTC_TAG },
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{ TLCSZ80_INTERNAL_PIO_TAG },
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{ TLCSZ80_INTERNAL_SIO_TAG },
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{ NULL }
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};
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#endif
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static ADDRESS_MAP_START( tlcs_z80_internal_io_map, AS_IO, 8, tlcs_z80_device )
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AM_RANGE(0x10, 0x13) AM_DEVREADWRITE(TLCSZ80_INTERNAL_CTC_TAG, z80ctc_device, read, write)
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AM_RANGE(0x18, 0x1B) AM_DEVREADWRITE(TLCSZ80_INTERNAL_SIO_TAG, z80sio0_device, cd_ba_r, cd_ba_w)
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AM_RANGE(0x1C, 0x1F) AM_DEVREADWRITE(TLCSZ80_INTERNAL_PIO_TAG, z80pio_device, read, write)
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// AM_RANGE(0xF0, 0xF0) TODO: Watchdog Timer: Stand-by mode Register
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// AM_RANGE(0xF1, 0xF1) TODO: Watchdog Timer: command Register
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// AM_RANGE(0xF4, 0xF4) TODO: Daisy chain interrupt precedence Register
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ADDRESS_MAP_END
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//This is wrong!
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//We should use the same clock as declared in the TLCS_Z80 instantiation in the driver that uses it.
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#define TLCS_Z80_CLOCK 8000000
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static MACHINE_CONFIG_FRAGMENT( tlcs_z80 )
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MCFG_DEVICE_ADD(TLCSZ80_INTERNAL_CTC_TAG, Z80CTC, TLCS_Z80_CLOCK)
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MCFG_Z80CTC_INTR_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
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MCFG_Z80SIO0_ADD(TLCSZ80_INTERNAL_SIO_TAG, TLCS_Z80_CLOCK, 0, 0, 0, 0)
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MCFG_Z80DART_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
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MCFG_DEVICE_ADD(TLCSZ80_INTERNAL_PIO_TAG, Z80PIO, TLCS_Z80_CLOCK)
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MCFG_Z80PIO_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
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MACHINE_CONFIG_END
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tlcs_z80_device::tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: z80_device(mconfig, TLCS_Z80, "TLCS-Z80", tag, owner, clock, "tlcs_z80", __FILE__),
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m_z80ctc(*this, TLCSZ80_INTERNAL_CTC_TAG),
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m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 8, 0, ADDRESS_MAP_NAME( tlcs_z80_internal_io_map ) )
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{ }
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WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg0 ) { m_z80ctc->trg0(state ? 0 : 1); }
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WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg1 ) { m_z80ctc->trg1(state ? 0 : 1); }
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WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg2 ) { m_z80ctc->trg2(state ? 0 : 1); }
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WRITE_LINE_MEMBER( tlcs_z80_device::ctc_trg3 ) { m_z80ctc->trg3(state ? 0 : 1); }
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machine_config_constructor tlcs_z80_device::device_mconfig_additions() const
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{
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return MACHINE_CONFIG_NAME( tlcs_z80 );
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}
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const device_type TLCS_Z80 = &device_creator<tlcs_z80_device>;
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@ -30,6 +30,7 @@ ADDRESS_MAP_END
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tmpz84c011_device::tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: z80_device(mconfig, TMPZ84C011, "TMPZ84C011", tag, owner, clock, "tmpz84c011", __FILE__),
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m_ctc(*this, "ctc"),
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m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME( tmpz84c011_internal_io_map ) ),
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m_outportsa(*this),
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m_outportsb(*this),
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@ -48,6 +48,7 @@ class tmpz84c011_device : public z80_device
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public:
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tmpz84c011_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
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// static configuration helpers
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template<class _Object> static devcb_base & set_outportsa_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_outportsa.set_callback(object); }
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template<class _Object> static devcb_base & set_outportsb_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_outportsb.set_callback(object); }
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template<class _Object> static devcb_base & set_outportsc_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_outportsc.set_callback(object); }
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@ -60,6 +61,9 @@ public:
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template<class _Object> static devcb_base & set_inportsd_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_inportsd.set_callback(object); }
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template<class _Object> static devcb_base & set_inportse_cb(device_t &device, _Object object) { return downcast<tmpz84c011_device &>(device).m_inportse.set_callback(object); }
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// devices/pointers
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required_device<z80ctc_device> m_ctc;
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DECLARE_READ8_MEMBER(tmpz84c011_pa_r);
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DECLARE_READ8_MEMBER(tmpz84c011_pb_r);
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DECLARE_READ8_MEMBER(tmpz84c011_pc_r);
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@ -99,20 +103,22 @@ protected:
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}
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private:
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// internal state
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UINT8 m_pio_dir[5];
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UINT8 m_pio_latch[5];
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devcb_write8 m_outportsa;
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devcb_write8 m_outportsb;
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devcb_write8 m_outportsc;
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devcb_write8 m_outportsd;
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devcb_write8 m_outportse;
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// callbacks
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devcb_write8 m_outportsa;
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devcb_write8 m_outportsb;
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devcb_write8 m_outportsc;
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devcb_write8 m_outportsd;
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devcb_write8 m_outportse;
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devcb_read8 m_inportsa;
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devcb_read8 m_inportsb;
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devcb_read8 m_inportsc;
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devcb_read8 m_inportsd;
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devcb_read8 m_inportse;
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devcb_read8 m_inportsa;
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devcb_read8 m_inportsb;
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devcb_read8 m_inportsc;
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devcb_read8 m_inportsd;
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devcb_read8 m_inportse;
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};
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extern const device_type TMPZ84C011;
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118
src/emu/cpu/z80/tmpz84c015.c
Normal file
118
src/emu/cpu/z80/tmpz84c015.c
Normal file
@ -0,0 +1,118 @@
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/***************************************************************************
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Toshiba TMPZ84C015, TLCS-Z80 ASSP Family
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Z80 CPU, SIO, CTC, CGC(6/8MHz), PIO, WDT
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TODO:
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- SIO configuration, or should that be up to the driver?
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- CGC (clock generator/controller)
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- WDT (watchdog timer)
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***************************************************************************/
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#include "tmpz84c015.h"
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const device_type TMPZ84C015 = &device_creator<tmpz84c015_device>;
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static ADDRESS_MAP_START( tmpz84c015_internal_io_map, AS_IO, 8, tmpz84c015_device )
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AM_RANGE(0x10, 0x13) AM_MIRROR(0xff00) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
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AM_RANGE(0x18, 0x1b) AM_MIRROR(0xff00) AM_DEVREADWRITE("sio", z80dart_device, ba_cd_r, ba_cd_w)
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AM_RANGE(0x1c, 0x1f) AM_MIRROR(0xff00) AM_DEVREADWRITE("pio", z80pio_device, read_alt, write_alt)
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AM_RANGE(0xf4, 0xf4) AM_MIRROR(0xff00) AM_WRITE(irq_priority_w)
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ADDRESS_MAP_END
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tmpz84c015_device::tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: z80_device(mconfig, TMPZ84C015, "TMPZ84C015", tag, owner, clock, "tmpz84c015", __FILE__),
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m_ctc(*this, "ctc"),
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m_sio(*this, "sio"),
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m_pio(*this, "pio"),
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m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 16, 0, ADDRESS_MAP_NAME( tmpz84c015_internal_io_map ) ),
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m_irq_priority(-1) // !
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{
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void tmpz84c015_device::device_start()
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{
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z80_device::device_start();
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void tmpz84c015_device::device_reset()
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{
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irq_priority_w(*m_io, 0, 0);
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z80_device::device_reset();
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}
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//-------------------------------------------------
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// device_post_load - device-specific post-load
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//-------------------------------------------------
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void tmpz84c015_device::device_post_load()
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{
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// reinit irq priority
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UINT8 prio = m_irq_priority;
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m_irq_priority = -1;
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irq_priority_w(*m_io, 0, prio);
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}
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/* CPU interface */
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WRITE8_MEMBER(tmpz84c015_device::irq_priority_w)
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{
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data &= 7;
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if (data > 5)
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{
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logerror("tmpz84c015: irq_priority_w undefined state %X\n", data);
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data &= 3; // guess
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}
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if (m_irq_priority != data)
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{
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static const char *dev[3] = { "ctc", "sio", "pio" };
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static const int prio[6][3] =
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{
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{ 0, 1, 2 }, // 0: ctc -> sio -> pio -> ext
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{ 1, 0, 2 }, // 1: sio -> ctc -> pio -> ext
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{ 0, 2, 1 }, // 2: ctc -> pio -> sio -> ext
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{ 2, 1, 0 }, // 3: pio -> sio -> ctc -> ext
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{ 2, 0, 1 }, // 4: pio -> ctc -> sio -> ext
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{ 1, 2, 0 } // 5: sio -> pio -> ctc -> ext
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};
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// reconfigure first 3 entries in daisy chain
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const char *daisy[4] = { dev[prio[data][0]], dev[prio[data][1]], dev[prio[data][2]], NULL };
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m_daisy.init(this, (const z80_daisy_config *)daisy);
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m_irq_priority = data;
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}
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}
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static MACHINE_CONFIG_FRAGMENT( tmpz84c015 )
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/* basic machine hardware */
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MCFG_DEVICE_ADD("ctc", Z80CTC, DERIVED_CLOCK(1,1) )
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MCFG_Z80CTC_INTR_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
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MCFG_Z80SIO0_ADD("sio", DERIVED_CLOCK(1,1), 0, 0, 0, 0)
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MCFG_Z80DART_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
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MCFG_DEVICE_ADD("pio", Z80PIO, DERIVED_CLOCK(1,1) )
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MCFG_Z80PIO_OUT_INT_CB(INPUTLINE(DEVICE_SELF, INPUT_LINE_IRQ0))
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MACHINE_CONFIG_END
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machine_config_constructor tmpz84c015_device::device_mconfig_additions() const
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{
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return MACHINE_CONFIG_NAME( tmpz84c015 );
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}
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54
src/emu/cpu/z80/tmpz84c015.h
Normal file
54
src/emu/cpu/z80/tmpz84c015.h
Normal file
@ -0,0 +1,54 @@
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/***************************************************************************
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Toshiba TMPZ84C015, TLCS-Z80 ASSP Family
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Z80 CPU, SIO, CTC, CGC(6/8MHz), PIO, WDT
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***************************************************************************/
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#include "emu.h"
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#include "z80.h"
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#include "machine/z80dart.h"
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#include "machine/z80ctc.h"
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#include "machine/z80pio.h"
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// If an external daisy chain is used, insert this before your own device tags:
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#define TMPZ84C015_DAISY_INTERNAL { "ctc" }, { "sio" }, { "pio" }
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// NOTE: for callbacks, see machine/z80dart.h, machine/z80ctc.h, machine/z80pio.h
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class tmpz84c015_device : public z80_device
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{
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public:
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tmpz84c015_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
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// devices/pointers
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required_device<z80ctc_device> m_ctc;
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required_device<z80dart_device> m_sio;
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required_device<z80pio_device> m_pio;
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DECLARE_WRITE8_MEMBER(irq_priority_w);
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protected:
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// device-level overrides
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virtual machine_config_constructor device_mconfig_additions() const;
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virtual void device_start();
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virtual void device_reset();
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virtual void device_post_load();
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const address_space_config m_io_space_config;
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const address_space_config *memory_space_config(address_spacenum spacenum) const
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{
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switch (spacenum)
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{
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case AS_IO: return &m_io_space_config;
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default: return z80_device::memory_space_config(spacenum);
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}
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}
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private:
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UINT8 m_irq_priority;
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};
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extern const device_type TMPZ84C015;
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@ -4,11 +4,6 @@
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#define __Z80_H__
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#include "z80daisy.h"
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#include "machine/z80ctc.h"
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#define TLCSZ80_INTERNAL_CTC_TAG "tlcsz80_int_ctc"
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#define TLCSZ80_INTERNAL_PIO_TAG "tlcsz80_int_pio"
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#define TLCSZ80_INTERNAL_SIO_TAG "tlcsz80_int_sio"
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enum
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{
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@ -306,38 +301,5 @@ protected:
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extern const device_type NSC800;
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class tlcs_z80_device : public z80_device
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{
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public:
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tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32);
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required_device<z80ctc_device> m_z80ctc;
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DECLARE_WRITE8_MEMBER( ctc_w );
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DECLARE_WRITE_LINE_MEMBER( ctc_trg0 );
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DECLARE_WRITE_LINE_MEMBER( ctc_trg1 );
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DECLARE_WRITE_LINE_MEMBER( ctc_trg2 );
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DECLARE_WRITE_LINE_MEMBER( ctc_trg3 );
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protected:
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virtual machine_config_constructor device_mconfig_additions() const;
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const address_space_config m_io_space_config;
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const address_space_config *memory_space_config(address_spacenum spacenum) const
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{
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||||
switch (spacenum)
|
||||
{
|
||||
case AS_IO: return &m_io_space_config;
|
||||
default: return z80_device::memory_space_config(spacenum);
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
|
||||
|
||||
extern const device_type TLCS_Z80;
|
||||
|
||||
|
||||
|
||||
#endif /* __Z80_H__ */
|
||||
|
||||
@ -72,8 +72,12 @@ void z80_daisy_chain::init(device_t *cpudevice, const z80_daisy_config *daisy)
|
||||
if (!target->interface(intf))
|
||||
fatalerror("Device '%s' does not implement the z80daisy interface!\n", daisy->devname);
|
||||
|
||||
// append to the end
|
||||
// append to the end, or overwrite existing entry
|
||||
daisy_entry *next = (*tailptr) ? (*tailptr)->m_next : NULL;
|
||||
if (*tailptr != NULL)
|
||||
auto_free(cpudevice->machine(), *tailptr);
|
||||
*tailptr = auto_alloc(cpudevice->machine(), daisy_entry(target));
|
||||
(*tailptr)->m_next = next;
|
||||
tailptr = &(*tailptr)->m_next;
|
||||
}
|
||||
}
|
||||
|
||||
@ -15,9 +15,7 @@
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "machine/z80ctc.h"
|
||||
#include "machine/z80dart.h"
|
||||
#include "cpu/z80/tmpz84c015.h"
|
||||
#include "pve500.lh"
|
||||
|
||||
#define IO_EXPANDER_PORTA 0
|
||||
@ -49,14 +47,15 @@ private:
|
||||
|
||||
virtual void machine_start();
|
||||
virtual void machine_reset();
|
||||
required_device<tlcs_z80_device> m_maincpu;
|
||||
required_device<tlcs_z80_device> m_subcpu;
|
||||
required_device<tmpz84c015_device> m_maincpu;
|
||||
required_device<tmpz84c015_device> m_subcpu;
|
||||
UINT8 io_SEL, io_LD, io_LE, io_SC, io_KY;
|
||||
};
|
||||
|
||||
|
||||
static const z80_daisy_config maincpu_daisy_chain[] =
|
||||
{
|
||||
TMPZ84C015_DAISY_INTERNAL,
|
||||
{ "external_ctc" },
|
||||
{ "external_sio" },
|
||||
{ NULL }
|
||||
@ -64,6 +63,7 @@ static const z80_daisy_config maincpu_daisy_chain[] =
|
||||
|
||||
|
||||
static ADDRESS_MAP_START(maincpu_io, AS_IO, 8, pve500_state)
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("external_sio", z80sio0_device, cd_ba_r, cd_ba_w)
|
||||
AM_RANGE(0x08, 0x0B) AM_DEVREADWRITE("external_ctc", z80ctc_device, read, write)
|
||||
ADDRESS_MAP_END
|
||||
@ -196,7 +196,7 @@ void pve500_state::machine_reset()
|
||||
READ8_MEMBER(pve500_state::dualport_ram_left_r)
|
||||
{
|
||||
//printf("dualport_ram: Left READ\n");
|
||||
m_subcpu->ctc_trg1(1); //(INT_Right)
|
||||
m_subcpu->m_ctc->trg1(1); //(INT_Right)
|
||||
return dualport_7FE_data;
|
||||
}
|
||||
|
||||
@ -204,13 +204,13 @@ WRITE8_MEMBER(pve500_state::dualport_ram_left_w)
|
||||
{
|
||||
//printf("dualport_ram: Left WRITE\n");
|
||||
dualport_7FF_data = data;
|
||||
m_subcpu->ctc_trg1(0); //(INT_Right)
|
||||
m_subcpu->m_ctc->trg1(0); //(INT_Right)
|
||||
}
|
||||
|
||||
READ8_MEMBER(pve500_state::dualport_ram_right_r)
|
||||
{
|
||||
//printf("dualport_ram: Right READ\n");
|
||||
m_maincpu->ctc_trg1(1); //(INT_Left)
|
||||
m_maincpu->m_ctc->trg1(1); //(INT_Left)
|
||||
return dualport_7FF_data;
|
||||
}
|
||||
|
||||
@ -218,7 +218,7 @@ WRITE8_MEMBER(pve500_state::dualport_ram_right_w)
|
||||
{
|
||||
//printf("dualport_ram: Right WRITE\n");
|
||||
dualport_7FE_data = data;
|
||||
m_maincpu->ctc_trg1(0); //(INT_Left)
|
||||
m_maincpu->m_ctc->trg1(0); //(INT_Left)
|
||||
}
|
||||
|
||||
READ8_MEMBER(pve500_state::io_expander_r)
|
||||
@ -283,7 +283,7 @@ WRITE8_MEMBER(pve500_state::io_expander_w)
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_START( pve500, pve500_state )
|
||||
MCFG_CPU_ADD("maincpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
|
||||
MCFG_CPU_ADD("maincpu", TMPZ84C015, XTAL_12MHz / 2) /* TMPZ84C015BF-6 */
|
||||
MCFG_CPU_PROGRAM_MAP(maincpu_prg)
|
||||
MCFG_CPU_IO_MAP(maincpu_io)
|
||||
MCFG_CPU_CONFIG(maincpu_daisy_chain)
|
||||
@ -294,7 +294,7 @@ static MACHINE_CONFIG_START( pve500, pve500_state )
|
||||
MCFG_Z80SIO0_ADD("external_sio", XTAL_12MHz / 2, 0, 0, 0, 0)
|
||||
MCFG_Z80DART_OUT_INT_CB(INPUTLINE("maincpu", INPUT_LINE_IRQ0))
|
||||
|
||||
MCFG_CPU_ADD("subcpu", TLCS_Z80, XTAL_12MHz / 2) /* TMPZ84C015BF-6 (TOSHIBA TLCS-Z80) */
|
||||
MCFG_CPU_ADD("subcpu", TMPZ84C015, XTAL_12MHz / 2) /* TMPZ84C015BF-6 */
|
||||
MCFG_CPU_PROGRAM_MAP(subcpu_prg)
|
||||
|
||||
/* TODO:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user