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https://github.com/holub/mame
synced 2025-04-21 07:52:35 +03:00
On-the-DL credit: "SGINut"
Changes: - Re-fixed RSP single-step activation behavior - Reading the RSP PC returns only the least significant 12 bits - Fixed flag behavior when read out via CFC2
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@ -2685,7 +2685,19 @@ static int rsp_execute(int cycles)
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// ------------------------------------------------
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//
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if (RTREG) RTVAL = rsp.flag[RDREG];
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if (RTREG)
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{
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if (RDREG == 2)
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{
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// Anciliary clipping flags
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RTVAL = rsp.flag[RDREG] & 0x00ff;
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}
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else
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{
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// All other flags are 16 bits but sign-extended at retrieval
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RTVAL = (UINT32)rsp.flag[RDREG] | ( ( rsp.flag[RDREG] & 0x8000 ) ? 0xffff0000 : 0 );
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}
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}
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break;
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}
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case 0x04: /* MTC2 */
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@ -2890,8 +2902,8 @@ static void rsp_set_info(UINT32 state, cpuinfo *info)
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rsp.sr = info->i;
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if( info->i & RSP_STATUS_SSTEP )
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{
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// Heaven help me for putting this check here, but it's accurate to the hardware.
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rsp.step_count = ( cpu_getactivecpu() == 0 ) ? 1 : 0;
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// Heaven help me for putting this check here, but it's accurate to the hardware and works.
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rsp.step_count = ( cpu_getactivecpu() == 0 ) ? 0 : 1;
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}
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break;
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case CPUINFO_INT_REGISTER + RSP_NEXTPC: rsp.nextpc = info->i; break;
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@ -282,7 +282,7 @@ READ32_HANDLER( n64_sp_reg_r )
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return 0;
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case 0x40000/4: // PC
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return cpunum_get_info_int(1, CPUINFO_INT_REGISTER + RSP_PC);
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return cpunum_get_info_int(1, CPUINFO_INT_REGISTER + RSP_PC) & 0x00000fff;
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default:
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logerror("sp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, activecpu_get_pc());
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