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swtpc09: Much saner implementation of DAT banking (nw)

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This commit is contained in:
AJR 2017-11-30 23:50:38 -05:00
parent dcba5a1edc
commit bc6c34e784
3 changed files with 29 additions and 215 deletions
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210
src/mame/drivers/swtpc09.cpp
View File

@ -61,24 +61,9 @@
/* only ROM from FF00-FFFF and DAT memory at FFF0-FFFF (write only) is guaranteed always*/
static ADDRESS_MAP_START(mp09_mem, AS_PROGRAM, 8, swtpc09_state)
AM_RANGE(0x0000, 0x0fff) AM_DEVICE("bank0", address_map_bank_device, amap8)
AM_RANGE(0x1000, 0x1fff) AM_DEVICE("bank1", address_map_bank_device, amap8)
AM_RANGE(0x2000, 0x2fff) AM_DEVICE("bank2", address_map_bank_device, amap8)
AM_RANGE(0x3000, 0x3fff) AM_DEVICE("bank3", address_map_bank_device, amap8)
AM_RANGE(0x4000, 0x4fff) AM_DEVICE("bank4", address_map_bank_device, amap8)
AM_RANGE(0x5000, 0x5fff) AM_DEVICE("bank5", address_map_bank_device, amap8)
AM_RANGE(0x6000, 0x6fff) AM_DEVICE("bank6", address_map_bank_device, amap8)
AM_RANGE(0x7000, 0x7fff) AM_DEVICE("bank7", address_map_bank_device, amap8)
AM_RANGE(0x8000, 0x8fff) AM_DEVICE("bank8", address_map_bank_device, amap8)
AM_RANGE(0x9000, 0x9fff) AM_DEVICE("bank9", address_map_bank_device, amap8)
AM_RANGE(0xa000, 0xafff) AM_DEVICE("banka", address_map_bank_device, amap8)
AM_RANGE(0xb000, 0xbfff) AM_DEVICE("bankb", address_map_bank_device, amap8)
AM_RANGE(0xc000, 0xcfff) AM_DEVICE("bankc", address_map_bank_device, amap8)
AM_RANGE(0xd000, 0xdfff) AM_DEVICE("bankd", address_map_bank_device, amap8)
AM_RANGE(0xe000, 0xefff) AM_DEVICE("banke", address_map_bank_device, amap8)
AM_RANGE(0xf000, 0xfeff) AM_DEVICE("bankf", address_map_bank_device, amap8)
AM_RANGE(0xff00, 0xffef) AM_ROM
AM_RANGE(0xfff0, 0xffff) AM_ROM AM_WRITE(dat_w)
AM_RANGE(0x0000, 0xffef) AM_READWRITE(main_r, main_w)
AM_RANGE(0xff00, 0xffff) AM_ROM AM_REGION("maincpu", 0xff00)
AM_RANGE(0xff00, 0xff0f) AM_MIRROR(0xf0) AM_WRITEONLY AM_SHARE("dat")
ADDRESS_MAP_END
static ADDRESS_MAP_START(flex_dmf2_mem, AS_PROGRAM, 8, swtpc09_state)
@ -183,101 +168,10 @@ static MACHINE_CONFIG_START( swtpc09_base )
MCFG_CPU_ADD("maincpu", M6809, 1000000)
MCFG_CPU_PROGRAM_MAP(mp09_mem)
MCFG_DEVICE_ADD("bank0", ADDRESS_MAP_BANK, 0)
MCFG_DEVICE_ADD("bankdev", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bank1", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bank2", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bank3", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bank4", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bank5", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bank6", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bank7", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bank8", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bank9", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("banka", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bankb", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bankc", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bankd", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("banke", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("bankf", ADDRESS_MAP_BANK, 0)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_BIG)
MCFG_ADDRESS_MAP_BANK_DATA_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_ADDR_WIDTH(20)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x01000)
MCFG_DEVICE_PROGRAM_MAP(flex_dmf2_mem)
MCFG_DEVICE_ADD("pia", PIA6821, 0)
@ -319,37 +213,7 @@ MACHINE_CONFIG_END
/* MPU09, MPID, MPS2 DC4 PIAIDE*/
static MACHINE_CONFIG_DERIVED( swtpc09i, swtpc09_base )
MCFG_DEVICE_MODIFY("bank0")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bank1")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bank2")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bank3")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bank4")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bank5")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bank6")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bank7")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bank8")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bank9")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("banka")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bankb")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bankc")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bankd")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("banke")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_MODIFY("bankf")
MCFG_DEVICE_MODIFY("bankdev")
MCFG_DEVICE_PROGRAM_MAP(flex_dc4_piaide_mem)
MCFG_DEVICE_ADD("piaide", PIA6821, 0)
@ -364,37 +228,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( swtpc09u, swtpc09 )
MCFG_DEVICE_MODIFY("bank0")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bank1")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bank2")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bank3")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bank4")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bank5")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bank6")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bank7")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bank8")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bank9")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("banka")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bankb")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bankc")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bankd")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("banke")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MCFG_DEVICE_MODIFY("bankf")
MCFG_DEVICE_MODIFY("bankdev")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf2_mem)
MACHINE_CONFIG_END
@ -407,37 +241,7 @@ static MACHINE_CONFIG_DERIVED( swtpc09d3, swtpc09_base )
MCFG_DEVICE_MODIFY("pia")
MCFG_DEVICE_CLOCK(2000000)
MCFG_DEVICE_MODIFY("bank0")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bank1")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bank2")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bank3")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bank4")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bank5")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bank6")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bank7")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bank8")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bank9")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("banka")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bankb")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bankc")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bankd")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("banke")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
MCFG_DEVICE_MODIFY("bankf")
MCFG_DEVICE_MODIFY("bankdev")
MCFG_DEVICE_PROGRAM_MAP(uniflex_dmf3_mem)
/* video hardware */

10
src/mame/includes/swtpc09.h
View File

@ -34,7 +34,6 @@ public:
swtpc09_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_maincpu(*this, "maincpu")
, m_bank(*this, "bank%x", 0)
, m_brg(*this, "brg")
, m_pia(*this, "pia")
, m_ptm(*this, "ptm")
@ -48,6 +47,7 @@ public:
, m_piaide(*this, "piaide")
, m_harddisk(*this, "harddisk")
, m_ide(*this, "ide")
, m_dat(*this, "dat")
{ }
DECLARE_FLOPPY_FORMATS(floppy_formats);
@ -88,6 +88,8 @@ public:
DECLARE_WRITE8_MEMBER ( dc4_control_reg_w );
DECLARE_WRITE8_MEMBER(dat_w);
DECLARE_READ8_MEMBER(main_r);
DECLARE_WRITE8_MEMBER(main_w);
DECLARE_DRIVER_INIT( swtpc09 );
DECLARE_DRIVER_INIT( swtpc09i );
@ -103,8 +105,9 @@ protected:
void swtpc09_fdc_dma_transfer();
void swtpc09_irq_handler(uint8_t peripheral, uint8_t state);
offs_t dat_translate(offs_t offset) const;
required_device<cpu_device> m_maincpu;
required_device_array<address_map_bank_device, 16> m_bank;
required_device<mc14411_device> m_brg;
required_device<pia6821_device> m_pia;
required_device<ptm6840_device> m_ptm;
@ -118,6 +121,7 @@ protected:
optional_device<pia6821_device> m_piaide;
optional_device<device_t> m_harddisk;
optional_device<ide_controller_device> m_ide;
required_shared_ptr<uint8_t> m_dat;
uint8_t m_term_data; // terminal keyboard value
uint8_t m_pia_counter; // this is the counter on pia porta
@ -131,6 +135,8 @@ protected:
uint8_t m_active_interrupt;
uint8_t m_interrupt;
address_space *m_banked_space;
// TODO: move this in proper device
/* channel_data structure holds info about each 6844 DMA channel */

24
src/mame/machine/swtpc09.cpp
View File

@ -151,7 +151,7 @@ WRITE8_MEMBER ( swtpc09_state::dmf2_control_reg_w )
void swtpc09_state::swtpc09_fdc_dma_transfer()
{
uint32_t offset;
address_space &space = m_bank[0]->space(AS_PROGRAM);
address_space &space = *m_banked_space;
offset = (m_fdc_dma_address_reg & 0x0f)<<16;
@ -452,18 +452,20 @@ WRITE8_MEMBER( swtpc09_state::piaide_b_w )
/* memory map is created based on system_type flag */
/* this is accommodate the different cards installed */
WRITE8_MEMBER(swtpc09_state::dat_w)
offs_t swtpc09_state::dat_translate(offs_t offset) const
{
uint8_t a16_to_a19, a12_to_a15;
uint32_t physical_address, logical_address;
// lower 4 bits are inverted
return offs_t(m_dat[offset >> 12] ^ 0x0f) << 12 | (offset & 0x0fff);
}
a16_to_a19 = data & 0xf0;
a12_to_a15 = ~data & 0x0f; //lower 4 bits are inverted
physical_address = ((a16_to_a19 + a12_to_a15) << 12);
logical_address = offset << 12;
LOG(("swtpc09_dat_bank_set dat:%02X Logical address:%04X Physical address:%05X\n", data, offset << 12, physical_address ));
READ8_MEMBER(swtpc09_state::main_r)
{
return m_banked_space->read_byte(dat_translate(offset));
}
m_bank[logical_address >> 12]->set_bank(physical_address >> 12);
WRITE8_MEMBER(swtpc09_state::main_w)
{
m_banked_space->write_byte(dat_translate(offset), data);
}
/* MC6844 DMA controller I/O */
@ -678,6 +680,8 @@ void swtpc09_state::machine_start()
m_m6844_interrupt = 0x00;
m_m6844_chain = 0x00;
m_banked_space = &subdevice<address_map_bank_device>("bankdev")->space(AS_PROGRAM);
m_brg->rsa_w(0);
m_brg->rsb_w(1);
}