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sm510: made KB1013VK12 device a clone of SM5A (nw)

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This commit is contained in:
hap 2017-06-23 00:33:49 +02:00
parent aa191bfe6b
commit bca24133da
11 changed files with 142 additions and 144 deletions
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6
scripts/src/cpu.lua
View File

@ -1765,7 +1765,7 @@ end
if (CPUS["SM510"]~=null) then
files {
MAME_DIR .. "src/devices/cpu/sm510/sm510.cpp",
MAME_DIR .. "src/devices/cpu/sm510/sm510base.cpp",
MAME_DIR .. "src/devices/cpu/sm510/sm510.h",
MAME_DIR .. "src/devices/cpu/sm510/sm510op.cpp",
MAME_DIR .. "src/devices/cpu/sm510/sm510core.cpp",
@ -1773,9 +1773,7 @@ if (CPUS["SM510"]~=null) then
MAME_DIR .. "src/devices/cpu/sm510/sm500.h",
MAME_DIR .. "src/devices/cpu/sm510/sm500op.cpp",
MAME_DIR .. "src/devices/cpu/sm510/sm500core.cpp",
MAME_DIR .. "src/devices/cpu/sm510/kb1013vk1-2.h",
MAME_DIR .. "src/devices/cpu/sm510/kb1013vk1-2op.cpp",
MAME_DIR .. "src/devices/cpu/sm510/kb1013vk1-2core.cpp",
MAME_DIR .. "src/devices/cpu/sm510/sm5acore.cpp",
MAME_DIR .. "src/devices/cpu/sm510/sm590.h",
MAME_DIR .. "src/devices/cpu/sm510/sm590op.cpp",
MAME_DIR .. "src/devices/cpu/sm510/sm590core.cpp",

38
src/devices/cpu/sm510/kb1013vk1-2.h
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@ -1,38 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:hap, Igor
/*
KB1013VK1-2
*/
#ifndef MAME_CPU_SM510_KB1013VK1_2_H
#define MAME_CPU_SM510_KB1013VK1_2_H
#pragma once
#include "sm500.h"
// I/O ports setup
// ..
class kb1013vk12_device : public sm500_device
{
public:
kb1013vk12_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
virtual void execute_one() override;
// opcode handlers
virtual void op_bs0();
virtual void op_bs1();
};
DECLARE_DEVICE_TYPE(KB1013VK12, kb1013vk12_device)
#endif // MAME_CPU_SM510_KB1013VK1_2_H

22
src/devices/cpu/sm510/kb1013vk1-2op.cpp
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@ -1,22 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:hap, Igor
// KB1013VK1-2 opcode handlers
#include "emu.h"
#include "kb1013vk1-2.h"
// instruction set
void kb1013vk12_device::op_bs0()
{
// BS0: reset RAM address high bit
m_bm &= ~4;
}
void kb1013vk12_device::op_bs1()
{
// BS1: set RAM address high bit
m_bm |= 4;
}

61
src/devices/cpu/sm510/sm500.h
View File

@ -32,17 +32,42 @@ O13 38 | | 23 OS3
O44 39 | | 22 OS4
O34 40 | | 21 H1
O24 41 | | 20 H2
O14 42 | SM500 | 19 VM
O14 42 | SM500 | 19 Vm
O45 43 | | 18 OSCin
O35 44 | | 17 OSCout
O25 45 | | 16 VDD
O25 45 | | 16 Vdd
O15 46 | | 15 K4
O46 47 | | 14 K3
O36 48 | * | 13 K2
|________________________________________________/
1 2 3 4 5 6 7 8 9 10 11 12
1 2 3 4 5 6 7 8 9 10 11 12
O26 O16 R4 R3 R2 R1 GND _T bt al ACL K1 note: bt = beta symbol, al = alpha symbol
OS2 OS3 OS4 K4 K3 K2 K1 GND al bt ACL _R1 _Tp NC NC note: on SM5L, pin 31=V1, 32=V2, 33=NC
45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
____________________________________________________________
| |
OS1 46 | | 30 H1
O41 47 | | 29 H2
O31 48 | | 28 Vm
O21 49 | | 27 Vdd
O11 50 | | 26 _R2
O42 51 | | 25 _R3
O32 52 | SM5A | 24 _R4
O22 53 | SM5L | 23 OSCin
O12 54 | | 22 OSCout
O43 55 | | 21 _T2
O33 56 | | 20 _T1
O23 57 | | 19 O18
O13 58 | | 18 O28
O44 59 | | 17 O38
O34 60 | * | 16 O48
|____________________________________________________________/
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
O24 O14 O45 O35 O25 O15 O46 GND O36 O26 O16 O47 O37 O27 O17
*/
class sm500_device : public sm510_base_device
@ -60,6 +85,8 @@ protected:
// opcode handlers
virtual void op_lb() override;
virtual void op_incb() override;
virtual void op_sbm() override;
virtual void op_rbm();
virtual void op_comcb();
virtual void op_ssr();
@ -79,6 +106,34 @@ protected:
};
class sm5a_device : public sm500_device
{
public:
sm5a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
sm5a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options) override;
virtual void execute_one() override;
};
class sm5l_device : public sm5a_device
{
public:
sm5l_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class kb1013vk12_device : public sm5a_device
{
public:
kb1013vk12_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
DECLARE_DEVICE_TYPE(SM500, sm500_device)
DECLARE_DEVICE_TYPE(SM5A, sm5a_device)
DECLARE_DEVICE_TYPE(SM5L, sm5l_device)
DECLARE_DEVICE_TYPE(KB1013VK12, kb1013vk12_device)
#endif // MAME_CPU_SM510_SM500_H

16
src/devices/cpu/sm510/sm500op.cpp
View File

@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:hap
// copyright-holders:hap, Igor
// SM500 opcode handlers
// SM500 shared opcode handlers
#include "emu.h"
#include "sm500.h"
@ -26,6 +26,18 @@ void sm500_device::op_incb()
m_skip = (m_bl == 8);
}
void sm500_device::op_sbm()
{
// SBM: set RAM address high bit
m_bm |= 4;
}
void sm500_device::op_rbm()
{
// RBM: reset RAM address high bit
m_bm &= ~4;
}
// ROM address instructions

10
src/devices/cpu/sm510/sm510.cpp → src/devices/cpu/sm510/sm510base.cpp
View File

@ -2,20 +2,18 @@
// copyright-holders:hap
/*
Known chips: (* means not emulated yet)
Supported chips: (* means not finished emulated yet)
Sharp SM510 MCU family:
- SM510: 2.7Kx8 ROM, 128x4 RAM(32x4 for LCD)
- SM511: 4Kx8 ROM, 128x4 RAM(32x4 for LCD), melody controller
- SM512: 4Kx8 ROM, 128x4 RAM(48x4 for LCD), melody controller
- *KB1013VK4-2: Soviet-era clone of SM510, minor differences
Sharp SM500 MCU family:
- *SM500: x
- *SM4A: x
- *SM530: x
- *SM531: x
- *KB1013VK1-2: Soviet-era clone of SM500, minor differences
- *SM5A: x
- *SM5L: low-power version of SM5A
- *KB1013VK1-2: Soviet-era clone of SM5A
Sharp SM590 MCU family:
- *SM590: 512x8 ROM, 32x4 RAM

88
src/devices/cpu/sm510/sm510d.cpp
View File

@ -27,21 +27,15 @@ enum e_mnemonics
mPRE, mSME, mRME, mTMEL,
mSKIP, mCEND, mIDIV, mDR, mDTA, mCLKLO, mCLKHI,
// SM500-specific
mCOMCB, mRTN, mRTNS, mSSR, mTR, mTRS,
// SM500 common
mCOMCB, mRTN, mRTNS, mSSR, mTR, mTRS, mRBM,
mADDC, mPDTW, mTW, mDTW,
mATS, mEXKSA, mEXKFA,
mRMF, mSMF, mCOMCN,
mTA, mTM2, mTG,
// KB1013VK1-2 aliases
mLC, mLM, mLE, mLAF, mLAS, mLDF, mBS0, mBS1, mXL, mXM, mXI, mXEI, mXD, mXED, mXE, mBM0, mBM1, mSM1,
mAM, mAC, mA10, mAS, mCLL, mCOM, mCLC, mSTC, mSCO, mSAO, mINC, mDEC, mSAM, mSAL, mNOP,
mICD, mOAR, mOA0, mOA1, mDAF, mDAS, mABS, mABF, mCTB, mLD0, mEN,
mBR, mLP, mCBR, mCMS, mRT, mRTS, mSI1, mSI0, mSYN, mTIM, mHLT,
// SM590 aliases
mCCTRL, mINBL, mDEBL, mXBLA, mADCS, mTR7,
mNOP, mCCTRL, mINBL, mDEBL, mXBLA, mADCS, mTR7,
// SM590 uniques
mTAX, mLBLX, mMTR, mSTR, mINBM, mDEBM, mRTA, mBLTA, mEXAX, mTBA, mADS, mADC, mLBMX, mTLS
};
@ -60,20 +54,14 @@ static const char *const s_mnemonics[] =
"SKIP", "CEND", "IDIV", "DR", "DTA", "CLKLO", "CLKHI",
//
"COMCB", "RTN", "RTNS", "SSR", "TR", "TRS",
"COMCB", "RTN", "RTNS", "SSR", "TR", "TRS", "RBM",
"ADDC", "PDTW", "TW", "DTW",
"ATS", "EXKSA", "EXKFA",
"RMF", "SMF", "COMCN",
"TA", "TM", "TG",
//
"LC", "LM", "LE", "LAF", "LAS", "LDF", "BS0", "BS1", "XL", "XM", "XI", "XEI", "XD", "XED", "XE", "BM0", "BM1", "SM1",
"AM", "AC", "A10", "AS", "CLL", "COM", "CLC", "STC", "SCO", "SAO", "INC", "DEC", "SAM", "SAL", "NOP",
"ICD", "OAR", "OA0", "OA1", "DAF", "DAS", "ABS", "ABF", "CTB", "LD0", "EN",
"BR", "LP", "CBR", "CMS", "RT", "RTS", "SI1", "SI0", "SYN", "TIM", "HLT",
//
"CCTRL", "INBL", "DEBL", "XBLA", "ADCS", "TR",
"NOP", "CCTRL", "INBL", "DEBL", "XBLA", "ADCS", "TR",
//
"TAX", "LBLX", "MTR", "STR", "INBM", "DEBM", "RTA", "BLTA", "EXAX", "TBA", "ADS", "ADC", "LBMX", "TLS"
};
@ -93,20 +81,14 @@ static const u8 s_bits[] =
0, 0, 0, 0, 0, 0, 0,
//
0, 0, 0, 4, 6, 6,
0, 0, 0, 4, 6, 6, 0,
0, 0, 0, 0,
0, 0, 0,
0, 0, 0,
0, 2, 0,
//
4, 0, 2, 8, 4, 0, 0, 0, 0, 0, 0, 2, 0, 2, 2, 2, 2, 2,
0, 0, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
6, 4, 6, 0, 0, 0, 0, 0, 0, 0, 0,
//
0, 0, 0, 0, 0, 7,
0, 0, 0, 0, 0, 0, 7,
//
4, 4, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 2+8
};
@ -128,20 +110,14 @@ static const u32 s_flags[] =
0, _OVER, 0, 0, 0, 0, 0,
//
0, _OUT, _OUT, 0, 0, _OVER,
0, _OUT, _OUT, 0, 0, _OVER, 0,
0, 0, 0, 0,
0, 0, 0,
0, 0, 0,
0, 0, 0,
//
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, _OVER, 0, _OUT, _OUT, 0, 0, 0, 0, _OVER,
//
0, 0, 0, 0, 0, _OVER,
0, 0, 0, 0, 0, 0, _OVER,
//
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, _OVER
};
@ -342,45 +318,45 @@ CPU_DISASSEMBLE(sm500)
}
// KB1013VK1-2 disasm
// SM5A disasm
static const u8 kb1013vk12_mnemonic[0x100] =
static const u8 sm5a_mnemonic[0x100] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
mNOP, mOAR, mBS1, mEN, mBM0, mBM0, mBM0, mBM0, mAM, mAC, mCOM, mXL, mBM1, mBM1, mBM1, mBM1, // 0
mXM, mXE, mXE, mXE, mXI, mXEI, mXEI, mXEI, mLE, mLE, mLE, mLDA, mXD, mXED, mXED, mXED, // 1
mLC, mLC, mLC, mLC, mLC, mLC, mLC, mLC, mLC, mLC, mLC, mLC, mLC, mLC, mLC, mLC, // 2
mAS, mAS, mAS, mAS, mAS, mAS, mAS, mAS, mAS, mAS, mA10, mAS, mAS, mAS, mAS, mAS, // 3
mSKIP, mATR, mSBM, mATBP, mRM, mRM, mRM, mRM, mADD, mADDC, mCOMA, mEXBLA,mSM, mSM, mSM, mSM, // 0
mEXC, mEXC, mEXC, mEXC, mEXCI, mEXCI, mEXCI, mEXCI, mLDA, mLDA, mLDA, mLDA, mEXCD, mEXCD, mEXCD, mEXCD, // 1
mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, mLAX, // 2
mADX, mADX, mADX, mADX, mADX, mADX, mADX, mADX, mADX, mADX, mADX, mADX, mADX, mADX, mADX, mADX, // 3
mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, mLAS, // 4
mSI1, mSI0, mSCO, mSAM, mSM1, mSM1, mSM1, mSM1, mTIM, mABS, mSAO, mSAL, mABF, mDAF, mEXT, mLAF, // 5
mCTB, mDAS, mOA1, mOA0, mINC, mSYN, mCLC, mSTC, mCLL, mLD0, mICD, mBS0, mDEC, mCMS, mRT, mRTS, // 6
mLP, mLP, mLP, mLP, mLP, mLP, mLP, mLP, mLP, mLP, mLP, mLP, mLP, mLP, mLP, mLP, // 7
mLB, mLB, mLB, mLB, mLB, mLB, mLB, mLB, mLB, mLB, mLB, mLB, mLB, mLB, mLB, mLB, // 4
mTA, mTB, mTC, mTAM, mTM2, mTM2, mTM2, mTM2, mTG, mPTW, mTA0, mTABL, mTW, mDTW, mEXT, mLBL, // 5
mCOMCN,mPDTW, mWR, mWS, mINCB, mIDIV, mRC, mSC, mRMF, mSMF, mKTA, mRBM, mDECB, mCOMCB,mRTN, mRTNS, // 6
mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, mSSR, // 7
mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, // 8
mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, // 9
mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, // A
mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, // B
mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, // 8
mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, // 9
mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, // A
mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, mTR, // B
mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, // C
mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, // D
mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, // E
mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR, mCBR // F
mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, // C
mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, // D
mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, // E
mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS, mTRS // F
};
static const u8 kb1013vk12_extended[0x10] =
static const u8 sm5a_extended[0x10] =
{
mHLT, 0, 0, 0, mLDF, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 // 5E 0
mCEND, 0, 0, 0, mDTA, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 // 5E 0
};
CPU_DISASSEMBLE(kb1013vk12)
CPU_DISASSEMBLE(sm5a)
{
// create extended opcode table
u8 ext[0x100];
memset(ext, 0, 0x100);
memcpy(ext + 0x00, kb1013vk12_extended, 0x10);
memcpy(ext + 0x00, sm5a_extended, 0x10);
return sm510_common_disasm(kb1013vk12_mnemonic, ext, stream, pc, oprom, opram, 6);
return sm510_common_disasm(sm5a_mnemonic, ext, stream, pc, oprom, opram, 6);
}

2
src/devices/cpu/sm510/sm510op.cpp
View File

@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:hap
// shared opcode handlers
// SM510 shared opcode handlers
#include "emu.h"
#include "sm510.h"

37
src/devices/cpu/sm510/kb1013vk1-2core.cpp → src/devices/cpu/sm510/sm5acore.cpp
View File

@ -2,15 +2,18 @@
// copyright-holders:hap, Igor
/*
KB1013VK1-2 MCU core implementation
Sharp SM5A MCU core implementation
*/
#include "emu.h"
#include "kb1013vk1-2.h"
#include "sm500.h"
#include "debugger.h"
// MCU types
DEFINE_DEVICE_TYPE(SM5A, sm5a_device, "sm5a", "SM5A")
DEFINE_DEVICE_TYPE(SM5L, sm5l_device, "sm5l", "SM5L")
DEFINE_DEVICE_TYPE(KB1013VK12, kb1013vk12_device, "kb1013vk1_2", "KB1013VK1-2")
@ -28,18 +31,34 @@ static ADDRESS_MAP_START(data_5x13x4, AS_DATA, 8, sm510_base_device)
AM_RANGE(0x40, 0x4c) AM_RAM
ADDRESS_MAP_END
// device definitions
sm5a_device::sm5a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: sm5a_device(mconfig, SM5A, tag, owner, clock, 1 /* stack levels */, 11 /* prg width */, ADDRESS_MAP_NAME(program_1_8k), 7 /* data width */, ADDRESS_MAP_NAME(data_5x13x4))
{
}
sm5a_device::sm5a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data)
: sm500_device(mconfig, type, tag, owner, clock, stack_levels, prgwidth, program, datawidth, data)
{
}
sm5l_device::sm5l_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: sm5a_device(mconfig, SM5L, tag, owner, clock, 1, 11, ADDRESS_MAP_NAME(program_1_8k), 7, ADDRESS_MAP_NAME(data_5x13x4))
{
}
kb1013vk12_device::kb1013vk12_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: sm500_device(mconfig, KB1013VK12, tag, owner, clock, 1 /* stack levels */, 11 /* prg width */, ADDRESS_MAP_NAME(program_1_8k), 7 /* data width */, ADDRESS_MAP_NAME(data_5x13x4))
: sm5a_device(mconfig, SM5L, tag, owner, clock, 1, 11, ADDRESS_MAP_NAME(program_1_8k), 7, ADDRESS_MAP_NAME(data_5x13x4))
{
}
// disasm
offs_t kb1013vk12_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)
offs_t sm5a_device::disasm_disassemble(std::ostream &stream, offs_t pc, const u8 *oprom, const u8 *opram, u32 options)
{
extern CPU_DISASSEMBLE(kb1013vk12);
return CPU_DISASSEMBLE_NAME(kb1013vk12)(this, stream, pc, oprom, opram, options);
extern CPU_DISASSEMBLE(sm5a);
return CPU_DISASSEMBLE_NAME(sm5a)(this, stream, pc, oprom, opram, options);
}
@ -48,7 +67,7 @@ offs_t kb1013vk12_device::disasm_disassemble(std::ostream &stream, offs_t pc, co
// execute
//-------------------------------------------------
void kb1013vk12_device::execute_one()
void sm5a_device::execute_one()
{
switch (m_op & 0xf0)
{
@ -78,7 +97,7 @@ void kb1013vk12_device::execute_one()
{
case 0x00: op_skip(); break; // NOP
case 0x01: op_atr(); break; // OAR
case 0x02: op_bs1(); break; // *BS1
case 0x02: op_sbm(); break; // *BS1
case 0x03: op_atbp(); break;
case 0x08: op_add(); break; // AM
case 0x09: op_add11(); break; // AC
@ -108,7 +127,7 @@ void kb1013vk12_device::execute_one()
case 0x68: op_rmf(); break; // CLL
case 0x69: op_smf(); break; // LD0
case 0x6a: op_kta(); break; // ICD
case 0x6b: op_bs0(); break; // *BS0
case 0x6b: op_rbm(); break; // *BS0
case 0x6c: op_decb(); break; // DEC
case 0x6d: op_comcb(); break; // CMS
case 0x6e: op_rtn0(); break; // RT

2
src/mame/drivers/hh_sm500.cpp
View File

@ -11,7 +11,7 @@
#include "emu.h"
#include "cpu/sm510/kb1013vk1-2.h"
#include "cpu/sm510/sm500.h"
#include "sound/spkrdev.h"
#include "screen.h"

4
src/tools/unidasm.cpp
View File

@ -122,7 +122,6 @@ CPU_DISASSEMBLE( i960 );
CPU_DISASSEMBLE( ie15 );
CPU_DISASSEMBLE( jaguardsp );
CPU_DISASSEMBLE( jaguargpu );
CPU_DISASSEMBLE( kb1013vk12 );
CPU_DISASSEMBLE( konami );
CPU_DISASSEMBLE( lh5801 );
CPU_DISASSEMBLE( lr35902 );
@ -177,6 +176,7 @@ CPU_DISASSEMBLE( sharc );
CPU_DISASSEMBLE( sm500 );
CPU_DISASSEMBLE( sm510 );
CPU_DISASSEMBLE( sm511 );
CPU_DISASSEMBLE( sm5a );
CPU_DISASSEMBLE( sm8500 );
CPU_DISASSEMBLE( spc700 );
CPU_DISASSEMBLE( ssem );
@ -296,7 +296,6 @@ static const dasm_table_entry dasm_table[] =
{ "ie15", _8bit, 0, CPU_DISASSEMBLE_NAME(ie15) },
{ "jaguardsp", _16be, 0, CPU_DISASSEMBLE_NAME(jaguardsp) },
{ "jaguargpu", _16be, 0, CPU_DISASSEMBLE_NAME(jaguargpu) },
{ "kb1013vk12", _8bit, 0, CPU_DISASSEMBLE_NAME(kb1013vk12) },
{ "konami", _8bit, 0, CPU_DISASSEMBLE_NAME(konami) },
{ "lh5801", _8bit, 0, CPU_DISASSEMBLE_NAME(lh5801) },
{ "lr35902", _8bit, 0, CPU_DISASSEMBLE_NAME(lr35902) },
@ -351,6 +350,7 @@ static const dasm_table_entry dasm_table[] =
{ "sm500", _8bit, 0, CPU_DISASSEMBLE_NAME(sm500) },
{ "sm510", _8bit, 0, CPU_DISASSEMBLE_NAME(sm510) },
{ "sm511", _8bit, 0, CPU_DISASSEMBLE_NAME(sm511) },
{ "sm5a", _8bit, 0, CPU_DISASSEMBLE_NAME(sm5a) },
{ "sm8500", _8bit, 0, CPU_DISASSEMBLE_NAME(sm8500) },
{ "sparcv7", _32be, 0, CPU_DISASSEMBLE_NAME(sparcv7) },
{ "sparcv8", _32be, 0, CPU_DISASSEMBLE_NAME(sparcv8) },