mirror of
https://github.com/holub/mame
synced 2025-10-04 16:34:53 +03:00
Cleanups and version bump to 0.122u4.
This commit is contained in:
parent
ae478066d7
commit
bce2fa84b4
@ -233,7 +233,7 @@ static int mips3_execute(int cycles)
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if (mips3.cache_dirty)
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drc_cache_reset(mips3.drc);
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mips3.cache_dirty = FALSE;
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/* execute */
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mips3.core->icount = cycles;
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drc_execute(mips3.drc);
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@ -956,7 +956,7 @@ input_code input_code_poll_switches(int reset)
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/*-------------------------------------------------
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input_code_poll_keyboard_switches - poll for
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input_code_poll_keyboard_switches - poll for
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any keyboard-specific input
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-------------------------------------------------*/
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@ -793,7 +793,7 @@ logerror("6522VIA chip %d: PCR = %02X. PC: %08X\n", which, data, safe_activecpu
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//if (v->ddr_b)
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{
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UINT8 write_data = (v->out_b & v->ddr_b) | (v->ddr_b ^ 0xff);
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if (v->intf->out_b_func)
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v->intf->out_b_func(0, write_data);
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else
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@ -8,15 +8,15 @@
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- architecture copied from 8257 DMA
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- significant changes to implementation
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- This is only a minimum implementation to support dkong3 and mario drivers
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- Only memory to memory is tested!
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- This is only a minimum implementation to support dkong3 and mario drivers
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- Only memory to memory is tested!
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TODO:
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- implement missing features
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- implement interrupt support (not used in dkong3 and mario)
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- implement more asserts
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- implement a INPUT_LINE_BUSREQ for Z80. As a workaround,
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HALT is used. This implies burst mode.
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- implement missing features
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- implement interrupt support (not used in dkong3 and mario)
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- implement more asserts
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- implement a INPUT_LINE_BUSREQ for Z80. As a workaround,
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HALT is used. This implies burst mode.
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**********************************************************************/
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@ -102,7 +102,7 @@ struct z80dma
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UINT16 count;
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UINT8 rdy;
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UINT8 is_read;
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UINT8 cur_cycle;
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UINT8 latch;
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@ -127,7 +127,7 @@ int z80dma_init(int count)
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for (which = 0; which < dma_count; which++)
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{
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dma[which].timer = timer_alloc(z80dma_timerproc, NULL);
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state_save_register_item_array("Z80DMA", which, dma[which].regs);
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state_save_register_item_array("Z80DMA", which, dma[which].regs_follow);
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@ -143,7 +143,7 @@ int z80dma_init(int count)
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state_save_register_item("Z80DMA", which, dma[which].is_read);
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state_save_register_item("Z80DMA", which, dma[which].cur_cycle);
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state_save_register_item("Z80DMA", which, dma[which].latch);
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}
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return 0;
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@ -201,7 +201,7 @@ static void z80dma_do_read(int which)
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cntx->addressB += PORTB_STEP(cntx);
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}
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break;
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default:
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fatalerror("z80dma_do_operation: invalid mode %d!\n", mode);
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break;
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@ -240,7 +240,7 @@ static int z80dma_do_write(int which)
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cntx->count--;
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done = (cntx->count == 0xFFFF);
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break;
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default:
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fatalerror("z80dma_do_operation: invalid mode %d!\n", mode);
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break;
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@ -417,7 +417,7 @@ static void z80dma_write(int which, offs_t offset, UINT8 data)
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default:
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fatalerror("Unknown WR6 command %02x", data);
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}
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}
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}
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else
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fatalerror("Unknown base register %02x", data);
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cntx->cur_follow = 0;
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@ -966,7 +966,7 @@ INLINE INT32 SCSP_UpdateSlot(struct _SCSP *SCSP, struct _SLOT *slot)
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smp>>=0x1A-MDL(slot); // ex. for MDL=0xF, sample range corresponds to +/- 64 pi (32=2^5 cycles) so shift by 11 (16-5 == 0x1A-0xF)
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while(smp<0) smp+=cycle; smp%=cycle; // keep modulation sampler within a single cycle
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if(!PCM8B(slot)) smp<<=1;
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addr1+=smp; addr2+=smp;
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}
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@ -1105,7 +1105,7 @@ static void SCSP_DoMasterSamples(struct _SCSP *SCSP, int nsamples)
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smpr+=(sample*SCSP->RPANTABLE[Enc])>>SHIFT;
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}
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}
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#if FM_DELAY
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SCSP->RINGBUF[(SCSP->BUFPTR+64-(FM_DELAY-1))&63] = SCSP->DELAYBUF[(SCSP->DELAYPTR+FM_DELAY-(FM_DELAY-1))%FM_DELAY];
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#endif
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@ -252,7 +252,7 @@ typedef struct {
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UINT8 address; /* address register */
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UINT8 status; /* status flag */
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int index; /* index */
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int index; /* index */
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int clock; /* master clock (Hz) */
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int rate; /* sampling rate (Hz) */
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double freqbase; /* frequency base */
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@ -1262,24 +1262,24 @@ static void OPLL_init_save(YM2413 *chip)
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state_save_register_item_2d_array("ym2413", chipitem, chip->inst_tab);
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state_save_register_item("ym2413", chipitem, chip->address);
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state_save_register_item("ym2413", chipitem, chip->status);
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for (chnum = 0; chnum < ARRAY_LENGTH(chip->P_CH); chnum++)
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{
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OPLL_CH *ch = &chip->P_CH[chnum];
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int chitem = chipitem + (chnum + 1) * 10;
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int slotnum;
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state_save_register_item("ym2413", chitem, ch->block_fnum);
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state_save_register_item("ym2413", chitem, ch->fc);
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state_save_register_item("ym2413", chitem, ch->ksl_base);
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state_save_register_item("ym2413", chitem, ch->kcode);
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state_save_register_item("ym2413", chitem, ch->sus);
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for (slotnum = 0; slotnum < ARRAY_LENGTH(ch->SLOT); slotnum++)
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{
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OPLL_SLOT *sl = &ch->SLOT[slotnum];
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int slitem = chitem + (slotnum + 1);
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state_save_register_item("ym2413", slitem, sl->ar);
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state_save_register_item("ym2413", slitem, sl->dr);
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state_save_register_item("ym2413", slitem, sl->rr);
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@ -260,7 +260,7 @@ void sfx_sh_init(void)
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ROMA: BIT1: Hypersoni ?
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ROMA: BIT2: Two thousand eighty three
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ROMA: BIT4: Atomic City Attack
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ROMA: BIT4: Atomic City Attack
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ROMA: BIT5: Thank you, please try again
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ROMA: BIT6: Two, one, fire
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ROMA: BIT7: Hyperjump
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@ -270,9 +270,9 @@ void sfx_sh_init(void)
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ROMB: BIT5: Noise (Explosion ?)
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ROMB: BIT6: Keep going pressing
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ROMB: BIT7: You are the new champion
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The circuit consist of
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The circuit consist of
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2x 2532 32Kbit roms
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2x 74LS393 quad 4bit counters to address roms
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1x 74LS174 hex-d-flipflops to latch control byte
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@ -282,27 +282,27 @@ void sfx_sh_init(void)
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==> 74LS139
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1x 74LS16 quad open collector inverters
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1x 74S288 32x8 Prom
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The prom obviously is used to provide the right timing when
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fetching data bits. This circuit should be comparable to bagman.
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Prom
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Q0 ==> NC
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Q1 ==> PDC
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Q2 ==> CTL2/CTL8 (Speak/Reset)
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Q7 ==> Reset Counters (LS393)
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Q8 ==> Trigger Logic
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Q0 ==> NC
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Q1 ==> PDC
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Q2 ==> CTL2/CTL8 (Speak/Reset)
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Q7 ==> Reset Counters (LS393)
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Q8 ==> Trigger Logic
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***************************************************************************/
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/*
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/*
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* Alt1 Alt2
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* 1 ==> C B Bit select
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* 2 ==> B C Bit select
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* 3 ==> A A Bit select
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* 4 ==> B1 Rom select
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* 5 ==> A1 Rom select
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*
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*
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* ALT1 ALT2
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* 321 CBA CBA
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* 000 000 000
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@ -313,10 +313,10 @@ void sfx_sh_init(void)
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* 101 101 011
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* 110 011 101
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* 111 111 111
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*
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*
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* Alt1 provides more sensible sound. Both Alt1 and Alt2 are
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* possible on PCB so Alt2 is left in for documentation.
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*
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*
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*/
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static UINT32 speech_rom_address;
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@ -326,13 +326,13 @@ static UINT8 speech_cnt;
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static TIMER_CALLBACK( ad2083_step )
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{
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/* only 16 bytes needed ... Stored here since
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* prom is a bad dump
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*/
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static const int prom[16] = {0x00, 0x00, 0x02, 0x00, 0x00, 0x02, 0x00, 0x00,
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/* only 16 bytes needed ... Stored here since
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* prom is a bad dump
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*/
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static const int prom[16] = {0x00, 0x00, 0x02, 0x00, 0x00, 0x02, 0x00, 0x00,
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0x02, 0x00, 0x40, 0x00, 0x04, 0x06, 0x04, 0x84 };
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UINT8 ctrl;
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if (param == 0)
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{
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if (speech_cnt < 0x10)
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@ -347,7 +347,7 @@ static TIMER_CALLBACK( ad2083_step )
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if (ctrl & 0x40)
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speech_rom_address = 0;
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tms5110_CTL_w(0, ctrl & 0x04 ? TMS5110_CMD_SPEAK : TMS5110_CMD_RESET);
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tms5110_PDC_w(0, ctrl & 0x02 ? 0 : 1);
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@ -364,7 +364,7 @@ static int ad2083_speech_rom_read_bit(void)
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bit = (ROM[speech_rom_address | speech_rom_address_hi] >> speech_rom_bit) & 1;
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speech_rom_address++;
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return bit;
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}
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@ -431,7 +431,7 @@ static SOUND_START( ad2083 )
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speech_rom_address_hi = 0;
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speech_rom_bit = 0;
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speech_cnt = 0x10;
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state_save_register_global(speech_rom_address);
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state_save_register_global(speech_rom_address_hi);
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state_save_register_global(speech_rom_bit);
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@ -439,22 +439,22 @@ static SOUND_START( ad2083 )
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}
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MACHINE_DRIVER_START( ad2083_audio )
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MDRV_CPU_ADD(Z80, 14318000/8) /* 1.78975 MHz */
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MDRV_CPU_PROGRAM_MAP(ad2083_sound_map,0)
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MDRV_CPU_IO_MAP(ad2083_sound_io_map,0)
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MDRV_SOUND_START(ad2083)
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MDRV_SPEAKER_STANDARD_MONO("mono")
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MDRV_SOUND_ADD(AY8910, 14318000/8)
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MDRV_SOUND_CONFIG(ad2083_ay8910_interface_1)
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MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.33)
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MDRV_SOUND_ADD(AY8910, 14318000/8)
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MDRV_SOUND_CONFIG(ad2083_ay8910_interface_2)
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MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.33)
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MDRV_SOUND_ADD(TMS5110, AD2083_TMS5110_CLOCK)
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MDRV_SOUND_CONFIG(ad2083_tms5110_interface)
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MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
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@ -638,9 +638,9 @@ static TIMER_CALLBACK( clear_irq_state )
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static READ8_HANDLER( adpcm_command_r )
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{
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cpunum_set_input_line(sound_cpunum, M6809_IRQ_LINE, CLEAR_LINE);
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/* don't clear the external IRQ state for a short while; this allows the
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self-tests to pass */
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self-tests to pass */
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timer_set(ATTOTIME_IN_USEC(10), NULL, 0, clear_irq_state);
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return soundlatch_r(0);
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}
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@ -187,7 +187,7 @@ static READ8_HANDLER( bking3_68705_portA_r )
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static WRITE8_HANDLER( bking3_68705_portA_w )
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{
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portA_out = data;
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// printf("portA_out = %02X\n",data);
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// printf("portA_out = %02X\n",data);
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}
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static WRITE8_HANDLER( bking3_68705_ddrA_w )
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@ -204,8 +204,8 @@ static READ8_HANDLER( bking3_68705_portB_r )
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static WRITE8_HANDLER( bking3_68705_portB_w )
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{
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// if(data != 0xff)
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// printf("portB_out = %02X\n",data);
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// if(data != 0xff)
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// printf("portB_out = %02X\n",data);
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if (~data & 0x02)
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{
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@ -597,7 +597,7 @@ static MACHINE_DRIVER_START( bking3 )
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MDRV_CPU_MODIFY("main_cpu")
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MDRV_CPU_IO_MAP(bking3_io_map,0)
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MDRV_CPU_ADD(M68705, XTAL_3MHz/M68705_CLOCK_DIVIDER) /* xtal is 3MHz, divided by 4 internally */
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MDRV_CPU_PROGRAM_MAP(m68705_map,0)
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@ -697,10 +697,10 @@ ROM_END
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Birdie King 3
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Taito, 1984
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A golf game using a trackball. Uses same harness/pinout as
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A golf game using a trackball. Uses same harness/pinout as
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Elevator Action, Victorious Nine, Jolly Jogger (etc)
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PCB Layouts
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PCB Layouts
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(Note! There are no PALs on ANY of the PCBs)
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Top PCB
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@ -769,8 +769,8 @@ Notes:
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T - 4-pin power connector (5 volts) coming from main board
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S1 - Flat cable connector, joins to main PCB to connector S
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S2 - Flat cable connector, joins to bottom PCB to connector S
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Main PCB
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--------
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@ -812,7 +812,7 @@ Notes:
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H - 12-pin power connector
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VSync - 60Hz
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HSync - 15.67kHz
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Bottom PCB
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----------
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@ -760,7 +760,7 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( dkong3_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x5fff) AM_ROM
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AM_RANGE(0x6000, 0x67ff) AM_RAM
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AM_RANGE(0x6800, 0x6fff) AM_RAM
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AM_RANGE(0x6800, 0x6fff) AM_RAM
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AM_RANGE(0x7000, 0x73ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* sprite set 1 */
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AM_RANGE(0x7400, 0x77ff) AM_READWRITE(MRA8_RAM, dkong_videoram_w) AM_BASE(&videoram)
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AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("IN0") AM_WRITE(soundlatch_w)
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@ -780,7 +780,7 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( dkong3_io_map, ADDRESS_SPACE_IO, 8 )
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ADDRESS_MAP_FLAGS( AMEF_ABITS(8) )
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AM_RANGE(0x00, 0x00) AM_READWRITE(z80dma_0_r, z80dma_0_w) /* dma controller */
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//AM_RANGE(0x00, 0x00) AM_WRITE(MWA8_NOP) /* dma controller */
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//AM_RANGE(0x00, 0x00) AM_WRITE(MWA8_NOP) /* dma controller */
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ADDRESS_MAP_END
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/* Epos conversions */
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@ -25,7 +25,7 @@
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Known issues:
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* volume controls don't work in the Golden Tee games
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* Driver's Edge accesses many uninitialized RAM locations;
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requires hack to make steering in attract mode work
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requires hack to make steering in attract mode work
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****************************************************************************
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@ -806,7 +806,7 @@ static NVRAM_HANDLER( itech32 )
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{
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for (i = 0x80; i < main_ram_size; i++)
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((UINT8 *)main_ram)[i] = mame_rand(Machine);
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/* due to accessing uninitialized RAM, we need this hack */
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if (is_drivedge)
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((UINT32 *)main_ram)[0x2ce4/4] = 0x0000001e;
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@ -1571,7 +1571,7 @@ static MACHINE_DRIVER_START( timekill )
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/* video hardware */
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MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_UPDATE_BEFORE_VBLANK)
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MDRV_PALETTE_LENGTH(8192)
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MDRV_SCREEN_ADD("main", 0)
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MDRV_SCREEN_RAW_PARAMS(VIDEO_CLOCK, 508, 0, 384, 262, 0, 256)
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MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
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@ -20,9 +20,9 @@
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* Digital volume control is not emulated.
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* During the attract mode of Cluedo, just after the camera flash,
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the camera colours go screwy and proceeding text is printed behind
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the camera. Is it a TMS34010 emulation flaw or original game code bug?
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For now, the GAME_IMPERFECT_GRAPHICS flag remains.
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the camera colours go screwy and proceeding text is printed behind
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the camera. Is it a TMS34010 emulation flaw or original game code bug?
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For now, the GAME_IMPERFECT_GRAPHICS flag remains.
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****************************************************************************
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||||
|
@ -266,7 +266,7 @@ static INPUT_PORTS_START( narc )
|
||||
PORT_START
|
||||
PORT_BIT( 0x00ff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(narc_talkback_data_r, NULL)
|
||||
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
|
||||
PORT_START
|
||||
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_START
|
||||
|
@ -988,15 +988,15 @@ static void model3_exit(running_machine *machine)
|
||||
lsi53c810_exit(&scsi_intf);
|
||||
}
|
||||
|
||||
static MACHINE_START(model3_10)
|
||||
static MACHINE_START(model3_10)
|
||||
{
|
||||
lsi53c810_init(&scsi_intf);
|
||||
add_exit_callback(machine, model3_exit);
|
||||
}
|
||||
static MACHINE_START(model3_15)
|
||||
static MACHINE_START(model3_15)
|
||||
{
|
||||
lsi53c810_init(&scsi_intf);
|
||||
add_exit_callback(machine, model3_exit);
|
||||
add_exit_callback(machine, model3_exit);
|
||||
}
|
||||
|
||||
static void model3_init(running_machine *machine, int step)
|
||||
|
@ -485,23 +485,23 @@ WRITE32_HANDLER( dc_aica_arm_w )
|
||||
}
|
||||
|
||||
/*
|
||||
Naomi ROM board info from ElSemi:
|
||||
Naomi ROM board info from ElSemi:
|
||||
|
||||
NAOMI_ROM_OFFSETH = 0x5f7000,
|
||||
NAOMI_ROM_OFFSETL = 0x5f7004,
|
||||
NAOMI_ROM_DATA = 0x5f7008,
|
||||
NAOMI_DMA_OFFSETH = 0x5f700C,
|
||||
NAOMI_DMA_OFFSETL = 0x5f7010,
|
||||
NAOMI_DMA_COUNT = 0x5f7014,
|
||||
NAOMI_COMM_OFFSET = 0x5F7050,
|
||||
NAOMI_COMM_DATA = 0x5F7054,
|
||||
NAOMI_BOARDID_WRITE = 0x5F7078,
|
||||
NAOMI_BOARDID_READ = 0x5F707C,
|
||||
each port is 16 bit wide, to access the rom in PIO mode, just set an offset in ROM_OFFSETH/L and read from ROM_DATA, each access reads 2 bytes and increases the offset by 2.
|
||||
NAOMI_ROM_OFFSETH = 0x5f7000,
|
||||
NAOMI_ROM_OFFSETL = 0x5f7004,
|
||||
NAOMI_ROM_DATA = 0x5f7008,
|
||||
NAOMI_DMA_OFFSETH = 0x5f700C,
|
||||
NAOMI_DMA_OFFSETL = 0x5f7010,
|
||||
NAOMI_DMA_COUNT = 0x5f7014,
|
||||
NAOMI_COMM_OFFSET = 0x5F7050,
|
||||
NAOMI_COMM_DATA = 0x5F7054,
|
||||
NAOMI_BOARDID_WRITE = 0x5F7078,
|
||||
NAOMI_BOARDID_READ = 0x5F707C,
|
||||
each port is 16 bit wide, to access the rom in PIO mode, just set an offset in ROM_OFFSETH/L and read from ROM_DATA, each access reads 2 bytes and increases the offset by 2.
|
||||
|
||||
the BOARDID regs access the password protected eeprom in the game board. the main board eeprom is read through port 0x1F800030
|
||||
the BOARDID regs access the password protected eeprom in the game board. the main board eeprom is read through port 0x1F800030
|
||||
|
||||
To access the board using DMA, use the DMA_OFFSETL/H. DMA_COUNT is in units of 0x20 bytes. Then trigger a GDROM DMA request.
|
||||
To access the board using DMA, use the DMA_OFFSETL/H. DMA_COUNT is in units of 0x20 bytes. Then trigger a GDROM DMA request.
|
||||
*/
|
||||
|
||||
// NOTE: all accesses are 16 or 32 bits wide but only 16 bits are valid
|
||||
@ -514,7 +514,7 @@ READ64_HANDLER( naomi_rom_board_r )
|
||||
if ((offset == 1) && ((mem_mask & 0xffff) == 0))
|
||||
{
|
||||
UINT64 ret;
|
||||
|
||||
|
||||
ret = (UINT64)(ROM[rom_offset] | (ROM[rom_offset+1]<<8));
|
||||
|
||||
rom_offset += 2;
|
||||
@ -537,11 +537,11 @@ WRITE64_HANDLER( naomi_rom_board_w )
|
||||
dma_offset &= 0xffff;
|
||||
dma_offset |= (data & 0x1fff)<<16;
|
||||
}
|
||||
else if ((offset == 1) && ((mem_mask & U64(0xffff00000000)) == 0))
|
||||
else if ((offset == 1) && ((mem_mask & U64(0xffff00000000)) == 0))
|
||||
{
|
||||
// DMA_OFFSETL
|
||||
dma_offset &= 0xffff0000;
|
||||
dma_offset |= (data & 0xffff);
|
||||
dma_offset &= 0xffff0000;
|
||||
dma_offset |= (data & 0xffff);
|
||||
}
|
||||
else if ((offset == 0) && ((mem_mask & U64(0xffff)) == 0))
|
||||
{
|
||||
@ -794,7 +794,7 @@ IC4 64M 2E60 4CBF MPR23423.4
|
||||
IC5 64M BB81 7E26 MPR23424.5
|
||||
IC6 64M B3A8 F2EA MPR23425.6
|
||||
IC7 64M 05C5 A084 MPR23426.7
|
||||
IC8 64M 9E13 7535 MPR23427.8
|
||||
?IC8 64M 9E13 7535 MPR23427.8
|
||||
|
||||
Serial: BCHE-01A0803
|
||||
|
||||
|
@ -233,7 +233,7 @@ TODO:
|
||||
|
||||
BM, 060108 - The original flyer for this game has screenshots which clearly
|
||||
show the background is 4 pixels to the left on several game stages (you can
|
||||
see the edge of sprites overlapping past the right edge). Therefore I
|
||||
see the edge of sprites overlapping past the right edge). Therefore I
|
||||
do not believe the TC0100SCN problem mentioned above actually exists. The
|
||||
current emulation appears to be accurate.
|
||||
|
||||
|
@ -13,7 +13,7 @@
|
||||
Note:
|
||||
P3 buttons 1 and 2 are mapped twice. THIS IS NOT A BUG!
|
||||
|
||||
bp 548,a0==6c0007 && (d0&ffff)!=0,{print d0&ffff; g}
|
||||
bp 548,a0==6c0007 && (d0&ffff)!=0,{print d0&ffff; g}
|
||||
|
||||
****************************************************************************
|
||||
|
||||
|
@ -2017,7 +2017,7 @@ static MACHINE_DRIVER_START( explorer )
|
||||
MDRV_SOUND_MODIFY("8910.1")
|
||||
MDRV_SOUND_CONFIG(explorer_ay8910_interface_1)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.33)
|
||||
|
||||
|
||||
MDRV_SOUND_MODIFY("8910.2")
|
||||
MDRV_SOUND_CONFIG(explorer_ay8910_interface_2)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.33)
|
||||
@ -2424,7 +2424,7 @@ static MACHINE_DRIVER_START( ad2083 )
|
||||
/* sound hardware */
|
||||
|
||||
MDRV_IMPORT_FROM(ad2083_audio)
|
||||
|
||||
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
static MACHINE_DRIVER_START( turpins )
|
||||
|
@ -89,16 +89,16 @@ Notes:
|
||||
/***************************************************************************
|
||||
Notes (couriersud)
|
||||
|
||||
From http://www.crazykong.com/tech/IremBoardList.txt
|
||||
|
||||
skychut: M-11
|
||||
andromed: N/A
|
||||
ipminvad: N/A
|
||||
spacbeam: not listed
|
||||
headon: not listed
|
||||
greenber: N/A
|
||||
|
||||
M10-Board: Has SN76477
|
||||
From http://www.crazykong.com/tech/IremBoardList.txt
|
||||
|
||||
skychut: M-11
|
||||
andromed: N/A
|
||||
ipminvad: N/A
|
||||
spacbeam: not listed
|
||||
headon: not listed
|
||||
greenber: N/A
|
||||
|
||||
M10-Board: Has SN76477
|
||||
|
||||
***************************************************************************/
|
||||
#include "driver.h"
|
||||
@ -159,12 +159,12 @@ static MACHINE_RESET( irem )
|
||||
*
|
||||
* 76543210
|
||||
* ========
|
||||
* e------- ACTIVE LOW Demo mode
|
||||
* -?------ ????
|
||||
* --b----- ACTIVE LOW Bottom line
|
||||
* ---f---- ACTIVE LOW Flip screen
|
||||
* ----u--- ACTIVE LOW Ufo sound enable (SN76477)
|
||||
* -----sss Sound #sss start
|
||||
* e------- ACTIVE LOW Demo mode
|
||||
* -?------ ????
|
||||
* --b----- ACTIVE LOW Bottom line
|
||||
* ---f---- ACTIVE LOW Flip screen
|
||||
* ----u--- ACTIVE LOW Ufo sound enable (SN76477)
|
||||
* -----sss Sound #sss start
|
||||
* 0x01: MISSILE
|
||||
* 0x02: EXPLOSION
|
||||
* 0x03: INVADER HIT
|
||||
@ -172,16 +172,16 @@ static MACHINE_RESET( irem )
|
||||
* 0x05: FLEET MOVE
|
||||
* 0x06: SAUCER HIT
|
||||
*/
|
||||
|
||||
|
||||
WRITE8_HANDLER( iremm10_ctrl_w )
|
||||
{
|
||||
irem_state *state = Machine->driver_data;
|
||||
|
||||
|
||||
#if DEBUG
|
||||
if (data & 0x40)
|
||||
popmessage("ctrl: %02x",data);
|
||||
#endif
|
||||
|
||||
|
||||
/* I have NO IDEA if this is correct or not */
|
||||
state->bottomline = ~data & 0x20;
|
||||
|
||||
@ -194,26 +194,26 @@ WRITE8_HANDLER( iremm10_ctrl_w )
|
||||
/* sound command in lower 4 bytes */
|
||||
switch (data & 0x07)
|
||||
{
|
||||
case 0x00:
|
||||
case 0x00:
|
||||
/* no sound mapped */
|
||||
break;
|
||||
case 0x01:
|
||||
case 0x01:
|
||||
/* MISSILE sound */
|
||||
sample_start_n(0, 0, 0, 0);
|
||||
break;
|
||||
case 0x02:
|
||||
case 0x02:
|
||||
/* EXPLOSION sound */
|
||||
sample_start_n(0, 1, 1, 0);
|
||||
break;
|
||||
case 0x03:
|
||||
case 0x03:
|
||||
/* INVADER HIT sound */
|
||||
sample_start_n(0, 2, 2, 0);
|
||||
break;
|
||||
case 0x04:
|
||||
case 0x04:
|
||||
/* BONUS BASE sound */
|
||||
sample_start_n(0, 3, 8, 0);
|
||||
break;
|
||||
case 0x05:
|
||||
case 0x05:
|
||||
/* FLEET MOVE sound */
|
||||
sample_start_n(0, 3, 3, 0);
|
||||
break;
|
||||
@ -238,12 +238,12 @@ WRITE8_HANDLER( iremm10_ctrl_w )
|
||||
*
|
||||
* 76543210
|
||||
* ========
|
||||
* e------- ACTIVE LOW Demo mode
|
||||
* -?------ ????
|
||||
* --b----- ACTIVE LOW Bottom line
|
||||
* ---f---- ACTIVE LOW Flip screen
|
||||
* ----??-- ????
|
||||
* ------cc Credits indicator ?
|
||||
* e------- ACTIVE LOW Demo mode
|
||||
* -?------ ????
|
||||
* --b----- ACTIVE LOW Bottom line
|
||||
* ---f---- ACTIVE LOW Flip screen
|
||||
* ----??-- ????
|
||||
* ------cc Credits indicator ?
|
||||
* 0x03: 0 Credits
|
||||
* 0x02: 1 Credit
|
||||
* 0x00: 2 or more credits
|
||||
@ -254,11 +254,11 @@ WRITE8_HANDLER( iremm11_ctrl_w )
|
||||
{
|
||||
irem_state *state = Machine->driver_data;
|
||||
|
||||
#if DEBUG
|
||||
#if DEBUG
|
||||
if (data & 0x4C)
|
||||
popmessage("M11 ctrl: %02x",data);
|
||||
#endif
|
||||
|
||||
|
||||
state->bottomline = ~data & 0x20;
|
||||
|
||||
if (readinputportbytag("CAB") & 0x01)
|
||||
@ -273,10 +273,10 @@ WRITE8_HANDLER( iremm11_ctrl_w )
|
||||
*
|
||||
* 76543210
|
||||
* ========
|
||||
* ????---- ????
|
||||
* ----e--- ACTIVE LOW Demo mode
|
||||
* -----f-- ACTIVE LOW Flip screen
|
||||
* ------cc Credits indicator ?
|
||||
* ????---- ????
|
||||
* ----e--- ACTIVE LOW Demo mode
|
||||
* -----f-- ACTIVE LOW Flip screen
|
||||
* ------cc Credits indicator ?
|
||||
* 0x03: 0 Credits
|
||||
* 0x02: 1 Credit
|
||||
* 0x00: 2 or more credits
|
||||
@ -303,8 +303,8 @@ WRITE8_HANDLER( iremm15_ctrl_w )
|
||||
*
|
||||
* 76543210
|
||||
* ========
|
||||
* ??????-- Always 111111
|
||||
* ------cc Credits indicator ?
|
||||
* ??????-- Always 111111
|
||||
* ------cc Credits indicator ?
|
||||
* 0x03: 0 Credits
|
||||
* 0x02: 1 Credit
|
||||
* 0x00: 2 or more credits
|
||||
@ -324,25 +324,25 @@ WRITE8_HANDLER( iremm11_a100_w )
|
||||
static int last = 0x00;
|
||||
int raising_bits = data & ~last;
|
||||
//int falling_bits = ~data & last;
|
||||
|
||||
|
||||
// should a falling bit stop a sample?
|
||||
// This port is written to about 20x per vblank
|
||||
#if DEBUG
|
||||
#if DEBUG
|
||||
if ((last & 0xE8) != (data & 0xE8))
|
||||
popmessage("A100: %02x\n", data);
|
||||
#endif
|
||||
last = data;
|
||||
// audio control!
|
||||
/* MISSILE sound */
|
||||
if (raising_bits & 0x01)
|
||||
if (raising_bits & 0x01)
|
||||
sample_start_n(0, 0, 0, 0);
|
||||
|
||||
/* EXPLOSION sound */
|
||||
if (raising_bits & 0x02)
|
||||
if (raising_bits & 0x02)
|
||||
sample_start_n(0, 1, 1, 0);
|
||||
|
||||
/* Rapidly falling parachute */
|
||||
if (raising_bits & 0x04)
|
||||
if (raising_bits & 0x04)
|
||||
sample_start_n(0, 3, 8, 0);
|
||||
|
||||
/* Background sound ? */
|
||||
@ -358,13 +358,13 @@ WRITE8_HANDLER( iremm15_a100_w )
|
||||
static int last = 0x00;
|
||||
//int raising_bits = data & ~last;
|
||||
int falling_bits = ~data & last;
|
||||
|
||||
|
||||
// should a falling bit stop a sample?
|
||||
// Bit 4 is used
|
||||
// Bit 5 is used 0xef
|
||||
// Bit 7 is used
|
||||
|
||||
// headoni
|
||||
|
||||
// headoni
|
||||
// 0x01: Acceleration
|
||||
// 0x04: background (motor) ?
|
||||
// 0x08: explosion
|
||||
@ -372,39 +372,39 @@ WRITE8_HANDLER( iremm15_a100_w )
|
||||
// 0x20: computer car changes lane
|
||||
// 0x40: dot
|
||||
|
||||
#if DEBUG
|
||||
#if DEBUG
|
||||
if ((last & 0x82) != (data & 0x82))
|
||||
popmessage("A100: %02x\n", data);
|
||||
#endif
|
||||
/* DOT sound */
|
||||
if (falling_bits & 0x40)
|
||||
if (falling_bits & 0x40)
|
||||
sample_start_n(0, 0, 0, 0);
|
||||
#if 0
|
||||
if (raising_bits & 0x40)
|
||||
if (raising_bits & 0x40)
|
||||
sample_stop_n(0, 0);
|
||||
#endif
|
||||
|
||||
/* EXPLOSION sound */
|
||||
if (falling_bits & 0x08)
|
||||
if (falling_bits & 0x08)
|
||||
sample_start_n(0, 1, 1, 0);
|
||||
#if 0
|
||||
if (raising_bits & 0x08)
|
||||
if (raising_bits & 0x08)
|
||||
sample_stop_n(0, 1);
|
||||
#endif
|
||||
|
||||
/* player changes lane */
|
||||
if (falling_bits & 0x10)
|
||||
if (falling_bits & 0x10)
|
||||
sample_start_n(0, 3, 3, 0);
|
||||
#if 0
|
||||
if (raising_bits & 0x10)
|
||||
if (raising_bits & 0x10)
|
||||
sample_stop_n(0, 3);
|
||||
#endif
|
||||
|
||||
/* computer car changes lane */
|
||||
if (falling_bits & 0x20)
|
||||
if (falling_bits & 0x20)
|
||||
sample_start_n(0, 4, 4, 0);
|
||||
#if 0
|
||||
if (raising_bits & 0x20)
|
||||
if (raising_bits & 0x20)
|
||||
sample_stop_n(0, 4);
|
||||
#endif
|
||||
|
||||
@ -429,7 +429,7 @@ READ8_HANDLER( iremm11_a700_r )
|
||||
* Interrupt handling
|
||||
*
|
||||
*************************************/
|
||||
|
||||
|
||||
TIMER_CALLBACK( skychut_callback )
|
||||
{
|
||||
if (param==0)
|
||||
@ -444,7 +444,7 @@ TIMER_CALLBACK( skychut_callback )
|
||||
}
|
||||
if (param==-1)
|
||||
cpunum_set_input_line(0, 0, CLEAR_LINE);
|
||||
|
||||
|
||||
}
|
||||
|
||||
INTERRUPT_GEN( iremm11_interrupt )
|
||||
@ -482,7 +482,7 @@ INTERRUPT_GEN( iremm15_interrupt )
|
||||
* Main CPU memory handlers
|
||||
*
|
||||
*************************************/
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( iremm10_main, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x02ff) AM_RAM AM_BASE_MEMBER(irem_state, memory) /* scratch ram */
|
||||
AM_RANGE(0x1000, 0x2fff) AM_READ(MRA8_ROM) AM_BASE_MEMBER(irem_state, rom)
|
||||
@ -580,7 +580,7 @@ INPUT_PORTS_START( skychut )
|
||||
|
||||
PORT_START /* FAKE */
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
|
||||
|
||||
|
||||
CAB_PORTENV
|
||||
INPUT_PORTS_END
|
||||
|
||||
@ -622,7 +622,7 @@ INPUT_PORTS_START( ipminvad )
|
||||
PORT_START /* FAKE */
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
|
||||
|
||||
CAB_PORTENV
|
||||
CAB_PORTENV
|
||||
INPUT_PORTS_END
|
||||
|
||||
INPUT_PORTS_START( spacebeam )
|
||||
@ -655,8 +655,8 @@ INPUT_PORTS_START( spacebeam )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_COCKTAIL
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL
|
||||
|
||||
CAB_PORTENV
|
||||
|
||||
CAB_PORTENV
|
||||
INPUT_PORTS_END
|
||||
|
||||
INPUT_PORTS_START( headoni )
|
||||
@ -692,7 +692,7 @@ INPUT_PORTS_START( headoni )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL
|
||||
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_COCKTAIL
|
||||
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL
|
||||
CAB_PORTENV
|
||||
CAB_PORTENV
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
@ -702,8 +702,8 @@ INPUT_PORTS_END
|
||||
* Graphics definitions
|
||||
*
|
||||
*************************************/
|
||||
|
||||
|
||||
|
||||
|
||||
static const gfx_layout charlayout =
|
||||
{
|
||||
8,8, /* 8*8 characters */
|
||||
@ -725,7 +725,7 @@ GFXDECODE_END
|
||||
* Sound definitions
|
||||
*
|
||||
*************************************/
|
||||
|
||||
|
||||
static const char *iremm10_sample_names[] =
|
||||
{
|
||||
"*ipminvad",
|
||||
@ -754,7 +754,7 @@ static struct Samplesinterface iremm10_samples_interface =
|
||||
* Machine driver
|
||||
*
|
||||
*************************************/
|
||||
|
||||
|
||||
static MACHINE_DRIVER_START( iremm10 )
|
||||
|
||||
MDRV_DRIVER_DATA(irem_state)
|
||||
@ -762,7 +762,7 @@ static MACHINE_DRIVER_START( iremm10 )
|
||||
/* basic machine hardware */
|
||||
MDRV_CPU_ADD_TAG("Main", M6502,IREMM10_CPU_CLOCK)
|
||||
MDRV_CPU_PROGRAM_MAP(iremm10_main,0)
|
||||
|
||||
|
||||
MDRV_MACHINE_RESET(irem)
|
||||
|
||||
MDRV_CPU_VBLANK_INT(iremm10_interrupt,1)
|
||||
@ -783,7 +783,7 @@ static MACHINE_DRIVER_START( iremm10 )
|
||||
|
||||
/* sound hardware */
|
||||
MDRV_SPEAKER_STANDARD_MONO("mono")
|
||||
|
||||
|
||||
MDRV_SOUND_ADD(SAMPLES, 0)
|
||||
MDRV_SOUND_CONFIG(iremm10_samples_interface)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
@ -830,7 +830,7 @@ static MACHINE_DRIVER_START( greenberet )
|
||||
|
||||
/* sound hardware */
|
||||
MDRV_SPEAKER_STANDARD_MONO("mono")
|
||||
|
||||
|
||||
MDRV_SOUND_ADD(SAMPLES, 0)
|
||||
MDRV_SOUND_CONFIG(iremm10_samples_interface)
|
||||
MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
|
||||
@ -850,11 +850,11 @@ static DRIVER_INIT( andromed )
|
||||
|
||||
for (i=0x1c00;i<0x2000;i++)
|
||||
state->rom[i]=0x60;
|
||||
}
|
||||
}
|
||||
|
||||
static DRIVER_INIT( iremm15 )
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
@ -873,8 +873,8 @@ ROM_START( andromed )//Jumps to an unmapped sub-routine at $2fc9
|
||||
ROM_LOAD( "am5", 0x2000, 0x0400, CRC(518a3b88) SHA1(5e20c905c2190b381a105327e112fcc0a127bb2f) )
|
||||
ROM_LOAD( "am6", 0x2400, 0x0400, CRC(ce3d5fff) SHA1(c34178aca9ffb8b2dd468d9e3369a985f52daf9a) )
|
||||
ROM_LOAD( "am7", 0x2800, 0x0400, CRC(30d3366f) SHA1(aa73bba194fa6d1f3909f8df517a0bff07583ea9) )
|
||||
ROM_LOAD( "am8", 0x2c00, 0x0400, NO_DUMP ) // $60 entries
|
||||
|
||||
ROM_LOAD( "am8", 0x2c00, 0x0400, NO_DUMP ) // $60 entries
|
||||
|
||||
ROM_REGION( 0x0800, REGION_GFX1, ROMREGION_DISPOSE )
|
||||
ROM_LOAD( "am9", 0x0000, 0x0400, CRC(a1c8f4db) SHA1(bedf5d7126c7e9b91ad595188c69aa2c043c71e8) )
|
||||
ROM_LOAD( "am10", 0x0400, 0x0400, CRC(be2de8f3) SHA1(7eb3d1eb88b4481b0dcb7d001207f516a5db32b3) )
|
||||
|
@ -19,13 +19,13 @@
|
||||
Round Up 5 doesn't survive a reset
|
||||
Dip switches
|
||||
Various other things..
|
||||
Combine Big Fight & CycleWarriors video routines - currently each
|
||||
game uses different sized tilemaps - these are probably software
|
||||
controlled rather than hardwired, but I don't think either game
|
||||
changes the size at runtime.
|
||||
Big Fight/Cyclewarriors - misc graphics problems.
|
||||
Cyclewarriors - test mode text does not appear as it needs a -256 Y scroll offset from somewhere.
|
||||
|
||||
Combine Big Fight & CycleWarriors video routines - currently each
|
||||
game uses different sized tilemaps - these are probably software
|
||||
controlled rather than hardwired, but I don't think either game
|
||||
changes the size at runtime.
|
||||
Big Fight/Cyclewarriors - misc graphics problems.
|
||||
Cyclewarriors - test mode text does not appear as it needs a -256 Y scroll offset from somewhere.
|
||||
|
||||
Emulation by Bryan McPhail, mish@tendril.co.uk
|
||||
|
||||
|
||||
@ -73,67 +73,67 @@
|
||||
|
||||
CW27
|
||||
|
||||
Big Fight
|
||||
Tatsumi, 1992
|
||||
Big Fight
|
||||
Tatsumi, 1992
|
||||
|
||||
PCB Layout
|
||||
----------
|
||||
PCB Layout
|
||||
----------
|
||||
|
||||
ABA-011
|
||||
A-8
|
||||
|-----------------------------------------------------------------|
|
||||
| LM324 M6295 ROM15 TC5563 |
|
||||
|LM324 VOL KA51 50MHz TC5563 PAL |-||
|
||||
| TC51832 TC51832 |--------| | ||
|
||||
| TC51832 TC51832 |TATSUMI | | ||
|
||||
| TC51832 TC51832 |TZB315 | ROM20 | ||
|
||||
| TC51832 TC51832 | | TMM2063 | ||
|
||||
| ROM0 ROM8 |--------| Z80B | ||
|
||||
| | ||
|
||||
|J PAL 16MHz |-||
|
||||
|A ROM2 ROM10 |--------------| PAL |
|
||||
|M | 68000 | TMM2088 |
|
||||
|M |--------------| |
|
||||
|A ROM4 ROM12 TMM2088 |
|
||||
| ROM16 ROM17 |-||
|
||||
| PAL PAL TC51832 | ||
|
||||
| ROM6 ROM14 ROM18 | ||
|
||||
| EPL204 PAL TC51832 | ||
|
||||
| |--------------| | ||
|
||||
| CXD10950 CXD10950 | 68000 | ROM19 TC51832 | ||
|
||||
| |--------------| | ||
|
||||
| TC51832 |-||
|
||||
| DSW3(4) DSW2(8) DSW1(8) |
|
||||
|-----------------------------------------------------------------|
|
||||
Z80 clock - 4.000MHz [16/4]
|
||||
68k clocks - 12.500MHz [50/4]
|
||||
M6295 clock - 2.000MHz [16/8]. Sample rate = 2000000/132
|
||||
YM2151 clock - 4.000MHz [16/4]
|
||||
ABA-011
|
||||
A-8
|
||||
|-----------------------------------------------------------------|
|
||||
| LM324 M6295 ROM15 TC5563 |
|
||||
|LM324 VOL KA51 50MHz TC5563 PAL |-||
|
||||
| TC51832 TC51832 |--------| | ||
|
||||
| TC51832 TC51832 |TATSUMI | | ||
|
||||
| TC51832 TC51832 |TZB315 | ROM20 | ||
|
||||
| TC51832 TC51832 | | TMM2063 | ||
|
||||
| ROM0 ROM8 |--------| Z80B | ||
|
||||
| | ||
|
||||
|J PAL 16MHz |-||
|
||||
|A ROM2 ROM10 |--------------| PAL |
|
||||
|M | 68000 | TMM2088 |
|
||||
|M |--------------| |
|
||||
|A ROM4 ROM12 TMM2088 |
|
||||
| ROM16 ROM17 |-||
|
||||
| PAL PAL TC51832 | ||
|
||||
| ROM6 ROM14 ROM18 | ||
|
||||
| EPL204 PAL TC51832 | ||
|
||||
| |--------------| | ||
|
||||
| CXD10950 CXD10950 | 68000 | ROM19 TC51832 | ||
|
||||
| |--------------| | ||
|
||||
| TC51832 |-||
|
||||
| DSW3(4) DSW2(8) DSW1(8) |
|
||||
|-----------------------------------------------------------------|
|
||||
Z80 clock - 4.000MHz [16/4]
|
||||
68k clocks - 12.500MHz [50/4]
|
||||
M6295 clock - 2.000MHz [16/8]. Sample rate = 2000000/132
|
||||
YM2151 clock - 4.000MHz [16/4]
|
||||
|
||||
|-------------------------|
|
||||
| D65005(x16) |
|
||||
|ROM21 |-||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
|PAL |-||
|
||||
| ROM24 PAL PAL|
|
||||
| ROM23 HD6445 |
|
||||
| ROM22 |
|
||||
| TC51832(x4) |
|
||||
| PAL |-||
|
||||
| PAL | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| |-||
|
||||
|PAL |
|
||||
|-------------------------|
|
||||
|-------------------------|
|
||||
| D65005(x16) |
|
||||
|ROM21 |-||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
|PAL |-||
|
||||
| ROM24 PAL PAL|
|
||||
| ROM23 HD6445 |
|
||||
| ROM22 |
|
||||
| TC51832(x4) |
|
||||
| PAL |-||
|
||||
| PAL | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| | ||
|
||||
| |-||
|
||||
|PAL |
|
||||
|-------------------------|
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
@ -532,7 +532,7 @@ static INPUT_PORTS_START( cyclwarr )
|
||||
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
|
||||
|
||||
PORT_START
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
|
||||
@ -546,7 +546,7 @@ static INPUT_PORTS_START( cyclwarr )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
PORT_START
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2")
|
||||
@ -558,7 +558,7 @@ static INPUT_PORTS_START( cyclwarr )
|
||||
PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4")
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5")
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5")
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:6")
|
||||
@ -570,9 +570,9 @@ static INPUT_PORTS_START( cyclwarr )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8")
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
|
||||
PORT_START
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
|
||||
@ -584,7 +584,7 @@ static INPUT_PORTS_START( cyclwarr )
|
||||
PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6")
|
||||
@ -596,7 +596,7 @@ static INPUT_PORTS_START( cyclwarr )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8")
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
|
||||
PORT_START
|
||||
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START3 )
|
||||
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3)
|
||||
@ -650,7 +650,7 @@ static INPUT_PORTS_START( bigfight )
|
||||
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
|
||||
|
||||
PORT_START
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
|
||||
@ -664,7 +664,7 @@ static INPUT_PORTS_START( bigfight )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
PORT_START
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2")
|
||||
@ -676,7 +676,7 @@ static INPUT_PORTS_START( bigfight )
|
||||
PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4")
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5")
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5")
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:6")
|
||||
@ -688,9 +688,9 @@ static INPUT_PORTS_START( bigfight )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8")
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
|
||||
PORT_START
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
|
||||
@ -702,7 +702,7 @@ static INPUT_PORTS_START( bigfight )
|
||||
PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6")
|
||||
@ -714,7 +714,7 @@ static INPUT_PORTS_START( bigfight )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8")
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
|
||||
PORT_START
|
||||
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START3 )
|
||||
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3)
|
||||
|
@ -395,10 +395,10 @@ static MACHINE_RESET( toaplan2 ) /* machine_reset_toaplan2(); */
|
||||
mcu_data = 0x00;
|
||||
|
||||
/*
|
||||
All games execute a RESET instruction on init, presumably to reset the sound CPU.
|
||||
This is important for games with common RAM; the RAM test will fail
|
||||
when leaving service mode if the sound CPU is not reset.
|
||||
*/
|
||||
All games execute a RESET instruction on init, presumably to reset the sound CPU.
|
||||
This is important for games with common RAM; the RAM test will fail
|
||||
when leaving service mode if the sound CPU is not reset.
|
||||
*/
|
||||
cpunum_set_info_fct(0, CPUINFO_PTR_M68K_RESET_CALLBACK, (genf *)toaplan2_reset);
|
||||
}
|
||||
|
||||
|
@ -46,8 +46,8 @@ static void viper_exit(running_machine *machine)
|
||||
|
||||
static VIDEO_START(viper)
|
||||
{
|
||||
add_exit_callback(machine, viper_exit);
|
||||
|
||||
add_exit_callback(machine, viper_exit);
|
||||
|
||||
voodoo_start(0, 0, VOODOO_3, 16, 16, 16);
|
||||
}
|
||||
|
||||
|
@ -34,7 +34,7 @@ struct _irem_state
|
||||
UINT8 * chargen;
|
||||
UINT8 * memory;
|
||||
UINT8 * rom;
|
||||
|
||||
|
||||
/* machine states */
|
||||
|
||||
/* sound state */
|
||||
|
@ -106,7 +106,7 @@ void amiga_akiko_init(running_machine* machine)
|
||||
akiko.cdrom_toc = NULL;
|
||||
akiko.dma_timer = timer_alloc(akiko_dma_proc, NULL);
|
||||
akiko.frame_timer = timer_alloc(akiko_frame_proc, NULL);
|
||||
|
||||
|
||||
add_exit_callback(machine, amiga_akiko_exit);
|
||||
|
||||
/* create the TOC table */
|
||||
|
@ -134,7 +134,7 @@ INLINE int decode_reg_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift)
|
||||
|
||||
*shift = 0;
|
||||
|
||||
// non 32-bit accesses have not yet been seen here, we need to know when they are
|
||||
// non 32-bit accesses have not yet been seen here, we need to know when they are
|
||||
if ((mem_mask != U64(0x00000000ffffffff)) && (mem_mask != U64(0xffffffff00000000)))
|
||||
{
|
||||
assert_always(0, "Wrong mask!\n");
|
||||
@ -306,14 +306,14 @@ WRITE64_HANDLER( dc_maple_w )
|
||||
{
|
||||
case SB_MDST:
|
||||
maple_regs[reg] = old;
|
||||
if (!(old & 1) && (dat & 1)) // 0 -> 1
|
||||
{
|
||||
if (!(maple_regs[SB_MDTSEL] & 1))
|
||||
if (!(old & 1) && (dat & 1)) // 0 -> 1
|
||||
{
|
||||
if (!(maple_regs[SB_MDTSEL] & 1))
|
||||
{
|
||||
maple_regs[reg] = 1;
|
||||
dat=maple_regs[SB_MDSTAR];
|
||||
while (1) // do transfers
|
||||
{
|
||||
while (1) // do transfers
|
||||
{
|
||||
ddtdata.source=dat;
|
||||
ddtdata.length=3;
|
||||
ddtdata.size=4;
|
||||
@ -352,7 +352,7 @@ WRITE64_HANDLER( dc_maple_w )
|
||||
ddtdata.mode=-1;
|
||||
cpunum_set_info_ptr(0,CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA,&ddtdata);
|
||||
chk=0;
|
||||
for (a=1;a < length;a++)
|
||||
for (a=1;a < length;a++)
|
||||
{
|
||||
chk=chk+(signed char)(buff[a] & 255);
|
||||
chk=chk+(signed char)((buff[a] >> 8) & 255);
|
||||
@ -367,7 +367,7 @@ WRITE64_HANDLER( dc_maple_w )
|
||||
ddtdata.length=2;
|
||||
break;
|
||||
case 0x82: // get license string
|
||||
for (a=0;a < 16;a++)
|
||||
for (a=0;a < 16;a++)
|
||||
{
|
||||
buff[a]=maple0x82answer[a];
|
||||
}
|
||||
@ -380,28 +380,28 @@ WRITE64_HANDLER( dc_maple_w )
|
||||
ddtdata.mode=-1;
|
||||
cpunum_set_info_ptr(0,CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA,&ddtdata);
|
||||
|
||||
if ((buff[0] & 0xff) == 3)
|
||||
if ((buff[0] & 0xff) == 3)
|
||||
{
|
||||
buff[1]=0x14131211;
|
||||
for (a=0;a < 31;a++)
|
||||
for (a=0;a < 31;a++)
|
||||
{
|
||||
buff[2+a]=buff[1+a]+0x04040404;
|
||||
}
|
||||
buff[1]=0x1413b1b9; // put checksum
|
||||
buff[5]=0x8ab82221; // put checksum
|
||||
ddtdata.length=0x84/4;
|
||||
}
|
||||
}
|
||||
else if (((buff[0] & 0xff) == 0x31) || ((buff[0] & 0xff) == 0xb) || ((buff[0] & 0xff) == 0x1))
|
||||
{
|
||||
ddtdata.length=1;
|
||||
}
|
||||
else if ((buff[0] & 0xff) == 0x17) // send command into jvs serial bus !!!
|
||||
{
|
||||
else if ((buff[0] & 0xff) == 0x17) // send command into jvs serial bus !!!
|
||||
{
|
||||
// 17,*c295407 (77),*c295404,*c295405,*c295406,0,ff,2,f0,d9, 0
|
||||
// 17,*c295407 (77),*c295404,*c295405,*c295406,0,ff,2,f1,01, 0
|
||||
// 17,*c295407 (77),*c295404,*c295405,*c295406,0,ff,2,f1,01, 0
|
||||
// 17,*c295407 (77),*c295404,*c295405,*c295406,0,01,1,10, 01,0
|
||||
switch (buff[2] & 0xff) // jvs command
|
||||
{
|
||||
switch (buff[2] & 0xff) // jvs command
|
||||
{
|
||||
case 0xf0:
|
||||
case 0xf1:
|
||||
case 0x10:
|
||||
@ -409,12 +409,12 @@ WRITE64_HANDLER( dc_maple_w )
|
||||
}
|
||||
buff[1]=0xe4e3e2e1;
|
||||
ddtdata.length=2;
|
||||
}
|
||||
else if ((buff[0] & 0xff) == 0x15)
|
||||
}
|
||||
else if ((buff[0] & 0xff) == 0x15)
|
||||
{
|
||||
// 15,0,0,0
|
||||
buff[1]=0xA4A3A2A1;
|
||||
for (a=0;a < 7;a++)
|
||||
for (a=0;a < 7;a++)
|
||||
{
|
||||
buff[2+a]=buff[1+a]+0x04040404;
|
||||
}
|
||||
@ -427,7 +427,7 @@ WRITE64_HANDLER( dc_maple_w )
|
||||
*(((unsigned char *)buff)+0x1d)=1;
|
||||
*(((unsigned char *)buff)+0x16)=0x8e;
|
||||
ddtdata.length=9;
|
||||
}
|
||||
}
|
||||
else if ((buff[0] & 0xff) == 0x21)
|
||||
{
|
||||
// 21,*c295407 (77),*c295404,*c295405,*c295406,0,1,0
|
||||
@ -468,11 +468,11 @@ READ64_HANDLER( dc_gdrom_r )
|
||||
{
|
||||
UINT32 off;
|
||||
|
||||
if ((int)mem_mask & 1)
|
||||
if ((int)mem_mask & 1)
|
||||
{
|
||||
off=(offset << 1) | 1;
|
||||
}
|
||||
else
|
||||
}
|
||||
else
|
||||
{
|
||||
off=offset << 1;
|
||||
}
|
||||
@ -489,12 +489,12 @@ WRITE64_HANDLER( dc_gdrom_w )
|
||||
{
|
||||
UINT32 dat,off;
|
||||
|
||||
if ((int)mem_mask & 1)
|
||||
if ((int)mem_mask & 1)
|
||||
{
|
||||
dat=(UINT32)(data >> 32);
|
||||
off=(offset << 1) | 1;
|
||||
}
|
||||
else
|
||||
}
|
||||
else
|
||||
{
|
||||
dat=(UINT32)data;
|
||||
off=offset << 1;
|
||||
@ -552,30 +552,30 @@ UINT32 old;
|
||||
}
|
||||
old = dc_rtcregister[off];
|
||||
dc_rtcregister[off] = dat & 0xFFFF; // 5f6c00+off*4=dat
|
||||
/* switch (off)
|
||||
{
|
||||
case RTC1:
|
||||
if (dc_rtcregister[RTC3])
|
||||
dc_rtcregister[RTC3] = 0;
|
||||
else
|
||||
dc_rtcregister[off] = old;
|
||||
break;
|
||||
case RTC2:
|
||||
if (dc_rtcregister[RTC3] == 0)
|
||||
dc_rtcregister[off] = old;
|
||||
break;
|
||||
case RTC3:
|
||||
dc_rtcregister[RTC3] &= 1;
|
||||
break;
|
||||
}*/
|
||||
/* switch (off)
|
||||
{
|
||||
case RTC1:
|
||||
if (dc_rtcregister[RTC3])
|
||||
dc_rtcregister[RTC3] = 0;
|
||||
else
|
||||
dc_rtcregister[off] = old;
|
||||
break;
|
||||
case RTC2:
|
||||
if (dc_rtcregister[RTC3] == 0)
|
||||
dc_rtcregister[off] = old;
|
||||
break;
|
||||
case RTC3:
|
||||
dc_rtcregister[RTC3] &= 1;
|
||||
break;
|
||||
}*/
|
||||
mame_printf_verbose("RTC: write %llx to %x, mask %llx\n", data, offset, mem_mask);
|
||||
}
|
||||
|
||||
/*static void dc_rtc_increment(void)
|
||||
{
|
||||
dc_rtcregister[RTC2] = (dc_rtcregister[RTC2] + 1) & 0xFFFF;
|
||||
if (dc_rtcregister[RTC2] == 0)
|
||||
dc_rtcregister[RTC1] = (dc_rtcregister[RTC1] + 1) & 0xFFFF;
|
||||
dc_rtcregister[RTC2] = (dc_rtcregister[RTC2] + 1) & 0xFFFF;
|
||||
if (dc_rtcregister[RTC2] == 0)
|
||||
dc_rtcregister[RTC1] = (dc_rtcregister[RTC1] + 1) & 0xFFFF;
|
||||
}*/
|
||||
|
||||
MACHINE_RESET( dc )
|
||||
@ -597,7 +597,7 @@ READ64_HANDLER( dc_aica_reg_r )
|
||||
|
||||
reg = decode_reg_64(offset, mem_mask, &shift);
|
||||
|
||||
// logerror("dc_aica_reg_r: Unmapped read %08x\n", 0x700000+reg*4);
|
||||
// logerror("dc_aica_reg_r: Unmapped read %08x\n", 0x700000+reg*4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -610,7 +610,7 @@ WRITE64_HANDLER( dc_aica_reg_w )
|
||||
reg = decode_reg_64(offset, mem_mask, &shift);
|
||||
dat = (UINT32)(data >> shift);
|
||||
|
||||
if (reg == (0x2c00/4))
|
||||
if (reg == (0x2c00/4))
|
||||
{
|
||||
if (dat & 1)
|
||||
{
|
||||
|
@ -817,7 +817,7 @@ void slapstic_init(int chip)
|
||||
/* see if we're 68k or 6502/6809 based */
|
||||
access_68k = (Machine->drv->cpu[0].type != CPU_M6809 &&
|
||||
Machine->drv->cpu[0].type != CPU_M6502);
|
||||
|
||||
|
||||
/* save state */
|
||||
state_save_register_item("slapstic", 0, state);
|
||||
state_save_register_item("slapstic", 0, current_bank);
|
||||
|
@ -363,7 +363,7 @@ READ8_HANDLER(tatsumi_hack_ym2151_r)
|
||||
READ8_HANDLER(tatsumi_hack_oki_r)
|
||||
{
|
||||
int r=OKIM6295_status_0_r(0);
|
||||
|
||||
|
||||
if (activecpu_get_pc()==0x2b70 || activecpu_get_pc()==0x2bb5
|
||||
|| activecpu_get_pc()==0x2acc
|
||||
|| activecpu_get_pc()==0x1c79 // BigFight
|
||||
|
@ -61,11 +61,11 @@ WRITE8_HANDLER( arkanoid_d008_w )
|
||||
}
|
||||
|
||||
/* BM: bit 7 is suspected to be MCU reset, the evidence for this is that
|
||||
the games tilt mode reset sequence shows the main CPU must be able to
|
||||
directly control the reset line of the MCU, else the game will crash
|
||||
leaving the tilt screen (as the MCU is now out of sync with main CPU
|
||||
which resets itself). This bit is the likely candidate as it is flipped
|
||||
early in bootup just prior to accessing the MCU for the first time. */
|
||||
the games tilt mode reset sequence shows the main CPU must be able to
|
||||
directly control the reset line of the MCU, else the game will crash
|
||||
leaving the tilt screen (as the MCU is now out of sync with main CPU
|
||||
which resets itself). This bit is the likely candidate as it is flipped
|
||||
early in bootup just prior to accessing the MCU for the first time. */
|
||||
if (cpu_gettotalcpu()>1) // Bootlegs don't have the MCU but still set this bit
|
||||
cpunum_set_input_line(1, INPUT_LINE_RESET, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
|
||||
}
|
||||
|
@ -129,7 +129,7 @@ VIDEO_START( atarig1 )
|
||||
playfield_tile_bank = 0;
|
||||
playfield_xscroll = 0;
|
||||
playfield_yscroll = 0;
|
||||
|
||||
|
||||
/* state saving */
|
||||
state_save_register_global(current_control);
|
||||
state_save_register_global(playfield_tile_bank);
|
||||
|
@ -353,7 +353,7 @@ void atarirle_init(int map, const atarirle_desc *desc)
|
||||
}
|
||||
|
||||
mo->partial_scanline = -1;
|
||||
|
||||
|
||||
/* register for save states */
|
||||
state_save_register_item_pointer("atarirle", map, mo->spriteram[0].data, ARRAY_LENGTH(mo->spriteram[0].data) * mo->spriteramsize);
|
||||
state_save_register_item_bitmap("atarirle", map, mo->vram[0][0]);
|
||||
|
@ -527,7 +527,7 @@ void btoads_scanline_update(running_machine *machine, int screen, mame_bitmap *b
|
||||
char name[10];
|
||||
FILE *f;
|
||||
int i;
|
||||
|
||||
|
||||
while (input_code_pressed(KEYCODE_X)) ;
|
||||
|
||||
sprintf(name, "disp%d.log", count++);
|
||||
|
@ -270,8 +270,8 @@ VIDEO_START( cvs )
|
||||
cvs_color_ram = auto_malloc(0x400);
|
||||
palette_ram = auto_malloc(0x10);
|
||||
character_ram = auto_malloc(3 * 0x800); /* only half is used, but
|
||||
by allocating twice the amount,
|
||||
we can use the same gfx_layout */
|
||||
by allocating twice the amount,
|
||||
we can use the same gfx_layout */
|
||||
|
||||
/* precalculate the star background */
|
||||
|
||||
@ -352,7 +352,7 @@ VIDEO_UPDATE( cvs )
|
||||
|
||||
|
||||
/* create our background character set, which is a software
|
||||
selectable mixture of RAM and ROM based tiles */
|
||||
selectable mixture of RAM and ROM based tiles */
|
||||
|
||||
/* ROM based tiles first */
|
||||
for (code = 0; code < ram_based_char_start_indecies[character_mode]; code++)
|
||||
|
@ -21,7 +21,7 @@ static UINT32 tafifo_buff[32];
|
||||
static int tafifo_pos, tafifo_mask, tafifo_vertexwords, tafifo_listtype;
|
||||
static int start_render_received;
|
||||
|
||||
struct testsprites
|
||||
struct testsprites
|
||||
{
|
||||
int positionx, positiony;
|
||||
int sizex, sizey;
|
||||
@ -43,7 +43,7 @@ INLINE int decode_reg_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift)
|
||||
|
||||
*shift = 0;
|
||||
|
||||
// non 32-bit accesses have not yet been seen here, we need to know when they are
|
||||
// non 32-bit accesses have not yet been seen here, we need to know when they are
|
||||
if ((mem_mask != U64(0x00000000ffffffff)) && (mem_mask != U64(0xffffffff00000000)))
|
||||
{
|
||||
assert_always(0, "Wrong mask!\n");
|
||||
@ -162,32 +162,32 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
static UINT32 ignoretexalpha,flipuv,clampuv,filtermode,sstexture,mmdadjust,tsinstruction;
|
||||
static UINT32 depthcomparemode,cullingmode,zwritedisable,cachebypass,dcalcctrl,volumeinstruction,mipmapped,vqcompressed,strideselect;
|
||||
|
||||
if (!mem_mask) // 64 bit
|
||||
{
|
||||
if (!mem_mask) // 64 bit
|
||||
{
|
||||
tafifo_buff[tafifo_pos]=(UINT32)data;
|
||||
tafifo_buff[tafifo_pos+1]=(UINT32)(data >> 32);
|
||||
#if DEBUG_FIFO_POLY
|
||||
mame_printf_debug("ta_fifo_poly_w: Unmapped write64 %08x = %llx -> %08x %08x\n", 0x10000000+offset*8, data, tafifo_buff[tafifo_pos], tafifo_buff[tafifo_pos+1]);
|
||||
#endif
|
||||
tafifo_pos += 2;
|
||||
}
|
||||
else
|
||||
}
|
||||
else
|
||||
{
|
||||
logerror("ta_fifo_poly_w: Only 64 bit writes supported!\n");
|
||||
}
|
||||
|
||||
tafifo_pos &= tafifo_mask;
|
||||
if (tafifo_pos == 0)
|
||||
if (tafifo_pos == 0)
|
||||
{
|
||||
paracontrol=(tafifo_buff[0] >> 24) & 0xff;
|
||||
|
||||
// 0 end of list
|
||||
// 1 user tile clip
|
||||
// 2 object list set
|
||||
// 3 reserved
|
||||
// 4 polygon/modifier volume
|
||||
// 5 sprite
|
||||
// 6 reserved
|
||||
|
||||
// 0 end of list
|
||||
// 1 user tile clip
|
||||
// 2 object list set
|
||||
// 3 reserved
|
||||
// 4 polygon/modifier volume
|
||||
// 5 sprite
|
||||
// 6 reserved
|
||||
// 7 vertex
|
||||
paratype=(paracontrol >> 5) & 7;
|
||||
endofstrip=(paracontrol >> 4) & 1;
|
||||
@ -205,29 +205,29 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
gouraud=(objcontrol >> 1) & 1;
|
||||
uv16bit=(objcontrol >> 0) & 1;
|
||||
|
||||
if (toerasesprites == 1)
|
||||
if (toerasesprites == 1)
|
||||
{
|
||||
toerasesprites=0;
|
||||
testsprites_size=0;
|
||||
}
|
||||
|
||||
// check if we need 8 words more
|
||||
if (tafifo_mask == 7)
|
||||
{
|
||||
if ((paratype == 4) && (((coltype >= 2) && (offfset == 1)) || ((coltype >= 2) && (volume == 1))))
|
||||
// check if we need 8 words more
|
||||
if (tafifo_mask == 7)
|
||||
{
|
||||
if ((paratype == 4) && (((coltype >= 2) && (offfset == 1)) || ((coltype >= 2) && (volume == 1))))
|
||||
{
|
||||
tafifo_mask = 15;
|
||||
tafifo_pos = 8;
|
||||
return;
|
||||
}
|
||||
|
||||
if ((paratype == 7) && (tafifo_vertexwords == 16))
|
||||
|
||||
if ((paratype == 7) && (tafifo_vertexwords == 16))
|
||||
{
|
||||
tafifo_mask = 15;
|
||||
tafifo_pos = 8;
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
tafifo_mask = 7;
|
||||
@ -235,7 +235,7 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
|
||||
// now we heve all the needed words
|
||||
// interpret their meaning
|
||||
if (tafifo_buff[0] == 0)
|
||||
if (tafifo_buff[0] == 0)
|
||||
{
|
||||
a=0; // 6-10 0-3
|
||||
switch (tafifo_listtype)
|
||||
@ -260,14 +260,14 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
sysctrl_regs[SB_ISTNRM] |= a;
|
||||
update_interrupt_status();
|
||||
tafifo_listtype= -1;
|
||||
}
|
||||
else
|
||||
}
|
||||
else
|
||||
{
|
||||
#if DEBUG_PVRDLIST
|
||||
mame_printf_verbose("Para Type %d End of Strip %d List Type %d\n", paratype, endofstrip, listtype);
|
||||
#endif
|
||||
|
||||
if (((paratype == 4) && (texture == 1)) || (paratype == 5))
|
||||
if (((paratype == 4) && (texture == 1)) || (paratype == 5))
|
||||
{
|
||||
depthcomparemode=(tafifo_buff[1] >> 29) & 7;
|
||||
cullingmode=(tafifo_buff[1] >> 27) & 3;
|
||||
@ -304,7 +304,7 @@ WRITE64_HANDLER( ta_fifo_poly_w )
|
||||
#endif
|
||||
}
|
||||
|
||||
if (paratype == 7)
|
||||
if (paratype == 7)
|
||||
{ // vertex
|
||||
#if DEBUG_PVRDLIST
|
||||
mame_printf_verbose(" test vertex ");
|
||||
@ -366,7 +366,7 @@ UINT32 dilate0(UINT32 value,int bits) // dilate first "bits" bits in "value"
|
||||
int a;
|
||||
|
||||
x = value;
|
||||
for (a=0;a < bits;a++)
|
||||
for (a=0;a < bits;a++)
|
||||
{
|
||||
m2 = 1 << (a << 1);
|
||||
m1 = m2 - 1;
|
||||
@ -382,7 +382,7 @@ UINT32 dilate1(UINT32 value,int bits) // dilate first "bits" bits in "value"
|
||||
int a;
|
||||
|
||||
x = value;
|
||||
for (a=0;a < bits;a++)
|
||||
for (a=0;a < bits;a++)
|
||||
{
|
||||
m2 = 1 << (a << 1);
|
||||
m1 = m2 - 1;
|
||||
@ -415,7 +415,7 @@ void testdrawscreen(bitmap_t *bitmap,const rectangle *cliprect)
|
||||
int c,xt,yt,cd;
|
||||
|
||||
fillbitmap(bitmap,MAKE_RGB(128,128,128),cliprect);
|
||||
for (cs=0;cs < testsprites_size;cs++)
|
||||
for (cs=0;cs < testsprites_size;cs++)
|
||||
{
|
||||
dx=showsprites[cs].sizex;
|
||||
dy=showsprites[cs].sizey;
|
||||
@ -435,9 +435,9 @@ void testdrawscreen(bitmap_t *bitmap,const rectangle *cliprect)
|
||||
if (showsprites[cs].positiony < 0)
|
||||
yi=-showsprites[cs].positiony;
|
||||
|
||||
for (y = yi;y < dy;y++)
|
||||
for (y = yi;y < dy;y++)
|
||||
{
|
||||
for (x = xi;x < dx;x++)
|
||||
for (x = xi;x < dx;x++)
|
||||
{
|
||||
u=showsprites[cs].u+iu*x;
|
||||
v=showsprites[cs].v+iv*y;
|
||||
@ -450,13 +450,13 @@ void testdrawscreen(bitmap_t *bitmap,const rectangle *cliprect)
|
||||
addrp=showsprites[cs].textureaddress+(dilated1[cd][xt] + dilated0[cd][yt])*2;
|
||||
|
||||
c=*(((UINT16 *)dc_texture_ram) + (WORD2_XOR_LE(addrp) >> 1));
|
||||
if (showsprites[cs].texturepf == 2)
|
||||
if (showsprites[cs].texturepf == 2)
|
||||
{
|
||||
a=(c & 0xf000) >> 8;
|
||||
bmpaddr=BITMAP_ADDR32(bitmap,showsprites[cs].positiony+y,showsprites[cs].positionx+x);
|
||||
*bmpaddr = alpha_blend_r32(*bmpaddr, MAKE_RGB((c&0xf00) >> 4, c&0xf0, (c&0xf) << 4), a);
|
||||
}
|
||||
else
|
||||
}
|
||||
else
|
||||
{
|
||||
a=(c & 0x7000) >> 7;
|
||||
bmpaddr=BITMAP_ADDR32(bitmap,showsprites[cs].positiony+y,showsprites[cs].positionx+x);
|
||||
@ -493,7 +493,7 @@ VIDEO_UPDATE(dc)
|
||||
{
|
||||
int a;
|
||||
|
||||
if (pvrta_regs[VO_CONTROL] & (1 << 3))
|
||||
if (pvrta_regs[VO_CONTROL] & (1 << 3))
|
||||
{
|
||||
fillbitmap(bitmap,pvrta_regs[VO_BORDER_COL] & 0xFFFFFF,cliprect);
|
||||
return 0;
|
||||
@ -501,7 +501,7 @@ VIDEO_UPDATE(dc)
|
||||
|
||||
testdrawscreen(bitmap,cliprect);
|
||||
|
||||
if (start_render_received)
|
||||
if (start_render_received)
|
||||
{
|
||||
start_render_received=0;
|
||||
a=4; // tsp end
|
||||
|
@ -2098,8 +2098,8 @@ else
|
||||
|
||||
addr = (code << 5) + (offset & 0x1f);
|
||||
addr &= memory_region_length(K052109_memory_region)-1;
|
||||
|
||||
// logerror("%04x: off = %04x sub = %02x (bnk = %x) adr = %06x\n",activecpu_get_pc(),offset,K052109_romsubbank,bank,addr);
|
||||
|
||||
// logerror("%04x: off = %04x sub = %02x (bnk = %x) adr = %06x\n",activecpu_get_pc(),offset,K052109_romsubbank,bank,addr);
|
||||
|
||||
return memory_region(K052109_memory_region)[addr];
|
||||
}
|
||||
@ -2217,8 +2217,8 @@ WRITE8_HANDLER( K052109_w )
|
||||
K052109_charrombank_2[2] = data & 0x0f;
|
||||
K052109_charrombank_2[3] = (data >> 4) & 0x0f;
|
||||
}
|
||||
// else
|
||||
// logerror("%04x: write %02x to unknown 052109 address %04x\n",activecpu_get_pc(),data,offset);
|
||||
// else
|
||||
// logerror("%04x: write %02x to unknown 052109 address %04x\n",activecpu_get_pc(),data,offset);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -113,7 +113,7 @@ WRITE8_HANDLER( mario_scroll_w )
|
||||
|
||||
WRITE8_HANDLER( mario_flip_w )
|
||||
{
|
||||
|
||||
|
||||
flip_screen_set(data & 0x01);
|
||||
tilemap_set_scrollx(bg_tilemap, 0, flip_screen ? (HTOTAL-HBSTART) : 0);
|
||||
}
|
||||
@ -138,7 +138,7 @@ VIDEO_START( mario )
|
||||
}
|
||||
|
||||
/*
|
||||
* Erratic line at top when scrolling down "Marios Bros" Title
|
||||
* Erratic line at top when scrolling down "Marios Bros" Title
|
||||
* confirmed on mametests.org as being present on real PCB as well.
|
||||
*/
|
||||
|
||||
@ -151,31 +151,31 @@ static void draw_sprites(running_machine *machine, mame_bitmap *bitmap, const re
|
||||
if (spriteram[offs])
|
||||
{
|
||||
int x, y;
|
||||
|
||||
// from schematics ....
|
||||
|
||||
// from schematics ....
|
||||
y = (spriteram[offs] + (flip_screen ? 0xF7 : 0xF9) + 1) & 0xFF;
|
||||
x = spriteram[offs+3];
|
||||
// sprite will be drawn if (y + scanline) & 0xF0 = 0xF0
|
||||
y = 240 - y; /* logical screen position */
|
||||
|
||||
y = y ^ (flip_screen ? 0xFF : 0x00); /* physical screen location */
|
||||
x = x ^ (flip_screen ? 0xFF : 0x00); /* physical screen location */
|
||||
y = y ^ (flip_screen ? 0xFF : 0x00); /* physical screen location */
|
||||
x = x ^ (flip_screen ? 0xFF : 0x00); /* physical screen location */
|
||||
|
||||
if (flip_screen)
|
||||
{
|
||||
y -= 6;
|
||||
x -= 7;
|
||||
y -= 6;
|
||||
x -= 7;
|
||||
drawgfx(bitmap,machine->gfx[1],
|
||||
spriteram[offs + 2],
|
||||
(spriteram[offs + 1] & 0x0f) + 16 * palette_bank+32 * monitor,
|
||||
!(spriteram[offs + 1] & 0x80),!(spriteram[offs + 1] & 0x40),
|
||||
x, y,
|
||||
cliprect,TRANSPARENCY_PEN,0);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
y += 1;
|
||||
x -= 8;
|
||||
y += 1;
|
||||
x -= 8;
|
||||
drawgfx(bitmap,machine->gfx[1],
|
||||
spriteram[offs + 2],
|
||||
(spriteram[offs + 1] & 0x0f) + 16 * palette_bank+32 * monitor,
|
||||
|
@ -79,7 +79,7 @@ VIDEO_START( midvunit )
|
||||
scanline_timer = timer_alloc(scanline_timer_cb, NULL);
|
||||
poly = poly_alloc(4000, sizeof(poly_extra_data), POLYFLAG_ALLOW_QUADS);
|
||||
add_exit_callback(machine, midvunit_exit);
|
||||
|
||||
|
||||
state_save_register_global_array(video_regs);
|
||||
state_save_register_global_array(dma_data);
|
||||
state_save_register_global(dma_data_index);
|
||||
|
@ -82,19 +82,19 @@ static void draw_sprites(running_machine *machine, mame_bitmap *bitmap,const rec
|
||||
data = spriteram16[offs+1];
|
||||
y = (data - 0) & 0x1ff;
|
||||
|
||||
/*
|
||||
The purpose of the bit at data&0x8 (below) is unknown, but it is set
|
||||
on Darius explosions, some enemy missiles and at least 1 boss.
|
||||
It is most likely another priority bit but as there are no obvious
|
||||
visual problems it will need checked against the original pcb.
|
||||
|
||||
There is a report this bit is set when the player intersects
|
||||
the tank sprite in Ninja Warriors however I was unable to repro
|
||||
this or find any use of this bit in that game.
|
||||
|
||||
Bit&0x8000 is set on some sprites in later levels of Darius
|
||||
but is again unknown, and there is no obvious visual problem.
|
||||
*/
|
||||
/*
|
||||
The purpose of the bit at data&0x8 (below) is unknown, but it is set
|
||||
on Darius explosions, some enemy missiles and at least 1 boss.
|
||||
It is most likely another priority bit but as there are no obvious
|
||||
visual problems it will need checked against the original pcb.
|
||||
|
||||
There is a report this bit is set when the player intersects
|
||||
the tank sprite in Ninja Warriors however I was unable to repro
|
||||
this or find any use of this bit in that game.
|
||||
|
||||
Bit&0x8000 is set on some sprites in later levels of Darius
|
||||
but is again unknown, and there is no obvious visual problem.
|
||||
*/
|
||||
data = spriteram16[offs+3];
|
||||
flipx = (data & 0x1);
|
||||
flipy = (data & 0x2) >> 1;
|
||||
@ -103,7 +103,7 @@ static void draw_sprites(running_machine *machine, mame_bitmap *bitmap,const rec
|
||||
if (priority != primask) continue;
|
||||
color = (data & 0x7f00) >> 8;
|
||||
/* data&0x8000 - unknown */
|
||||
|
||||
|
||||
#ifdef MAME_DEBUG
|
||||
if (data & 0x80f0) unknown |= (data &0x80f0);
|
||||
#endif
|
||||
|
@ -50,7 +50,7 @@ static UINT32 tilemap_scan(UINT32 col,UINT32 row,UINT32 num_cols,UINT32 num_rows
|
||||
|
||||
|
||||
static void get_tile_info(running_machine *machine, tile_data *tileinfo, tilemap_memory_index tile_index, void *param)
|
||||
{
|
||||
{
|
||||
SET_TILE_INFO(0, videoram[tile_index], colorram[tile_index] & 0x07, 0);
|
||||
}
|
||||
|
||||
@ -68,7 +68,7 @@ WRITE8_HANDLER( skychut_colorram_w )
|
||||
WRITE8_HANDLER( iremm15_chargen_w )
|
||||
{
|
||||
irem_state *state = Machine->driver_data;
|
||||
|
||||
|
||||
if (state->chargen[offset] != data)
|
||||
{
|
||||
state->chargen[offset] = data;
|
||||
@ -93,7 +93,7 @@ VIDEO_START( iremm10 )
|
||||
{
|
||||
//irem_state *state = machine->driver_data;
|
||||
int i;
|
||||
|
||||
|
||||
for (i=0;i<32*8;i++)
|
||||
extyoffs[i] = i*8;
|
||||
|
||||
@ -103,10 +103,10 @@ VIDEO_START( iremm10 )
|
||||
tilemap_set_transparent_pen(tx_tilemap, 0x07);
|
||||
tilemap_set_scrolldx(tx_tilemap, 0, 62);
|
||||
tilemap_set_scrolldy(tx_tilemap, 0, 0);
|
||||
|
||||
|
||||
back_gfx = allocgfx(&backlayout);
|
||||
back_gfx->total_colors = 8;
|
||||
|
||||
|
||||
machine->gfx[1] = back_gfx;
|
||||
return ;
|
||||
}
|
||||
@ -117,7 +117,7 @@ VIDEO_START( iremm15 )
|
||||
|
||||
machine->gfx[0] = allocgfx(&charlayout);
|
||||
machine->gfx[0]->total_colors = 8;
|
||||
|
||||
|
||||
decodegfx(machine->gfx[0], state->chargen,0,256);
|
||||
|
||||
video_start_generic(machine);
|
||||
|
@ -964,9 +964,9 @@ static void update_cluts(running_machine *machine, int fake_palette_offset, int
|
||||
static void draw_bg(running_machine *machine, mame_bitmap *dst, tilemap *src, const UINT16* scrollx, const UINT16* scrolly, const UINT16* tilemap_ram, int tile_bank, int xscroll_offset, int yscroll_offset, int xsize, int ysize)
|
||||
{
|
||||
/*
|
||||
Each tile (0x4000 of them) has a lookup table in ROM to build an individual 3-bit palette
|
||||
from sets of 8 bit palettes!
|
||||
*/
|
||||
Each tile (0x4000 of them) has a lookup table in ROM to build an individual 3-bit palette
|
||||
from sets of 8 bit palettes!
|
||||
*/
|
||||
const UINT8* tile_cluts = memory_region(REGION_GFX4);
|
||||
const mame_bitmap *src_bitmap = tilemap_get_pixmap(src);
|
||||
int src_y_mask=ysize-1;
|
||||
@ -989,8 +989,8 @@ static void draw_bg(running_machine *machine, mame_bitmap *dst, tilemap *src, co
|
||||
p=*BITMAP_ADDR16(src_bitmap, src_y&src_y_mask, src_x&src_x_mask);
|
||||
pp=tile_cluts[tile*8 + (p&0x7)];
|
||||
ppp=pp + ((p&0x78)<<5);
|
||||
|
||||
if ((p&0x7)!=0 || ((p&0x7)==0 && (pp&0x7)!=0)) // Transparent pixels are set by both the tile pixel data==0 AND colour palette==0
|
||||
|
||||
if ((p&0x7)!=0 || ((p&0x7)==0 && (pp&0x7)!=0)) // Transparent pixels are set by both the tile pixel data==0 AND colour palette==0
|
||||
*BITMAP_ADDR32(dst, y, x) = machine->pens[ppp];
|
||||
}
|
||||
}
|
||||
@ -1048,7 +1048,7 @@ VIDEO_UPDATE( cyclwarr )
|
||||
draw_bg(machine, bitmap, layer1, &cyclwarr_videoram0[0x000], &cyclwarr_videoram0[0x100], cyclwarr_videoram0, bigfight_a40000[0], 8, -0x40, 1024, 2048);
|
||||
update_cluts(machine, 8192, 4096, 8192);
|
||||
draw_sprites(machine, bitmap,cliprect,0,(tatsumi_sprite_control_ram[0xe0]&0x1000) ? 0x1000 : 0);
|
||||
draw_bg(machine, bitmap, layer0, &cyclwarr_videoram0[0x200], &cyclwarr_videoram0[0x300], cyclwarr_videoram0, bigfight_a40000[0], 0x10, -0x80, 512, 4096);
|
||||
draw_bg(machine, bitmap, layer0, &cyclwarr_videoram0[0x200], &cyclwarr_videoram0[0x300], cyclwarr_videoram0, bigfight_a40000[0], 0x10, -0x80, 512, 4096);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -754,7 +754,7 @@ try_again:
|
||||
if (d3d->create_error_count < 10)
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
// fatal error if we just can't do it
|
||||
mame_printf_error("Unable to create the Direct3D device (%08X)\n", (UINT32)result);
|
||||
return 1;
|
||||
|
@ -9,4 +9,4 @@
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
const char build_version[] = "0.122u3 ("__DATE__")";
|
||||
const char build_version[] = "0.122u4 ("__DATE__")";
|
||||
|
Loading…
Reference in New Issue
Block a user