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more peripheral logic + notes (nw)
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@ -1,5 +1,12 @@
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/* V53 */
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// V33 / V33A cores with onboard peripherals
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// Interrupt Controller is uPD71059 equivalent
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// DMA Controller can operate in modes providing a subset of the uPD71071 or uPD71037 functionality (some modes unavailable / settings ignored)
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// Serial Controller is based on the uPD71051 but with some changes
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// Timer Unit is functionally identical to uPD71054
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#include "emu.h"
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#include "v53.h"
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@ -193,24 +200,35 @@ void v53_base_device::install_peripheral_io()
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if (m_OPSEL & 0x01) // DMA Unit available
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{
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if (IOAG) // 8-bit
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if (m_SCTL & 0x02) // uPD71037 mode
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{
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if (IOAG) // 8-bit
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{
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}
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else
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{
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}
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}
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else
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{
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}
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}
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if (m_OPSEL & 0x02) // Interupt Control Unit available
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{
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UINT16 base = (m_OPHA << 8) | m_IULA;
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if (IOAG) // 8-bit
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{
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}
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else
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{
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space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8_delegate(FUNC(v53_base_device::icu_0_r), this), write8_delegate(FUNC(v53_base_device::icu_0_w), this), 0x00ff);
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space(AS_IO).install_readwrite_handler(base+0x02, base+0x03, read8_delegate(FUNC(v53_base_device::icu_1_r), this), write8_delegate(FUNC(v53_base_device::icu_1_w), this), 0x00ff);
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}
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}
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@ -218,7 +236,7 @@ void v53_base_device::install_peripheral_io()
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if (m_OPSEL & 0x04) // Timer Control Unit available
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{
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UINT16 base = (m_OPHA << 8) | m_TULA;
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printf("installing TCU to %04x\n", base);
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//printf("installing TCU to %04x\n", base);
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if (IOAG) // 8-bit
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{
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@ -235,19 +253,90 @@ void v53_base_device::install_peripheral_io()
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if (m_OPSEL & 0x08) // Serial Control Unit available
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{
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UINT16 base = (m_OPHA << 8) | m_SULA;
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if (IOAG) // 8-bit
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{
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}
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else
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{
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space(AS_IO).install_readwrite_handler(base+0x00, base+0x01, read8_delegate(FUNC(v53_base_device::scu_srb_r), this), write8_delegate(FUNC(v53_base_device::scu_stb_w), this), 0x00ff);
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space(AS_IO).install_readwrite_handler(base+0x02, base+0x03, read8_delegate(FUNC(v53_base_device::scu_sst_r), this), write8_delegate(FUNC(v53_base_device::scu_scm_w), this), 0x00ff);
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space(AS_IO).install_write_handler(base+0x04, base+0x05, write8_delegate(FUNC(v53_base_device::scu_smd_w), this), 0x00ff);
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space(AS_IO).install_readwrite_handler(base+0x06, base+0x07, read8_delegate(FUNC(v53_base_device::scu_simk_r), this), write8_delegate(FUNC(v53_base_device::scu_simk_w), this), 0x00ff);
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}
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}
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}
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/*** ICU ***/
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READ8_MEMBER(v53_base_device::icu_0_r)
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{
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printf("v53: icu_0_r\n");
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return 0;
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}
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WRITE8_MEMBER(v53_base_device::icu_0_w)
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{
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printf("v53: icu_0_w %02x\n", data);
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}
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READ8_MEMBER(v53_base_device::icu_1_r)
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{
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printf("v53: icu_1_r\n");
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return 0;
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}
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WRITE8_MEMBER(v53_base_device::icu_1_w)
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{
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printf("v53: icu_1_w %02x\n", data);
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}
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/*** SCU ***/
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READ8_MEMBER(v53_base_device::scu_srb_r)
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{
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printf("v53: scu_srb_r\n");
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return 0;
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}
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WRITE8_MEMBER(v53_base_device::scu_stb_w)
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{
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printf("v53: scu_stb_w %02x\n", data);
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}
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READ8_MEMBER(v53_base_device::scu_sst_r)
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{
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printf("v53: scu_sst_r\n");
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return 0;
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}
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WRITE8_MEMBER(v53_base_device::scu_scm_w)
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{
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printf("v53: scu_scm_w %02x\n", data);
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}
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WRITE8_MEMBER(v53_base_device::scu_smd_w)
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{
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printf("v53: scu_smd_w %02x\n", data);
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}
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READ8_MEMBER(v53_base_device::scu_simk_r)
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{
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printf("v53: scu_simk_r\n");
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return 0;
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}
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WRITE8_MEMBER(v53_base_device::scu_simk_w)
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{
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printf("v53: scu_simk_w %02x\n", data);
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}
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/*** TCU ***/
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READ8_MEMBER(v53_base_device::tmu_tst0_r)
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@ -48,6 +48,21 @@ public:
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DECLARE_WRITE8_MEMBER(tmu_tct2_w);
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DECLARE_WRITE8_MEMBER(tmu_tmd_w);
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// SCU
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DECLARE_READ8_MEMBER(scu_srb_r);
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DECLARE_WRITE8_MEMBER(scu_stb_w);
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DECLARE_READ8_MEMBER(scu_sst_r);
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DECLARE_WRITE8_MEMBER(scu_scm_w);
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DECLARE_WRITE8_MEMBER(scu_smd_w);
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DECLARE_READ8_MEMBER(scu_simk_r);
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DECLARE_WRITE8_MEMBER(scu_simk_w);
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// ICU
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DECLARE_READ8_MEMBER(icu_0_r);
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DECLARE_WRITE8_MEMBER(icu_0_w);
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DECLARE_READ8_MEMBER(icu_1_r);
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DECLARE_WRITE8_MEMBER(icu_1_w);
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void install_peripheral_io();
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const address_space_config m_io_space_config;
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