mirror of
https://github.com/holub/mame
synced 2025-05-22 05:38:52 +03:00
More warning fixes for mame/machine
This commit is contained in:
Couriersud
parent
c40879b61f
commit
cdd245a3a6
@ -200,8 +200,9 @@ WRITE8_HANDLER( ajax_bankswitch_2_w )
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MACHINE_RESET( ajax )
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{
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ajax_bankswitch_w(machine, 0, 0);
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ajax_bankswitch_2_w(machine, 0, 0);
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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ajax_bankswitch_w(space, 0, 0);
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ajax_bankswitch_2_w(space, 0, 0);
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}
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INTERRUPT_GEN( ajax_interrupt )
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@ -219,14 +219,15 @@ UINT8 line;
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MACHINE_RESET( bagman )
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{
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bagman_pal16r6_w(machine,0,1); /*pin 2*/
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bagman_pal16r6_w(machine,1,1); /*pin 3*/
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bagman_pal16r6_w(machine,2,1); /*pin 4*/
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bagman_pal16r6_w(machine,3,1); /*pin 5*/
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bagman_pal16r6_w(machine,4,1); /*pin 6*/
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bagman_pal16r6_w(machine,5,1); /*pin 7*/
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bagman_pal16r6_w(machine,6,1); /*pin 8*/
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bagman_pal16r6_w(machine,7,1); /*pin 9*/
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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bagman_pal16r6_w(space,0,1); /*pin 2*/
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bagman_pal16r6_w(space,1,1); /*pin 3*/
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bagman_pal16r6_w(space,2,1); /*pin 4*/
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bagman_pal16r6_w(space,3,1); /*pin 5*/
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bagman_pal16r6_w(space,4,1); /*pin 6*/
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bagman_pal16r6_w(space,5,1); /*pin 7*/
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bagman_pal16r6_w(space,6,1); /*pin 8*/
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bagman_pal16r6_w(space,7,1); /*pin 9*/
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update_pal();
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}
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@ -147,6 +147,7 @@ static TIMER_CALLBACK( interrupt_timer )
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MACHINE_RESET( balsente )
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{
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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int numbanks, i;
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/* create the polynomial tables */
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@ -176,8 +177,8 @@ MACHINE_RESET( balsente )
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grudge_steering_result = 0;
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/* reset the 6850 chips */
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balsente_m6850_w(machine, 0, 3);
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balsente_m6850_sound_w(machine, 0, 3);
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balsente_m6850_w(space, 0, 3);
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balsente_m6850_sound_w(space, 0, 3);
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/* reset the noise generator */
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memset(noise_position, 0, sizeof(noise_position));
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@ -1522,7 +1522,7 @@ READ8_HANDLER( decocass_e5xx_r )
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else
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{
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if (decocass_dongle_r)
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data = (*decocass_dongle_r)(space->machine, offset);
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data = (*decocass_dongle_r)(space, offset);
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else
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data = 0xff;
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}
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@ -1533,7 +1533,7 @@ WRITE8_HANDLER( decocass_e5xx_w )
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{
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if (decocass_dongle_w)
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{
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(*decocass_dongle_w)(space->machine, offset, data);
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(*decocass_dongle_w)(space, offset, data);
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return;
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}
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@ -386,6 +386,7 @@ Pin layout is such that links can replace the PAL if encryption is not used.
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DRIVER_INIT( 4in1 )
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{
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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offs_t i, len = memory_region_length(machine, "main");
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UINT8 *RAM = memory_region(machine, "main");
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@ -396,7 +397,7 @@ DRIVER_INIT( 4in1 )
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/* games are banked at 0x0000 - 0x3fff */
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memory_configure_bank(1, 0, 4, &RAM[0x10000], 0x4000);
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_4in1_bank_w(machine, 0, 0); /* set the initial CPU bank */
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_4in1_bank_w(space, 0, 0); /* set the initial CPU bank */
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state_save_register_global(_4in1_bank);
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}
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@ -20,13 +20,13 @@ static UINT8 K056800_host_reg_r(int reg)
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return value;
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}
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static void K056800_host_reg_w(running_machine *machine, int reg, UINT8 data)
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static void K056800_host_reg_w(const address_space *space, int reg, UINT8 data)
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{
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K056800_sound_reg[reg] = data;
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if (reg == 7)
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{
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K056800_sound_irq_callback(machine, 1);
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K056800_sound_irq_callback(space->machine, 1);
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}
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}
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@ -212,7 +212,7 @@ static UINT32 dsp_comm_sharc_r(int board, int offset)
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return dsp_comm_ppc[board][offset];
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}
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static void dsp_comm_sharc_w(running_machine *machine, int board, int offset, UINT32 data)
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static void dsp_comm_sharc_w(const address_space *space, int board, int offset, UINT32 data)
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{
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if (offset >= 2)
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{
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@ -225,14 +225,14 @@ static void dsp_comm_sharc_w(running_machine *machine, int board, int offset, UI
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case CGBOARD_TYPE_GTICLUB:
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{
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//cpu_set_input_line(machine->cpu[2], SHARC_INPUT_FLAG0, ASSERT_LINE);
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cpu_push_context(machine->cpu[2]);
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cpu_push_context(space->machine->cpu[2]);
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sharc_set_flag_input(0, ASSERT_LINE);
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cpu_pop_context();
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if (offset == 1)
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{
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if (data & 0x03)
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cpu_set_input_line(machine->cpu[2], INPUT_LINE_IRQ2, ASSERT_LINE);
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cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_IRQ2, ASSERT_LINE);
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}
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break;
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}
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@ -246,7 +246,7 @@ static void dsp_comm_sharc_w(running_machine *machine, int board, int offset, UI
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if (data & 0x01 || data & 0x10)
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{
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cpu_push_context(machine->cpu[board == 0 ? 2 : 3]);
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cpu_push_context(space->machine->cpu[board == 0 ? 2 : 3]);
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sharc_set_flag_input(1, ASSERT_LINE);
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cpu_pop_context();
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}
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@ -523,7 +523,7 @@ WRITE32_HANDLER(K033906_0_w)
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{
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if (pci_bridge_enable[0])
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{
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K033906_w(space, 0, offset, data);
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K033906_w(space->machine, 0, offset, data);
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}
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else
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{
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@ -554,7 +554,7 @@ WRITE32_HANDLER(K033906_1_w)
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{
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if (pci_bridge_enable[1])
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{
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K033906_w(space, 1, offset, data);
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K033906_w(space->machine, 1, offset, data);
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}
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else
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{
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@ -373,11 +373,12 @@ MACHINE_START( leland )
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MACHINE_RESET( leland )
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{
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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timer_adjust_oneshot(master_int_timer, video_screen_get_time_until_pos(machine->primary_screen, 8, 0), 8);
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/* reset globals */
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leland_gfx_control = 0x00;
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leland_sound_port_w(machine, 0, 0xff);
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leland_sound_port_w(space, 0, 0xff);
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wcol_enable = 0;
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dangerz_x = 512;
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@ -1100,7 +1101,7 @@ READ8_HANDLER( leland_master_analog_key_r )
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break;
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case 0x02: /* FF = keycard serial data read */
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result = keycard_r(space);
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result = keycard_r(space->machine);
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/* bit 7 indicates the analog input is busy for some games */
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result &= ~0x80;
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@ -1132,7 +1133,7 @@ WRITE8_HANDLER( leland_master_analog_key_w )
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break;
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case 0x02: /* FF = keycard data write */
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keycard_w(space, data);
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keycard_w(space->machine, data);
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break;
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}
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}
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@ -596,7 +596,8 @@ static void zwackery_pia_irq(running_machine *machine, int state)
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static TIMER_CALLBACK( zwackery_493_off_callback )
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{
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pia_2_ca1_w(machine, 0, 0);
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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pia_2_ca1_w(space, 0, 0);
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}
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@ -885,26 +886,26 @@ static READ16_HANDLER( mcr68_6840_r_common )
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WRITE16_HANDLER( mcr68_6840_upper_w )
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{
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if (ACCESSING_BITS_8_15)
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mcr68_6840_w_common(space->machine, offset, (data >> 8) & 0xff);
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mcr68_6840_w_common(space, offset, (data >> 8) & 0xff);
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}
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WRITE16_HANDLER( mcr68_6840_lower_w )
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{
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if (ACCESSING_BITS_0_7)
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mcr68_6840_w_common(space->machine, offset, data & 0xff);
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mcr68_6840_w_common(space, offset, data & 0xff);
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}
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READ16_HANDLER( mcr68_6840_upper_r )
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{
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return (mcr68_6840_r_common(space->machine,offset,0) << 8) | 0x00ff;
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return (mcr68_6840_r_common(space,offset,0) << 8) | 0x00ff;
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}
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READ16_HANDLER( mcr68_6840_lower_r )
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{
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return mcr68_6840_r_common(space->machine,offset,0) | 0xff00;
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return mcr68_6840_r_common(space,offset,0) | 0xff00;
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}
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@ -84,6 +84,7 @@ WRITE8_HANDLER( mhavoc_gamma_irq_ack_w )
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MACHINE_RESET( mhavoc )
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{
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const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
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has_gamma_cpu = (machine->cpu[1] != NULL);
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memory_configure_bank(1, 0, 1, mhavoc_zram0, 0);
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@ -91,8 +92,8 @@ MACHINE_RESET( mhavoc )
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memory_configure_bank(2, 0, 4, memory_region(machine, "alpha") + 0x10000, 0x2000);
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/* reset RAM/ROM banks to 0 */
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mhavoc_ram_banksel_w(machine, 0, 0);
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mhavoc_rom_banksel_w(machine, 0, 0);
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mhavoc_ram_banksel_w(space, 0, 0);
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mhavoc_rom_banksel_w(space, 0, 0);
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/* reset alpha comm status */
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alpha_data = 0;
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@ -1001,14 +1001,14 @@ WRITE32_HANDLER( midway_ioasic_w )
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{
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if ((oldreg ^ newreg) & 1)
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{
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cage_control_w(space, 0);
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cage_control_w(space->machine, 0);
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if (!(~newreg & 1))
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cage_control_w(space, 3);
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cage_control_w(space->machine, 3);
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}
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}
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/* FIFO reset? */
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midway_ioasic_fifo_reset_w(space, ~newreg & 4);
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midway_ioasic_fifo_reset_w(space->machine, ~newreg & 4);
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break;
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case IOASIC_SOUNDOUT:
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@ -1025,11 +1025,11 @@ WRITE32_HANDLER( midway_ioasic_w )
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case IOASIC_PICOUT:
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if (ioasic.shuffle_type == MIDWAY_IOASIC_VAPORTRX)
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midway_serial_pic2_w(space, newreg ^ 0x0a);
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midway_serial_pic2_w(space->machine, newreg ^ 0x0a);
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else if (ioasic.shuffle_type == MIDWAY_IOASIC_SFRUSHRK)
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midway_serial_pic2_w(space, newreg ^ 0x05);
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midway_serial_pic2_w(space->machine, newreg ^ 0x05);
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else
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midway_serial_pic2_w(space, newreg);
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midway_serial_pic2_w(space->machine, newreg);
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break;
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case IOASIC_INTCTL:
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@ -30,39 +30,39 @@ typedef struct
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static bankhandler namcos1_bank_element[NAMCOS1_MAX_BANK];
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static bankhandler namcos1_active_bank[16];
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static READ8_HANDLER( bank1_r ) { return (*namcos1_active_bank[0].bank_handler_r )(space->machine, offset + namcos1_active_bank[0].bank_offset); }
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static READ8_HANDLER( bank2_r ) { return (*namcos1_active_bank[1].bank_handler_r )(space->machine, offset + namcos1_active_bank[1].bank_offset); }
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static READ8_HANDLER( bank3_r ) { return (*namcos1_active_bank[2].bank_handler_r )(space->machine, offset + namcos1_active_bank[2].bank_offset); }
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static READ8_HANDLER( bank4_r ) { return (*namcos1_active_bank[3].bank_handler_r )(space->machine, offset + namcos1_active_bank[3].bank_offset); }
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static READ8_HANDLER( bank5_r ) { return (*namcos1_active_bank[4].bank_handler_r )(space->machine, offset + namcos1_active_bank[4].bank_offset); }
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static READ8_HANDLER( bank6_r ) { return (*namcos1_active_bank[5].bank_handler_r )(space->machine, offset + namcos1_active_bank[5].bank_offset); }
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static READ8_HANDLER( bank7_r ) { return (*namcos1_active_bank[6].bank_handler_r )(space->machine, offset + namcos1_active_bank[6].bank_offset); }
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static READ8_HANDLER( bank8_r ) { return (*namcos1_active_bank[7].bank_handler_r )(space->machine, offset + namcos1_active_bank[7].bank_offset); }
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static READ8_HANDLER( bank9_r ) { return (*namcos1_active_bank[8].bank_handler_r )(space->machine, offset + namcos1_active_bank[8].bank_offset); }
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static READ8_HANDLER( bank10_r ) { return (*namcos1_active_bank[9].bank_handler_r )(space->machine, offset + namcos1_active_bank[9].bank_offset); }
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static READ8_HANDLER( bank11_r ) { return (*namcos1_active_bank[10].bank_handler_r)(space->machine, offset + namcos1_active_bank[10].bank_offset); }
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static READ8_HANDLER( bank12_r ) { return (*namcos1_active_bank[11].bank_handler_r)(space->machine, offset + namcos1_active_bank[11].bank_offset); }
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static READ8_HANDLER( bank13_r ) { return (*namcos1_active_bank[12].bank_handler_r)(space->machine, offset + namcos1_active_bank[12].bank_offset); }
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static READ8_HANDLER( bank14_r ) { return (*namcos1_active_bank[13].bank_handler_r)(space->machine, offset + namcos1_active_bank[13].bank_offset); }
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static READ8_HANDLER( bank15_r ) { return (*namcos1_active_bank[14].bank_handler_r)(space->machine, offset + namcos1_active_bank[14].bank_offset); }
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static READ8_HANDLER( bank16_r ) { return (*namcos1_active_bank[15].bank_handler_r)(space->machine, offset + namcos1_active_bank[15].bank_offset); }
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static READ8_HANDLER( bank1_r ) { return (*namcos1_active_bank[0].bank_handler_r )(space, offset + namcos1_active_bank[0].bank_offset); }
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static READ8_HANDLER( bank2_r ) { return (*namcos1_active_bank[1].bank_handler_r )(space, offset + namcos1_active_bank[1].bank_offset); }
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static READ8_HANDLER( bank3_r ) { return (*namcos1_active_bank[2].bank_handler_r )(space, offset + namcos1_active_bank[2].bank_offset); }
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static READ8_HANDLER( bank4_r ) { return (*namcos1_active_bank[3].bank_handler_r )(space, offset + namcos1_active_bank[3].bank_offset); }
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static READ8_HANDLER( bank5_r ) { return (*namcos1_active_bank[4].bank_handler_r )(space, offset + namcos1_active_bank[4].bank_offset); }
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static READ8_HANDLER( bank6_r ) { return (*namcos1_active_bank[5].bank_handler_r )(space, offset + namcos1_active_bank[5].bank_offset); }
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static READ8_HANDLER( bank7_r ) { return (*namcos1_active_bank[6].bank_handler_r )(space, offset + namcos1_active_bank[6].bank_offset); }
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static READ8_HANDLER( bank8_r ) { return (*namcos1_active_bank[7].bank_handler_r )(space, offset + namcos1_active_bank[7].bank_offset); }
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static READ8_HANDLER( bank9_r ) { return (*namcos1_active_bank[8].bank_handler_r )(space, offset + namcos1_active_bank[8].bank_offset); }
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static READ8_HANDLER( bank10_r ) { return (*namcos1_active_bank[9].bank_handler_r )(space, offset + namcos1_active_bank[9].bank_offset); }
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static READ8_HANDLER( bank11_r ) { return (*namcos1_active_bank[10].bank_handler_r)(space, offset + namcos1_active_bank[10].bank_offset); }
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static READ8_HANDLER( bank12_r ) { return (*namcos1_active_bank[11].bank_handler_r)(space, offset + namcos1_active_bank[11].bank_offset); }
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static READ8_HANDLER( bank13_r ) { return (*namcos1_active_bank[12].bank_handler_r)(space, offset + namcos1_active_bank[12].bank_offset); }
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static READ8_HANDLER( bank14_r ) { return (*namcos1_active_bank[13].bank_handler_r)(space, offset + namcos1_active_bank[13].bank_offset); }
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static READ8_HANDLER( bank15_r ) { return (*namcos1_active_bank[14].bank_handler_r)(space, offset + namcos1_active_bank[14].bank_offset); }
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static READ8_HANDLER( bank16_r ) { return (*namcos1_active_bank[15].bank_handler_r)(space, offset + namcos1_active_bank[15].bank_offset); }
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static WRITE8_HANDLER( bank1_w ) { (*namcos1_active_bank[0].bank_handler_w )(space->machine, offset + namcos1_active_bank[0].bank_offset, data); }
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static WRITE8_HANDLER( bank2_w ) { (*namcos1_active_bank[1].bank_handler_w )(space->machine, offset + namcos1_active_bank[1].bank_offset, data); }
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static WRITE8_HANDLER( bank3_w ) { (*namcos1_active_bank[2].bank_handler_w )(space->machine, offset + namcos1_active_bank[2].bank_offset, data); }
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static WRITE8_HANDLER( bank4_w ) { (*namcos1_active_bank[3].bank_handler_w )(space->machine, offset + namcos1_active_bank[3].bank_offset, data); }
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static WRITE8_HANDLER( bank5_w ) { (*namcos1_active_bank[4].bank_handler_w )(space->machine, offset + namcos1_active_bank[4].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank6_w ) { (*namcos1_active_bank[5].bank_handler_w )(space->machine, offset + namcos1_active_bank[5].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank7_w ) { (*namcos1_active_bank[6].bank_handler_w )(space->machine, offset + namcos1_active_bank[6].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank8_w ) { (*namcos1_active_bank[7].bank_handler_w )(space->machine, offset + namcos1_active_bank[7].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank9_w ) { (*namcos1_active_bank[8].bank_handler_w )(space->machine, offset + namcos1_active_bank[8].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank10_w ) { (*namcos1_active_bank[9].bank_handler_w )(space->machine, offset + namcos1_active_bank[9].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank11_w ) { (*namcos1_active_bank[10].bank_handler_w)(space->machine, offset + namcos1_active_bank[10].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank12_w ) { (*namcos1_active_bank[11].bank_handler_w)(space->machine, offset + namcos1_active_bank[11].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank13_w ) { (*namcos1_active_bank[12].bank_handler_w)(space->machine, offset + namcos1_active_bank[12].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank14_w ) { (*namcos1_active_bank[13].bank_handler_w)(space->machine, offset + namcos1_active_bank[13].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank15_w ) { (*namcos1_active_bank[14].bank_handler_w)(space->machine, offset + namcos1_active_bank[14].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank16_w ) { (*namcos1_active_bank[15].bank_handler_w)(space->machine, offset + namcos1_active_bank[15].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank1_w ) { (*namcos1_active_bank[0].bank_handler_w )(space, offset + namcos1_active_bank[0].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank2_w ) { (*namcos1_active_bank[1].bank_handler_w )(space, offset + namcos1_active_bank[1].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank3_w ) { (*namcos1_active_bank[2].bank_handler_w )(space, offset + namcos1_active_bank[2].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank4_w ) { (*namcos1_active_bank[3].bank_handler_w )(space, offset + namcos1_active_bank[3].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank5_w ) { (*namcos1_active_bank[4].bank_handler_w )(space, offset + namcos1_active_bank[4].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank6_w ) { (*namcos1_active_bank[5].bank_handler_w )(space, offset + namcos1_active_bank[5].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank7_w ) { (*namcos1_active_bank[6].bank_handler_w )(space, offset + namcos1_active_bank[6].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank8_w ) { (*namcos1_active_bank[7].bank_handler_w )(space, offset + namcos1_active_bank[7].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank9_w ) { (*namcos1_active_bank[8].bank_handler_w )(space, offset + namcos1_active_bank[8].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank10_w ) { (*namcos1_active_bank[9].bank_handler_w )(space, offset + namcos1_active_bank[9].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank11_w ) { (*namcos1_active_bank[10].bank_handler_w)(space, offset + namcos1_active_bank[10].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank12_w ) { (*namcos1_active_bank[11].bank_handler_w)(space, offset + namcos1_active_bank[11].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank13_w ) { (*namcos1_active_bank[12].bank_handler_w)(space, offset + namcos1_active_bank[12].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank14_w ) { (*namcos1_active_bank[13].bank_handler_w)(space, offset + namcos1_active_bank[13].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank15_w ) { (*namcos1_active_bank[14].bank_handler_w)(space, offset + namcos1_active_bank[14].bank_offset, data); }
|
||||
static WRITE8_HANDLER( bank16_w ) { (*namcos1_active_bank[15].bank_handler_w)(space, offset + namcos1_active_bank[15].bank_offset, data); }
|
||||
|
||||
static const read8_machine_func ram_bank_handler_r[16] =
|
||||
{
|
||||
|
||||
@ -105,6 +105,7 @@ MACHINE_START( namcos2 )
|
||||
|
||||
MACHINE_RESET( namcos2 )
|
||||
{
|
||||
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
int loop;
|
||||
mFinalLapProtCount = 0;
|
||||
namcos2_mcu_analog_ctrl=0;
|
||||
@ -113,7 +114,7 @@ MACHINE_RESET( namcos2 )
|
||||
sendval = 0;
|
||||
|
||||
/* Initialise the bank select in the sound CPU */
|
||||
namcos2_sound_bankselect_w(machine,0,0); /* Page in bank 0 */
|
||||
namcos2_sound_bankselect_w(space,0,0); /* Page in bank 0 */
|
||||
|
||||
cpu_set_input_line(machine->cpu[CPU_SOUND], INPUT_LINE_RESET, ASSERT_LINE );
|
||||
|
||||
|
||||
@ -133,7 +133,7 @@ static UINT16 read16(int address)
|
||||
|
||||
*****************************/
|
||||
|
||||
static void oki_play_sample(running_machine *machine, int sample_no)
|
||||
static void oki_play_sample(const address_space *space, int sample_no)
|
||||
{
|
||||
UINT16 table_start = (sample_no & 0x80) ? read16(SAMPLE_TABLE_1) : read16(SAMPLE_TABLE_0);
|
||||
UINT8 byte1 = read8(table_start + 2 * (sample_no & 0x7f) + 0);
|
||||
@ -144,9 +144,9 @@ static void oki_play_sample(running_machine *machine, int sample_no)
|
||||
{
|
||||
// stop all channels
|
||||
if (chip == 0)
|
||||
okim6295_data_0_w(machine, 0, 0x78 );
|
||||
okim6295_data_0_w(space, 0, 0x78 );
|
||||
else
|
||||
okim6295_data_1_w(machine, 0, 0x78 );
|
||||
okim6295_data_1_w(space, 0, 0x78 );
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -161,13 +161,13 @@ static void oki_play_sample(running_machine *machine, int sample_no)
|
||||
|
||||
// stop channel
|
||||
if (chip == 0)
|
||||
okim6295_data_0_w(machine, 0, (0x08 << ch) );
|
||||
okim6295_data_0_w(space, 0, (0x08 << ch) );
|
||||
else
|
||||
okim6295_data_1_w(machine, 0, (0x08 << ch) );
|
||||
okim6295_data_1_w(space, 0, (0x08 << ch) );
|
||||
|
||||
if (sample != 0)
|
||||
{
|
||||
UINT8 *rom = memory_region(machine, (chip == 0) ? "oki1" : "oki2");
|
||||
UINT8 *rom = memory_region(space->machine, (chip == 0) ? "oki1" : "oki2");
|
||||
int bank = (byte2 & 0x0c) >> 2;
|
||||
int vol = (byte2 & 0x70) >> 4;
|
||||
|
||||
@ -176,21 +176,21 @@ static void oki_play_sample(running_machine *machine, int sample_no)
|
||||
|
||||
if (chip == 0)
|
||||
{
|
||||
okim6295_data_0_w(machine, 0, 0x80 | sample );
|
||||
okim6295_data_0_w(machine, 0, (0x10 << ch) | vol );
|
||||
okim6295_data_0_w(space, 0, 0x80 | sample );
|
||||
okim6295_data_0_w(space, 0, (0x10 << ch) | vol );
|
||||
}
|
||||
else
|
||||
{
|
||||
okim6295_data_1_w(machine, 0, 0x80 | sample );
|
||||
okim6295_data_1_w(machine, 0, (0x10 << ch) | vol );
|
||||
okim6295_data_1_w(space, 0, 0x80 | sample );
|
||||
okim6295_data_1_w(space, 0, (0x10 << ch) | vol );
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void oki_update_state(running_machine *machine)
|
||||
static void oki_update_state(const address_space *space)
|
||||
{
|
||||
NMK004_state.oki_playing = ((okim6295_status_1_r(machine, 0) & 0x0f) << 4) | (okim6295_status_0_r(machine, 0) & 0x0f);
|
||||
NMK004_state.oki_playing = ((okim6295_status_1_r(space, 0) & 0x0f) << 4) | (okim6295_status_0_r(space, 0) & 0x0f);
|
||||
}
|
||||
|
||||
|
||||
@ -201,7 +201,7 @@ static void oki_update_state(running_machine *machine)
|
||||
|
||||
*****************************/
|
||||
|
||||
static void effects_update(running_machine *machine, int channel)
|
||||
static void effects_update(const address_space *space, int channel)
|
||||
{
|
||||
struct effects_control *effects = &NMK004_state.effects_control[channel];
|
||||
|
||||
@ -233,7 +233,7 @@ static void effects_update(running_machine *machine, int channel)
|
||||
switch (token)
|
||||
{
|
||||
case 0xef: // play sample
|
||||
oki_play_sample(machine, read8(effects->current++));
|
||||
oki_play_sample(space, read8(effects->current++));
|
||||
break;
|
||||
|
||||
case 0xf6: // jump
|
||||
@ -308,7 +308,7 @@ static void effects_update(running_machine *machine, int channel)
|
||||
|
||||
*****************************/
|
||||
|
||||
static void fm_update(running_machine *machine, int channel)
|
||||
static void fm_update(const address_space *space, int channel)
|
||||
{
|
||||
struct fm_control *fm = &NMK004_state.fm_control[channel];
|
||||
|
||||
@ -356,8 +356,8 @@ static void fm_update(running_machine *machine, int channel)
|
||||
fm->slot = read8(fm->current++);
|
||||
if (channel < 3 || !(NMK004_state.fm_control[channel-3].flags & FM_FLAG_ACTIVE))
|
||||
{
|
||||
ym2203_control_port_0_w(machine, 0, 0x28); // keyon/off
|
||||
ym2203_write_port_0_w(machine, 0, channel % 3);
|
||||
ym2203_control_port_0_w(space, 0, 0x28); // keyon/off
|
||||
ym2203_write_port_0_w(space, 0, channel % 3);
|
||||
}
|
||||
break;
|
||||
|
||||
@ -585,7 +585,7 @@ popmessage("%02x %02x%02x%02x%02x %02x %02x%02x%02x%02x %02x %02x%02x%02x%02x",
|
||||
}
|
||||
|
||||
|
||||
static void fm_voices_update(running_machine *machine)
|
||||
static void fm_voices_update(const address_space *space )
|
||||
{
|
||||
static const int ym2203_registers[0x18] =
|
||||
{
|
||||
@ -605,8 +605,8 @@ static void fm_voices_update(running_machine *machine)
|
||||
|
||||
for (i = 0; i < 0x18; i++)
|
||||
{
|
||||
ym2203_control_port_0_w(machine, 0, ym2203_registers[i] + channel);
|
||||
ym2203_write_port_0_w(machine, 0, fm1->voice_params[i]);
|
||||
ym2203_control_port_0_w(space, 0, ym2203_registers[i] + channel);
|
||||
ym2203_write_port_0_w(space, 0, fm1->voice_params[i]);
|
||||
}
|
||||
}
|
||||
|
||||
@ -618,8 +618,8 @@ static void fm_voices_update(running_machine *machine)
|
||||
{
|
||||
for (i = 0; i < 0x18; i++)
|
||||
{
|
||||
ym2203_control_port_0_w(machine, 0, ym2203_registers[i] + channel);
|
||||
ym2203_write_port_0_w(machine, 0, fm2->voice_params[i]);
|
||||
ym2203_control_port_0_w(space, 0, ym2203_registers[i] + channel);
|
||||
ym2203_write_port_0_w(space, 0, fm2->voice_params[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -627,25 +627,25 @@ static void fm_voices_update(running_machine *machine)
|
||||
|
||||
if (fm1->flags & FM_FLAG_ACTIVE)
|
||||
{
|
||||
ym2203_control_port_0_w(machine, 0, 0xb0 + channel); // self-feedback
|
||||
ym2203_write_port_0_w(machine, 0, fm1->self_feedback);
|
||||
ym2203_control_port_0_w(space, 0, 0xb0 + channel); // self-feedback
|
||||
ym2203_write_port_0_w(space, 0, fm1->self_feedback);
|
||||
|
||||
ym2203_control_port_0_w(machine, 0, 0xa4 + channel); // F-number
|
||||
ym2203_write_port_0_w(machine, 0, fm1->f_number >> 8);
|
||||
ym2203_control_port_0_w(space, 0, 0xa4 + channel); // F-number
|
||||
ym2203_write_port_0_w(space, 0, fm1->f_number >> 8);
|
||||
|
||||
ym2203_control_port_0_w(machine, 0, 0xa0 + channel); // F-number
|
||||
ym2203_write_port_0_w(machine, 0, fm1->f_number & 0xff);
|
||||
ym2203_control_port_0_w(space, 0, 0xa0 + channel); // F-number
|
||||
ym2203_write_port_0_w(space, 0, fm1->f_number & 0xff);
|
||||
}
|
||||
else
|
||||
{
|
||||
ym2203_control_port_0_w(machine, 0, 0xb0 + channel); // self-feedback
|
||||
ym2203_write_port_0_w(machine, 0, fm2->self_feedback);
|
||||
ym2203_control_port_0_w(space, 0, 0xb0 + channel); // self-feedback
|
||||
ym2203_write_port_0_w(space, 0, fm2->self_feedback);
|
||||
|
||||
ym2203_control_port_0_w(machine, 0, 0xa4 + channel); // F-number
|
||||
ym2203_write_port_0_w(machine, 0, fm2->f_number >> 8);
|
||||
ym2203_control_port_0_w(space, 0, 0xa4 + channel); // F-number
|
||||
ym2203_write_port_0_w(space, 0, fm2->f_number >> 8);
|
||||
|
||||
ym2203_control_port_0_w(machine, 0, 0xa0 + channel); // F-number
|
||||
ym2203_write_port_0_w(machine, 0, fm2->f_number & 0xff);
|
||||
ym2203_control_port_0_w(space, 0, 0xa0 + channel); // F-number
|
||||
ym2203_write_port_0_w(space, 0, fm2->f_number & 0xff);
|
||||
}
|
||||
|
||||
|
||||
@ -654,8 +654,8 @@ static void fm_voices_update(running_machine *machine)
|
||||
{
|
||||
fm1->flags &= ~FM_FLAG_MUST_SEND_KEYON;
|
||||
|
||||
ym2203_control_port_0_w(machine, 0, 0x28); // keyon/off
|
||||
ym2203_write_port_0_w(machine, 0, fm1->slot | channel);
|
||||
ym2203_control_port_0_w(space, 0, 0x28); // keyon/off
|
||||
ym2203_write_port_0_w(space, 0, fm1->slot | channel);
|
||||
}
|
||||
|
||||
if (fm2->flags & FM_FLAG_MUST_SEND_KEYON)
|
||||
@ -664,8 +664,8 @@ static void fm_voices_update(running_machine *machine)
|
||||
|
||||
if (!(fm1->flags & FM_FLAG_ACTIVE))
|
||||
{
|
||||
ym2203_control_port_0_w(machine, 0, 0x28); // keyon/off
|
||||
ym2203_write_port_0_w(machine, 0, fm2->slot | channel);
|
||||
ym2203_control_port_0_w(space, 0, 0x28); // keyon/off
|
||||
ym2203_write_port_0_w(space, 0, fm2->slot | channel);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -679,7 +679,7 @@ static void fm_voices_update(running_machine *machine)
|
||||
|
||||
*****************************/
|
||||
|
||||
static void psg_update(running_machine *machine, int channel)
|
||||
static void psg_update(const address_space *space, int channel)
|
||||
{
|
||||
struct psg_control *psg = &NMK004_state.psg_control[channel];
|
||||
|
||||
@ -703,11 +703,11 @@ static void psg_update(running_machine *machine, int channel)
|
||||
psg->flags &= ~PSG_FLAG_NOISE_NOT_ENABLED;
|
||||
|
||||
// enable noise, disable tone on this channel
|
||||
ym2203_control_port_0_w(machine, 0, 0x07);
|
||||
enable = ym2203_read_port_0_r(machine, 0);
|
||||
ym2203_control_port_0_w(space, 0, 0x07);
|
||||
enable = ym2203_read_port_0_r(space, 0);
|
||||
enable |= (0x01 << channel); // disable tone
|
||||
enable &= ~(0x08 << channel); // enable noise
|
||||
ym2203_write_port_0_w(machine, 0, enable);
|
||||
ym2203_write_port_0_w(space, 0, enable);
|
||||
}
|
||||
|
||||
|
||||
@ -741,11 +741,11 @@ static void psg_update(running_machine *machine, int channel)
|
||||
psg->flags &= ~PSG_FLAG_NOISE_NOT_ENABLED;
|
||||
|
||||
// enable noise, disable tone on this channel
|
||||
ym2203_control_port_0_w(machine, 0, 0x07);
|
||||
enable = ym2203_read_port_0_r(machine, 0);
|
||||
ym2203_control_port_0_w(space, 0, 0x07);
|
||||
enable = ym2203_read_port_0_r(space, 0);
|
||||
enable |= (0x01 << channel); // disable tone
|
||||
enable &= ~(0x08 << channel); // enable noise
|
||||
ym2203_write_port_0_w(machine, 0, enable);
|
||||
ym2203_write_port_0_w(space, 0, enable);
|
||||
break;
|
||||
|
||||
case 0xf2: // set volume shape
|
||||
@ -790,8 +790,8 @@ static void psg_update(running_machine *machine, int channel)
|
||||
psg->volume_shape = 0;
|
||||
|
||||
// mute channel
|
||||
ym2203_control_port_0_w(machine, 0, 8 + channel);
|
||||
ym2203_write_port_0_w(machine, 0, 0);
|
||||
ym2203_control_port_0_w(space, 0, 8 + channel);
|
||||
ym2203_write_port_0_w(space, 0, 0);
|
||||
return;
|
||||
}
|
||||
}
|
||||
@ -831,10 +831,10 @@ static void psg_update(running_machine *machine, int channel)
|
||||
|
||||
period >>= octave;
|
||||
|
||||
ym2203_control_port_0_w(machine, 0, 2 * channel + 1);
|
||||
ym2203_write_port_0_w(machine, 0, (period & 0x0f00) >> 8);
|
||||
ym2203_control_port_0_w(machine, 0, 2 * channel + 0);
|
||||
ym2203_write_port_0_w(machine, 0, (period & 0x00ff));
|
||||
ym2203_control_port_0_w(space, 0, 2 * channel + 1);
|
||||
ym2203_write_port_0_w(space, 0, (period & 0x0f00) >> 8);
|
||||
ym2203_control_port_0_w(space, 0, 2 * channel + 0);
|
||||
ym2203_write_port_0_w(space, 0, (period & 0x00ff));
|
||||
|
||||
psg->note_period_hi_bits = (period & 0x0f00) >> 8;
|
||||
}
|
||||
@ -847,15 +847,15 @@ static void psg_update(running_machine *machine, int channel)
|
||||
psg->flags |= PSG_FLAG_NOISE_NOT_ENABLED;
|
||||
|
||||
// disable noise, enable tone on this channel
|
||||
ym2203_control_port_0_w(machine, 0, 0x07);
|
||||
enable = ym2203_read_port_0_r(machine, 0);
|
||||
ym2203_control_port_0_w(space, 0, 0x07);
|
||||
enable = ym2203_read_port_0_r(space, 0);
|
||||
enable &= ~(0x01 << channel); // enable tone
|
||||
enable |= (0x08 << channel); // disable noise
|
||||
ym2203_write_port_0_w(machine, 0, enable);
|
||||
ym2203_write_port_0_w(space, 0, enable);
|
||||
}
|
||||
|
||||
ym2203_control_port_0_w(machine, 0, 0x06); // noise period
|
||||
ym2203_write_port_0_w(machine, 0, psg->note);
|
||||
ym2203_control_port_0_w(space, 0, 0x06); // noise period
|
||||
ym2203_write_port_0_w(space, 0, psg->note);
|
||||
psg->note_period_hi_bits = psg->note;
|
||||
}
|
||||
}
|
||||
@ -880,8 +880,8 @@ static void psg_update(running_machine *machine, int channel)
|
||||
volume = 0;
|
||||
|
||||
// set volume
|
||||
ym2203_control_port_0_w(machine, 0, 8 + channel);
|
||||
ym2203_write_port_0_w(machine, 0, volume & 0x0f);
|
||||
ym2203_control_port_0_w(space, 0, 8 + channel);
|
||||
ym2203_write_port_0_w(space, 0, volume & 0x0f);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -894,7 +894,7 @@ static void psg_update(running_machine *machine, int channel)
|
||||
|
||||
*****************************/
|
||||
|
||||
static void get_command(running_machine *machine)
|
||||
static void get_command(const address_space *space)
|
||||
{
|
||||
static const UINT8 from_main[] =
|
||||
{
|
||||
@ -931,7 +931,7 @@ static void get_command(running_machine *machine)
|
||||
|
||||
if ((cmd_table & 0xff00) == 0)
|
||||
{
|
||||
oki_play_sample(machine, cmd_table);
|
||||
oki_play_sample(space, cmd_table);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -979,46 +979,47 @@ static void get_command(running_machine *machine)
|
||||
|
||||
|
||||
|
||||
static void update_music(running_machine *machine)
|
||||
static void update_music(const address_space *space)
|
||||
{
|
||||
int channel;
|
||||
|
||||
for (channel = 0; channel < FM_CHANNELS; channel++)
|
||||
fm_update(machine, channel);
|
||||
fm_voices_update(machine);
|
||||
fm_update(space, channel);
|
||||
fm_voices_update(space);
|
||||
|
||||
for (channel = 0; channel < PSG_CHANNELS; channel++)
|
||||
psg_update(machine, channel);
|
||||
psg_update(space, channel);
|
||||
|
||||
for (channel = 0; channel < EFFECTS_CHANNELS; channel++)
|
||||
effects_update(machine, channel);
|
||||
effects_update(space, channel);
|
||||
}
|
||||
|
||||
|
||||
|
||||
void NMK004_irq(running_machine *machine, int irq)
|
||||
void NMK004_irq(const address_space *space, int irq)
|
||||
{
|
||||
int status;
|
||||
|
||||
if (!irq) return;
|
||||
|
||||
status = ym2203_status_port_0_r(machine,0);
|
||||
status = ym2203_status_port_0_r(space,0);
|
||||
|
||||
if (status & 1) // timer A expired
|
||||
{
|
||||
oki_update_state(machine);
|
||||
get_command(machine);
|
||||
update_music(machine);
|
||||
oki_update_state(space);
|
||||
get_command(space);
|
||||
update_music(space);
|
||||
|
||||
// restart timer
|
||||
ym2203_control_port_0_w(machine, 0, 0x27);
|
||||
ym2203_write_port_0_w(machine, 0, 0x15);
|
||||
ym2203_control_port_0_w(space, 0, 0x27);
|
||||
ym2203_write_port_0_w(space, 0, 0x15);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static TIMER_CALLBACK( real_nmk004_init )
|
||||
{
|
||||
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
static const UINT8 ym2203_init[] =
|
||||
{
|
||||
0x07,0x38,0x08,0x00,0x09,0x00,0x0A,0x00,0x24,0xB3,0x25,0x00,0x26,0xF9,0x27,0x15,
|
||||
@ -1031,18 +1032,18 @@ static TIMER_CALLBACK( real_nmk004_init )
|
||||
|
||||
NMK004_state.rom = memory_region(machine, "audio");
|
||||
|
||||
ym2203_control_port_0_w(machine, 0, 0x2f);
|
||||
ym2203_control_port_0_w(space, 0, 0x2f);
|
||||
|
||||
i = 0;
|
||||
while (ym2203_init[i] != 0xff)
|
||||
{
|
||||
ym2203_control_port_0_w(machine, 0, ym2203_init[i++]);
|
||||
ym2203_write_port_0_w(machine, 0, ym2203_init[i++]);
|
||||
ym2203_control_port_0_w(space, 0, ym2203_init[i++]);
|
||||
ym2203_write_port_0_w(space, 0, ym2203_init[i++]);
|
||||
}
|
||||
|
||||
NMK004_state.oki_playing = 0;
|
||||
|
||||
oki_play_sample(machine, 0);
|
||||
oki_play_sample(space, 0);
|
||||
|
||||
NMK004_state.protection_check = 0;
|
||||
}
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
void NMK004_init(void);
|
||||
void NMK004_irq(running_machine *machine, int irq);
|
||||
void NMK004_irq(const address_space *space, int irq);
|
||||
READ16_HANDLER( NMK004_r );
|
||||
WRITE16_HANDLER( NMK004_w );
|
||||
|
||||
@ -29,6 +29,7 @@ static int MMC2_bank[4], MMC2_bank_latch[2];
|
||||
*************************************/
|
||||
MACHINE_RESET( pc10 )
|
||||
{
|
||||
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
/* initialize latches and flip-flops */
|
||||
pc10_nmi_enable = pc10_dog_di = pc10_dispmask = pc10_sdcs = pc10_int_detect = 0;
|
||||
|
||||
@ -45,8 +46,8 @@ MACHINE_RESET( pc10 )
|
||||
|
||||
/* reset the security chip */
|
||||
RP5H01_enable_w( 0, 0 );
|
||||
RP5H01_0_reset_w( machine, 0, 0 );
|
||||
RP5H01_0_reset_w( machine, 0, 1 );
|
||||
RP5H01_0_reset_w( space, 0, 0 );
|
||||
RP5H01_0_reset_w( space, 0, 1 );
|
||||
RP5H01_enable_w( 0, 1 );
|
||||
|
||||
/* reset the ppu */
|
||||
@ -144,10 +145,10 @@ READ8_HANDLER( pc10_prot_r )
|
||||
/* we only support a single cart connected at slot 0 */
|
||||
if ( cart_sel == 0 )
|
||||
{
|
||||
RP5H01_0_enable_w( space->machine, 0, 0 );
|
||||
RP5H01_0_enable_w( space, 0, 0 );
|
||||
data |= ( ( ~RP5H01_counter_r( 0 ) ) << 4 ) & 0x10; /* D4 */
|
||||
data |= ( ( RP5H01_data_r( 0 ) ) << 3 ) & 0x08; /* D3 */
|
||||
RP5H01_0_enable_w( space->machine, 0, 1 );
|
||||
RP5H01_0_enable_w( space, 0, 1 );
|
||||
}
|
||||
return data;
|
||||
}
|
||||
@ -157,11 +158,11 @@ WRITE8_HANDLER( pc10_prot_w )
|
||||
/* we only support a single cart connected at slot 0 */
|
||||
if ( cart_sel == 0 )
|
||||
{
|
||||
RP5H01_0_enable_w( space->machine, 0, 0 );
|
||||
RP5H01_0_test_w( space->machine, 0, data & 0x10 ); /* D4 */
|
||||
RP5H01_0_clock_w( space->machine, 0, data & 0x08 ); /* D3 */
|
||||
RP5H01_0_reset_w( space->machine, 0, ~data & 0x01 ); /* D0 */
|
||||
RP5H01_0_enable_w( space->machine, 0, 1 );
|
||||
RP5H01_0_enable_w( space, 0, 0 );
|
||||
RP5H01_0_test_w( space, 0, data & 0x10 ); /* D4 */
|
||||
RP5H01_0_clock_w( space, 0, data & 0x08 ); /* D3 */
|
||||
RP5H01_0_reset_w( space, 0, ~data & 0x01 ); /* D0 */
|
||||
RP5H01_0_enable_w( space, 0, 1 );
|
||||
|
||||
/* this thing gets dense at some point */
|
||||
/* it wants to jump and execute an opcode at $ffff, wich */
|
||||
|
||||
@ -262,7 +262,8 @@ MACHINE_START( slither )
|
||||
|
||||
MC6845_ON_VSYNC_CHANGED( qix_vsync_changed )
|
||||
{
|
||||
pia_3_cb1_w(device->machine, 0, vsync);
|
||||
const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
pia_3_cb1_w(space, 0, vsync);
|
||||
}
|
||||
|
||||
|
||||
@ -356,7 +357,8 @@ READ8_HANDLER( qix_video_firq_ack_r )
|
||||
|
||||
static TIMER_CALLBACK( deferred_pia_4_porta_w )
|
||||
{
|
||||
pia_4_porta_w(machine, 0, param);
|
||||
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
pia_4_porta_w(space, 0, param);
|
||||
}
|
||||
|
||||
|
||||
@ -524,7 +526,8 @@ WRITE8_HANDLER( qix_68705_portC_w )
|
||||
|
||||
static TIMER_CALLBACK( pia_0_w_callback )
|
||||
{
|
||||
pia_0_w(machine, param >> 8, param & 0xff);
|
||||
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
pia_0_w(space, param >> 8, param & 0xff);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -174,7 +174,11 @@ WRITE8_HANDLER( hunchbks_mirror_w )
|
||||
program_write_byte(0x1000+offset,data);
|
||||
}
|
||||
|
||||
static WRITE8_DEVICE_HANDLER( sound_latch_w ) { soundlatch_w(device->machine, offset, data); }
|
||||
static WRITE8_DEVICE_HANDLER( sound_latch_w )
|
||||
{
|
||||
const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
soundlatch_w(space, offset, data);
|
||||
}
|
||||
|
||||
const ppi8255_interface scramble_ppi_0_intf =
|
||||
{
|
||||
|
||||
@ -195,7 +195,7 @@ void segaic16_memory_mapper_set_decrypted(running_machine *machine, UINT8 *decry
|
||||
}
|
||||
|
||||
|
||||
static void memory_mapper_w(running_machine *machine, struct memory_mapper_chip *chip, offs_t offset, UINT8 data)
|
||||
static void memory_mapper_w(const address_space *space, struct memory_mapper_chip *chip, offs_t offset, UINT8 data)
|
||||
{
|
||||
UINT8 oldval;
|
||||
|
||||
@ -215,9 +215,9 @@ static void memory_mapper_w(running_machine *machine, struct memory_mapper_chip
|
||||
/* 03 - maybe controls halt and reset lines together? */
|
||||
if ((oldval ^ chip->regs[offset]) & 3)
|
||||
{
|
||||
cputag_set_input_line(machine, chip->cpu, INPUT_LINE_RESET, (chip->regs[offset] & 3) == 3 ? ASSERT_LINE : CLEAR_LINE);
|
||||
cputag_set_input_line(space->machine, chip->cpu, INPUT_LINE_RESET, (chip->regs[offset] & 3) == 3 ? ASSERT_LINE : CLEAR_LINE);
|
||||
if ((chip->regs[offset] & 3) == 3)
|
||||
fd1094_machine_init(machine->cpu[0]);
|
||||
fd1094_machine_init(space->machine->cpu[0]);
|
||||
}
|
||||
break;
|
||||
|
||||
@ -229,7 +229,7 @@ static void memory_mapper_w(running_machine *machine, struct memory_mapper_chip
|
||||
case 0x04:
|
||||
/* controls IRQ lines to 68000, negative logic -- write $B to signal IRQ4 */
|
||||
if ((chip->regs[offset] & 7) != 7)
|
||||
cputag_set_input_line(machine, chip->cpu, (~chip->regs[offset] & 7), HOLD_LINE);
|
||||
cputag_set_input_line(space->machine, chip->cpu, (~chip->regs[offset] & 7), HOLD_LINE);
|
||||
break;
|
||||
|
||||
case 0x05:
|
||||
@ -239,7 +239,7 @@ static void memory_mapper_w(running_machine *machine, struct memory_mapper_chip
|
||||
if (data == 0x01)
|
||||
{
|
||||
offs_t addr = (chip->regs[0x0a] << 17) | (chip->regs[0x0b] << 9) | (chip->regs[0x0c] << 1);
|
||||
cpu_push_context(machine->cpu[mame_find_cpu_index(machine, chip->cpu)]);
|
||||
cpu_push_context(space->machine->cpu[mame_find_cpu_index(space->machine, chip->cpu)]);
|
||||
program_write_word_16be(addr, (chip->regs[0x00] << 8) | chip->regs[0x01]);
|
||||
cpu_pop_context();
|
||||
}
|
||||
@ -247,7 +247,7 @@ static void memory_mapper_w(running_machine *machine, struct memory_mapper_chip
|
||||
{
|
||||
offs_t addr = (chip->regs[0x07] << 17) | (chip->regs[0x08] << 9) | (chip->regs[0x09] << 1);
|
||||
UINT16 result;
|
||||
cpu_push_context(machine->cpu[mame_find_cpu_index(machine, chip->cpu)]);
|
||||
cpu_push_context(space->machine->cpu[mame_find_cpu_index(space->machine, chip->cpu)]);
|
||||
result = program_read_word_16be(addr);
|
||||
cpu_pop_context();
|
||||
chip->regs[0x00] = result >> 8;
|
||||
@ -272,7 +272,7 @@ static void memory_mapper_w(running_machine *machine, struct memory_mapper_chip
|
||||
case 0x1c: case 0x1d:
|
||||
case 0x1e: case 0x1f:
|
||||
if (oldval != data)
|
||||
update_memory_mapping(machine, chip);
|
||||
update_memory_mapping(space->machine, chip);
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -545,12 +545,12 @@ static UINT16 divide_r(int which, offs_t offset, UINT16 mem_mask)
|
||||
}
|
||||
|
||||
|
||||
static void divide_w(running_machine *machine, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
|
||||
static void divide_w(const address_space *space, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
|
||||
{
|
||||
int a4 = offset & 8;
|
||||
int a3 = offset & 4;
|
||||
|
||||
if (LOG_DIVIDE) logerror("%06X:divide%d_w(%X) = %04X\n", cpu_get_pc(machine->activecpu), which, offset, data);
|
||||
if (LOG_DIVIDE) logerror("%06X:divide%d_w(%X) = %04X\n", cpu_get_pc(space->machine->activecpu), which, offset, data);
|
||||
|
||||
/* only 4 effective write registers */
|
||||
offset &= 3;
|
||||
@ -645,10 +645,10 @@ static void timer_interrupt_ack(running_machine *machine, int which)
|
||||
}
|
||||
|
||||
|
||||
static UINT16 compare_timer_r(running_machine *machine, int which, offs_t offset, UINT16 mem_mask)
|
||||
static UINT16 compare_timer_r(const address_space *space, int which, offs_t offset, UINT16 mem_mask)
|
||||
{
|
||||
offset &= 0xf;
|
||||
if (LOG_COMPARE) logerror("%06X:compare%d_r(%X) = %04X\n", cpu_get_pc(machine->activecpu), which, offset, compare_timer[which].regs[offset]);
|
||||
if (LOG_COMPARE) logerror("%06X:compare%d_r(%X) = %04X\n", cpu_get_pc(space->machine->activecpu), which, offset, compare_timer[which].regs[offset]);
|
||||
switch (offset)
|
||||
{
|
||||
case 0x0: return compare_timer[which].regs[0];
|
||||
@ -660,16 +660,16 @@ static UINT16 compare_timer_r(running_machine *machine, int which, offs_t offset
|
||||
case 0x6: return compare_timer[which].regs[2];
|
||||
case 0x7: return compare_timer[which].regs[7];
|
||||
case 0x9:
|
||||
case 0xd: timer_interrupt_ack(machine, which); break;
|
||||
case 0xd: timer_interrupt_ack(space->machine, which); break;
|
||||
}
|
||||
return 0xffff;
|
||||
}
|
||||
|
||||
|
||||
static void compare_timer_w(running_machine *machine, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
|
||||
static void compare_timer_w(const address_space *space, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
|
||||
{
|
||||
offset &= 0xf;
|
||||
if (LOG_COMPARE) logerror("%06X:compare%d_w(%X) = %04X\n", cpu_get_pc(machine->activecpu), which, offset, data);
|
||||
if (LOG_COMPARE) logerror("%06X:compare%d_w(%X) = %04X\n", cpu_get_pc(space->machine->activecpu), which, offset, data);
|
||||
switch (offset)
|
||||
{
|
||||
case 0x0: COMBINE_DATA(&compare_timer[which].regs[0]); update_compare(which, 0); break;
|
||||
@ -680,7 +680,7 @@ static void compare_timer_w(running_machine *machine, int which, offs_t offset,
|
||||
case 0x8:
|
||||
case 0xc: COMBINE_DATA(&compare_timer[which].regs[8]); break;
|
||||
case 0x9:
|
||||
case 0xd: timer_interrupt_ack(machine, which); break;
|
||||
case 0xd: timer_interrupt_ack(space->machine, which); break;
|
||||
case 0xa:
|
||||
case 0xe: COMBINE_DATA(&compare_timer[which].regs[10]); break;
|
||||
case 0xb:
|
||||
|
||||
@ -1178,11 +1178,11 @@ READ8_HANDLER( snes_r_bank1 )
|
||||
if (address < 0x2000) /* Mirror of Low RAM */
|
||||
value = program_read_byte(0x7e0000 + address);
|
||||
else if (address < 0x6000) /* I/O */
|
||||
value = snes_r_io(space->machine, address);
|
||||
value = snes_r_io(space, address);
|
||||
else if (address < 0x8000)
|
||||
{
|
||||
if (has_addon_chip == HAS_OBC1)
|
||||
value = obc1_read(space->machine, offset);
|
||||
value = obc1_read(space, offset);
|
||||
else if ((has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
|
||||
value = (address < 0x7000) ? DSP2_read() : 0x00;
|
||||
else if ((snes_cart.mode == SNES_MODE_21) && (has_addon_chip == HAS_DSP1) && (offset < 0x100000))
|
||||
@ -1209,11 +1209,11 @@ READ8_HANDLER( snes_r_bank2 )
|
||||
if (address < 0x2000) /* Mirror of Low RAM */
|
||||
value = program_read_byte(0x7e0000 + address);
|
||||
else if (address < 0x6000) /* I/O */
|
||||
value = snes_r_io(space->machine, address);
|
||||
value = snes_r_io(space, address);
|
||||
else if (address < 0x8000) /* SRAM for mode_21, Reserved othewise */
|
||||
{
|
||||
if (has_addon_chip == HAS_OBC1)
|
||||
value = obc1_read (space->machine, offset);
|
||||
value = obc1_read (space, offset);
|
||||
else if (has_addon_chip == HAS_DSP2)
|
||||
value = (address < 0x7000) ? DSP2_read() : 0x00;
|
||||
else if ((snes_cart.mode == SNES_MODE_21) && (snes_cart.sram > 0))
|
||||
@ -1361,11 +1361,11 @@ WRITE8_HANDLER( snes_w_bank1 )
|
||||
if (address < 0x2000) /* Mirror of Low RAM */
|
||||
program_write_byte(0x7e0000 + address, data);
|
||||
else if (address < 0x6000) /* I/O */
|
||||
snes_w_io(space->machine, address, data);
|
||||
snes_w_io(space, address, data);
|
||||
else if (address < 0x8000)
|
||||
{
|
||||
if (has_addon_chip == HAS_OBC1)
|
||||
obc1_write(space->machine, offset, data);
|
||||
obc1_write(space, offset, data);
|
||||
else if ((has_addon_chip == HAS_DSP2) && (offset >= 0x200000))
|
||||
DSP2_write(data);
|
||||
else if ((snes_cart.mode == SNES_MODE_21) && (has_addon_chip == HAS_DSP1) && (offset < 0x100000))
|
||||
@ -1389,11 +1389,11 @@ WRITE8_HANDLER( snes_w_bank2 )
|
||||
if (address < 0x2000) /* Mirror of Low RAM */
|
||||
program_write_byte(0x7e0000 + address, data);
|
||||
else if (address < 0x6000) /* I/O */
|
||||
snes_w_io(space->machine, address, data);
|
||||
snes_w_io(space, address, data);
|
||||
else if (address < 0x8000) /* SRAM for mode_21, Reserved othewise */
|
||||
{
|
||||
if (has_addon_chip == HAS_OBC1)
|
||||
obc1_write(space->machine, offset, data);
|
||||
obc1_write(space, offset, data);
|
||||
else if (has_addon_chip == HAS_DSP2)
|
||||
DSP2_write(data);
|
||||
else if ((snes_cart.mode == SNES_MODE_21) && (snes_cart.sram > 0))
|
||||
@ -1462,18 +1462,18 @@ WRITE8_HANDLER( snes_w_bank6 )
|
||||
if (snes_cart.mode != SNES_MODE_25)
|
||||
{
|
||||
if (offset < 0x300000)
|
||||
snes_w_bank1(space->machine, offset, data);
|
||||
snes_w_bank1(space, offset, data);
|
||||
else
|
||||
snes_w_bank2(space->machine, offset - 0x300000, data);
|
||||
snes_w_bank2(space, offset - 0x300000, data);
|
||||
}
|
||||
else /* Mode 25 has SRAM not mirrored from lower banks */
|
||||
{
|
||||
if (address < 0x6000)
|
||||
{
|
||||
if (offset < 0x300000)
|
||||
snes_w_bank1(space->machine, offset, data);
|
||||
snes_w_bank1(space, offset, data);
|
||||
else
|
||||
snes_w_bank2(space->machine, offset - 0x300000, data);
|
||||
snes_w_bank2(space, offset - 0x300000, data);
|
||||
}
|
||||
else if ((offset >= 0x300000) && (snes_cart.sram > 0))
|
||||
{
|
||||
@ -1506,9 +1506,9 @@ WRITE8_HANDLER( snes_w_bank7 )
|
||||
if (offset >= 0x3e0000)
|
||||
logerror("Attempt to write to banks 0xfe - 0xff address: %X\n", offset);
|
||||
else if (offset >= 0x300000)
|
||||
snes_w_bank5(space->machine, offset - 0x300000, data);
|
||||
snes_w_bank5(space, offset - 0x300000, data);
|
||||
else if (offset >= 0x200000)
|
||||
snes_w_bank4(space->machine, offset - 0x200000, data);
|
||||
snes_w_bank4(space, offset - 0x200000, data);
|
||||
}
|
||||
else
|
||||
logerror("Attempt to write to ROM address: %X\n", offset + 0xc00000);
|
||||
@ -1676,6 +1676,7 @@ MACHINE_RESET( snes )
|
||||
/* for mame we use an init, maybe we will need more for the different games */
|
||||
DRIVER_INIT( snes )
|
||||
{
|
||||
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
UINT16 total_blocks, read_blocks;
|
||||
UINT8 *rom;
|
||||
|
||||
@ -1730,7 +1731,7 @@ DRIVER_INIT( snes )
|
||||
}
|
||||
|
||||
/* Find the amount of sram */
|
||||
snes_cart.sram = snes_r_bank1(machine, 0x00ffd8);
|
||||
snes_cart.sram = snes_r_bank1(space, 0x00ffd8);
|
||||
if (snes_cart.sram > 0)
|
||||
{
|
||||
snes_cart.sram = ((1 << (snes_cart.sram + 3)) / 8);
|
||||
@ -1741,6 +1742,7 @@ DRIVER_INIT( snes )
|
||||
|
||||
DRIVER_INIT( snes_hirom )
|
||||
{
|
||||
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
UINT16 total_blocks, read_blocks;
|
||||
UINT8 *rom;
|
||||
|
||||
@ -1788,7 +1790,7 @@ DRIVER_INIT( snes_hirom )
|
||||
}
|
||||
|
||||
/* Find the amount of sram */
|
||||
snes_cart.sram = snes_r_bank1(machine, 0x00ffd8);
|
||||
snes_cart.sram = snes_r_bank1(space, 0x00ffd8);
|
||||
if (snes_cart.sram > 0)
|
||||
{
|
||||
snes_cart.sram = ((1 << (snes_cart.sram + 3)) / 8);
|
||||
|
||||
@ -92,6 +92,7 @@ DRIVER_INIT( stfight )
|
||||
|
||||
MACHINE_RESET( stfight )
|
||||
{
|
||||
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
adpcm_data_offs = adpcm_data_end = 0;
|
||||
toggle = 0;
|
||||
fm_data = 0;
|
||||
@ -102,7 +103,7 @@ MACHINE_RESET( stfight )
|
||||
stfight_coin_mech_query = 0;
|
||||
|
||||
// initialise rom bank
|
||||
stfight_bank_w( machine, 0, 0 );
|
||||
stfight_bank_w( space, 0, 0 );
|
||||
}
|
||||
|
||||
// It's entirely possible that this bank is never switched out
|
||||
|
||||
@ -121,7 +121,7 @@ void TAITO8741_reset(int num)
|
||||
}
|
||||
|
||||
/* 8741 update */
|
||||
static void taito8741_update(running_machine *machine, int num)
|
||||
static void taito8741_update(const address_space *space, int num)
|
||||
{
|
||||
I8741 *st,*sst;
|
||||
int next = num;
|
||||
@ -176,7 +176,7 @@ static void taito8741_update(running_machine *machine, int num)
|
||||
else
|
||||
{ /* port select */
|
||||
st->parallelselect = data & 0x07;
|
||||
taito8741_hostdata_w(st,st->portHandler ? st->portHandler(machine,st->parallelselect) : 0);
|
||||
taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space,st->parallelselect) : 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -187,7 +187,7 @@ static void taito8741_update(running_machine *machine, int num)
|
||||
case -1: /* no command data */
|
||||
break;
|
||||
case 0x00: /* read from parallel port */
|
||||
taito8741_hostdata_w(st,st->portHandler ? st->portHandler(machine,0) : 0 );
|
||||
taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space,0) : 0 );
|
||||
break;
|
||||
case 0x01: /* read receive buffer 0 */
|
||||
case 0x02: /* read receive buffer 1 */
|
||||
@ -200,7 +200,7 @@ static void taito8741_update(running_machine *machine, int num)
|
||||
taito8741_hostdata_w(st,st->rxd[data-1]);
|
||||
break;
|
||||
case 0x08: /* latch received serial data */
|
||||
st->txd[0] = st->portHandler ? st->portHandler(machine,0) : 0;
|
||||
st->txd[0] = st->portHandler ? st->portHandler(space,0) : 0;
|
||||
if( sst )
|
||||
{
|
||||
timer_call_after_resynch(NULL, num, taito8741_serial_tx);
|
||||
@ -271,54 +271,54 @@ int TAITO8741_start(const struct TAITO8741interface *taito8741intf)
|
||||
}
|
||||
|
||||
/* read status port */
|
||||
static int I8741_status_r(running_machine *machine, int num)
|
||||
static int I8741_status_r(const address_space *space, int num)
|
||||
{
|
||||
I8741 *st = &taito8741[num];
|
||||
taito8741_update(machine, num);
|
||||
LOG(("8741-%d ST Read %02x PC=%04x\n",num,st->status,cpu_get_pc(machine->activecpu)));
|
||||
taito8741_update(space, num);
|
||||
LOG(("8741-%d ST Read %02x PC=%04x\n",num,st->status,cpu_get_pc(space->machine->activecpu)));
|
||||
return st->status;
|
||||
}
|
||||
|
||||
/* read data port */
|
||||
static int I8741_data_r(running_machine *machine, int num)
|
||||
static int I8741_data_r(const address_space *space, int num)
|
||||
{
|
||||
I8741 *st = &taito8741[num];
|
||||
int ret = st->toData;
|
||||
st->status &= 0xfe;
|
||||
LOG(("8741-%d DATA Read %02x PC=%04x\n",num,ret,cpu_get_pc(machine->activecpu)));
|
||||
LOG(("8741-%d DATA Read %02x PC=%04x\n",num,ret,cpu_get_pc(space->machine->activecpu)));
|
||||
|
||||
/* update chip */
|
||||
taito8741_update(machine, num);
|
||||
taito8741_update(space, num);
|
||||
|
||||
switch( st->mode )
|
||||
{
|
||||
case TAITO8741_PORT: /* parallel data */
|
||||
taito8741_hostdata_w(st,st->portHandler ? st->portHandler(machine, st->parallelselect) : 0);
|
||||
taito8741_hostdata_w(st,st->portHandler ? st->portHandler(space, st->parallelselect) : 0);
|
||||
break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Write data port */
|
||||
static void I8741_data_w(running_machine *machine, int num, int data)
|
||||
static void I8741_data_w(const address_space *space, int num, int data)
|
||||
{
|
||||
I8741 *st = &taito8741[num];
|
||||
LOG(("8741-%d DATA Write %02x PC=%04x\n",num,data,cpu_get_pc(machine->activecpu)));
|
||||
LOG(("8741-%d DATA Write %02x PC=%04x\n",num,data,cpu_get_pc(space->machine->activecpu)));
|
||||
st->fromData = data;
|
||||
st->status |= 0x02;
|
||||
/* update chip */
|
||||
taito8741_update(machine, num);
|
||||
taito8741_update(space, num);
|
||||
}
|
||||
|
||||
/* Write command port */
|
||||
static void I8741_command_w(running_machine *machine, int num, int data)
|
||||
static void I8741_command_w(const address_space *space, int num, int data)
|
||||
{
|
||||
I8741 *st = &taito8741[num];
|
||||
LOG(("8741-%d CMD Write %02x PC=%04x\n",num,data,cpu_get_pc(machine->activecpu)));
|
||||
LOG(("8741-%d CMD Write %02x PC=%04x\n",num,data,cpu_get_pc(space->machine->activecpu)));
|
||||
st->fromCmd = data;
|
||||
st->status |= 0x04;
|
||||
/* update chip */
|
||||
taito8741_update(machine,num);
|
||||
taito8741_update(space,num);
|
||||
}
|
||||
|
||||
/* Write port handler */
|
||||
@ -441,13 +441,13 @@ static void josvolly_8741_do(int num)
|
||||
}
|
||||
}
|
||||
|
||||
static void josvolly_8741_w(running_machine *machine,int num,int offset,int data)
|
||||
static void josvolly_8741_w(const address_space *space,int num,int offset,int data)
|
||||
{
|
||||
JV8741 *mcu = &i8741[num];
|
||||
|
||||
if(offset==1)
|
||||
{
|
||||
LOG(("PC=%04X 8741[%d] CW %02X\n",cpu_get_pc(machine->activecpu),num,data));
|
||||
LOG(("PC=%04X 8741[%d] CW %02X\n",cpu_get_pc(space->machine->activecpu),num,data));
|
||||
|
||||
/* read pointer */
|
||||
mcu->cmd = data;
|
||||
@ -469,7 +469,7 @@ static void josvolly_8741_w(running_machine *machine,int num,int offset,int data
|
||||
break;
|
||||
case 2:
|
||||
#if 1
|
||||
mcu->rxd = input_port_read(machine, "DSW2");
|
||||
mcu->rxd = input_port_read(space->machine, "DSW2");
|
||||
mcu->sts |= 0x01; /* RD ready */
|
||||
#endif
|
||||
break;
|
||||
@ -485,7 +485,7 @@ static void josvolly_8741_w(running_machine *machine,int num,int offset,int data
|
||||
else
|
||||
{
|
||||
/* data */
|
||||
LOG(("PC=%04X 8741[%d] DW %02X\n",cpu_get_pc(machine->activecpu),num,data));
|
||||
LOG(("PC=%04X 8741[%d] DW %02X\n",cpu_get_pc(space->machine->activecpu),num,data));
|
||||
|
||||
mcu->txd = data^0x40; /* parity reverce ? */
|
||||
mcu->sts |= 0x02; /* TXD busy */
|
||||
@ -495,7 +495,7 @@ static void josvolly_8741_w(running_machine *machine,int num,int offset,int data
|
||||
{
|
||||
if(josvolly_nmi_enable)
|
||||
{
|
||||
cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
|
||||
cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
|
||||
josvolly_nmi_enable = 0;
|
||||
}
|
||||
}
|
||||
@ -504,7 +504,7 @@ static void josvolly_8741_w(running_machine *machine,int num,int offset,int data
|
||||
josvolly_8741_do(num);
|
||||
}
|
||||
|
||||
static INT8 josvolly_8741_r(running_machine *machine,int num,int offset)
|
||||
static INT8 josvolly_8741_r(const address_space *space,int num,int offset)
|
||||
{
|
||||
JV8741 *mcu = &i8741[num];
|
||||
int ret;
|
||||
@ -512,16 +512,16 @@ static INT8 josvolly_8741_r(running_machine *machine,int num,int offset)
|
||||
if(offset==1)
|
||||
{
|
||||
if(mcu->rst)
|
||||
mcu->rxd = (mcu->initReadPort)(machine,0); /* port in */
|
||||
mcu->rxd = (mcu->initReadPort)(space,0); /* port in */
|
||||
ret = mcu->sts;
|
||||
LOG(("PC=%04X 8741[%d] SR %02X\n",cpu_get_pc(machine->activecpu),num,ret));
|
||||
LOG(("PC=%04X 8741[%d] SR %02X\n",cpu_get_pc(space->machine->activecpu),num,ret));
|
||||
}
|
||||
else
|
||||
{
|
||||
/* clear status port */
|
||||
mcu->sts &= ~0x01; /* RD ready */
|
||||
ret = mcu->rxd;
|
||||
LOG(("PC=%04X 8741[%d] DR %02X\n",cpu_get_pc(machine->activecpu),num,ret));
|
||||
LOG(("PC=%04X 8741[%d] DR %02X\n",cpu_get_pc(space->machine->activecpu),num,ret));
|
||||
mcu->rst = 0;
|
||||
}
|
||||
return ret;
|
||||
|
||||
@ -44,9 +44,10 @@ MACHINE_START( taitosj )
|
||||
|
||||
MACHINE_RESET( taitosj )
|
||||
{
|
||||
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
|
||||
/* set the default ROM bank (many games only have one bank and */
|
||||
/* never write to the bank selector register) */
|
||||
taitosj_bankswitch_w(machine, 0, 0);
|
||||
taitosj_bankswitch_w(space, 0, 0);
|
||||
|
||||
|
||||
zaccept = 1;
|
||||
|
||||
@ -241,13 +241,13 @@ WRITE16_HANDLER( twincobr_control_w )
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
toaplan0_control_w(space, offset, data & 0xff);
|
||||
toaplan0_control_w(space->machine, offset, data & 0xff);
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_HANDLER( wardner_control_w )
|
||||
{
|
||||
toaplan0_control_w(space, offset, data);
|
||||
toaplan0_control_w(space->machine, offset, data);
|
||||
}
|
||||
|
||||
|
||||
@ -265,10 +265,10 @@ WRITE16_HANDLER( twincobr_sharedram_w )
|
||||
}
|
||||
|
||||
|
||||
static void toaplan0_coin_dsp_w(running_machine *machine, int offset, int data)
|
||||
static void toaplan0_coin_dsp_w(const address_space *space, int offset, int data)
|
||||
{
|
||||
if (data > 1)
|
||||
LOG(("CPU0:%08x Writing %08x to %08x.\n",cpu_get_pc(machine->activecpu),data,toaplan_port_type[toaplan_main_cpu] - offset));
|
||||
LOG(("CPU0:%08x Writing %08x to %08x.\n",cpu_get_pc(space->machine->activecpu),data,toaplan_port_type[toaplan_main_cpu] - offset));
|
||||
switch (data) {
|
||||
case 0x08: coin_counter_w(0,0); break;
|
||||
case 0x09: coin_counter_w(0,1); break;
|
||||
@ -281,14 +281,14 @@ static void toaplan0_coin_dsp_w(running_machine *machine, int offset, int data)
|
||||
/****** The following apply to Flying Shark/Wardner only ******/
|
||||
case 0x00: /* This means assert the INT line to the DSP */
|
||||
LOG(("Turning DSP on and main CPU off\n"));
|
||||
cpu_set_input_line(machine->cpu[2], INPUT_LINE_HALT, CLEAR_LINE);
|
||||
cpu_set_input_line(machine->cpu[2], 0, ASSERT_LINE); /* TMS32010 INT */
|
||||
cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
|
||||
cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, CLEAR_LINE);
|
||||
cpu_set_input_line(space->machine->cpu[2], 0, ASSERT_LINE); /* TMS32010 INT */
|
||||
cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
|
||||
break;
|
||||
case 0x01: /* This means inhibit the INT line to the DSP */
|
||||
LOG(("Turning DSP off\n"));
|
||||
cpu_set_input_line(machine->cpu[2], 0, CLEAR_LINE); /* TMS32010 INT */
|
||||
cpu_set_input_line(machine->cpu[2], INPUT_LINE_HALT, ASSERT_LINE);
|
||||
cpu_set_input_line(space->machine->cpu[2], 0, CLEAR_LINE); /* TMS32010 INT */
|
||||
cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, ASSERT_LINE);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -285,7 +285,7 @@ static WRITE8_HANDLER( vsnormal_vrom_banking )
|
||||
/* bit 1 ( data & 2 ) enables writes to extra ram, we ignore it */
|
||||
|
||||
/* move along */
|
||||
vsnes_in0_w( space->machine, offset, data );
|
||||
vsnes_in0_w( space, offset, data );
|
||||
}
|
||||
|
||||
/* Most games switch VROM Banks in controller 0 write */
|
||||
@ -302,11 +302,11 @@ static WRITE8_HANDLER( ppuRC2C05_protection )
|
||||
/* and no remapped color */
|
||||
if ( offset == 0 )
|
||||
{
|
||||
ppu2c0x_0_w( space->machine, 1, data );
|
||||
ppu2c0x_0_w( space, 1, data );
|
||||
return;
|
||||
}
|
||||
|
||||
ppu2c0x_0_w( space->machine, 0, data );
|
||||
ppu2c0x_0_w( space, 0, data );
|
||||
}
|
||||
|
||||
/**********************************************************************************/
|
||||
@ -499,7 +499,7 @@ DRIVER_INIT( hogalley )
|
||||
static READ8_HANDLER( vsgshoe_security_r )
|
||||
{
|
||||
/* low part must be 0x1c */
|
||||
return ppu2c0x_0_r( space->machine, 2 ) | 0x1c;
|
||||
return ppu2c0x_0_r( space, 2 ) | 0x1c;
|
||||
}
|
||||
|
||||
static WRITE8_HANDLER( vsgshoe_gun_in0_w )
|
||||
@ -779,7 +779,7 @@ DRIVER_INIT( cstlevna )
|
||||
static READ8_HANDLER( topgun_security_r )
|
||||
{
|
||||
/* low part must be 0x1b */
|
||||
return ppu2c0x_0_r( space->machine, 2 ) | 0x1b;
|
||||
return ppu2c0x_0_r( space, 2 ) | 0x1b;
|
||||
}
|
||||
|
||||
DRIVER_INIT( topgun )
|
||||
@ -1221,7 +1221,7 @@ DRIVER_INIT( bnglngby )
|
||||
static READ8_HANDLER( jajamaru_security_r )
|
||||
{
|
||||
/* low part must be 0x40 */
|
||||
return ppu2c0x_0_r( space->machine, 2 ) | 0x40;
|
||||
return ppu2c0x_0_r( space, 2 ) | 0x40;
|
||||
}
|
||||
|
||||
DRIVER_INIT( jajamaru )
|
||||
@ -1248,7 +1248,7 @@ DRIVER_INIT( jajamaru )
|
||||
static READ8_HANDLER( mightybj_security_r )
|
||||
{
|
||||
/* low part must be 0x3d */
|
||||
return ppu2c0x_0_r( space->machine, 2 ) | 0x3d;
|
||||
return ppu2c0x_0_r( space, 2 ) | 0x3d;
|
||||
}
|
||||
|
||||
DRIVER_INIT( mightybj )
|
||||
@ -1276,9 +1276,9 @@ static WRITE8_HANDLER( vstennis_vrom_banking )
|
||||
|
||||
/* move along */
|
||||
if ( cpunum_get_active() == 0 )
|
||||
vsnes_in0_w( space->machine, offset, data );
|
||||
vsnes_in0_w( space, offset, data );
|
||||
else
|
||||
vsnes_in0_1_w( space->machine, offset, data );
|
||||
vsnes_in0_1_w( space, offset, data );
|
||||
}
|
||||
|
||||
DRIVER_INIT( vstennis )
|
||||
|
||||
Loading…
Reference in New Issue
Block a user