mirror of
https://github.com/holub/mame
synced 2025-05-25 07:15:25 +03:00
new working game
--------------- Dream 9 Final [Angelo Salese, David Haywood]
This commit is contained in:
parent
4ae63a9782
commit
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1
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vendored
1
.gitattributes
vendored
@ -1446,6 +1446,7 @@ src/mame/drivers/cultures.c svneol=native#text/plain
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src/mame/drivers/cvs.c svneol=native#text/plain
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src/mame/drivers/cyberbal.c svneol=native#text/plain
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src/mame/drivers/cybertnk.c svneol=native#text/plain
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src/mame/drivers/d9final.c svneol=native#text/plain
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src/mame/drivers/dacholer.c svneol=native#text/plain
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src/mame/drivers/dambustr.c svneol=native#text/plain
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src/mame/drivers/darius.c svneol=native#text/plain
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308
src/mame/drivers/d9final.c
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308
src/mame/drivers/d9final.c
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@ -0,0 +1,308 @@
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/*******************************************************************************************
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Dream 9 Final (c) 1992 Excellent Systems
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driver by Angelo Salese & David Haywood
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TODO:
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- Don't know where the ES8712 & RTC62421b chips routes;
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- Inputs is bare-bones;
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- A bunch of missing port outputs;
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- screen disable? Start-up fading looks horrible;
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- Game looks IGS-esque, is there any correlation?
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============================================================================================
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PCB: ES-9112
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Main Chips: Z80, ES8712, 24Mhz OSC, RTC62421B 9262, YM2413, 4x8DSW
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*******************************************************************************************/
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#include "driver.h"
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#include "cpu/z80/z80.h"
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#include "sound/2413intf.h"
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static UINT8 *lo_vram,*hi_vram,*cram;
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VIDEO_START(d9final)
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{
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}
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VIDEO_UPDATE(d9final)
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{
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const gfx_element *gfx = screen->machine->gfx[0];
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int count = 0x00000;
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int y,x;
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for (y=0;y<32;y++)
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{
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for (x=0;x<64;x++)
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{
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int tile = lo_vram[count] | ((hi_vram[count] & 0x3f)<<8);
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int color = cram[count] & 0x3f;
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drawgfx_opaque(bitmap,cliprect,gfx,tile,color,0,0,x*8,y*8);
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count++;
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}
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}
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return 0;
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}
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static WRITE8_HANDLER( d9final_bank_w )
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{
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UINT8 *ROM = memory_region(space->machine, "maincpu");
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UINT32 bankaddress;
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bankaddress = 0x10000+(0x4000 * (data & 0x7));
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memory_set_bankptr(space->machine, 1, &ROM[bankaddress]);
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}
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static ADDRESS_MAP_START( d9final_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x7fff) AM_ROM
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AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
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AM_RANGE(0xc000, 0xc7ff) AM_RAM
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AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram)
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AM_RANGE(0xcc00, 0xcfff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE(&paletteram_2)
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AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE(&lo_vram)
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AM_RANGE(0xd800, 0xdfff) AM_RAM AM_BASE(&hi_vram)
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AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE(&cram)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( d9final_io, ADDRESS_SPACE_IO, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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// AM_RANGE(0x00, 0x00) AM_WRITENOP //bit 0: irq enable?
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AM_RANGE(0x00, 0x00) AM_READ_PORT("DSWA")
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AM_RANGE(0x20, 0x20) AM_READ_PORT("DSWB")
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AM_RANGE(0x40, 0x40) AM_READ_PORT("DSWC")
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AM_RANGE(0x40, 0x41) AM_DEVWRITE("ym",ym2413_w)
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AM_RANGE(0x60, 0x60) AM_READ_PORT("DSWD")
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AM_RANGE(0x80, 0x80) AM_READ_PORT("IN0")
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AM_RANGE(0xa0, 0xa0) AM_READ_PORT("IN1") AM_WRITE(d9final_bank_w)
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AM_RANGE(0xe0, 0xe0) AM_READ_PORT("IN2")
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ADDRESS_MAP_END
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static INPUT_PORTS_START( d9final )
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PORT_START("IN0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Reset")
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PORT_DIPNAME( 0x02, 0x02, "IN0" )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Analyzer")
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PORT_START("IN1")
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PORT_DIPNAME( 0x01, 0x01, "IN1" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH )
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_BET )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_LOW )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL )
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PORT_START("IN2")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) //another reset button
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PORT_DIPNAME( 0x02, 0x02, "IN2" )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN3 )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
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PORT_START("DSWA") //basic system stuff
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PORT_DIPNAME( 0x01, 0x01, "DSWA" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("DSWB") //odd rates / difficulty stuff
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PORT_DIPNAME( 0x01, 0x01, "DSWB" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("DSWC") //coinage A & B
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PORT_DIPNAME( 0x01, 0x01, "DSWC" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("DSWD") //coinage C & D
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PORT_DIPNAME( 0x01, 0x00, "SYSA" )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x01, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x02, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x04, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x08, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x10, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x20, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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INPUT_PORTS_END
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static const gfx_layout tiles16x8_layout =
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{
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8,8,
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RGN_FRAC(1,1),
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4,
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{ 0, 1, 2, 3 },
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{ 8, 0, 12, 4, 24, 16, 28, 20 },
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{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
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32*8
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};
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static GFXDECODE_START( d9final )
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GFXDECODE_ENTRY( "gfx1", 0, tiles16x8_layout, 0, 16*4 )
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GFXDECODE_END
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static MACHINE_RESET( d9final )
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{
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// UINT8 *ROM = memory_region(machine, "maincpu");
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// memory_set_bankptr(machine, 1, &ROM[0x10000]);
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}
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static MACHINE_DRIVER_START( d9final )
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/* basic machine hardware */
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MDRV_CPU_ADD("maincpu", Z80,24000000/4)/* ? MHz */
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MDRV_CPU_PROGRAM_MAP(d9final_map)
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MDRV_CPU_IO_MAP(d9final_io)
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MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
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MDRV_MACHINE_RESET( d9final )
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/* video hardware */
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MDRV_SCREEN_ADD("screen", RASTER)
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MDRV_SCREEN_REFRESH_RATE(60)
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MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
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MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
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MDRV_SCREEN_SIZE(512, 256)
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MDRV_SCREEN_VISIBLE_AREA(0, 512-1, 16, 256-16-1)
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MDRV_GFXDECODE(d9final)
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MDRV_PALETTE_LENGTH(0x400)
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MDRV_PALETTE_INIT(all_black)
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MDRV_VIDEO_START(d9final)
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MDRV_VIDEO_UPDATE(d9final)
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MDRV_SPEAKER_STANDARD_MONO("mono")
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MDRV_SOUND_ADD("ym", YM2413, 24000000/8) // ?
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MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
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MACHINE_DRIVER_END
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ROM_START( d9final )
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ROM_REGION( 0x30000, "maincpu", 0 )
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ROM_LOAD( "2.4h", 0x00000, 0x8000, CRC(a8d838c8) SHA1(85b2cd1b73569e0e4fc13bfff537cfc2b4d569a1) )
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ROM_CONTINUE( 0x10000, 0x08000 )
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ROM_COPY( "maincpu", 0x10000, 0x18000, 0x08000 ) //or just 0xff
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ROM_LOAD( "1.2h", 0x20000, 0x10000, CRC(901281ec) SHA1(7b4cae343f1b025d988a507141c0fa8229a0fea1) )
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ROM_REGION( 0x80000, "gfx1", 0 )
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ROM_LOAD16_BYTE( "3.13h", 0x00001, 0x40000, CRC(a2de0cce) SHA1(d510671b75417c10ce479663f6f21367121384b4) )
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ROM_LOAD16_BYTE( "4.15h", 0x00000, 0x40000, CRC(859b7105) SHA1(1b36f84706473afaa50b6546d7373a2ee6602b9a) )
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ROM_END
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GAME( 1992, d9final, 0, d9final, d9final, 0, ROT0, "Excellent System", "Dream 9 Final (v2.24)", 0 )
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@ -620,6 +620,7 @@ $(MAMEOBJ)/eolith.a: \
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$(MAMEOBJ)/excelent.a: \
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$(DRIVERS)/aquarium.o $(VIDEO)/aquarium.o \
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$(DRIVERS)/d9final.o \
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$(DRIVERS)/gcpinbal.o $(VIDEO)/gcpinbal.o \
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$(DRIVERS)/vmetal.o \
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@ -8580,6 +8580,7 @@ Other Sun games
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DRIVER( gfire2 ) /* (c) 1992 Topis Corp */
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DRIVER( sprcros2 ) /* (c) 1986 GM Shoji */
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DRIVER( sprcros2a ) /* (c) 1986 GM Shoji */
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DRIVER( d9final ) /* (c) 1992 Excellent System */
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DRIVER( gcpinbal ) /* (c) 1994 Excellent System */
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DRIVER( vmetal ) /* (c) 1995 Excellent System? */
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DRIVER( vmetaln ) /* (c) 1995 Excellent System? */
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