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modernized cage, dcs and midwayic (nw)

Browse Source 
removed mcfglgcy.h and nvram legacy support in machine and mconfig
also updated adsp2100 so I can do dcs changes 
this require clean build
This commit is contained in:
Miodrag Milanovic 2014-04-20 19:18:46 +00:00
parent 317a184f37
commit cfb3aa493c
44 changed files with 2748 additions and 2015 deletions
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1
.gitattributes vendored
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@ -2701,7 +2701,6 @@ src/emu/machine/z8536.c svneol=native#text/plain
src/emu/machine/z8536.h svneol=native#text/plain
src/emu/mame.c svneol=native#text/plain
src/emu/mame.h svneol=native#text/plain
src/emu/mcfglgcy.h svneol=native#text/plain
src/emu/mconfig.c svneol=native#text/plain
src/emu/mconfig.h svneol=native#text/plain
src/emu/memarray.c svneol=native#text/plain

12
src/emu/cpu/adsp2100/2100ops.inc
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@ -80,8 +80,8 @@ inline void adsp21xx_device::update_mstat()
m_alt = temp;
}
if ((m_mstat ^ m_mstat_prev) & MSTAT_TIMER)
if (m_timer_fired != NULL)
(*m_timer_fired)(*this, (m_mstat & MSTAT_TIMER) != 0);
if (!m_timer_fired_func.isnull())
m_timer_fired_func((m_mstat & MSTAT_TIMER) != 0);
if (m_mstat & MSTAT_STICKYV)
m_astat_clear = ~(CFLAG | NFLAG | ZFLAG);
else
@ -419,8 +419,8 @@ void adsp21xx_device::write_reg3(int regnum, INT32 val)
case 0x05: cntr_stack_push(); m_cntr = val & 0x3fff; break;
case 0x06: m_core.sb.s = (INT32)(val << 27) >> 27; break;
case 0x07: m_px = val; break;
case 0x09: if (m_sport_tx_callback != NULL) (*m_sport_tx_callback)(*this, 0, val); break;
case 0x0b: if (m_sport_tx_callback != NULL) (*m_sport_tx_callback)(*this, 1, val); break;
case 0x09: if (!m_sport_tx_func.isnull()) m_sport_tx_func(0, val); break;
case 0x0b: if (!m_sport_tx_func.isnull()) m_sport_tx_func(1, val); break;
case 0x0c:
m_ifc = val;
if (m_chip_type >= CHIP_TYPE_ADSP2181)
@ -500,8 +500,8 @@ INT32 adsp21xx_device::read_reg3(int regnum)
case 0x05: return m_cntr;
case 0x06: return m_core.sb.s;
case 0x07: return m_px;
case 0x08: if (m_sport_rx_callback) return (*m_sport_rx_callback)(*this, 0); else return 0;
case 0x0a: if (m_sport_rx_callback) return (*m_sport_rx_callback)(*this, 1); else return 0;
case 0x08: if (!m_sport_rx_func.isnull()) return m_sport_rx_func(0); else return 0;
case 0x0a: if (!m_sport_rx_func.isnull()) return m_sport_rx_func(1); else return 0;
case 0x0f: return pc_stack_pop_val();
default: logerror("ADSP %04x: Reading from an invalid register!\n", m_ppc); return 0;
}

8
src/emu/cpu/adsp2100/adsp2100.c
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@ -171,10 +171,6 @@ adsp21xx_device::adsp21xx_device(const machine_config &mconfig, device_type type
memset(&m_irq_state, 0, sizeof(m_irq_state));
memset(&m_irq_latch, 0, sizeof(m_irq_latch));
m_sport_rx_callback = NULL;
m_sport_tx_callback = NULL;
m_timer_fired = NULL;
// create the tables
create_tables();
@ -415,6 +411,10 @@ UINT16 adsp2181_device::idma_data_r()
void adsp21xx_device::device_start()
{
m_sport_rx_func.resolve(m_sport_rx_callback, *this);
m_sport_tx_func.resolve(m_sport_tx_callback, *this);
m_timer_fired_func.resolve(m_timer_fired, *this);
// get our address spaces
m_program = &space(AS_PROGRAM);
m_direct = &m_program->direct();

18
src/emu/cpu/adsp2100/adsp2100.h
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@ -193,23 +193,15 @@ enum
class adsp21xx_device;
// transmit and receive data callbacks types
typedef INT32 (*adsp21xx_rx_func)(adsp21xx_device &device, int port);
typedef void (*adsp21xx_tx_func)(adsp21xx_device &device, int port, INT32 data);
typedef void (*adsp21xx_timer_func)(adsp21xx_device &device, int enable);
// ======================> adsp21xx_config
struct adsp21xx_config
{
adsp21xx_rx_func m_sport_rx_callback; // callback for serial receive
adsp21xx_tx_func m_sport_tx_callback; // callback for serial transmit
adsp21xx_timer_func m_timer_fired; // callback for timer fired
devcb_read32 m_sport_rx_callback; // callback for serial receive
devcb_write32 m_sport_tx_callback; // callback for serial transmit
devcb_write_line m_timer_fired; // callback for timer fired
};
// ======================> adsp21xx_device
class adsp21xx_device : public cpu_device,
@ -469,6 +461,10 @@ protected:
UINT16 m_mask_table[0x4000];
UINT16 m_reverse_table[0x4000];
devcb_resolved_read32 m_sport_rx_func;
devcb_resolved_write32 m_sport_tx_func;
devcb_resolved_write_line m_timer_fired_func;
// debugging
#if ADSP_TRACK_HOTSPOTS
UINT32 m_pcbucket[0x4000];

26
src/emu/machine.c
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@ -1208,21 +1208,6 @@ astring &running_machine::nvram_filename(astring &result, device_t &device)
void running_machine::nvram_load()
{
if (config().m_nvram_handler != NULL)
{
astring filename;
emu_file file(options().nvram_directory(), OPEN_FLAG_READ);
if (file.open(nvram_filename(filename, root_device()), ".nv") == FILERR_NONE)
{
(*config().m_nvram_handler)(*this, &file, FALSE);
file.close();
}
else
{
(*config().m_nvram_handler)(*this, NULL, FALSE);
}
}
nvram_interface_iterator iter(root_device());
for (device_nvram_interface *nvram = iter.first(); nvram != NULL; nvram = iter.next())
{
@ -1245,17 +1230,6 @@ void running_machine::nvram_load()
void running_machine::nvram_save()
{
if (config().m_nvram_handler != NULL)
{
astring filename;
emu_file file(options().nvram_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS);
if (file.open(nvram_filename(filename, root_device()), ".nv") == FILERR_NONE)
{
(*config().m_nvram_handler)(*this, &file, TRUE);
file.close();
}
}
nvram_interface_iterator iter(root_device());
for (device_nvram_interface *nvram = iter.first(); nvram != NULL; nvram = iter.next())
{

20
src/emu/mcfglgcy.h
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@ -1,20 +0,0 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles
/***************************************************************************
mcfglgcy.h
Legacy machine configuration helpers.
***************************************************************************/
#pragma once
#ifndef __MCFGLGCY_H__
#define __MCFGLGCY_H__
// core functions
#define MCFG_NVRAM_HANDLER(_func) \
config.m_nvram_handler = NVRAM_HANDLER_NAME(_func);
#endif /* __MCFGLGCY_H__ */

1
src/emu/mconfig.c
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@ -25,7 +25,6 @@ machine_config::machine_config(const game_driver &gamedrv, emu_options &options)
: m_minimum_quantum(attotime::zero),
m_watchdog_vblank_count(0),
m_watchdog_time(attotime::zero),
m_nvram_handler(NULL),
m_default_layout(NULL),
m_gamedrv(gamedrv),
m_options(options)

18
src/emu/mconfig.h
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@ -26,15 +26,6 @@
#define MIN_TAG_LENGTH 1
#define MAX_TAG_LENGTH 15
#define NVRAM_HANDLER_NAME(name) nvram_handler_##name
#define NVRAM_HANDLER(name) void NVRAM_HANDLER_NAME(name)(running_machine &machine, emu_file *file, int read_or_write)
#define NVRAM_HANDLER_CALL(name) NVRAM_HANDLER_NAME(name)(machine, file, read_or_write)
// NULL versions
#define nvram_handler_0 NULL
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@ -44,12 +35,6 @@ struct gfx_decode_entry;
class driver_device;
class screen_device;
// various callback functions
typedef void (*nvram_handler_func)(running_machine &machine, emu_file *file, int read_or_write);
// ======================> machine_config
// machine configuration definition
@ -78,9 +63,6 @@ public:
INT32 m_watchdog_vblank_count; // number of VBLANKs until the watchdog kills us
attotime m_watchdog_time; // length of time until the watchdog kills us
// legacy callbacks
nvram_handler_func m_nvram_handler; // NVRAM save/load callback
// other parameters
const char * m_default_layout; // default layout for this machine

421
src/mame/audio/cage.c
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@ -13,7 +13,6 @@
#include "emu.h"
#include "cpu/tms32031/tms32031.h"
#include "sound/dmadac.h"
#include "cage.h"
@ -27,46 +26,6 @@
#define DAC_BUFFER_CHANNELS 4
#define STACK_SOUND_BUFSIZE (1024)
/*************************************
*
* Statics
*
*************************************/
struct cage_t
{
cpu_device *cpu;
attotime cpu_h1_clock_period;
UINT8 cpu_to_cage_ready;
UINT8 cage_to_cpu_ready;
void (*irqhandler)(running_machine &, int);
attotime serial_period_per_word;
UINT8 dma_enabled;
UINT8 dma_timer_enabled;
timer_device *dma_timer;
UINT8 timer_enabled[2];
timer_device *timer[2];
UINT32 tms32031_io_regs[0x100];
UINT16 from_main;
UINT16 control;
UINT32 *speedup_ram;
dmadac_sound_device *dmadac[DAC_BUFFER_CHANNELS];
};
static cage_t cage;
/*************************************
*
* I/O port definitions
@ -140,78 +99,80 @@ static const char *const register_names[] =
/*************************************
*
* Prototypes
*
*************************************/
static TIMER_DEVICE_CALLBACK( dma_timer_callback );
static TIMER_DEVICE_CALLBACK( cage_timer_callback );
static void update_timer(int which);
static DECLARE_WRITE32_HANDLER( speedup_w );
/*************************************
*
* Initialization
*
*************************************/
const device_type ATARI_CAGE = &device_creator<atari_cage_device>;
void cage_init(running_machine &machine, offs_t speedup)
//-------------------------------------------------
// atari_cage_device - constructor
//-------------------------------------------------
atari_cage_device::atari_cage_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, ATARI_CAGE, "Atari CAGE", tag, owner, clock, "atari_cage", __FILE__),
m_irqhandler(*this)
{
}
atari_cage_device::atari_cage_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
m_irqhandler(*this)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void atari_cage_device::device_start()
{
cage_t *state = &cage;
attotime cage_cpu_clock_period;
int chan;
state->irqhandler = NULL;
// resolve callbacks
m_irqhandler.resolve_safe();
machine.root_device().membank("bank10")->set_base(machine.root_device().memregion("cageboot")->base());
machine.root_device().membank("bank11")->set_base(machine.root_device().memregion("cage")->base());
membank("bank10")->set_base(machine().root_device().memregion("cageboot")->base());
membank("bank11")->set_base(machine().root_device().memregion("cage")->base());
state->cpu = machine.device<cpu_device>("cage");
cage_cpu_clock_period = attotime::from_hz(state->cpu->clock());
state->cpu_h1_clock_period = cage_cpu_clock_period * 2;
m_cpu = subdevice<cpu_device>("cage");
cage_cpu_clock_period = attotime::from_hz(m_cpu->clock());
m_cpu_h1_clock_period = cage_cpu_clock_period * 2;
state->dma_timer = machine.device<timer_device>("cage_dma_timer");
state->timer[0] = machine.device<timer_device>("cage_timer0");
state->timer[1] = machine.device<timer_device>("cage_timer1");
m_dma_timer = subdevice<timer_device>("cage_dma_timer");
m_timer[0] = subdevice<timer_device>("cage_timer0");
m_timer[1] = subdevice<timer_device>("cage_timer1");
if (speedup)
state->speedup_ram = state->cpu->space(AS_PROGRAM).install_legacy_write_handler(speedup, speedup, FUNC(speedup_w));
if (m_speedup)
m_speedup_ram = m_cpu->space(AS_PROGRAM).install_write_handler(m_speedup, m_speedup, write32_delegate(FUNC(atari_cage_device::speedup_w),this));
for (chan = 0; chan < DAC_BUFFER_CHANNELS; chan++)
{
char buffer[10];
sprintf(buffer, "dac%d", chan + 1);
state->dmadac[chan] = machine.device<dmadac_sound_device>(buffer);
m_dmadac[chan] = subdevice<dmadac_sound_device>(buffer);
}
machine.save().save_item(NAME(cage.cpu_to_cage_ready));
machine.save().save_item(NAME(cage.cage_to_cpu_ready));
machine.save().save_item(NAME(cage.serial_period_per_word));
machine.save().save_item(NAME(cage.dma_enabled));
machine.save().save_item(NAME(cage.dma_timer_enabled));
machine.save().save_item(NAME(cage.timer_enabled));
machine.save().save_item(NAME(cage.from_main));
machine.save().save_item(NAME(cage.control));
save_item(NAME(m_cpu_to_cage_ready));
save_item(NAME(m_cage_to_cpu_ready));
save_item(NAME(m_serial_period_per_word));
save_item(NAME(m_dma_enabled));
save_item(NAME(m_dma_timer_enabled));
save_item(NAME(m_timer_enabled));
save_item(NAME(m_from_main));
save_item(NAME(m_control));
}
void cage_set_irq_handler(void (*irqhandler)(running_machine &, int))
void atari_cage_device::reset_w(int state)
{
cage_t *state = &cage;
state->irqhandler = irqhandler;
}
void cage_reset_w(address_space &space, int state)
{
cage_t *sndstate = &cage;
if (state)
cage_control_w(space.machine(), 0);
sndstate->cpu->set_input_line(INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
control_w(0);
m_cpu->set_input_line(INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -222,18 +183,17 @@ void cage_reset_w(address_space &space, int state)
*
*************************************/
static TIMER_DEVICE_CALLBACK( dma_timer_callback )
TIMER_DEVICE_CALLBACK_MEMBER( atari_cage_device::dma_timer_callback )
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
UINT32 *tms32031_io_regs = m_tms32031_io_regs;
/* if we weren't enabled, don't do anything, just shut ourself off */
if (!state->dma_enabled)
if (!m_dma_enabled)
{
if (state->dma_timer_enabled)
if (m_dma_timer_enabled)
{
timer.adjust(attotime::never);
state->dma_timer_enabled = 0;
m_dma_timer_enabled = 0;
}
return;
}
@ -243,21 +203,20 @@ static TIMER_DEVICE_CALLBACK( dma_timer_callback )
tms32031_io_regs[DMA_SOURCE_ADDR] = param;
/* set the interrupt */
state->cpu->set_input_line(TMS3203X_DINT, ASSERT_LINE);
state->dma_enabled = 0;
m_cpu->set_input_line(TMS3203X_DINT, ASSERT_LINE);
m_dma_enabled = 0;
}
static void update_dma_state(address_space &space)
void atari_cage_device::update_dma_state(address_space &space)
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
UINT32 *tms32031_io_regs = m_tms32031_io_regs;
/* determine the new enabled state */
int enabled = ((tms32031_io_regs[DMA_GLOBAL_CTL] & 3) == 3) && (tms32031_io_regs[DMA_TRANSFER_COUNT] != 0);
/* see if we turned on */
if (enabled && !state->dma_enabled)
if (enabled && !m_dma_enabled)
{
INT16 sound_data[STACK_SOUND_BUFSIZE];
UINT32 addr, inc;
@ -277,29 +236,29 @@ static void update_dma_state(address_space &space)
sound_data[i % STACK_SOUND_BUFSIZE] = space.read_dword(addr * 4);
addr += inc;
if (i % STACK_SOUND_BUFSIZE == STACK_SOUND_BUFSIZE - 1)
dmadac_transfer(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data);
dmadac_transfer(&m_dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, STACK_SOUND_BUFSIZE / DAC_BUFFER_CHANNELS, sound_data);
}
if (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE != 0)
dmadac_transfer(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE) / DAC_BUFFER_CHANNELS, sound_data);
dmadac_transfer(&m_dmadac[0], DAC_BUFFER_CHANNELS, 1, DAC_BUFFER_CHANNELS, (tms32031_io_regs[DMA_TRANSFER_COUNT] % STACK_SOUND_BUFSIZE) / DAC_BUFFER_CHANNELS, sound_data);
/* compute the time of the interrupt and set the timer */
if (!state->dma_timer_enabled)
if (!m_dma_timer_enabled)
{
attotime period = state->serial_period_per_word * tms32031_io_regs[DMA_TRANSFER_COUNT];
state->dma_timer->adjust(period, addr, period);
state->dma_timer_enabled = 1;
attotime period = m_serial_period_per_word * tms32031_io_regs[DMA_TRANSFER_COUNT];
m_dma_timer->adjust(period, addr, period);
m_dma_timer_enabled = 1;
}
}
/* see if we turned off */
else if (!enabled && state->dma_enabled)
else if (!enabled && m_dma_enabled)
{
state->dma_timer->reset();
state->dma_timer_enabled = 0;
m_dma_timer->reset();
m_dma_timer_enabled = 0;
}
/* set the new state */
state->dma_enabled = enabled;
m_dma_enabled = enabled;
}
@ -310,47 +269,44 @@ static void update_dma_state(address_space &space)
*
*************************************/
static TIMER_DEVICE_CALLBACK( cage_timer_callback )
TIMER_DEVICE_CALLBACK_MEMBER( atari_cage_device::cage_timer_callback )
{
cage_t *state = &cage;
int which = param;
/* set the interrupt */
state->cpu->set_input_line(TMS3203X_TINT0 + which, ASSERT_LINE);
state->timer_enabled[which] = 0;
m_cpu->set_input_line(TMS3203X_TINT0 + which, ASSERT_LINE);
m_timer_enabled[which] = 0;
update_timer(which);
}
static void update_timer(int which)
void atari_cage_device::update_timer(int which)
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
UINT32 *tms32031_io_regs = m_tms32031_io_regs;
/* determine the new enabled state */
int base = 0x10 * which;
int enabled = ((tms32031_io_regs[base + TIMER0_GLOBAL_CTL] & 0xc0) == 0xc0);
/* see if we turned on */
if (enabled && !state->timer_enabled[which])
if (enabled && !m_timer_enabled[which])
{
attotime period = state->cpu_h1_clock_period * (2 * tms32031_io_regs[base + TIMER0_PERIOD]);
attotime period = m_cpu_h1_clock_period * (2 * tms32031_io_regs[base + TIMER0_PERIOD]);
/* make sure our assumptions are correct */
if (tms32031_io_regs[base + TIMER0_GLOBAL_CTL] != 0x2c1)
logerror("CAGE TIMER%d: unexpected timer config %08X!\n", which, tms32031_io_regs[base + TIMER0_GLOBAL_CTL]);
state->timer[which]->adjust(period, which);
m_timer[which]->adjust(period, which);
}
/* see if we turned off */
else if (!enabled && state->timer_enabled[which])
else if (!enabled && m_timer_enabled[which])
{
state->timer[which]->adjust(attotime::never, which);
m_timer[which]->adjust(attotime::never, which);
}
/* set the new state */
state->timer_enabled[which] = enabled;
m_timer_enabled[which] = enabled;
}
@ -361,15 +317,14 @@ static void update_timer(int which)
*
*************************************/
static void update_serial(running_machine &machine)
void atari_cage_device::update_serial()
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
UINT32 *tms32031_io_regs = m_tms32031_io_regs;
attotime serial_clock_period, bit_clock_period;
UINT32 freq;
/* we start out at half the H1 frequency (or 2x the H1 period) */
serial_clock_period = state->cpu_h1_clock_period * 2;
serial_clock_period = m_cpu_h1_clock_period * 2;
/* if we're in clock mode, muliply by another factor of 2 */
if (tms32031_io_regs[SPORT_GLOBAL_CTL] & 4)
@ -379,14 +334,14 @@ static void update_serial(running_machine &machine)
bit_clock_period = serial_clock_period * (tms32031_io_regs[SPORT_TIMER_PERIOD] & 0xffff);
/* and times the number of bits per sample */
state->serial_period_per_word = bit_clock_period * (8 * (((tms32031_io_regs[SPORT_GLOBAL_CTL] >> 18) & 3) + 1));
m_serial_period_per_word = bit_clock_period * (8 * (((tms32031_io_regs[SPORT_GLOBAL_CTL] >> 18) & 3) + 1));
/* compute the step value to stretch this to the sample_rate */
freq = ATTOSECONDS_TO_HZ(state->serial_period_per_word.attoseconds) / DAC_BUFFER_CHANNELS;
freq = ATTOSECONDS_TO_HZ(m_serial_period_per_word.attoseconds) / DAC_BUFFER_CHANNELS;
if (freq > 0 && freq < 100000)
{
dmadac_set_frequency(&state->dmadac[0], DAC_BUFFER_CHANNELS, freq);
dmadac_enable(&state->dmadac[0], DAC_BUFFER_CHANNELS, 1);
dmadac_set_frequency(&m_dmadac[0], DAC_BUFFER_CHANNELS, freq);
dmadac_enable(&m_dmadac[0], DAC_BUFFER_CHANNELS, 1);
}
}
@ -398,16 +353,15 @@ static void update_serial(running_machine &machine)
*
*************************************/
static READ32_HANDLER( tms32031_io_r )
READ32_MEMBER( atari_cage_device::tms32031_io_r )
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
UINT32 *tms32031_io_regs = m_tms32031_io_regs;
UINT16 result = tms32031_io_regs[offset];
switch (offset)
{
case DMA_GLOBAL_CTL:
result = (result & ~0xc) | (state->dma_enabled ? 0xc : 0x0);
result = (result & ~0xc) | (m_dma_enabled ? 0xc : 0x0);
break;
}
@ -417,10 +371,9 @@ static READ32_HANDLER( tms32031_io_r )
}
static WRITE32_HANDLER( tms32031_io_w )
WRITE32_MEMBER( atari_cage_device::tms32031_io_w )
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
UINT32 *tms32031_io_regs = m_tms32031_io_regs;
COMBINE_DATA(&tms32031_io_regs[offset]);
@ -456,7 +409,7 @@ static WRITE32_HANDLER( tms32031_io_w )
case SPORT_DATA_TX:
#if (DAC_BUFFER_CHANNELS == 4)
if ((int)ATTOSECONDS_TO_HZ(state->serial_period_per_word.attoseconds) == 22050*4 && (tms32031_io_regs[SPORT_RX_CTL] & 0xff) == 0x62)
if ((int)ATTOSECONDS_TO_HZ(m_serial_period_per_word.attoseconds) == 22050*4 && (tms32031_io_regs[SPORT_RX_CTL] & 0xff) == 0x62)
tms32031_io_regs[SPORT_RX_CTL] ^= 0x800;
#endif
break;
@ -464,7 +417,7 @@ static WRITE32_HANDLER( tms32031_io_w )
case SPORT_GLOBAL_CTL:
case SPORT_TIMER_CTL:
case SPORT_TIMER_PERIOD:
update_serial(space.machine());
update_serial();
break;
}
}
@ -477,158 +430,145 @@ static WRITE32_HANDLER( tms32031_io_w )
*
*************************************/
static void update_control_lines(running_machine &machine)
void atari_cage_device::update_control_lines()
{
cage_t *state = &cage;
int val;
/* set the IRQ to the main CPU */
if (state->irqhandler)
{
int reason = 0;
int reason = 0;
if ((state->control & 3) == 3 && !state->cpu_to_cage_ready)
reason |= CAGE_IRQ_REASON_BUFFER_EMPTY;
if ((state->control & 2) && state->cage_to_cpu_ready)
reason |= CAGE_IRQ_REASON_DATA_READY;
(*state->irqhandler)(machine, reason);
}
if ((m_control & 3) == 3 && !m_cpu_to_cage_ready)
reason |= CAGE_IRQ_REASON_BUFFER_EMPTY;
if ((m_control & 2) && m_cage_to_cpu_ready)
reason |= CAGE_IRQ_REASON_DATA_READY;
m_irqhandler(machine().driver_data()->generic_space(), 0, reason);
/* set the IOF input lines */
val = state->cpu->state_int(TMS3203X_IOF);
val = m_cpu->state_int(TMS3203X_IOF);
val &= ~0x88;
if (state->cpu_to_cage_ready) val |= 0x08;
if (state->cage_to_cpu_ready) val |= 0x80;
state->cpu->set_state_int(TMS3203X_IOF, val);
if (m_cpu_to_cage_ready) val |= 0x08;
if (m_cage_to_cpu_ready) val |= 0x80;
m_cpu->set_state_int(TMS3203X_IOF, val);
}
static READ32_HANDLER( cage_from_main_r )
READ32_MEMBER( atari_cage_device::cage_from_main_r )
{
cage_t *state = &cage;
if (LOG_COMM)
logerror("%06X:CAGE read command = %04X\n", space.device().safe_pc(), state->from_main);
state->cpu_to_cage_ready = 0;
update_control_lines(space.machine());
state->cpu->set_input_line(TMS3203X_IRQ0, CLEAR_LINE);
return state->from_main;
logerror("%06X:CAGE read command = %04X\n", space.device().safe_pc(), m_from_main);
m_cpu_to_cage_ready = 0;
update_control_lines();
m_cpu->set_input_line(TMS3203X_IRQ0, CLEAR_LINE);
return m_from_main;
}
static WRITE32_HANDLER( cage_from_main_ack_w )
WRITE32_MEMBER( atari_cage_device::cage_from_main_ack_w )
{
if (LOG_COMM)
{
cage_t *state = &cage;
logerror("%06X:CAGE ack command = %04X\n", space.device().safe_pc(), state->from_main);
logerror("%06X:CAGE ack command = %04X\n", space.device().safe_pc(), m_from_main);
}
}
static WRITE32_HANDLER( cage_to_main_w )
WRITE32_MEMBER( atari_cage_device::cage_to_main_w )
{
cage_t *state = &cage;
if (LOG_COMM)
logerror("%06X:Data from CAGE = %04X\n", space.device().safe_pc(), data);
driver_device *drvstate = space.machine().driver_data<driver_device>();
drvstate->soundlatch_word_w(space, 0, data, mem_mask);
state->cage_to_cpu_ready = 1;
update_control_lines(space.machine());
m_cage_to_cpu_ready = 1;
update_control_lines();
}
static READ32_HANDLER( cage_io_status_r )
READ32_MEMBER( atari_cage_device::cage_io_status_r )
{
cage_t *state = &cage;
int result = 0;
if (state->cpu_to_cage_ready)
if (m_cpu_to_cage_ready)
result |= 0x80;
if (!state->cage_to_cpu_ready)
if (!m_cage_to_cpu_ready)
result |= 0x40;
return result;
}
UINT16 cage_main_r(address_space &space)
UINT16 atari_cage_device::main_r()
{
cage_t *state = &cage;
driver_device *drvstate = space.machine().driver_data<driver_device>();
driver_device *drvstate = machine().driver_data<driver_device>();
if (LOG_COMM)
logerror("%s:main read data = %04X\n", space.machine().describe_context(), drvstate->soundlatch_word_r(space, 0, 0));
state->cage_to_cpu_ready = 0;
update_control_lines(space.machine());
return drvstate->soundlatch_word_r(space, 0, 0xffff);
logerror("%s:main read data = %04X\n", machine().describe_context(), drvstate->soundlatch_word_r(drvstate->generic_space(), 0, 0));
m_cage_to_cpu_ready = 0;
update_control_lines();
return drvstate->soundlatch_word_r(drvstate->generic_space(), 0, 0xffff);
}
static TIMER_CALLBACK( cage_deferred_w )
TIMER_CALLBACK_MEMBER( atari_cage_device::cage_deferred_w )
{
cage_t *state = &cage;
state->from_main = param;
state->cpu_to_cage_ready = 1;
update_control_lines(machine);
state->cpu->set_input_line(TMS3203X_IRQ0, ASSERT_LINE);
m_from_main = param;
m_cpu_to_cage_ready = 1;
update_control_lines();
m_cpu->set_input_line(TMS3203X_IRQ0, ASSERT_LINE);
}
void cage_main_w(address_space &space, UINT16 data)
void atari_cage_device::main_w(UINT16 data)
{
if (LOG_COMM)
logerror("%s:Command to CAGE = %04X\n", space.machine().describe_context(), data);
space.machine().scheduler().synchronize(FUNC(cage_deferred_w), data);
logerror("%s:Command to CAGE = %04X\n", machine().describe_context(), data);
machine().scheduler().synchronize(timer_expired_delegate(FUNC(atari_cage_device::cage_deferred_w),this), data);
}
UINT16 cage_control_r(running_machine &machine)
UINT16 atari_cage_device::control_r()
{
cage_t *state = &cage;
UINT16 result = 0;
if (state->cpu_to_cage_ready)
if (m_cpu_to_cage_ready)
result |= 2;
if (state->cage_to_cpu_ready)
if (m_cage_to_cpu_ready)
result |= 1;
return result;
}
void cage_control_w(running_machine &machine, UINT16 data)
void atari_cage_device::control_w(UINT16 data)
{
cage_t *state = &cage;
UINT32 *tms32031_io_regs = state->tms32031_io_regs;
UINT32 *tms32031_io_regs = m_tms32031_io_regs;
state->control = data;
m_control = data;
/* CPU is reset if both control lines are 0 */
if (!(state->control & 3))
if (!(m_control & 3))
{
state->cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
state->cpu->set_input_line(TMS3203X_IRQ1, ASSERT_LINE);
m_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
m_cpu->set_input_line(TMS3203X_IRQ1, ASSERT_LINE);
state->dma_enabled = 0;
state->dma_timer_enabled = 0;
state->dma_timer->reset();
m_dma_enabled = 0;
m_dma_timer_enabled = 0;
m_dma_timer->reset();
state->timer_enabled[0] = 0;
state->timer_enabled[1] = 0;
state->timer[0]->reset();
state->timer[1]->reset();
m_timer_enabled[0] = 0;
m_timer_enabled[1] = 0;
m_timer[0]->reset();
m_timer[1]->reset();
memset(tms32031_io_regs, 0, 0x60 * 4);
state->cpu_to_cage_ready = 0;
state->cage_to_cpu_ready = 0;
m_cpu_to_cage_ready = 0;
m_cage_to_cpu_ready = 0;
}
else
{
state->cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
state->cpu->set_input_line(TMS3203X_IRQ1, CLEAR_LINE);
m_cpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
m_cpu->set_input_line(TMS3203X_IRQ1, CLEAR_LINE);
}
/* update the control state */
update_control_lines(machine);
update_control_lines();
}
@ -639,12 +579,11 @@ void cage_control_w(running_machine &machine, UINT16 data)
*
*************************************/
static WRITE32_HANDLER( speedup_w )
WRITE32_MEMBER( atari_cage_device::speedup_w )
{
cage_t *state = &cage;
space.device().execute().eat_cycles(100);
COMBINE_DATA(&state->speedup_ram[offset]);
COMBINE_DATA(&m_speedup_ram[offset]);
}
@ -661,26 +600,26 @@ static const tms3203x_config cage_config =
};
static ADDRESS_MAP_START( cage_map, AS_PROGRAM, 32, driver_device )
static ADDRESS_MAP_START( cage_map, AS_PROGRAM, 32, atari_cage_device )
AM_RANGE(0x000000, 0x00ffff) AM_RAM
AM_RANGE(0x200000, 0x200000) AM_WRITENOP
AM_RANGE(0x400000, 0x47ffff) AM_ROMBANK("bank10")
AM_RANGE(0x808000, 0x8080ff) AM_READWRITE_LEGACY(tms32031_io_r, tms32031_io_w)
AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w)
AM_RANGE(0x809800, 0x809fff) AM_RAM
AM_RANGE(0xa00000, 0xa00000) AM_READWRITE_LEGACY(cage_from_main_r, cage_to_main_w)
AM_RANGE(0xa00000, 0xa00000) AM_READWRITE(cage_from_main_r, cage_to_main_w)
AM_RANGE(0xc00000, 0xffffff) AM_ROMBANK("bank11")
ADDRESS_MAP_END
static ADDRESS_MAP_START( cage_map_seattle, AS_PROGRAM, 32, driver_device )
static ADDRESS_MAP_START( cage_map_seattle, AS_PROGRAM, 32, atari_cage_seattle_device )
AM_RANGE(0x000000, 0x00ffff) AM_RAM
AM_RANGE(0x200000, 0x200000) AM_WRITENOP
AM_RANGE(0x400000, 0x47ffff) AM_ROMBANK("bank10")
AM_RANGE(0x808000, 0x8080ff) AM_READWRITE_LEGACY(tms32031_io_r, tms32031_io_w)
AM_RANGE(0x808000, 0x8080ff) AM_READWRITE(tms32031_io_r, tms32031_io_w)
AM_RANGE(0x809800, 0x809fff) AM_RAM
AM_RANGE(0xa00000, 0xa00000) AM_READWRITE_LEGACY(cage_from_main_r, cage_from_main_ack_w)
AM_RANGE(0xa00001, 0xa00001) AM_WRITE_LEGACY(cage_to_main_w)
AM_RANGE(0xa00003, 0xa00003) AM_READ_LEGACY(cage_io_status_r)
AM_RANGE(0xa00000, 0xa00000) AM_READWRITE(cage_from_main_r, cage_from_main_ack_w)
AM_RANGE(0xa00001, 0xa00001) AM_WRITE(cage_to_main_w)
AM_RANGE(0xa00003, 0xa00003) AM_READ(cage_io_status_r)
AM_RANGE(0xc00000, 0xffffff) AM_ROMBANK("bank11")
ADDRESS_MAP_END
@ -699,9 +638,9 @@ MACHINE_CONFIG_FRAGMENT( cage )
MCFG_TMS3203X_CONFIG(cage_config)
MCFG_CPU_PROGRAM_MAP(cage_map)
MCFG_TIMER_ADD("cage_dma_timer", dma_timer_callback)
MCFG_TIMER_ADD("cage_timer0", cage_timer_callback)
MCFG_TIMER_ADD("cage_timer1", cage_timer_callback)
MCFG_TIMER_DEVICE_ADD("cage_dma_timer", DEVICE_SELF, atari_cage_device, dma_timer_callback)
MCFG_TIMER_DEVICE_ADD("cage_timer0", DEVICE_SELF, atari_cage_device, cage_timer_callback)
MCFG_TIMER_DEVICE_ADD("cage_timer1", DEVICE_SELF, atari_cage_device, cage_timer_callback)
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
@ -733,3 +672,31 @@ MACHINE_CONFIG_DERIVED( cage_seattle, cage )
MCFG_CPU_MODIFY("cage")
MCFG_CPU_PROGRAM_MAP(cage_map_seattle)
MACHINE_CONFIG_END
//-------------------------------------------------
// machine_config_additions - device-specific
// machine configurations
//-------------------------------------------------
machine_config_constructor atari_cage_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( cage );
}
const device_type ATARI_CAGE_SEATTLE = &device_creator<atari_cage_seattle_device>;
//-------------------------------------------------
// atari_cage_seattle_device - constructor
//-------------------------------------------------
atari_cage_seattle_device::atari_cage_seattle_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
atari_cage_device(mconfig, ATARI_CAGE_SEATTLE, "Atari CAGE Seattle", tag, owner, clock, "atari_cage_seattle", __FILE__)
{
}
machine_config_constructor atari_cage_seattle_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( cage_seattle );
}

105
src/mame/audio/cage.h
View File

@ -6,18 +6,105 @@
****************************************************************************/
#ifndef __ATARI_CAGE__
#define __ATARI_CAGE__
#include "sound/dmadac.h"
#define CAGE_IRQ_REASON_DATA_READY (1)
#define CAGE_IRQ_REASON_BUFFER_EMPTY (2)
MACHINE_CONFIG_EXTERN( cage );
MACHINE_CONFIG_EXTERN( cage_seattle );
#define MCFG_ATARI_CAGE_IRQ_CALLBACK(_write) \
devcb = &atari_cage_device::set_irqhandler_callback(*device, DEVCB2_##_write);
void cage_init(running_machine &machine, offs_t speedup);
void cage_set_irq_handler(void (*irqhandler)(running_machine &, int));
void cage_reset_w(address_space &space, int state);
#define MCFG_ATARI_CAGE_SPEEDUP(_speedup) \
atari_cage_device::static_set_speedup(*device, _speedup);
class atari_cage_device : public device_t
{
public:
// construction/destruction
atari_cage_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
atari_cage_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
UINT16 cage_main_r(address_space &space);
void cage_main_w(address_space &space, UINT16 data);
static void static_set_speedup(device_t &device, offs_t speedup) { downcast<atari_cage_device &>(device).m_speedup = speedup; }
template<class _Object> static devcb2_base &set_irqhandler_callback(device_t &device, _Object object) { return downcast<atari_cage_device &>(device).m_irqhandler.set_callback(object); }
UINT16 cage_control_r(running_machine &machine);
void cage_control_w(running_machine &machine, UINT16 data);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
void reset_w(int state);
UINT16 main_r();
void main_w(UINT16 data);
UINT16 control_r();
void control_w(UINT16 data);
TIMER_DEVICE_CALLBACK_MEMBER( dma_timer_callback );
void update_dma_state(address_space &space);
TIMER_DEVICE_CALLBACK_MEMBER( cage_timer_callback );
void update_timer(int which);
void update_serial();
READ32_MEMBER( tms32031_io_r );
WRITE32_MEMBER( tms32031_io_w );
void update_control_lines();
READ32_MEMBER( cage_from_main_r );
WRITE32_MEMBER( cage_from_main_ack_w );
WRITE32_MEMBER( cage_to_main_w );
READ32_MEMBER( cage_io_status_r );
TIMER_CALLBACK_MEMBER( cage_deferred_w );
WRITE32_MEMBER( speedup_w );
protected:
// device-level overrides
virtual void device_start();
private:
cpu_device *m_cpu;
attotime m_cpu_h1_clock_period;
UINT8 m_cpu_to_cage_ready;
UINT8 m_cage_to_cpu_ready;
devcb2_write8 m_irqhandler;
attotime m_serial_period_per_word;
UINT8 m_dma_enabled;
UINT8 m_dma_timer_enabled;
timer_device *m_dma_timer;
UINT8 m_timer_enabled[2];
timer_device *m_timer[2];
UINT32 m_tms32031_io_regs[0x100];
UINT16 m_from_main;
UINT16 m_control;
UINT32 *m_speedup_ram;
dmadac_sound_device *m_dmadac[4];
offs_t m_speedup;
};
// device type definition
extern const device_type ATARI_CAGE;
class atari_cage_seattle_device : public atari_cage_device
{
public:
// construction/destruction
atari_cage_seattle_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
// device type definition
extern const device_type ATARI_CAGE_SEATTLE;
#endif // __ATARI_CAGE__

1499
src/mame/audio/dcs.c
View File

File diff suppressed because it is too large Load Diff

350
src/mame/audio/dcs.h
View File

@ -9,34 +9,338 @@
#ifndef __DCS_H__
#define __DCS_H__
MACHINE_CONFIG_EXTERN( dcs_audio_2k );
MACHINE_CONFIG_EXTERN( dcs_audio_2k_uart );
MACHINE_CONFIG_EXTERN( dcs_audio_8k );
MACHINE_CONFIG_EXTERN( dcs_audio_wpc );
MACHINE_CONFIG_EXTERN( dcs2_audio_2115 );
MACHINE_CONFIG_EXTERN( dcs2_audio_2104 );
MACHINE_CONFIG_EXTERN( dcs2_audio_dsio );
MACHINE_CONFIG_EXTERN( dcs2_audio_denver );
#include "cpu/adsp2100/adsp2100.h"
#include "sound/dmadac.h"
void dcs_init(running_machine &machine);
void dcs2_init(running_machine &machine, int dram_in_mb, offs_t polling_offset);
void dcs_set_auto_ack(running_machine &machine, int state);
#define MCFG_DCS2_AUDIO_DRAM_IN_MB(_dram_in_mb) \
dcs_audio_device::static_set_dram_in_mb(*device, _dram_in_mb);
void dcs_set_fifo_callbacks(UINT16 (*fifo_data_r)(device_t *device), UINT16 (*fifo_status_r)(device_t *device));
void dcs_set_io_callbacks(void (*output_full_cb)(running_machine &, int), void (*input_empty_cb)(running_machine &, int));
#define MCFG_DCS2_AUDIO_POLLING_OFFSET(_polling_offset) \
dcs_audio_device::static_set_polling_offset(*device, _polling_offset);
int dcs_data_r(running_machine &machine);
void dcs_ack_w(running_machine &machine);
int dcs_data2_r(running_machine &machine);
int dcs_control_r(running_machine &machine);
class dcs_audio_device : public device_t
{
public:
// construction/destruction
dcs_audio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
void dcs_data_w(running_machine &machine, int data);
void dcs_reset_w(running_machine &machine, int state);
// for dcs2 (int dram_in_mb, offs_t polling_offset)
static void static_set_dram_in_mb(device_t &device, int dram_in_mb) { downcast<dcs_audio_device &>(device).m_dram_in_mb = dram_in_mb; }
static void static_set_polling_offset(device_t &device, offs_t polling_offset) { downcast<dcs_audio_device &>(device).m_polling_offset = polling_offset; }
void dcs_fifo_notify(running_machine &machine, int count, int max);
void set_auto_ack(int state);
DECLARE_WRITE32_HANDLER( dsio_idma_addr_w );
DECLARE_WRITE32_HANDLER( dsio_idma_data_w );
DECLARE_READ32_HANDLER( dsio_idma_data_r );
void set_fifo_callbacks(read16_delegate fifo_data_r, read16_delegate fifo_status_r, write_line_delegate fifo_reset_w);
void set_io_callbacks(write_line_delegate output_full_cb, write_line_delegate input_empty_cb);
int data_r();
void ack_w();
int data2_r();
int control_r();
void data_w(int data);
void reset_w(int state);
void fifo_notify(int count, int max);
DECLARE_WRITE32_MEMBER( dsio_idma_addr_w );
DECLARE_WRITE32_MEMBER( dsio_idma_data_w );
DECLARE_READ32_MEMBER( dsio_idma_data_r );
// non public
void dcs_boot();
TIMER_CALLBACK_MEMBER( dcs_reset );
void dcs_register_state();
DECLARE_READ16_MEMBER( dcs_dataram_r );
DECLARE_WRITE16_MEMBER( dcs_dataram_w );
DECLARE_WRITE16_MEMBER( dcs_data_bank_select_w );
inline void sdrc_update_bank_pointers();
void sdrc_remap_memory();
void sdrc_reset();
DECLARE_READ16_MEMBER( sdrc_r );
DECLARE_WRITE16_MEMBER( sdrc_w );
void dsio_reset();
DECLARE_READ16_MEMBER( dsio_r );
DECLARE_WRITE16_MEMBER( dsio_w );
void denver_reset();
DECLARE_READ16_MEMBER( denver_r );
DECLARE_WRITE16_MEMBER( denver_w );
DECLARE_READ16_MEMBER( latch_status_r );
DECLARE_READ16_MEMBER( fifo_input_r );
void dcs_delayed_data_w(int data);
TIMER_CALLBACK_MEMBER( dcs_delayed_data_w_callback );
DECLARE_WRITE16_MEMBER( input_latch_ack_w );
DECLARE_READ16_MEMBER( input_latch_r );
TIMER_CALLBACK_MEMBER( latch_delayed_w );
DECLARE_WRITE16_MEMBER( output_latch_w );
void delayed_ack_w();
TIMER_CALLBACK_MEMBER( delayed_ack_w_callback );
TIMER_CALLBACK_MEMBER( output_control_delayed_w );
DECLARE_WRITE16_MEMBER( output_control_w );
DECLARE_READ16_MEMBER( output_control_r );
void update_timer_count();
TIMER_DEVICE_CALLBACK_MEMBER( internal_timer_callback );
void reset_timer();
DECLARE_WRITE_LINE_MEMBER(timer_enable_callback);
DECLARE_READ16_MEMBER( adsp_control_r );
DECLARE_WRITE16_MEMBER( adsp_control_w );
TIMER_DEVICE_CALLBACK_MEMBER( dcs_irq );
TIMER_DEVICE_CALLBACK_MEMBER( sport0_irq );
void recompute_sample_rate();
WRITE32_MEMBER(sound_tx_callback);
DECLARE_READ16_MEMBER( dcs_polling_r );
DECLARE_WRITE16_MEMBER( dcs_polling_w );
TIMER_DEVICE_CALLBACK_MEMBER( transfer_watchdog_callback );
TIMER_CALLBACK_MEMBER( s1_ack_callback2 );
TIMER_CALLBACK_MEMBER( s1_ack_callback1 );
int preprocess_stage_1(UINT16 data);
TIMER_CALLBACK_MEMBER( s2_ack_callback );
int preprocess_stage_2(UINT16 data);
int preprocess_write(UINT16 data);
protected:
// device-level overrides
virtual void device_start();
protected:
struct sdrc_state
{
UINT16 reg[4];
UINT8 seed;
};
struct dsio_state
{
UINT16 reg[4];
UINT8 start_on_next_write;
UINT16 channelbits;
};
struct hle_transfer_state
{
UINT8 hle_enabled;
INT32 dcs_state;
INT32 state;
INT32 start;
INT32 stop;
INT32 type;
INT32 temp;
INT32 writes_left;
UINT16 sum;
INT32 fifo_entries;
timer_device *watchdog;
};
adsp21xx_device *m_cpu;
address_space *m_program;
address_space *m_data;
UINT8 m_rev;
offs_t m_polling_offset;
UINT32 m_polling_count;
/* sound output */
UINT8 m_channels;
UINT16 m_size;
UINT16 m_incs;
dmadac_sound_device *m_dmadac[6];
timer_device *m_reg_timer;
timer_device *m_sport_timer;
timer_device *m_internal_timer;
INT32 m_ireg;
UINT16 m_ireg_base;
UINT16 m_control_regs[32];
/* memory access/booting */
UINT16 * m_bootrom;
UINT32 m_bootrom_words;
UINT16 * m_sounddata;
UINT32 m_sounddata_words;
UINT32 m_sounddata_banks;
UINT16 m_sounddata_bank;
/* I/O with the host */
UINT8 m_auto_ack;
UINT16 m_latch_control;
UINT16 m_input_data;
UINT16 m_output_data;
UINT16 m_output_control;
UINT64 m_output_control_cycles;
UINT8 m_last_output_full;
UINT8 m_last_input_empty;
UINT16 m_progflags;
write_line_delegate m_output_full_cb;
write_line_delegate m_input_empty_cb;
read16_delegate m_fifo_data_r;
read16_delegate m_fifo_status_r;
write_line_delegate m_fifo_reset_w;
/* timers */
UINT8 m_timer_enable;
UINT8 m_timer_ignore;
UINT64 m_timer_start_cycles;
UINT32 m_timer_start_count;
UINT32 m_timer_scale;
UINT32 m_timer_period;
UINT32 m_timers_fired;
UINT16 *m_sram;
UINT16 *m_polling_base;
UINT32 *m_internal_program_ram;
UINT32 *m_external_program_ram;
sdrc_state m_sdrc;
dsio_state m_dsio;
hle_transfer_state m_transfer;
int m_dram_in_mb;
};
// dcs_audio_2k_device
class dcs_audio_2k_device : public dcs_audio_device
{
public:
// construction/destruction
dcs_audio_2k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
// device type definition
extern const device_type DCS_AUDIO_2K;
// dcs_audio_2k_uart_device
class dcs_audio_2k_uart_device : public dcs_audio_device
{
public:
// construction/destruction
dcs_audio_2k_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
// device type definition
extern const device_type DCS_AUDIO_2K_UART;
// dcs_audio_8k_device
class dcs_audio_8k_device : public dcs_audio_device
{
public:
// construction/destruction
dcs_audio_8k_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
// device type definition
extern const device_type DCS_AUDIO_8K;
// dcs_audio_wpc_device
class dcs_audio_wpc_device : public dcs_audio_device
{
public:
// construction/destruction
dcs_audio_wpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
// device type definition
extern const device_type DCS_AUDIO_WPC;
// dcs2_audio_device
class dcs2_audio_device : public dcs_audio_device
{
public:
// construction/destruction
dcs2_audio_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
protected:
// device-level overrides
virtual void device_start();
};
// dcs2_audio_2115_device
class dcs2_audio_2115_device : public dcs2_audio_device
{
public:
// construction/destruction
dcs2_audio_2115_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
// device type definition
extern const device_type DCS2_AUDIO_2115;
// dcs2_audio_2104_device
class dcs2_audio_2104_device : public dcs2_audio_device
{
public:
// construction/destruction
dcs2_audio_2104_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
// device type definition
extern const device_type DCS2_AUDIO_2104;
// dcs2_audio_dsio_device
class dcs2_audio_dsio_device : public dcs2_audio_device
{
public:
// construction/destruction
dcs2_audio_dsio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
// device type definition
extern const device_type DCS2_AUDIO_DSIO;
// dcs2_audio_denver_device
class dcs2_audio_denver_device : public dcs2_audio_device
{
public:
// construction/destruction
dcs2_audio_denver_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
};
// device type definition
extern const device_type DCS2_AUDIO_DENVER;
#endif

79
src/mame/drivers/atarigt.c
View File

@ -56,7 +56,6 @@
#include "machine/atarigen.h"
#include "video/atarirle.h"
#include "cpu/m68000/m68000.h"
#include "audio/cage.h"
#include "includes/atarigt.h"
@ -64,17 +63,6 @@
#define HACK_TMEK_CONTROLS (0)
/*************************************
*
* Statics
*
*************************************/
static void cage_irq_callback(running_machine &machine, int reason);
/*************************************
*
* Initialization
@ -103,19 +91,14 @@ MACHINE_RESET_MEMBER(atarigt_state,atarigt)
*
*************************************/
static void cage_irq_callback(running_machine &machine, int reason)
WRITE8_MEMBER(atarigt_state::cage_irq_callback)
{
atarigen_state *atarigen = machine.driver_data<atarigen_state>();
address_space &space = atarigen->m_maincpu->space(AS_PROGRAM);
if (reason)
atarigen->sound_int_gen(atarigen->m_maincpu);
if (data)
sound_int_gen(m_maincpu);
else
atarigen->sound_int_ack_w(space,0,0);
sound_int_ack_w(space,0,0);
}
/*************************************
*
* Input ports
@ -259,9 +242,9 @@ READ32_MEMBER(atarigt_state::sound_data_r)
UINT32 result = 0;
if (ACCESSING_BITS_0_15)
result |= cage_control_r(machine());
result |= m_cage->control_r();
if (ACCESSING_BITS_16_31)
result |= cage_main_r(space) << 16;
result |= m_cage->main_r() << 16;
return result;
}
@ -269,9 +252,9 @@ READ32_MEMBER(atarigt_state::sound_data_r)
WRITE32_MEMBER(atarigt_state::sound_data_w)
{
if (ACCESSING_BITS_0_15)
cage_control_w(machine(), data);
m_cage->control_w(data);
if (ACCESSING_BITS_16_31)
cage_main_w(space, data >> 16);
m_cage->main_w(data >> 16);
}
@ -847,11 +830,28 @@ static MACHINE_CONFIG_START( atarigt, atarigt_state )
MCFG_ATARIRLE_ADD("rle", modesc)
/* sound hardware */
MCFG_FRAGMENT_ADD(cage)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( tmek, atarigt )
/* sound hardware */
MCFG_DEVICE_ADD("cage", ATARI_CAGE, 0)
MCFG_ATARI_CAGE_SPEEDUP(0x4fad)
MCFG_ATARI_CAGE_IRQ_CALLBACK(WRITE8(atarigt_state,cage_irq_callback))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( primrage, atarigt )
/* sound hardware */
MCFG_DEVICE_ADD("cage", ATARI_CAGE, 0)
MCFG_ATARI_CAGE_SPEEDUP(0x42f2)
MCFG_ATARI_CAGE_IRQ_CALLBACK(WRITE8(atarigt_state,cage_irq_callback))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( primrage20, atarigt )
/* sound hardware */
MCFG_DEVICE_ADD("cage", ATARI_CAGE, 0)
MCFG_ATARI_CAGE_SPEEDUP(0x48a4)
MCFG_ATARI_CAGE_IRQ_CALLBACK(WRITE8(atarigt_state,cage_irq_callback))
MACHINE_CONFIG_END
/*************************************
*
@ -1307,9 +1307,6 @@ DRIVER_INIT_MEMBER(atarigt_state,tmek)
{
m_is_primrage = 0;
cage_init(machine(), 0x4fad);
cage_set_irq_handler(cage_irq_callback);
/* setup protection */
m_protection_r = &atarigt_state::tmek_protection_r;
m_protection_w = &atarigt_state::tmek_protection_w;
@ -1319,31 +1316,25 @@ DRIVER_INIT_MEMBER(atarigt_state,tmek)
}
void atarigt_state::primrage_init_common(offs_t cage_speedup)
DRIVER_INIT_MEMBER(atarigt_state,primrage)
{
m_is_primrage = 1;
cage_init(machine(), cage_speedup);
cage_set_irq_handler(cage_irq_callback);
/* install protection */
m_protection_r = &atarigt_state::primrage_protection_r;
m_protection_w = &atarigt_state::primrage_protection_w;
}
DRIVER_INIT_MEMBER(atarigt_state,primrage) { primrage_init_common(0x42f2); }
DRIVER_INIT_MEMBER(atarigt_state,primrage20) { primrage_init_common(0x48a4); }
/*************************************
*
* Game driver(s)
*
*************************************/
GAME( 1994, tmek, 0, atarigt, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v5.1, The Warlords)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, tmek51p, tmek, atarigt, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v5.1, prototype)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, tmek45, tmek, atarigt, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v4.5)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, tmek44, tmek, atarigt, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v4.4)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, tmek20, tmek, atarigt, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v2.0, prototype)", 0 )
GAME( 1994, primrage, 0, atarigt, primrage, atarigt_state, primrage, ROT0, "Atari Games", "Primal Rage (version 2.3)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, primrage20, primrage, atarigt, primrage, atarigt_state, primrage20, ROT0, "Atari Games", "Primal Rage (version 2.0)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, tmek, 0, tmek, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v5.1, The Warlords)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, tmek51p, tmek, tmek, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v5.1, prototype)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, tmek45, tmek, tmek, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v4.5)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, tmek44, tmek, tmek, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v4.4)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, tmek20, tmek, tmek, tmek, atarigt_state, tmek, ROT0, "Atari Games", "T-MEK (v2.0, prototype)", 0 )
GAME( 1994, primrage, 0, primrage, primrage, atarigt_state, primrage, ROT0, "Atari Games", "Primal Rage (version 2.3)", GAME_UNEMULATED_PROTECTION )
GAME( 1994, primrage20, primrage, primrage20,primrage, atarigt_state, primrage, ROT0, "Atari Games", "Primal Rage (version 2.0)", GAME_UNEMULATED_PROTECTION )

12
src/mame/drivers/atlantis.c
View File

@ -45,12 +45,14 @@ class atlantis_state : public driver_device
public:
atlantis_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu") { }
m_maincpu(*this, "maincpu"),
m_dcs(*this, "dcs") { }
DECLARE_DRIVER_INIT(mwskins);
virtual void machine_start();
virtual void machine_reset();
UINT32 screen_update_mwskins(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
required_device<cpu_device> m_maincpu;
required_device<dcs2_audio_denver_device> m_dcs;
};
@ -76,8 +78,8 @@ void atlantis_state::machine_start()
void atlantis_state::machine_reset()
{
dcs_reset_w(machine(), 1);
dcs_reset_w(machine(), 0);
m_dcs->reset_w(1);
m_dcs->reset_w(0);
}
@ -157,7 +159,8 @@ static MACHINE_CONFIG_START( mwskins, atlantis_state )
MCFG_PALETTE_ADD_BBBBBGGGGGRRRRR("palette")
/* sound hardware */
MCFG_FRAGMENT_ADD(dcs2_audio_denver)
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
MACHINE_CONFIG_END
@ -200,7 +203,6 @@ ROM_END
DRIVER_INIT_MEMBER(atlantis_state,mwskins)
{
dcs2_init(machine(), 8, 0);
}
/*************************************

52
src/mame/drivers/gaelco3d.c
View File

@ -157,8 +157,6 @@ REF. 970429
static void adsp_tx_callback(adsp21xx_device &device, int port, INT32 data);
WRITE_LINE_MEMBER(gaelco3d_state::ser_irq)
{
if (state)
@ -634,60 +632,58 @@ TIMER_DEVICE_CALLBACK_MEMBER(gaelco3d_state::adsp_autobuffer_irq)
m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, reg);
}
static void adsp_tx_callback(adsp21xx_device &device, int port, INT32 data)
WRITE32_MEMBER(gaelco3d_state::adsp_tx_callback)
{
gaelco3d_state *state = device.machine().driver_data<gaelco3d_state>();
/* check if it's for SPORT1 */
if (port != 1)
if (offset != 1)
return;
/* check if SPORT1 is enabled */
if (state->m_adsp_control_regs[SYSCONTROL_REG] & 0x0800) /* bit 11 */
if (m_adsp_control_regs[SYSCONTROL_REG] & 0x0800) /* bit 11 */
{
/* we only support autobuffer here (wich is what this thing uses), bail if not enabled */
if (state->m_adsp_control_regs[S1_AUTOBUF_REG] & 0x0002) /* bit 1 */
if (m_adsp_control_regs[S1_AUTOBUF_REG] & 0x0002) /* bit 1 */
{
/* get the autobuffer registers */
int mreg, lreg;
UINT16 source;
attotime sample_period;
state->m_adsp_ireg = (state->m_adsp_control_regs[S1_AUTOBUF_REG] >> 9) & 7;
mreg = (state->m_adsp_control_regs[S1_AUTOBUF_REG] >> 7) & 3;
mreg |= state->m_adsp_ireg & 0x04; /* msb comes from ireg */
lreg = state->m_adsp_ireg;
m_adsp_ireg = (m_adsp_control_regs[S1_AUTOBUF_REG] >> 9) & 7;
mreg = (m_adsp_control_regs[S1_AUTOBUF_REG] >> 7) & 3;
mreg |= m_adsp_ireg & 0x04; /* msb comes from ireg */
lreg = m_adsp_ireg;
/* now get the register contents in a more legible format */
/* we depend on register indexes to be continuous (wich is the case in our core) */
source = device.state_int(ADSP2100_I0 + state->m_adsp_ireg);
state->m_adsp_incs = device.state_int(ADSP2100_M0 + mreg);
state->m_adsp_size = device.state_int(ADSP2100_L0 + lreg);
source = m_adsp->state_int(ADSP2100_I0 + m_adsp_ireg);
m_adsp_incs = m_adsp->state_int(ADSP2100_M0 + mreg);
m_adsp_size = m_adsp->state_int(ADSP2100_L0 + lreg);
/* get the base value, since we need to keep it around for wrapping */
source -= state->m_adsp_incs;
source -= m_adsp_incs;
/* make it go back one so we dont lose the first sample */
device.set_state_int(ADSP2100_I0 + state->m_adsp_ireg, source);
m_adsp->set_state_int(ADSP2100_I0 + m_adsp_ireg, source);
/* save it as it is now */
state->m_adsp_ireg_base = source;
m_adsp_ireg_base = source;
/* calculate how long until we generate an interrupt */
/* period per each bit sent */
sample_period = attotime::from_hz(device.clock()) * (2 * (state->m_adsp_control_regs[S1_SCLKDIV_REG] + 1));
sample_period = attotime::from_hz(m_adsp->clock()) * (2 * (m_adsp_control_regs[S1_SCLKDIV_REG] + 1));
/* now put it down to samples, so we know what the channel frequency has to be */
sample_period *= 16 * SOUND_CHANNELS;
dmadac_set_frequency(&state->m_dmadac[0], SOUND_CHANNELS, ATTOSECONDS_TO_HZ(sample_period.attoseconds));
dmadac_enable(&state->m_dmadac[0], SOUND_CHANNELS, 1);
dmadac_set_frequency(&m_dmadac[0], SOUND_CHANNELS, ATTOSECONDS_TO_HZ(sample_period.attoseconds));
dmadac_enable(&m_dmadac[0], SOUND_CHANNELS, 1);
/* fire off a timer wich will hit every half-buffer */
sample_period = (sample_period * state->m_adsp_size) / (SOUND_CHANNELS * state->m_adsp_incs);
sample_period = (sample_period * m_adsp_size) / (SOUND_CHANNELS * m_adsp_incs);
state->m_adsp_autobuffer_timer->adjust(sample_period, 0, sample_period);
m_adsp_autobuffer_timer->adjust(sample_period, 0, sample_period);
return;
}
@ -696,10 +692,10 @@ static void adsp_tx_callback(adsp21xx_device &device, int port, INT32 data)
}
/* if we get there, something went wrong. Disable playing */
dmadac_enable(&state->m_dmadac[0], SOUND_CHANNELS, 0);
dmadac_enable(&m_dmadac[0], SOUND_CHANNELS, 0);
/* remove timer */
state->m_adsp_autobuffer_timer->reset();
m_adsp_autobuffer_timer->reset();
}
@ -955,9 +951,9 @@ INPUT_PORTS_END
static const adsp21xx_config adsp_config =
{
NULL, /* callback for serial receive */
adsp_tx_callback, /* callback for serial transmit */
NULL /* callback for timer fired */
DEVCB_NULL, /* callback for serial receive */
DEVCB_DRIVER_MEMBER32(gaelco3d_state, adsp_tx_callback), /* callback for serial transmit */
DEVCB_NULL /* callback for timer fired */
};
static const tms3203x_config tms_config =

12
src/mame/drivers/harddriv.c
View File

@ -1288,16 +1288,16 @@ INPUT_PORTS_END
static const adsp21xx_config ds3sdsp_config =
{
hdds3sdsp_serial_rx_callback, /* callback for serial receive */
hdds3sdsp_serial_tx_callback, /* callback for serial transmit */
hdds3sdsp_timer_enable_callback /* callback for timer fired */
DEVCB_DRIVER_MEMBER32(harddriv_state, hdds3sdsp_serial_rx_callback), /* callback for serial receive */
DEVCB_DRIVER_MEMBER32(harddriv_state, hdds3sdsp_serial_tx_callback), /* callback for serial transmit */
DEVCB_DRIVER_LINE_MEMBER(harddriv_state, hdds3sdsp_timer_enable_callback) /* callback for timer fired */
};
static const adsp21xx_config ds3xdsp_config =
{
hdds3xdsp_serial_rx_callback, /* callback for serial receive */
hdds3xdsp_serial_tx_callback, /* callback for serial transmit */
hdds3xdsp_timer_enable_callback /* callback for timer fired */
DEVCB_DRIVER_MEMBER32(harddriv_state, hdds3xdsp_serial_rx_callback), /* callback for serial receive */
DEVCB_DRIVER_MEMBER32(harddriv_state, hdds3xdsp_serial_tx_callback), /* callback for serial transmit */
DEVCB_DRIVER_LINE_MEMBER(harddriv_state, hdds3xdsp_timer_enable_callback) /* callback for timer fired */
};

17
src/mame/drivers/kinst.c
View File

@ -135,7 +135,6 @@ Notes:
#include "cpu/adsp2100/adsp2100.h"
#include "machine/ataintf.h"
#include "machine/idehd.h"
#include "machine/midwayic.h"
#include "audio/dcs.h"
@ -154,7 +153,8 @@ public:
m_control(*this, "control"),
m_rombase(*this, "rombase"),
m_maincpu(*this, "maincpu"),
m_ata(*this, "ata" )
m_ata(*this, "ata"),
m_dcs(*this, "dcs")
{
}
@ -179,6 +179,7 @@ public:
INTERRUPT_GEN_MEMBER(irq0_start);
required_device<cpu_device> m_maincpu;
required_device<ata_interface_device> m_ata;
required_device<dcs_audio_2k_device> m_dcs;
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
@ -362,7 +363,7 @@ READ32_MEMBER(kinst_state::kinst_control_r)
case 2: /* $90 -- sound return */
result = ioport(portnames[offset])->read();
result &= ~0x0002;
if (dcs_control_r(machine()) & 0x800)
if (m_dcs->control_r() & 0x800)
result |= 0x0002;
break;
@ -402,12 +403,12 @@ WRITE32_MEMBER(kinst_state::kinst_control_w)
break;
case 1: /* $88 - sound reset */
dcs_reset_w(machine(), ~data & 0x01);
m_dcs->reset_w(~data & 0x01);
break;
case 2: /* $90 - sound control */
if (!(olddata & 0x02) && (m_control[offset] & 0x02))
dcs_data_w(machine(), m_control[3]);
m_dcs->data_w(m_control[3]);
break;
case 3: /* $98 - sound data */
@ -699,7 +700,7 @@ static MACHINE_CONFIG_START( kinst, kinst_state )
MCFG_PALETTE_ADD_BBBBBGGGGGRRRRR("palette")
/* sound hardware */
MCFG_FRAGMENT_ADD(dcs_audio_2k)
MCFG_DEVICE_ADD("dcs", DCS_AUDIO_2K, 0)
MACHINE_CONFIG_END
@ -911,8 +912,6 @@ DRIVER_INIT_MEMBER(kinst_state,kinst)
{
static const UINT8 kinst_control_map[8] = { 0,1,2,3,4,5,6,7 };
dcs_init(machine());
/* set up the control register mapping */
m_control_map = kinst_control_map;
}
@ -929,8 +928,6 @@ DRIVER_INIT_MEMBER(kinst_state,kinst2)
// write: $98 on ki2 = $80 on ki
// write: $a0 on ki2 = $98 on ki
dcs_init(machine());
/* set up the control register mapping */
m_control_map = kinst2_control_map;
}

6
src/mame/drivers/magictg.c
View File

@ -890,9 +890,9 @@ static const mips3_config config =
static const adsp21xx_config adsp_config =
{
NULL, /* callback for serial receive */
0,//sound_tx_callback, /* callback for serial transmit */
0,//timer_enable_callback /* callback for timer fired */
DEVCB_NULL, /* callback for serial receive */
DEVCB_NULL,//sound_tx_callback, /* callback for serial transmit */
DEVCB_NULL,//timer_enable_callback /* callback for timer fired */
};
static const voodoo_config voodoo_1_intf =

23
src/mame/drivers/metalmx.c
View File

@ -345,21 +345,21 @@ READ32_MEMBER(metalmx_state::sound_data_r)
UINT32 result = 0;
if (ACCESSING_BITS_0_15)
result |= cage_control_r(machine());
result |= m_cage->control_r();
if (ACCESSING_BITS_16_31)
result |= cage_main_r(space) << 16;
result |= m_cage->main_r() << 16;
return result;
}
WRITE32_MEMBER(metalmx_state::sound_data_w)
{
if (ACCESSING_BITS_0_15)
cage_control_w(machine(), data);
m_cage->control_w(data);
if (ACCESSING_BITS_16_31)
cage_main_w(space, data >> 16);
m_cage->main_w(data >> 16);
}
static void cage_irq_callback(running_machine &machine, int reason)
WRITE8_MEMBER(metalmx_state::cage_irq_callback)
{
/* TODO */
}
@ -690,9 +690,9 @@ INPUT_PORTS_END
static const adsp21xx_config adsp_config =
{
NULL, /* callback for serial receive */
NULL, /* callback for serial transmit */
NULL, /* callback for timer fired */
DEVCB_NULL, /* callback for serial receive */
DEVCB_NULL, /* callback for serial transmit */
DEVCB_NULL, /* callback for timer fired */
};
static const tms34010_config gsp_config =
@ -743,7 +743,9 @@ static MACHINE_CONFIG_START( metalmx, metalmx_state )
MCFG_PALETTE_ADD_RRRRRGGGGGGBBBBB("palette")
MCFG_FRAGMENT_ADD(cage)
MCFG_DEVICE_ADD("cage", ATARI_CAGE, 0)
MCFG_ATARI_CAGE_SPEEDUP(0) // TODO: speedup address
MCFG_ATARI_CAGE_IRQ_CALLBACK(WRITE8(metalmx_state,cage_irq_callback))
MACHINE_CONFIG_END
@ -752,9 +754,6 @@ DRIVER_INIT_MEMBER(metalmx_state,metalmx)
UINT8 *adsp_boot = (UINT8*)memregion("adsp")->base();
m_adsp->load_boot_data(adsp_boot, m_adsp_internal_program_ram);
cage_init(machine(), 0); // TODO: speedup address
cage_set_irq_handler(cage_irq_callback);
}
void metalmx_state::machine_reset()

2
src/mame/drivers/midtunit.c
View File

@ -634,7 +634,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( tunit_dcs, tunit_core )
/* basic machine hardware */
MCFG_FRAGMENT_ADD(dcs_audio_2k)
MCFG_DEVICE_ADD("dcs", DCS_AUDIO_2K, 0)
MACHINE_CONFIG_END

104
src/mame/drivers/midvunit.c
View File

@ -32,10 +32,8 @@ Known to exist but not dumped:
#include "cpu/adsp2100/adsp2100.h"
#include "audio/dcs.h"
#include "machine/ataintf.h"
#include "machine/midwayic.h"
#include "machine/nvram.h"
#include "includes/midvunit.h"
#include "mcfglgcy.h"
#define CPU_CLOCK 50000000
@ -61,8 +59,8 @@ void midvunit_state::machine_start()
void midvunit_state::machine_reset()
{
dcs_reset_w(machine(), 1);
dcs_reset_w(machine(), 0);
m_dcs->reset_w(1);
m_dcs->reset_w(0);
memcpy(m_ram_base, memregion("user1")->base(), 0x20000*4);
m_maincpu->reset();
@ -74,8 +72,8 @@ void midvunit_state::machine_reset()
MACHINE_RESET_MEMBER(midvunit_state,midvplus)
{
dcs_reset_w(machine(), 1);
dcs_reset_w(machine(), 0);
m_dcs->reset_w(1);
m_dcs->reset_w(0);
memcpy(m_ram_base, memregion("user1")->base(), 0x20000*4);
m_maincpu->reset();
@ -197,7 +195,7 @@ WRITE32_MEMBER(midvunit_state::midvunit_control_w)
watchdog_reset_w(space, 0, 0);
/* bit 1 is the DCS sound reset */
dcs_reset_w(machine(), (~m_control_data >> 1) & 1);
m_dcs->reset_w((~m_control_data >> 1) & 1);
/* log anything unusual */
if ((olddata ^ m_control_data) & ~0x00e8)
@ -211,7 +209,7 @@ WRITE32_MEMBER(midvunit_state::crusnwld_control_w)
COMBINE_DATA(&m_control_data);
/* bit 11 is the DCS sound reset */
dcs_reset_w(machine(), (~m_control_data >> 11) & 1);
m_dcs->reset_w((~m_control_data >> 11) & 1);
/* bit 9 is the watchdog */
if ((olddata ^ m_control_data) & 0x0200)
@ -228,7 +226,7 @@ WRITE32_MEMBER(midvunit_state::crusnwld_control_w)
WRITE32_MEMBER(midvunit_state::midvunit_sound_w)
{
logerror("Sound W = %02X\n", data);
dcs_data_w(machine(), data & 0xff);
m_dcs->data_w(data & 0xff);
}
@ -293,17 +291,16 @@ WRITE32_MEMBER(midvunit_state::tms32031_control_w)
*
*************************************/
#if 0
READ32_MEMBER(midvunit_state::crusnwld_serial_status_r)
{
int status = midway_serial_pic_status_r();
int status = m_midway_serial_pic->status_r(space,0);
return (ioport("991030")->read() & 0x7fff7fff) | (status << 31) | (status << 15);
}
READ32_MEMBER(midvunit_state::crusnwld_serial_data_r)
{
return midway_serial_pic_r() << 16;
return m_midway_serial_pic->read(space,0) << 16;
}
@ -311,12 +308,11 @@ WRITE32_MEMBER(midvunit_state::crusnwld_serial_data_w)
{
if ((data & 0xf0000) == 0x10000)
{
midway_serial_pic_reset_w(1);
midway_serial_pic_reset_w(0);
m_midway_serial_pic->reset_w(1);
m_midway_serial_pic->reset_w(0);
}
midway_serial_pic_w(data >> 16);
m_midway_serial_pic->write(space,0,data >> 16);
}
#endif
/*************************************
@ -359,20 +355,20 @@ WRITE32_MEMBER(midvunit_state::bit_reset_w)
READ32_MEMBER(midvunit_state::offroadc_serial_status_r)
{
int status = midway_serial_pic2_status_r(space);
int status = m_midway_serial_pic2->status_r(space,0);
return (ioport("991030")->read() & 0x7fff7fff) | (status << 31) | (status << 15);
}
READ32_MEMBER(midvunit_state::offroadc_serial_data_r)
{
return midway_serial_pic2_r(space) << 16;
return m_midway_serial_pic2->read(space, 0) << 16;
}
WRITE32_MEMBER(midvunit_state::offroadc_serial_data_w)
{
midway_serial_pic2_w(space, data >> 16);
m_midway_serial_pic2->write(space, 0, data >> 16);
}
@ -508,7 +504,7 @@ static ADDRESS_MAP_START( midvplus_map, AS_PROGRAM, 32, midvunit_state )
AM_RANGE(0x980040, 0x980040) AM_READWRITE(midvunit_page_control_r, midvunit_page_control_w)
AM_RANGE(0x980080, 0x980080) AM_NOP
AM_RANGE(0x980082, 0x980083) AM_READ(midvunit_dma_trigger_r)
AM_RANGE(0x990000, 0x99000f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w)
AM_RANGE(0x990000, 0x99000f) AM_DEVREADWRITE("ioasic", midway_ioasic_device, read, write)
AM_RANGE(0x994000, 0x994000) AM_WRITE(midvunit_control_w)
AM_RANGE(0x995020, 0x995020) AM_WRITE(midvunit_cmos_protect_w)
AM_RANGE(0x9a0000, 0x9a0007) AM_DEVREADWRITE16("ata", ata_interface_device, read_cs0, write_cs0, 0x0000ffff)
@ -1032,9 +1028,24 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( midvunit, midvcommon )
/* sound hardware */
MCFG_FRAGMENT_ADD(dcs_audio_2k)
MCFG_DEVICE_ADD("dcs", DCS_AUDIO_2K, 0)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( crusnwld, midvunit )
/* valid values are 450 or 460 */
MCFG_DEVICE_ADD("serial_pic", MIDWAY_SERIAL_PIC, 0)
MCFG_MIDWAY_SERIAL_PIC_UPPER(450)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( offroadc, midvunit )
/* valid values are 230 or 234 */
MCFG_DEVICE_ADD("serial_pic2", MIDWAY_SERIAL_PIC2, 0)
MCFG_MIDWAY_SERIAL_PIC2_UPPER(230)
MCFG_MIDWAY_SERIAL_PIC2_YEAR_OFFS(94)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( midvplus, midvcommon )
/* basic machine hardware */
@ -1044,12 +1055,18 @@ static MACHINE_CONFIG_DERIVED( midvplus, midvcommon )
MCFG_MACHINE_RESET_OVERRIDE(midvunit_state,midvplus)
MCFG_DEVICE_REMOVE("nvram")
MCFG_NVRAM_HANDLER(midway_serial_pic2)
MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(0)
MCFG_MIDWAY_IOASIC_UPPER(452) /* no alternates */
MCFG_MIDWAY_IOASIC_YEAR_OFFS(94)
/* sound hardware */
MCFG_FRAGMENT_ADD(dcs2_audio_2115)
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x3839)
MACHINE_CONFIG_END
@ -1712,7 +1729,6 @@ READ32_MEMBER(midvunit_state::generic_speedup_r)
void midvunit_state::init_crusnusa_common(offs_t speedup)
{
dcs_init(machine());
m_adc_shift = 24;
/* speedups */
@ -1725,17 +1741,14 @@ DRIVER_INIT_MEMBER(midvunit_state,crusnu21) { init_crusnusa_common(0xc051); }
void midvunit_state::init_crusnwld_common(offs_t speedup)
{
dcs_init(machine());
m_adc_shift = 16;
/* control register is different */
m_maincpu->space(AS_PROGRAM).install_write_handler(0x994000, 0x994000, write32_delegate(FUNC(midvunit_state::crusnwld_control_w),this));
/* valid values are 450 or 460 */
midway_serial_pic_init(machine(), 450);
m_maincpu->space(AS_PROGRAM).install_read_handler(0x991030, 0x991030, read32_delegate(FUNC(midvunit_state::offroadc_serial_status_r),this));
m_maincpu->space(AS_PROGRAM).install_read_handler(0x996000, 0x996000, read32_delegate(FUNC(midvunit_state::offroadc_serial_data_r),this));
m_maincpu->space(AS_PROGRAM).install_write_handler(0x996000, 0x996000, write32_delegate(FUNC(midvunit_state::offroadc_serial_data_w),this));
m_maincpu->space(AS_PROGRAM).install_read_handler(0x991030, 0x991030, read32_delegate(FUNC(midvunit_state::crusnwld_serial_status_r),this));
m_maincpu->space(AS_PROGRAM).install_read_handler(0x996000, 0x996000, read32_delegate(FUNC(midvunit_state::crusnwld_serial_data_r),this));
m_maincpu->space(AS_PROGRAM).install_write_handler(0x996000, 0x996000, write32_delegate(FUNC(midvunit_state::crusnwld_serial_data_w),this));
/* install strange protection device */
m_maincpu->space(AS_PROGRAM).install_read_handler(0x9d0000, 0x9d1fff, read32_delegate(FUNC(midvunit_state::bit_data_r),this));
@ -1753,14 +1766,11 @@ DRIVER_INIT_MEMBER(midvunit_state,crusnw13) { init_crusnwld_common(0); }
DRIVER_INIT_MEMBER(midvunit_state,offroadc)
{
dcs_init(machine());
m_adc_shift = 16;
/* control register is different */
m_maincpu->space(AS_PROGRAM).install_write_handler(0x994000, 0x994000, write32_delegate(FUNC(midvunit_state::crusnwld_control_w),this));
/* valid values are 230 or 234 */
midway_serial_pic2_init(machine(), 230, 94);
m_maincpu->space(AS_PROGRAM).install_read_handler(0x991030, 0x991030, read32_delegate(FUNC(midvunit_state::offroadc_serial_status_r),this));
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x996000, 0x996000, read32_delegate(FUNC(midvunit_state::offroadc_serial_data_r),this), write32_delegate(FUNC(midvunit_state::offroadc_serial_data_w),this));
@ -1774,8 +1784,6 @@ DRIVER_INIT_MEMBER(midvunit_state,wargods)
UINT8 default_nvram[256];
/* initialize the subsystems */
dcs2_init(machine(), 2, 0x3839);
midway_ioasic_init(machine(), 0, 452/* no alternates */, 94, NULL);
m_adc_shift = 16;
/* we need proper VRAM */
@ -1787,7 +1795,7 @@ DRIVER_INIT_MEMBER(midvunit_state,wargods)
default_nvram[0x12] = default_nvram[0x32] = 0xaf;
default_nvram[0x17] = default_nvram[0x37] = 0xd8;
default_nvram[0x18] = default_nvram[0x38] = 0xe7;
midway_serial_pic2_set_default_nvram(default_nvram);
machine().device<midway_ioasic_device>("ioasic")->set_default_nvram(default_nvram);
/* speedups */
m_generic_speedup = m_maincpu->space(AS_PROGRAM).install_read_handler(0x2f4c, 0x2f4c, read32_delegate(FUNC(midvunit_state::generic_speedup_r),this));
@ -1805,19 +1813,19 @@ GAME( 1994, crusnusa, 0, midvunit, crusnusa, midvunit_state, crusnusa,
GAME( 1994, crusnusa40, crusnusa, midvunit, crusnusa, midvunit_state, crusnu40, ROT0, "Midway", "Cruis'n USA (rev L4.0)", GAME_SUPPORTS_SAVE )
GAME( 1994, crusnusa21, crusnusa, midvunit, crusnusa, midvunit_state, crusnu21, ROT0, "Midway", "Cruis'n USA (rev L2.1)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld, 0, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.5)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld24, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.4)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld23, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.3)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld20, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.0)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld19, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.9)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld17, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.7)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld13, crusnwld, midvunit, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.3)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld, 0, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.5)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld24, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.4)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld23, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.3)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld20, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.0)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld19, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.9)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld17, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.7)", GAME_SUPPORTS_SAVE )
GAME( 1996, crusnwld13, crusnwld, crusnwld, crusnwld, midvunit_state, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.3)", GAME_SUPPORTS_SAVE )
GAME( 1997, offroadc, 0, midvunit, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.63)", GAME_SUPPORTS_SAVE )
GAME( 1997, offroadc5, offroadc, midvunit, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.50)", GAME_SUPPORTS_SAVE )
GAME( 1997, offroadc4, offroadc, midvunit, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.40)", GAME_SUPPORTS_SAVE )
GAME( 1997, offroadc3, offroadc, midvunit, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.30)", GAME_SUPPORTS_SAVE )
GAME( 1997, offroadc1, offroadc, midvunit, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.10)", GAME_SUPPORTS_SAVE )
GAME( 1997, offroadc, 0, offroadc, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.63)", GAME_SUPPORTS_SAVE )
GAME( 1997, offroadc5, offroadc, offroadc, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.50)", GAME_SUPPORTS_SAVE )
GAME( 1997, offroadc4, offroadc, offroadc, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.40)", GAME_SUPPORTS_SAVE )
GAME( 1997, offroadc3, offroadc, offroadc, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.30)", GAME_SUPPORTS_SAVE )
GAME( 1997, offroadc1, offroadc, offroadc, offroadc, midvunit_state, offroadc, ROT0, "Midway", "Off Road Challenge (v1.10)", GAME_SUPPORTS_SAVE )
GAME( 1995, wargods, 0, midvplus, wargods, midvunit_state, wargods, ROT0, "Midway", "War Gods (HD 10/09/1996 - Dual Resolution)", GAME_SUPPORTS_SAVE )
GAME( 1995, wargodsa, wargods, midvplus, wargodsa, midvunit_state, wargods, ROT0, "Midway", "War Gods (HD 08/15/1996)", GAME_SUPPORTS_SAVE )

5
src/mame/drivers/midwunit.c
View File

@ -655,8 +655,11 @@ static MACHINE_CONFIG_START( wunit, midwunit_state )
MCFG_VIDEO_START_OVERRIDE(midwunit_state,midwunit)
MCFG_DEVICE_ADD("serial_pic", MIDWAY_SERIAL_PIC, 0)
MCFG_MIDWAY_SERIAL_PIC_UPPER(528);
/* sound hardware */
MCFG_FRAGMENT_ADD(dcs_audio_8k)
MCFG_DEVICE_ADD("dcs", DCS_AUDIO_8K, 0)
MACHINE_CONFIG_END

6
src/mame/drivers/midxunit.c
View File

@ -278,9 +278,13 @@ static MACHINE_CONFIG_START( midxunit, midxunit_state )
MCFG_SCREEN_UPDATE_DEVICE("maincpu", tms34010_device, tms340x0_ind16)
MCFG_SCREEN_PALETTE("palette")
MCFG_VIDEO_START_OVERRIDE(midxunit_state,midxunit)
MCFG_DEVICE_ADD("serial_pic", MIDWAY_SERIAL_PIC, 0)
/* serial prefixes 419, 420 */
MCFG_MIDWAY_SERIAL_PIC_UPPER(419);
/* sound hardware */
MCFG_FRAGMENT_ADD(dcs_audio_2k_uart)
MCFG_DEVICE_ADD("dcs", DCS_AUDIO_2K_UART, 0)
MACHINE_CONFIG_END

65
src/mame/drivers/midzeus.c
View File

@ -563,7 +563,7 @@ static ADDRESS_MAP_START( zeus_map, AS_PROGRAM, 32, midzeus_state )
AM_RANGE(0x808000, 0x80807f) AM_READWRITE(tms32031_control_r, tms32031_control_w) AM_SHARE("tms32031_ctl")
AM_RANGE(0x880000, 0x8803ff) AM_READWRITE(zeus_r, zeus_w) AM_SHARE("zeusbase")
AM_RANGE(0x8d0000, 0x8d0004) AM_READWRITE(bitlatches_r, bitlatches_w)
AM_RANGE(0x990000, 0x99000f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w)
AM_RANGE(0x990000, 0x99000f) AM_DEVREADWRITE("ioasic", midway_ioasic_device, read, write)
AM_RANGE(0x9e0000, 0x9e0000) AM_WRITENOP // watchdog?
AM_RANGE(0x9f0000, 0x9f7fff) AM_READWRITE(cmos_r, cmos_w) AM_SHARE("nvram")
AM_RANGE(0x9f8000, 0x9f8000) AM_WRITE(cmos_protect_w)
@ -580,7 +580,7 @@ static ADDRESS_MAP_START( zeus2_map, AS_PROGRAM, 32, midzeus2_state )
AM_RANGE(0x8a0000, 0x8a003f) AM_READWRITE(linkram_r, linkram_w) AM_SHARE("linkram")
AM_RANGE(0x8d0000, 0x8d000a) AM_READWRITE(bitlatches_r, bitlatches_w)
AM_RANGE(0x900000, 0x91ffff) AM_READWRITE(zpram_r, zpram_w) AM_SHARE("nvram") AM_MIRROR(0x020000)
AM_RANGE(0x990000, 0x99000f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w)
AM_RANGE(0x990000, 0x99000f) AM_DEVREADWRITE("ioasic", midway_ioasic_device, read, write)
AM_RANGE(0x9c0000, 0x9c000f) AM_READWRITE(analog_r, analog_w)
AM_RANGE(0x9e0000, 0x9e0000) AM_WRITENOP // watchdog?
AM_RANGE(0x9f0000, 0x9f7fff) AM_READWRITE(zeus2_timekeeper_r, zeus2_timekeeper_w)
@ -1103,7 +1103,17 @@ static MACHINE_CONFIG_START( midzeus, midzeus_state )
MCFG_VIDEO_START_OVERRIDE(midzeus_state,midzeus)
/* sound hardware */
MCFG_FRAGMENT_ADD(dcs2_audio_2104)
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD)
MCFG_MIDWAY_SERIAL_PIC2_YEAR_OFFS(94)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( mk4, midzeus )
MCFG_DEVICE_MODIFY("ioasic")
MCFG_MIDWAY_IOASIC_UPPER(461/* or 474 */)
MCFG_MIDWAY_IOASIC_SHUFFLE_DEFAULT(1)
MACHINE_CONFIG_END
READ8_MEMBER(midzeus_state::PIC16C5X_T0_clk_r)
@ -1117,9 +1127,11 @@ ADDRESS_MAP_END
static MACHINE_CONFIG_DERIVED( invasn, midzeus )
MCFG_CPU_ADD("pic", PIC16C57, 8000000) /* ? */
MCFG_CPU_IO_MAP(pic_io_map)
MCFG_DEVICE_MODIFY("ioasic")
MCFG_MIDWAY_IOASIC_UPPER(468/* or 488 */)
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( midzeus2, midzeus2_state )
@ -1142,11 +1154,25 @@ static MACHINE_CONFIG_START( midzeus2, midzeus2_state )
MCFG_VIDEO_START_OVERRIDE(midzeus2_state,midzeus2)
/* sound hardware */
MCFG_FRAGMENT_ADD(dcs2_audio_2104)
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_M48T35_ADD( "m48t35" )
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD)
MCFG_MIDWAY_SERIAL_PIC2_YEAR_OFFS(99)
MCFG_MIDWAY_IOASIC_UPPER(474)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( crusnexo, midzeus2 )
MCFG_DEVICE_MODIFY("ioasic")
MCFG_MIDWAY_IOASIC_UPPER(472/* or 476,477,478,110 */)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( thegrid, midzeus2 )
MCFG_DEVICE_MODIFY("ioasic")
MCFG_MIDWAY_IOASIC_UPPER(474/* or 491 */)
MACHINE_CONFIG_END
/*************************************
@ -1471,24 +1497,17 @@ ROM_END
DRIVER_INIT_MEMBER(midzeus_state,mk4)
{
dcs2_init(machine(), 0, 0);
midway_ioasic_init(machine(), MIDWAY_IOASIC_STANDARD, 461/* or 474 */, 94, NULL);
midway_ioasic_set_shuffle_state(1);
}
DRIVER_INIT_MEMBER(midzeus_state,invasn)
{
dcs2_init(machine(), 0, 0);
midway_ioasic_init(machine(), MIDWAY_IOASIC_STANDARD, 468/* or 488 */, 94, NULL);
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x9c0000, 0x9c0000, read32_delegate(FUNC(midzeus_state::invasn_gun_r),this), write32_delegate(FUNC(midzeus_state::invasn_gun_w),this));
}
DRIVER_INIT_MEMBER(midzeus_state,crusnexo)
{
dcs2_init(machine(), 0, 0);
midway_ioasic_init(machine(), MIDWAY_IOASIC_STANDARD, 472/* or 476,477,478,110 */, 99, NULL);
membank("bank1")->configure_entries(0, 3, memregion("user2")->base(), 0x400000*4);
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x9b0004, 0x9b0007, read32_delegate(FUNC(midzeus_state::crusnexo_leds_r),this), write32_delegate(FUNC(midzeus_state::crusnexo_leds_w),this));
m_maincpu->space(AS_PROGRAM).install_write_handler (0x8d0009, 0x8d000a, write32_delegate(FUNC(midzeus_state::keypad_select_w),this));
@ -1497,8 +1516,6 @@ DRIVER_INIT_MEMBER(midzeus_state,crusnexo)
DRIVER_INIT_MEMBER(midzeus_state,thegrid)
{
dcs2_init(machine(), 0, 0);
midway_ioasic_init(machine(), MIDWAY_IOASIC_STANDARD, 474/* or 491 */, 99, NULL);
membank("bank1")->configure_entries(0, 3, memregion("user2")->base(), 0x400000*4);
}
@ -1510,16 +1527,16 @@ DRIVER_INIT_MEMBER(midzeus_state,thegrid)
*
*************************************/
GAME( 1997, mk4, 0, midzeus, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 3.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAME( 1997, mk4a, mk4, midzeus, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 2.1)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAME( 1997, mk4b, mk4, midzeus, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 1.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAME( 1997, mk4, 0, mk4, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 3.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAME( 1997, mk4a, mk4, mk4, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 2.1)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAME( 1997, mk4b, mk4, mk4, mk4, midzeus_state, mk4, ROT0, "Midway", "Mortal Kombat 4 (version 1.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAME( 1999, invasnab, 0, invasn, invasn, midzeus_state, invasn, ROT0, "Midway", "Invasion - The Abductors (version 5.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAME( 1999, invasnab4,invasnab, invasn, invasn, midzeus_state, invasn, ROT0, "Midway", "Invasion - The Abductors (version 4.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAME( 1999, invasnab3,invasnab, invasn, invasn, midzeus_state, invasn, ROT0, "Midway", "Invasion - The Abductors (version 3.0)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAMEL( 1999, crusnexo, 0, midzeus2, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 2.4)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )
GAMEL( 1999, crusnexoa,crusnexo, midzeus2, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 2.0)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )
GAMEL( 1999, crusnexob,crusnexo, midzeus2, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.6)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )
GAMEL( 1999, crusnexoc,crusnexo, midzeus2, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.3)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )
GAMEL( 1999, crusnexod,crusnexo, midzeus2, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.0)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )
GAME( 2001, thegrid, 0, midzeus2, thegrid, midzeus_state, thegrid, ROT0, "Midway", "The Grid (version 1.2)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAME( 2001, thegrida, thegrid, midzeus2, thegrid, midzeus_state, thegrid, ROT0, "Midway", "The Grid (version 1.1)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAMEL( 1999, crusnexo, 0, crusnexo, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 2.4)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )
GAMEL( 1999, crusnexoa,crusnexo, crusnexo, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 2.0)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )
GAMEL( 1999, crusnexob,crusnexo, crusnexo, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.6)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )
GAMEL( 1999, crusnexoc,crusnexo, crusnexo, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.3)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )
GAMEL( 1999, crusnexod,crusnexo, crusnexo, crusnexo, midzeus_state, crusnexo, ROT0, "Midway", "Cruis'n Exotica (version 1.0)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE, layout_crusnexo )
GAME( 2001, thegrid, 0, thegrid, thegrid, midzeus_state, thegrid, ROT0, "Midway", "The Grid (version 1.2)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
GAME( 2001, thegrida, thegrid, thegrid, thegrid, midzeus_state, thegrid, ROT0, "Midway", "The Grid (version 1.1)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )

266
src/mame/drivers/seattle.c
View File

@ -433,7 +433,10 @@ public:
m_rombase(*this, "rombase"),
m_maincpu(*this, "maincpu"),
m_ide(*this, "ide"),
m_ethernet(*this, "ethernet")
m_ethernet(*this, "ethernet"),
m_cage(*this, "cage"),
m_dcs(*this, "dcs"),
m_ioasic(*this, "ioasic")
{
}
@ -446,6 +449,9 @@ public:
required_device<cpu_device> m_maincpu;
required_device<bus_master_ide_controller_device> m_ide;
optional_device<smc91c94_device> m_ethernet;
optional_device<atari_cage_seattle_device> m_cage;
optional_device<dcs_audio_device> m_dcs;
required_device<midway_ioasic_device> m_ioasic;
galileo_data m_galileo;
widget_data m_widget;
device_t *m_voodoo;
@ -509,6 +515,7 @@ public:
UINT32 screen_update_seattle(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
TIMER_CALLBACK_MEMBER(galileo_timer_callback);
DECLARE_WRITE_LINE_MEMBER(ethernet_interrupt);
DECLARE_WRITE_LINE_MEMBER(ioasic_irq);
void update_vblank_irq();
UINT32 pci_bridge_r(address_space &space, UINT8 reg, UINT8 type);
void pci_bridge_w(address_space &space, UINT8 reg, UINT8 type, UINT32 data);
@ -522,7 +529,7 @@ public:
void galileo_reset();
void widget_reset();
void update_widget_irq();
void init_common(int ioasic, int serialnum, int yearoffs, int config);
void init_common(int config);
};
/*************************************
@ -604,15 +611,15 @@ void seattle_state::machine_reset()
m_cpu_stalled_on_voodoo = FALSE;
/* reset either the DCS2 board or the CAGE board */
if (machine().device("dcs2") != NULL)
if (machine().device("dcs") != NULL)
{
dcs_reset_w(machine(), 1);
dcs_reset_w(machine(), 0);
m_dcs->reset_w(1);
m_dcs->reset_w(0);
}
else if (machine().device("cage") != NULL)
{
cage_control_w(machine(), 0);
cage_control_w(machine(), 3);
m_cage->control_w(0);
m_cage->control_w(3);
}
/* reset the other devices */
@ -662,14 +669,12 @@ WRITE_LINE_MEMBER(seattle_state::ethernet_interrupt)
*
*************************************/
static void ioasic_irq(running_machine &machine, int state)
WRITE_LINE_MEMBER(seattle_state::ioasic_irq)
{
seattle_state *drvstate = machine.driver_data<seattle_state>();
drvstate->m_maincpu->set_input_line(IOASIC_IRQ_NUM, state);
m_maincpu->set_input_line(IOASIC_IRQ_NUM, state);
}
/*************************************
*
* Configurable interrupts
@ -1665,13 +1670,13 @@ WRITE32_MEMBER(seattle_state::asic_reset_w)
{
COMBINE_DATA(m_asic_reset);
if (!(*m_asic_reset & 0x0002))
midway_ioasic_reset(machine());
m_ioasic->ioasic_reset();
}
WRITE32_MEMBER(seattle_state::asic_fifo_w)
{
midway_ioasic_fifo_w(machine(), data);
m_ioasic->fifo_w(data);
}
@ -1784,7 +1789,7 @@ static ADDRESS_MAP_START( seattle_map, AS_PROGRAM, 32, seattle_state )
AM_RANGE(0x0a000f00, 0x0a000f07) AM_DEVREADWRITE("ide", bus_master_ide_controller_device, bmdma_r, bmdma_w)
AM_RANGE(0x0c000000, 0x0c000fff) AM_READWRITE(galileo_r, galileo_w)
AM_RANGE(0x13000000, 0x13000003) AM_WRITE(asic_fifo_w)
AM_RANGE(0x16000000, 0x1600003f) AM_READWRITE_LEGACY(midway_ioasic_r, midway_ioasic_w)
AM_RANGE(0x16000000, 0x1600003f) AM_DEVREADWRITE("ioasic", midway_ioasic_device, read, write)
AM_RANGE(0x16100000, 0x1611ffff) AM_READWRITE(cmos_r, cmos_w) AM_SHARE("nvram")
AM_RANGE(0x17000000, 0x17000003) AM_READWRITE(cmos_protect_r, cmos_protect_w)
AM_RANGE(0x17100000, 0x17100003) AM_WRITE(seattle_watchdog_w)
@ -2540,14 +2545,11 @@ static MACHINE_CONFIG_START( seattle_common, seattle_state )
MCFG_SCREEN_SIZE(640, 480)
MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479)
MCFG_SCREEN_UPDATE_DRIVER(seattle_state, screen_update_seattle)
/* sound hardware */
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( phoenixsa, seattle_common )
MCFG_FRAGMENT_ADD(dcs2_audio_2115)
MCFG_CPU_REPLACE("maincpu", R4700LE, SYSTEM_CLOCK*2)
MCFG_CPU_CONFIG(r5000_config)
MCFG_CPU_PROGRAM_MAP(seattle_map)
@ -2555,8 +2557,6 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( seattle150, seattle_common )
MCFG_FRAGMENT_ADD(dcs2_audio_2115)
MCFG_CPU_REPLACE("maincpu", R5000LE, SYSTEM_CLOCK*3)
MCFG_CPU_CONFIG(r5000_config)
MCFG_CPU_PROGRAM_MAP(seattle_map)
@ -2570,8 +2570,6 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( seattle200, seattle_common )
MCFG_FRAGMENT_ADD(dcs2_audio_2115)
MCFG_CPU_REPLACE("maincpu", R5000LE, SYSTEM_CLOCK*4)
MCFG_CPU_CONFIG(r5000_config)
MCFG_CPU_PROGRAM_MAP(seattle_map)
@ -2595,8 +2593,6 @@ static const voodoo_config voodoo_2_intf =
};
static MACHINE_CONFIG_DERIVED( flagstaff, seattle_common )
MCFG_FRAGMENT_ADD(cage_seattle)
MCFG_CPU_REPLACE("maincpu", R5000LE, SYSTEM_CLOCK*4)
MCFG_CPU_CONFIG(r5000_config)
MCFG_CPU_PROGRAM_MAP(seattle_map)
@ -2608,7 +2604,153 @@ static MACHINE_CONFIG_DERIVED( flagstaff, seattle_common )
MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, voodoo_2_intf)
MACHINE_CONFIG_END
// Per game configurations
static MACHINE_CONFIG_DERIVED( wg3dh, phoenixsa )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x3839)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD)
MCFG_MIDWAY_IOASIC_UPPER(310/* others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( mace, seattle150 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x3839)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_MACE)
MCFG_MIDWAY_IOASIC_UPPER(319/* others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( sfrush, flagstaff )
MCFG_DEVICE_ADD("cage", ATARI_CAGE_SEATTLE, 0)
MCFG_ATARI_CAGE_SPEEDUP(0x5236)
MCFG_ATARI_CAGE_IRQ_CALLBACK(DEVWRITE8("ioasic",midway_ioasic_device,cage_irq_handler))
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD)
MCFG_MIDWAY_IOASIC_UPPER(315/* no alternates */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(100)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( sfrushrk, flagstaff )
MCFG_DEVICE_ADD("cage", ATARI_CAGE_SEATTLE, 0)
MCFG_ATARI_CAGE_SPEEDUP(0x5329)
MCFG_ATARI_CAGE_IRQ_CALLBACK(DEVWRITE8("ioasic",midway_ioasic_device,cage_irq_handler))
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_SFRUSHRK)
MCFG_MIDWAY_IOASIC_UPPER(331/* unknown */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(100)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( calspeed, seattle150_widget )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x39c0)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_CALSPEED)
MCFG_MIDWAY_IOASIC_UPPER(328/* others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(100)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( vaportrx, seattle200_widget )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x39c2)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_VAPORTRX)
MCFG_MIDWAY_IOASIC_UPPER(324/* 334? unknown */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(100)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( biofreak, seattle150 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x3835)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD)
MCFG_MIDWAY_IOASIC_UPPER(231/* no alternates */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( blitz, seattle150 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x39c2)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_BLITZ99)
MCFG_MIDWAY_IOASIC_UPPER(444/* or 528 */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( blitz99, seattle150 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0afb)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_BLITZ99)
MCFG_MIDWAY_IOASIC_UPPER(481/* or 484 or 520 */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( blitz2k, seattle150 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_BLITZ99)
MCFG_MIDWAY_IOASIC_UPPER(494/* or 498 */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( carnevil, seattle150 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0af7)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_CARNEVIL)
MCFG_MIDWAY_IOASIC_UPPER(469/* 469 or 486 or 528 */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( hyprdriv, seattle200_widget )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2115, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(2)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0af7)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_HYPRDRIV)
MCFG_MIDWAY_IOASIC_UPPER(469/* unknown */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(seattle_state, ioasic_irq))
MACHINE_CONFIG_END
/*************************************
*
@ -2839,11 +2981,8 @@ ROM_END
*
*************************************/
void seattle_state::init_common(int ioasic, int serialnum, int yearoffs, int config)
void seattle_state::init_common(int config)
{
/* initialize the subsystems */
midway_ioasic_init(machine(),ioasic, serialnum, yearoffs, ioasic_irq);
/* switch off the configuration */
m_board_config = config;
switch (config)
@ -2871,8 +3010,7 @@ void seattle_state::init_common(int ioasic, int serialnum, int yearoffs, int con
DRIVER_INIT_MEMBER(seattle_state,wg3dh)
{
dcs2_init(machine(), 2, 0x3839);
init_common(MIDWAY_IOASIC_STANDARD, 310/* others? */, 80, PHOENIX_CONFIG);
init_common(PHOENIX_CONFIG);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x8004413C, 0x0C0054B4, 250); /* confirmed */
@ -2883,8 +3021,7 @@ DRIVER_INIT_MEMBER(seattle_state,wg3dh)
DRIVER_INIT_MEMBER(seattle_state,mace)
{
dcs2_init(machine(), 2, 0x3839);
init_common(MIDWAY_IOASIC_MACE, 319/* others? */, 80, SEATTLE_CONFIG);
init_common(SEATTLE_CONFIG);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x800108F8, 0x8C420000, 250); /* confirmed */
@ -2893,8 +3030,7 @@ DRIVER_INIT_MEMBER(seattle_state,mace)
DRIVER_INIT_MEMBER(seattle_state,sfrush)
{
cage_init(machine(), 0x5236);
init_common(MIDWAY_IOASIC_STANDARD, 315/* no alternates */, 100, FLAGSTAFF_CONFIG);
init_common(FLAGSTAFF_CONFIG);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x80059F34, 0x3C028012, 250); /* confirmed */
@ -2905,8 +3041,7 @@ DRIVER_INIT_MEMBER(seattle_state,sfrush)
DRIVER_INIT_MEMBER(seattle_state,sfrushrk)
{
cage_init(machine(), 0x5329);
init_common(MIDWAY_IOASIC_SFRUSHRK, 331/* unknown */, 100, FLAGSTAFF_CONFIG);
init_common(FLAGSTAFF_CONFIG);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x800343E8, 0x3C028012, 250); /* confirmed */
@ -2918,9 +3053,7 @@ DRIVER_INIT_MEMBER(seattle_state,sfrushrk)
DRIVER_INIT_MEMBER(seattle_state,calspeed)
{
dcs2_init(machine(), 2, 0x39c0);
init_common(MIDWAY_IOASIC_CALSPEED, 328/* others? */, 100, SEATTLE_WIDGET_CONFIG);
midway_ioasic_set_auto_ack(1);
init_common(SEATTLE_WIDGET_CONFIG);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x80032534, 0x02221024, 250); /* confirmed */
@ -2930,8 +3063,7 @@ DRIVER_INIT_MEMBER(seattle_state,calspeed)
DRIVER_INIT_MEMBER(seattle_state,vaportrx)
{
dcs2_init(machine(), 2, 0x39c2);
init_common(MIDWAY_IOASIC_VAPORTRX, 324/* 334? unknown */, 100, SEATTLE_WIDGET_CONFIG);
init_common(SEATTLE_WIDGET_CONFIG);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x80049F14, 0x3C028020, 250); /* confirmed */
@ -2942,17 +3074,13 @@ DRIVER_INIT_MEMBER(seattle_state,vaportrx)
DRIVER_INIT_MEMBER(seattle_state,biofreak)
{
dcs2_init(machine(), 2, 0x3835);
init_common(MIDWAY_IOASIC_STANDARD, 231/* no alternates */, 80, SEATTLE_CONFIG);
/* speedups */
init_common(SEATTLE_CONFIG);
}
DRIVER_INIT_MEMBER(seattle_state,blitz)
{
dcs2_init(machine(), 2, 0x39c2);
init_common(MIDWAY_IOASIC_BLITZ99, 444/* or 528 */, 80, SEATTLE_CONFIG);
init_common(SEATTLE_CONFIG);
/* for some reason, the code in the ROM appears buggy; this is a small patch to fix it */
m_rombase[0x934/4] += 4;
@ -2965,8 +3093,7 @@ DRIVER_INIT_MEMBER(seattle_state,blitz)
DRIVER_INIT_MEMBER(seattle_state,blitz99)
{
dcs2_init(machine(), 2, 0x0afb);
init_common(MIDWAY_IOASIC_BLITZ99, 481/* or 484 or 520 */, 80, SEATTLE_CONFIG);
init_common(SEATTLE_CONFIG);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x8014E41C, 0x3C038025, 250); /* confirmed */
@ -2976,8 +3103,7 @@ DRIVER_INIT_MEMBER(seattle_state,blitz99)
DRIVER_INIT_MEMBER(seattle_state,blitz2k)
{
dcs2_init(machine(), 2, 0x0b5d);
init_common(MIDWAY_IOASIC_BLITZ99, 494/* or 498 */, 80, SEATTLE_CONFIG);
init_common(SEATTLE_CONFIG);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x8015773C, 0x3C038025, 250); /* confirmed */
@ -2987,8 +3113,7 @@ DRIVER_INIT_MEMBER(seattle_state,blitz2k)
DRIVER_INIT_MEMBER(seattle_state,carnevil)
{
dcs2_init(machine(), 2, 0x0af7);
init_common(MIDWAY_IOASIC_CARNEVIL, 469/* 469 or 486 or 528 */, 80, SEATTLE_CONFIG);
init_common(SEATTLE_CONFIG);
/* set up the gun */
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x16800000, 0x1680001f, read32_delegate(FUNC(seattle_state::carnevil_gun_r),this), write32_delegate(FUNC(seattle_state::carnevil_gun_w),this));
@ -3001,8 +3126,7 @@ DRIVER_INIT_MEMBER(seattle_state,carnevil)
DRIVER_INIT_MEMBER(seattle_state,hyprdriv)
{
dcs2_init(machine(), 2, 0x0af7);
init_common(MIDWAY_IOASIC_HYPRDRIV, 469/* unknown */, 80, SEATTLE_WIDGET_CONFIG);
init_common(SEATTLE_WIDGET_CONFIG);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x801643BC, 0x3C03801B, 250); /* confirmed */
@ -3019,22 +3143,22 @@ DRIVER_INIT_MEMBER(seattle_state,hyprdriv)
*************************************/
/* Atari */
GAME( 1996, wg3dh, 0, phoenixsa, wg3dh, seattle_state, wg3dh, ROT0, "Atari Games", "Wayne Gretzky's 3D Hockey", GAME_SUPPORTS_SAVE )
GAME( 1996, mace, 0, seattle150, mace, seattle_state, mace, ROT0, "Atari Games", "Mace: The Dark Age (boot ROM 1.0ce, HDD 1.0b)", GAME_SUPPORTS_SAVE )
GAME( 1997, macea, mace, seattle150, mace, seattle_state, mace, ROT0, "Atari Games", "Mace: The Dark Age (HDD 1.0a)", GAME_SUPPORTS_SAVE )
GAME( 1996, sfrush, 0, flagstaff, sfrush, seattle_state, sfrush, ROT0, "Atari Games", "San Francisco Rush", GAME_SUPPORTS_SAVE )
GAME( 1996, sfrushrk, 0, flagstaff, sfrushrk, seattle_state, sfrushrk, ROT0, "Atari Games", "San Francisco Rush: The Rock", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1998, calspeed, 0, seattle150_widget, calspeed, seattle_state, calspeed, ROT0, "Atari Games", "California Speed (Version 2.1a, 4/17/98)", GAME_SUPPORTS_SAVE )
GAME( 1998, calspeeda,calspeed, seattle150_widget, calspeed, seattle_state, calspeed, ROT0, "Atari Games", "California Speed (Version 1.0r7a 3/4/98)", GAME_SUPPORTS_SAVE )
GAME( 1998, vaportrx, 0, seattle200_widget, vaportrx, seattle_state, vaportrx, ROT0, "Atari Games", "Vapor TRX", GAME_SUPPORTS_SAVE )
GAME( 1998, vaportrxp,vaportrx, seattle200_widget, vaportrx, seattle_state, vaportrx, ROT0, "Atari Games", "Vapor TRX (prototype)", GAME_SUPPORTS_SAVE )
GAME( 1996, wg3dh, 0, wg3dh, wg3dh, seattle_state, wg3dh, ROT0, "Atari Games", "Wayne Gretzky's 3D Hockey", GAME_SUPPORTS_SAVE )
GAME( 1996, mace, 0, mace, mace, seattle_state, mace, ROT0, "Atari Games", "Mace: The Dark Age (boot ROM 1.0ce, HDD 1.0b)", GAME_SUPPORTS_SAVE )
GAME( 1997, macea, mace, mace, mace, seattle_state, mace, ROT0, "Atari Games", "Mace: The Dark Age (HDD 1.0a)", GAME_SUPPORTS_SAVE )
GAME( 1996, sfrush, 0, sfrush, sfrush, seattle_state, sfrush, ROT0, "Atari Games", "San Francisco Rush", GAME_SUPPORTS_SAVE )
GAME( 1996, sfrushrk, 0, sfrushrk, sfrushrk, seattle_state, sfrushrk, ROT0, "Atari Games", "San Francisco Rush: The Rock", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1998, calspeed, 0, calspeed, calspeed, seattle_state, calspeed, ROT0, "Atari Games", "California Speed (Version 2.1a, 4/17/98)", GAME_SUPPORTS_SAVE )
GAME( 1998, calspeeda,calspeed, calspeed, calspeed, seattle_state, calspeed, ROT0, "Atari Games", "California Speed (Version 1.0r7a 3/4/98)", GAME_SUPPORTS_SAVE )
GAME( 1998, vaportrx, 0, vaportrx, vaportrx, seattle_state, vaportrx, ROT0, "Atari Games", "Vapor TRX", GAME_SUPPORTS_SAVE )
GAME( 1998, vaportrxp,vaportrx, vaportrx, vaportrx, seattle_state, vaportrx, ROT0, "Atari Games", "Vapor TRX (prototype)", GAME_SUPPORTS_SAVE )
/* Midway */
GAME( 1997, biofreak, 0, seattle150, biofreak, seattle_state, biofreak, ROT0, "Midway Games", "BioFreaks (prototype)", GAME_SUPPORTS_SAVE )
GAME( 1997, blitz, 0, seattle150, blitz, seattle_state, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.2)", GAME_SUPPORTS_SAVE )
GAME( 1997, blitz11, blitz, seattle150, blitz, seattle_state, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.1)", GAME_SUPPORTS_SAVE )
GAME( 1998, blitz99, 0, seattle150, blitz99, seattle_state, blitz99, ROT0, "Midway Games", "NFL Blitz '99", GAME_SUPPORTS_SAVE )
GAME( 1999, blitz2k, 0, seattle150, blitz99, seattle_state, blitz2k, ROT0, "Midway Games", "NFL Blitz 2000 Gold Edition", GAME_SUPPORTS_SAVE )
GAME( 1998, carnevil, 0, seattle150, carnevil, seattle_state, carnevil, ROT0, "Midway Games", "CarnEvil (v1.0.3)", GAME_SUPPORTS_SAVE )
GAME( 1998, carnevil1,carnevil, seattle150, carnevil, seattle_state, carnevil, ROT0, "Midway Games", "CarnEvil (v1.0.1)", GAME_SUPPORTS_SAVE )
GAME( 1998, hyprdriv, 0, seattle200_widget, hyprdriv, seattle_state, hyprdriv, ROT0, "Midway Games", "Hyperdrive", GAME_SUPPORTS_SAVE )
GAME( 1997, biofreak, 0, biofreak, biofreak, seattle_state, biofreak, ROT0, "Midway Games", "BioFreaks (prototype)", GAME_SUPPORTS_SAVE )
GAME( 1997, blitz, 0, blitz, blitz, seattle_state, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.2)", GAME_SUPPORTS_SAVE )
GAME( 1997, blitz11, blitz, blitz, blitz, seattle_state, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.1)", GAME_SUPPORTS_SAVE )
GAME( 1998, blitz99, 0, blitz99, blitz99, seattle_state, blitz99, ROT0, "Midway Games", "NFL Blitz '99", GAME_SUPPORTS_SAVE )
GAME( 1999, blitz2k, 0, blitz2k, blitz99, seattle_state, blitz2k, ROT0, "Midway Games", "NFL Blitz 2000 Gold Edition", GAME_SUPPORTS_SAVE )
GAME( 1998, carnevil, 0, carnevil, carnevil, seattle_state, carnevil, ROT0, "Midway Games", "CarnEvil (v1.0.3)", GAME_SUPPORTS_SAVE )
GAME( 1998, carnevil1,carnevil, carnevil, carnevil, seattle_state, carnevil, ROT0, "Midway Games", "CarnEvil (v1.0.1)", GAME_SUPPORTS_SAVE )
GAME( 1998, hyprdriv, 0, hyprdriv, hyprdriv, seattle_state, hyprdriv, ROT0, "Midway Games", "Hyperdrive", GAME_SUPPORTS_SAVE )

6
src/mame/drivers/stv.c
View File

@ -1148,9 +1148,9 @@ ADDRESS_MAP_END
static const adsp21xx_config adsp_config =
{
NULL, /* callback for serial receive */
0,//sound_tx_callback, /* callback for serial transmit */
0,//timer_enable_callback /* callback for timer fired */
DEVCB_NULL, /* callback for serial receive */
DEVCB_NULL,//sound_tx_callback, /* callback for serial transmit */
DEVCB_NULL,//timer_enable_callback /* callback for timer fired */
};
MACHINE_RESET_MEMBER(stv_state,batmanfr)

268
src/mame/drivers/vegas.c
View File

@ -475,7 +475,9 @@ public:
m_ethernet(*this, "ethernet"),
m_rambase(*this, "rambase"),
m_nile_regs(*this, "nile_regs"),
m_rombase(*this, "rombase") { }
m_rombase(*this, "rombase"),
m_dcs(*this, "dcs"),
m_ioasic(*this, "ioasic") { }
required_device<cpu_device> m_maincpu;
required_device<m48t37_device> m_timekeeper;
@ -484,6 +486,9 @@ public:
required_shared_ptr<UINT32> m_rambase;
required_shared_ptr<UINT32> m_nile_regs;
required_shared_ptr<UINT32> m_rombase;
required_device<dcs_audio_device> m_dcs;
required_device<midway_ioasic_device> m_ioasic;
UINT16 m_nile_irq_state;
UINT16 m_ide_irq_state;
UINT32 m_pci_bridge_regs[0x40];
@ -526,10 +531,8 @@ public:
void update_nile_irqs();
void update_sio_irqs();
inline void _add_dynamic_address(offs_t start, offs_t end, read32_delegate read, write32_delegate write);
inline void _add_legacy_dynamic_address(offs_t start, offs_t end, read32_space_func read, write32_space_func write, const char *rdname, const char *wrname);
inline void _add_legacy_dynamic_device_address(device_t *device, offs_t start, offs_t end, read32_device_func read, write32_device_func write, const char *rdname, const char *wrname);
void init_common(int ioasic, int serialnum);
DECLARE_WRITE32_MEMBER( cmos_unlock_w );
DECLARE_WRITE32_MEMBER(timekeeper_w);
DECLARE_READ32_MEMBER(timekeeper_r);
@ -565,6 +568,7 @@ public:
DECLARE_WRITE32_MEMBER( ethernet_w );
DECLARE_WRITE32_MEMBER( dcs3_fifo_full_w );
DECLARE_WRITE_LINE_MEMBER(ethernet_interrupt);
DECLARE_WRITE_LINE_MEMBER(ioasic_irq);
};
@ -637,10 +641,10 @@ void vegas_state::machine_reset()
memset(m_pci_3dfx_regs, 0, sizeof(m_pci_3dfx_regs));
/* reset the DCS system if we have one */
if (machine().device("dcs2") != NULL || machine().device("dsio") != NULL || machine().device("denver") != NULL)
if (machine().device("dcs") != NULL)
{
dcs_reset_w(machine(), 1);
dcs_reset_w(machine(), 0);
m_dcs->reset_w(1);
m_dcs->reset_w(0);
}
/* initialize IRQ states */
@ -1313,17 +1317,15 @@ WRITE_LINE_MEMBER(vegas_state::vblank_assert)
}
static void ioasic_irq(running_machine &machine, int state)
WRITE_LINE_MEMBER(vegas_state::ioasic_irq)
{
vegas_state *drvstate = machine.driver_data<vegas_state>();
if (state)
drvstate->m_sio_irq_state |= 0x04;
m_sio_irq_state |= 0x04;
else
drvstate->m_sio_irq_state &= ~0x04;
drvstate->update_sio_irqs();
m_sio_irq_state &= ~0x04;
update_sio_irqs();
}
WRITE_LINE_MEMBER(vegas_state::ethernet_interrupt)
{
if (state)
@ -1349,8 +1351,8 @@ WRITE32_MEMBER( vegas_state::sio_irq_clear_w )
/* bit 0x01 seems to be used to reset the IOASIC */
if (!(data & 0x01))
{
midway_ioasic_reset(space.machine());
dcs_reset_w(space.machine(), data & 0x01);
m_ioasic->ioasic_reset();
m_dcs->reset_w(data & 0x01);
}
/* they toggle bit 0x08 low to reset the VBLANK */
@ -1479,7 +1481,7 @@ WRITE32_MEMBER( vegas_state::vegas_watchdog_w )
WRITE32_MEMBER( vegas_state::asic_fifo_w )
{
midway_ioasic_fifo_w(space.machine(), data);
m_ioasic->fifo_w(data);
}
@ -1541,7 +1543,7 @@ WRITE32_MEMBER( vegas_state::ethernet_w )
WRITE32_MEMBER( vegas_state::dcs3_fifo_full_w )
{
midway_ioasic_fifo_full_w(space.machine(), data);
m_ioasic->fifo_full_w(data);
}
@ -1554,7 +1556,6 @@ WRITE32_MEMBER( vegas_state::dcs3_fifo_full_w )
#define add_dynamic_address(s,e,r,w) _add_dynamic_address(s,e,r,w)
#define add_legacy_dynamic_address(s,e,r,w) _add_legacy_dynamic_address(s,e,r,w,#r,#w)
#define add_legacy_dynamic_device_address(d,s,e,r,w) _add_legacy_dynamic_device_address(d,s,e,r,w,#r,#w)
inline void vegas_state::_add_dynamic_address(offs_t start, offs_t end, read32_delegate read, write32_delegate write)
@ -1567,21 +1568,6 @@ inline void vegas_state::_add_dynamic_address(offs_t start, offs_t end, read32_d
m_dynamic_count++;
}
inline void vegas_state::_add_legacy_dynamic_address(offs_t start, offs_t end, read32_space_func read, write32_space_func write, const char *rdname, const char *wrname)
{
legacy_dynamic_address *l_dynamic = m_legacy_dynamic;
l_dynamic[m_legacy_dynamic_count].start = start;
l_dynamic[m_legacy_dynamic_count].end = end;
l_dynamic[m_legacy_dynamic_count].mread = read;
l_dynamic[m_legacy_dynamic_count].mwrite = write;
l_dynamic[m_legacy_dynamic_count].dread = NULL;
l_dynamic[m_legacy_dynamic_count].dwrite = NULL;
l_dynamic[m_legacy_dynamic_count].device = NULL;
l_dynamic[m_legacy_dynamic_count].rdname = rdname;
l_dynamic[m_legacy_dynamic_count].wrname = wrname;
m_legacy_dynamic_count++;
}
inline void vegas_state::_add_legacy_dynamic_device_address(device_t *device, offs_t start, offs_t end, read32_device_func read, write32_device_func write, const char *rdname, const char *wrname)
{
legacy_dynamic_address *l_dynamic = m_legacy_dynamic;
@ -1651,14 +1637,14 @@ void vegas_state::remap_dynamic_addresses()
base = m_nile_regs[NREG_DCS6] & 0x1fffff00;
if (base >= m_rambase.bytes())
{
add_legacy_dynamic_address(base + 0x0000, base + 0x003f, midway_ioasic_packed_r, midway_ioasic_packed_w);
add_dynamic_address(base + 0x0000, base + 0x003f, read32_delegate(FUNC(midway_ioasic_device::packed_r),(midway_ioasic_device*)m_ioasic), write32_delegate(FUNC(midway_ioasic_device::packed_w),(midway_ioasic_device*)m_ioasic));
add_dynamic_address(base + 0x1000, base + 0x1003, read32_delegate(), write32_delegate(FUNC(vegas_state::asic_fifo_w), this));
if (m_dcs_idma_cs != 0)
add_dynamic_address(base + 0x3000, base + 0x3003, read32_delegate(), write32_delegate(FUNC(vegas_state::dcs3_fifo_full_w), this));
if (m_dcs_idma_cs == 6)
{
add_legacy_dynamic_address(base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
add_legacy_dynamic_address(base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w);
add_dynamic_address(base + 0x5000, base + 0x5003, read32_delegate(), write32_delegate(FUNC(dcs_audio_device::dsio_idma_addr_w),(dcs_audio_device*)m_dcs));
add_dynamic_address(base + 0x7000, base + 0x7003, read32_delegate(FUNC(dcs_audio_device::dsio_idma_data_r),(dcs_audio_device*)m_dcs), write32_delegate(FUNC(dcs_audio_device::dsio_idma_data_w),(dcs_audio_device*)m_dcs));
}
}
@ -1669,8 +1655,8 @@ void vegas_state::remap_dynamic_addresses()
add_dynamic_address(base + 0x1000, base + 0x100f, read32_delegate(FUNC(vegas_state::ethernet_r), this), write32_delegate(FUNC(vegas_state::ethernet_w), this));
if (m_dcs_idma_cs == 7)
{
add_legacy_dynamic_address(base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
add_legacy_dynamic_address(base + 0x7000, base + 0x7003, dsio_idma_data_r, dsio_idma_data_w);
add_dynamic_address(base + 0x5000, base + 0x5003, read32_delegate(), write32_delegate(FUNC(dcs_audio_device::dsio_idma_addr_w),(dcs_audio_device*)m_dcs));
add_dynamic_address(base + 0x7000, base + 0x7003, read32_delegate(FUNC(dcs_audio_device::dsio_idma_data_r),(dcs_audio_device*)m_dcs), write32_delegate(FUNC(dcs_audio_device::dsio_idma_data_w),(dcs_audio_device*)m_dcs));
}
}
@ -2318,21 +2304,16 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( vegas, vegascore )
MCFG_FRAGMENT_ADD(dcs2_audio_2104)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( vegas250, vegascore )
MCFG_FRAGMENT_ADD(dcs2_audio_2104)
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_CLOCK(SYSTEM_CLOCK*2.5)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( vegas32m, vegascore )
MCFG_FRAGMENT_ADD(dcs2_audio_dsio)
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(vegas_map_32mb)
MACHINE_CONFIG_END
@ -2349,8 +2330,6 @@ static const voodoo_config vegasban_voodoo_intf =
DEVCB_NULL// stall;
};
static MACHINE_CONFIG_DERIVED( vegasban, vegascore )
MCFG_FRAGMENT_ADD(dcs2_audio_2104)
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(vegas_map_32mb)
@ -2370,8 +2349,6 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( denver, vegascore )
MCFG_FRAGMENT_ADD(dcs2_audio_denver)
MCFG_CPU_REPLACE("maincpu", RM7000LE, SYSTEM_CLOCK*2.5)
MCFG_CPU_CONFIG(r5000_config)
MCFG_CPU_PROGRAM_MAP(vegas_map_32mb)
@ -2380,6 +2357,144 @@ static MACHINE_CONFIG_DERIVED( denver, vegascore )
MCFG_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, vegasban_voodoo_intf)
MACHINE_CONFIG_END
// Per driver configs
static MACHINE_CONFIG_DERIVED( gauntleg, vegas )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_CALSPEED)
MCFG_MIDWAY_IOASIC_UPPER(340/* 340=39", 322=27", others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( gauntdl, vegas )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_GAUNTDL)
MCFG_MIDWAY_IOASIC_UPPER(346/* 347, others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( warfa, vegas250 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0b5d)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_MACE)
MCFG_MIDWAY_IOASIC_UPPER(337/* others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( tenthdeg, vegas )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0x0afb)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_GAUNTDL)
MCFG_MIDWAY_IOASIC_UPPER(330/* others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( roadburn, vegas32m )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DSIO, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
MCFG_DCS2_AUDIO_POLLING_OFFSET(0) /* no place to hook :-( */
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD)
MCFG_MIDWAY_IOASIC_UPPER(325/* others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( nbashowt, vegasban )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_MACE)
MCFG_MIDWAY_IOASIC_UPPER(528/* or 478 or 487 */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( nbanfl, vegasban )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_BLITZ99)
MCFG_MIDWAY_IOASIC_UPPER(498/* or 478 or 487 */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( sf2049 , denver )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_STANDARD)
MCFG_MIDWAY_IOASIC_UPPER(336/* others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( sf2049se, denver )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_SFRUSHRK)
MCFG_MIDWAY_IOASIC_UPPER(336/* others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( sf2049te, denver )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_SFRUSHRK)
MCFG_MIDWAY_IOASIC_UPPER(348/* others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( cartfury, vegasv3 )
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_2104, 0)
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
MCFG_MIDWAY_IOASIC_SHUFFLE(MIDWAY_IOASIC_CARNEVIL)
MCFG_MIDWAY_IOASIC_UPPER(495/* others? */)
MCFG_MIDWAY_IOASIC_YEAR_OFFS(80)
MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(WRITELINE(vegas_state, ioasic_irq))
MCFG_MIDWAY_IOASIC_AUTO_ACK(1)
MACHINE_CONFIG_END
/*************************************
@ -2540,19 +2655,8 @@ ROM_END
*
*************************************/
void vegas_state::init_common(int ioasic, int serialnum)
{
/* initialize the subsystems */
midway_ioasic_init(machine(), ioasic, serialnum, 80, ioasic_irq);
midway_ioasic_set_auto_ack(1);
}
DRIVER_INIT_MEMBER(vegas_state,gauntleg)
{
dcs2_init(machine(), 4, 0x0b5d);
init_common(MIDWAY_IOASIC_CALSPEED, 340/* 340=39", 322=27", others? */);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x80015430, 0x8CC38060, 250); /* confirmed */
mips3drc_add_hotspot(m_maincpu, 0x80015464, 0x3C09801E, 250); /* confirmed */
@ -2563,9 +2667,6 @@ DRIVER_INIT_MEMBER(vegas_state,gauntleg)
DRIVER_INIT_MEMBER(vegas_state,gauntdl)
{
dcs2_init(machine(), 4, 0x0b5d);
init_common(MIDWAY_IOASIC_GAUNTDL, 346/* 347, others? */);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x800158B8, 0x8CC3CC40, 250); /* confirmed */
mips3drc_add_hotspot(m_maincpu, 0x800158EC, 0x3C0C8022, 250); /* confirmed */
@ -2576,9 +2677,6 @@ DRIVER_INIT_MEMBER(vegas_state,gauntdl)
DRIVER_INIT_MEMBER(vegas_state,warfa)
{
dcs2_init(machine(), 4, 0x0b5d);
init_common(MIDWAY_IOASIC_MACE, 337/* others? */);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x8009436C, 0x0C031663, 250); /* confirmed */
}
@ -2586,9 +2684,6 @@ DRIVER_INIT_MEMBER(vegas_state,warfa)
DRIVER_INIT_MEMBER(vegas_state,tenthdeg)
{
dcs2_init(machine(), 4, 0x0afb);
init_common(MIDWAY_IOASIC_GAUNTDL, 330/* others? */);
/* speedups */
mips3drc_add_hotspot(m_maincpu, 0x80051CD8, 0x0C023C15, 250); /* confirmed */
mips3drc_add_hotspot(m_maincpu, 0x8005E674, 0x3C028017, 250); /* confirmed */
@ -2599,51 +2694,36 @@ DRIVER_INIT_MEMBER(vegas_state,tenthdeg)
DRIVER_INIT_MEMBER(vegas_state,roadburn)
{
dcs2_init(machine(), 4, 0); /* no place to hook :-( */
init_common(MIDWAY_IOASIC_STANDARD, 325/* others? */);
}
DRIVER_INIT_MEMBER(vegas_state,nbashowt)
{
dcs2_init(machine(), 4, 0);
init_common(MIDWAY_IOASIC_MACE, 528/* or 478 or 487 */);
}
DRIVER_INIT_MEMBER(vegas_state,nbanfl)
{
dcs2_init(machine(), 4, 0);
init_common(MIDWAY_IOASIC_BLITZ99, 498/* or 478 or 487 */);
/* NOT: MACE */
}
DRIVER_INIT_MEMBER(vegas_state,sf2049)
{
dcs2_init(machine(), 8, 0);
init_common(MIDWAY_IOASIC_STANDARD, 336/* others? */);
}
DRIVER_INIT_MEMBER(vegas_state,sf2049se)
{
dcs2_init(machine(), 8, 0);
init_common(MIDWAY_IOASIC_SFRUSHRK, 336/* others? */);
}
DRIVER_INIT_MEMBER(vegas_state,sf2049te)
{
dcs2_init(machine(), 8, 0);
init_common(MIDWAY_IOASIC_SFRUSHRK, 348/* others? */);
}
DRIVER_INIT_MEMBER(vegas_state,cartfury)
{
dcs2_init(machine(), 4, 0);
init_common(MIDWAY_IOASIC_CARNEVIL, 495/* others? */);
}
@ -2655,26 +2735,26 @@ DRIVER_INIT_MEMBER(vegas_state,cartfury)
*************************************/
/* Vegas + Vegas SIO + Voodoo 2 */
GAME( 1998, gauntleg, 0, vegas, gauntleg, vegas_state, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.6)", GAME_SUPPORTS_SAVE )
GAME( 1998, gauntleg12, gauntleg, vegas, gauntleg, vegas_state, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.2)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )
GAME( 1998, tenthdeg, 0, vegas, tenthdeg, vegas_state, tenthdeg, ROT0, "Atari Games", "Tenth Degree (prototype)", GAME_SUPPORTS_SAVE )
GAME( 1998, gauntleg, 0, gauntleg, gauntleg, vegas_state, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.6)", GAME_SUPPORTS_SAVE )
GAME( 1998, gauntleg12, gauntleg, gauntleg, gauntleg, vegas_state, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.2)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )
GAME( 1998, tenthdeg, 0, tenthdeg, tenthdeg, vegas_state, tenthdeg, ROT0, "Atari Games", "Tenth Degree (prototype)", GAME_SUPPORTS_SAVE )
/* Durango + Vegas SIO + Voodoo 2 */
GAME( 1999, gauntdl, 0, vegas, gauntdl, vegas_state, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.52)", GAME_SUPPORTS_SAVE )
GAME( 1999, gauntdl24,gauntdl, vegas, gauntdl, vegas_state, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.4)", GAME_SUPPORTS_SAVE )
GAME( 1999, warfa, 0, vegas250, warfa, vegas_state, warfa, ROT0, "Atari Games", "War: The Final Assault", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1999, gauntdl, 0, gauntdl, gauntdl, vegas_state, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.52)", GAME_SUPPORTS_SAVE )
GAME( 1999, gauntdl24,gauntdl, gauntdl, gauntdl, vegas_state, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.4)", GAME_SUPPORTS_SAVE )
GAME( 1999, warfa, 0, warfa, warfa, vegas_state, warfa, ROT0, "Atari Games", "War: The Final Assault", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
/* Durango + DSIO + Voodoo 2 */
GAME( 1999, roadburn, 0, vegas32m, roadburn, vegas_state, roadburn, ROT0, "Atari Games", "Road Burners", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1999, roadburn, 0, roadburn, roadburn, vegas_state, roadburn, ROT0, "Atari Games", "Road Burners", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
/* Durango + DSIO? + Voodoo banshee */
GAME( 1998, nbashowt, 0, vegasban, nbashowt, vegas_state, nbashowt, ROT0, "Midway Games", "NBA Showtime: NBA on NBC", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1999, nbanfl, 0, vegasban, nbashowt, vegas_state, nbanfl, ROT0, "Midway Games", "NBA Showtime / NFL Blitz 2000", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1998, nbashowt, 0, nbashowt, nbashowt, vegas_state, nbashowt, ROT0, "Midway Games", "NBA Showtime: NBA on NBC", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1999, nbanfl, 0, nbanfl, nbashowt, vegas_state, nbanfl, ROT0, "Midway Games", "NBA Showtime / NFL Blitz 2000", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
/* Durango + Denver SIO + Voodoo 3 */
GAME( 1998, sf2049, 0, denver, sf2049, vegas_state, sf2049, ROT0, "Atari Games", "San Francisco Rush 2049", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1998, sf2049se, sf2049, denver, sf2049se, vegas_state, sf2049se, ROT0, "Atari Games", "San Francisco Rush 2049: Special Edition", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1998, sf2049te, sf2049, denver, sf2049te, vegas_state, sf2049te, ROT0, "Atari Games", "San Francisco Rush 2049: Tournament Edition", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE)
GAME( 1998, sf2049, 0, sf2049, sf2049, vegas_state, sf2049, ROT0, "Atari Games", "San Francisco Rush 2049", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1998, sf2049se, sf2049, sf2049se, sf2049se, vegas_state, sf2049se, ROT0, "Atari Games", "San Francisco Rush 2049: Special Edition", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1998, sf2049te, sf2049, sf2049te, sf2049te, vegas_state, sf2049te, ROT0, "Atari Games", "San Francisco Rush 2049: Tournament Edition", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE)
/* Durango + Vegas SIO + Voodoo 3 */
GAME( 2000, cartfury, 0, vegasv3, cartfury, vegas_state, cartfury, ROT0, "Midway Games", "Cart Fury", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 2000, cartfury, 0, cartfury, cartfury, vegas_state, cartfury, ROT0, "Midway Games", "Cart Fury", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )

13
src/mame/drivers/wpc_dcs.c
View File

@ -150,30 +150,29 @@ INPUT_PORTS_END
READ8_MEMBER(wpc_dcs_state::wpc_dcs_sound_ctrl_r)
{
return dcs_control_r(machine());
return m_dcs->control_r();
}
WRITE8_MEMBER(wpc_dcs_state::wpc_dcs_sound_ctrl_w)
{
dcs_reset_w(machine(),1);
dcs_reset_w(machine(),0);
m_dcs->reset_w(1);
m_dcs->reset_w(0);
}
READ8_MEMBER(wpc_dcs_state::wpc_dcs_sound_data_r)
{
return dcs_data_r(machine());
return m_dcs->data_r();
}
WRITE8_MEMBER(wpc_dcs_state::wpc_dcs_sound_data_w)
{
dcs_data_w(machine(),data << 8);
m_dcs->data_w(data << 8);
}
DRIVER_INIT_MEMBER(wpc_dcs_state,wpc_dcs)
{
wpc_flip2_state::init_wpc_flip2();
dcs_init(machine());
m_send = false;
}
@ -192,7 +191,7 @@ static MACHINE_CONFIG_START( wpc_dcs, wpc_dcs_state )
MCFG_DEFAULT_LAYOUT(layout_lcd)
MCFG_FRAGMENT_ADD(dcs_audio_wpc)
MCFG_DEVICE_ADD("dcs", DCS_AUDIO_WPC, 0)
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_SIZE(128, 32)

11
src/mame/includes/atarigt.h
View File

@ -7,7 +7,7 @@
*************************************************************************/
#include "machine/atarigen.h"
#include "audio/cage.h"
#define CRAM_ENTRIES 0x4000
#define TRAM_ENTRIES 0x4000
@ -24,7 +24,8 @@ public:
m_playfield_tilemap(*this, "playfield"),
m_alpha_tilemap(*this, "alpha"),
m_rle(*this, "rle"),
m_mo_command(*this, "mo_command") { }
m_mo_command(*this, "mo_command"),
m_cage(*this, "cage") { }
UINT8 m_is_primrage;
required_shared_ptr<UINT16> m_colorram;
@ -46,6 +47,7 @@ public:
UINT32 m_expanded_mram[MRAM_ENTRIES * 3];
required_shared_ptr<UINT32> m_mo_command;
optional_device<atari_cage_device> m_cage;
void (atarigt_state::*m_protection_w)(address_space &space, offs_t offset, UINT16 data);
void (atarigt_state::*m_protection_r)(address_space &space, offs_t offset, UINT16 *data);
@ -70,9 +72,11 @@ public:
DECLARE_READ32_MEMBER(colorram_protection_r);
DECLARE_WRITE32_MEMBER(colorram_protection_w);
DECLARE_WRITE32_MEMBER(tmek_pf_w);
DECLARE_WRITE8_MEMBER(cage_irq_callback);
void atarigt_colorram_w(offs_t address, UINT16 data, UINT16 mem_mask);
UINT16 atarigt_colorram_r(offs_t address);
DECLARE_DRIVER_INIT(primrage20);
DECLARE_DRIVER_INIT(primrage);
DECLARE_DRIVER_INIT(tmek);
TILE_GET_INFO_MEMBER(get_alpha_tile_info);
@ -89,6 +93,5 @@ private:
void primrage_update_mode(offs_t offset);
void primrage_protection_w(address_space &space, offs_t offset, UINT16 data);
void primrage_protection_r(address_space &space, offs_t offset, UINT16 *data);
void primrage_init_common(offs_t cage_speedup);
void compute_fake_pots(int *pots);
};

4
src/mame/includes/gaelco3d.h
View File

@ -12,6 +12,7 @@
#include "video/poly.h"
#include "machine/eepromser.h"
#include "machine/gaelco3d.h"
#include "cpu/adsp2100/adsp2100.h"
#define SOUND_CHANNELS 4
@ -74,7 +75,7 @@ public:
required_shared_ptr<UINT16> m_adsp_control_regs;
required_shared_ptr<UINT16> m_adsp_fastram_base;
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_adsp;
required_device<adsp21xx_device> m_adsp;
required_device<eeprom_serial_93cxx_device> m_eeprom;
required_device<cpu_device> m_tms;
required_device<gaelco_serial_device> m_serial;
@ -137,4 +138,5 @@ public:
TIMER_CALLBACK_MEMBER(delayed_sound_w);
TIMER_DEVICE_CALLBACK_MEMBER(adsp_autobuffer_irq);
void gaelco3d_render(screen_device &screen);
DECLARE_WRITE32_MEMBER(adsp_tx_callback);
};

18
src/mame/includes/harddriv.h
View File

@ -424,6 +424,15 @@ public:
DECLARE_READ16_MEMBER( hdadsp_speedup_r );
DECLARE_READ16_MEMBER( hdds3_speedup_r );
DECLARE_WRITE_LINE_MEMBER(hdds3sdsp_timer_enable_callback);
DECLARE_WRITE32_MEMBER(hdds3sdsp_serial_tx_callback);
DECLARE_READ32_MEMBER(hdds3sdsp_serial_rx_callback);
DECLARE_WRITE_LINE_MEMBER(hdds3xdsp_timer_enable_callback);
DECLARE_WRITE32_MEMBER(hdds3xdsp_serial_tx_callback);
DECLARE_READ32_MEMBER(hdds3xdsp_serial_rx_callback);
/*----------- defined in video/harddriv.c -----------*/
DECLARE_READ16_MEMBER( hdgsp_control_lo_r );
DECLARE_WRITE16_MEMBER( hdgsp_control_lo_w );
@ -452,16 +461,7 @@ void hdmsp_irq_gen(device_t *device, int state);
/* DS III/IV board */
TIMER_DEVICE_CALLBACK( ds3sdsp_internal_timer_callback );
void hdds3sdsp_timer_enable_callback(adsp21xx_device &device, int enable);
void hdds3sdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data);
INT32 hdds3sdsp_serial_rx_callback(adsp21xx_device &device, int port);
TIMER_DEVICE_CALLBACK( ds3xdsp_internal_timer_callback );
void hdds3xdsp_timer_enable_callback(adsp21xx_device &device, int enable);
void hdds3xdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data);
INT32 hdds3xdsp_serial_rx_callback(adsp21xx_device &device, int port);
/*----------- defined in video/harddriv.c -----------*/

5
src/mame/includes/metalmx.h
View File

@ -12,7 +12,8 @@ public:
m_gsp(*this, "gsp"),
m_adsp(*this, "adsp"),
m_dsp32c_1(*this, "dsp32c_1"),
m_dsp32c_2(*this, "dsp32c_2") ,
m_dsp32c_2(*this, "dsp32c_2"),
m_cage(*this, "cage"),
m_adsp_internal_program_ram(*this, "adsp_intprog"),
m_gsp_dram(*this, "gsp_dram"),
m_gsp_vram(*this, "gsp_vram"){ }
@ -22,6 +23,7 @@ public:
required_device<adsp2105_device> m_adsp;
required_device<dsp32c_device> m_dsp32c_1;
required_device<dsp32c_device> m_dsp32c_2;
required_device<atari_cage_device> m_cage;
required_shared_ptr<UINT32> m_adsp_internal_program_ram;
required_shared_ptr<UINT16> m_gsp_dram;
@ -46,6 +48,7 @@ public:
DECLARE_WRITE32_MEMBER(host_vram_w);
DECLARE_WRITE32_MEMBER(timer_w);
DECLARE_DRIVER_INIT(metalmx);
DECLARE_WRITE8_MEMBER(cage_irq_callback);
virtual void machine_reset();
virtual void video_start();
UINT32 screen_update_metalmx(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);

4
src/mame/includes/midtunit.h
View File

@ -22,7 +22,8 @@ public:
m_cvsd_sound(*this, "cvsd"),
m_adpcm_sound(*this, "adpcm") ,
m_maincpu(*this, "maincpu"),
m_palette(*this, "palette") { }
m_palette(*this, "palette"),
m_dcs(*this, "dcs") { }
required_shared_ptr<UINT16> m_nvram;
required_memory_region m_gfxrom;
@ -74,6 +75,7 @@ public:
DECLARE_VIDEO_START(midtunit);
required_device<cpu_device> m_maincpu;
required_device<palette_device> m_palette;
optional_device<dcs_audio_device> m_dcs;
void register_state_saving();
void init_tunit_generic(int sound);
void init_nbajam_common(int te_protection);

13
src/mame/includes/midvunit.h
View File

@ -7,6 +7,8 @@
**************************************************************************/
#include "video/poly.h"
#include "audio/dcs.h"
#include "machine/midwayic.h"
#define MIDVUNIT_VIDEO_CLOCK 33000000
@ -56,7 +58,11 @@ public:
m_textureram(*this, "textureram") ,
m_maincpu(*this, "maincpu"),
m_screen(*this, "screen"),
m_palette(*this, "palette") { }
m_palette(*this, "palette"),
m_midway_serial_pic(*this, "serial_pic"),
m_midway_serial_pic2(*this, "serial_pic2"),
m_midway_ioasic(*this, "ioasic"),
m_dcs(*this, "dcs") { }
optional_shared_ptr<UINT32> m_nvram;
required_shared_ptr<UINT32> m_ram_base;
@ -135,7 +141,10 @@ public:
required_device<cpu_device> m_maincpu;
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
optional_device<midway_serial_pic_device> m_midway_serial_pic;
optional_device<midway_serial_pic2_device> m_midway_serial_pic2;
optional_device<midway_ioasic_device> m_midway_ioasic;
required_device<dcs_audio_device> m_dcs;
protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
};

6
src/mame/includes/midwunit.h
View File

@ -6,14 +6,18 @@
**************************************************************************/
#include "machine/midwayic.h"
class midwunit_state : public midtunit_state
{
public:
midwunit_state(const machine_config &mconfig, device_type type, const char *tag)
: midtunit_state(mconfig, type, tag),
m_nvram(*this, "nvram") { }
m_nvram(*this, "nvram"),
m_midway_serial_pic(*this, "serial_pic") { }
required_shared_ptr<UINT16> m_nvram;
required_device<midway_serial_pic_device> m_midway_serial_pic;
UINT8 m_cmos_write_enable;
UINT16 m_iodata[8];
UINT8 m_ioshuffle[16];

7
src/mame/includes/midxunit.h
View File

@ -6,14 +6,18 @@
**************************************************************************/
#include "machine/midwayic.h"
class midxunit_state : public midtunit_state
{
public:
midxunit_state(const machine_config &mconfig, device_type type, const char *tag)
: midtunit_state(mconfig, type, tag),
m_nvram(*this, "nvram") { }
m_nvram(*this, "nvram"),
m_midway_serial_pic(*this, "serial_pic") { }
required_shared_ptr<UINT16> m_nvram;
required_device<midway_serial_pic_device> m_midway_serial_pic;
UINT8 m_cmos_write_enable;
UINT16 m_iodata[8];
UINT8 m_ioshuffle[16];
@ -36,6 +40,7 @@ public:
DECLARE_READ16_MEMBER(midxunit_sound_r);
DECLARE_READ16_MEMBER(midxunit_sound_state_r);
DECLARE_WRITE16_MEMBER(midxunit_sound_w);
DECLARE_WRITE_LINE_MEMBER(midxunit_dcs_output_full);
DECLARE_DRIVER_INIT(revx);
DECLARE_MACHINE_RESET(midxunit);
DECLARE_VIDEO_START(midxunit);

7
src/mame/includes/wpc_pin.h
View File

@ -11,6 +11,7 @@
#include "emu.h"
#include "cpu/m6809/m6809.h"
#include "audio/wpcsnd.h"
#include "audio/dcs.h"
#include "machine/wpc.h"
#include "rendlay.h"
@ -104,7 +105,8 @@ class wpc_dcs_state : public wpc_flip2_state
{
public:
wpc_dcs_state(const machine_config &mconfig, device_type type, const char *tag)
: wpc_flip2_state(mconfig, type, tag)
: wpc_flip2_state(mconfig, type, tag),
m_dcs(*this, "dcs")
{ }
public:
@ -113,7 +115,8 @@ public:
DECLARE_WRITE8_MEMBER(wpc_dcs_sound_ctrl_w);
DECLARE_READ8_MEMBER(wpc_dcs_sound_data_r);
DECLARE_WRITE8_MEMBER(wpc_dcs_sound_data_w);
required_device<dcs_audio_wpc_device> m_dcs;
private:
bool m_send;
// UINT8 m_prev_data;

64
src/mame/machine/harddriv.c
View File

@ -1249,16 +1249,14 @@ void harddriv_state::hdds3sdsp_reset_timer()
m_ds3sdsp_internal_timer->adjust(m_ds3sdsp->cycles_to_attotime(count * scale));
}
void hdds3sdsp_timer_enable_callback(adsp21xx_device &device, int enable)
WRITE_LINE_MEMBER(harddriv_state::hdds3sdsp_timer_enable_callback)
{
harddriv_state *state = device.machine().driver_data<harddriv_state>();
m_ds3sdsp_timer_en = state;
state->m_ds3sdsp_timer_en = enable;
if (enable)
state->hdds3sdsp_reset_timer();
if (state)
hdds3sdsp_reset_timer();
else
state->m_ds3sdsp_internal_timer->adjust(attotime::never);
m_ds3sdsp_internal_timer->adjust(attotime::never);
}
@ -1289,16 +1287,14 @@ void harddriv_state::hdds3xdsp_reset_timer()
}
void hdds3xdsp_timer_enable_callback(adsp21xx_device &device, int enable)
WRITE_LINE_MEMBER(harddriv_state::hdds3xdsp_timer_enable_callback)
{
harddriv_state *state = device.machine().driver_data<harddriv_state>();
m_ds3xdsp_timer_en = state;
state->m_ds3xdsp_timer_en = enable;
if (enable)
state->hdds3xdsp_reset_timer();
if (state)
hdds3xdsp_reset_timer();
else
state->m_ds3xdsp_internal_timer->adjust(attotime::never);
m_ds3xdsp_internal_timer->adjust(attotime::never);
}
@ -1312,50 +1308,42 @@ static TIMER_CALLBACK( xsdp_sport1_irq_off_callback )
}
void hdds3sdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data)
WRITE32_MEMBER(harddriv_state::hdds3sdsp_serial_tx_callback)
{
harddriv_state *state = device.machine().driver_data<harddriv_state>();
if ((state->m_ds3sdsp_regs[0x1f] & 0xc00) != 0xc00)
if ((m_ds3sdsp_regs[0x1f] & 0xc00) != 0xc00)
return;
state->m_ds3sdsp_sdata = data;
m_ds3sdsp_sdata = data;
state->m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, ASSERT_LINE);
device.machine().scheduler().timer_set(attotime::from_nsec(200), FUNC(xsdp_sport1_irq_off_callback));
m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, ASSERT_LINE);
machine().scheduler().timer_set(attotime::from_nsec(200), FUNC(xsdp_sport1_irq_off_callback));
}
INT32 hdds3sdsp_serial_rx_callback(adsp21xx_device &device, int port)
READ32_MEMBER(harddriv_state::hdds3sdsp_serial_rx_callback)
{
harddriv_state *state = device.machine().driver_data<harddriv_state>();
if ((state->m_ds3sdsp_regs[0x1f] & 0xc00) != 0xc00)
if ((m_ds3sdsp_regs[0x1f] & 0xc00) != 0xc00)
return 0xff;
return state->m_ds3xdsp_sdata;
return m_ds3xdsp_sdata;
}
void hdds3xdsp_serial_tx_callback(adsp21xx_device &device, int port, INT32 data)
WRITE32_MEMBER(harddriv_state::hdds3xdsp_serial_tx_callback)
{
harddriv_state *state = device.machine().driver_data<harddriv_state>();
if ((state->m_ds3xdsp_regs[0x1f] & 0xc00) != 0xc00)
if ((m_ds3xdsp_regs[0x1f] & 0xc00) != 0xc00)
return;
state->m_ds3xdsp_sdata = data;
m_ds3xdsp_sdata = data;
}
INT32 hdds3xdsp_serial_rx_callback(adsp21xx_device &device, int port)
READ32_MEMBER(harddriv_state::hdds3xdsp_serial_rx_callback)
{
harddriv_state *state = device.machine().driver_data<harddriv_state>();
state->m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, ASSERT_LINE);
state->m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, CLEAR_LINE);
state->m_ds3xdsp->signal_interrupt_trigger();
return state->m_ds3sdsp_sdata;
m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, ASSERT_LINE);
m_ds3xdsp->set_input_line(ADSP2105_SPORT1_RX, CLEAR_LINE);
m_ds3xdsp->signal_interrupt_trigger();
return m_ds3sdsp_sdata;
}

21
src/mame/machine/midtunit.c
View File

@ -393,16 +393,7 @@ void midtunit_state::init_tunit_generic(int sound)
/* load sound ROMs and set up sound handlers */
chip_type = sound;
switch (sound)
{
case SOUND_ADPCM:
case SOUND_ADPCM_LARGE:
break;
case SOUND_DCS:
dcs_init(machine());
break;
}
/* default graphics functionality */
midtunit_gfx_rom_large = 0;
@ -541,8 +532,8 @@ MACHINE_RESET_MEMBER(midtunit_state,midtunit)
break;
case SOUND_DCS:
dcs_reset_w(machine(), 1);
dcs_reset_w(machine(), 0);
m_dcs->reset_w(1);
m_dcs->reset_w(0);
break;
}
}
@ -560,7 +551,7 @@ READ16_MEMBER(midtunit_state::midtunit_sound_state_r)
/* logerror("%08X:Sound status read\n", space.device().safe_pc());*/
if (chip_type == SOUND_DCS)
return dcs_control_r(machine()) >> 4;
return m_dcs->control_r() >> 4;
if (fake_sound_state)
{
@ -575,7 +566,7 @@ READ16_MEMBER(midtunit_state::midtunit_sound_r)
logerror("%08X:Sound data read\n", space.device().safe_pc());
if (chip_type == SOUND_DCS)
return dcs_data_r(machine()) & 0xff;
return m_dcs->data_r() & 0xff;
return ~0;
}
@ -604,8 +595,8 @@ WRITE16_MEMBER(midtunit_state::midtunit_sound_w)
case SOUND_DCS:
logerror("%08X:Sound write = %04X\n", space.device().safe_pc(), data);
dcs_reset_w(machine(), ~data & 0x100);
dcs_data_w(machine(), data & 0xff);
m_dcs->reset_w(~data & 0x100);
m_dcs->data_w(data & 0xff);
/* the games seem to check for $82 loops, so this should be just barely enough */
fake_sound_state = 128;
break;

901
src/mame/machine/midwayic.c
View File

File diff suppressed because it is too large Load Diff

209
src/mame/machine/midwayic.h
View File

@ -6,37 +6,200 @@
***************************************************************************/
#ifndef __MIDWAY_IC__
#define __MIDWAY_IC__
#include "audio/cage.h"
#include "audio/dcs.h"
/* 1st generation Midway serial PIC */
void midway_serial_pic_init(running_machine &machine, int upper);
void midway_serial_pic_reset_w(int state);
UINT8 midway_serial_pic_status_r(void);
UINT8 midway_serial_pic_r(address_space &space);
void midway_serial_pic_w(address_space &space, UINT8 data);
class midway_serial_pic_device : public device_t
{
public:
// construction/destruction
midway_serial_pic_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
midway_serial_pic_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
static void static_set_upper(device_t &device, int upper) { downcast<midway_serial_pic_device &>(device).m_upper = upper; }
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( status_r );
DECLARE_WRITE_LINE_MEMBER( reset_w );
protected:
// device-level overrides
virtual void device_start();
void generate_serial_data(int upper);
void serial_register_state();
UINT8 m_data[16]; // reused by other devices
int m_upper;
private:
UINT8 m_buff;
UINT8 m_idx;
UINT8 m_status;
UINT8 m_bits;
UINT8 m_ormask;
};
// device type definition
extern const device_type MIDWAY_SERIAL_PIC;
#define MCFG_MIDWAY_SERIAL_PIC_UPPER(_upper) \
midway_serial_pic_device::static_set_upper(*device, _upper);
/* 2nd generation Midway serial/NVRAM/RTC PIC */
void midway_serial_pic2_init(running_machine &machine, int upper, int yearoffs);
void midway_serial_pic2_set_default_nvram(const UINT8 *nvram);
UINT8 midway_serial_pic2_status_r(address_space &space);
UINT8 midway_serial_pic2_r(address_space &space);
void midway_serial_pic2_w(address_space &space, UINT8 data);
NVRAM_HANDLER( midway_serial_pic2 );
// ======================> midway_serial_pic2_device
class midway_serial_pic2_device : public midway_serial_pic_device,
public device_nvram_interface
{
public:
// construction/destruction
midway_serial_pic2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
midway_serial_pic2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
static void static_set_yearoffs(device_t &device, int yearoffs) { downcast<midway_serial_pic2_device &>(device).m_yearoffs = yearoffs; }
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
DECLARE_READ8_MEMBER( status_r );
void set_default_nvram(const UINT8 *nvram);
protected:
// device-level overrides
virtual void device_start();
// device_nvram_interface overrides
virtual void nvram_default();
virtual void nvram_read(emu_file &file);
virtual void nvram_write(emu_file &file);
private:
void pic_register_state();
TIMER_CALLBACK_MEMBER( reset_timer );
UINT16 m_latch;
attotime m_latch_expire_time;
UINT8 m_state;
UINT8 m_index;
UINT8 m_total;
UINT8 m_nvram_addr;
UINT8 m_buffer[0x10];
UINT8 m_nvram[0x100];
UINT8 m_default_nvram[0x100];
UINT8 m_time_buf[8];
UINT8 m_time_index;
UINT8 m_time_just_written;
UINT16 m_yearoffs;
emu_timer *m_time_write_timer;
};
// device type definition
extern const device_type MIDWAY_SERIAL_PIC2;
#define MCFG_MIDWAY_SERIAL_PIC2_UPPER MCFG_MIDWAY_SERIAL_PIC_UPPER
#define MCFG_MIDWAY_SERIAL_PIC2_YEAR_OFFS(_yearoffs) \
midway_serial_pic2_device::static_set_yearoffs(*device, _yearoffs);
/* I/O ASIC connected to 2nd generation PIC */
void midway_ioasic_init(running_machine &machine, int shuffle, int upper, int yearoffs, void (*irq_callback)(running_machine &, int));
void midway_ioasic_set_auto_ack(int auto_ack);
void midway_ioasic_set_shuffle_state(int state);
void midway_ioasic_reset(running_machine &machine);
void midway_ioasic_fifo_w(running_machine &machine, UINT16 data);
void midway_ioasic_fifo_reset_w(running_machine &machine, int state);
void midway_ioasic_fifo_full_w(running_machine &machine, UINT16 data);
DECLARE_READ32_HANDLER( midway_ioasic_r );
DECLARE_WRITE32_HANDLER( midway_ioasic_w );
DECLARE_READ32_HANDLER( midway_ioasic_packed_r );
DECLARE_WRITE32_HANDLER( midway_ioasic_packed_w );
// ======================> midway_ioasic_device
class midway_ioasic_device : public midway_serial_pic2_device
{
public:
// construction/destruction
midway_ioasic_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
static void static_set_shuffle(device_t &device, UINT8 shuffle) { downcast<midway_ioasic_device &>(device).m_shuffle_type = shuffle; }
static void static_set_shuffle_default(device_t &device, UINT8 shuffle) { downcast<midway_ioasic_device &>(device).m_shuffle_default = shuffle; }
static void static_set_auto_ack(device_t &device, UINT8 auto_ack) { downcast<midway_ioasic_device &>(device).m_auto_ack = auto_ack; }
template<class _Object> static devcb2_base &set_irqhandler_callback(device_t &device, _Object object) { return downcast<midway_ioasic_device &>(device).m_irq_callback.set_callback(object); }
void set_shuffle_state(int state);
void fifo_w(UINT16 data);
void fifo_full_w(UINT16 data);
DECLARE_WRITE_LINE_MEMBER(fifo_reset_w);
DECLARE_READ16_MEMBER(fifo_r);
DECLARE_READ16_MEMBER(fifo_status_r);
DECLARE_WRITE_LINE_MEMBER(ioasic_input_empty);
DECLARE_WRITE_LINE_MEMBER(ioasic_output_full);
DECLARE_READ32_MEMBER( read );
DECLARE_WRITE32_MEMBER( write );
DECLARE_READ32_MEMBER( packed_r );
DECLARE_WRITE32_MEMBER( packed_w );
DECLARE_WRITE8_MEMBER(cage_irq_handler);
void ioasic_reset();
protected:
// device-level overrides
virtual void device_start();
private:
void ioasic_register_state();
void update_ioasic_irq();
UINT32 m_reg[16];
UINT8 m_has_dcs;
UINT8 m_has_cage;
device_t *m_dcs_cpu;
UINT8 m_shuffle_type;
UINT8 m_shuffle_default;
UINT8 m_shuffle_active;
const UINT8 * m_shuffle_map;
devcb2_write8 m_irq_callback;
UINT8 m_irq_state;
UINT16 m_sound_irq_state;
UINT8 m_auto_ack;
UINT8 m_force_fifo_full;
UINT16 m_fifo[512];
UINT16 m_fifo_in;
UINT16 m_fifo_out;
UINT16 m_fifo_bytes;
offs_t m_fifo_force_buffer_empty_pc;
atari_cage_device *m_cage;
dcs_audio_device *m_dcs;
};
// device type definition
extern const device_type MIDWAY_IOASIC;
#define MCFG_MIDWAY_IOASIC_UPPER MCFG_MIDWAY_SERIAL_PIC_UPPER
#define MCFG_MIDWAY_IOASIC_YEAR_OFFS MCFG_MIDWAY_SERIAL_PIC2_YEAR_OFFS
#define MCFG_MIDWAY_IOASIC_SHUFFLE(_shuffle) \
midway_ioasic_device::static_set_shuffle(*device, _shuffle);
#define MCFG_MIDWAY_IOASIC_SHUFFLE_DEFAULT(_shuffle) \
midway_ioasic_device::static_set_shuffle_default(*device, _shuffle);
#define MCFG_MIDWAY_IOASIC_IRQ_CALLBACK(_write) \
devcb = &midway_ioasic_device::set_irqhandler_callback(*device, DEVCB2_##_write);
#define MCFG_MIDWAY_IOASIC_AUTO_ACK(_ack) \
midway_ioasic_device::static_set_auto_ack(*device, _ack);
enum
{
MIDWAY_IOASIC_STANDARD = 0,
@ -49,3 +212,5 @@ enum
MIDWAY_IOASIC_SFRUSHRK,
MIDWAY_IOASIC_HYPRDRIV
};
#endif

34
src/mame/machine/midwunit.c
View File

@ -12,7 +12,6 @@
#include "audio/dcs.h"
#include "includes/midtunit.h"
#include "includes/midwunit.h"
#include "midwayic.h"
/*************************************
*
@ -87,10 +86,10 @@ WRITE16_MEMBER(midwunit_state::midwunit_io_w)
logerror("%08X:Control W @ %05X = %04X\n", space.device().safe_pc(), offset, data);
/* bit 4 reset sound CPU */
dcs_reset_w(machine(), newword & 0x10);
m_dcs->reset_w(newword & 0x10);
/* bit 5 (active low) reset security chip */
midway_serial_pic_reset_w(newword & 0x20);
m_midway_serial_pic->reset_w(newword & 0x20);
break;
case 3:
@ -130,7 +129,7 @@ READ16_MEMBER(midwunit_state::midwunit_io_r)
return ioport(portnames[offset])->read();
case 4:
return (midway_serial_pic_status_r() << 12) | midwunit_sound_state_r(space,0,0xffff);
return (m_midway_serial_pic->status_r(space,0) << 12) | midwunit_sound_state_r(space,0,0xffff);
default:
logerror("%08X:Unknown I/O read from %d\n", space.device().safe_pc(), offset);
@ -151,9 +150,6 @@ void midwunit_state::init_wunit_generic()
{
/* register for state saving */
register_state_saving();
/* init sound */
dcs_init(machine());
}
@ -201,7 +197,7 @@ void midwunit_state::init_mk3_common()
init_wunit_generic();
/* serial prefixes 439, 528 */
midway_serial_pic_init(machine(), 528);
//midway_serial_pic_init(machine(), 528);
}
DRIVER_INIT_MEMBER(midwunit_state,mk3)
@ -240,7 +236,7 @@ DRIVER_INIT_MEMBER(midwunit_state,openice)
init_wunit_generic();
/* serial prefixes 438, 528 */
midway_serial_pic_init(machine(), 528);
//midway_serial_pic_init(machine(), 528);
}
@ -252,7 +248,7 @@ DRIVER_INIT_MEMBER(midwunit_state,nbahangt)
init_wunit_generic();
/* serial prefixes 459, 470, 528 */
midway_serial_pic_init(machine(), 528);
//midway_serial_pic_init(machine(), 528);
}
@ -316,7 +312,7 @@ DRIVER_INIT_MEMBER(midwunit_state,wwfmania)
m_maincpu->space(AS_PROGRAM).install_write_handler(0x01800000, 0x0180000f, write16_delegate(FUNC(midwunit_state::wwfmania_io_0_w),this));
/* serial prefixes 430, 528 */
midway_serial_pic_init(machine(), 528);
//midway_serial_pic_init(machine(), 528);
}
@ -328,7 +324,7 @@ DRIVER_INIT_MEMBER(midwunit_state,rmpgwt)
init_wunit_generic();
/* serial prefixes 465, 528 */
midway_serial_pic_init(machine(), 528);
//midway_serial_pic_init(machine(), 528);
}
@ -343,8 +339,8 @@ MACHINE_RESET_MEMBER(midwunit_state,midwunit)
int i;
/* reset sound */
dcs_reset_w(machine(), 1);
dcs_reset_w(machine(), 0);
m_dcs->reset_w(1);
m_dcs->reset_w(0);
/* reset I/O shuffling */
for (i = 0; i < 16; i++)
@ -361,14 +357,14 @@ MACHINE_RESET_MEMBER(midwunit_state,midwunit)
READ16_MEMBER(midwunit_state::midwunit_security_r)
{
return midway_serial_pic_r(space);
return m_midway_serial_pic->read(space,0);
}
WRITE16_MEMBER(midwunit_state::midwunit_security_w)
{
if (offset == 0 && ACCESSING_BITS_0_7)
midway_serial_pic_w(space, data);
m_midway_serial_pic->write(space, 0, data);
}
@ -383,13 +379,13 @@ READ16_MEMBER(midwunit_state::midwunit_sound_r)
{
logerror("%08X:Sound read\n", space.device().safe_pc());
return dcs_data_r(machine()) & 0xff;
return m_dcs->data_r() & 0xff;
}
READ16_MEMBER(midwunit_state::midwunit_sound_state_r)
{
return dcs_control_r(machine());
return m_dcs->control_r();
}
@ -406,6 +402,6 @@ WRITE16_MEMBER(midwunit_state::midwunit_sound_w)
if (ACCESSING_BITS_0_7)
{
logerror("%08X:Sound write = %04X\n", space.device().safe_pc(), data);
dcs_data_w(machine(), data & 0xff);
m_dcs->data_w(data & 0xff);
}
}

42
src/mame/machine/midxunit.c
View File

@ -15,11 +15,6 @@
#include "midwayic.h"
/* prototype */
static void midxunit_dcs_output_full(running_machine &machine, int state);
/*************************************
*
* State saving
@ -101,7 +96,7 @@ WRITE16_MEMBER(midxunit_state::midxunit_unknown_w)
int offs = offset / 0x40000;
if (offs == 1 && ACCESSING_BITS_0_7)
dcs_reset_w(machine(), data & 2);
m_dcs->reset_w(data & 2);
if (ACCESSING_BITS_0_7 && offset % 0x40000 == 0)
logerror("%08X:midxunit_unknown_w @ %d = %02X\n", space.device().safe_pc(), offs, data & 0xff);
@ -155,7 +150,7 @@ WRITE16_MEMBER(midxunit_state::midxunit_analog_select_w)
READ16_MEMBER(midxunit_state::midxunit_status_r)
{
/* low bit indicates whether the ADC is done reading the current input */
return (midway_serial_pic_status_r() << 1) | 1;
return (m_midway_serial_pic->status_r(space,0) << 1) | 1;
}
@ -166,12 +161,11 @@ READ16_MEMBER(midxunit_state::midxunit_status_r)
*
*************************************/
static void midxunit_dcs_output_full(running_machine &machine, int state)
WRITE_LINE_MEMBER(midxunit_state::midxunit_dcs_output_full)
{
midxunit_state *drvstate = machine.driver_data<midxunit_state>();
/* only signal if not in loopback state */
if (drvstate->m_uart[1] != 0x66)
drvstate->m_maincpu->set_input_line(1, state ? ASSERT_LINE : CLEAR_LINE);
if (m_uart[1] != 0x66)
m_maincpu->set_input_line(1, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -267,7 +261,7 @@ WRITE16_MEMBER(midxunit_state::midxunit_uart_w)
break;
case 5: /* register 5 write seems to reset things */
dcs_data_r(machine());
m_dcs->data_r();
break;
default: /* everyone else just stores themselves */
@ -294,16 +288,8 @@ DRIVER_INIT_MEMBER(midxunit_state,revx)
{
/* register for state saving */
register_state_saving();
/* init sound */
dcs_init(machine());
/* serial prefixes 419, 420 */
midway_serial_pic_init(machine(), 419);
}
/*************************************
*
* Machine init
@ -315,14 +301,14 @@ MACHINE_RESET_MEMBER(midxunit_state,midxunit)
int i;
/* reset sound */
dcs_reset_w(machine(), 1);
dcs_reset_w(machine(), 0);
m_dcs->reset_w(1);
m_dcs->reset_w(0);
/* reset I/O shuffling */
for (i = 0; i < 16; i++)
m_ioshuffle[i] = i % 8;
dcs_set_io_callbacks(midxunit_dcs_output_full, NULL);
m_dcs->set_io_callbacks(write_line_delegate(FUNC(midxunit_state::midxunit_dcs_output_full),this), write_line_delegate());
}
@ -335,7 +321,7 @@ MACHINE_RESET_MEMBER(midxunit_state,midxunit)
READ16_MEMBER(midxunit_state::midxunit_security_r)
{
return midway_serial_pic_r(space);
return m_midway_serial_pic->read(space,0);
}
WRITE16_MEMBER(midxunit_state::midxunit_security_w)
@ -348,7 +334,7 @@ WRITE16_MEMBER(midxunit_state::midxunit_security_w)
WRITE16_MEMBER(midxunit_state::midxunit_security_clock_w)
{
if (offset == 0 && ACCESSING_BITS_0_7)
midway_serial_pic_w(space, ((~data & 2) << 3) | m_security_bits);
m_midway_serial_pic->write(space, 0, ((~data & 2) << 3) | m_security_bits);
}
@ -363,13 +349,13 @@ READ16_MEMBER(midxunit_state::midxunit_sound_r)
{
logerror("%08X:Sound read\n", space.device().safe_pc());
return dcs_data_r(machine()) & 0xff;
return m_dcs->data_r() & 0xff;
}
READ16_MEMBER(midxunit_state::midxunit_sound_state_r)
{
return dcs_control_r(machine());
return m_dcs->control_r();
}
@ -386,6 +372,6 @@ WRITE16_MEMBER(midxunit_state::midxunit_sound_w)
if (ACCESSING_BITS_0_7)
{
logerror("%08X:Sound write = %04X\n", space.device().safe_pc(), data);
dcs_data_w(machine(), data & 0xff);
m_dcs->data_w(data & 0xff);
}
}

2
src/mame/mame.mak
View File

@ -615,6 +615,7 @@ $(MAMEOBJ)/shared.a: \
$(MACHINE)/segacrp2.o \
$(MACHINE)/ticket.o \
$(VIDEO)/avgdvg.o \
$(AUDIO)/dcs.o \
$(AUDIO)/decobsmt.o \
$(AUDIO)/segam1audio.o \
@ -1330,7 +1331,6 @@ $(MAMEOBJ)/midway.a: \
$(DRIVERS)/vegas.o $(DRIVERS)/wmg.o \
$(DRIVERS)/williams.o $(MACHINE)/williams.o $(AUDIO)/williams.o $(VIDEO)/williams.o \
$(MACHINE)/midwayic.o \
$(AUDIO)/dcs.o \
$(AUDIO)/gorf.o \
$(AUDIO)/midway.o \
$(AUDIO)/wow.o \