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mirror of https://github.com/holub/mame synced 2025-06-05 20:33:45 +03:00
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Quick and dirty split of most MC6801/MC6803/HD63701 features from base M6800 class (nw)

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The code remains generally archaic and awful and in need of a sweeping rewrite. At least one static variable is no more.
This commit is contained in:
AJR 2017-05-26 16:31:56 -04:00
parent 2b7d87317b
commit d1fb75b2e7
43 changed files with 1577 additions and 1491 deletions
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2
scripts/src/cpu.lua
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@ -1315,6 +1315,8 @@ if (CPUS["M6800"]~=null) then
files {
MAME_DIR .. "src/devices/cpu/m6800/m6800.cpp",
MAME_DIR .. "src/devices/cpu/m6800/m6800.h",
MAME_DIR .. "src/devices/cpu/m6800/m6801.cpp",
MAME_DIR .. "src/devices/cpu/m6800/m6801.h",
MAME_DIR .. "src/devices/cpu/m6800/6800ops.hxx",
MAME_DIR .. "src/devices/cpu/m6800/6800tbl.hxx",
}

2
src/devices/bus/adamnet/ddp.h
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@ -12,7 +12,7 @@
#pragma once
#include "adamnet.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "formats/adam_cas.h"
#include "imagedev/cassette.h"

2
src/devices/bus/adamnet/fdc.h
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@ -12,7 +12,7 @@
#pragma once
#include "adamnet.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "formats/adam_dsk.h"
#include "machine/wd_fdc.h"

2
src/devices/bus/adamnet/kb.h
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@ -12,7 +12,7 @@
#pragma once
#include "adamnet.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"

2
src/devices/bus/adamnet/printer.h
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@ -12,7 +12,7 @@
#pragma once
#include "adamnet.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"

2
src/devices/bus/adamnet/spi.h
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@ -14,7 +14,7 @@
#include "adamnet.h"
#include "bus/centronics/ctronics.h"
#include "bus/rs232/rs232.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/mc2661.h"

2
src/devices/bus/epson_sio/pf10.h
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@ -14,7 +14,7 @@
#pragma once
#include "epson_sio.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/upd765.h"

6
src/devices/cpu/m6800/6800ops.hxx
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@ -41,7 +41,7 @@ OP_HANDLER( illegl3 )
OP_HANDLER( trap )
{
logerror("m6800: illegal opcode: address %04X, op %02X\n",PC-1,(int) M_RDOP_ARG(PC-1)&0xFF);
TAKE_TRAP;
TAKE_TRAP();
}
/* $00 ILLEGAL */
@ -219,7 +219,7 @@ OP_HANDLER( slp )
{
/* wait for next IRQ (same as waiting of wai) */
m_wai_state |= M6800_SLP;
EAT_CYCLES;
EAT_CYCLES();
}
/* $1b ABA inherent ***** */
@ -459,7 +459,7 @@ OP_HANDLER( wai )
PUSHBYTE(B);
PUSHBYTE(CC);
CHECK_IRQ_LINES();
if (m_wai_state & M6800_WAI) EAT_CYCLES;
if (m_wai_state & M6800_WAI) EAT_CYCLES();
}
/* $3f SWI absolute indirect ----- */

70
src/devices/cpu/m6800/6800tbl.hxx
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@ -35,76 +35,6 @@ const m6800_cpu_device::op_func m6800_cpu_device::m6800_insn[0x100] = {
&m6800_cpu_device::eorb_ex,&m6800_cpu_device::adcb_ex,&m6800_cpu_device::orb_ex, &m6800_cpu_device::addb_ex,&m6800_cpu_device::illegl3,&m6800_cpu_device::illegl3,&m6800_cpu_device::ldx_ex, &m6800_cpu_device::stx_ex
};
const m6800_cpu_device::op_func m6800_cpu_device::m6803_insn[0x100] = {
&m6800_cpu_device::illegl1,&m6800_cpu_device::nop, &m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::lsrd, &m6800_cpu_device::asld, &m6800_cpu_device::tap, &m6800_cpu_device::tpa,
&m6800_cpu_device::inx, &m6800_cpu_device::dex, &m6800_cpu_device::clv, &m6800_cpu_device::sev, &m6800_cpu_device::clc, &m6800_cpu_device::sec, &m6800_cpu_device::cli, &m6800_cpu_device::sei,
&m6800_cpu_device::sba, &m6800_cpu_device::cba, &m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::tab, &m6800_cpu_device::tba,
&m6800_cpu_device::illegl1,&m6800_cpu_device::daa, &m6800_cpu_device::illegl1,&m6800_cpu_device::aba, &m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,
&m6800_cpu_device::bra, &m6800_cpu_device::brn, &m6800_cpu_device::bhi, &m6800_cpu_device::bls, &m6800_cpu_device::bcc, &m6800_cpu_device::bcs, &m6800_cpu_device::bne, &m6800_cpu_device::beq,
&m6800_cpu_device::bvc, &m6800_cpu_device::bvs, &m6800_cpu_device::bpl, &m6800_cpu_device::bmi, &m6800_cpu_device::bge, &m6800_cpu_device::blt, &m6800_cpu_device::bgt, &m6800_cpu_device::ble,
&m6800_cpu_device::tsx, &m6800_cpu_device::ins, &m6800_cpu_device::pula, &m6800_cpu_device::pulb, &m6800_cpu_device::des, &m6800_cpu_device::txs, &m6800_cpu_device::psha, &m6800_cpu_device::pshb,
&m6800_cpu_device::pulx, &m6800_cpu_device::rts, &m6800_cpu_device::abx, &m6800_cpu_device::rti, &m6800_cpu_device::pshx, &m6800_cpu_device::mul, &m6800_cpu_device::wai, &m6800_cpu_device::swi,
&m6800_cpu_device::nega, &m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::coma, &m6800_cpu_device::lsra, &m6800_cpu_device::illegl1,&m6800_cpu_device::rora, &m6800_cpu_device::asra,
&m6800_cpu_device::asla, &m6800_cpu_device::rola, &m6800_cpu_device::deca, &m6800_cpu_device::illegl1,&m6800_cpu_device::inca, &m6800_cpu_device::tsta, &m6800_cpu_device::illegl1,&m6800_cpu_device::clra,
&m6800_cpu_device::negb, &m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::comb, &m6800_cpu_device::lsrb, &m6800_cpu_device::illegl1,&m6800_cpu_device::rorb, &m6800_cpu_device::asrb,
&m6800_cpu_device::aslb, &m6800_cpu_device::rolb, &m6800_cpu_device::decb, &m6800_cpu_device::illegl1,&m6800_cpu_device::incb, &m6800_cpu_device::tstb, &m6800_cpu_device::illegl1,&m6800_cpu_device::clrb,
&m6800_cpu_device::neg_ix, &m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::com_ix, &m6800_cpu_device::lsr_ix, &m6800_cpu_device::illegl1,&m6800_cpu_device::ror_ix, &m6800_cpu_device::asr_ix,
&m6800_cpu_device::asl_ix, &m6800_cpu_device::rol_ix, &m6800_cpu_device::dec_ix, &m6800_cpu_device::illegl1,&m6800_cpu_device::inc_ix, &m6800_cpu_device::tst_ix, &m6800_cpu_device::jmp_ix, &m6800_cpu_device::clr_ix,
&m6800_cpu_device::neg_ex, &m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::com_ex, &m6800_cpu_device::lsr_ex, &m6800_cpu_device::illegl1,&m6800_cpu_device::ror_ex, &m6800_cpu_device::asr_ex,
&m6800_cpu_device::asl_ex, &m6800_cpu_device::rol_ex, &m6800_cpu_device::dec_ex, &m6800_cpu_device::illegl1,&m6800_cpu_device::inc_ex, &m6800_cpu_device::tst_ex, &m6800_cpu_device::jmp_ex, &m6800_cpu_device::clr_ex,
&m6800_cpu_device::suba_im,&m6800_cpu_device::cmpa_im,&m6800_cpu_device::sbca_im,&m6800_cpu_device::subd_im,&m6800_cpu_device::anda_im,&m6800_cpu_device::bita_im,&m6800_cpu_device::lda_im, &m6800_cpu_device::sta_im,
&m6800_cpu_device::eora_im,&m6800_cpu_device::adca_im,&m6800_cpu_device::ora_im, &m6800_cpu_device::adda_im,&m6800_cpu_device::cpx_im ,&m6800_cpu_device::bsr, &m6800_cpu_device::lds_im, &m6800_cpu_device::sts_im,
&m6800_cpu_device::suba_di,&m6800_cpu_device::cmpa_di,&m6800_cpu_device::sbca_di,&m6800_cpu_device::subd_di,&m6800_cpu_device::anda_di,&m6800_cpu_device::bita_di,&m6800_cpu_device::lda_di, &m6800_cpu_device::sta_di,
&m6800_cpu_device::eora_di,&m6800_cpu_device::adca_di,&m6800_cpu_device::ora_di, &m6800_cpu_device::adda_di,&m6800_cpu_device::cpx_di ,&m6800_cpu_device::jsr_di, &m6800_cpu_device::lds_di, &m6800_cpu_device::sts_di,
&m6800_cpu_device::suba_ix,&m6800_cpu_device::cmpa_ix,&m6800_cpu_device::sbca_ix,&m6800_cpu_device::subd_ix,&m6800_cpu_device::anda_ix,&m6800_cpu_device::bita_ix,&m6800_cpu_device::lda_ix, &m6800_cpu_device::sta_ix,
&m6800_cpu_device::eora_ix,&m6800_cpu_device::adca_ix,&m6800_cpu_device::ora_ix, &m6800_cpu_device::adda_ix,&m6800_cpu_device::cpx_ix ,&m6800_cpu_device::jsr_ix, &m6800_cpu_device::lds_ix, &m6800_cpu_device::sts_ix,
&m6800_cpu_device::suba_ex,&m6800_cpu_device::cmpa_ex,&m6800_cpu_device::sbca_ex,&m6800_cpu_device::subd_ex,&m6800_cpu_device::anda_ex,&m6800_cpu_device::bita_ex,&m6800_cpu_device::lda_ex, &m6800_cpu_device::sta_ex,
&m6800_cpu_device::eora_ex,&m6800_cpu_device::adca_ex,&m6800_cpu_device::ora_ex, &m6800_cpu_device::adda_ex,&m6800_cpu_device::cpx_ex ,&m6800_cpu_device::jsr_ex, &m6800_cpu_device::lds_ex, &m6800_cpu_device::sts_ex,
&m6800_cpu_device::subb_im,&m6800_cpu_device::cmpb_im,&m6800_cpu_device::sbcb_im,&m6800_cpu_device::addd_im,&m6800_cpu_device::andb_im,&m6800_cpu_device::bitb_im,&m6800_cpu_device::ldb_im, &m6800_cpu_device::stb_im,
&m6800_cpu_device::eorb_im,&m6800_cpu_device::adcb_im,&m6800_cpu_device::orb_im, &m6800_cpu_device::addb_im,&m6800_cpu_device::ldd_im, &m6800_cpu_device::std_im, &m6800_cpu_device::ldx_im, &m6800_cpu_device::stx_im,
&m6800_cpu_device::subb_di,&m6800_cpu_device::cmpb_di,&m6800_cpu_device::sbcb_di,&m6800_cpu_device::addd_di,&m6800_cpu_device::andb_di,&m6800_cpu_device::bitb_di,&m6800_cpu_device::ldb_di, &m6800_cpu_device::stb_di,
&m6800_cpu_device::eorb_di,&m6800_cpu_device::adcb_di,&m6800_cpu_device::orb_di, &m6800_cpu_device::addb_di,&m6800_cpu_device::ldd_di, &m6800_cpu_device::std_di, &m6800_cpu_device::ldx_di, &m6800_cpu_device::stx_di,
&m6800_cpu_device::subb_ix,&m6800_cpu_device::cmpb_ix,&m6800_cpu_device::sbcb_ix,&m6800_cpu_device::addd_ix,&m6800_cpu_device::andb_ix,&m6800_cpu_device::bitb_ix,&m6800_cpu_device::ldb_ix, &m6800_cpu_device::stb_ix,
&m6800_cpu_device::eorb_ix,&m6800_cpu_device::adcb_ix,&m6800_cpu_device::orb_ix, &m6800_cpu_device::addb_ix,&m6800_cpu_device::ldd_ix, &m6800_cpu_device::std_ix, &m6800_cpu_device::ldx_ix, &m6800_cpu_device::stx_ix,
&m6800_cpu_device::subb_ex,&m6800_cpu_device::cmpb_ex,&m6800_cpu_device::sbcb_ex,&m6800_cpu_device::addd_ex,&m6800_cpu_device::andb_ex,&m6800_cpu_device::bitb_ex,&m6800_cpu_device::ldb_ex, &m6800_cpu_device::stb_ex,
&m6800_cpu_device::eorb_ex,&m6800_cpu_device::adcb_ex,&m6800_cpu_device::orb_ex, &m6800_cpu_device::addb_ex,&m6800_cpu_device::ldd_ex, &m6800_cpu_device::std_ex, &m6800_cpu_device::ldx_ex, &m6800_cpu_device::stx_ex
};
const m6800_cpu_device::op_func m6800_cpu_device::hd63701_insn[0x100] = {
&m6800_cpu_device::trap, &m6800_cpu_device::nop, &m6800_cpu_device::trap, &m6800_cpu_device::trap, &m6800_cpu_device::lsrd, &m6800_cpu_device::asld, &m6800_cpu_device::tap, &m6800_cpu_device::tpa,
&m6800_cpu_device::inx, &m6800_cpu_device::dex, &m6800_cpu_device::clv, &m6800_cpu_device::sev, &m6800_cpu_device::clc, &m6800_cpu_device::sec, &m6800_cpu_device::cli, &m6800_cpu_device::sei,
&m6800_cpu_device::sba, &m6800_cpu_device::cba, &m6800_cpu_device::undoc1, &m6800_cpu_device::undoc2, &m6800_cpu_device::trap, &m6800_cpu_device::trap, &m6800_cpu_device::tab, &m6800_cpu_device::tba,
&m6800_cpu_device::xgdx, &m6800_cpu_device::daa, &m6800_cpu_device::slp, &m6800_cpu_device::aba, &m6800_cpu_device::trap, &m6800_cpu_device::trap, &m6800_cpu_device::trap, &m6800_cpu_device::trap,
&m6800_cpu_device::bra, &m6800_cpu_device::brn, &m6800_cpu_device::bhi, &m6800_cpu_device::bls, &m6800_cpu_device::bcc, &m6800_cpu_device::bcs, &m6800_cpu_device::bne, &m6800_cpu_device::beq,
&m6800_cpu_device::bvc, &m6800_cpu_device::bvs, &m6800_cpu_device::bpl, &m6800_cpu_device::bmi, &m6800_cpu_device::bge, &m6800_cpu_device::blt, &m6800_cpu_device::bgt, &m6800_cpu_device::ble,
&m6800_cpu_device::tsx, &m6800_cpu_device::ins, &m6800_cpu_device::pula, &m6800_cpu_device::pulb, &m6800_cpu_device::des, &m6800_cpu_device::txs, &m6800_cpu_device::psha, &m6800_cpu_device::pshb,
&m6800_cpu_device::pulx, &m6800_cpu_device::rts, &m6800_cpu_device::abx, &m6800_cpu_device::rti, &m6800_cpu_device::pshx, &m6800_cpu_device::mul, &m6800_cpu_device::wai, &m6800_cpu_device::swi,
&m6800_cpu_device::nega, &m6800_cpu_device::trap, &m6800_cpu_device::trap, &m6800_cpu_device::coma, &m6800_cpu_device::lsra, &m6800_cpu_device::trap, &m6800_cpu_device::rora, &m6800_cpu_device::asra,
&m6800_cpu_device::asla, &m6800_cpu_device::rola, &m6800_cpu_device::deca, &m6800_cpu_device::trap, &m6800_cpu_device::inca, &m6800_cpu_device::tsta, &m6800_cpu_device::trap, &m6800_cpu_device::clra,
&m6800_cpu_device::negb, &m6800_cpu_device::trap, &m6800_cpu_device::trap, &m6800_cpu_device::comb, &m6800_cpu_device::lsrb, &m6800_cpu_device::trap, &m6800_cpu_device::rorb, &m6800_cpu_device::asrb,
&m6800_cpu_device::aslb, &m6800_cpu_device::rolb, &m6800_cpu_device::decb, &m6800_cpu_device::trap, &m6800_cpu_device::incb, &m6800_cpu_device::tstb, &m6800_cpu_device::trap, &m6800_cpu_device::clrb,
&m6800_cpu_device::neg_ix, &m6800_cpu_device::aim_ix, &m6800_cpu_device::oim_ix, &m6800_cpu_device::com_ix, &m6800_cpu_device::lsr_ix, &m6800_cpu_device::eim_ix, &m6800_cpu_device::ror_ix, &m6800_cpu_device::asr_ix,
&m6800_cpu_device::asl_ix, &m6800_cpu_device::rol_ix, &m6800_cpu_device::dec_ix, &m6800_cpu_device::tim_ix, &m6800_cpu_device::inc_ix, &m6800_cpu_device::tst_ix, &m6800_cpu_device::jmp_ix, &m6800_cpu_device::clr_ix,
&m6800_cpu_device::neg_ex, &m6800_cpu_device::aim_di, &m6800_cpu_device::oim_di, &m6800_cpu_device::com_ex, &m6800_cpu_device::lsr_ex, &m6800_cpu_device::eim_di, &m6800_cpu_device::ror_ex, &m6800_cpu_device::asr_ex,
&m6800_cpu_device::asl_ex, &m6800_cpu_device::rol_ex, &m6800_cpu_device::dec_ex, &m6800_cpu_device::tim_di, &m6800_cpu_device::inc_ex, &m6800_cpu_device::tst_ex, &m6800_cpu_device::jmp_ex, &m6800_cpu_device::clr_ex,
&m6800_cpu_device::suba_im,&m6800_cpu_device::cmpa_im,&m6800_cpu_device::sbca_im,&m6800_cpu_device::subd_im,&m6800_cpu_device::anda_im,&m6800_cpu_device::bita_im,&m6800_cpu_device::lda_im, &m6800_cpu_device::sta_im,
&m6800_cpu_device::eora_im,&m6800_cpu_device::adca_im,&m6800_cpu_device::ora_im, &m6800_cpu_device::adda_im,&m6800_cpu_device::cpx_im ,&m6800_cpu_device::bsr, &m6800_cpu_device::lds_im, &m6800_cpu_device::sts_im,
&m6800_cpu_device::suba_di,&m6800_cpu_device::cmpa_di,&m6800_cpu_device::sbca_di,&m6800_cpu_device::subd_di,&m6800_cpu_device::anda_di,&m6800_cpu_device::bita_di,&m6800_cpu_device::lda_di, &m6800_cpu_device::sta_di,
&m6800_cpu_device::eora_di,&m6800_cpu_device::adca_di,&m6800_cpu_device::ora_di, &m6800_cpu_device::adda_di,&m6800_cpu_device::cpx_di ,&m6800_cpu_device::jsr_di, &m6800_cpu_device::lds_di, &m6800_cpu_device::sts_di,
&m6800_cpu_device::suba_ix,&m6800_cpu_device::cmpa_ix,&m6800_cpu_device::sbca_ix,&m6800_cpu_device::subd_ix,&m6800_cpu_device::anda_ix,&m6800_cpu_device::bita_ix,&m6800_cpu_device::lda_ix, &m6800_cpu_device::sta_ix,
&m6800_cpu_device::eora_ix,&m6800_cpu_device::adca_ix,&m6800_cpu_device::ora_ix, &m6800_cpu_device::adda_ix,&m6800_cpu_device::cpx_ix ,&m6800_cpu_device::jsr_ix, &m6800_cpu_device::lds_ix, &m6800_cpu_device::sts_ix,
&m6800_cpu_device::suba_ex,&m6800_cpu_device::cmpa_ex,&m6800_cpu_device::sbca_ex,&m6800_cpu_device::subd_ex,&m6800_cpu_device::anda_ex,&m6800_cpu_device::bita_ex,&m6800_cpu_device::lda_ex, &m6800_cpu_device::sta_ex,
&m6800_cpu_device::eora_ex,&m6800_cpu_device::adca_ex,&m6800_cpu_device::ora_ex, &m6800_cpu_device::adda_ex,&m6800_cpu_device::cpx_ex ,&m6800_cpu_device::jsr_ex, &m6800_cpu_device::lds_ex, &m6800_cpu_device::sts_ex,
&m6800_cpu_device::subb_im,&m6800_cpu_device::cmpb_im,&m6800_cpu_device::sbcb_im,&m6800_cpu_device::addd_im,&m6800_cpu_device::andb_im,&m6800_cpu_device::bitb_im,&m6800_cpu_device::ldb_im, &m6800_cpu_device::stb_im,
&m6800_cpu_device::eorb_im,&m6800_cpu_device::adcb_im,&m6800_cpu_device::orb_im, &m6800_cpu_device::addb_im,&m6800_cpu_device::ldd_im, &m6800_cpu_device::std_im, &m6800_cpu_device::ldx_im, &m6800_cpu_device::stx_im,
&m6800_cpu_device::subb_di,&m6800_cpu_device::cmpb_di,&m6800_cpu_device::sbcb_di,&m6800_cpu_device::addd_di,&m6800_cpu_device::andb_di,&m6800_cpu_device::bitb_di,&m6800_cpu_device::ldb_di, &m6800_cpu_device::stb_di,
&m6800_cpu_device::eorb_di,&m6800_cpu_device::adcb_di,&m6800_cpu_device::orb_di, &m6800_cpu_device::addb_di,&m6800_cpu_device::ldd_di, &m6800_cpu_device::std_di, &m6800_cpu_device::ldx_di, &m6800_cpu_device::stx_di,
&m6800_cpu_device::subb_ix,&m6800_cpu_device::cmpb_ix,&m6800_cpu_device::sbcb_ix,&m6800_cpu_device::addd_ix,&m6800_cpu_device::andb_ix,&m6800_cpu_device::bitb_ix,&m6800_cpu_device::ldb_ix, &m6800_cpu_device::stb_ix,
&m6800_cpu_device::eorb_ix,&m6800_cpu_device::adcb_ix,&m6800_cpu_device::orb_ix, &m6800_cpu_device::addb_ix,&m6800_cpu_device::ldd_ix, &m6800_cpu_device::std_ix, &m6800_cpu_device::ldx_ix, &m6800_cpu_device::stx_ix,
&m6800_cpu_device::subb_ex,&m6800_cpu_device::cmpb_ex,&m6800_cpu_device::sbcb_ex,&m6800_cpu_device::addd_ex,&m6800_cpu_device::andb_ex,&m6800_cpu_device::bitb_ex,&m6800_cpu_device::ldb_ex, &m6800_cpu_device::stb_ex,
&m6800_cpu_device::eorb_ex,&m6800_cpu_device::adcb_ex,&m6800_cpu_device::orb_ex, &m6800_cpu_device::addb_ex,&m6800_cpu_device::ldd_ex, &m6800_cpu_device::std_ex, &m6800_cpu_device::ldx_ex, &m6800_cpu_device::stx_ex
};
const m6800_cpu_device::op_func m6800_cpu_device::nsc8105_insn[0x100] = {
// 0
&m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::nop, &m6800_cpu_device::illegl1,&m6800_cpu_device::illegl1,&m6800_cpu_device::tap, &m6800_cpu_device::illegl1,&m6800_cpu_device::tpa,

1211
src/devices/cpu/m6800/m6800.cpp
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File diff suppressed because it is too large Load Diff

190
src/devices/cpu/m6800/m6800.h
View File

@ -16,13 +16,7 @@ enum
enum
{
M6800_IRQ_LINE = 0, /* IRQ line number */
M6801_TIN_LINE, /* P20/Tin Input Capture line (eddge sense) */
/* Active eddge is selecrable by internal reg. */
/* raise eddge : CLEAR_LINE -> ASSERT_LINE */
/* fall eddge : ASSERT_LINE -> CLEAR_LINE */
/* it is usuali to use PULSE_LINE state */
M6801_SC1_LINE
M6800_IRQ_LINE = 0 /* IRQ line number */
};
enum
@ -30,47 +24,11 @@ enum
M6802_IRQ_LINE = M6800_IRQ_LINE
};
enum
{
M6803_IRQ_LINE = M6800_IRQ_LINE
};
enum
{
M6808_IRQ_LINE = M6800_IRQ_LINE
};
enum
{
HD6301_IRQ_LINE = M6800_IRQ_LINE
};
enum
{
M6801_MODE_0 = 0,
M6801_MODE_1,
M6801_MODE_2,
M6801_MODE_3,
M6801_MODE_4,
M6801_MODE_5,
M6801_MODE_6,
M6801_MODE_7
};
enum
{
M6801_PORT1 = 0x100,
M6801_PORT2,
M6801_PORT3,
M6801_PORT4
};
#define MCFG_M6801_SC2(_devcb) \
devcb = &m6800_cpu_device::set_out_sc2_func(*device, DEVCB_##_devcb);
#define MCFG_M6801_SER_TX(_devcb) \
devcb = &m6800_cpu_device::set_out_sertx_func(*device, DEVCB_##_devcb);
class m6800_cpu_device : public cpu_device
{
public:
@ -79,15 +37,14 @@ public:
// construction/destruction
m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_out_sc2_func(device_t &device, _Object object) { return downcast<m6800_cpu_device &>(device).m_out_sc2_func.set_callback(object); }
template<class _Object> static devcb_base &set_out_sertx_func(device_t &device, _Object object) { return downcast<m6800_cpu_device &>(device).m_out_sertx_func.set_callback(object); }
DECLARE_READ8_MEMBER( m6801_io_r );
DECLARE_WRITE8_MEMBER( m6801_io_w );
protected:
m6800_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, bool has_io, int clock_divider, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal);
enum
{
M6800_WAI = 8, /* set when WAI is waiting for an interrupt */
M6800_SLP = 0x10 /* HD63701 only */
};
m6800_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal);
// device-level overrides
virtual void device_start() override;
@ -115,10 +72,6 @@ protected:
address_space_config m_program_config;
address_space_config m_decrypted_opcodes_config;
address_space_config m_io_config;
bool m_has_io;
devcb_write_line m_out_sc2_func;
devcb_write_line m_out_sertx_func;
PAIR m_ppc; /* Previous program counter */
PAIR m_pc; /* Program counter */
@ -130,74 +83,34 @@ protected:
uint8_t m_nmi_state; /* NMI line state */
uint8_t m_nmi_pending; /* NMI pending */
uint8_t m_irq_state[3]; /* IRQ line state [IRQ1,TIN,SC1] */
uint8_t m_ic_eddge; /* InputCapture eddge , b.0=fall,b.1=raise */
int m_sc1_state;
/* Memory spaces */
address_space *m_program, *m_decrypted_opcodes;
direct_read_data *m_direct, *m_decrypted_opcodes_direct;
address_space *m_io;
const op_func *m_insn;
const uint8_t *m_cycles; /* clock cycle of instruction table */
/* internal registers */
uint8_t m_port1_ddr;
uint8_t m_port2_ddr;
uint8_t m_port3_ddr;
uint8_t m_port4_ddr;
uint8_t m_port1_data;
uint8_t m_port2_data;
uint8_t m_port3_data;
uint8_t m_port4_data;
uint8_t m_p3csr; // Port 3 Control/Status Register
uint8_t m_tcsr; /* Timer Control and Status Register */
uint8_t m_pending_tcsr; /* pending IRQ flag for clear IRQflag process */
uint8_t m_irq2; /* IRQ2 flags */
uint8_t m_ram_ctrl;
PAIR m_counter; /* free running counter */
PAIR m_output_compare; /* output compare */
uint16_t m_input_capture; /* input capture */
int m_p3csr_is3_flag_read;
int m_port3_latched;
int m_clock_divider;
uint8_t m_trcsr, m_rmcr, m_rdr, m_tdr, m_rsr, m_tsr;
int m_rxbits, m_txbits, m_txstate, m_trcsr_read_tdre, m_trcsr_read_orfe, m_trcsr_read_rdrf, m_tx, m_ext_serclock;
bool m_use_ext_serclock;
int m_port2_written;
int m_icount;
int m_latch09;
PAIR m_timer_over;
emu_timer *m_sci_timer;
PAIR m_ea; /* effective address */
static const uint8_t flags8i[256];
static const uint8_t flags8d[256];
static const uint8_t cycles_6800[256];
static const uint8_t cycles_6803[256];
static const uint8_t cycles_63701[256];
static const uint8_t cycles_nsc8105[256];
static const op_func m6800_insn[256];
static const op_func m6803_insn[256];
static const op_func hd63701_insn[256];
static const op_func nsc8105_insn[256];
uint32_t RM16(uint32_t Addr );
void WM16(uint32_t Addr, PAIR *p );
void enter_interrupt(const char *message,uint16_t irq_vector);
void m6800_check_irq2();
virtual void m6800_check_irq2() { }
void CHECK_IRQ_LINES();
void check_timer_event();
void increment_counter(int amount);
void set_rmcr(uint8_t data);
void write_port2();
int m6800_rx();
void serial_transmit();
void serial_receive();
TIMER_CALLBACK_MEMBER( sci_tick );
void set_os3(int state);
virtual void increment_counter(int amount);
virtual void EAT_CYCLES();
virtual void CLEANUP_COUNTERS() { }
virtual void TAKE_TRAP() { }
void aba();
void abx();
@ -451,22 +364,6 @@ protected:
};
class m6801_cpu_device : public m6800_cpu_device
{
public:
m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void m6801_clock_serial();
protected:
m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal = nullptr);
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class m6802_cpu_device : public m6800_cpu_device
{
public:
@ -481,16 +378,6 @@ protected:
};
class m6803_cpu_device : public m6801_cpu_device
{
public:
m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class m6808_cpu_device : public m6802_cpu_device
{
public:
@ -501,28 +388,6 @@ protected:
};
class hd6301_cpu_device : public m6801_cpu_device
{
public:
hd6301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class hd63701_cpu_device : public m6801_cpu_device
{
public:
hd63701_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class nsc8105_cpu_device : public m6802_cpu_device
{
public:
@ -533,38 +398,9 @@ protected:
};
// DP-40 package: HD6303RP, HD63A03RP, HD63B03RP,
// FP-54 package: HD6303RF, HD63A03RF, HD63B03RF,
// CG-40 package: HD6303RCG, HD63A03RCG, HD63B03RCG,
// Not fully emulated yet
class hd6303r_cpu_device : public hd6301_cpu_device
{
public:
hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// DP-64S package: HD6303YP, HD63A03YP, HD63B03YP, HD63C03YP
// FP-64 package: HD6303YF, HD63A03YF, HD63B03YF, HD63C03YF
// FP-64A package: HD6303YH, HD63A03YH, HD63B03YH, HD63C03YH
// CP-68 package: HD6303YCP, HD63A03YCP, HD63B03YCP, HD63C03YCP
// Not fully emulated yet
class hd6303y_cpu_device : public hd6301_cpu_device
{
public:
hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
DECLARE_DEVICE_TYPE(M6800, m6800_cpu_device)
DECLARE_DEVICE_TYPE(M6801, m6801_cpu_device)
DECLARE_DEVICE_TYPE(M6802, m6802_cpu_device)
DECLARE_DEVICE_TYPE(M6803, m6803_cpu_device)
DECLARE_DEVICE_TYPE(M6808, m6808_cpu_device)
DECLARE_DEVICE_TYPE(HD6301, hd6301_cpu_device)
DECLARE_DEVICE_TYPE(HD63701, hd63701_cpu_device)
DECLARE_DEVICE_TYPE(NSC8105, nsc8105_cpu_device)
DECLARE_DEVICE_TYPE(HD6303R, hd6303r_cpu_device)
DECLARE_DEVICE_TYPE(HD6303Y, hd6303y_cpu_device)
#endif // MAME_CPU_M6800_M6800_H

1296
src/devices/cpu/m6800/m6801.cpp Normal file
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File diff suppressed because it is too large Load Diff

219
src/devices/cpu/m6800/m6801.h Normal file
View File

@ -0,0 +1,219 @@
// license:BSD-3-Clause
// copyright-holders:Aaron Giles
#ifndef MAME_CPU_M6800_M6801_H
#define MAME_CPU_M6800_M6801_H
#pragma once
#include "cpu/m6800/m6800.h"
enum
{
M6801_IRQ_LINE = M6800_IRQ_LINE,
M6801_TIN_LINE, /* P20/Tin Input Capture line (eddge sense) */
/* Active eddge is selecrable by internal reg. */
/* raise eddge : CLEAR_LINE -> ASSERT_LINE */
/* fall eddge : ASSERT_LINE -> CLEAR_LINE */
/* it is usuali to use PULSE_LINE state */
M6801_SC1_LINE
};
enum
{
M6803_IRQ_LINE = M6800_IRQ_LINE
};
enum
{
HD6301_IRQ_LINE = M6800_IRQ_LINE
};
enum
{
M6801_MODE_0 = 0,
M6801_MODE_1,
M6801_MODE_2,
M6801_MODE_3,
M6801_MODE_4,
M6801_MODE_5,
M6801_MODE_6,
M6801_MODE_7
};
enum
{
M6801_PORT1 = 0x100,
M6801_PORT2,
M6801_PORT3,
M6801_PORT4
};
#define MCFG_M6801_SC2(_devcb) \
devcb = &m6801_cpu_device::set_out_sc2_func(*device, DEVCB_##_devcb);
#define MCFG_M6801_SER_TX(_devcb) \
devcb = &m6801_cpu_device::set_out_sertx_func(*device, DEVCB_##_devcb);
class m6801_cpu_device : public m6800_cpu_device
{
public:
m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
template<class _Object> static devcb_base &set_out_sc2_func(device_t &device, _Object object) { return downcast<m6801_cpu_device &>(device).m_out_sc2_func.set_callback(object); }
template<class _Object> static devcb_base &set_out_sertx_func(device_t &device, _Object object) { return downcast<m6801_cpu_device &>(device).m_out_sertx_func.set_callback(object); }
DECLARE_READ8_MEMBER( m6801_io_r );
DECLARE_WRITE8_MEMBER( m6801_io_w );
void m6801_clock_serial();
protected:
m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal = nullptr);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return (clocks + 4 - 1) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return (cycles * 4); }
virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override;
// device_disasm_interface overrides
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_io_config;
devcb_write_line m_out_sc2_func;
devcb_write_line m_out_sertx_func;
address_space *m_io;
/* internal registers */
uint8_t m_port1_ddr;
uint8_t m_port2_ddr;
uint8_t m_port3_ddr;
uint8_t m_port4_ddr;
uint8_t m_port1_data;
uint8_t m_port2_data;
uint8_t m_port3_data;
uint8_t m_port4_data;
uint8_t m_p3csr; // Port 3 Control/Status Register
uint8_t m_tcsr; /* Timer Control and Status Register */
uint8_t m_pending_tcsr; /* pending IRQ flag for clear IRQflag process */
uint8_t m_irq2; /* IRQ2 flags */
uint8_t m_ram_ctrl;
PAIR m_counter; /* free running counter */
PAIR m_output_compare; /* output compare */
uint16_t m_input_capture; /* input capture */
int m_p3csr_is3_flag_read;
int m_port3_latched;
uint8_t m_trcsr, m_rmcr, m_rdr, m_tdr, m_rsr, m_tsr;
int m_rxbits, m_txbits, m_txstate, m_trcsr_read_tdre, m_trcsr_read_orfe, m_trcsr_read_rdrf, m_tx, m_ext_serclock;
bool m_use_ext_serclock;
int m_port2_written;
int m_latch09;
PAIR m_timer_over;
emu_timer *m_sci_timer;
/* point of next timer event */
uint32_t m_timer_next;
int m_sc1_state;
static const uint8_t cycles_6803[256];
static const uint8_t cycles_63701[256];
static const op_func m6803_insn[256];
static const op_func hd63701_insn[256];
virtual void m6800_check_irq2() override;
virtual void increment_counter(int amount) override;
virtual void EAT_CYCLES() override;
virtual void CLEANUP_COUNTERS() override;
void check_timer_event();
void set_rmcr(uint8_t data);
void write_port2();
int m6800_rx();
void serial_transmit();
void serial_receive();
TIMER_CALLBACK_MEMBER( sci_tick );
void set_os3(int state);
};
class m6803_cpu_device : public m6801_cpu_device
{
public:
m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class hd6301_cpu_device : public m6801_cpu_device
{
public:
hd6301_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
};
class hd63701_cpu_device : public m6801_cpu_device
{
public:
hd63701_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual offs_t disasm_disassemble(std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
virtual void TAKE_TRAP() override;
};
// DP-40 package: HD6303RP, HD63A03RP, HD63B03RP,
// FP-54 package: HD6303RF, HD63A03RF, HD63B03RF,
// CG-40 package: HD6303RCG, HD63A03RCG, HD63B03RCG,
// Not fully emulated yet
class hd6303r_cpu_device : public hd6301_cpu_device
{
public:
hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// DP-64S package: HD6303YP, HD63A03YP, HD63B03YP, HD63C03YP
// FP-64 package: HD6303YF, HD63A03YF, HD63B03YF, HD63C03YF
// FP-64A package: HD6303YH, HD63A03YH, HD63B03YH, HD63C03YH
// CP-68 package: HD6303YCP, HD63A03YCP, HD63B03YCP, HD63C03YCP
// Not fully emulated yet
class hd6303y_cpu_device : public hd6301_cpu_device
{
public:
hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
DECLARE_DEVICE_TYPE(M6801, m6801_cpu_device)
DECLARE_DEVICE_TYPE(M6803, m6803_cpu_device)
DECLARE_DEVICE_TYPE(HD6301, hd6301_cpu_device)
DECLARE_DEVICE_TYPE(HD63701, hd63701_cpu_device)
DECLARE_DEVICE_TYPE(HD6303R, hd6303r_cpu_device)
DECLARE_DEVICE_TYPE(HD6303Y, hd6303y_cpu_device)
#endif // MAME_CPU_M6800_M6801_H

2
src/devices/machine/mpu401.h
View File

@ -5,7 +5,7 @@
#pragma once
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#define MCFG_MPU401_ADD(tag, irqf) \
MCFG_DEVICE_ADD((tag), MPU401, 0) \

2
src/mame/audio/irem.cpp
View File

@ -9,7 +9,7 @@
#include "emu.h"
#include "audio/irem.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "sound/discrete.h"
#include "speaker.h"

2
src/mame/drivers/acesp.cpp
View File

@ -17,7 +17,7 @@
#include "emu.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/6821pia.h"
class ace_sp_state : public driver_device

2
src/mame/drivers/apricotp.cpp
View File

@ -27,7 +27,7 @@
#include "emu.h"
#include "bus/centronics/ctronics.h"
#include "cpu/i86/i86.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "formats/apridisk.h"
#include "machine/am9517a.h"
#include "machine/apricotkb.h"

2
src/mame/drivers/banctec.cpp
View File

@ -17,7 +17,7 @@
#include "emu.h"
#include "cpu/mcs51/mcs51.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "video/mc6845.h"
#include "screen.h"

2
src/mame/drivers/baraduke.cpp
View File

@ -111,7 +111,7 @@ DIP locations verified for:
#include "includes/baraduke.h"
#include "cpu/m6809/m6809.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/watchdog.h"
#include "screen.h"
#include "speaker.h"

2
src/mame/drivers/bublbobl.cpp
View File

@ -275,7 +275,7 @@ TODO:
#include "emu.h"
#include "includes/bublbobl.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "cpu/z80/z80.h"
#include "machine/watchdog.h"
#include "sound/2203intf.h"

2
src/mame/drivers/by6803.cpp
View File

@ -22,7 +22,7 @@ ToDo:
#include "emu.h"
#include "machine/genpin.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
//#include "cpu/m6809/m6809.h"
#include "machine/6821pia.h"
//#include "audio/midway.h"

2
src/mame/drivers/by68701.cpp
View File

@ -2,7 +2,7 @@
// copyright-holders:Miodrag Milanovic
#include "emu.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
class by68701_state : public driver_device
{

2
src/mame/drivers/byvid.cpp
View File

@ -38,7 +38,7 @@ ToDo (granny):
#include "emu.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "cpu/m6809/m6809.h"
#include "machine/6821pia.h"
#include "machine/nvram.h"

2
src/mame/drivers/canon_s80.cpp
View File

@ -17,7 +17,7 @@
*/
#include "emu.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
//#include "video/hd44780.h"
class canons80_state : public driver_device

2
src/mame/drivers/castle.cpp
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@ -45,7 +45,7 @@
#include "emu.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
class castle_state : public driver_device
{

2
src/mame/drivers/ddragon.cpp
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@ -56,7 +56,7 @@ Dip locations verified with manual for ddragon & ddragon2
#include "includes/ddragon.h"
#include "cpu/m6809/hd6309.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "cpu/m6809/m6809.h"
#include "cpu/z80/z80.h"
#include "sound/okim6295.h"

2
src/mame/drivers/itech32.cpp
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@ -353,7 +353,7 @@ Notes:
#include "emu.h"
#include "includes/itech32.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "cpu/m68000/m68000.h"
#include "cpu/m6809/m6809.h"
#include "cpu/tms32031/tms32031.h"

2
src/mame/drivers/kncljoe.cpp
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@ -31,7 +31,7 @@ Updates:
#include "includes/kncljoe.h"
#include "cpu/z80/z80.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "sound/sn76496.h"
#include "speaker.h"

2
src/mame/drivers/ltd.cpp
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@ -43,7 +43,7 @@ ToDo:
#include "emu.h"
#include "machine/genpin.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "sound/ay8910.h"
#include "speaker.h"

2
src/mame/drivers/mc10.cpp
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@ -9,7 +9,7 @@
#include "emu.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "imagedev/cassette.h"
#include "imagedev/printer.h"
#include "machine/ram.h"

2
src/mame/drivers/namcos1.cpp
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@ -339,7 +339,7 @@ C - uses sub board with support for player 3 and 4 controls
#include "includes/namcos1.h"
#include "cpu/m6809/m6809.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/nvram.h"
#include "sound/volt_reg.h"
#include "sound/ym2151.h"

2
src/mame/drivers/namcos86.cpp
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@ -178,7 +178,7 @@ TODO:
#include "includes/namcos86.h"
#include "cpu/m6809/m6809.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "sound/ym2151.h"
#include "sound/n63701x.h"
#include "screen.h"

2
src/mame/drivers/pacland.cpp
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@ -194,7 +194,7 @@ Notes:
#include "includes/pacland.h"
#include "cpu/m6809/m6809.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/watchdog.h"
#include "speaker.h"

2
src/mame/drivers/rvoice.cpp
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@ -11,7 +11,7 @@
/* Core includes */
#include "emu.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/mos6551.h"
//#include "dectalk.lh" // hack to avoid screenless system crash
#include "machine/terminal.h"

2
src/mame/drivers/skykid.cpp
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@ -19,7 +19,7 @@ Notes:
#include "includes/skykid.h"
#include "cpu/m6809/m6809.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/watchdog.h"
#include "sound/namco.h"
#include "screen.h"

2
src/mame/drivers/tceptor.cpp
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@ -13,7 +13,7 @@
#include "cpu/m6502/m65c02.h"
#include "cpu/m6809/m6809.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "cpu/m68000/m68000.h"
#include "machine/nvram.h"
#include "sound/dac.h"

2
src/mame/includes/adam.h
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@ -10,7 +10,7 @@
#include "bus/coleco/ctrl.h"
#include "bus/coleco/exp.h"
#include "cpu/z80/z80.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/coleco.h"
#include "machine/ram.h"
#include "sound/sn76496.h"

2
src/mame/includes/atarist.h
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@ -7,7 +7,7 @@
#include "bus/rs232/rs232.h"
#include "cpu/m68000/m68000.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/6850acia.h"
#include "machine/8530scc.h"
#include "bus/centronics/ctronics.h"

2
src/mame/includes/hx20.h
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@ -5,7 +5,7 @@
#pragma once
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "imagedev/cassette.h"
#include "machine/mc146818.h"
#include "machine/ram.h"

2
src/mame/includes/psion.h
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@ -11,7 +11,7 @@
#ifndef _PSION_H_
#define _PSION_H_
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "machine/nvram.h"
#include "machine/psion_pack.h"
#include "video/hd44780.h"

2
src/mame/includes/px8.h
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@ -7,7 +7,7 @@
#include "cpu/z80/z80.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m6800/m6801.h"
#include "imagedev/cassette.h"
#include "machine/ram.h"
#include "machine/i8251.h"

3
src/mame/includes/slapstic.h
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@ -16,9 +16,6 @@
#pragma once
#include "cpu/m6800/m6800.h"
#include "cpu/m68000/m68000.h"
DECLARE_DEVICE_TYPE(SLAPSTIC, atari_slapstic_device)

3
src/mame/machine/slapstic.cpp
View File

@ -184,6 +184,9 @@
#include "emu.h"
#include "includes/slapstic.h"
#include "cpu/m6800/m6800.h"
#include "cpu/m68000/m68000.h"
/*************************************
*