mirror of
https://github.com/holub/mame
synced 2025-04-23 17:00:53 +03:00
(mess) rmnimbus: fix and simplify more drawing code (nw)
This commit is contained in:
cracyc
parent
1be39477da
commit
d2ae627d17
@ -39,11 +39,13 @@ READ16_MEMBER(dectalk_isa_device::host_irq_r)
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READ8_MEMBER(dectalk_isa_device::dma_r)
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{
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m_cpu->drq1_w(0);
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return m_dma;
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}
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WRITE8_MEMBER(dectalk_isa_device::dma_w)
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{
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m_cpu->drq1_w(0);
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m_dma = data;
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}
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@ -71,6 +73,7 @@ WRITE16_MEMBER(dectalk_isa_device::output_ctl_w)
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READ16_MEMBER(dectalk_isa_device::dsp_dma_r)
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{
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m_bio = ASSERT_LINE;
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m_cpu->drq1_w(0);
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return m_dsp_dma;
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}
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@ -10,9 +10,7 @@
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#define LOG_INTERRUPTS 0
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#define LOG_INTERRUPTS_EXT 0
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#define LOG_TIMER 0
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#define LOG_OPTIMIZATION 0
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#define LOG_DMA 0
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#define CPU_RESUME_TRIGGER 7123
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/* external int priority masks */
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@ -608,8 +606,6 @@ void i80186_cpu_device::device_start()
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m_timer[0].time_timer = timer_alloc(TIMER_TIME0);
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m_timer[1].time_timer = timer_alloc(TIMER_TIME1);
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m_timer[2].time_timer = timer_alloc(TIMER_TIME2);
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m_dma[0].finish_timer = timer_alloc(TIMER_DMA0);
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m_dma[1].finish_timer = timer_alloc(TIMER_DMA1);
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m_out_tmrout0_func.resolve_safe();
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m_out_tmrout1_func.resolve_safe();
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@ -637,8 +633,6 @@ void i80186_cpu_device::device_reset()
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m_intr.status = 0x0000;
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m_intr.poll_status = 0x0000;
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m_reloc = 0x20ff;
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m_dma[0].drq_delay = false;
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m_dma[1].drq_delay = false;
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m_dma[0].drq_state = false;
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m_dma[1].drq_state = false;
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for(int i = 0; i < ARRAY_LENGTH(m_timer); ++i)
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@ -647,6 +641,7 @@ void i80186_cpu_device::device_reset()
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m_timer[i].time_timer_active = 0;
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m_timer[i].maxA = 0;
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m_timer[i].maxB = 0;
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m_timer[i].count = 0;
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}
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}
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@ -826,6 +821,7 @@ void i80186_cpu_device::update_interrupt_state()
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/* check external interrupts */
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for (IntNo = 0; IntNo < 4; IntNo++)
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{
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if ((m_intr.ext[IntNo] & 0x0F) == Priority)
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{
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if (LOG_INTERRUPTS)
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@ -838,6 +834,12 @@ void i80186_cpu_device::update_interrupt_state()
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/* if there's something pending, generate an interrupt */
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if (m_intr.request & (0x10 << IntNo))
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{
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if((IntNo >= 2) && (m_intr.ext[IntNo - 2] & EXTINT_CTRL_CASCADE))
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{
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logerror("i186: %06x: irq %d use when set for cascade mode\n", pc(), IntNo);
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m_intr.request &= ~(0x10 << IntNo);
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continue;
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}
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/* otherwise, generate an interrupt for this request */
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new_vector = 0x0c + IntNo;
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@ -845,7 +847,10 @@ void i80186_cpu_device::update_interrupt_state()
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m_intr.ack_mask = 0x0010 << IntNo;
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goto generate_int;
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}
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else if ((m_intr.in_service & (0x10 << IntNo)) && (m_intr.ext[IntNo] & EXTINT_CTRL_SFNM))
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return; // if an irq is in service and sfnm is enabled, stop here
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}
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}
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}
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return;
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@ -855,8 +860,6 @@ generate_int:
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if (!m_intr.pending)
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set_input_line(0, ASSERT_LINE);
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m_intr.pending = 1;
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machine().scheduler().trigger(CPU_RESUME_TRIGGER);
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if (LOG_OPTIMIZATION) logerror(" - trigger due to interrupt pending\n");
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if (LOG_INTERRUPTS) logerror("(%f) **** Requesting interrupt vector %02X\n", machine().time().as_double(), new_vector);
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}
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@ -920,6 +923,7 @@ void i80186_cpu_device::handle_eoi(int data)
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}
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}
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}
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update_interrupt_state();
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}
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/* Trigger an external interrupt, optionally supplying the vector to take */
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@ -928,10 +932,13 @@ void i80186_cpu_device::external_int(UINT16 intno, int state, UINT8 vector)
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if (LOG_INTERRUPTS_EXT) logerror("generating external int %02X, vector %02X\n",intno,vector);
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if(!state)
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return;
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{
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m_intr.request &= ~(0x010 << intno);
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m_intr.ack_mask &= ~(0x0010 << intno);
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}
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else // Turn on the requested request bit and handle interrupt
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m_intr.request |= (0x010 << intno);
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// Turn on the requested request bit and handle interrupt
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m_intr.request |= (0x010 << intno);
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update_interrupt_state();
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}
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@ -1015,17 +1022,6 @@ void i80186_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int p
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t->int_timer->adjust(attotime::never, which);
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break;
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}
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case TIMER_DMA0:
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case TIMER_DMA1:
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{
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int which = param;
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struct dma_state *d = &m_dma[which];
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d->drq_delay = false;
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if(d->drq_state)
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drq_callback(which);
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break;
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}
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case TIMER_TIME0:
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case TIMER_TIME1:
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case TIMER_TIME2:
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@ -1227,9 +1223,6 @@ void i80186_cpu_device::drq_callback(int which)
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UINT8 dma_byte;
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UINT8 incdec_size;
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if(dma->drq_delay)
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return;
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if (LOG_DMA>1)
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logerror("Control=%04X, src=%05X, dest=%05X, count=%04X\n",dma->control,dma->source,dma->dest,dma->count);
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@ -1282,7 +1275,7 @@ void i80186_cpu_device::drq_callback(int which)
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dma->count -= 1;
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// Terminate if count is zero, and terminate flag set
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if((dma->control & TERMINATE_ON_ZERO) && (dma->count==0))
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if(((dma->control & TERMINATE_ON_ZERO) || !(dma->control & SYNC_MASK)) && (dma->count==0))
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{
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dma->control &= ~ST_STOP;
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if (LOG_DMA) logerror("DMA terminated\n");
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@ -1295,9 +1288,6 @@ void i80186_cpu_device::drq_callback(int which)
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m_intr.request |= 0x04 << which;
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update_interrupt_state();
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}
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// dma->finish_timer->adjust(attotime::from_hz(clock()/8), 0);
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// dma->drq_delay = true;
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}
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READ16_MEMBER(i80186_cpu_device::internal_port_r)
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@ -88,7 +88,6 @@ private:
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struct dma_state
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{
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bool drq_delay;
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bool drq_state;
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UINT32 source;
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UINT32 dest;
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@ -117,8 +116,6 @@ private:
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static const device_timer_id TIMER_TIME0 = 3;
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static const device_timer_id TIMER_TIME1 = 4;
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static const device_timer_id TIMER_TIME2 = 5;
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static const device_timer_id TIMER_DMA0 = 6;
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static const device_timer_id TIMER_DMA1 = 7;
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struct timer_state m_timer[3];
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struct dma_state m_dma[2];
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@ -120,8 +120,7 @@ static MACHINE_CONFIG_START( nimbus, rmnimbus_state )
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//MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_SCANLINE)
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MCFG_SCREEN_PALETTE("palette")
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MCFG_PALETTE_ADD("palette", SCREEN_NO_COLOURS)
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MCFG_PALETTE_INIT_OWNER(rmnimbus_state, rmnimbus)
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MCFG_PALETTE_ADD("palette", 16)
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/* Backing storage */
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MCFG_WD2793x_ADD(FDC_TAG, 1000000)
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@ -20,13 +20,6 @@
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#define MAINCPU_TAG "maincpu"
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#define IOCPU_TAG "iocpu"
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#define SCREEN_WIDTH_PIXELS 640
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#define SCREEN_HEIGHT_LINES 250
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#define SCREEN_NO_COLOURS 16
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#define NO_VIDREGS (0x30/2)
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/* Nimbus specific */
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/* External int vectors for chained interupts */
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@ -191,10 +184,8 @@ public:
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UINT8 m_last_playmode;
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UINT8 m_ay8910_a;
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UINT8 m_sio_int_state;
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UINT16 m_vidregs[NO_VIDREGS];
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UINT8 m_bpp;
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UINT16 m_pixel_mask;
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UINT8 m_hs_count;
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UINT16 m_vidregs[24];
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UINT16 m_x, m_y;
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UINT32 m_debug_video;
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UINT8 m_vector;
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UINT8 m_eeprom_bits;
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@ -202,8 +193,6 @@ public:
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DECLARE_READ8_MEMBER(nimbus_mcu_r);
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DECLARE_WRITE8_MEMBER(nimbus_mcu_w);
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DECLARE_READ16_MEMBER(nimbus_io_r);
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DECLARE_WRITE16_MEMBER(nimbus_io_w);
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DECLARE_READ8_MEMBER(scsi_r);
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DECLARE_WRITE8_MEMBER(scsi_w);
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DECLARE_WRITE8_MEMBER(fdc_ctl_w);
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@ -225,7 +214,6 @@ public:
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virtual void machine_reset();
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virtual void video_start();
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virtual void video_reset();
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DECLARE_PALETTE_INIT(rmnimbus);
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UINT32 screen_update_nimbus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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DECLARE_WRITE_LINE_MEMBER(sio_interrupt);
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DECLARE_WRITE_LINE_MEMBER(nimbus_fdc_intrq_w);
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@ -241,15 +229,17 @@ public:
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DECLARE_WRITE_LINE_MEMBER(write_scsi_iena);
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UINT8 get_pixel(UINT16 x, UINT16 y);
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UINT16 read_pixel_line(UINT16 x, UINT16 y, UINT8 width);
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UINT16 read_pixel_line(UINT16 x, UINT16 y, UINT8 pixels, UINT8 bpp);
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UINT16 read_pixel_data(UINT16 x, UINT16 y);
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void set_pixel(UINT16 x, UINT16 y, UINT8 colour);
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void set_pixel40(UINT16 x, UINT16 y, UINT8 colour);
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void write_pixel_line(UINT16 x, UINT16 y, UINT16 data, UINT8 width);
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void move_pixel_line(UINT16 x, UINT16 y, UINT16 data, UINT8 width);
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void write_pixel_line(UINT16 x, UINT16 y, UINT16, UINT8 pixels, UINT8 bpp);
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void move_pixel_line(UINT16 x, UINT16 y, UINT8 width);
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void write_pixel_data(UINT16 x, UINT16 y, UINT16 data);
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void write_reg_004();
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void write_reg_006();
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void write_reg_00A();
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void write_reg_00E();
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void write_reg_010();
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void write_reg_012();
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void write_reg_014();
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@ -258,7 +248,7 @@ public:
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void write_reg_01C();
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void write_reg_01E();
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void write_reg_026();
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void change_palette(UINT8 bank, UINT16 colours, UINT8 regno);
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void change_palette(UINT8 bank, UINT16 colours);
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void external_int(UINT16 intno, UINT8 vector);
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DECLARE_READ8_MEMBER(cascade_callback);
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void *get_dssi_ptr(address_space &space, UINT16 ds, UINT16 si);
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@ -271,7 +261,7 @@ public:
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void hdc_post_rw();
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void hdc_drq();
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void pc8031_reset();
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void ipc_dumpregs();
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//void ipc_dumpregs();
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void iou_reset();
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void rmni_sound_reset();
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void mouse_js_reset();
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@ -1026,8 +1026,7 @@ WRITE_LINE_MEMBER(rmnimbus_state::nimbus_fdc_drq_w)
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if(LOG_DISK)
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logerror("nimbus_drives_drq_w(%d)\n", state);
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if(state && FDC_DRQ_ENABLED())
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m_maincpu->drq1_w(state);
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m_maincpu->drq1_w(state && FDC_DRQ_ENABLED());
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}
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UINT8 rmnimbus_state::fdc_driveno(UINT8 drivesel)
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@ -28,8 +28,6 @@
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#define WIDTH_MASK 0x07
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#define XOR_MASK 0x08
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#define MASK_4080 0x10
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// Offsets of nimbus video registers within register array
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@ -60,9 +58,11 @@
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#define FG_COLOUR (m_vidregs[reg024]&0x0F)
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#define BG_COLOUR ((m_vidregs[reg024]&0xF0)>>4)
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#define SELECT_COL(x,c) (IS_80COL ? ((((x) & 1) ? ((c) << 2) : (c)) & 0xC) : (c))
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#define FILL_WORD(c) (((c) << 12) | ((c) << 8) | ((c) << 4) | (c))
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#define IS_80COL (m_vidregs[reg026]&MASK_4080)
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#define IS_XOR (m_vidregs[reg022]&XOR_MASK)
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#define IS_80COL (m_vidregs[reg026]&0x10)
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#define IS_XOR (m_vidregs[reg022]&8)
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#define DEBUG_TEXT 0x01
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#define DEBUG_DB 0x02
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@ -71,7 +71,6 @@
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#define DEBUG_SET(flags) ((m_debug_video & (flags))==(flags))
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static void video_debug(running_machine &machine, int ref, int params, const char *param[]);
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static void video_regdump(running_machine &machine, int ref, int params, const char *param[]);
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/*
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I'm not sure which of thes return values on a real machine, so for the time being I'm going
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@ -85,7 +84,7 @@ READ16_MEMBER(rmnimbus_state::nimbus_video_io_r)
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switch (offset)
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{
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case reg000 : result=m_vidregs[reg000]; break;
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case reg000 : result=read_pixel_data(m_vidregs[reg002],m_vidregs[reg00C]); break;
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case reg002 : result=m_vidregs[reg002]; break;
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case reg004 : result=read_pixel_data(m_vidregs[reg002],++m_vidregs[reg00C]); break;
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case reg006 : result=m_vidregs[reg006]; break;
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@ -94,12 +93,12 @@ READ16_MEMBER(rmnimbus_state::nimbus_video_io_r)
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case reg00C : result=m_vidregs[reg00C]; break;
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case reg00E : result=m_vidregs[reg00E]; break;
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case reg010 : result=m_vidregs[reg010]; break;
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case reg010 : result=read_pixel_data(m_vidregs[reg002],m_vidregs[reg00C]); break;
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case reg012 : result=m_vidregs[reg012]; break;
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case reg014 : result=m_vidregs[reg014]; break;
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case reg016 : result=m_vidregs[reg016]; break;
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case reg018 : result=m_vidregs[reg018]; break;
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case reg01A : result=m_vidregs[reg01A]; break;
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case reg01A : result=read_pixel_data(++m_vidregs[reg002],m_vidregs[reg00C]); break;
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case reg01C : result=m_vidregs[reg01C]; break;
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case reg01E : result=m_vidregs[reg01E]; break;
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@ -108,8 +107,8 @@ READ16_MEMBER(rmnimbus_state::nimbus_video_io_r)
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case reg024 : result=m_vidregs[reg024]; break;
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case reg026 : result=m_vidregs[reg026]; break;
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case reg028 : result=m_screen->vpos() % 0xb; break; //result=m_vidregs[reg028]; break;
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case reg02A : result=m_vidregs[reg02A]; break;
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case reg02C : result=m_vidregs[reg02C]; break;
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case reg02A : result=m_vidregs[reg002]; break;
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case reg02C : result=m_vidregs[reg00C]; break;
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case reg02E : result=m_vidregs[reg02E]; break;
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default : result=0; break;
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}
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@ -124,10 +123,10 @@ UINT8 rmnimbus_state::get_pixel(UINT16 x, UINT16 y)
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{
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UINT8 result = 0;
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if((x<SCREEN_WIDTH_PIXELS) && (y<SCREEN_HEIGHT_LINES))
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if((x<640) && (y<250))
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{
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if(IS_80COL)
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result=m_video_mem.pix16(y, x);
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result=m_video_mem.pix16(y, x) >> 2;
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else
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result=m_video_mem.pix16(y, x*2);
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}
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@ -135,34 +134,25 @@ UINT8 rmnimbus_state::get_pixel(UINT16 x, UINT16 y)
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return result;
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}
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UINT16 rmnimbus_state::read_pixel_line(UINT16 x, UINT16 y, UINT8 width)
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UINT16 rmnimbus_state::read_pixel_line(UINT16 x, UINT16 y, UINT8 pixels, UINT8 bpp)
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{
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UINT16 result = 0;
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UINT16 mask;
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UINT16 pixel_x;
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UINT16 colour;
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UINT8 shifts;
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UINT16 colour = 0;
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int i;
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x *= pixels;
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if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL))
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logerror("read_pixel_line(x=%04X, y=%04X, width=%02X, bpp=%02X, pixel_mask=%02X)\n",x,y,width,m_bpp,m_pixel_mask);
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logerror("read_pixel_line(x=%d, y=%d, width=%d, bpp=%d)\n",x,y,pixels,bpp);
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shifts=width-m_bpp;
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for(mask=m_pixel_mask, pixel_x=(x*(width/m_bpp)); mask>0; mask=(mask>>m_bpp), pixel_x++)
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for(i = 0; i < pixels - 1; i++)
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{
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colour=get_pixel(pixel_x,y);
|
||||
colour |= get_pixel(i + x, y);
|
||||
|
||||
if(m_bpp==1)
|
||||
colour=((colour==FG_COLOUR) ? 1 : 0) << shifts;
|
||||
if(bpp==1)
|
||||
colour=((colour==SELECT_COL(x + i, FG_COLOUR)) ? 1 : 0) << 1;
|
||||
else
|
||||
colour=colour << shifts;
|
||||
|
||||
result=(result & ~mask) | colour;
|
||||
|
||||
shifts-=m_bpp;
|
||||
colour <<= bpp;
|
||||
}
|
||||
|
||||
return result;
|
||||
return colour | get_pixel(x + i, y);
|
||||
}
|
||||
|
||||
UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y)
|
||||
@ -170,7 +160,7 @@ UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y)
|
||||
UINT16 result=0;
|
||||
|
||||
if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL))
|
||||
logerror("read_pixel_data(x=%04X, y=%04X), reg022=%04X\n",x,y,m_vidregs[reg022]);
|
||||
logerror("read_pixel_data(x=%d, y=%d), reg022=%04X\n",x,y,m_vidregs[reg022]);
|
||||
|
||||
if(IS_80COL)
|
||||
{
|
||||
@ -184,15 +174,15 @@ UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y)
|
||||
|
||||
case 0x03 : break;
|
||||
|
||||
case 0x04 : m_bpp=2; m_pixel_mask=0xC0;
|
||||
result=read_pixel_line(x,y,8);
|
||||
break;
|
||||
case 0x04 :
|
||||
result=read_pixel_line(x,y,4,2);
|
||||
break;
|
||||
|
||||
case 0x05 : break;
|
||||
|
||||
case 0x06 : m_bpp=2; m_pixel_mask=0xC000;
|
||||
result=read_pixel_line(x,y,16);
|
||||
break;
|
||||
case 0x06 :
|
||||
result=read_pixel_line(x,y,8,2);
|
||||
break;
|
||||
|
||||
case 0x07 : break;
|
||||
}
|
||||
@ -213,9 +203,9 @@ UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y)
|
||||
|
||||
case 0x05 : break;
|
||||
|
||||
case 0x06 : m_bpp=4; m_pixel_mask=0xF000;
|
||||
result=read_pixel_line(x,y,16);
|
||||
break;
|
||||
case 0x06 :
|
||||
result=read_pixel_line(x,y,4,4);
|
||||
break;
|
||||
|
||||
case 0x07 : break;
|
||||
}
|
||||
@ -254,9 +244,9 @@ WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w)
|
||||
case reg004 : m_vidregs[reg004]=data; write_reg_004(); break;
|
||||
case reg006 : m_vidregs[reg006]=data; write_reg_006(); break;
|
||||
case reg008 : m_vidregs[reg008]=data; break;
|
||||
case reg00A : m_vidregs[reg00A]=data; break;
|
||||
case reg00A : m_vidregs[reg00A]=data; write_reg_00A(); break;
|
||||
case reg00C : m_vidregs[reg00C]=data; break;
|
||||
case reg00E : m_vidregs[reg00E]=data; break;
|
||||
case reg00E : m_vidregs[reg00E]=data; write_reg_00E(); break;
|
||||
|
||||
case reg010 : m_vidregs[reg010]=data; write_reg_010(); break;
|
||||
case reg012 : m_vidregs[reg012]=data; write_reg_012(); break;
|
||||
@ -271,10 +261,10 @@ WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w)
|
||||
case reg022 : m_vidregs[reg022]=data; break;
|
||||
case reg024 : m_vidregs[reg024]=data; break;
|
||||
case reg026 : m_vidregs[reg026]=data; write_reg_026(); break;
|
||||
case reg028 : change_palette(0,data,reg028); break;
|
||||
case reg02A : change_palette(1,data,reg02A); break;
|
||||
case reg02C : change_palette(2,data,reg02C); break;
|
||||
case reg02E : change_palette(3,data,reg02E); break;
|
||||
case reg028 : change_palette(0,data); break;
|
||||
case reg02A : change_palette(1,data); break;
|
||||
case reg02C : change_palette(2,data); break;
|
||||
case reg02E : change_palette(3,data); break;
|
||||
|
||||
default : break;
|
||||
}
|
||||
@ -283,12 +273,9 @@ WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w)
|
||||
void rmnimbus_state::set_pixel(UINT16 x, UINT16 y, UINT8 colour)
|
||||
{
|
||||
if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL))
|
||||
logerror("set_pixel(x=%04X, y=%04X, colour=%04X), IS_XOR=%02X\n",x,y,colour,IS_XOR);
|
||||
logerror("set_pixel(x=%d, y=%d, colour=%04X), IS_XOR=%02X\n",x,y,colour,IS_XOR);
|
||||
|
||||
if(IS_80COL)
|
||||
colour&=0x03;
|
||||
|
||||
if((x<SCREEN_WIDTH_PIXELS) && (y<SCREEN_HEIGHT_LINES))
|
||||
if((x<640) && (y<250))
|
||||
{
|
||||
if(IS_XOR)
|
||||
m_video_mem.pix16(y, x)^=colour;
|
||||
@ -303,50 +290,44 @@ void rmnimbus_state::set_pixel40( UINT16 x, UINT16 y, UINT8 colour)
|
||||
set_pixel((x*2)+1,y,colour);
|
||||
}
|
||||
|
||||
void rmnimbus_state::write_pixel_line(UINT16 x, UINT16 y, UINT16 data, UINT8 width)
|
||||
void rmnimbus_state::write_pixel_line(UINT16 x, UINT16 y, UINT16 data, UINT8 pixels, UINT8 bpp)
|
||||
{
|
||||
UINT16 mask;
|
||||
UINT16 pixel_x;
|
||||
UINT16 colour;
|
||||
UINT8 shifts;
|
||||
UINT8 colour;
|
||||
UINT8 mask = (1 << bpp) - 1;
|
||||
x *= pixels;
|
||||
|
||||
if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL))
|
||||
logerror("write_pixel_line(x=%04X, y=%04X, data=%04X, width=%02X, bpp=%02X, pixel_mask=%02X)\n",x,y,data,width,m_bpp,m_pixel_mask);
|
||||
logerror("write_pixel_line(x=%d, y=%d, data=%04X, width=%d, bpp=%d)\n",x,y,data,pixels,bpp);
|
||||
|
||||
shifts=width-m_bpp;
|
||||
|
||||
for(mask=m_pixel_mask, pixel_x=(x*(width/m_bpp)); mask>0; mask=(mask>>m_bpp), pixel_x++)
|
||||
for(int i = (pixels - 1); i >= 0; i--)
|
||||
{
|
||||
if(m_bpp==1)
|
||||
colour=(data & mask) ? FG_COLOUR : BG_COLOUR;
|
||||
if(bpp==1)
|
||||
colour = SELECT_COL(x + i, (data & 1) ? FG_COLOUR : BG_COLOUR);
|
||||
else if(IS_80COL)
|
||||
colour = (data & mask) << 2;
|
||||
else
|
||||
colour=(data & mask) >> shifts;
|
||||
|
||||
//logerror("write_pixel_line: data=%04X, mask=%04X, shifts=%02X, bpp=%02X colour=%02X\n",data,mask,shifts,m_bpp,colour);
|
||||
colour = (data & mask);
|
||||
|
||||
if(IS_80COL)
|
||||
set_pixel(pixel_x,y,colour);
|
||||
set_pixel(x + i,y,colour);
|
||||
else
|
||||
set_pixel40(pixel_x,y,colour);
|
||||
set_pixel40(x + i,y,colour);
|
||||
|
||||
shifts-=m_bpp;
|
||||
data >>= bpp;
|
||||
}
|
||||
}
|
||||
|
||||
void rmnimbus_state::move_pixel_line(UINT16 x, UINT16 y, UINT16 data, UINT8 width)
|
||||
void rmnimbus_state::move_pixel_line(UINT16 x, UINT16 y, UINT8 pixels)
|
||||
{
|
||||
UINT16 pixelno;
|
||||
UINT16 pixelx;
|
||||
|
||||
x *= pixels;
|
||||
if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL))
|
||||
logerror("move_pixel_line(x=%04X, y=%04X, data=%04X, width=%02X)\n",x,y,data,width);
|
||||
logerror("move_pixel_line(x=%d, y=%d, width=%d)\n",x,y,pixels);
|
||||
|
||||
for(pixelno=0;pixelno<width;pixelno++)
|
||||
for(int i = 0; i < pixels; i++)
|
||||
{
|
||||
pixelx=(x*width)+pixelno;
|
||||
if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL))
|
||||
logerror("pixelx=%04X\n",pixelx);
|
||||
m_video_mem.pix16(m_vidregs[reg020], pixelx)=m_video_mem.pix16(y, pixelx);
|
||||
logerror("x=%d\n",x + i);
|
||||
m_video_mem.pix16(m_vidregs[reg020], x + i) = m_video_mem.pix16(y, x + i);
|
||||
}
|
||||
}
|
||||
|
||||
@ -380,85 +361,87 @@ void rmnimbus_state::move_pixel_line(UINT16 x, UINT16 y, UINT16 data, UINT8 w
|
||||
void rmnimbus_state::write_pixel_data(UINT16 x, UINT16 y, UINT16 data)
|
||||
{
|
||||
if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL))
|
||||
logerror("write_pixel_data(x=%04X, y=%04X, data=%04X), reg022=%04X\n",x,y,data,m_vidregs[reg022]);
|
||||
logerror("write_pixel_data(x=%d, y=%d, data=%04X), reg022=%04X\n",x,y,data,m_vidregs[reg022]);
|
||||
|
||||
if(IS_80COL)
|
||||
{
|
||||
switch (m_vidregs[reg022] & WIDTH_MASK)
|
||||
{
|
||||
case 0x00 : m_bpp=1; m_pixel_mask=0x8000;
|
||||
write_pixel_line(x,y,data,16);
|
||||
break;
|
||||
case 0x00:
|
||||
write_pixel_line(x,y,data,16,1);
|
||||
break;
|
||||
|
||||
case 0x01 : m_bpp=1; m_pixel_mask=0x80;
|
||||
write_pixel_line(x,y,data,8);
|
||||
break;
|
||||
case 0x01:
|
||||
write_pixel_line(x,y,data,8,1);
|
||||
break;
|
||||
|
||||
case 0x02 : m_bpp=1; m_pixel_mask=0x0080;
|
||||
write_pixel_line(x,y,data,8);
|
||||
break;
|
||||
case 0x02:
|
||||
write_pixel_line(x,y,data,8,1);
|
||||
break;
|
||||
|
||||
case 0x03 : m_bpp=1;
|
||||
set_pixel(x,y,FG_COLOUR);
|
||||
break;
|
||||
case 0x03:
|
||||
set_pixel(x,y,SELECT_COL(x, FG_COLOUR));
|
||||
break;
|
||||
|
||||
case 0x04 : m_bpp=2; m_pixel_mask=0xC0;
|
||||
write_pixel_line(x,y,(((data & 0xFF00)>>8) & (data & 0xFF)) | (~((data & 0xFF00)>>8) & read_pixel_line(x,y,8)),8);
|
||||
break;
|
||||
case 0x04:
|
||||
write_pixel_line(x,y,(((data & 0xFF00)>>8) & (data & 0xFF)) | (~((data & 0xFF00)>>8) & read_pixel_line(x,y,4,2)),4,2);
|
||||
break;
|
||||
|
||||
case 0x05 : move_pixel_line(x,y,data,16);
|
||||
break;
|
||||
case 0x05:
|
||||
move_pixel_line(x,y,16);
|
||||
break;
|
||||
|
||||
case 0x06 : m_bpp=2; m_pixel_mask=0xC000;
|
||||
write_pixel_line(x,y,data,16);
|
||||
break;
|
||||
case 0x06:
|
||||
write_pixel_line(x,y,data,8,2);
|
||||
break;
|
||||
|
||||
case 0x07 : m_bpp=1;
|
||||
set_pixel(x,y,FG_COLOUR);
|
||||
break;
|
||||
case 0x07:
|
||||
set_pixel(x,y,SELECT_COL(x, FG_COLOUR));
|
||||
break;
|
||||
}
|
||||
}
|
||||
else /* 40 Col */
|
||||
{
|
||||
switch (m_vidregs[reg022] & WIDTH_MASK)
|
||||
{
|
||||
case 0x00 : m_bpp=1; m_pixel_mask=0x0080;
|
||||
write_pixel_line(x,y,data,8);
|
||||
break;
|
||||
case 0x00:
|
||||
write_pixel_line(x,y,data,8,1);
|
||||
break;
|
||||
|
||||
case 0x01 : m_bpp=2; m_pixel_mask=0xC0;
|
||||
write_pixel_line(x,y,data,8);
|
||||
break;
|
||||
case 0x01:
|
||||
write_pixel_line(x,y,data,4,2);
|
||||
break;
|
||||
|
||||
case 0x02 : m_bpp=1; m_pixel_mask=0x0080;
|
||||
set_pixel40(x,y,FG_COLOUR);
|
||||
break;
|
||||
case 0x02:
|
||||
set_pixel40(x,y,FG_COLOUR);
|
||||
break;
|
||||
|
||||
case 0x03 : m_bpp=1;
|
||||
set_pixel(x,y,FG_COLOUR);
|
||||
break;
|
||||
case 0x03:
|
||||
set_pixel(x,y,FG_COLOUR);
|
||||
break;
|
||||
|
||||
case 0x04 : m_bpp=4; m_pixel_mask=0xF0;
|
||||
write_pixel_line(x,y,(((data & 0xFF00)>>8) & (data & 0xFF)) | (~((data & 0xFF00)>>8) & read_pixel_line(x,y,8)),8);
|
||||
break;
|
||||
case 0x04:
|
||||
write_pixel_line(x,y,(((data & 0xFF00)>>8) & (data & 0xFF)) | (~((data & 0xFF00)>>8) & read_pixel_line(x,y,2,4)),2,4);
|
||||
break;
|
||||
|
||||
case 0x05 : move_pixel_line(x,y,data,16);
|
||||
break;
|
||||
case 0x05:
|
||||
move_pixel_line(x,y,16);
|
||||
break;
|
||||
|
||||
case 0x06 : m_bpp=4; m_pixel_mask=0xF000;
|
||||
write_pixel_line(x,y,data,16);
|
||||
break;
|
||||
case 0x06:
|
||||
write_pixel_line(x,y,data,4,4);
|
||||
break;
|
||||
|
||||
case 0x07 : m_bpp=1;
|
||||
set_pixel(x,y,FG_COLOUR);
|
||||
break;
|
||||
case 0x07:
|
||||
set_pixel(x,y,FG_COLOUR);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void rmnimbus_state::write_reg_004()
|
||||
{
|
||||
m_vidregs[reg002]=0;
|
||||
//m_vidregs[reg002]=0;
|
||||
m_vidregs[reg00C]++;
|
||||
}
|
||||
|
||||
@ -468,6 +451,17 @@ void rmnimbus_state::write_reg_006()
|
||||
m_vidregs[reg002]=m_vidregs[reg006];
|
||||
}
|
||||
|
||||
void rmnimbus_state::write_reg_00A()
|
||||
{
|
||||
m_vidregs[reg002]++;
|
||||
}
|
||||
|
||||
void rmnimbus_state::write_reg_00E()
|
||||
{
|
||||
m_vidregs[reg002]++;
|
||||
m_vidregs[reg00C]=m_vidregs[reg00E];
|
||||
}
|
||||
|
||||
void rmnimbus_state::write_reg_010()
|
||||
{
|
||||
write_pixel_data(m_vidregs[reg002],m_vidregs[reg00C],m_vidregs[reg010]);
|
||||
@ -480,7 +474,7 @@ void rmnimbus_state::write_reg_012()
|
||||
// work correctly.
|
||||
m_vidregs[reg002]=m_vidregs[reg012];
|
||||
|
||||
write_pixel_data(m_vidregs[reg012],m_vidregs[reg00C],FG_COLOUR);
|
||||
write_pixel_data(m_vidregs[reg012],m_vidregs[reg00C],FILL_WORD(FG_COLOUR));
|
||||
}
|
||||
|
||||
void rmnimbus_state::write_reg_014()
|
||||
@ -492,7 +486,7 @@ void rmnimbus_state::write_reg_016()
|
||||
{
|
||||
m_vidregs[reg002]=m_vidregs[reg016];
|
||||
|
||||
write_pixel_data(m_vidregs[reg002],++m_vidregs[reg00C],FG_COLOUR);
|
||||
write_pixel_data(m_vidregs[reg002],++m_vidregs[reg00C],FILL_WORD(FG_COLOUR));
|
||||
}
|
||||
|
||||
|
||||
@ -508,14 +502,14 @@ void rmnimbus_state::write_reg_01C()
|
||||
// and others using the standard RM box menus) work correctly.
|
||||
m_vidregs[reg00C]=m_vidregs[reg01C];
|
||||
|
||||
write_pixel_data(m_vidregs[reg002],m_vidregs[reg01C],FG_COLOUR);
|
||||
write_pixel_data(m_vidregs[reg002],m_vidregs[reg01C],FILL_WORD(FG_COLOUR));
|
||||
}
|
||||
|
||||
void rmnimbus_state::write_reg_01E()
|
||||
{
|
||||
m_vidregs[reg00C]=m_vidregs[reg01E];
|
||||
|
||||
write_pixel_data(++m_vidregs[reg002],m_vidregs[reg00C],FG_COLOUR);
|
||||
write_pixel_data(++m_vidregs[reg002],m_vidregs[reg00C],FILL_WORD(FG_COLOUR));
|
||||
}
|
||||
|
||||
/*
|
||||
@ -529,38 +523,17 @@ void rmnimbus_state::write_reg_026()
|
||||
logerror("reg 026 write, border_colour=%02X\n",m_vidregs[reg026] & 0x0F);
|
||||
}
|
||||
|
||||
void rmnimbus_state::change_palette(UINT8 bank, UINT16 colours, UINT8 regno)
|
||||
void rmnimbus_state::change_palette(UINT8 bank, UINT16 colours)
|
||||
{
|
||||
UINT8 colourno;
|
||||
UINT16 mask;
|
||||
UINT8 shifts;
|
||||
UINT8 colourmax;
|
||||
UINT8 first;
|
||||
|
||||
// for the register's data has changed update it, and then update the pallette, else do nothing.
|
||||
if(m_vidregs[regno]!=colours)
|
||||
m_vidregs[regno]=colours;
|
||||
else
|
||||
return;
|
||||
|
||||
// Setup parameters for pallette change
|
||||
colourmax=IS_80COL ? 1 : 4;
|
||||
first=IS_80COL ? bank : bank*4;
|
||||
|
||||
shifts=0;
|
||||
mask=0x000F;
|
||||
|
||||
// loop over changing colours
|
||||
for(colourno=first; colourno<(first+colourmax); colourno++)
|
||||
for(int colourno = (bank * 4); colourno < ((bank + 1) * 4); colourno++)
|
||||
{
|
||||
int paletteidx=(colours & mask) >> shifts;
|
||||
int i = (paletteidx & 8) >> 3;
|
||||
m_palette->set_pen_color(colourno, pal2bit((paletteidx & 2) | i), pal2bit(((paletteidx & 4) >> 1) | i), pal2bit(((paletteidx & 1) << 1) | i));
|
||||
int i = (colours & 8) >> 3;
|
||||
m_palette->set_pen_color(colourno, pal2bit((colours & 2) | i), pal2bit(((colours & 4) >> 1) | i), pal2bit(((colours & 1) << 1) | i));
|
||||
|
||||
if(DEBUG_SET(DEBUG_TEXT))
|
||||
logerror("set colourno[%02X], paletteidx=%02X\n",colourno, paletteidx);
|
||||
mask=mask<<4;
|
||||
shifts+=4;
|
||||
logerror("set colourno[%02X], colour=%02X\n",colourno, colours);
|
||||
colours >>= 4;
|
||||
}
|
||||
}
|
||||
|
||||
@ -578,31 +551,10 @@ static void video_debug(running_machine &machine, int ref, int params, const cha
|
||||
}
|
||||
}
|
||||
|
||||
static void video_regdump(running_machine &machine, int ref, int params, const char *param[])
|
||||
{
|
||||
rmnimbus_state *state = machine.driver_data<rmnimbus_state>();
|
||||
int regno;
|
||||
|
||||
for(regno=0;regno<0x08;regno++)
|
||||
{
|
||||
debug_console_printf(machine,"reg%03X=%04X reg%03X=%04X reg%03X=%04X\n",
|
||||
regno*2,state->m_vidregs[regno],
|
||||
(regno+0x08)*2,state->m_vidregs[regno+0x08],
|
||||
(regno+0x10)*2,state->m_vidregs[regno+0x10]);
|
||||
|
||||
logerror("reg%03X=%04X reg%03X=%04X reg%03X=%04X\n",
|
||||
regno*2,state->m_vidregs[regno],
|
||||
(regno+0x08)*2,state->m_vidregs[regno+0x08],
|
||||
(regno+0x10)*2,state->m_vidregs[regno+0x10]);
|
||||
}
|
||||
}
|
||||
|
||||
void rmnimbus_state::video_start()
|
||||
{
|
||||
m_debug_video=0;
|
||||
|
||||
logerror("video_start\n");
|
||||
|
||||
m_screen->register_screen_bitmap(m_video_mem);
|
||||
|
||||
save_item(NAME(m_vidregs));
|
||||
@ -610,18 +562,6 @@ void rmnimbus_state::video_start()
|
||||
if (machine().debug_flags & DEBUG_FLAG_ENABLED)
|
||||
{
|
||||
debug_console_register_command(machine(), "nimbus_vid_debug", CMDFLAG_NONE, 0, 0, 1, video_debug);
|
||||
debug_console_register_command(machine(), "nimbus_vid_regdump", CMDFLAG_NONE, 0, 0, 1, video_regdump);
|
||||
}
|
||||
}
|
||||
|
||||
PALETTE_INIT_MEMBER(rmnimbus_state, rmnimbus)
|
||||
{
|
||||
int colourno;
|
||||
|
||||
for ( colourno = 0; colourno < SCREEN_NO_COLOURS; colourno++ )
|
||||
{
|
||||
int i = (colourno & 8) >> 3;
|
||||
palette.set_pen_color(colourno, pal2bit((colourno & 2) | i), pal2bit(((colourno & 4) >> 1) | i), pal2bit(((colourno & 1) << 1) | i));
|
||||
}
|
||||
}
|
||||
|
||||
@ -629,9 +569,6 @@ void rmnimbus_state::video_reset()
|
||||
{
|
||||
// When we reset clear the video registers and video memory.
|
||||
memset(&m_vidregs,0x00,sizeof(m_vidregs));
|
||||
|
||||
m_bpp=4; // bits per pixel
|
||||
logerror("Video reset\n");
|
||||
}
|
||||
|
||||
UINT32 rmnimbus_state::screen_update_nimbus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user