mirror of
https://github.com/holub/mame
synced 2025-06-15 00:47:03 +03:00
drivers starting with i, j, k, l and m: more macro removal (nw)
This commit is contained in:
parent
c7d667d41a
commit
d4c772bcc7
@ -203,22 +203,22 @@ void l7a1045_sound_device::sound_stream_update(sound_stream &stream, stream_samp
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}
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// TODO: needs proper memory map
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WRITE16_MEMBER( l7a1045_sound_device::l7a1045_sound_w )
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void l7a1045_sound_device::l7a1045_sound_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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m_stream->update(); // TODO
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//logerror("%s: %x to %x (mask %04x)\n", tag(), data, offset, mem_mask);
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if(offset == 0)
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sound_select_w(space, offset, data, mem_mask);
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sound_select_w(offset, data, mem_mask);
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else if(offset == 8/2)
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sound_status_w(space, offset, data, mem_mask);
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sound_status_w(data);
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else
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sound_data_w(space,offset - 1,data,mem_mask);
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sound_data_w(offset - 1,data);
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}
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READ16_MEMBER( l7a1045_sound_device::l7a1045_sound_r )
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uint16_t l7a1045_sound_device::l7a1045_sound_r(offs_t offset, uint16_t mem_mask)
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{
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m_stream->update();
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@ -227,13 +227,13 @@ READ16_MEMBER( l7a1045_sound_device::l7a1045_sound_r )
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if(offset == 0)
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printf("sound_select_r?\n");
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else
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return sound_data_r(space,offset -1,mem_mask);
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return sound_data_r(offset -1);
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return 0xffff;
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}
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WRITE16_MEMBER(l7a1045_sound_device::sound_select_w)
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void l7a1045_sound_device::sound_select_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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// I'm guessing these addresses are the sound chip / DSP?
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@ -256,7 +256,7 @@ WRITE16_MEMBER(l7a1045_sound_device::sound_select_w)
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}
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WRITE16_MEMBER(l7a1045_sound_device::sound_data_w)
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void l7a1045_sound_device::sound_data_w(offs_t offset, uint16_t data)
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{
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l7a1045_voice *vptr = &m_voice[m_audiochannel];
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@ -326,7 +326,7 @@ WRITE16_MEMBER(l7a1045_sound_device::sound_data_w)
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}
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READ16_MEMBER(l7a1045_sound_device::sound_data_r)
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uint16_t l7a1045_sound_device::sound_data_r(offs_t offset)
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{
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//printf("%04x (%04x %04x)\n",offset,m_audioregister,m_audiochannel);
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//machine().debug_break();
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@ -354,7 +354,7 @@ READ16_MEMBER(l7a1045_sound_device::sound_data_r)
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return 0;
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}
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WRITE16_MEMBER(l7a1045_sound_device::sound_status_w)
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void l7a1045_sound_device::sound_status_w(uint16_t data)
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{
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if(data & 0x100) // keyin
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{
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@ -382,7 +382,7 @@ WRITE_LINE_MEMBER(l7a1045_sound_device::dma_hreq_cb)
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// m_maincpu->hack_w(1);
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}
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READ8_MEMBER(l7a1045_sound_device::dma_r_cb)
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uint8_t l7a1045_sound_device::dma_r_cb(offs_t offset)
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{
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// logerror("dma_ior3_cb: offset %x\n", offset);
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@ -390,7 +390,7 @@ READ8_MEMBER(l7a1045_sound_device::dma_r_cb)
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return 0;
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}
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WRITE8_MEMBER(l7a1045_sound_device::dma_w_cb)
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void l7a1045_sound_device::dma_w_cb(offs_t offset, uint8_t data)
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{
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m_voice[0].pos++;
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// logerror("dma_iow3_cb: offset %x\n", offset);
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@ -19,11 +19,11 @@ public:
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// void set_base(int8_t* base) { m_base = base; }
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DECLARE_WRITE16_MEMBER( l7a1045_sound_w );
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DECLARE_READ16_MEMBER( l7a1045_sound_r );
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void l7a1045_sound_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
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uint16_t l7a1045_sound_r(offs_t offset, uint16_t mem_mask = ~0);
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DECLARE_READ8_MEMBER(dma_r_cb);
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DECLARE_WRITE8_MEMBER(dma_w_cb);
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uint8_t dma_r_cb(offs_t offset);
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void dma_w_cb(offs_t offset, uint8_t data);
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uint16_t dma_r16_cb() { m_voice[0].pos++; return 0; }
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void dma_w16_cb(uint16_t data) { m_voice[0].pos++; }
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DECLARE_WRITE_LINE_MEMBER(dma_hreq_cb);
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@ -63,10 +63,10 @@ private:
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l7a1045_48bit_data m_audiodat[0x10][0x20];
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DECLARE_WRITE16_MEMBER(sound_select_w);
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DECLARE_WRITE16_MEMBER(sound_data_w);
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DECLARE_READ16_MEMBER(sound_data_r);
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DECLARE_WRITE16_MEMBER(sound_status_w);
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void sound_select_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
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void sound_data_w(offs_t offset, uint16_t data);
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uint16_t sound_data_r(offs_t offset);
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void sound_status_w(uint16_t data);
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};
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DECLARE_DEVICE_TYPE(L7A1045, l7a1045_sound_device)
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@ -202,7 +202,7 @@ WRITE16_MEMBER(hng64_state::hng64_sound_port_0008_w)
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/* TODO: huh? */
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m_audiocpu->dreq_w<3>(data&0x1);
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m_dsp->l7a1045_sound_w(space,8/2,data,mem_mask);
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m_dsp->l7a1045_sound_w(8/2,data,mem_mask);
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// m_audiocpu->hack_w(1);
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}
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@ -152,14 +152,14 @@ public:
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void ibm6580(machine_config &config);
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private:
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DECLARE_WRITE16_MEMBER(pic_latch_w);
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DECLARE_WRITE16_MEMBER(unk_latch_w);
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void pic_latch_w(uint16_t data);
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void unk_latch_w(uint16_t data);
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DECLARE_WRITE8_MEMBER(p40_w);
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DECLARE_READ8_MEMBER(p40_r);
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void p40_w(offs_t offset, uint8_t data);
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uint8_t p40_r(offs_t offset);
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DECLARE_WRITE8_MEMBER(video_w);
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DECLARE_READ8_MEMBER(video_r);
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void video_w(offs_t offset, uint8_t data);
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uint8_t video_r(offs_t offset);
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DECLARE_WRITE_LINE_MEMBER(vblank_w);
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uint8_t ppi_a_r();
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@ -171,12 +171,11 @@ private:
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DECLARE_WRITE_LINE_MEMBER(kb_clock_w);
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DECLARE_WRITE_LINE_MEMBER(kb_strobe_w);
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DECLARE_WRITE8_MEMBER(floppy_w);
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DECLARE_READ8_MEMBER(floppy_r);
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void floppy_w(offs_t offset, uint8_t data);
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uint8_t floppy_r(offs_t offset);
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DECLARE_FLOPPY_FORMATS(floppy_formats);
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DECLARE_WRITE_LINE_MEMBER(floppy_intrq);
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DECLARE_WRITE_LINE_MEMBER(floppy_hdl);
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DECLARE_WRITE8_MEMBER(dmapg_w);
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DECLARE_WRITE_LINE_MEMBER(hrq_w);
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uint8_t memory_read_byte(offs_t offset);
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void memory_write_byte(offs_t offset, uint8_t data);
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@ -220,7 +219,7 @@ private:
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};
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WRITE8_MEMBER(ibm6580_state::p40_w)
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void ibm6580_state::p40_w(offs_t offset, uint8_t data)
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{
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LOG("___ %02x <- %02x\n", 0x40 + (offset << 1), data);
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@ -261,7 +260,7 @@ WRITE8_MEMBER(ibm6580_state::p40_w)
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}
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}
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READ8_MEMBER(ibm6580_state::p40_r)
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uint8_t ibm6580_state::p40_r(offs_t offset)
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{
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uint8_t data = 0;
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@ -283,7 +282,7 @@ READ8_MEMBER(ibm6580_state::p40_r)
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return data;
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}
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WRITE8_MEMBER(ibm6580_state::video_w)
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void ibm6580_state::video_w(offs_t offset, uint8_t data)
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{
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LOG("Video %02x <- %02x\n", 0xe000 + (offset << 1), data);
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@ -296,7 +295,7 @@ WRITE8_MEMBER(ibm6580_state::video_w)
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}
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}
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READ8_MEMBER(ibm6580_state::video_r)
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uint8_t ibm6580_state::video_r(offs_t offset)
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{
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uint8_t data = 0;
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@ -331,7 +330,7 @@ WRITE_LINE_MEMBER(ibm6580_state::vblank_w)
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m_p40 |= 4;
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}
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WRITE16_MEMBER(ibm6580_state::pic_latch_w)
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void ibm6580_state::pic_latch_w(uint16_t data)
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{
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LOG("PIC latch <- %02x\n", data);
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@ -348,7 +347,7 @@ WRITE16_MEMBER(ibm6580_state::pic_latch_w)
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m_pic8259->ir7_w(data == 2 ? ASSERT_LINE : CLEAR_LINE);
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}
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WRITE16_MEMBER(ibm6580_state::unk_latch_w)
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void ibm6580_state::unk_latch_w(uint16_t data)
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{
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LOG("UNK latch <- %02x\n", data);
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@ -599,7 +598,7 @@ uint8_t ibm6580_state::floppy_mcu_command()
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return data;
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}
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WRITE8_MEMBER(ibm6580_state::floppy_w)
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void ibm6580_state::floppy_w(offs_t offset, uint8_t data)
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{
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LOG("Floppy %02x <- %02x\n", 0x8150 + (offset << 1), data);
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@ -629,7 +628,7 @@ WRITE8_MEMBER(ibm6580_state::floppy_w)
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}
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}
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READ8_MEMBER(ibm6580_state::floppy_r)
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uint8_t ibm6580_state::floppy_r(offs_t offset)
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{
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uint8_t data = 0;
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@ -66,15 +66,15 @@ private:
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DECLARE_WRITE_LINE_MEMBER(out2_changed);
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DECLARE_WRITE_LINE_MEMBER(keyb_interrupt);
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DECLARE_WRITE8_MEMBER(pc_nmi_enable_w);
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DECLARE_READ8_MEMBER(pcjr_nmi_enable_r);
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void pc_nmi_enable_w(uint8_t data);
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uint8_t pcjr_nmi_enable_r();
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DECLARE_WRITE_LINE_MEMBER(pic8259_set_int_line);
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void pcjr_ppi_portb_w(uint8_t data);
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uint8_t pcjr_ppi_portc_r();
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DECLARE_WRITE8_MEMBER(pcjr_fdc_dor_w);
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DECLARE_READ8_MEMBER(pcjx_port_1ff_r);
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DECLARE_WRITE8_MEMBER(pcjx_port_1ff_w);
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void pcjr_fdc_dor_w(uint8_t data);
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uint8_t pcjx_port_1ff_r();
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void pcjx_port_1ff_w(uint8_t data);
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void pcjx_set_bank(int unk1, int unk2, int unk3);
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image_init_result load_cart(device_image_interface &image, generic_slot_device *slot);
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@ -310,14 +310,14 @@ WRITE_LINE_MEMBER(pcjr_state::keyb_interrupt)
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}
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}
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READ8_MEMBER(pcjr_state::pcjr_nmi_enable_r)
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uint8_t pcjr_state::pcjr_nmi_enable_r()
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{
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m_latch = 0;
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m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
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return m_nmi_enabled;
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}
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WRITE8_MEMBER(pcjr_state::pc_nmi_enable_w)
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void pcjr_state::pc_nmi_enable_w(uint8_t data)
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{
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m_nmi_enabled = data & 0x80;
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m_maincpu->set_input_line(INPUT_LINE_NMI, m_nmi_enabled && m_latch);
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@ -380,7 +380,7 @@ uint8_t pcjr_state::pcjr_ppi_portc_r()
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return data;
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}
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WRITE8_MEMBER(pcjr_state::pcjr_fdc_dor_w)
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void pcjr_state::pcjr_fdc_dor_w(uint8_t data)
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{
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logerror("fdc: dor = %02x\n", data);
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uint8_t pdor = m_pcjr_dor;
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@ -422,7 +422,7 @@ void pcjr_state::pcjx_set_bank(int unk1, int unk2, int unk3)
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logerror("pcjx: 0x1ff 0:%02x 1:%02x 2:%02x\n", unk1, unk2, unk3);
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}
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WRITE8_MEMBER(pcjr_state::pcjx_port_1ff_w)
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void pcjr_state::pcjx_port_1ff_w(uint8_t data)
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{
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switch(m_pcjx_1ff_count) {
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case 0:
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@ -441,7 +441,7 @@ WRITE8_MEMBER(pcjr_state::pcjx_port_1ff_w)
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}
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}
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READ8_MEMBER(pcjr_state::pcjx_port_1ff_r)
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uint8_t pcjr_state::pcjx_port_1ff_r()
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{
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if(m_pcjx_1ff_count == 2)
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pcjx_set_bank(m_pcjx_1ff_bankval, m_pcjx_1ff_bank[m_pcjx_1ff_bankval & 0x1f][0], m_pcjx_1ff_bank[m_pcjx_1ff_bankval & 0x1f][1]);
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@ -46,27 +46,27 @@ protected:
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virtual void machine_reset() override;
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private:
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DECLARE_READ8_MEMBER(magic_string);
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uint8_t magic_string(offs_t offset);
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uint8_t i80c31_p1_r();
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uint8_t i80c31_p3_r();
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void i80c31_p1_w(uint8_t data);
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void i80c31_p3_w(uint8_t data);
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DECLARE_READ8_MEMBER(cn8_extension_r);
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DECLARE_WRITE8_MEMBER(cn8_extension_w);
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uint8_t cn8_extension_r();
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void cn8_extension_w(uint8_t data);
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DECLARE_READ8_MEMBER(modem_r);
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DECLARE_WRITE8_MEMBER(modem_w);
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uint8_t modem_r();
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void modem_w(uint8_t data);
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DECLARE_READ8_MEMBER(ci8_r);
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DECLARE_WRITE8_MEMBER(ci8_w);
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uint8_t ci8_r();
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void ci8_w(uint8_t data);
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DECLARE_READ8_MEMBER(ci15_r);
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DECLARE_WRITE8_MEMBER(ci15_w);
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uint8_t ci15_r();
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void ci15_w(uint8_t data);
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DECLARE_READ8_MEMBER(ci16_r);
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DECLARE_WRITE8_MEMBER(ci16_w);
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uint8_t ci16_r();
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void ci16_w(uint8_t data);
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void icatel_palette(palette_device &palette) const;
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@ -114,7 +114,7 @@ void icatel_state::machine_reset()
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{
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}
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READ8_MEMBER(icatel_state::magic_string)
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uint8_t icatel_state::magic_string(offs_t offset)
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{
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// logerror("read: magic_string, offset=%04X\n", offset);
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char mstr[] = "TP-OK";
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@ -141,14 +141,14 @@ void icatel_state::i80c31_p3_w(uint8_t data)
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//----------------------------------------
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READ8_MEMBER(icatel_state::cn8_extension_r)
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uint8_t icatel_state::cn8_extension_r()
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{
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/* TODO: Implement-me! */
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logerror("read: cn8_extension\n");
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return 0;
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}
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WRITE8_MEMBER(icatel_state::cn8_extension_w)
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void icatel_state::cn8_extension_w(uint8_t data)
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{
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/* TODO: Implement-me! */
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logerror("write: cn8_extension [%02x]\n", data);
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@ -156,14 +156,14 @@ WRITE8_MEMBER(icatel_state::cn8_extension_w)
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//----------------------------------------
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READ8_MEMBER(icatel_state::modem_r)
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uint8_t icatel_state::modem_r()
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{
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/* TODO: Implement-me! */
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logerror("read: modem\n");
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return 0;
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}
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WRITE8_MEMBER(icatel_state::modem_w)
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void icatel_state::modem_w(uint8_t data)
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{
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/* TODO: Implement-me! */
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logerror("write: modem [%02x]\n", data);
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@ -171,14 +171,14 @@ WRITE8_MEMBER(icatel_state::modem_w)
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//----------------------------------------
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READ8_MEMBER(icatel_state::ci8_r)
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uint8_t icatel_state::ci8_r()
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{
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/* TODO: Implement-me! */
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logerror("read: ci8\n");
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return 0;
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}
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WRITE8_MEMBER(icatel_state::ci8_w)
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void icatel_state::ci8_w(uint8_t data)
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{
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/* TODO: Implement-me! */
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logerror("write: ci8 [%02x]\n", data);
|
||||
@ -186,7 +186,7 @@ WRITE8_MEMBER(icatel_state::ci8_w)
|
||||
|
||||
//----------------------------------------
|
||||
|
||||
READ8_MEMBER(icatel_state::ci15_r)
|
||||
uint8_t icatel_state::ci15_r()
|
||||
{
|
||||
/* TODO: Implement-me! */
|
||||
//machine().debug_break();
|
||||
@ -194,7 +194,7 @@ READ8_MEMBER(icatel_state::ci15_r)
|
||||
return (1 << 3) | (1 << 0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(icatel_state::ci15_w)
|
||||
void icatel_state::ci15_w(uint8_t data)
|
||||
{
|
||||
/* TODO: Implement-me! */
|
||||
logerror("write: ci15 [%02x]\n", data);
|
||||
@ -202,7 +202,7 @@ WRITE8_MEMBER(icatel_state::ci15_w)
|
||||
|
||||
//----------------------------------------
|
||||
|
||||
READ8_MEMBER(icatel_state::ci16_r)
|
||||
uint8_t icatel_state::ci16_r()
|
||||
{
|
||||
/* TODO: Implement-me! */
|
||||
// seems to be the card reader.
|
||||
@ -210,7 +210,7 @@ READ8_MEMBER(icatel_state::ci16_r)
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(icatel_state::ci16_w)
|
||||
void icatel_state::ci16_w(uint8_t data)
|
||||
{
|
||||
/* TODO: Implement-me! */
|
||||
// seems to be the card reader.
|
||||
|
@ -69,18 +69,18 @@ public:
|
||||
DECLARE_READ_LINE_MEMBER(hopper_r);
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(reel1_ram_w);
|
||||
DECLARE_WRITE8_MEMBER(reel2_ram_w);
|
||||
DECLARE_WRITE8_MEMBER(reel3_ram_w);
|
||||
DECLARE_WRITE8_MEMBER(reel4_ram_w);
|
||||
DECLARE_WRITE8_MEMBER(bg_scroll_w);
|
||||
DECLARE_WRITE8_MEMBER(fg_tile_w);
|
||||
DECLARE_WRITE8_MEMBER(fg_color_w);
|
||||
void reel1_ram_w(offs_t offset, uint8_t data);
|
||||
void reel2_ram_w(offs_t offset, uint8_t data);
|
||||
void reel3_ram_w(offs_t offset, uint8_t data);
|
||||
void reel4_ram_w(offs_t offset, uint8_t data);
|
||||
void bg_scroll_w(offs_t offset, uint8_t data);
|
||||
void fg_tile_w(offs_t offset, uint8_t data);
|
||||
void fg_color_w(offs_t offset, uint8_t data);
|
||||
void nmi_and_coins_w(uint8_t data);
|
||||
void video_and_leds_w(uint8_t data);
|
||||
void leds_w(uint8_t data);
|
||||
DECLARE_WRITE8_MEMBER(magic_w);
|
||||
DECLARE_READ8_MEMBER(magic_r);
|
||||
void magic_w(offs_t offset, uint8_t data);
|
||||
uint8_t magic_r();
|
||||
|
||||
void show_out();
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank_irq);
|
||||
@ -142,7 +142,7 @@ private:
|
||||
|
||||
|
||||
|
||||
WRITE8_MEMBER(igs009_state::reel1_ram_w)
|
||||
void igs009_state::reel1_ram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_reel1_ram[offset] = data;
|
||||
m_reel1_tilemap->mark_tile_dirty(offset);
|
||||
@ -170,7 +170,7 @@ TILE_GET_INFO_MEMBER(igs009_state::get_gp98_reel1_tile_info)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(igs009_state::reel2_ram_w)
|
||||
void igs009_state::reel2_ram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_reel2_ram[offset] = data;
|
||||
m_reel2_tilemap->mark_tile_dirty(offset);
|
||||
@ -198,7 +198,7 @@ TILE_GET_INFO_MEMBER(igs009_state::get_gp98_reel2_tile_info)
|
||||
|
||||
|
||||
|
||||
WRITE8_MEMBER(igs009_state::reel3_ram_w)
|
||||
void igs009_state::reel3_ram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_reel3_ram[offset] = data;
|
||||
m_reel3_tilemap->mark_tile_dirty(offset);
|
||||
@ -226,7 +226,7 @@ TILE_GET_INFO_MEMBER(igs009_state::get_gp98_reel3_tile_info)
|
||||
|
||||
|
||||
|
||||
WRITE8_MEMBER(igs009_state::reel4_ram_w)
|
||||
void igs009_state::reel4_ram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_reel4_ram[offset] = data;
|
||||
m_reel4_tilemap->mark_tile_dirty(offset);
|
||||
@ -254,7 +254,7 @@ TILE_GET_INFO_MEMBER(igs009_state::get_gp98_reel4_tile_info)
|
||||
|
||||
|
||||
|
||||
WRITE8_MEMBER(igs009_state::bg_scroll_w)
|
||||
void igs009_state::bg_scroll_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_bg_scroll[offset] = data;
|
||||
// bg_tilemap->set_scrolly(offset,data);
|
||||
@ -267,13 +267,13 @@ TILE_GET_INFO_MEMBER(igs009_state::get_fg_tile_info)
|
||||
tileinfo.set(1, code, (4*(code >> 14)+3), 0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(igs009_state::fg_tile_w)
|
||||
void igs009_state::fg_tile_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_fg_tile_ram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(igs009_state::fg_color_w)
|
||||
void igs009_state::fg_color_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_fg_color_ram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
@ -446,7 +446,7 @@ void igs009_state::leds_w(uint8_t data)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(igs009_state::magic_w)
|
||||
void igs009_state::magic_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_igs_magic[offset] = data;
|
||||
|
||||
@ -464,7 +464,7 @@ WRITE8_MEMBER(igs009_state::magic_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(igs009_state::magic_r)
|
||||
uint8_t igs009_state::magic_r()
|
||||
{
|
||||
switch(m_igs_magic[0])
|
||||
{
|
||||
|
@ -128,16 +128,16 @@ public:
|
||||
DECLARE_READ_LINE_MEMBER(hopper_r);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(igs_irqack_r);
|
||||
DECLARE_WRITE8_MEMBER(igs_irqack_w);
|
||||
DECLARE_WRITE8_MEMBER(bg_tile_w);
|
||||
DECLARE_WRITE8_MEMBER(fg_tile_w);
|
||||
DECLARE_WRITE8_MEMBER(fg_color_w);
|
||||
uint8_t igs_irqack_r();
|
||||
void igs_irqack_w(uint8_t data);
|
||||
void bg_tile_w(offs_t offset, uint8_t data);
|
||||
void fg_tile_w(offs_t offset, uint8_t data);
|
||||
void fg_color_w(offs_t offset, uint8_t data);
|
||||
void igs_nmi_and_coins_w(uint8_t data);
|
||||
DECLARE_WRITE8_MEMBER(igs_lamps_w);
|
||||
DECLARE_READ8_MEMBER(custom_io_r);
|
||||
DECLARE_WRITE8_MEMBER(custom_io_w);
|
||||
DECLARE_READ8_MEMBER(exp_rom_r);
|
||||
void igs_lamps_w(uint8_t data);
|
||||
uint8_t custom_io_r();
|
||||
void custom_io_w(uint8_t data);
|
||||
uint8_t exp_rom_r(offs_t offset);
|
||||
void show_out();
|
||||
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
@ -198,13 +198,13 @@ TIMER_DEVICE_CALLBACK_MEMBER(igspoker_state::igs_interrupt)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(igspoker_state::igs_irqack_r)
|
||||
uint8_t igspoker_state::igs_irqack_r()
|
||||
{
|
||||
m_maincpu->set_input_line(0, CLEAR_LINE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(igspoker_state::igs_irqack_w)
|
||||
void igspoker_state::igs_irqack_w(uint8_t data)
|
||||
{
|
||||
// m_maincpu->set_input_line(0, CLEAR_LINE);
|
||||
}
|
||||
@ -223,19 +223,19 @@ TILE_GET_INFO_MEMBER(igspoker_state::get_fg_tile_info)
|
||||
tileinfo.set(0, code, tile != 0x1fff ? ((code >> 12) & 0xe) + 1 : 0, 0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(igspoker_state::bg_tile_w)
|
||||
void igspoker_state::bg_tile_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_bg_tile_ram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(igspoker_state::fg_tile_w)
|
||||
void igspoker_state::fg_tile_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_fg_tile_ram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(igspoker_state::fg_color_w)
|
||||
void igspoker_state::fg_color_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_fg_color_ram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
@ -299,7 +299,7 @@ void igspoker_state::igs_nmi_and_coins_w(uint8_t data)
|
||||
show_out();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(igspoker_state::igs_lamps_w)
|
||||
void igspoker_state::igs_lamps_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
- Lbits -
|
||||
@ -341,7 +341,7 @@ WRITE8_MEMBER(igspoker_state::igs_lamps_w)
|
||||
|
||||
|
||||
|
||||
READ8_MEMBER(igspoker_state::custom_io_r)
|
||||
uint8_t igspoker_state::custom_io_r()
|
||||
{
|
||||
#if VERBOSE
|
||||
logerror("PC %06X: Protection read %02x\n",m_maincpu->pc(), m_protection_res);
|
||||
@ -349,7 +349,7 @@ READ8_MEMBER(igspoker_state::custom_io_r)
|
||||
return m_protection_res;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(igspoker_state::custom_io_w)
|
||||
void igspoker_state::custom_io_w(uint8_t data)
|
||||
{
|
||||
#if VERBOSE
|
||||
logerror("PC %06X: Protection write %02x\n",m_maincpu->pc(),data);
|
||||
@ -400,7 +400,7 @@ READ_LINE_MEMBER(igspoker_state::hopper_r)
|
||||
return machine().input().code_pressed(KEYCODE_H);
|
||||
}
|
||||
|
||||
READ8_MEMBER(igspoker_state::exp_rom_r)
|
||||
uint8_t igspoker_state::exp_rom_r(offs_t offset)
|
||||
{
|
||||
uint8_t *rom = memregion("maincpu")->base();
|
||||
return rom[offset+0x10000];
|
||||
|
@ -103,14 +103,14 @@ public:
|
||||
void imds2(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(ipc_mem_read);
|
||||
DECLARE_WRITE8_MEMBER(ipc_mem_write);
|
||||
DECLARE_WRITE8_MEMBER(ipc_control_w);
|
||||
uint8_t ipc_mem_read(offs_t offset);
|
||||
void ipc_mem_write(offs_t offset, uint8_t data);
|
||||
void ipc_control_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(ipc_intr_w);
|
||||
DECLARE_READ8_MEMBER(ipcsyspic_r);
|
||||
DECLARE_READ8_MEMBER(ipclocpic_r);
|
||||
DECLARE_WRITE8_MEMBER(ipcsyspic_w);
|
||||
DECLARE_WRITE8_MEMBER(ipclocpic_w);
|
||||
uint8_t ipcsyspic_r(offs_t offset);
|
||||
uint8_t ipclocpic_r(offs_t offset);
|
||||
void ipcsyspic_w(offs_t offset, uint8_t data);
|
||||
void ipclocpic_w(offs_t offset, uint8_t data);
|
||||
|
||||
virtual void driver_start() override;
|
||||
|
||||
@ -168,7 +168,7 @@ imds2_state::imds2_state(const machine_config &mconfig, device_type type, const
|
||||
{
|
||||
}
|
||||
|
||||
READ8_MEMBER(imds2_state::ipc_mem_read)
|
||||
uint8_t imds2_state::ipc_mem_read(offs_t offset)
|
||||
{
|
||||
if (in_ipc_rom(offset)) {
|
||||
return m_ipc_rom[ (offset & 0x07ff) | ((offset & 0x1000) >> 1) ];
|
||||
@ -177,14 +177,14 @@ READ8_MEMBER(imds2_state::ipc_mem_read)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(imds2_state::ipc_mem_write)
|
||||
void imds2_state::ipc_mem_write(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (!in_ipc_rom(offset)) {
|
||||
m_ipc_ram[ offset ] = data;
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(imds2_state::ipc_control_w)
|
||||
void imds2_state::ipc_control_w(uint8_t data)
|
||||
{
|
||||
// See A84, pg 28 of [1]
|
||||
// b3 is ~(bit to be written)
|
||||
@ -197,22 +197,22 @@ WRITE_LINE_MEMBER(imds2_state::ipc_intr_w)
|
||||
m_ipccpu->set_input_line(I8085_INTR_LINE, (state != 0) && m_ipcctrl->q2_r());
|
||||
}
|
||||
|
||||
READ8_MEMBER(imds2_state::ipcsyspic_r)
|
||||
uint8_t imds2_state::ipcsyspic_r(offs_t offset)
|
||||
{
|
||||
return m_ipcsyspic->read(!BIT(offset, 0));
|
||||
}
|
||||
|
||||
READ8_MEMBER(imds2_state::ipclocpic_r)
|
||||
uint8_t imds2_state::ipclocpic_r(offs_t offset)
|
||||
{
|
||||
return m_ipclocpic->read(!BIT(offset, 0));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(imds2_state::ipcsyspic_w)
|
||||
void imds2_state::ipcsyspic_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_ipcsyspic->write(!BIT(offset, 0), data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(imds2_state::ipclocpic_w)
|
||||
void imds2_state::ipclocpic_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_ipclocpic->write(!BIT(offset, 0), data);
|
||||
}
|
||||
|
@ -127,15 +127,15 @@ private:
|
||||
uint8_t m_steerlatch;
|
||||
uint8_t m_draw_mode;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(transmit_data_w);
|
||||
DECLARE_READ8_MEMBER(trigger_slave_nmi_r);
|
||||
DECLARE_READ8_MEMBER(receive_data_r);
|
||||
DECLARE_WRITE8_MEMBER(imola_led_board_w);
|
||||
DECLARE_READ8_MEMBER(vreg_data_r);
|
||||
DECLARE_WRITE8_MEMBER(screenram_w);
|
||||
DECLARE_READ8_MEMBER(imola_draw_mode_r);
|
||||
DECLARE_WRITE8_MEMBER(vreg_control_w);
|
||||
DECLARE_WRITE8_MEMBER(vreg_data_w);
|
||||
void transmit_data_w(offs_t offset, uint8_t data);
|
||||
uint8_t trigger_slave_nmi_r();
|
||||
uint8_t receive_data_r(offs_t offset);
|
||||
void imola_led_board_w(offs_t offset, uint8_t data);
|
||||
uint8_t vreg_data_r();
|
||||
void screenram_w(offs_t offset, uint8_t data);
|
||||
uint8_t imola_draw_mode_r(offs_t offset);
|
||||
void vreg_control_w(uint8_t data);
|
||||
void vreg_data_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank_irq);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(imolagp_pot_callback);
|
||||
|
||||
@ -259,17 +259,17 @@ WRITE_LINE_MEMBER(imolagp_state::vblank_irq)
|
||||
* Handling the NMI takes more time than triggering the NMI, implying that the slave CPU either runs at
|
||||
* a higher clock, or has a way to force the main CPU to wait.
|
||||
*/
|
||||
WRITE8_MEMBER(imolagp_state::transmit_data_w)
|
||||
void imolagp_state::transmit_data_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_comms_latch[offset] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(imolagp_state::receive_data_r)
|
||||
uint8_t imolagp_state::receive_data_r(offs_t offset)
|
||||
{
|
||||
return m_comms_latch[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER(imolagp_state::trigger_slave_nmi_r)
|
||||
uint8_t imolagp_state::trigger_slave_nmi_r()
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
m_slavecpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
|
||||
@ -277,7 +277,7 @@ READ8_MEMBER(imolagp_state::trigger_slave_nmi_r)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(imolagp_state::imola_led_board_w)
|
||||
void imolagp_state::imola_led_board_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
// not sure what chip is used here, this is copied from turbo.c
|
||||
static const uint8_t ls48_map[16] =
|
||||
@ -301,12 +301,12 @@ WRITE8_MEMBER(imolagp_state::imola_led_board_w)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(imolagp_state::vreg_control_w)
|
||||
void imolagp_state::vreg_control_w(uint8_t data)
|
||||
{
|
||||
m_vcontrol = data & 0xf;
|
||||
}
|
||||
|
||||
READ8_MEMBER(imolagp_state::vreg_data_r)
|
||||
uint8_t imolagp_state::vreg_data_r()
|
||||
{
|
||||
// auto-steer related
|
||||
return 0;
|
||||
@ -314,7 +314,7 @@ READ8_MEMBER(imolagp_state::vreg_data_r)
|
||||
//return 0x17; // it checks for this too
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(imolagp_state::vreg_data_w)
|
||||
void imolagp_state::vreg_data_w(uint8_t data)
|
||||
{
|
||||
// $07: always $ff?
|
||||
// $0e: x scroll
|
||||
@ -323,7 +323,7 @@ WRITE8_MEMBER(imolagp_state::vreg_data_w)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(imolagp_state::screenram_w)
|
||||
void imolagp_state::screenram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
// when in tunnel: $81/$82 -> sprite ram?
|
||||
if (m_draw_mode & 0x80)
|
||||
@ -338,7 +338,7 @@ WRITE8_MEMBER(imolagp_state::screenram_w)
|
||||
m_videoram[0][offset] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(imolagp_state::imola_draw_mode_r)
|
||||
uint8_t imolagp_state::imola_draw_mode_r(offs_t offset)
|
||||
{
|
||||
// the game reads a port before and after writing to screen ram
|
||||
m_draw_mode = offset;
|
||||
|
@ -38,9 +38,9 @@ public:
|
||||
|
||||
private:
|
||||
void kbd_put(u8 data);
|
||||
DECLARE_READ8_MEMBER(keyin_r);
|
||||
DECLARE_READ8_MEMBER(status_r);
|
||||
DECLARE_WRITE8_MEMBER(control_w);
|
||||
uint8_t keyin_r();
|
||||
uint8_t status_r();
|
||||
void control_w(uint8_t data);
|
||||
|
||||
void imsai_io(address_map &map);
|
||||
void imsai_mem(address_map &map);
|
||||
@ -79,14 +79,14 @@ void imsai_state::imsai_io(address_map &map)
|
||||
static INPUT_PORTS_START( imsai )
|
||||
INPUT_PORTS_END
|
||||
|
||||
READ8_MEMBER( imsai_state::keyin_r )
|
||||
uint8_t imsai_state::keyin_r()
|
||||
{
|
||||
uint8_t ret = m_term_data;
|
||||
m_term_data = 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
READ8_MEMBER( imsai_state::status_r )
|
||||
uint8_t imsai_state::status_r()
|
||||
{
|
||||
return (m_term_data) ? 3 : 1;
|
||||
}
|
||||
@ -96,7 +96,7 @@ void imsai_state::kbd_put(u8 data)
|
||||
m_term_data = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( imsai_state::control_w )
|
||||
void imsai_state::control_w(uint8_t data)
|
||||
{
|
||||
}
|
||||
|
||||
|
@ -77,16 +77,16 @@ private:
|
||||
void ppi60b_w(uint8_t data);
|
||||
void ppi64c_w(uint8_t data);
|
||||
uint8_t sw_r();
|
||||
DECLARE_WRITE8_MEMBER(sw_w);
|
||||
DECLARE_WRITE8_MEMBER(sol_brvteam_w);
|
||||
DECLARE_WRITE8_MEMBER(sol_canasta_w);
|
||||
DECLARE_WRITE8_MEMBER(sn_w);
|
||||
void sw_w(offs_t offset, uint8_t data);
|
||||
void sol_brvteam_w(uint8_t data);
|
||||
void sol_canasta_w(uint8_t data);
|
||||
void sn_w(uint8_t data);
|
||||
uint8_t sndcmd_r();
|
||||
DECLARE_WRITE8_MEMBER(sndbank_w);
|
||||
DECLARE_WRITE8_MEMBER(sndcmd_w);
|
||||
DECLARE_WRITE8_MEMBER(sndcmd_lapbylap_w);
|
||||
DECLARE_WRITE8_MEMBER(lamp_w) { };
|
||||
DECLARE_WRITE8_MEMBER(disp_w);
|
||||
void sndbank_w(uint8_t data);
|
||||
void sndcmd_w(uint8_t data);
|
||||
void sndcmd_lapbylap_w(uint8_t data);
|
||||
void lamp_w(uint8_t data) { };
|
||||
void disp_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(qc7a_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(q9a_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(qc9b_w);
|
||||
@ -1136,23 +1136,23 @@ uint8_t inder_state::sw_r()
|
||||
return m_switches[m_row]->read();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( inder_state::sw_w )
|
||||
void inder_state::sw_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_row = offset;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( inder_state::sn_w )
|
||||
void inder_state::sn_w(uint8_t data)
|
||||
{
|
||||
m_sn->write(bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( inder_state::sndcmd_lapbylap_w )
|
||||
void inder_state::sndcmd_lapbylap_w(uint8_t data)
|
||||
{
|
||||
m_sndcmd = data;
|
||||
m_audiocpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( inder_state::sndcmd_w )
|
||||
void inder_state::sndcmd_w(uint8_t data)
|
||||
{
|
||||
m_sndcmd = data;
|
||||
}
|
||||
@ -1163,7 +1163,7 @@ uint8_t inder_state::sndcmd_r()
|
||||
}
|
||||
|
||||
// "bobinas"
|
||||
WRITE8_MEMBER( inder_state::sol_brvteam_w )
|
||||
void inder_state::sol_brvteam_w(uint8_t data)
|
||||
{
|
||||
if ((data & 0xee) && BIT(data, 4)) // solenoid selected & activated
|
||||
{
|
||||
@ -1188,7 +1188,7 @@ WRITE8_MEMBER( inder_state::sol_brvteam_w )
|
||||
}
|
||||
|
||||
// no slings in this game
|
||||
WRITE8_MEMBER( inder_state::sol_canasta_w )
|
||||
void inder_state::sol_canasta_w(uint8_t data)
|
||||
{
|
||||
if ((data & 0xee) && BIT(data, 4)) // solenoid selected & activated
|
||||
{
|
||||
@ -1206,7 +1206,7 @@ WRITE8_MEMBER( inder_state::sol_canasta_w )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( inder_state::disp_w )
|
||||
void inder_state::disp_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
uint8_t i;
|
||||
if (offset < 8)
|
||||
@ -1254,7 +1254,7 @@ void inder_state::ppi64c_w(uint8_t data)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( inder_state::sndbank_w )
|
||||
void inder_state::sndbank_w(uint8_t data)
|
||||
{
|
||||
m_sndbank = data;
|
||||
uint8_t i;
|
||||
|
@ -36,8 +36,8 @@ public:
|
||||
|
||||
private:
|
||||
DECLARE_WRITE_LINE_MEMBER(clock_tick);
|
||||
DECLARE_WRITE8_MEMBER(inputs_w);
|
||||
DECLARE_READ8_MEMBER(inputs_r);
|
||||
void inputs_w(offs_t offset, u8 data);
|
||||
u8 inputs_r();
|
||||
|
||||
void maincpu_map(address_map &map);
|
||||
|
||||
@ -174,7 +174,7 @@ static INPUT_PORTS_START( inderp )
|
||||
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
|
||||
INPUT_PORTS_END
|
||||
|
||||
READ8_MEMBER( inderp_state::inputs_r )
|
||||
u8 inderp_state::inputs_r()
|
||||
{
|
||||
if (m_inbank < 10)
|
||||
return m_inputs[m_inbank]->read();
|
||||
@ -183,7 +183,7 @@ READ8_MEMBER( inderp_state::inputs_r )
|
||||
}
|
||||
|
||||
// 0-2 select a dipsw bank; 3-9 select banks of mechanical inputs; A-F not connected
|
||||
WRITE8_MEMBER( inderp_state::inputs_w )
|
||||
void inderp_state::inputs_w(offs_t offset, u8 data)
|
||||
{
|
||||
m_inbank = offset;
|
||||
}
|
||||
|
@ -49,10 +49,10 @@ protected:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
DECLARE_READ32_MEMBER(int_r);
|
||||
DECLARE_WRITE32_MEMBER(int_w);
|
||||
DECLARE_READ32_MEMBER(dsp_ram_r);
|
||||
DECLARE_WRITE32_MEMBER(dsp_ram_w);
|
||||
uint32_t int_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
void int_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
uint32_t dsp_ram_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
void dsp_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
void indigo_map(address_map &map);
|
||||
|
||||
@ -98,7 +98,7 @@ protected:
|
||||
|
||||
void mem_map(address_map &map);
|
||||
|
||||
DECLARE_WRITE64_MEMBER(write_ram);
|
||||
void write_ram(offs_t offset, uint64_t data, uint64_t mem_mask = ~0);
|
||||
|
||||
required_device<r4000_device> m_maincpu;
|
||||
required_device<sgi_mc_device> m_mem_ctrl;
|
||||
@ -123,24 +123,24 @@ void indigo4k_state::machine_reset()
|
||||
membank("bank1")->set_base(m_share1);
|
||||
}
|
||||
|
||||
READ32_MEMBER(indigo_state::int_r)
|
||||
uint32_t indigo_state::int_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_INT, "%s: INT Read: %08x & %08x\n", machine().describe_context(), 0x1fbd9000 + offset*4, mem_mask);
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(indigo_state::int_w)
|
||||
void indigo_state::int_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_INT, "%s: INT Write: %08x = %08x & %08x\n", machine().describe_context(), 0x1fbd9000 + offset*4, data, mem_mask);
|
||||
}
|
||||
|
||||
READ32_MEMBER(indigo_state::dsp_ram_r)
|
||||
uint32_t indigo_state::dsp_ram_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_DSP, "%s: DSP RAM Read: %08x = %08x & %08x\n", machine().describe_context(), 0x1fbe0000 + offset*4, m_dsp_ram[offset], mem_mask);
|
||||
return m_dsp_ram[offset];
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(indigo_state::dsp_ram_w)
|
||||
void indigo_state::dsp_ram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_DSP, "%s: DSP RAM Write: %08x = %08x & %08x\n", machine().describe_context(), 0x1fbe0000 + offset*4, data, mem_mask);
|
||||
m_dsp_ram[offset] = data;
|
||||
@ -161,7 +161,7 @@ void indigo3k_state::mem_map(address_map &map)
|
||||
map(0x1fc00000, 0x1fc3ffff).rom().share("share10").region("user1", 0);
|
||||
}
|
||||
|
||||
WRITE64_MEMBER(indigo4k_state::write_ram)
|
||||
void indigo4k_state::write_ram(offs_t offset, uint64_t data, uint64_t mem_mask)
|
||||
{
|
||||
// if banks 2 or 3 are enabled, do nothing, we don't support that much memory
|
||||
if (m_mem_ctrl->get_mem_config(1) & 0x10001000)
|
||||
|
@ -115,9 +115,9 @@ protected:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
DECLARE_WRITE64_MEMBER(write_ram);
|
||||
template <uint32_t addr_base> DECLARE_READ64_MEMBER(bus_error_r);
|
||||
template <uint32_t addr_base> DECLARE_WRITE64_MEMBER(bus_error_w);
|
||||
void write_ram(offs_t offset, uint64_t data, uint64_t mem_mask = ~0);
|
||||
template <uint32_t addr_base> uint64_t bus_error_r(offs_t offset, uint64_t mem_mask = ~0);
|
||||
template <uint32_t addr_base> void bus_error_w(offs_t offset, uint64_t data, uint64_t mem_mask = ~0);
|
||||
|
||||
uint8_t volume_r(offs_t offset);
|
||||
void volume_w(offs_t offset, uint8_t data);
|
||||
@ -169,7 +169,7 @@ public:
|
||||
void indigo2_4415(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_READ32_MEMBER(eisa_io_r);
|
||||
uint32_t eisa_io_r();
|
||||
|
||||
void wd33c93_2(device_t *device);
|
||||
|
||||
@ -181,7 +181,7 @@ private:
|
||||
};
|
||||
|
||||
template <uint32_t addr_base>
|
||||
READ64_MEMBER(ip24_state::bus_error_r)
|
||||
uint64_t ip24_state::bus_error_r(offs_t offset, uint64_t mem_mask)
|
||||
{
|
||||
logerror("Bus error (read)\n");
|
||||
m_maincpu->bus_error();
|
||||
@ -190,20 +190,20 @@ READ64_MEMBER(ip24_state::bus_error_r)
|
||||
}
|
||||
|
||||
template <uint32_t addr_base>
|
||||
WRITE64_MEMBER(ip24_state::bus_error_w)
|
||||
void ip24_state::bus_error_w(offs_t offset, uint64_t data, uint64_t mem_mask)
|
||||
{
|
||||
logerror("Bus error (write)\n");
|
||||
m_maincpu->bus_error();
|
||||
m_mem_ctrl->set_cpu_buserr(addr_base + (offset << 3), mem_mask);
|
||||
}
|
||||
|
||||
READ32_MEMBER(ip22_state::eisa_io_r)
|
||||
uint32_t ip22_state::eisa_io_r()
|
||||
{
|
||||
return 0xffffffff;
|
||||
}
|
||||
|
||||
// a bit hackish, but makes the memory detection work properly and allows a big cleanup of the mapping
|
||||
WRITE64_MEMBER(ip24_state::write_ram)
|
||||
void ip24_state::write_ram(offs_t offset, uint64_t data, uint64_t mem_mask)
|
||||
{
|
||||
// if banks 2 or 3 are enabled, do nothing, we don't support that much memory
|
||||
if (m_mem_ctrl->get_mem_config(1) & 0x10001000)
|
||||
|
@ -42,8 +42,8 @@ public:
|
||||
void instantm(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(port01_r);
|
||||
DECLARE_WRITE8_MEMBER(port01_w);
|
||||
u8 port01_r();
|
||||
void port01_w(u8 data);
|
||||
DECLARE_WRITE_LINE_MEMBER(clock_w);
|
||||
|
||||
void main_map(address_map &map);
|
||||
@ -58,13 +58,13 @@ private:
|
||||
};
|
||||
|
||||
// return instruction from main cpu
|
||||
READ8_MEMBER( instantm_state::port01_r )
|
||||
u8 instantm_state::port01_r()
|
||||
{
|
||||
return m_port01;
|
||||
}
|
||||
|
||||
// tell maincpu the speech is done
|
||||
WRITE8_MEMBER( instantm_state::port01_w )
|
||||
void instantm_state::port01_w(u8 data)
|
||||
{
|
||||
// bump to next bit of speech for now
|
||||
if ((m_port01 & 15) < 15)
|
||||
|
@ -71,16 +71,16 @@ public:
|
||||
|
||||
private:
|
||||
|
||||
DECLARE_READ8_MEMBER(port_r);
|
||||
DECLARE_READ8_MEMBER(portfc_r);
|
||||
DECLARE_READ8_MEMBER(portfd_r);
|
||||
DECLARE_READ8_MEMBER(portfe_r);
|
||||
uint8_t port_r();
|
||||
uint8_t portfc_r();
|
||||
uint8_t portfd_r();
|
||||
uint8_t portfe_r();
|
||||
DECLARE_READ_LINE_MEMBER(sense_r);
|
||||
DECLARE_WRITE_LINE_MEMBER(flag_w);
|
||||
DECLARE_WRITE8_MEMBER(port_w);
|
||||
DECLARE_WRITE8_MEMBER(portf8_w);
|
||||
DECLARE_WRITE8_MEMBER(portf9_w);
|
||||
DECLARE_WRITE8_MEMBER(portfa_w);
|
||||
void port_w(uint8_t data);
|
||||
void portf8_w(uint8_t data);
|
||||
void portf9_w(uint8_t data);
|
||||
void portfa_w(uint8_t data);
|
||||
DECLARE_QUICKLOAD_LOAD_MEMBER(quickload_cb);
|
||||
INTERRUPT_GEN_MEMBER(t2l_int);
|
||||
void data_map(address_map &map);
|
||||
@ -109,7 +109,7 @@ WRITE_LINE_MEMBER( instruct_state::flag_w )
|
||||
}
|
||||
|
||||
// user port
|
||||
WRITE8_MEMBER( instruct_state::port_w )
|
||||
void instruct_state::port_w(uint8_t data)
|
||||
{
|
||||
char ledname[8];
|
||||
for (int i = 0; i < 8; i++)
|
||||
@ -120,7 +120,7 @@ WRITE8_MEMBER( instruct_state::port_w )
|
||||
}
|
||||
|
||||
// cassette port
|
||||
WRITE8_MEMBER( instruct_state::portf8_w )
|
||||
void instruct_state::portf8_w(uint8_t data)
|
||||
{
|
||||
if (BIT(data, 4))
|
||||
m_cass->output(BIT(data, 3) ? -1.0 : +1.0);
|
||||
@ -131,39 +131,39 @@ WRITE8_MEMBER( instruct_state::portf8_w )
|
||||
}
|
||||
|
||||
// segment output
|
||||
WRITE8_MEMBER( instruct_state::portf9_w )
|
||||
void instruct_state::portf9_w(uint8_t data)
|
||||
{
|
||||
m_seg = data;
|
||||
m_display->matrix(m_digit, m_seg);
|
||||
}
|
||||
|
||||
// digit & keyrow-scan select
|
||||
WRITE8_MEMBER( instruct_state::portfa_w )
|
||||
void instruct_state::portfa_w(uint8_t data)
|
||||
{
|
||||
m_digit = data;
|
||||
m_display->matrix(m_digit, m_seg);
|
||||
}
|
||||
|
||||
// user switches
|
||||
READ8_MEMBER( instruct_state::port_r )
|
||||
uint8_t instruct_state::port_r()
|
||||
{
|
||||
return ioport("USW")->read();
|
||||
}
|
||||
|
||||
// last address register A0-7 copied to 17E9 at boot
|
||||
READ8_MEMBER( instruct_state::portfc_r )
|
||||
uint8_t instruct_state::portfc_r()
|
||||
{
|
||||
return m_lar;
|
||||
}
|
||||
|
||||
// last address register A8-14 copied to 17E8 at boot
|
||||
READ8_MEMBER( instruct_state::portfd_r )
|
||||
uint8_t instruct_state::portfd_r()
|
||||
{
|
||||
return (m_lar >> 8) & 0x7f;
|
||||
}
|
||||
|
||||
// read keyboard
|
||||
READ8_MEMBER( instruct_state::portfe_r )
|
||||
uint8_t instruct_state::portfe_r()
|
||||
{
|
||||
u8 data = 15;
|
||||
|
||||
@ -328,8 +328,7 @@ INPUT_PORTS_END
|
||||
void instruct_state::machine_reset()
|
||||
{
|
||||
m_cassin = 0;
|
||||
address_space &space = m_maincpu->space(AS_IO);
|
||||
port_w(space, 0, 0); // turn round leds off
|
||||
port_w(0); // turn round leds off
|
||||
m_maincpu->set_state_int(S2650_PC, 0x1800);
|
||||
}
|
||||
|
||||
|
@ -63,24 +63,24 @@ class intellec4_state : public driver_device
|
||||
public:
|
||||
void bus_cycle(mcs40_cpu_device_base::phase step, u8 sync, u8 data);
|
||||
|
||||
DECLARE_READ8_MEMBER(pm_read);
|
||||
DECLARE_WRITE8_MEMBER(pm_write);
|
||||
u8 pm_read(offs_t offset);
|
||||
void pm_write(offs_t offset, u8 data);
|
||||
|
||||
DECLARE_READ8_MEMBER(rom0_in);
|
||||
DECLARE_READ8_MEMBER(rom2_in);
|
||||
DECLARE_READ8_MEMBER(rom3_in);
|
||||
DECLARE_READ8_MEMBER(rome_in);
|
||||
DECLARE_READ8_MEMBER(romf_in);
|
||||
u8 rom0_in();
|
||||
u8 rom2_in();
|
||||
u8 rom3_in();
|
||||
u8 rome_in();
|
||||
u8 romf_in();
|
||||
|
||||
DECLARE_WRITE8_MEMBER(rom0_out);
|
||||
DECLARE_WRITE8_MEMBER(rom1_out);
|
||||
DECLARE_WRITE8_MEMBER(rom2_out);
|
||||
DECLARE_WRITE8_MEMBER(rom3_out);
|
||||
DECLARE_WRITE8_MEMBER(rome_out);
|
||||
DECLARE_WRITE8_MEMBER(romf_out);
|
||||
void rom0_out(u8 data);
|
||||
void rom1_out(u8 data);
|
||||
void rom2_out(u8 data);
|
||||
void rom3_out(u8 data);
|
||||
void rome_out(u8 data);
|
||||
void romf_out(u8 data);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(ram0_out);
|
||||
DECLARE_WRITE8_MEMBER(ram1_out);
|
||||
void ram0_out(u8 data);
|
||||
void ram1_out(u8 data);
|
||||
|
||||
// universal slot outputs
|
||||
DECLARE_WRITE_LINE_MEMBER(bus_reset_4002);
|
||||
@ -377,7 +377,7 @@ void intellec4_state::bus_cycle(mcs40_cpu_device_base::phase step, u8 sync, u8 d
|
||||
Program memory access handlers
|
||||
----------------------------------*/
|
||||
|
||||
READ8_MEMBER(intellec4_state::pm_read)
|
||||
u8 intellec4_state::pm_read(offs_t offset)
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
@ -390,7 +390,7 @@ READ8_MEMBER(intellec4_state::pm_read)
|
||||
return m_ram_data & 0x0fU;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(intellec4_state::pm_write)
|
||||
void intellec4_state::pm_write(offs_t offset, u8 data)
|
||||
{
|
||||
// always causes data to be latched
|
||||
u16 const addr((u16(m_ram_page) << 8) | ((offset >> 1) & 0x00ffU));
|
||||
@ -407,83 +407,83 @@ WRITE8_MEMBER(intellec4_state::pm_write)
|
||||
I/O port handlers
|
||||
----------------------------------*/
|
||||
|
||||
READ8_MEMBER(intellec4_state::rom0_in)
|
||||
u8 intellec4_state::rom0_in()
|
||||
{
|
||||
// bit 0 of this port is ANDed with the TTY input
|
||||
return m_tty->rxd_r() ? 0x0eU : 0x0fU;
|
||||
}
|
||||
|
||||
READ8_MEMBER(intellec4_state::rom2_in)
|
||||
u8 intellec4_state::rom2_in()
|
||||
{
|
||||
// lower nybble of PROM programmer data
|
||||
return m_prom_programmer->do_r() & 0x0fU;
|
||||
}
|
||||
|
||||
READ8_MEMBER(intellec4_state::rom3_in)
|
||||
u8 intellec4_state::rom3_in()
|
||||
{
|
||||
// upper nybble of PROM programmer data
|
||||
return (m_prom_programmer->do_r() >> 4) & 0x0fU;
|
||||
}
|
||||
|
||||
READ8_MEMBER(intellec4_state::rome_in)
|
||||
u8 intellec4_state::rome_in()
|
||||
{
|
||||
// upper nybble of RAM data latch
|
||||
return (m_ram_data >> 4) & 0x0fU;
|
||||
}
|
||||
|
||||
READ8_MEMBER(intellec4_state::romf_in)
|
||||
u8 intellec4_state::romf_in()
|
||||
{
|
||||
// lower nybble of RAM data latch
|
||||
return m_ram_data & 0x0fU;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(intellec4_state::rom0_out)
|
||||
void intellec4_state::rom0_out(u8 data)
|
||||
{
|
||||
// lower nybble of PROM programmer address
|
||||
m_prom_addr = (m_prom_addr & 0xf0U) | (data & 0x0fU);
|
||||
m_prom_programmer->a_w(m_prom_addr);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(intellec4_state::rom1_out)
|
||||
void intellec4_state::rom1_out(u8 data)
|
||||
{
|
||||
// upper nybble of PROM programmer address
|
||||
m_prom_addr = (m_prom_addr & 0x0fU) | ((data << 4) & 0xf0U);
|
||||
m_prom_programmer->a_w(m_prom_addr);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(intellec4_state::rom2_out)
|
||||
void intellec4_state::rom2_out(u8 data)
|
||||
{
|
||||
// lower nybble of PROM programmer data
|
||||
m_prom_data = (m_prom_data & 0xf0U) | (data & 0x0fU);
|
||||
m_prom_programmer->di_w(m_prom_data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(intellec4_state::rom3_out)
|
||||
void intellec4_state::rom3_out(u8 data)
|
||||
{
|
||||
// upper nybble of PROM programmer data
|
||||
m_prom_data = (m_prom_data & 0x0fU) | ((data << 4) & 0xf0U);
|
||||
m_prom_programmer->di_w(m_prom_data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(intellec4_state::rome_out)
|
||||
void intellec4_state::rome_out(u8 data)
|
||||
{
|
||||
// bit 0 of this port enables program memory write
|
||||
m_ram_write = BIT(data, 0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(intellec4_state::romf_out)
|
||||
void intellec4_state::romf_out(u8 data)
|
||||
{
|
||||
// sets the program memory page for read/write operations
|
||||
m_ram_page = data & 0x0fU;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(intellec4_state::ram0_out)
|
||||
void intellec4_state::ram0_out(u8 data)
|
||||
{
|
||||
// bit 0 of this port controls the TTY current loop
|
||||
m_tty->write_txd(BIT(data, 0));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(intellec4_state::ram1_out)
|
||||
void intellec4_state::ram1_out(u8 data)
|
||||
{
|
||||
// bit 0 of this port controls the paper tape motor (0 = stop, 1 = run)
|
||||
m_tty->write_rts(BIT(~data, 0));
|
||||
|
@ -141,16 +141,16 @@ public:
|
||||
private:
|
||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
DECLARE_READ16_MEMBER(port3_r);
|
||||
DECLARE_WRITE16_MEMBER(port3_w);
|
||||
DECLARE_READ16_MEMBER(port5_r);
|
||||
DECLARE_WRITE16_MEMBER(port5_w);
|
||||
DECLARE_READ16_MEMBER(port6_r);
|
||||
DECLARE_WRITE16_MEMBER(port6_w);
|
||||
DECLARE_READ16_MEMBER(porta_r);
|
||||
DECLARE_READ16_MEMBER(portg_r);
|
||||
uint16_t port3_r();
|
||||
void port3_w(uint16_t data);
|
||||
uint16_t port5_r();
|
||||
void port5_w(uint16_t data);
|
||||
uint16_t port6_r();
|
||||
void port6_w(uint16_t data);
|
||||
uint16_t porta_r();
|
||||
uint16_t portg_r();
|
||||
|
||||
DECLARE_WRITE16_MEMBER(vctl_w);
|
||||
void vctl_w(uint16_t data);
|
||||
|
||||
void invqix_io_map(address_map &map);
|
||||
void invqix_prg_map(address_map &map);
|
||||
@ -234,47 +234,47 @@ uint32_t invqix_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ16_MEMBER(invqix_state::port3_r)
|
||||
uint16_t invqix_state::port3_r()
|
||||
{
|
||||
return (m_eeprom->do_read() << 5) | 0x03;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(invqix_state::port3_w)
|
||||
void invqix_state::port3_w(uint16_t data)
|
||||
{
|
||||
m_eeprom->cs_write((data >> 2) & 1);
|
||||
m_eeprom->di_write((data >> 4) & 1);
|
||||
m_eeprom->clk_write((data >> 3) & 1);
|
||||
}
|
||||
|
||||
READ16_MEMBER(invqix_state::port5_r)
|
||||
uint16_t invqix_state::port5_r()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(invqix_state::port5_w)
|
||||
void invqix_state::port5_w(uint16_t data)
|
||||
{
|
||||
}
|
||||
|
||||
READ16_MEMBER(invqix_state::port6_r)
|
||||
uint16_t invqix_state::port6_r()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(invqix_state::port6_w)
|
||||
void invqix_state::port6_w(uint16_t data)
|
||||
{
|
||||
}
|
||||
|
||||
READ16_MEMBER(invqix_state::porta_r)
|
||||
uint16_t invqix_state::porta_r()
|
||||
{
|
||||
return 0xf0;
|
||||
}
|
||||
|
||||
READ16_MEMBER(invqix_state::portg_r)
|
||||
uint16_t invqix_state::portg_r()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(invqix_state::vctl_w)
|
||||
void invqix_state::vctl_w(uint16_t data)
|
||||
{
|
||||
m_vctl = data;
|
||||
}
|
||||
|
@ -33,10 +33,10 @@ private:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<i8275_device> m_crtc;
|
||||
required_device<palette_device> m_palette;
|
||||
DECLARE_READ8_MEMBER(ipds_b0_r);
|
||||
DECLARE_READ8_MEMBER(ipds_b1_r);
|
||||
DECLARE_READ8_MEMBER(ipds_c0_r);
|
||||
DECLARE_WRITE8_MEMBER(ipds_b1_w);
|
||||
uint8_t ipds_b0_r();
|
||||
uint8_t ipds_b1_r();
|
||||
uint8_t ipds_c0_r();
|
||||
void ipds_b1_w(uint8_t data);
|
||||
void kbd_put(u8 data);
|
||||
I8275_DRAW_CHARACTER_MEMBER( crtc_display_pixels );
|
||||
uint8_t m_term_data;
|
||||
@ -45,7 +45,7 @@ private:
|
||||
void ipds_mem(address_map &map);
|
||||
};
|
||||
|
||||
READ8_MEMBER( ipds_state::ipds_b0_r )
|
||||
uint8_t ipds_state::ipds_b0_r()
|
||||
{
|
||||
if (m_term_data)
|
||||
return 0xc0;
|
||||
@ -53,16 +53,16 @@ READ8_MEMBER( ipds_state::ipds_b0_r )
|
||||
return 0x80;
|
||||
}
|
||||
|
||||
READ8_MEMBER( ipds_state::ipds_b1_r )
|
||||
uint8_t ipds_state::ipds_b1_r()
|
||||
{
|
||||
uint8_t ret = m_term_data;
|
||||
m_term_data = 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
READ8_MEMBER( ipds_state::ipds_c0_r ) { return 0x55; }
|
||||
uint8_t ipds_state::ipds_c0_r() { return 0x55; }
|
||||
|
||||
WRITE8_MEMBER( ipds_state::ipds_b1_w )
|
||||
void ipds_state::ipds_b1_w(uint8_t data)
|
||||
{
|
||||
}
|
||||
|
||||
|
@ -227,7 +227,7 @@ protected:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
DECLARE_READ32_MEMBER(clock1_r);
|
||||
uint32_t clock1_r(offs_t offset);
|
||||
|
||||
private:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
@ -249,7 +249,7 @@ uint32_t iphone2g_state::screen_update(screen_device &screen, bitmap_rgb32 &bitm
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ32_MEMBER(iphone2g_state::clock1_r)
|
||||
uint32_t iphone2g_state::clock1_r(offs_t offset)
|
||||
{
|
||||
uint32_t ret = 0;
|
||||
switch(offset)
|
||||
|
@ -91,11 +91,11 @@ private:
|
||||
uint8_t keyboard_column_r();
|
||||
uint8_t ppi_portc_r();
|
||||
void ppi_portc_w(uint8_t data);
|
||||
DECLARE_WRITE8_MEMBER(boot_bank_w);
|
||||
DECLARE_READ8_MEMBER(cartslot_r);
|
||||
DECLARE_WRITE8_MEMBER(cartslot_w);
|
||||
DECLARE_READ8_MEMBER(cartslot_io_r);
|
||||
DECLARE_WRITE8_MEMBER(cartslot_io_w);
|
||||
void boot_bank_w(uint8_t data);
|
||||
uint8_t cartslot_r(offs_t offset);
|
||||
void cartslot_w(offs_t offset, uint8_t data);
|
||||
uint8_t cartslot_io_r(offs_t offset);
|
||||
void cartslot_io_w(offs_t offset, uint8_t data);
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
@ -172,7 +172,7 @@ void iq151_state::ppi_portc_w(uint8_t data)
|
||||
m_cassette_data = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(iq151_state::boot_bank_w)
|
||||
void iq151_state::boot_bank_w(uint8_t data)
|
||||
{
|
||||
m_boot_bank->set_entry(data & 1);
|
||||
}
|
||||
@ -182,7 +182,7 @@ WRITE8_MEMBER(iq151_state::boot_bank_w)
|
||||
// Cartridge slot emulation
|
||||
//**************************************************************************
|
||||
|
||||
READ8_MEMBER(iq151_state::cartslot_r)
|
||||
uint8_t iq151_state::cartslot_r(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0xff;
|
||||
|
||||
@ -192,13 +192,13 @@ READ8_MEMBER(iq151_state::cartslot_r)
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(iq151_state::cartslot_w)
|
||||
void iq151_state::cartslot_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
for (auto & elem : m_carts)
|
||||
elem->write(offset, data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(iq151_state::cartslot_io_r)
|
||||
uint8_t iq151_state::cartslot_io_r(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0xff;
|
||||
|
||||
@ -208,7 +208,7 @@ READ8_MEMBER(iq151_state::cartslot_io_r)
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(iq151_state::cartslot_io_w)
|
||||
void iq151_state::cartslot_io_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
for (auto & elem : m_carts)
|
||||
elem->io_write(offset, data);
|
||||
|
@ -94,38 +94,38 @@ private:
|
||||
void geometry_pipe_map(address_map &map);
|
||||
void fpa_map(address_map &map);
|
||||
|
||||
DECLARE_READ32_MEMBER(mmu_r);
|
||||
DECLARE_WRITE32_MEMBER(mmu_w);
|
||||
uint32_t mmu_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
void mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
DECLARE_READ8_MEMBER(mouse_buttons_r);
|
||||
DECLARE_WRITE8_MEMBER(mouse_buttons_w);
|
||||
DECLARE_READ16_MEMBER(mouse_quad_r);
|
||||
DECLARE_WRITE16_MEMBER(mouse_quad_w);
|
||||
DECLARE_READ16_MEMBER(dips_r);
|
||||
DECLARE_READ8_MEMBER(clock_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(clock_ctrl_w);
|
||||
DECLARE_READ8_MEMBER(clock_data_r);
|
||||
DECLARE_WRITE8_MEMBER(clock_data_w);
|
||||
DECLARE_READ8_MEMBER(kernel_base_r);
|
||||
DECLARE_WRITE8_MEMBER(kernel_base_w);
|
||||
DECLARE_READ16_MEMBER(status_r);
|
||||
DECLARE_WRITE16_MEMBER(status_w);
|
||||
DECLARE_READ8_MEMBER(parity_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(parity_ctrl_w);
|
||||
DECLARE_READ8_MEMBER(multibus_prot_r);
|
||||
DECLARE_WRITE8_MEMBER(multibus_prot_w);
|
||||
DECLARE_READ32_MEMBER(page_table_map_r);
|
||||
DECLARE_WRITE32_MEMBER(page_table_map_w);
|
||||
DECLARE_READ16_MEMBER(text_data_base_r);
|
||||
DECLARE_WRITE16_MEMBER(text_data_base_w);
|
||||
DECLARE_READ16_MEMBER(text_data_limit_r);
|
||||
DECLARE_WRITE16_MEMBER(text_data_limit_w);
|
||||
DECLARE_READ16_MEMBER(stack_base_r);
|
||||
DECLARE_WRITE16_MEMBER(stack_base_w);
|
||||
DECLARE_READ16_MEMBER(stack_limit_r);
|
||||
DECLARE_WRITE16_MEMBER(stack_limit_w);
|
||||
DECLARE_READ8_MEMBER(romboard_r);
|
||||
DECLARE_WRITE8_MEMBER(romboard_w);
|
||||
uint8_t mouse_buttons_r();
|
||||
void mouse_buttons_w(uint8_t data);
|
||||
uint16_t mouse_quad_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void mouse_quad_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t dips_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
uint8_t clock_ctrl_r();
|
||||
void clock_ctrl_w(uint8_t data);
|
||||
uint8_t clock_data_r();
|
||||
void clock_data_w(uint8_t data);
|
||||
uint8_t kernel_base_r(offs_t offset);
|
||||
void kernel_base_w(offs_t offset, uint8_t data);
|
||||
uint16_t status_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void status_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint8_t parity_ctrl_r();
|
||||
void parity_ctrl_w(uint8_t data);
|
||||
uint8_t multibus_prot_r();
|
||||
void multibus_prot_w(uint8_t data);
|
||||
uint32_t page_table_map_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
void page_table_map_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
uint16_t text_data_base_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void text_data_base_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t text_data_limit_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void text_data_limit_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t stack_base_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void stack_base_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t stack_limit_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void stack_limit_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint8_t romboard_r(offs_t offset);
|
||||
void romboard_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(duarta_irq_handler);
|
||||
DECLARE_WRITE_LINE_MEMBER(duartb_irq_handler);
|
||||
|
||||
@ -228,7 +228,7 @@ QUICKLOAD_LOAD_MEMBER(iris3000_state::load_romboard)
|
||||
MACHINE FUNCTIONS
|
||||
***************************************************************************/
|
||||
|
||||
READ32_MEMBER(iris3000_state::mmu_r)
|
||||
uint32_t iris3000_state::mmu_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
const uint8_t type = (offset >> 26) & 0xf;
|
||||
const uint32_t vaddr = offset & 0x03ffffff;
|
||||
@ -273,7 +273,7 @@ READ32_MEMBER(iris3000_state::mmu_r)
|
||||
return ret;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(iris3000_state::mmu_w)
|
||||
void iris3000_state::mmu_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
const uint8_t type = (offset >> 26) & 0xf;
|
||||
const uint32_t vaddr = offset & 0x03ffffff;
|
||||
@ -315,62 +315,62 @@ WRITE32_MEMBER(iris3000_state::mmu_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(iris3000_state::mouse_buttons_r)
|
||||
uint8_t iris3000_state::mouse_buttons_r()
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: mouse_buttons_r: %02x\n", machine().describe_context(), m_mouse_buttons | BOARD_REV1);
|
||||
return m_mouse_buttons | BOARD_REV1;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(iris3000_state::mouse_buttons_w)
|
||||
void iris3000_state::mouse_buttons_w(uint8_t data)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: mouse_buttons_w (ignored): %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
READ16_MEMBER(iris3000_state::mouse_quad_r)
|
||||
uint16_t iris3000_state::mouse_quad_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: mouse_quad_r: %04x & %04x\n", machine().describe_context(), m_mouse_quadrature, mem_mask);
|
||||
return m_mouse_quadrature;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(iris3000_state::mouse_quad_w)
|
||||
void iris3000_state::mouse_quad_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: mouse_quad_w (ignored): %04x & %04x\n", machine().describe_context(), data, mem_mask);
|
||||
}
|
||||
|
||||
READ16_MEMBER(iris3000_state::dips_r)
|
||||
uint16_t iris3000_state::dips_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
const uint16_t data = m_dips->read();
|
||||
LOGMASKED(LOG_OTHER, "%s: dips_r: %04x & %04x\n", machine().describe_context(), data, mem_mask);
|
||||
return data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(iris3000_state::clock_ctrl_r)
|
||||
uint8_t iris3000_state::clock_ctrl_r()
|
||||
{
|
||||
const uint8_t data = m_rtc->read(1);
|
||||
LOGMASKED(LOG_RTC, "%s: clock_ctrl_r: %02x\n", machine().describe_context(), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(iris3000_state::clock_ctrl_w)
|
||||
void iris3000_state::clock_ctrl_w(uint8_t data)
|
||||
{
|
||||
LOGMASKED(LOG_RTC, "%s: clock_ctrl_w: %02x\n", machine().describe_context(), data);
|
||||
m_rtc->write(1, data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(iris3000_state::clock_data_r)
|
||||
uint8_t iris3000_state::clock_data_r()
|
||||
{
|
||||
uint8_t data = m_rtc->read(0);
|
||||
LOGMASKED(LOG_RTC, "%s: clock_data_r: %02x\n", machine().describe_context(), data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(iris3000_state::clock_data_w)
|
||||
void iris3000_state::clock_data_w(uint8_t data)
|
||||
{
|
||||
LOGMASKED(LOG_RTC, "%s: clock_data_w: %02x\n", machine().describe_context(), data);
|
||||
m_rtc->write(0, data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(iris3000_state::kernel_base_r)
|
||||
uint8_t iris3000_state::kernel_base_r(offs_t offset)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
@ -381,7 +381,7 @@ READ8_MEMBER(iris3000_state::kernel_base_r)
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(iris3000_state::kernel_base_w)
|
||||
void iris3000_state::kernel_base_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
@ -391,13 +391,13 @@ WRITE8_MEMBER(iris3000_state::kernel_base_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER(iris3000_state::status_r)
|
||||
uint16_t iris3000_state::status_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: status_r: %04x & %04x\n", machine().describe_context(), m_status, mem_mask);
|
||||
return m_status;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(iris3000_state::status_w)
|
||||
void iris3000_state::status_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: status_w: %04x & %04x (DIAG:%x, ENABEXT:%d, ENABINT:%d, BINIT:%d, NOTBOOT:%d)\n", machine().describe_context(), data, mem_mask,
|
||||
data & 0xf, BIT(data, STATUS_ENABEXT), BIT(data, STATUS_ENABINT), BIT(data, STATUS_BINIT), BIT(data, STATUS_NOTBOOT));
|
||||
@ -408,101 +408,101 @@ WRITE16_MEMBER(iris3000_state::status_w)
|
||||
COMBINE_DATA(&m_status);
|
||||
}
|
||||
|
||||
READ8_MEMBER(iris3000_state::parity_ctrl_r)
|
||||
uint8_t iris3000_state::parity_ctrl_r()
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: parity_ctrl_r: %02x\n", m_parity_ctrl);
|
||||
return m_parity_ctrl;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(iris3000_state::parity_ctrl_w)
|
||||
void iris3000_state::parity_ctrl_w(uint8_t data)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: parity_ctrl_w: %02x\n", machine().describe_context(), data);
|
||||
m_parity_ctrl = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(iris3000_state::multibus_prot_r)
|
||||
uint8_t iris3000_state::multibus_prot_r()
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: multibus_prot_r: %02x\n", machine().describe_context(), m_multibus_prot);
|
||||
return m_multibus_prot;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(iris3000_state::multibus_prot_w)
|
||||
void iris3000_state::multibus_prot_w(uint8_t data)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: multibus_prot_w: %02x\n", machine().describe_context(), data);
|
||||
m_multibus_prot = data;
|
||||
}
|
||||
|
||||
READ32_MEMBER(iris3000_state::page_table_map_r)
|
||||
uint32_t iris3000_state::page_table_map_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: page_table_map_r: %08x = %08x & %08x\n", machine().describe_context(), 0x3b000000 + (offset << 2), m_page_table_map[offset], mem_mask);
|
||||
return m_page_table_map[offset];
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(iris3000_state::page_table_map_w)
|
||||
void iris3000_state::page_table_map_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: page_table_map_w: %08x = %08x & %08x\n", machine().describe_context(), 0x3b000000 + (offset << 2), data, mem_mask);
|
||||
COMBINE_DATA(&m_page_table_map[offset]);
|
||||
}
|
||||
|
||||
READ16_MEMBER(iris3000_state::text_data_base_r)
|
||||
uint16_t iris3000_state::text_data_base_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: text_data_base_r: %04x & %04x\n", machine().describe_context(), m_text_data_base, mem_mask);
|
||||
return m_text_data_base;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(iris3000_state::text_data_base_w)
|
||||
void iris3000_state::text_data_base_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: text_data_base_w: %04x & %04x\n", machine().describe_context(), data, mem_mask);
|
||||
COMBINE_DATA(&m_text_data_base);
|
||||
}
|
||||
|
||||
|
||||
READ16_MEMBER(iris3000_state::text_data_limit_r)
|
||||
uint16_t iris3000_state::text_data_limit_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: text_data_limit_r: %04x & %04x\n", machine().describe_context(), m_text_data_limit, mem_mask);
|
||||
return m_text_data_limit;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(iris3000_state::text_data_limit_w)
|
||||
void iris3000_state::text_data_limit_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: text_data_limit_w: %04x & %04x\n", machine().describe_context(), data, mem_mask);
|
||||
COMBINE_DATA(&m_text_data_limit);
|
||||
}
|
||||
|
||||
|
||||
READ16_MEMBER(iris3000_state::stack_base_r)
|
||||
uint16_t iris3000_state::stack_base_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: stack_base_r: %04x & %04x\n", machine().describe_context(), m_stack_base, mem_mask);
|
||||
return m_stack_base;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(iris3000_state::stack_base_w)
|
||||
void iris3000_state::stack_base_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: stack_base_w: %04x & %04x\n", machine().describe_context(), data, mem_mask);
|
||||
COMBINE_DATA(&m_stack_base);
|
||||
}
|
||||
|
||||
|
||||
READ16_MEMBER(iris3000_state::stack_limit_r)
|
||||
uint16_t iris3000_state::stack_limit_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: stack_limit_r: %04x & %04x\n", machine().describe_context(), m_stack_limit, mem_mask);
|
||||
return m_stack_limit;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(iris3000_state::stack_limit_w)
|
||||
void iris3000_state::stack_limit_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
LOGMASKED(LOG_OTHER, "%s: stack_limit_w: %04x & %04x\n", machine().describe_context(), data, mem_mask);
|
||||
COMBINE_DATA(&m_stack_limit);
|
||||
}
|
||||
|
||||
READ8_MEMBER(iris3000_state::romboard_r)
|
||||
uint8_t iris3000_state::romboard_r(offs_t offset)
|
||||
{
|
||||
const uint8_t data = offset < m_file_data.size() ? m_file_data[offset] : 0;
|
||||
LOGMASKED(LOG_OTHER, "%s: romboard_r: %08x = %02x\n", machine().describe_context(), 0x40000000 + offset, data);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(iris3000_state::romboard_w)
|
||||
void iris3000_state::romboard_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset > m_file_data.size())
|
||||
m_file_data.resize(offset + 1);
|
||||
|
@ -64,12 +64,12 @@ private:
|
||||
// DECLARE_WRITE_LINE_MEMBER(isbc_uart8274_irq);
|
||||
uint8_t get_slave_ack(offs_t offset);
|
||||
void ppi_c_w(uint8_t data);
|
||||
DECLARE_WRITE8_MEMBER(upperen_w);
|
||||
DECLARE_READ16_MEMBER(bioslo_r);
|
||||
DECLARE_WRITE16_MEMBER(bioslo_w);
|
||||
void upperen_w(uint8_t data);
|
||||
uint16_t bioslo_r(offs_t offset);
|
||||
void bioslo_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(edge_intr_clear_w);
|
||||
DECLARE_WRITE8_MEMBER(status_register_w);
|
||||
void edge_intr_clear_w(uint8_t data);
|
||||
void status_register_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(nmi_mask_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(bus_intr_out1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(bus_intr_out2_w);
|
||||
@ -267,12 +267,12 @@ void isbc_state::ppi_c_w(uint8_t data)
|
||||
m_pic_1->ir7_w(0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(isbc_state::upperen_w)
|
||||
void isbc_state::upperen_w(uint8_t data)
|
||||
{
|
||||
m_upperen = true;
|
||||
}
|
||||
|
||||
READ16_MEMBER(isbc_state::bioslo_r)
|
||||
uint16_t isbc_state::bioslo_r(offs_t offset)
|
||||
{
|
||||
if(m_upperen)
|
||||
return m_biosram[offset];
|
||||
@ -281,7 +281,7 @@ READ16_MEMBER(isbc_state::bioslo_r)
|
||||
return 0xffff;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(isbc_state::bioslo_w)
|
||||
void isbc_state::bioslo_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if(m_upperen)
|
||||
COMBINE_DATA(&m_biosram[offset]);
|
||||
@ -295,12 +295,12 @@ WRITE_LINE_MEMBER(isbc_state::isbc_uart8274_irq)
|
||||
}
|
||||
#endif
|
||||
|
||||
WRITE8_MEMBER(isbc_state::edge_intr_clear_w)
|
||||
void isbc_state::edge_intr_clear_w(uint8_t data)
|
||||
{
|
||||
// reset U32 flipflop
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(isbc_state::status_register_w)
|
||||
void isbc_state::status_register_w(uint8_t data)
|
||||
{
|
||||
m_megabyte_page = (data & 0xf0) << 16;
|
||||
m_statuslatch->write_bit(data & 0x07, BIT(data, 3));
|
||||
|
@ -51,9 +51,9 @@ private:
|
||||
required_shared_ptr<uint8_t> m_tile_ram;
|
||||
required_shared_ptr<uint8_t> m_tile_control_ram;
|
||||
required_shared_ptr<uint8_t> m_sprite_ram;
|
||||
DECLARE_READ8_MEMBER(z80_2_ldp_read);
|
||||
DECLARE_READ8_MEMBER(z80_2_unknown_read);
|
||||
DECLARE_WRITE8_MEMBER(z80_2_ldp_write);
|
||||
uint8_t z80_2_ldp_read();
|
||||
uint8_t z80_2_unknown_read();
|
||||
void z80_2_ldp_write(uint8_t data);
|
||||
virtual void machine_start() override;
|
||||
uint32_t screen_update_istellar(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank_irq);
|
||||
@ -111,20 +111,20 @@ void istellar_state::machine_start()
|
||||
|
||||
|
||||
/* Z80 2 R/W */
|
||||
READ8_MEMBER(istellar_state::z80_2_ldp_read)
|
||||
uint8_t istellar_state::z80_2_ldp_read()
|
||||
{
|
||||
uint8_t readResult = m_laserdisc->status_r();
|
||||
logerror("CPU2 : reading LDP : %x\n", readResult);
|
||||
return readResult;
|
||||
}
|
||||
|
||||
READ8_MEMBER(istellar_state::z80_2_unknown_read)
|
||||
uint8_t istellar_state::z80_2_unknown_read()
|
||||
{
|
||||
logerror("CPU2 : c000!\n");
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(istellar_state::z80_2_ldp_write)
|
||||
void istellar_state::z80_2_ldp_write(uint8_t data)
|
||||
{
|
||||
logerror("CPU2 : writing LDP : 0x%x\n", data);
|
||||
m_laserdisc->data_w(data);
|
||||
|
@ -157,17 +157,17 @@ protected:
|
||||
private:
|
||||
void istrebiteli_palette(palette_device &palette) const;
|
||||
void motogonki_palette(palette_device &palette) const;
|
||||
DECLARE_READ8_MEMBER(ppi0_r);
|
||||
DECLARE_WRITE8_MEMBER(ppi0_w);
|
||||
DECLARE_READ8_MEMBER(ppi1_r);
|
||||
DECLARE_WRITE8_MEMBER(ppi1_w);
|
||||
uint8_t ppi0_r(offs_t offset);
|
||||
void ppi0_w(offs_t offset, uint8_t data);
|
||||
uint8_t ppi1_r(offs_t offset);
|
||||
void ppi1_w(offs_t offset, uint8_t data);
|
||||
void sound_w(uint8_t data);
|
||||
void spr0_ctrl_w(uint8_t data);
|
||||
void spr1_ctrl_w(uint8_t data);
|
||||
DECLARE_WRITE8_MEMBER(spr_xy_w);
|
||||
DECLARE_WRITE8_MEMBER(moto_spr_xy_w);
|
||||
DECLARE_WRITE8_MEMBER(tileram_w);
|
||||
DECLARE_WRITE8_MEMBER(moto_tileram_w);
|
||||
void spr_xy_w(offs_t offset, uint8_t data);
|
||||
void moto_spr_xy_w(offs_t offset, uint8_t data);
|
||||
void tileram_w(offs_t offset, uint8_t data);
|
||||
void moto_tileram_w(offs_t offset, uint8_t data);
|
||||
void road_ctrl_w(uint8_t data);
|
||||
DECLARE_VIDEO_START(moto);
|
||||
|
||||
@ -349,14 +349,14 @@ uint32_t istrebiteli_state::moto_screen_update(screen_device &screen, bitmap_ind
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(istrebiteli_state::tileram_w)
|
||||
void istrebiteli_state::tileram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
offset ^= 15;
|
||||
m_tileram[offset] = data;
|
||||
m_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(istrebiteli_state::moto_tileram_w)
|
||||
void istrebiteli_state::moto_tileram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_tileram[offset] = data ^ 0xff;
|
||||
m_tilemap->mark_tile_dirty(offset);
|
||||
@ -367,19 +367,19 @@ void istrebiteli_state::road_ctrl_w(uint8_t data)
|
||||
m_road_scroll = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(istrebiteli_state::ppi0_r)
|
||||
uint8_t istrebiteli_state::ppi0_r(offs_t offset)
|
||||
{
|
||||
return m_ppi0->read(offset ^ 3) ^ 0xff;
|
||||
}
|
||||
WRITE8_MEMBER(istrebiteli_state::ppi0_w)
|
||||
void istrebiteli_state::ppi0_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_ppi0->write(offset ^ 3, data ^ 0xff);
|
||||
}
|
||||
READ8_MEMBER(istrebiteli_state::ppi1_r)
|
||||
uint8_t istrebiteli_state::ppi1_r(offs_t offset)
|
||||
{
|
||||
return m_ppi1->read(offset ^ 3) ^ 0xff;
|
||||
}
|
||||
WRITE8_MEMBER(istrebiteli_state::ppi1_w)
|
||||
void istrebiteli_state::ppi1_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_ppi1->write(offset ^ 3, data ^ 0xff);
|
||||
}
|
||||
@ -406,12 +406,12 @@ void istrebiteli_state::spr1_ctrl_w(uint8_t data)
|
||||
m_spr_collision[1] = 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(istrebiteli_state::spr_xy_w)
|
||||
void istrebiteli_state::spr_xy_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_spr_xy[offset ^ 7] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(istrebiteli_state::moto_spr_xy_w)
|
||||
void istrebiteli_state::moto_spr_xy_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_spr_xy[offset] = data;
|
||||
}
|
||||
|
@ -241,17 +241,17 @@ private:
|
||||
// screen updates
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
DECLARE_READ8_MEMBER(vsync_r);
|
||||
DECLARE_WRITE8_MEMBER( beep_w );
|
||||
DECLARE_WRITE8_MEMBER(bank_w);
|
||||
uint8_t vsync_r();
|
||||
void beep_w(uint8_t data);
|
||||
void bank_w(uint8_t data);
|
||||
DECLARE_READ_LINE_MEMBER(kbd_matrix_r);
|
||||
void kbd_matrix_w(uint8_t data);
|
||||
uint8_t kbd_port2_r();
|
||||
void kbd_port2_w(uint8_t data);
|
||||
DECLARE_READ8_MEMBER(fdc_r);
|
||||
DECLARE_WRITE8_MEMBER(fdc_w);
|
||||
DECLARE_READ8_MEMBER(fdc_stat_r);
|
||||
DECLARE_WRITE8_MEMBER(fdc_cmd_w);
|
||||
uint8_t fdc_r(offs_t offset);
|
||||
void fdc_w(offs_t offset, uint8_t data);
|
||||
uint8_t fdc_stat_r();
|
||||
void fdc_cmd_w(uint8_t data);
|
||||
DECLARE_FLOPPY_FORMATS(itt3030_floppy_formats);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(fdcirq_w);
|
||||
@ -466,7 +466,7 @@ INPUT_PORTS_END
|
||||
// VIDEO
|
||||
//**************************************************************************
|
||||
|
||||
READ8_MEMBER(itt3030_state::vsync_r)
|
||||
uint8_t itt3030_state::vsync_r()
|
||||
{
|
||||
uint8_t ret = 0;
|
||||
|
||||
@ -483,7 +483,7 @@ READ8_MEMBER(itt3030_state::vsync_r)
|
||||
return ret;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(itt3030_state::bank_w)
|
||||
void itt3030_state::bank_w(uint8_t data)
|
||||
{
|
||||
int bank = 8;
|
||||
|
||||
@ -543,7 +543,7 @@ void itt3030_state::itt3030_palette(palette_device &palette) const
|
||||
// SOUND
|
||||
//**************************************************************************
|
||||
|
||||
WRITE8_MEMBER( itt3030_state::beep_w )
|
||||
void itt3030_state::beep_w(uint8_t data)
|
||||
{
|
||||
m_beep->set_state(data&1);
|
||||
}
|
||||
@ -578,7 +578,7 @@ WRITE_LINE_MEMBER(itt3030_state::fdchld_w)
|
||||
1 Write protect (the disk in the selected drive is write protected)
|
||||
0 HLT (Halt signal during head load and track change)
|
||||
*/
|
||||
READ8_MEMBER(itt3030_state::fdc_stat_r)
|
||||
uint8_t itt3030_state::fdc_stat_r()
|
||||
{
|
||||
uint8_t res = 0;
|
||||
floppy_image_device *floppy1 = m_floppy[0] ? m_floppy[0]->get_device() : nullptr;
|
||||
@ -597,12 +597,12 @@ READ8_MEMBER(itt3030_state::fdc_stat_r)
|
||||
}
|
||||
|
||||
/* As far as we can tell, the mess of ttl de-inverts the bus */
|
||||
READ8_MEMBER(itt3030_state::fdc_r)
|
||||
uint8_t itt3030_state::fdc_r(offs_t offset)
|
||||
{
|
||||
return m_fdc->read(offset) ^ 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(itt3030_state::fdc_w)
|
||||
void itt3030_state::fdc_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_fdc->write(offset, data ^ 0xff);
|
||||
}
|
||||
@ -617,7 +617,7 @@ WRITE8_MEMBER(itt3030_state::fdc_w)
|
||||
1 KOMP - write comp on/off
|
||||
0 RG J - Change separator stage to read
|
||||
*/
|
||||
WRITE8_MEMBER(itt3030_state::fdc_cmd_w)
|
||||
void itt3030_state::fdc_cmd_w(uint8_t data)
|
||||
{
|
||||
floppy_image_device *floppy = nullptr;
|
||||
|
||||
|
@ -80,18 +80,18 @@ public:
|
||||
DECLARE_READ_LINE_MEMBER(hopper_r);
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(fg_tile_w);
|
||||
DECLARE_WRITE8_MEMBER(fg_color_w);
|
||||
template<uint8_t Which> DECLARE_WRITE8_MEMBER(reel_ram_w);
|
||||
void fg_tile_w(offs_t offset, uint8_t data);
|
||||
void fg_color_w(offs_t offset, uint8_t data);
|
||||
template<uint8_t Which> void reel_ram_w(offs_t offset, uint8_t data);
|
||||
|
||||
void nmi_and_coins_w(uint8_t data);
|
||||
void lamps_w(uint8_t data);
|
||||
DECLARE_READ8_MEMBER(igs_irqack_r);
|
||||
DECLARE_WRITE8_MEMBER(igs_irqack_w);
|
||||
DECLARE_READ8_MEMBER(expram_r);
|
||||
uint8_t igs_irqack_r();
|
||||
void igs_irqack_w(uint8_t data);
|
||||
uint8_t expram_r(offs_t offset);
|
||||
|
||||
template<uint8_t Which> DECLARE_WRITE8_MEMBER(unk_reg_lo_w);
|
||||
template<uint8_t Which> DECLARE_WRITE8_MEMBER(unk_reg_hi_w);
|
||||
template<uint8_t Which> void unk_reg_lo_w(offs_t offset, uint8_t data);
|
||||
template<uint8_t Which> void unk_reg_hi_w(offs_t offset, uint8_t data);
|
||||
void show_out();
|
||||
|
||||
TILE_GET_INFO_MEMBER(get_fg_tile_info);
|
||||
@ -137,20 +137,20 @@ TILE_GET_INFO_MEMBER(jackie_state::get_fg_tile_info)
|
||||
tileinfo.set(0, code, tile != 0x1fff ? ((code >> 12) & 0xe) + 1 : 0, 0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jackie_state::fg_tile_w)
|
||||
void jackie_state::fg_tile_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_fg_tile_ram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jackie_state::fg_color_w)
|
||||
void jackie_state::fg_color_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_fg_color_ram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
template<uint8_t Which>
|
||||
WRITE8_MEMBER(jackie_state::reel_ram_w)
|
||||
void jackie_state::reel_ram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_reel_ram[Which][offset] = data;
|
||||
m_reel_tilemap[Which]->mark_tile_dirty(offset);
|
||||
@ -259,7 +259,7 @@ void jackie_state::show_out()
|
||||
}
|
||||
|
||||
template<uint8_t Which>
|
||||
WRITE8_MEMBER(jackie_state::unk_reg_lo_w)
|
||||
void jackie_state::unk_reg_lo_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_unk_reg[Which][offset] &= 0xff00;
|
||||
m_unk_reg[Which][offset] |= data;
|
||||
@ -267,7 +267,7 @@ WRITE8_MEMBER(jackie_state::unk_reg_lo_w)
|
||||
}
|
||||
|
||||
template<uint8_t Which>
|
||||
WRITE8_MEMBER(jackie_state::unk_reg_hi_w)
|
||||
void jackie_state::unk_reg_hi_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_unk_reg[Which][offset] &= 0xff;
|
||||
m_unk_reg[Which][offset] |= data << 8;
|
||||
@ -316,20 +316,20 @@ void jackie_state::lamps_w(uint8_t data)
|
||||
show_out();
|
||||
}
|
||||
|
||||
READ8_MEMBER(jackie_state::igs_irqack_r)
|
||||
uint8_t jackie_state::igs_irqack_r()
|
||||
{
|
||||
m_irq_enable = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jackie_state::igs_irqack_w)
|
||||
void jackie_state::igs_irqack_w(uint8_t data)
|
||||
{
|
||||
// m_maincpu->set_input_line(0, CLEAR_LINE);
|
||||
m_out[2] = data;
|
||||
show_out();
|
||||
}
|
||||
|
||||
READ8_MEMBER(jackie_state::expram_r)
|
||||
uint8_t jackie_state::expram_r(offs_t offset)
|
||||
{
|
||||
uint8_t *rom = memregion("gfx3")->base();
|
||||
|
||||
|
@ -48,7 +48,7 @@ protected:
|
||||
virtual void video_start() override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(jackpool_io_r);
|
||||
uint8_t jackpool_io_r(offs_t offset);
|
||||
DECLARE_WRITE_LINE_MEMBER(map_vreg_w);
|
||||
uint32_t screen_update_jackpool(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(jackpool_interrupt);
|
||||
@ -111,7 +111,7 @@ uint32_t jackpool_state::screen_update_jackpool(screen_device &screen, bitmap_in
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ8_MEMBER(jackpool_state::jackpool_io_r)
|
||||
uint8_t jackpool_state::jackpool_io_r(offs_t offset)
|
||||
{
|
||||
switch(offset*2)
|
||||
{
|
||||
|
@ -136,18 +136,18 @@ public:
|
||||
m_dsw_io(*this, "DSW")
|
||||
{ }
|
||||
|
||||
DECLARE_WRITE8_MEMBER(tilebank_w);
|
||||
DECLARE_WRITE8_MEMBER(okirom_w);
|
||||
DECLARE_WRITE8_MEMBER(okibank_w);
|
||||
DECLARE_WRITE8_MEMBER(flip_screen_w);
|
||||
DECLARE_READ16_MEMBER(urashima_mcu_r);
|
||||
DECLARE_WRITE16_MEMBER(urashima_mcu_w);
|
||||
DECLARE_READ16_MEMBER(daireika_mcu_r);
|
||||
DECLARE_WRITE16_MEMBER(daireika_mcu_w);
|
||||
DECLARE_READ16_MEMBER(mjzoomin_mcu_r);
|
||||
DECLARE_WRITE16_MEMBER(mjzoomin_mcu_w);
|
||||
DECLARE_READ16_MEMBER(kakumei_mcu_r);
|
||||
DECLARE_READ16_MEMBER(suchiesp_mcu_r);
|
||||
void tilebank_w(uint8_t data);
|
||||
void okirom_w(uint8_t data);
|
||||
void okibank_w(uint8_t data);
|
||||
void flip_screen_w(uint8_t data);
|
||||
uint16_t urashima_mcu_r();
|
||||
void urashima_mcu_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t daireika_mcu_r();
|
||||
void daireika_mcu_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t mjzoomin_mcu_r();
|
||||
void mjzoomin_mcu_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t kakumei_mcu_r();
|
||||
uint16_t suchiesp_mcu_r();
|
||||
void init_suchiesp();
|
||||
void init_kakumei();
|
||||
void init_urashima();
|
||||
@ -231,14 +231,14 @@ public:
|
||||
m_gfxdecode(*this, "gfxdecode")
|
||||
{}
|
||||
|
||||
template<int TileChip> DECLARE_READ16_MEMBER(urashima_vregs_r);
|
||||
template<int TileChip> DECLARE_WRITE16_MEMBER(urashima_vregs_w);
|
||||
template<int TileChip> uint16_t urashima_vregs_r(offs_t offset);
|
||||
template<int TileChip> void urashima_vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
template<int TileChip> DECLARE_READ16_MEMBER(urashima_vram_r);
|
||||
template<int TileChip> DECLARE_WRITE16_MEMBER(urashima_vram_w);
|
||||
template<int TileChip> uint16_t urashima_vram_r(offs_t offset);
|
||||
template<int TileChip> void urashima_vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
DECLARE_WRITE16_MEMBER(urashima_vreg_log_w);
|
||||
DECLARE_WRITE8_MEMBER(urashima_priority_w);
|
||||
void urashima_vreg_log_w(offs_t offset, uint16_t data);
|
||||
void urashima_priority_w(uint8_t data);
|
||||
|
||||
template<int TileChip> TILE_GET_INFO_MEMBER(get_tile_info_urashima);
|
||||
|
||||
@ -246,7 +246,7 @@ public:
|
||||
void urashima_map(address_map &map);
|
||||
|
||||
uint32_t screen_update_urashima(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
DECLARE_WRITE8_MEMBER(urashima_bank_w);
|
||||
void urashima_bank_w(uint8_t data);
|
||||
|
||||
protected:
|
||||
virtual void video_start() override;
|
||||
@ -420,7 +420,7 @@ uint32_t urashima_state::screen_update_urashima(screen_device &screen, bitmap_in
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jalmah_state::tilebank_w)
|
||||
void jalmah_state::tilebank_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
--xx ---- fg bank (used by suchiesp)
|
||||
@ -438,7 +438,7 @@ WRITE8_MEMBER(jalmah_state::tilebank_w)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(urashima_state::urashima_bank_w)
|
||||
void urashima_state::urashima_bank_w(uint8_t data)
|
||||
{
|
||||
if (m_tile_bank != (data & 0x03))
|
||||
{
|
||||
@ -451,39 +451,39 @@ WRITE8_MEMBER(urashima_state::urashima_bank_w)
|
||||
}
|
||||
|
||||
template<int TileChip>
|
||||
READ16_MEMBER(urashima_state::urashima_vram_r)
|
||||
uint16_t urashima_state::urashima_vram_r(offs_t offset)
|
||||
{
|
||||
return m_videoram[TileChip][offset];
|
||||
}
|
||||
|
||||
template<int TileChip>
|
||||
WRITE16_MEMBER(urashima_state::urashima_vram_w)
|
||||
void urashima_state::urashima_vram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_videoram[TileChip][offset]);
|
||||
m_layer[TileChip]->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
template<int TileChip>
|
||||
READ16_MEMBER(urashima_state::urashima_vregs_r)
|
||||
uint16_t urashima_state::urashima_vregs_r(offs_t offset)
|
||||
{
|
||||
return m_vreg[TileChip][offset];
|
||||
}
|
||||
|
||||
template<int TileChip>
|
||||
WRITE16_MEMBER(urashima_state::urashima_vregs_w)
|
||||
void urashima_state::urashima_vregs_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_vreg[TileChip][offset]);
|
||||
}
|
||||
|
||||
// Urashima Mahjong uses a bigger video register area (mostly mirrored?)
|
||||
// we use this fallback so that it doesn't pollute logerror and get the info we want
|
||||
WRITE16_MEMBER(urashima_state::urashima_vreg_log_w)
|
||||
void urashima_state::urashima_vreg_log_w(offs_t offset, uint16_t data)
|
||||
{
|
||||
if(data)
|
||||
logerror("Warning vreg write to [%04x] -> %04x\n",offset*2,data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(urashima_state::urashima_priority_w)
|
||||
void urashima_state::urashima_priority_w(uint8_t data)
|
||||
{
|
||||
m_pri = data & 1;
|
||||
}
|
||||
@ -629,7 +629,7 @@ Basic driver start
|
||||
******************************************************************************************/
|
||||
|
||||
|
||||
WRITE8_MEMBER(jalmah_state::okirom_w)
|
||||
void jalmah_state::okirom_w(uint8_t data)
|
||||
{
|
||||
m_oki_rom = data & 1;
|
||||
|
||||
@ -642,7 +642,7 @@ WRITE8_MEMBER(jalmah_state::okirom_w)
|
||||
//popmessage("PC=%06x %02x %02x %02x %08x",m_maincpu->pc(),m_oki_rom,m_oki_za,m_oki_bank,(m_oki_rom * 0x80000) + ((m_oki_bank+m_oki_za) * 0x20000) + 0x40000);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jalmah_state::okibank_w)
|
||||
void jalmah_state::okibank_w(uint8_t data)
|
||||
{
|
||||
m_oki_bank = data & 3;
|
||||
|
||||
@ -652,7 +652,7 @@ WRITE8_MEMBER(jalmah_state::okibank_w)
|
||||
//popmessage("PC=%06x %02x %02x %02x %08x",m_maincpu->pc(),m_oki_rom,m_oki_za,m_oki_bank,(m_oki_rom * 0x80000) + ((m_oki_bank+m_oki_za) * 0x20000) + 0x40000);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jalmah_state::flip_screen_w)
|
||||
void jalmah_state::flip_screen_w(uint8_t data)
|
||||
{
|
||||
/*---- ----x flip screen*/
|
||||
flip_screen_set(data & 1);
|
||||
@ -1476,7 +1476,7 @@ MCU code snippets
|
||||
|
||||
******************************************************************************************/
|
||||
|
||||
READ16_MEMBER(jalmah_state::urashima_mcu_r)
|
||||
uint16_t jalmah_state::urashima_mcu_r()
|
||||
{
|
||||
static const int resp[] = { 0x99, 0xd8, 0x00,
|
||||
0x2a, 0x6a, 0x00,
|
||||
@ -1507,7 +1507,7 @@ READ16_MEMBER(jalmah_state::urashima_mcu_r)
|
||||
/*
|
||||
data value is REQ under mjzoomin video test menu. Is it related to the MCU?
|
||||
*/
|
||||
WRITE16_MEMBER(jalmah_state::urashima_mcu_w)
|
||||
void jalmah_state::urashima_mcu_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if(ACCESSING_BITS_0_7 && data)
|
||||
{
|
||||
@ -1535,7 +1535,7 @@ WRITE16_MEMBER(jalmah_state::urashima_mcu_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER(jalmah_state::daireika_mcu_r)
|
||||
uint16_t jalmah_state::daireika_mcu_r()
|
||||
{
|
||||
static const int resp[] = { 0x99, 0xd8, 0x00,
|
||||
0x2a, 0x6a, 0x00,
|
||||
@ -1557,7 +1557,7 @@ READ16_MEMBER(jalmah_state::daireika_mcu_r)
|
||||
return res;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(jalmah_state::daireika_mcu_w)
|
||||
void jalmah_state::daireika_mcu_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if(ACCESSING_BITS_0_7 && data)
|
||||
{
|
||||
@ -1604,7 +1604,7 @@ WRITE16_MEMBER(jalmah_state::daireika_mcu_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER(jalmah_state::mjzoomin_mcu_r)
|
||||
uint16_t jalmah_state::mjzoomin_mcu_r()
|
||||
{
|
||||
static const int resp[] = { 0x9c, 0xd8, 0x00,
|
||||
0x2a, 0x6a, 0x00,
|
||||
@ -1628,7 +1628,7 @@ READ16_MEMBER(jalmah_state::mjzoomin_mcu_r)
|
||||
/*
|
||||
data value is REQ under mjzoomin video test menu.It is related to the MCU?
|
||||
*/
|
||||
WRITE16_MEMBER(jalmah_state::mjzoomin_mcu_w)
|
||||
void jalmah_state::mjzoomin_mcu_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if(ACCESSING_BITS_0_7 && data)
|
||||
{
|
||||
@ -1657,7 +1657,7 @@ WRITE16_MEMBER(jalmah_state::mjzoomin_mcu_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER(jalmah_state::kakumei_mcu_r)
|
||||
uint16_t jalmah_state::kakumei_mcu_r()
|
||||
{
|
||||
static const int resp[] = { 0x8a, 0xd8, 0x00,
|
||||
0x3c, 0x7c, 0x00,
|
||||
@ -1678,7 +1678,7 @@ READ16_MEMBER(jalmah_state::kakumei_mcu_r)
|
||||
return res;
|
||||
}
|
||||
|
||||
READ16_MEMBER(jalmah_state::suchiesp_mcu_r)
|
||||
uint16_t jalmah_state::suchiesp_mcu_r()
|
||||
{
|
||||
static const int resp[] = { 0x8a, 0xd8, 0x00,
|
||||
0x3c, 0x7c, 0x00,
|
||||
@ -1701,45 +1701,45 @@ READ16_MEMBER(jalmah_state::suchiesp_mcu_r)
|
||||
|
||||
void jalmah_state::init_urashima()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16_delegate(*this, FUNC(jalmah_state::urashima_mcu_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x80012, 0x80013, write16_delegate(*this, FUNC(jalmah_state::urashima_mcu_w)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16smo_delegate(*this, FUNC(jalmah_state::urashima_mcu_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x80012, 0x80013, write16s_delegate(*this, FUNC(jalmah_state::urashima_mcu_w)));
|
||||
|
||||
m_mcu_prg = URASHIMA_MCU;
|
||||
}
|
||||
|
||||
void jalmah_state::init_daireika()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16_delegate(*this, FUNC(jalmah_state::daireika_mcu_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x80012, 0x80013, write16_delegate(*this, FUNC(jalmah_state::daireika_mcu_w)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16smo_delegate(*this, FUNC(jalmah_state::daireika_mcu_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x80012, 0x80013, write16s_delegate(*this, FUNC(jalmah_state::daireika_mcu_w)));
|
||||
|
||||
m_mcu_prg = DAIREIKA_MCU;
|
||||
}
|
||||
|
||||
void jalmah_state::init_mjzoomin()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16_delegate(*this, FUNC(jalmah_state::mjzoomin_mcu_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x80012, 0x80013, write16_delegate(*this, FUNC(jalmah_state::mjzoomin_mcu_w)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16smo_delegate(*this, FUNC(jalmah_state::mjzoomin_mcu_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x80012, 0x80013, write16s_delegate(*this, FUNC(jalmah_state::mjzoomin_mcu_w)));
|
||||
|
||||
m_mcu_prg = MJZOOMIN_MCU;
|
||||
}
|
||||
|
||||
void jalmah_state::init_kakumei()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16_delegate(*this, FUNC(jalmah_state::kakumei_mcu_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16smo_delegate(*this, FUNC(jalmah_state::kakumei_mcu_r)));
|
||||
|
||||
m_mcu_prg = KAKUMEI_MCU;
|
||||
}
|
||||
|
||||
void jalmah_state::init_kakumei2()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16_delegate(*this, FUNC(jalmah_state::kakumei_mcu_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16smo_delegate(*this, FUNC(jalmah_state::kakumei_mcu_r)));
|
||||
|
||||
m_mcu_prg = KAKUMEI2_MCU;
|
||||
}
|
||||
|
||||
void jalmah_state::init_suchiesp()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16_delegate(*this, FUNC(jalmah_state::suchiesp_mcu_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x80004, 0x80005, read16smo_delegate(*this, FUNC(jalmah_state::suchiesp_mcu_r)));
|
||||
|
||||
m_mcu_prg = SUCHIESP_MCU;
|
||||
}
|
||||
|
@ -99,17 +99,17 @@ private:
|
||||
optional_device<generic_latch_8_device> m_soundlatch;
|
||||
|
||||
/* video-related */
|
||||
DECLARE_WRITE8_MEMBER(mux_w);
|
||||
DECLARE_WRITE8_MEMBER(output_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_latch_w);
|
||||
DECLARE_READ8_MEMBER(sound_latch_r);
|
||||
DECLARE_WRITE8_MEMBER(cvsd_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_w);
|
||||
DECLARE_READ8_MEMBER(master_com_r);
|
||||
DECLARE_WRITE8_MEMBER(master_com_w);
|
||||
DECLARE_READ8_MEMBER(slave_com_r);
|
||||
DECLARE_WRITE8_MEMBER(slave_com_w);
|
||||
DECLARE_READ8_MEMBER(jngolady_rng_r);
|
||||
void mux_w(uint8_t data);
|
||||
void output_w(uint8_t data);
|
||||
void sound_latch_w(uint8_t data);
|
||||
uint8_t sound_latch_r();
|
||||
void cvsd_w(uint8_t data);
|
||||
void adpcm_w(uint8_t data);
|
||||
uint8_t master_com_r();
|
||||
void master_com_w(uint8_t data);
|
||||
uint8_t slave_com_r();
|
||||
void slave_com_w(uint8_t data);
|
||||
uint8_t jngolady_rng_r();
|
||||
uint8_t input_mux_r();
|
||||
|
||||
void jangou_palette(palette_device &palette) const;
|
||||
@ -215,12 +215,12 @@ uint32_t jangou_state::screen_update_jangou(screen_device &screen, bitmap_ind16
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE8_MEMBER(jangou_state::mux_w)
|
||||
void jangou_state::mux_w(uint8_t data)
|
||||
{
|
||||
m_mux_data = ~data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jangou_state::output_w)
|
||||
void jangou_state::output_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
--x- ---- ? (polls between high and low in irq routine, most likely irq mask)
|
||||
@ -255,20 +255,20 @@ uint8_t jangou_state::input_mux_r()
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE8_MEMBER(jangou_state::sound_latch_w)
|
||||
void jangou_state::sound_latch_w(uint8_t data)
|
||||
{
|
||||
m_soundlatch->write(data & 0xff);
|
||||
m_cpu_1->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
|
||||
}
|
||||
|
||||
READ8_MEMBER(jangou_state::sound_latch_r)
|
||||
uint8_t jangou_state::sound_latch_r()
|
||||
{
|
||||
m_cpu_1->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||
return m_soundlatch->read();
|
||||
}
|
||||
|
||||
/* Jangou HC-55516 CVSD */
|
||||
WRITE8_MEMBER(jangou_state::cvsd_w)
|
||||
void jangou_state::cvsd_w(uint8_t data)
|
||||
{
|
||||
m_cvsd_shiftreg = data;
|
||||
}
|
||||
@ -286,7 +286,7 @@ TIMER_CALLBACK_MEMBER(jangou_state::cvsd_bit_timer_callback)
|
||||
|
||||
|
||||
/* Jangou Lady MSM5218 (MSM5205-compatible) ADPCM */
|
||||
WRITE8_MEMBER(jangou_state::adpcm_w)
|
||||
void jangou_state::adpcm_w(uint8_t data)
|
||||
{
|
||||
m_adpcm_byte = data;
|
||||
}
|
||||
@ -311,24 +311,24 @@ WRITE_LINE_MEMBER(jangou_state::jngolady_vclk_cb)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
READ8_MEMBER(jangou_state::master_com_r)
|
||||
uint8_t jangou_state::master_com_r()
|
||||
{
|
||||
return m_z80_latch;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jangou_state::master_com_w)
|
||||
void jangou_state::master_com_w(uint8_t data)
|
||||
{
|
||||
m_nsc->set_input_line(0, ASSERT_LINE);
|
||||
m_nsc_latch = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(jangou_state::slave_com_r)
|
||||
uint8_t jangou_state::slave_com_r()
|
||||
{
|
||||
m_nsc->set_input_line(0, CLEAR_LINE);
|
||||
return m_nsc_latch;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jangou_state::slave_com_w)
|
||||
void jangou_state::slave_com_w(uint8_t data)
|
||||
{
|
||||
m_z80_latch = data;
|
||||
}
|
||||
@ -1358,15 +1358,15 @@ ROM_END
|
||||
*
|
||||
*************************************/
|
||||
|
||||
/*Temporary kludge for make the RNG work*/
|
||||
READ8_MEMBER(jangou_state::jngolady_rng_r)
|
||||
/*Temporary kludge to make the RNG work*/
|
||||
uint8_t jangou_state::jngolady_rng_r()
|
||||
{
|
||||
return machine().rand();
|
||||
}
|
||||
|
||||
void jangou_state::init_jngolady()
|
||||
{
|
||||
m_nsc->space(AS_PROGRAM).install_read_handler(0x08, 0x08, read8_delegate(*this, FUNC(jangou_state::jngolady_rng_r)));
|
||||
m_nsc->space(AS_PROGRAM).install_read_handler(0x08, 0x08, read8smo_delegate(*this, FUNC(jangou_state::jngolady_rng_r)));
|
||||
}
|
||||
|
||||
|
||||
|
@ -132,13 +132,13 @@ private:
|
||||
uint8_t m_col_bank;
|
||||
uint8_t m_display_on;
|
||||
uint8_t m_bitmap[0x8000];
|
||||
DECLARE_READ8_MEMBER(jantotsu_bitmap_r);
|
||||
DECLARE_WRITE8_MEMBER(jantotsu_bitmap_w);
|
||||
DECLARE_WRITE8_MEMBER(bankaddr_w);
|
||||
DECLARE_READ8_MEMBER(jantotsu_mux_r);
|
||||
DECLARE_WRITE8_MEMBER(jantotsu_mux_w);
|
||||
DECLARE_READ8_MEMBER(jantotsu_dsw2_r);
|
||||
DECLARE_WRITE8_MEMBER(jan_adpcm_w);
|
||||
uint8_t jantotsu_bitmap_r(offs_t offset);
|
||||
void jantotsu_bitmap_w(offs_t offset, uint8_t data);
|
||||
void bankaddr_w(uint8_t data);
|
||||
uint8_t jantotsu_mux_r();
|
||||
void jantotsu_mux_w(uint8_t data);
|
||||
uint8_t jantotsu_dsw2_r();
|
||||
void jan_adpcm_w(offs_t offset, uint8_t data);
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
virtual void video_start() override;
|
||||
@ -198,17 +198,17 @@ uint32_t jantotsu_state::screen_update_jantotsu(screen_device &screen, bitmap_rg
|
||||
}
|
||||
|
||||
/* banked vram */
|
||||
READ8_MEMBER(jantotsu_state::jantotsu_bitmap_r)
|
||||
uint8_t jantotsu_state::jantotsu_bitmap_r(offs_t offset)
|
||||
{
|
||||
return m_bitmap[offset + ((m_vram_bank & 3) * 0x2000)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jantotsu_state::jantotsu_bitmap_w)
|
||||
void jantotsu_state::jantotsu_bitmap_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_bitmap[offset + ((m_vram_bank & 3) * 0x2000)] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jantotsu_state::bankaddr_w)
|
||||
void jantotsu_state::bankaddr_w(uint8_t data)
|
||||
{
|
||||
m_vram_bank = ((data & 0xc0) >> 6);
|
||||
|
||||
@ -252,7 +252,7 @@ void jantotsu_state::jantotsu_palette(palette_device &palette) const
|
||||
*************************************/
|
||||
|
||||
/*Multiplexer is mapped as 6-bits reads,bits 6 & 7 are always connected to the coin mechs.*/
|
||||
READ8_MEMBER(jantotsu_state::jantotsu_mux_r)
|
||||
uint8_t jantotsu_state::jantotsu_mux_r()
|
||||
{
|
||||
const char *const portnames[] = { "PL1_1", "PL1_2", "PL1_3", "PL1_4",
|
||||
"PL2_1", "PL2_2", "PL2_3", "PL2_4" };
|
||||
@ -270,7 +270,7 @@ READ8_MEMBER(jantotsu_state::jantotsu_mux_r)
|
||||
return res;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jantotsu_state::jantotsu_mux_w)
|
||||
void jantotsu_state::jantotsu_mux_w(uint8_t data)
|
||||
{
|
||||
m_mux_data = data;
|
||||
}
|
||||
@ -279,12 +279,12 @@ WRITE8_MEMBER(jantotsu_state::jantotsu_mux_w)
|
||||
so I'm guessing that these bits can't be read by the z80 at all but directly
|
||||
hard-wired to the video chip. However I need the schematics / pcb snaps and/or
|
||||
a side-by-side test (to know if the background colors really works) to be sure. */
|
||||
READ8_MEMBER(jantotsu_state::jantotsu_dsw2_r)
|
||||
uint8_t jantotsu_state::jantotsu_dsw2_r()
|
||||
{
|
||||
return (ioport("DSW2")->read() & 0x3f) | 0x80;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jantotsu_state::jan_adpcm_w)
|
||||
void jantotsu_state::jan_adpcm_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
|
@ -215,8 +215,8 @@ private:
|
||||
|
||||
void ctrl_w(u16 data);
|
||||
u16 ctrl_r(offs_t offset);
|
||||
DECLARE_WRITE16_MEMBER(main2sub_cmd_w);
|
||||
DECLARE_WRITE16_MEMBER(sub2main_cmd_w);
|
||||
void main2sub_cmd_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
void sub2main_cmd_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
template<int Chip> void sknsspr_sprite32regs_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
|
||||
virtual void video_start() override;
|
||||
@ -428,14 +428,14 @@ u16 jchan_state::ctrl_r(offs_t offset)
|
||||
***************************************************************************/
|
||||
|
||||
/* communications - hacky! */
|
||||
WRITE16_MEMBER(jchan_state::main2sub_cmd_w)
|
||||
void jchan_state::main2sub_cmd_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_mainsub_shared_ram[0x03ffe/2]);
|
||||
m_subcpu->set_input_line(4, HOLD_LINE);
|
||||
}
|
||||
|
||||
// is this called?
|
||||
WRITE16_MEMBER(jchan_state::sub2main_cmd_w)
|
||||
void jchan_state::sub2main_cmd_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_mainsub_shared_ram[0x0000/2]);
|
||||
m_maincpu->set_input_line(3, HOLD_LINE);
|
||||
@ -709,8 +709,8 @@ ROM_END
|
||||
|
||||
void jchan_state::init_jchan()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x403ffe, 0x403fff, write16_delegate(*this, FUNC(jchan_state::main2sub_cmd_w)));
|
||||
m_subcpu->space(AS_PROGRAM).install_write_handler(0x400000, 0x400001, write16_delegate(*this, FUNC(jchan_state::sub2main_cmd_w)));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x403ffe, 0x403fff, write16s_delegate(*this, FUNC(jchan_state::main2sub_cmd_w)));
|
||||
m_subcpu->space(AS_PROGRAM).install_write_handler(0x400000, 0x400001, write16s_delegate(*this, FUNC(jchan_state::sub2main_cmd_w)));
|
||||
}
|
||||
|
||||
|
||||
|
@ -133,11 +133,11 @@ public:
|
||||
|
||||
uint8_t read_key(required_ioport_array<8> & key, uint8_t mask);
|
||||
|
||||
DECLARE_READ8_MEMBER(console_r);
|
||||
DECLARE_WRITE8_MEMBER(console_w);
|
||||
DECLARE_READ8_MEMBER(console_status_r);
|
||||
uint8_t console_r();
|
||||
void console_w(uint8_t data);
|
||||
uint8_t console_status_r();
|
||||
|
||||
DECLARE_WRITE32_MEMBER(eeprom_93c46_w);
|
||||
void eeprom_93c46_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(scanline_irq);
|
||||
|
||||
@ -165,12 +165,12 @@ public:
|
||||
m_st0020(*this, "st0020")
|
||||
{ }
|
||||
|
||||
DECLARE_WRITE32_MEMBER(input_sel1_out3_w);
|
||||
DECLARE_WRITE32_MEMBER(input_sel2_w);
|
||||
DECLARE_READ32_MEMBER(p1_r);
|
||||
DECLARE_READ32_MEMBER(p2_r);
|
||||
DECLARE_WRITE32_MEMBER(out1_w);
|
||||
DECLARE_WRITE32_MEMBER(out2_w);
|
||||
void input_sel1_out3_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
void input_sel2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
uint32_t p1_r();
|
||||
uint32_t p2_r();
|
||||
void out1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
void out2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
@ -193,22 +193,22 @@ public:
|
||||
required_device<cpu_device> m_soundcpu;
|
||||
required_memory_bank m_soundbank;
|
||||
|
||||
DECLARE_WRITE32_MEMBER(eeprom_s29290_w);
|
||||
void eeprom_s29290_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
// ST-0016 <-> 68EC020
|
||||
DECLARE_READ8_MEMBER(cmd1_r);
|
||||
DECLARE_READ8_MEMBER(cmd2_r);
|
||||
DECLARE_WRITE8_MEMBER(cmd1_w);
|
||||
DECLARE_WRITE8_MEMBER(cmd2_w);
|
||||
DECLARE_READ8_MEMBER(cmd_stat_r);
|
||||
WRITE8_MEMBER(st0016_rom_bank_w); // temp?
|
||||
uint8_t cmd1_r();
|
||||
uint8_t cmd2_r();
|
||||
void cmd1_w(uint8_t data);
|
||||
void cmd2_w(uint8_t data);
|
||||
uint8_t cmd_stat_r();
|
||||
void st0016_rom_bank_w(uint8_t data); // temp?
|
||||
|
||||
// 68EC020 <-> ST-0016
|
||||
DECLARE_READ32_MEMBER(cmd1_word_r);
|
||||
DECLARE_READ32_MEMBER(cmd2_word_r);
|
||||
DECLARE_WRITE32_MEMBER(cmd1_word_w);
|
||||
DECLARE_WRITE32_MEMBER(cmd2_word_w);
|
||||
DECLARE_READ32_MEMBER(cmd_stat_word_r);
|
||||
uint32_t cmd1_word_r();
|
||||
uint32_t cmd2_word_r();
|
||||
void cmd1_word_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
void cmd2_word_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
uint32_t cmd_stat_word_r();
|
||||
|
||||
void init_jclub2o();
|
||||
|
||||
@ -245,12 +245,12 @@ protected:
|
||||
virtual void video_start() override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE32_MEMBER(input_sel_w);
|
||||
DECLARE_READ32_MEMBER(input_r);
|
||||
DECLARE_WRITE32_MEMBER(out1_w);
|
||||
void input_sel_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
uint32_t input_r();
|
||||
void out1_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
DECLARE_WRITE32_MEMBER(tmapram_w);
|
||||
DECLARE_WRITE32_MEMBER(tmapram2_w);
|
||||
void tmapram_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
void tmapram2_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
TILE_GET_INFO_MEMBER(get_tile_info_0);
|
||||
TILE_GET_INFO_MEMBER(get_tile_info_1);
|
||||
@ -279,16 +279,16 @@ private:
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
READ8_MEMBER(common_state::console_r)
|
||||
uint8_t common_state::console_r()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(common_state::console_w)
|
||||
void common_state::console_w(uint8_t data)
|
||||
{
|
||||
}
|
||||
|
||||
READ8_MEMBER(common_state::console_status_r)
|
||||
uint8_t common_state::console_status_r()
|
||||
{
|
||||
// bit 0: 1 = can send to debug console
|
||||
// bi1 1: 1 = can read from debug console
|
||||
@ -353,12 +353,12 @@ TILE_GET_INFO_MEMBER(darkhors_state::get_tile_info_1)
|
||||
tileinfo.set(0, tile/2, (color & 0x200) ? (color & 0x1ff) : ((color & 0x0ff) * 4) , 0);
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(darkhors_state::tmapram_w)
|
||||
void darkhors_state::tmapram_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_tmapram[offset]);
|
||||
m_tmap->mark_tile_dirty(offset);
|
||||
}
|
||||
WRITE32_MEMBER(darkhors_state::tmapram2_w)
|
||||
void darkhors_state::tmapram2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_tmapram2[offset]);
|
||||
m_tmap2->mark_tile_dirty(offset);
|
||||
@ -460,7 +460,7 @@ uint32_t darkhors_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
|
||||
|
||||
// I/O (both older and newer jclub2 hardware)
|
||||
|
||||
WRITE32_MEMBER(jclub2_state::input_sel2_w)
|
||||
void jclub2_state::input_sel2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
// sometimes 0x80000000 bit is set
|
||||
// (it is cleared before reading from 4d0000.b / 4d0004.b / 4d0008.b / 4d000c.b)
|
||||
@ -468,7 +468,7 @@ WRITE32_MEMBER(jclub2_state::input_sel2_w)
|
||||
m_input_sel2 = data >> 16;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(jclub2_state::input_sel1_out3_w)
|
||||
void jclub2_state::input_sel1_out3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_out3);
|
||||
|
||||
@ -482,19 +482,19 @@ WRITE32_MEMBER(jclub2_state::input_sel1_out3_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ32_MEMBER(jclub2_state::p1_r)
|
||||
uint32_t jclub2_state::p1_r()
|
||||
{
|
||||
uint32_t ret = ioport("P1LOW")->read() & 0x00ffffff;
|
||||
return ret | (read_key(m_key1, m_input_sel1) << 24);
|
||||
}
|
||||
|
||||
READ32_MEMBER(jclub2_state::p2_r)
|
||||
uint32_t jclub2_state::p2_r()
|
||||
{
|
||||
uint32_t ret = ioport("P2LOW")->read() & 0x00ffffff;
|
||||
return ret | (read_key(m_key2, m_input_sel2) << 24);
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(jclub2_state::out1_w)
|
||||
void jclub2_state::out1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_out1);
|
||||
if (ACCESSING_BITS_16_31)
|
||||
@ -520,7 +520,7 @@ WRITE32_MEMBER(jclub2_state::out1_w)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(jclub2_state::out2_w)
|
||||
void jclub2_state::out2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_out2);
|
||||
if (ACCESSING_BITS_16_31)
|
||||
@ -535,7 +535,7 @@ WRITE32_MEMBER(jclub2_state::out2_w)
|
||||
|
||||
// Older hardware (ST-0020 + ST-0016) only
|
||||
|
||||
WRITE32_MEMBER(jclub2o_state::eeprom_s29290_w)
|
||||
void jclub2o_state::eeprom_s29290_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
if (data & ~0xff000000)
|
||||
logerror("%s: Unknown EEPROM bit written %08X\n", machine().describe_context(), data);
|
||||
@ -555,23 +555,23 @@ WRITE32_MEMBER(jclub2o_state::eeprom_s29290_w)
|
||||
|
||||
// 68EC020 <-> ST-0016
|
||||
|
||||
READ32_MEMBER(jclub2o_state::cmd1_word_r)
|
||||
uint32_t jclub2o_state::cmd1_word_r()
|
||||
{
|
||||
m_cmd_stat &= ~0x02;
|
||||
return m_cmd1 << 24;
|
||||
}
|
||||
READ32_MEMBER(jclub2o_state::cmd2_word_r)
|
||||
uint32_t jclub2o_state::cmd2_word_r()
|
||||
{
|
||||
m_cmd_stat &= ~0x08;
|
||||
return m_cmd2 << 24;
|
||||
}
|
||||
|
||||
READ32_MEMBER(jclub2o_state::cmd_stat_word_r)
|
||||
uint32_t jclub2o_state::cmd_stat_word_r()
|
||||
{
|
||||
return m_cmd_stat << 24;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(jclub2o_state::cmd1_word_w)
|
||||
void jclub2o_state::cmd1_word_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_24_31)
|
||||
{
|
||||
@ -580,7 +580,7 @@ WRITE32_MEMBER(jclub2o_state::cmd1_word_w)
|
||||
logerror("%s: cmd1_w %02x\n", machine().describe_context(), m_cmd1);
|
||||
}
|
||||
}
|
||||
WRITE32_MEMBER(jclub2o_state::cmd2_word_w)
|
||||
void jclub2o_state::cmd2_word_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_24_31)
|
||||
{
|
||||
@ -640,33 +640,33 @@ void jclub2o_state::jclub2o_map(address_map &map)
|
||||
// ST-0016 map
|
||||
|
||||
// common rombank? should go in machine/st0016 with larger address space exposed?
|
||||
WRITE8_MEMBER(jclub2o_state::st0016_rom_bank_w)
|
||||
void jclub2o_state::st0016_rom_bank_w(uint8_t data)
|
||||
{
|
||||
m_soundbank->set_entry(data & 0x1f);
|
||||
}
|
||||
|
||||
READ8_MEMBER(jclub2o_state::cmd1_r)
|
||||
uint8_t jclub2o_state::cmd1_r()
|
||||
{
|
||||
m_cmd_stat &= ~0x01;
|
||||
return m_cmd1;
|
||||
}
|
||||
READ8_MEMBER(jclub2o_state::cmd2_r)
|
||||
uint8_t jclub2o_state::cmd2_r()
|
||||
{
|
||||
m_cmd_stat &= ~0x04;
|
||||
return m_cmd2;
|
||||
}
|
||||
READ8_MEMBER(jclub2o_state::cmd_stat_r)
|
||||
uint8_t jclub2o_state::cmd_stat_r()
|
||||
{
|
||||
return m_cmd_stat;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jclub2o_state::cmd1_w)
|
||||
void jclub2o_state::cmd1_w(uint8_t data)
|
||||
{
|
||||
m_cmd1 = data;
|
||||
m_cmd_stat |= 0x02;
|
||||
logerror("%s: cmd1_w %02x\n", machine().describe_context(), m_cmd1);
|
||||
}
|
||||
WRITE8_MEMBER(jclub2o_state::cmd2_w)
|
||||
void jclub2o_state::cmd2_w(uint8_t data)
|
||||
{
|
||||
m_cmd2 = data;
|
||||
m_cmd_stat |= 0x08;
|
||||
@ -698,7 +698,7 @@ void jclub2o_state::st0016_io(address_map &map)
|
||||
|
||||
// Newer hardware (ST-0032) only
|
||||
|
||||
WRITE32_MEMBER(common_state::eeprom_93c46_w)
|
||||
void common_state::eeprom_93c46_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
if (data & ~0xff000000)
|
||||
logerror("%s: Unknown EEPROM bit written %08X\n", machine().describe_context(), data);
|
||||
@ -760,7 +760,7 @@ void jclub2_state::jclub2_map(address_map &map)
|
||||
|
||||
// bootleg darkhors hardware
|
||||
|
||||
WRITE32_MEMBER(darkhors_state::input_sel_w)
|
||||
void darkhors_state::input_sel_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_16_23)
|
||||
m_input_sel1 = data >> 16;
|
||||
@ -768,13 +768,13 @@ WRITE32_MEMBER(darkhors_state::input_sel_w)
|
||||
m_input_sel2 = data >> 24;
|
||||
}
|
||||
|
||||
READ32_MEMBER(darkhors_state::input_r)
|
||||
uint32_t darkhors_state::input_r()
|
||||
{
|
||||
return (read_key(m_key1, m_input_sel1) << 16) |
|
||||
(read_key(m_key2, m_input_sel2) << 24) ;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(darkhors_state::out1_w)
|
||||
void darkhors_state::out1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_out1);
|
||||
if (ACCESSING_BITS_16_31)
|
||||
|
@ -34,31 +34,31 @@ public:
|
||||
void bldyrolr(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(csin_r);
|
||||
DECLARE_WRITE8_MEMBER(control_port_w);
|
||||
DECLARE_WRITE8_MEMBER(display_1_w);
|
||||
DECLARE_WRITE8_MEMBER(display_2_w);
|
||||
DECLARE_WRITE8_MEMBER(display_3_w);
|
||||
DECLARE_WRITE8_MEMBER(display_4_w);
|
||||
DECLARE_WRITE8_MEMBER(display_a_w);
|
||||
DECLARE_WRITE8_MEMBER(drivers_l_w);
|
||||
DECLARE_WRITE8_MEMBER(drivers_b_w);
|
||||
u8 csin_r(offs_t offset);
|
||||
void control_port_w(offs_t offset, u8 data);
|
||||
void display_1_w(offs_t offset, u8 data);
|
||||
void display_2_w(offs_t offset, u8 data);
|
||||
void display_3_w(offs_t offset, u8 data);
|
||||
void display_4_w(offs_t offset, u8 data);
|
||||
void display_a_w(offs_t offset, u8 data);
|
||||
void drivers_l_w(offs_t offset, u8 data);
|
||||
void drivers_b_w(offs_t offset, u8 data);
|
||||
|
||||
DECLARE_READ8_MEMBER(inputs_r);
|
||||
DECLARE_READ8_MEMBER(ports_r);
|
||||
DECLARE_READ8_MEMBER(csint_r);
|
||||
DECLARE_WRITE8_MEMBER(display_strobe_w);
|
||||
DECLARE_WRITE8_MEMBER(drivers_w);
|
||||
DECLARE_WRITE8_MEMBER(display_ck_w);
|
||||
u8 inputs_r();
|
||||
u8 ports_r();
|
||||
u8 csint_r(offs_t offset);
|
||||
void display_strobe_w(offs_t offset, u8 data);
|
||||
void drivers_w(offs_t offset, u8 data);
|
||||
void display_ck_w(offs_t offset, u8 data);
|
||||
|
||||
DECLARE_READ8_MEMBER(bldyrolr_unknown_r);
|
||||
DECLARE_WRITE8_MEMBER(bldyrolr_unknown_w);
|
||||
u8 bldyrolr_unknown_r();
|
||||
void bldyrolr_unknown_w(u8 data);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(soundlatch_nmi_w);
|
||||
DECLARE_WRITE8_MEMBER(soundlatch_nmi_pulse_w);
|
||||
DECLARE_READ8_MEMBER(soundlatch_r);
|
||||
DECLARE_READ8_MEMBER(soundlatch_nmi_r);
|
||||
DECLARE_WRITE8_MEMBER(resint_w);
|
||||
void soundlatch_nmi_w(u8 data);
|
||||
void soundlatch_nmi_pulse_w(u8 data);
|
||||
u8 soundlatch_r();
|
||||
u8 soundlatch_nmi_r();
|
||||
void resint_w(u8 data);
|
||||
void slalom03_oki_bank_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(vck_w);
|
||||
|
||||
@ -85,48 +85,48 @@ private:
|
||||
bool m_adpcm_toggle;
|
||||
};
|
||||
|
||||
READ8_MEMBER(joctronic_state::csin_r)
|
||||
u8 joctronic_state::csin_r(offs_t offset)
|
||||
{
|
||||
logerror("csin_r[%d] read\n", offset);
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::control_port_w)
|
||||
void joctronic_state::control_port_w(offs_t offset, u8 data)
|
||||
{
|
||||
logerror("control_port[%d] = $%02X\n", offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::display_1_w)
|
||||
void joctronic_state::display_1_w(offs_t offset, u8 data)
|
||||
{
|
||||
logerror("display_1[%d] = $%02X\n", offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::display_2_w)
|
||||
void joctronic_state::display_2_w(offs_t offset, u8 data)
|
||||
{
|
||||
logerror("display_2[%d] = $%02X\n", offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::display_3_w)
|
||||
void joctronic_state::display_3_w(offs_t offset, u8 data)
|
||||
{
|
||||
logerror("display_3[%d] = $%02X\n", offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::display_4_w)
|
||||
void joctronic_state::display_4_w(offs_t offset, u8 data)
|
||||
{
|
||||
logerror("display_4[%d] = $%02X\n", offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::display_a_w)
|
||||
void joctronic_state::display_a_w(offs_t offset, u8 data)
|
||||
{
|
||||
logerror("display_a[%d] = $%02X\n", offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::drivers_l_w)
|
||||
void joctronic_state::drivers_l_w(offs_t offset, u8 data)
|
||||
{
|
||||
logerror("drivers_l[%d] = $%02X\n", offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::drivers_b_w)
|
||||
void joctronic_state::drivers_b_w(offs_t offset, u8 data)
|
||||
{
|
||||
logerror("drivers_b[%d] = $%02X\n", offset, data);
|
||||
}
|
||||
@ -149,35 +149,35 @@ void joctronic_state::maincpu_map(address_map &map)
|
||||
map(0xe000, 0xe000).mirror(0x0fff).w(FUNC(joctronic_state::soundlatch_nmi_w)); // PSON
|
||||
}
|
||||
|
||||
READ8_MEMBER(joctronic_state::inputs_r)
|
||||
u8 joctronic_state::inputs_r()
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(joctronic_state::ports_r)
|
||||
u8 joctronic_state::ports_r()
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
READ8_MEMBER(joctronic_state::csint_r)
|
||||
u8 joctronic_state::csint_r(offs_t offset)
|
||||
{
|
||||
logerror("csint_r[%d] read\n", offset);
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::display_strobe_w)
|
||||
void joctronic_state::display_strobe_w(offs_t offset, u8 data)
|
||||
{
|
||||
logerror("display_strobe[%d] = $%02X\n", offset, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::drivers_w)
|
||||
void joctronic_state::drivers_w(offs_t offset, u8 data)
|
||||
{
|
||||
for (int i = 0; i < 6; ++i)
|
||||
if (m_driver_latch[i].found())
|
||||
m_driver_latch[i]->write_bit(offset, BIT(data, i));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::display_ck_w)
|
||||
void joctronic_state::display_ck_w(offs_t offset, u8 data)
|
||||
{
|
||||
logerror("display_ck[%d] = $%02X\n", offset, data);
|
||||
}
|
||||
@ -199,13 +199,13 @@ void joctronic_state::slalom03_maincpu_map(address_map &map)
|
||||
map(0xf000, 0xf000).mirror(0x0fff).w(FUNC(joctronic_state::soundlatch_nmi_pulse_w)); // CSSON
|
||||
}
|
||||
|
||||
READ8_MEMBER(joctronic_state::bldyrolr_unknown_r)
|
||||
u8 joctronic_state::bldyrolr_unknown_r()
|
||||
{
|
||||
logerror("bldyrolr_unknown read\n");
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::bldyrolr_unknown_w)
|
||||
void joctronic_state::bldyrolr_unknown_w(u8 data)
|
||||
{
|
||||
logerror("bldyrolr_unknown = $%02X\n", data);
|
||||
}
|
||||
@ -222,30 +222,30 @@ void joctronic_state::maincpu_io_map(address_map &map)
|
||||
map(0x00, 0x03).rw("ctc", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::soundlatch_nmi_w)
|
||||
void joctronic_state::soundlatch_nmi_w(u8 data)
|
||||
{
|
||||
m_soundcpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||
m_soundlatch = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::soundlatch_nmi_pulse_w)
|
||||
void joctronic_state::soundlatch_nmi_pulse_w(u8 data)
|
||||
{
|
||||
m_soundcpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
|
||||
m_soundlatch = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(joctronic_state::soundlatch_r)
|
||||
u8 joctronic_state::soundlatch_r()
|
||||
{
|
||||
return m_soundlatch;
|
||||
}
|
||||
|
||||
READ8_MEMBER(joctronic_state::soundlatch_nmi_r)
|
||||
u8 joctronic_state::soundlatch_nmi_r()
|
||||
{
|
||||
m_soundcpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
|
||||
return m_soundlatch;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(joctronic_state::resint_w)
|
||||
void joctronic_state::resint_w(u8 data)
|
||||
{
|
||||
// acknowledge INTR by clearing flip-flop
|
||||
m_soundcpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
||||
|
@ -108,9 +108,9 @@ private:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(jokrwild_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(jokrwild_colorram_w);
|
||||
DECLARE_READ8_MEMBER(rng_r);
|
||||
void jokrwild_videoram_w(offs_t offset, uint8_t data);
|
||||
void jokrwild_colorram_w(offs_t offset, uint8_t data);
|
||||
uint8_t rng_r(offs_t offset);
|
||||
void testa_w(uint8_t data);
|
||||
void testb_w(uint8_t data);
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
@ -124,13 +124,13 @@ private:
|
||||
* Video Hardware *
|
||||
*************************/
|
||||
|
||||
WRITE8_MEMBER(jokrwild_state::jokrwild_videoram_w)
|
||||
void jokrwild_state::jokrwild_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jokrwild_state::jokrwild_colorram_w)
|
||||
void jokrwild_state::jokrwild_colorram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_colorram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
@ -171,7 +171,7 @@ void jokrwild_state::jokrwild_palette(palette_device &palette) const
|
||||
* Read/Write Handlers *
|
||||
*****************************/
|
||||
|
||||
READ8_MEMBER(jokrwild_state::rng_r)
|
||||
uint8_t jokrwild_state::rng_r(offs_t offset)
|
||||
{
|
||||
if(m_maincpu->pc() == 0xab32)
|
||||
return (offset == 0) ? 0x9e : 0x27;
|
||||
|
@ -163,10 +163,10 @@ private:
|
||||
uint8_t m_bitmap_disable;
|
||||
uint8_t m_tilemap_bank;
|
||||
uint8_t m_pri;
|
||||
DECLARE_WRITE8_MEMBER(jollyjgr_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(jollyjgr_attrram_w);
|
||||
DECLARE_WRITE8_MEMBER(jollyjgr_misc_w);
|
||||
DECLARE_WRITE8_MEMBER(jollyjgr_coin_lookout_w);
|
||||
void jollyjgr_videoram_w(offs_t offset, uint8_t data);
|
||||
void jollyjgr_attrram_w(offs_t offset, uint8_t data);
|
||||
void jollyjgr_misc_w(uint8_t data);
|
||||
void jollyjgr_coin_lookout_w(uint8_t data);
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
@ -191,13 +191,13 @@ private:
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE8_MEMBER(jollyjgr_state::jollyjgr_videoram_w)
|
||||
void jollyjgr_state::jollyjgr_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jollyjgr_state::jollyjgr_attrram_w)
|
||||
void jollyjgr_state::jollyjgr_attrram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset & 1)
|
||||
{
|
||||
@ -215,7 +215,7 @@ WRITE8_MEMBER(jollyjgr_state::jollyjgr_attrram_w)
|
||||
m_colorram[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jollyjgr_state::jollyjgr_misc_w)
|
||||
void jollyjgr_state::jollyjgr_misc_w(uint8_t data)
|
||||
{
|
||||
// they could be swapped, because it always set "data & 3"
|
||||
m_flip_x = data & 1;
|
||||
@ -234,7 +234,7 @@ WRITE8_MEMBER(jollyjgr_state::jollyjgr_misc_w)
|
||||
m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jollyjgr_state::jollyjgr_coin_lookout_w)
|
||||
void jollyjgr_state::jollyjgr_coin_lookout_w(uint8_t data)
|
||||
{
|
||||
machine().bookkeeping().coin_lockout_global_w(data & 1);
|
||||
|
||||
|
@ -68,11 +68,11 @@ private:
|
||||
required_region_ptr<uint8_t> m_mainregion;
|
||||
required_shared_ptr<uint8_t> m_videoram;
|
||||
uint8_t m_videoram2[0x4000];
|
||||
DECLARE_WRITE8_MEMBER(bank_select_w);
|
||||
DECLARE_WRITE8_MEMBER(mux_w);
|
||||
DECLARE_WRITE8_MEMBER(jongkyo_coin_counter_w);
|
||||
DECLARE_WRITE8_MEMBER(videoram2_w);
|
||||
DECLARE_WRITE8_MEMBER(unknown_w);
|
||||
void bank_select_w(offs_t offset, uint8_t data);
|
||||
void mux_w(uint8_t data);
|
||||
void jongkyo_coin_counter_w(uint8_t data);
|
||||
void videoram2_w(offs_t offset, uint8_t data);
|
||||
void unknown_w(offs_t offset, uint8_t data);
|
||||
uint8_t input_1p_r();
|
||||
uint8_t input_2p_r();
|
||||
virtual void machine_start() override;
|
||||
@ -148,7 +148,7 @@ uint32_t jongkyo_state::screen_update_jongkyo(screen_device &screen, bitmap_ind1
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE8_MEMBER(jongkyo_state::bank_select_w)
|
||||
void jongkyo_state::bank_select_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
int mask = 1 << (offset >> 1);
|
||||
|
||||
@ -161,13 +161,13 @@ WRITE8_MEMBER(jongkyo_state::bank_select_w)
|
||||
m_bank1d->set_entry(m_rom_bank);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jongkyo_state::mux_w)
|
||||
void jongkyo_state::mux_w(uint8_t data)
|
||||
{
|
||||
m_mux_data = ~data;
|
||||
// printf("%02x\n", m_mux_data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jongkyo_state::jongkyo_coin_counter_w)
|
||||
void jongkyo_state::jongkyo_coin_counter_w(uint8_t data)
|
||||
{
|
||||
/* bit 0 = hopper out? */
|
||||
|
||||
@ -216,18 +216,18 @@ uint8_t jongkyo_state::input_2p_r()
|
||||
ioport("PL2_4")->read() & ioport("PL2_5")->read() & ioport("PL2_6")->read()) | coin_port;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jongkyo_state::videoram2_w)
|
||||
void jongkyo_state::videoram2_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram2[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jongkyo_state::unknown_w)
|
||||
void jongkyo_state::unknown_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case 0: // different values
|
||||
break;
|
||||
case 1: // set to 0 at the boot and set to 1 continuesly
|
||||
case 1: // set to 0 at the boot and set to 1 continuously
|
||||
break;
|
||||
case 2: // only set to 0 at the boot
|
||||
break;
|
||||
|
@ -36,8 +36,8 @@ public:
|
||||
void jonos(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(keyboard_r);
|
||||
DECLARE_WRITE8_MEMBER(cursor_w);
|
||||
u8 keyboard_r(offs_t offset);
|
||||
void cursor_w(offs_t offset, u8 data);
|
||||
u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void kbd_put(u8 data);
|
||||
|
||||
@ -75,7 +75,7 @@ void jonos_state::kbd_put(u8 data)
|
||||
m_term_data = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( jonos_state::keyboard_r )
|
||||
u8 jonos_state::keyboard_r(offs_t offset)
|
||||
{
|
||||
if (offset == 0)
|
||||
{
|
||||
@ -90,7 +90,7 @@ READ8_MEMBER( jonos_state::keyboard_r )
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( jonos_state::cursor_w )
|
||||
void jonos_state::cursor_w(offs_t offset, u8 data)
|
||||
{
|
||||
if (offset == 1) // control byte
|
||||
m_curs_ctrl = (data == 0x80) ? 1 : 0;
|
||||
|
@ -174,15 +174,15 @@ private:
|
||||
// tilemaps
|
||||
tilemap_t *m_bg1_tmap;
|
||||
tilemap_t *m_bg2_tmap;
|
||||
DECLARE_WRITE16_MEMBER(bg1_w);
|
||||
DECLARE_WRITE16_MEMBER(bg2_w);
|
||||
void bg1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void bg2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
TILE_GET_INFO_MEMBER(get_bg1_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_bg2_tile_info);
|
||||
|
||||
// r5g5b5 layers
|
||||
bitmap_rgb32 m_bg15_bitmap[2];
|
||||
DECLARE_WRITE16_MEMBER(bg15_0_w);
|
||||
DECLARE_WRITE16_MEMBER(bg15_1_w);
|
||||
void bg15_0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void bg15_1_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
static const rgb_t BG15_TRANSPARENT;
|
||||
void draw_bg15_tile(address_space &space, int x, int y, uint16_t code);
|
||||
void draw_bg15_tilemap();
|
||||
@ -193,15 +193,15 @@ private:
|
||||
void eeprom_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
// cart
|
||||
DECLARE_READ16_MEMBER(cart_r);
|
||||
DECLARE_WRITE16_MEMBER(cart_w);
|
||||
uint16_t cart_r(offs_t offset);
|
||||
void cart_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
// misc
|
||||
DECLARE_READ16_MEMBER(fpga_r);
|
||||
DECLARE_WRITE16_MEMBER(oki_bank_w);
|
||||
DECLARE_READ16_MEMBER(e00000_r);
|
||||
DECLARE_READ16_MEMBER(e00020_r);
|
||||
DECLARE_WRITE16_MEMBER(outputs_w);
|
||||
uint16_t fpga_r();
|
||||
void oki_bank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t e00000_r();
|
||||
uint16_t e00020_r();
|
||||
void outputs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
// screen updates
|
||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
@ -231,13 +231,13 @@ TILE_GET_INFO_MEMBER(joystand_state::get_bg2_tile_info)
|
||||
tileinfo.set(0, code & 0x00ffffff, code >> 24, 0);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(joystand_state::bg1_w)
|
||||
void joystand_state::bg1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_bg1_ram[offset]);
|
||||
m_bg1_tmap->mark_tile_dirty(offset/2);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(joystand_state::bg2_w)
|
||||
void joystand_state::bg2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_bg2_ram[offset]);
|
||||
m_bg2_tmap->mark_tile_dirty(offset/2);
|
||||
@ -250,7 +250,7 @@ WRITE16_MEMBER(joystand_state::bg2_w)
|
||||
***************************************************************************/
|
||||
|
||||
// pixel-based
|
||||
WRITE16_MEMBER(joystand_state::bg15_0_w)
|
||||
void joystand_state::bg15_0_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
uint16_t val = COMBINE_DATA(&m_bg15_0_ram[offset]);
|
||||
m_bg15_bitmap[0].pix32(offset >> 9, offset & 0x1ff) = (val & 0x8000) ? BG15_TRANSPARENT : m_bg15_palette->pen_color(val & 0x7fff);
|
||||
@ -293,7 +293,7 @@ void joystand_state::draw_bg15_tilemap()
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(joystand_state::bg15_1_w)
|
||||
void joystand_state::bg15_1_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
uint16_t code = COMBINE_DATA(&m_bg15_1_ram[offset]);
|
||||
if ((offset & 0x83) == 0x01)
|
||||
@ -363,12 +363,12 @@ uint32_t joystand_state::screen_update( screen_device &screen, bitmap_rgb32 &bit
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
READ16_MEMBER(joystand_state::fpga_r)
|
||||
uint16_t joystand_state::fpga_r()
|
||||
{
|
||||
return 0xffff;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(joystand_state::oki_bank_w)
|
||||
void joystand_state::oki_bank_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_oki->set_rom_bank((data >> 6) & 3);
|
||||
@ -397,7 +397,7 @@ void joystand_state::eeprom_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(joystand_state::outputs_w)
|
||||
void joystand_state::outputs_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_outputs[0]);
|
||||
if (ACCESSING_BITS_8_15)
|
||||
@ -419,24 +419,24 @@ WRITE16_MEMBER(joystand_state::outputs_w)
|
||||
// carts
|
||||
|
||||
// copy slot
|
||||
READ16_MEMBER(joystand_state::e00000_r)
|
||||
uint16_t joystand_state::e00000_r()
|
||||
{
|
||||
return ioport("COPY")->read();
|
||||
}
|
||||
// master slot
|
||||
READ16_MEMBER(joystand_state::e00020_r)
|
||||
uint16_t joystand_state::e00020_r()
|
||||
{
|
||||
return ioport("MASTER")->read();
|
||||
}
|
||||
|
||||
READ16_MEMBER(joystand_state::cart_r)
|
||||
uint16_t joystand_state::cart_r(offs_t offset)
|
||||
{
|
||||
int which = offset / 0x80000;
|
||||
int addr = offset & 0x7ffff;
|
||||
return (m_cart_flash[which * 2 + 0]->read(addr) << 8) | m_cart_flash[which * 2 + 1]->read(addr);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(joystand_state::cart_w)
|
||||
void joystand_state::cart_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
int which = offset / 0x80000;
|
||||
int addr = offset & 0x7ffff;
|
||||
|
@ -50,14 +50,14 @@ public:
|
||||
private:
|
||||
uint8_t porta_r();
|
||||
uint8_t portb_r();
|
||||
DECLARE_WRITE8_MEMBER(out1_w);
|
||||
DECLARE_WRITE8_MEMBER(out2_w);
|
||||
void out1_w(offs_t offset, uint8_t data);
|
||||
void out2_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(disp_data_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(disp_clock_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(disp_strobe_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(row_w);
|
||||
DECLARE_WRITE8_MEMBER(sample_bank_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_reset_w);
|
||||
void sample_bank_w(uint8_t data);
|
||||
void adpcm_reset_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(vck_w);
|
||||
IRQ_CALLBACK_MEMBER(sound_int_cb);
|
||||
|
||||
@ -223,13 +223,13 @@ static INPUT_PORTS_START( jp )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_COLON)
|
||||
INPUT_PORTS_END
|
||||
|
||||
WRITE8_MEMBER(jp_state::out1_w)
|
||||
void jp_state::out1_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
for (int i = 0; i < 8; i++)
|
||||
m_latch[i]->write_bit(offset, BIT(data, i));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jp_state::out2_w)
|
||||
void jp_state::out2_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
for (int i = 0; i < 2; i++)
|
||||
m_latch[8 + i]->write_bit(offset, BIT(data, i));
|
||||
@ -382,12 +382,12 @@ void jp_state::jp(machine_config &config)
|
||||
ay.add_route(ALL_OUTPUTS, "ayvol", 0.9);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jp_state::sample_bank_w)
|
||||
void jp_state::sample_bank_w(uint8_t data)
|
||||
{
|
||||
m_adpcm_bank->set_entry(data & 15);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jp_state::adpcm_reset_w)
|
||||
void jp_state::adpcm_reset_w(uint8_t data)
|
||||
{
|
||||
m_msm->reset_w(BIT(data, 0));
|
||||
}
|
||||
|
@ -62,18 +62,18 @@ private:
|
||||
uint8_t m_old_keydata;
|
||||
uint8_t m_freq_reg[2];
|
||||
emu_timer *m_timer_d;
|
||||
DECLARE_READ8_MEMBER(jr200_pcg_1_r);
|
||||
DECLARE_READ8_MEMBER(jr200_pcg_2_r);
|
||||
DECLARE_WRITE8_MEMBER(jr200_pcg_1_w);
|
||||
DECLARE_WRITE8_MEMBER(jr200_pcg_2_w);
|
||||
DECLARE_READ8_MEMBER(jr200_bios_char_r);
|
||||
DECLARE_WRITE8_MEMBER(jr200_bios_char_w);
|
||||
DECLARE_READ8_MEMBER(mcu_keyb_r);
|
||||
DECLARE_WRITE8_MEMBER(jr200_beep_w);
|
||||
DECLARE_WRITE8_MEMBER(jr200_beep_freq_w);
|
||||
DECLARE_WRITE8_MEMBER(jr200_border_col_w);
|
||||
DECLARE_READ8_MEMBER(mn1271_io_r);
|
||||
DECLARE_WRITE8_MEMBER(mn1271_io_w);
|
||||
uint8_t jr200_pcg_1_r(offs_t offset);
|
||||
uint8_t jr200_pcg_2_r(offs_t offset);
|
||||
void jr200_pcg_1_w(offs_t offset, uint8_t data);
|
||||
void jr200_pcg_2_w(offs_t offset, uint8_t data);
|
||||
uint8_t jr200_bios_char_r(offs_t offset);
|
||||
void jr200_bios_char_w(offs_t offset, uint8_t data);
|
||||
uint8_t mcu_keyb_r();
|
||||
void jr200_beep_w(uint8_t data);
|
||||
void jr200_beep_freq_w(offs_t offset, uint8_t data);
|
||||
void jr200_border_col_w(uint8_t data);
|
||||
uint8_t mn1271_io_r(offs_t offset);
|
||||
void mn1271_io_w(offs_t offset, uint8_t data);
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
virtual void video_start() override;
|
||||
@ -218,35 +218,35 @@ uint32_t jr200_state::screen_update_jr200(screen_device &screen, bitmap_ind16 &b
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ8_MEMBER(jr200_state::jr200_pcg_1_r)
|
||||
uint8_t jr200_state::jr200_pcg_1_r(offs_t offset)
|
||||
{
|
||||
return m_pcg->base()[offset+0x000];
|
||||
}
|
||||
|
||||
READ8_MEMBER(jr200_state::jr200_pcg_2_r)
|
||||
uint8_t jr200_state::jr200_pcg_2_r(offs_t offset)
|
||||
{
|
||||
return m_pcg->base()[offset+0x400];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jr200_state::jr200_pcg_1_w)
|
||||
void jr200_state::jr200_pcg_1_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_pcg->base()[offset+0x000] = data;
|
||||
m_gfxdecode->gfx(1)->mark_dirty((offset+0x000) >> 3);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jr200_state::jr200_pcg_2_w)
|
||||
void jr200_state::jr200_pcg_2_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_pcg->base()[offset+0x400] = data;
|
||||
m_gfxdecode->gfx(1)->mark_dirty((offset+0x400) >> 3);
|
||||
}
|
||||
|
||||
READ8_MEMBER(jr200_state::jr200_bios_char_r)
|
||||
uint8_t jr200_state::jr200_bios_char_r(offs_t offset)
|
||||
{
|
||||
return m_gfx_ram->base()[offset];
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(jr200_state::jr200_bios_char_w)
|
||||
void jr200_state::jr200_bios_char_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
/* TODO: writing is presumably controlled by an I/O bit */
|
||||
// m_gfx_ram->base()[offset] = data;
|
||||
@ -259,7 +259,7 @@ I/O Device
|
||||
|
||||
*/
|
||||
|
||||
READ8_MEMBER(jr200_state::mcu_keyb_r)
|
||||
uint8_t jr200_state::mcu_keyb_r()
|
||||
{
|
||||
int row, col, table = 0;
|
||||
uint8_t keydata = 0;
|
||||
@ -306,13 +306,13 @@ READ8_MEMBER(jr200_state::mcu_keyb_r)
|
||||
return keydata;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jr200_state::jr200_beep_w)
|
||||
void jr200_state::jr200_beep_w(uint8_t data)
|
||||
{
|
||||
/* writing 0x0e enables the beeper, writing anything else disables it */
|
||||
m_beeper->set_state(((data & 0xf) == 0x0e) ? 1 : 0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jr200_state::jr200_beep_freq_w)
|
||||
void jr200_state::jr200_beep_freq_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
uint32_t beep_freq;
|
||||
|
||||
@ -323,7 +323,7 @@ WRITE8_MEMBER(jr200_state::jr200_beep_freq_w)
|
||||
m_beeper->set_clock(84000 / beep_freq);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jr200_state::jr200_border_col_w)
|
||||
void jr200_state::jr200_border_col_w(uint8_t data)
|
||||
{
|
||||
m_border_col = data;
|
||||
}
|
||||
@ -334,7 +334,7 @@ TIMER_CALLBACK_MEMBER(jr200_state::timer_d_callback)
|
||||
m_maincpu->set_input_line(0, HOLD_LINE);
|
||||
}
|
||||
|
||||
READ8_MEMBER(jr200_state::mn1271_io_r)
|
||||
uint8_t jr200_state::mn1271_io_r(offs_t offset)
|
||||
{
|
||||
uint8_t retVal = m_mn1271_ram[offset];
|
||||
if((offset+0xc800) > 0xca00)
|
||||
@ -342,7 +342,7 @@ READ8_MEMBER(jr200_state::mn1271_io_r)
|
||||
|
||||
switch(offset+0xc800)
|
||||
{
|
||||
case 0xc801: retVal= mcu_keyb_r(space,0); break;
|
||||
case 0xc801: retVal= mcu_keyb_r(); break;
|
||||
case 0xc803: retVal= (m_mn1271_ram[0x03] & 0xcf) | 0x30; break;//---x ---- printer status ready (ACTIVE HIGH)
|
||||
case 0xc807: retVal= (m_mn1271_ram[0x07] & 0x80) | 0x60; break;
|
||||
case 0xc80a: retVal= (m_mn1271_ram[0x0a] & 0xfe); break;
|
||||
@ -357,7 +357,7 @@ READ8_MEMBER(jr200_state::mn1271_io_r)
|
||||
return retVal;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jr200_state::mn1271_io_w)
|
||||
void jr200_state::mn1271_io_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_mn1271_ram[offset] = data;
|
||||
switch(offset+0xc800)
|
||||
@ -369,10 +369,10 @@ WRITE8_MEMBER(jr200_state::mn1271_io_w)
|
||||
m_timer_d->adjust(attotime::zero, 0, attotime::zero);
|
||||
}
|
||||
break;
|
||||
case 0xc819: jr200_beep_w(space,0,data); break;
|
||||
case 0xc819: jr200_beep_w(data); break;
|
||||
case 0xc81a:
|
||||
case 0xc81b: jr200_beep_freq_w(space,offset-0x1a,data); break;
|
||||
case 0xca00: jr200_border_col_w(space,0,data); break;
|
||||
case 0xc81b: jr200_beep_freq_w(offset-0x1a,data); break;
|
||||
case 0xca00: jr200_border_col_w(data); break;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -120,7 +120,7 @@ public:
|
||||
void init_jrpacman();
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(jrpacman_interrupt_vector_w);
|
||||
void jrpacman_interrupt_vector_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(irq_mask_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank_irq);
|
||||
void main_map(address_map &map);
|
||||
@ -129,7 +129,7 @@ private:
|
||||
|
||||
|
||||
|
||||
WRITE8_MEMBER(jrpacman_state::jrpacman_interrupt_vector_w)
|
||||
void jrpacman_state::jrpacman_interrupt_vector_w(uint8_t data)
|
||||
{
|
||||
m_maincpu->set_input_line_vector(0, data); // Z80
|
||||
m_maincpu->set_input_line(0, CLEAR_LINE);
|
||||
|
@ -109,9 +109,9 @@ private:
|
||||
virtual void video_start() override;
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
DECLARE_READ8_MEMBER( videoram_r );
|
||||
DECLARE_WRITE8_MEMBER( videoram_w );
|
||||
DECLARE_WRITE8_MEMBER( banksel_w );
|
||||
uint8_t videoram_r(offs_t offset);
|
||||
void videoram_w(offs_t offset, uint8_t data);
|
||||
void banksel_w(uint8_t data);
|
||||
|
||||
uint8_t m_video_bank;
|
||||
std::unique_ptr<uint8_t[]> m_color_ram_r;
|
||||
@ -190,7 +190,7 @@ void jtc_state::p3_w(uint8_t data)
|
||||
m_speaker->level_w(BIT(data, 6));
|
||||
}
|
||||
|
||||
READ8_MEMBER( jtces40_state::videoram_r )
|
||||
uint8_t jtces40_state::videoram_r(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0;
|
||||
|
||||
@ -202,7 +202,7 @@ READ8_MEMBER( jtces40_state::videoram_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( jtces40_state::videoram_w )
|
||||
void jtces40_state::videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (BIT(m_video_bank, 7)) m_color_ram_r[offset] = data;
|
||||
if (BIT(m_video_bank, 6)) m_color_ram_g[offset] = data;
|
||||
@ -210,7 +210,7 @@ WRITE8_MEMBER( jtces40_state::videoram_w )
|
||||
if (BIT(m_video_bank, 4)) m_video_ram[offset] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( jtces40_state::banksel_w )
|
||||
void jtces40_state::banksel_w(uint8_t data)
|
||||
{
|
||||
m_video_bank = data;
|
||||
}
|
||||
|
@ -221,10 +221,10 @@ public:
|
||||
void jubileep(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(jubileep_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(jubileep_colorram_w);
|
||||
DECLARE_WRITE8_MEMBER(unk_w);
|
||||
DECLARE_READ8_MEMBER(mux_port_r);
|
||||
void jubileep_videoram_w(offs_t offset, uint8_t data);
|
||||
void jubileep_colorram_w(offs_t offset, uint8_t data);
|
||||
void unk_w(offs_t offset, uint8_t data);
|
||||
uint8_t mux_port_r(offs_t offset);
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
uint32_t screen_update_jubileep(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(jubileep_interrupt);
|
||||
@ -250,13 +250,13 @@ private:
|
||||
* Video Hardware *
|
||||
*************************/
|
||||
|
||||
WRITE8_MEMBER(jubilee_state::jubileep_videoram_w)
|
||||
void jubilee_state::jubileep_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(jubilee_state::jubileep_colorram_w)
|
||||
void jubilee_state::jubileep_colorram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_colorram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
@ -333,7 +333,7 @@ void jubilee_state::jubileep_map(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(jubilee_state::unk_w)
|
||||
void jubilee_state::unk_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
/* In particular, the interrupt from above must be cleared. We assume that
|
||||
this is done by one of the output lines, and from the 32 lines that are
|
||||
@ -566,7 +566,7 @@ WRITE8_MEMBER(jubilee_state::unk_w)
|
||||
logerror("CRU write to address %04x: %d\n", offset<<1, data & 1);
|
||||
}
|
||||
|
||||
READ8_MEMBER(jubilee_state::mux_port_r)
|
||||
uint8_t jubilee_state::mux_port_r(offs_t offset)
|
||||
{
|
||||
switch( mux_sel )
|
||||
{
|
||||
|
@ -58,8 +58,8 @@ private:
|
||||
#if defined(JUICEBOX_ENTER_DEBUG_MENU) || defined(JUICEBOX_DISPLAY_ROM_ID)
|
||||
int port_g_read_count;
|
||||
#endif
|
||||
DECLARE_READ32_MEMBER(juicebox_nand_r);
|
||||
DECLARE_WRITE32_MEMBER(juicebox_nand_w);
|
||||
uint32_t juicebox_nand_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
void juicebox_nand_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
inline void verboselog(int n_level, const char *s_fmt, ...) ATTR_PRINTF(3,4);
|
||||
@ -69,7 +69,7 @@ private:
|
||||
void smc_write(uint8_t data);
|
||||
uint32_t s3c44b0_gpio_port_r(offs_t offset);
|
||||
void s3c44b0_gpio_port_w(offs_t offset, uint32_t data);
|
||||
//DECLARE_WRITE16_MEMBER(s3c44b0_i2s_data_w);
|
||||
//void s3c44b0_i2s_data_w(offs_t offset, uint16_t data);
|
||||
void juicebox_map(address_map &map);
|
||||
};
|
||||
|
||||
@ -228,7 +228,7 @@ void juicebox_state::s3c44b0_gpio_port_w(offs_t offset, uint32_t data)
|
||||
|
||||
// ...
|
||||
|
||||
READ32_MEMBER(juicebox_state::juicebox_nand_r)
|
||||
uint32_t juicebox_state::juicebox_nand_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
uint32_t data = 0;
|
||||
if (ACCESSING_BITS_0_7) data = data | (smc_read() << 0);
|
||||
@ -239,7 +239,7 @@ READ32_MEMBER(juicebox_state::juicebox_nand_r)
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(juicebox_state::juicebox_nand_w)
|
||||
void juicebox_state::juicebox_nand_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
verboselog( 5, "juicebox_nand_w %08X %08X %08X\n", offset, mem_mask, data);
|
||||
if (ACCESSING_BITS_0_7) smc_write((data >> 0) & 0xFF);
|
||||
|
@ -116,10 +116,10 @@ public:
|
||||
void junofrst(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(blitter_w);
|
||||
DECLARE_WRITE8_MEMBER(bankselect_w);
|
||||
DECLARE_WRITE8_MEMBER(sh_irqtrigger_w);
|
||||
DECLARE_WRITE8_MEMBER(i8039_irq_w);
|
||||
void blitter_w(offs_t offset, uint8_t data);
|
||||
void bankselect_w(uint8_t data);
|
||||
void sh_irqtrigger_w(uint8_t data);
|
||||
void i8039_irq_w(uint8_t data);
|
||||
void i8039_irqen_and_status_w(uint8_t data);
|
||||
uint8_t portA_r();
|
||||
void portB_w(uint8_t data);
|
||||
@ -163,7 +163,7 @@ private:
|
||||
We have to mask it off otherwise the "Juno First" logo on the title screen is wrong.
|
||||
*/
|
||||
|
||||
WRITE8_MEMBER(junofrst_state::blitter_w)
|
||||
void junofrst_state::blitter_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_blitterdata[offset] = data;
|
||||
|
||||
@ -216,7 +216,7 @@ WRITE8_MEMBER(junofrst_state::blitter_w)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(junofrst_state::bankselect_w)
|
||||
void junofrst_state::bankselect_w(uint8_t data)
|
||||
{
|
||||
membank("bank1")->set_entry(data & 0x0f);
|
||||
}
|
||||
@ -258,7 +258,7 @@ void junofrst_state::portB_w(uint8_t data)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(junofrst_state::sh_irqtrigger_w)
|
||||
void junofrst_state::sh_irqtrigger_w(uint8_t data)
|
||||
{
|
||||
if (m_last_irq == 0 && data == 1)
|
||||
{
|
||||
@ -270,7 +270,7 @@ WRITE8_MEMBER(junofrst_state::sh_irqtrigger_w)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(junofrst_state::i8039_irq_w)
|
||||
void junofrst_state::i8039_irq_w(uint8_t data)
|
||||
{
|
||||
m_i8039->set_input_line(0, ASSERT_LINE);
|
||||
}
|
||||
|
@ -104,32 +104,32 @@ private:
|
||||
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
DECLARE_READ8_MEMBER( io_r );
|
||||
DECLARE_WRITE8_MEMBER( io_w );
|
||||
DECLARE_READ8_MEMBER( ppi_pa_r );
|
||||
DECLARE_WRITE8_MEMBER( ppi_pa_w );
|
||||
DECLARE_READ8_MEMBER( ppi_pb_r );
|
||||
DECLARE_WRITE8_MEMBER( ppi_pb_w );
|
||||
DECLARE_READ8_MEMBER( ppi_pc_r );
|
||||
DECLARE_WRITE8_MEMBER( ppi_pc_w );
|
||||
DECLARE_READ8_MEMBER( ppi_control_r );
|
||||
DECLARE_WRITE8_MEMBER( ppi_control_w );
|
||||
uint8_t io_r(offs_t offset);
|
||||
void io_w(uint8_t data);
|
||||
uint8_t ppi_pa_r();
|
||||
void ppi_pa_w(uint8_t data);
|
||||
uint8_t ppi_pb_r();
|
||||
void ppi_pb_w(uint8_t data);
|
||||
uint8_t ppi_pc_r();
|
||||
void ppi_pc_w(uint8_t data);
|
||||
uint8_t ppi_control_r();
|
||||
void ppi_control_w(uint8_t data);
|
||||
uint8_t pio_pa_r();
|
||||
void pio_pa_w(uint8_t data);
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(set_irq);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(clear_irq);
|
||||
DECLARE_READ8_MEMBER(pio_ad_r);
|
||||
DECLARE_READ8_MEMBER(pio_bd_r);
|
||||
DECLARE_READ8_MEMBER(pio_ac_r);
|
||||
DECLARE_READ8_MEMBER(pio_bc_r);
|
||||
DECLARE_WRITE8_MEMBER(pio_ad_w);
|
||||
DECLARE_WRITE8_MEMBER(pio_bd_w);
|
||||
DECLARE_WRITE8_MEMBER(pio_ac_w);
|
||||
DECLARE_WRITE8_MEMBER(pio_bc_w);
|
||||
uint8_t pio_ad_r();
|
||||
uint8_t pio_bd_r();
|
||||
uint8_t pio_ac_r();
|
||||
uint8_t pio_bc_r();
|
||||
void pio_ad_w(uint8_t data);
|
||||
void pio_bd_w(uint8_t data);
|
||||
void pio_ac_w(uint8_t data);
|
||||
void pio_bc_w(uint8_t data);
|
||||
uint8_t sby_r();
|
||||
void ald_w(uint8_t data);
|
||||
DECLARE_SNAPSHOT_LOAD_MEMBER(snapshot_cb);
|
||||
SNAPSHOT_LOAD_MEMBER(snapshot_cb);
|
||||
|
||||
void ace_io(address_map &map);
|
||||
void ace_mem(address_map &map);
|
||||
@ -266,7 +266,7 @@ SNAPSHOT_LOAD_MEMBER(ace_state::snapshot_cb)
|
||||
// io_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ace_state::io_r )
|
||||
uint8_t ace_state::io_r(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0xff;
|
||||
|
||||
@ -299,7 +299,7 @@ READ8_MEMBER( ace_state::io_r )
|
||||
// io_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ace_state::io_w )
|
||||
void ace_state::io_w(uint8_t data)
|
||||
{
|
||||
m_cassette->output(1);
|
||||
m_speaker->level_w(1);
|
||||
@ -310,22 +310,22 @@ WRITE8_MEMBER( ace_state::io_w )
|
||||
// ppi_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER( ace_state::ppi_pa_r )
|
||||
uint8_t ace_state::ppi_pa_r()
|
||||
{
|
||||
return m_ppi->read(0);
|
||||
}
|
||||
|
||||
READ8_MEMBER( ace_state::ppi_pb_r )
|
||||
uint8_t ace_state::ppi_pb_r()
|
||||
{
|
||||
return m_ppi->read(1);
|
||||
}
|
||||
|
||||
READ8_MEMBER( ace_state::ppi_pc_r )
|
||||
uint8_t ace_state::ppi_pc_r()
|
||||
{
|
||||
return m_ppi->read(2);
|
||||
}
|
||||
|
||||
READ8_MEMBER( ace_state::ppi_control_r )
|
||||
uint8_t ace_state::ppi_control_r()
|
||||
{
|
||||
return m_ppi->read(3);
|
||||
}
|
||||
@ -335,22 +335,22 @@ READ8_MEMBER( ace_state::ppi_control_r )
|
||||
// ppi_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER( ace_state::ppi_pa_w )
|
||||
void ace_state::ppi_pa_w(uint8_t data)
|
||||
{
|
||||
m_ppi->write(0, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( ace_state::ppi_pb_w )
|
||||
void ace_state::ppi_pb_w(uint8_t data)
|
||||
{
|
||||
m_ppi->write(1, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( ace_state::ppi_pc_w )
|
||||
void ace_state::ppi_pc_w(uint8_t data)
|
||||
{
|
||||
m_ppi->write(2, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( ace_state::ppi_control_w )
|
||||
void ace_state::ppi_control_w(uint8_t data)
|
||||
{
|
||||
m_ppi->write(3, data);
|
||||
}
|
||||
@ -360,22 +360,22 @@ WRITE8_MEMBER( ace_state::ppi_control_w )
|
||||
// pio_r -
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER(ace_state::pio_ad_r)
|
||||
uint8_t ace_state::pio_ad_r()
|
||||
{
|
||||
return m_z80pio->data_read(0);
|
||||
}
|
||||
|
||||
READ8_MEMBER(ace_state::pio_bd_r)
|
||||
uint8_t ace_state::pio_bd_r()
|
||||
{
|
||||
return m_z80pio->data_read(1);
|
||||
}
|
||||
|
||||
READ8_MEMBER(ace_state::pio_ac_r)
|
||||
uint8_t ace_state::pio_ac_r()
|
||||
{
|
||||
return m_z80pio->control_read();
|
||||
}
|
||||
|
||||
READ8_MEMBER(ace_state::pio_bc_r)
|
||||
uint8_t ace_state::pio_bc_r()
|
||||
{
|
||||
return m_z80pio->control_read();
|
||||
}
|
||||
@ -385,22 +385,22 @@ READ8_MEMBER(ace_state::pio_bc_r)
|
||||
// pio_w -
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER(ace_state::pio_ad_w)
|
||||
void ace_state::pio_ad_w(uint8_t data)
|
||||
{
|
||||
m_z80pio->data_write(0, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ace_state::pio_bd_w)
|
||||
void ace_state::pio_bd_w(uint8_t data)
|
||||
{
|
||||
m_z80pio->data_write(1, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ace_state::pio_ac_w)
|
||||
void ace_state::pio_ac_w(uint8_t data)
|
||||
{
|
||||
m_z80pio->control_write(0, data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ace_state::pio_bc_w)
|
||||
void ace_state::pio_bc_w(uint8_t data)
|
||||
{
|
||||
m_z80pio->control_write(1, data);
|
||||
}
|
||||
|
@ -86,9 +86,9 @@ public:
|
||||
private:
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void kbd_put(u8 data);
|
||||
DECLARE_READ8_MEMBER(status_r);
|
||||
DECLARE_READ8_MEMBER(key_r);
|
||||
DECLARE_READ8_MEMBER(ff_r);
|
||||
uint8_t status_r();
|
||||
uint8_t key_r();
|
||||
uint8_t ff_r();
|
||||
|
||||
void jupiter3_io(address_map &map);
|
||||
void jupiter3_mem(address_map &map);
|
||||
@ -161,7 +161,7 @@ void jupiter3_state::jupiter3_io(address_map &map)
|
||||
map(0xb2, 0xb2).r(FUNC(jupiter3_state::key_r));
|
||||
}
|
||||
|
||||
READ8_MEMBER( jupiter3_state::ff_r )
|
||||
uint8_t jupiter3_state::ff_r()
|
||||
{
|
||||
return 0xfd;
|
||||
}
|
||||
@ -177,14 +177,14 @@ READ8_MEMBER( jupiter3_state::ff_r )
|
||||
static INPUT_PORTS_START( jupiter )
|
||||
INPUT_PORTS_END
|
||||
|
||||
READ8_MEMBER( jupiter3_state::key_r )
|
||||
uint8_t jupiter3_state::key_r()
|
||||
{
|
||||
uint8_t ret = m_term_data;
|
||||
m_term_data = 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
READ8_MEMBER( jupiter3_state::status_r )
|
||||
uint8_t jupiter3_state::status_r()
|
||||
{
|
||||
return (m_term_data) ? 0x80 : 0x00;
|
||||
}
|
||||
|
@ -58,11 +58,11 @@ public:
|
||||
void k1003(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(port2_r);
|
||||
DECLARE_READ8_MEMBER(key_r);
|
||||
DECLARE_WRITE8_MEMBER(disp_1_w);
|
||||
DECLARE_WRITE8_MEMBER(disp_2_w);
|
||||
DECLARE_WRITE8_MEMBER(disp_w);
|
||||
uint8_t port2_r();
|
||||
uint8_t key_r();
|
||||
void disp_1_w(uint8_t data);
|
||||
void disp_2_w(uint8_t data);
|
||||
void disp_w(uint8_t data);
|
||||
|
||||
void k1003_io(address_map &map);
|
||||
void k1003_mem(address_map &map);
|
||||
@ -87,23 +87,23 @@ void k1003_state::k1003_mem(address_map &map)
|
||||
map(0x3000, 0x3aff).rom();
|
||||
}
|
||||
|
||||
READ8_MEMBER( k1003_state::port2_r )
|
||||
uint8_t k1003_state::port2_r()
|
||||
{
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
READ8_MEMBER( k1003_state::key_r )
|
||||
uint8_t k1003_state::key_r()
|
||||
{
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( k1003_state::disp_1_w )
|
||||
void k1003_state::disp_1_w(uint8_t data)
|
||||
{
|
||||
m_disp_1 = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( k1003_state::disp_2_w )
|
||||
void k1003_state::disp_2_w(uint8_t data)
|
||||
{
|
||||
m_disp_2 = data;
|
||||
}
|
||||
@ -121,7 +121,7 @@ uint8_t k1003_state::bit_to_dec(uint8_t val)
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( k1003_state::disp_w )
|
||||
void k1003_state::disp_w(uint8_t data)
|
||||
{
|
||||
m_digits[bit_to_dec(data)*2] = m_disp_1;
|
||||
m_digits[bit_to_dec(data)*2+1] = m_disp_2;
|
||||
|
@ -33,7 +33,7 @@ public:
|
||||
void init_k8915();
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(k8915_a8_w);
|
||||
void k8915_a8_w(uint8_t data);
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
void io_map(address_map &map);
|
||||
@ -47,7 +47,7 @@ private:
|
||||
};
|
||||
|
||||
|
||||
WRITE8_MEMBER( k8915_state::k8915_a8_w )
|
||||
void k8915_state::k8915_a8_w(uint8_t data)
|
||||
{
|
||||
// seems to switch ram and rom around.
|
||||
if (data == 0x87)
|
||||
|
@ -230,13 +230,13 @@ public:
|
||||
void init_kas89();
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(mux_w);
|
||||
DECLARE_READ8_MEMBER(mux_r);
|
||||
DECLARE_WRITE8_MEMBER(control_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_comm_w);
|
||||
DECLARE_WRITE8_MEMBER(int_ack_w);
|
||||
DECLARE_WRITE8_MEMBER(led_mux_data_w);
|
||||
DECLARE_WRITE8_MEMBER(led_mux_select_w);
|
||||
void mux_w(uint8_t data);
|
||||
uint8_t mux_r();
|
||||
void control_w(uint8_t data);
|
||||
void sound_comm_w(uint8_t data);
|
||||
void int_ack_w(uint8_t data);
|
||||
void led_mux_data_w(uint8_t data);
|
||||
void led_mux_select_w(uint8_t data);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(kas89_nmi_cb);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(kas89_sound_nmi_cb);
|
||||
void audio_io(address_map &map);
|
||||
@ -290,7 +290,7 @@ void kas89_state::machine_reset()
|
||||
* Input Ports Demux & Common Routines *
|
||||
****************************************/
|
||||
|
||||
WRITE8_MEMBER(kas89_state::mux_w)
|
||||
void kas89_state::mux_w(uint8_t data)
|
||||
{
|
||||
/* - bits -
|
||||
7654 3210
|
||||
@ -302,7 +302,7 @@ WRITE8_MEMBER(kas89_state::mux_w)
|
||||
m_mux_data = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(kas89_state::mux_r)
|
||||
uint8_t kas89_state::mux_r()
|
||||
{
|
||||
switch(m_mux_data)
|
||||
{
|
||||
@ -337,7 +337,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(kas89_state::kas89_sound_nmi_cb)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(kas89_state::control_w)
|
||||
void kas89_state::control_w(uint8_t data)
|
||||
{
|
||||
/* - bits -
|
||||
7654 3210
|
||||
@ -354,7 +354,7 @@ WRITE8_MEMBER(kas89_state::control_w)
|
||||
machine().bookkeeping().coin_counter_w(1, (data ^ 0xff) & 0x02); /* Credits Out counter */
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(kas89_state::sound_comm_w)
|
||||
void kas89_state::sound_comm_w(uint8_t data)
|
||||
{
|
||||
/* This port is used mainly for sound latch, but bit6 activates a
|
||||
sort of output port (maybe for a sign?)
|
||||
@ -363,7 +363,7 @@ WRITE8_MEMBER(kas89_state::sound_comm_w)
|
||||
bit6 = 1 ; outport data.
|
||||
|
||||
Once the ball is landed, the outport writes the winner number
|
||||
14 times (as an intermitent way).
|
||||
14 times (as an intermittent way).
|
||||
|
||||
When the attract starts, just before the game title appear, $3f
|
||||
is written to the outport... (maybe to clear the possible sign).
|
||||
@ -394,7 +394,7 @@ WRITE8_MEMBER(kas89_state::sound_comm_w)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(kas89_state::int_ack_w)
|
||||
void kas89_state::int_ack_w(uint8_t data)
|
||||
{
|
||||
m_audiocpu->set_input_line(0, CLEAR_LINE);
|
||||
}
|
||||
@ -404,7 +404,7 @@ WRITE8_MEMBER(kas89_state::int_ack_w)
|
||||
* Output Ports Demux & LEDs Support *
|
||||
****************************************/
|
||||
|
||||
WRITE8_MEMBER(kas89_state::led_mux_data_w)
|
||||
void kas89_state::led_mux_data_w(uint8_t data)
|
||||
{
|
||||
/* - bits -
|
||||
7654 3210
|
||||
@ -414,7 +414,7 @@ WRITE8_MEMBER(kas89_state::led_mux_data_w)
|
||||
m_leds_mux_data = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(kas89_state::led_mux_select_w)
|
||||
void kas89_state::led_mux_select_w(uint8_t data)
|
||||
{
|
||||
/* - bits -
|
||||
7654 3210
|
||||
|
@ -76,28 +76,28 @@ private:
|
||||
void memory_w(offs_t offset, uint8_t data);
|
||||
uint8_t io_r(offs_t offset);
|
||||
void io_w(offs_t offset, uint8_t data);
|
||||
DECLARE_READ8_MEMBER(page0_r);
|
||||
DECLARE_READ8_MEMBER(page1_r);
|
||||
DECLARE_READ8_MEMBER(mapper_r);
|
||||
DECLARE_WRITE8_MEMBER(mapper_w);
|
||||
DECLARE_READ8_MEMBER(sasi_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(sasi_ctrl_w);
|
||||
DECLARE_WRITE8_MEMBER(dma_map_w);
|
||||
DECLARE_WRITE8_MEMBER(status0_w);
|
||||
DECLARE_READ8_MEMBER(status1_r);
|
||||
DECLARE_WRITE8_MEMBER(status1_w);
|
||||
DECLARE_WRITE8_MEMBER(status2_w);
|
||||
uint8_t page0_r(offs_t offset);
|
||||
uint8_t page1_r(offs_t offset);
|
||||
uint8_t mapper_r(offs_t offset);
|
||||
void mapper_w(offs_t offset, uint8_t data);
|
||||
uint8_t sasi_ctrl_r();
|
||||
void sasi_ctrl_w(uint8_t data);
|
||||
void dma_map_w(uint8_t data);
|
||||
void status0_w(uint8_t data);
|
||||
uint8_t status1_r();
|
||||
void status1_w(uint8_t data);
|
||||
void status2_w(uint8_t data);
|
||||
|
||||
DECLARE_READ8_MEMBER(video_data_r);
|
||||
DECLARE_WRITE8_MEMBER(video_data_w);
|
||||
DECLARE_WRITE8_MEMBER(video_data_inc_w);
|
||||
DECLARE_WRITE8_MEMBER(video_data_dec_w);
|
||||
DECLARE_WRITE8_MEMBER(video_address_latch_high_w);
|
||||
DECLARE_WRITE8_MEMBER(video_address_latch_low_w);
|
||||
uint8_t video_data_r();
|
||||
void video_data_w(uint8_t data);
|
||||
void video_data_inc_w(uint8_t data);
|
||||
void video_data_dec_w(uint8_t data);
|
||||
void video_address_latch_high_w(uint8_t data);
|
||||
void video_address_latch_low_w(uint8_t data);
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(beeper_off);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(fdc_tc_w);
|
||||
void fdc_tc_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(fdc_drq_w);
|
||||
void drive0_led_cb(floppy_image_device *floppy, int state);
|
||||
void drive1_led_cb(floppy_image_device *floppy, int state);
|
||||
@ -230,7 +230,7 @@ static void kdt6_floppies(device_slot_interface &device)
|
||||
device.option_add("fd55f", TEAC_FD_55F);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::fdc_tc_w )
|
||||
void kdt6_state::fdc_tc_w(uint8_t data)
|
||||
{
|
||||
m_fdc->tc_w(1);
|
||||
m_fdc->tc_w(0);
|
||||
@ -257,34 +257,34 @@ void kdt6_state::drive1_led_cb(floppy_image_device *floppy, int state)
|
||||
// VIDEO
|
||||
//**************************************************************************
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::video_address_latch_high_w )
|
||||
void kdt6_state::video_address_latch_high_w(uint8_t data)
|
||||
{
|
||||
m_video_address &= 0x00ff;
|
||||
m_video_address |= (data << 8);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::video_address_latch_low_w )
|
||||
void kdt6_state::video_address_latch_low_w(uint8_t data)
|
||||
{
|
||||
m_video_address &= 0xff00;
|
||||
m_video_address |= (data << 0);
|
||||
}
|
||||
|
||||
READ8_MEMBER( kdt6_state::video_data_r )
|
||||
uint8_t kdt6_state::video_data_r()
|
||||
{
|
||||
return m_vram[m_video_address];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::video_data_w )
|
||||
void kdt6_state::video_data_w(uint8_t data)
|
||||
{
|
||||
m_vram[m_video_address] = ((m_status1 & 0x0c) << 6) | data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::video_data_inc_w )
|
||||
void kdt6_state::video_data_inc_w(uint8_t data)
|
||||
{
|
||||
m_vram[m_video_address++] = ((m_status1 & 0x0c) << 6) | data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::video_data_dec_w )
|
||||
void kdt6_state::video_data_dec_w(uint8_t data)
|
||||
{
|
||||
m_vram[m_video_address--] = ((m_status1 & 0x0c) << 6) | data;
|
||||
}
|
||||
@ -410,7 +410,7 @@ void kdt6_state::io_w(offs_t offset, uint8_t data)
|
||||
m_cpu->space(AS_IO).write_byte(offset, data);
|
||||
}
|
||||
|
||||
READ8_MEMBER( kdt6_state::page0_r )
|
||||
uint8_t kdt6_state::page0_r(offs_t offset)
|
||||
{
|
||||
if (BIT(m_status0, 5) == 0)
|
||||
return m_boot->as_u8(offset);
|
||||
@ -418,7 +418,7 @@ READ8_MEMBER( kdt6_state::page0_r )
|
||||
return reinterpret_cast<uint8_t *>(m_page_r[0]->base())[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER( kdt6_state::page1_r )
|
||||
uint8_t kdt6_state::page1_r(offs_t offset)
|
||||
{
|
||||
if (BIT(m_status0, 5) == 0)
|
||||
return m_boot->as_u8(0x1000 + offset);
|
||||
@ -426,7 +426,7 @@ READ8_MEMBER( kdt6_state::page1_r )
|
||||
return reinterpret_cast<uint8_t *>(m_page_r[1]->base())[offset];
|
||||
}
|
||||
|
||||
READ8_MEMBER( kdt6_state::sasi_ctrl_r )
|
||||
uint8_t kdt6_state::sasi_ctrl_r()
|
||||
{
|
||||
uint8_t data = 0;
|
||||
|
||||
@ -445,23 +445,23 @@ READ8_MEMBER( kdt6_state::sasi_ctrl_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::sasi_ctrl_w )
|
||||
void kdt6_state::sasi_ctrl_w(uint8_t data)
|
||||
{
|
||||
logerror("sasi_ctrl_w: %02x\n", data);
|
||||
m_sasi_dma = bool(BIT(data, 2) == 0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::dma_map_w )
|
||||
void kdt6_state::dma_map_w(uint8_t data)
|
||||
{
|
||||
m_dma_map = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( kdt6_state::mapper_r )
|
||||
uint8_t kdt6_state::mapper_r(offs_t offset)
|
||||
{
|
||||
return m_mapper[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::mapper_w )
|
||||
void kdt6_state::mapper_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_mapper[offset] = ((m_status2 & 0x0f) << 8) | data;
|
||||
|
||||
@ -477,7 +477,7 @@ WRITE8_MEMBER( kdt6_state::mapper_w )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::status0_w )
|
||||
void kdt6_state::status0_w(uint8_t data)
|
||||
{
|
||||
logerror("status0_w: %02x\n", data);
|
||||
|
||||
@ -506,7 +506,7 @@ WRITE8_MEMBER( kdt6_state::status0_w )
|
||||
m_status0 = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( kdt6_state::status1_r )
|
||||
uint8_t kdt6_state::status1_r()
|
||||
{
|
||||
// 7------- disable memory mapper (1 = disable)
|
||||
// -6------ display mode (1 = text, 0 = gfx)
|
||||
@ -520,7 +520,7 @@ READ8_MEMBER( kdt6_state::status1_r )
|
||||
return m_status1;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::status1_w )
|
||||
void kdt6_state::status1_w(uint8_t data)
|
||||
{
|
||||
logerror("status1_w: %02x\n", data);
|
||||
|
||||
@ -540,7 +540,7 @@ WRITE8_MEMBER( kdt6_state::status1_w )
|
||||
m_status1 = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( kdt6_state::status2_w )
|
||||
void kdt6_state::status2_w(uint8_t data)
|
||||
{
|
||||
if (0)
|
||||
logerror("status2_w: %02x\n", data);
|
||||
@ -574,8 +574,8 @@ void kdt6_state::machine_start()
|
||||
m_dummy_w = std::make_unique<uint8_t[]>(0x1000);
|
||||
|
||||
// override the region 0x0000 to 0x1fff here to enable prom reading
|
||||
m_cpu->space(AS_PROGRAM).install_read_handler(0x0000, 0x0fff, read8_delegate(*this, FUNC(kdt6_state::page0_r)));
|
||||
m_cpu->space(AS_PROGRAM).install_read_handler(0x1000, 0x1fff, read8_delegate(*this, FUNC(kdt6_state::page1_r)));
|
||||
m_cpu->space(AS_PROGRAM).install_read_handler(0x0000, 0x0fff, read8sm_delegate(*this, FUNC(kdt6_state::page0_r)));
|
||||
m_cpu->space(AS_PROGRAM).install_read_handler(0x1000, 0x1fff, read8sm_delegate(*this, FUNC(kdt6_state::page1_r)));
|
||||
|
||||
m_fdc->set_rate(250000);
|
||||
|
||||
@ -599,7 +599,7 @@ void kdt6_state::machine_start()
|
||||
void kdt6_state::machine_reset()
|
||||
{
|
||||
// status0 is forced to 0 on reset
|
||||
status0_w(m_cpu->space(AS_IO), 0, 0);
|
||||
status0_w(0);
|
||||
}
|
||||
|
||||
|
||||
|
@ -213,7 +213,7 @@ private:
|
||||
}
|
||||
|
||||
/* kenseim */
|
||||
DECLARE_WRITE16_MEMBER(cps1_kensei_w);
|
||||
void cps1_kensei_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
// certain
|
||||
|
||||
@ -400,7 +400,7 @@ READ_LINE_MEMBER(kenseim_state::cmd_LVm_r)
|
||||
|
||||
/* 68k side COMMS writes */
|
||||
|
||||
WRITE16_MEMBER(kenseim_state::cps1_kensei_w)
|
||||
void kenseim_state::cps1_kensei_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
@ -695,7 +695,7 @@ ROM_END
|
||||
|
||||
void kenseim_state::init_kenseim()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x800030, 0x800037, write16_delegate(*this, FUNC(kenseim_state::cps1_kensei_w)));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x800030, 0x800037, write16s_delegate(*this, FUNC(kenseim_state::cps1_kensei_w)));
|
||||
|
||||
init_cps1();
|
||||
|
||||
|
@ -112,10 +112,10 @@ protected:
|
||||
virtual void video_start() override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(sc0_vram_w);
|
||||
DECLARE_WRITE8_MEMBER(sc0_attr_w);
|
||||
DECLARE_WRITE8_MEMBER(led_array_w);
|
||||
DECLARE_WRITE8_MEMBER(kingdrbb_lamps_w);
|
||||
void sc0_vram_w(offs_t offset, uint8_t data);
|
||||
void sc0_attr_w(offs_t offset, uint8_t data);
|
||||
void led_array_w(offs_t offset, uint8_t data);
|
||||
void kingdrbb_lamps_w(uint8_t data);
|
||||
uint8_t hopper_io_r();
|
||||
void hopper_io_w(uint8_t data);
|
||||
void sound_cmd_w(uint8_t data);
|
||||
@ -294,7 +294,7 @@ uint32_t kingdrby_state::screen_update_kingdrby(screen_device &screen, bitmap_rg
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(kingdrby_state::sc0_vram_w)
|
||||
void kingdrby_state::sc0_vram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_vram[offset] = data;
|
||||
m_sc0_tilemap->mark_tile_dirty(offset);
|
||||
@ -302,7 +302,7 @@ WRITE8_MEMBER(kingdrby_state::sc0_vram_w)
|
||||
m_sc1_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(kingdrby_state::sc0_attr_w)
|
||||
void kingdrby_state::sc0_attr_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_attr[offset] = data;
|
||||
m_sc0_tilemap->mark_tile_dirty(offset);
|
||||
@ -414,7 +414,7 @@ uint8_t kingdrby_state::sound_cmd_r()
|
||||
static const uint8_t led_map[16] =
|
||||
{ 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7c,0x07,0x7f,0x67,0x77,0x7c,0x39,0x5e,0x79,0x00 };
|
||||
|
||||
WRITE8_MEMBER(kingdrby_state::led_array_w)
|
||||
void kingdrby_state::led_array_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
/*
|
||||
offset = directly tied with the button (i.e. offset 1 = 1-2, offset 2 = 1-3 etc.)
|
||||
@ -464,7 +464,7 @@ void kingdrby_state::slave_map(address_map &map)
|
||||
map(0x7c00, 0x7c00).portr("DSW");
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(kingdrby_state::kingdrbb_lamps_w)
|
||||
void kingdrby_state::kingdrbb_lamps_w(uint8_t data)
|
||||
{
|
||||
// (same as the inputs but active high)
|
||||
}
|
||||
|
@ -55,7 +55,7 @@ public:
|
||||
void dealracl(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(sound_nmi_w);
|
||||
void sound_nmi_w(uint8_t data);
|
||||
void kingpin_io_map(address_map &map);
|
||||
void kingpin_program_map(address_map &map);
|
||||
void kingpin_sound_map(address_map &map);
|
||||
@ -67,7 +67,7 @@ private:
|
||||
};
|
||||
|
||||
|
||||
WRITE8_MEMBER(kingpin_state::sound_nmi_w)
|
||||
void kingpin_state::sound_nmi_w(uint8_t data)
|
||||
{
|
||||
m_soundlatch->write(data);
|
||||
m_audiocpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
|
||||
|
@ -235,12 +235,12 @@ private:
|
||||
|
||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(irq0_start);
|
||||
DECLARE_READ32_MEMBER(control_r);
|
||||
DECLARE_WRITE32_MEMBER(control_w);
|
||||
DECLARE_READ32_MEMBER(ide_r);
|
||||
DECLARE_WRITE32_MEMBER(ide_w);
|
||||
DECLARE_READ32_MEMBER(ide_extra_r);
|
||||
DECLARE_WRITE32_MEMBER(ide_extra_w);
|
||||
uint32_t control_r(offs_t offset);
|
||||
void control_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
uint32_t ide_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
void ide_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
uint32_t ide_extra_r();
|
||||
void ide_extra_w(uint32_t data);
|
||||
|
||||
void main_map(address_map &map);
|
||||
};
|
||||
@ -372,25 +372,25 @@ INTERRUPT_GEN_MEMBER(kinst_state::irq0_start)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
READ32_MEMBER(kinst_state::ide_r)
|
||||
uint32_t kinst_state::ide_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
return m_ata->cs0_r(offset / 2, mem_mask);
|
||||
}
|
||||
|
||||
|
||||
WRITE32_MEMBER(kinst_state::ide_w)
|
||||
void kinst_state::ide_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
m_ata->cs0_w(offset / 2, data, mem_mask);
|
||||
}
|
||||
|
||||
|
||||
READ32_MEMBER(kinst_state::ide_extra_r)
|
||||
uint32_t kinst_state::ide_extra_r()
|
||||
{
|
||||
return m_ata->cs1_r(6, 0xff);
|
||||
}
|
||||
|
||||
|
||||
WRITE32_MEMBER(kinst_state::ide_extra_w)
|
||||
void kinst_state::ide_extra_w(uint32_t data)
|
||||
{
|
||||
m_ata->cs1_w(6, data, 0xff);
|
||||
}
|
||||
@ -403,7 +403,7 @@ WRITE32_MEMBER(kinst_state::ide_extra_w)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
READ32_MEMBER(kinst_state::control_r)
|
||||
uint32_t kinst_state::control_r(offs_t offset)
|
||||
{
|
||||
uint32_t result;
|
||||
static const char *const portnames[] = { "P1", "P2", "VOLUME", "UNUSED", "DSW" };
|
||||
@ -438,7 +438,7 @@ READ32_MEMBER(kinst_state::control_r)
|
||||
}
|
||||
|
||||
|
||||
WRITE32_MEMBER(kinst_state::control_w)
|
||||
void kinst_state::control_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
/* apply shuffling */
|
||||
offset = m_control_map[offset / 2];
|
||||
|
@ -70,11 +70,11 @@ private:
|
||||
tilemap_t *m_tilemap_2;
|
||||
uint16_t m_prot_data;
|
||||
|
||||
DECLARE_READ16_MEMBER(random_number_r);
|
||||
DECLARE_READ16_MEMBER(prot_r);
|
||||
DECLARE_WRITE16_MEMBER(prot_w);
|
||||
DECLARE_WRITE16_MEMBER(bmc_1_videoram_w);
|
||||
DECLARE_WRITE16_MEMBER(bmc_2_videoram_w);
|
||||
uint16_t random_number_r();
|
||||
uint16_t prot_r();
|
||||
void prot_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void bmc_1_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void bmc_2_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
TILE_GET_INFO_MEMBER(get_t1_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_t2_tile_info);
|
||||
virtual void video_start() override;
|
||||
@ -118,13 +118,13 @@ uint32_t koftball_state::screen_update_koftball(screen_device &screen, bitmap_in
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ16_MEMBER(koftball_state::random_number_r)
|
||||
uint16_t koftball_state::random_number_r()
|
||||
{
|
||||
return machine().rand();
|
||||
}
|
||||
|
||||
|
||||
READ16_MEMBER(koftball_state::prot_r)
|
||||
uint16_t koftball_state::prot_r()
|
||||
{
|
||||
switch(m_prot_data)
|
||||
{
|
||||
@ -138,18 +138,18 @@ READ16_MEMBER(koftball_state::prot_r)
|
||||
return machine().rand();
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(koftball_state::prot_w)
|
||||
void koftball_state::prot_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_prot_data);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(koftball_state::bmc_1_videoram_w)
|
||||
void koftball_state::bmc_1_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_bmc_1_videoram[offset]);
|
||||
m_tilemap_1->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(koftball_state::bmc_2_videoram_w)
|
||||
void koftball_state::bmc_2_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_bmc_2_videoram[offset]);
|
||||
m_tilemap_2->mark_tile_dirty(offset);
|
||||
|
@ -75,9 +75,9 @@ private:
|
||||
int m_inputval;
|
||||
int m_inputlen;
|
||||
int m_ioram[8];
|
||||
DECLARE_WRITE8_MEMBER(vram_w);
|
||||
DECLARE_READ8_MEMBER(io_r);
|
||||
DECLARE_WRITE8_MEMBER(io_w);
|
||||
void vram_w(offs_t offset, uint8_t data);
|
||||
uint8_t io_r(offs_t offset);
|
||||
void io_w(offs_t offset, uint8_t data);
|
||||
uint8_t input_r();
|
||||
void unknown_w(uint8_t data);
|
||||
TILE_GET_INFO_MEMBER(get_tile_info);
|
||||
@ -166,7 +166,7 @@ uint32_t koikoi_state::screen_update_koikoi(screen_device &screen, bitmap_ind16
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE8_MEMBER(koikoi_state::vram_w)
|
||||
void koikoi_state::vram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_tmap->mark_tile_dirty(offset & 0x3ff);
|
||||
@ -213,7 +213,7 @@ void koikoi_state::unknown_w(uint8_t data)
|
||||
//xor'ed mux select, player 1 = 1,2,4,8, player 2 = 0x10, 0x20, 0x40, 0x80
|
||||
}
|
||||
|
||||
READ8_MEMBER(koikoi_state::io_r)
|
||||
uint8_t koikoi_state::io_r(offs_t offset)
|
||||
{
|
||||
if (!offset)
|
||||
return ioport("IN0")->read() ^ m_ioram[4]; //coin
|
||||
@ -221,7 +221,7 @@ READ8_MEMBER(koikoi_state::io_r)
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(koikoi_state::io_w)
|
||||
void koikoi_state::io_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (offset == 7 && data == 0)
|
||||
m_inputcnt = 0; //reset read cycle counter
|
||||
|
@ -116,11 +116,11 @@ private:
|
||||
uint8_t m_sound_ctrl;
|
||||
uint8_t m_sound_intck;
|
||||
|
||||
DECLARE_WRITE16_MEMBER(eeprom_w);
|
||||
DECLARE_WRITE8_MEMBER(pcmram_w);
|
||||
DECLARE_READ8_MEMBER(pcmram_r);
|
||||
DECLARE_READ16_MEMBER(tms57002_status_word_r);
|
||||
DECLARE_WRITE16_MEMBER(tms57002_control_word_w);
|
||||
void eeprom_w(uint16_t data);
|
||||
void pcmram_w(offs_t offset, uint8_t data);
|
||||
uint8_t pcmram_r(offs_t offset);
|
||||
uint16_t tms57002_status_word_r();
|
||||
void tms57002_control_word_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
DECLARE_MACHINE_START(konamigq);
|
||||
DECLARE_MACHINE_RESET(konamigq);
|
||||
INTERRUPT_GEN_MEMBER(tms_sync);
|
||||
@ -148,7 +148,7 @@ static const uint16_t konamigq_def_eeprom[64] =
|
||||
0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa, 0xaaaa,
|
||||
};
|
||||
|
||||
WRITE16_MEMBER(konamigq_state::eeprom_w)
|
||||
void konamigq_state::eeprom_w(uint16_t data)
|
||||
{
|
||||
ioport("EEPROMOUT")->write(data & 0x07, 0xff);
|
||||
m_soundcpu->set_input_line(INPUT_LINE_RESET, ( data & 0x40 ) ? CLEAR_LINE : ASSERT_LINE );
|
||||
@ -157,12 +157,12 @@ WRITE16_MEMBER(konamigq_state::eeprom_w)
|
||||
|
||||
/* PCM RAM */
|
||||
|
||||
WRITE8_MEMBER(konamigq_state::pcmram_w)
|
||||
void konamigq_state::pcmram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_pcmram[ offset ] = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(konamigq_state::pcmram_r)
|
||||
uint8_t konamigq_state::pcmram_r(offs_t offset)
|
||||
{
|
||||
return m_pcmram[ offset ];
|
||||
}
|
||||
@ -199,14 +199,14 @@ INTERRUPT_GEN_MEMBER(konamigq_state::tms_sync)
|
||||
m_dasp->sync_w(1);
|
||||
}
|
||||
|
||||
READ16_MEMBER(konamigq_state::tms57002_status_word_r)
|
||||
uint16_t konamigq_state::tms57002_status_word_r()
|
||||
{
|
||||
return (m_dasp->dready_r() ? 4 : 0) |
|
||||
(m_dasp->pc0_r() ? 2 : 0) |
|
||||
(m_dasp->empty_r() ? 1 : 0);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(konamigq_state::tms57002_control_word_w)
|
||||
void konamigq_state::tms57002_control_word_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
|
@ -94,29 +94,29 @@ protected:
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
DECLARE_READ8_MEMBER(ymzram_r);
|
||||
DECLARE_WRITE8_MEMBER(ymzram_w);
|
||||
DECLARE_READ16_MEMBER(cf_regs_r);
|
||||
DECLARE_WRITE16_MEMBER(cf_regs_w);
|
||||
DECLARE_READ16_MEMBER(cf_data_r);
|
||||
DECLARE_WRITE16_MEMBER(cf_data_w);
|
||||
DECLARE_READ8_MEMBER(rtc_r);
|
||||
DECLARE_WRITE8_MEMBER(rtc_w);
|
||||
DECLARE_READ64_MEMBER(portc_r);
|
||||
DECLARE_WRITE64_MEMBER(portc_w);
|
||||
DECLARE_WRITE64_MEMBER(portc_medal_w);
|
||||
DECLARE_READ64_MEMBER(porte_r);
|
||||
DECLARE_WRITE64_MEMBER(porte_w);
|
||||
DECLARE_WRITE64_MEMBER(porte_medal_w);
|
||||
DECLARE_READ16_MEMBER(dipsw_r);
|
||||
u8 ymzram_r(offs_t offset);
|
||||
void ymzram_w(offs_t offset, u8 data);
|
||||
u16 cf_regs_r(offs_t offset, u16 mem_mask = ~0);
|
||||
void cf_regs_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
u16 cf_data_r();
|
||||
void cf_data_w(u16 data);
|
||||
u8 rtc_r();
|
||||
void rtc_w(u8 data);
|
||||
u64 portc_r();
|
||||
void portc_w(u64 data);
|
||||
void portc_medal_w(u64 data);
|
||||
u64 porte_r();
|
||||
void porte_w(u64 data);
|
||||
void porte_medal_w(u64 data);
|
||||
u16 dipsw_r();
|
||||
u8 m_portc_data = 0xff;
|
||||
u8 m_porte_data = 0xff;
|
||||
|
||||
// Q2SD GPU
|
||||
DECLARE_READ16_MEMBER(gpu_r);
|
||||
u16 gpu_r(offs_t offset);
|
||||
void gpu_w(offs_t offset, uint16_t data, uint16_t mem_mask = 0xffff);
|
||||
DECLARE_READ16_MEMBER(vram_r);
|
||||
DECLARE_WRITE16_MEMBER(vram_w);
|
||||
u16 vram_r(offs_t offset);
|
||||
void vram_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
DECLARE_WRITE_LINE_MEMBER(vblank);
|
||||
void do_render(bool vbkem);
|
||||
void draw_quad_tex(u16 cmd, u16 *data);
|
||||
@ -198,7 +198,7 @@ protected:
|
||||
|
||||
|
||||
// CF interface, looks like standard memory-mapped ATA layout, probably should be devicified
|
||||
READ16_MEMBER(gsan_state::cf_regs_r)
|
||||
u16 gsan_state::cf_regs_r(offs_t offset, u16 mem_mask)
|
||||
{
|
||||
offset *= 2;
|
||||
u16 data = 0;
|
||||
@ -209,7 +209,7 @@ READ16_MEMBER(gsan_state::cf_regs_r)
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(gsan_state::cf_regs_w)
|
||||
void gsan_state::cf_regs_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
offset *= 2;
|
||||
if (ACCESSING_BITS_0_7)
|
||||
@ -218,46 +218,46 @@ WRITE16_MEMBER(gsan_state::cf_regs_w)
|
||||
m_ata->cs0_w(offset + 1, data >> 8, 0xff);
|
||||
}
|
||||
|
||||
READ16_MEMBER(gsan_state::cf_data_r)
|
||||
u16 gsan_state::cf_data_r()
|
||||
{
|
||||
u16 data = m_ata->cs0_r(0, 0xffff);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(gsan_state::cf_data_w)
|
||||
void gsan_state::cf_data_w(u16 data)
|
||||
{
|
||||
m_ata->cs0_w(0, data, 0xffff);
|
||||
}
|
||||
|
||||
// misc I/O
|
||||
READ16_MEMBER(gsan_state::dipsw_r)
|
||||
u16 gsan_state::dipsw_r()
|
||||
{
|
||||
return m_dipsw_r->read();
|
||||
}
|
||||
READ8_MEMBER(gsan_state::rtc_r)
|
||||
u8 gsan_state::rtc_r()
|
||||
{
|
||||
return m_rtc_r->read();
|
||||
}
|
||||
WRITE8_MEMBER(gsan_state::rtc_w)
|
||||
void gsan_state::rtc_w(u8 data)
|
||||
{
|
||||
m_rtc_w->write(data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(gsan_state::ymzram_r)
|
||||
u8 gsan_state::ymzram_r(offs_t offset)
|
||||
{
|
||||
return m_ymzram[offset];
|
||||
}
|
||||
WRITE8_MEMBER(gsan_state::ymzram_w)
|
||||
void gsan_state::ymzram_w(offs_t offset, u8 data)
|
||||
{
|
||||
m_ymzram[offset] = data;
|
||||
}
|
||||
|
||||
// SH-3 GPIO output ports
|
||||
READ64_MEMBER(gsan_state::portc_r)
|
||||
u64 gsan_state::portc_r()
|
||||
{
|
||||
return m_portc_data;
|
||||
}
|
||||
WRITE64_MEMBER(gsan_state::portc_w)
|
||||
void gsan_state::portc_w(u64 data)
|
||||
{
|
||||
/* DDR
|
||||
---- x--- /Coin counter
|
||||
@ -269,7 +269,7 @@ WRITE64_MEMBER(gsan_state::portc_w)
|
||||
|
||||
machine().bookkeeping().coin_counter_w(0, ~data & 8);
|
||||
}
|
||||
WRITE64_MEMBER(gsan_state::portc_medal_w)
|
||||
void gsan_state::portc_medal_w(u64 data)
|
||||
{
|
||||
/* Medal
|
||||
---- ---x Medal in counter
|
||||
@ -284,11 +284,11 @@ WRITE64_MEMBER(gsan_state::portc_medal_w)
|
||||
machine().bookkeeping().coin_counter_w(1, data & 2);
|
||||
machine().bookkeeping().coin_counter_w(2, data & 1);
|
||||
}
|
||||
READ64_MEMBER(gsan_state::porte_r)
|
||||
u64 gsan_state::porte_r()
|
||||
{
|
||||
return m_porte_data;
|
||||
}
|
||||
WRITE64_MEMBER(gsan_state::porte_w)
|
||||
void gsan_state::porte_w(u64 data)
|
||||
{
|
||||
/* DDR
|
||||
---- -x-- Lamp R3
|
||||
@ -300,7 +300,7 @@ WRITE64_MEMBER(gsan_state::porte_w)
|
||||
*/
|
||||
m_porte_data = data;
|
||||
}
|
||||
WRITE64_MEMBER(gsan_state::porte_medal_w)
|
||||
void gsan_state::porte_medal_w(u64 data)
|
||||
{
|
||||
/* Medal
|
||||
---- ---x Medal in lock
|
||||
@ -317,17 +317,17 @@ WRITE64_MEMBER(gsan_state::porte_medal_w)
|
||||
|
||||
|
||||
// Q2SD GPU
|
||||
READ16_MEMBER(gsan_state::vram_r)
|
||||
u16 gsan_state::vram_r(offs_t offset)
|
||||
{
|
||||
return m_vram[offset];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(gsan_state::vram_w)
|
||||
void gsan_state::vram_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_vram[offset]);
|
||||
}
|
||||
|
||||
READ16_MEMBER(gsan_state::gpu_r)
|
||||
u16 gsan_state::gpu_r(offs_t offset)
|
||||
{
|
||||
return m_gpuregs[offset];
|
||||
}
|
||||
|
@ -161,9 +161,9 @@ protected:
|
||||
|
||||
virtual void machine_start() override;
|
||||
|
||||
DECLARE_WRITE16_MEMBER(btc_trackball_w);
|
||||
DECLARE_READ16_MEMBER(tokimeki_serial_r);
|
||||
DECLARE_WRITE16_MEMBER(tokimeki_serial_w);
|
||||
void btc_trackball_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t tokimeki_serial_r();
|
||||
void tokimeki_serial_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void scsi_dma_read( uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size );
|
||||
void scsi_dma_write( uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size );
|
||||
|
||||
@ -194,8 +194,8 @@ public:
|
||||
private:
|
||||
virtual void machine_start() override;
|
||||
|
||||
DECLARE_READ16_MEMBER(flash_r);
|
||||
DECLARE_WRITE16_MEMBER(flash_w);
|
||||
uint16_t flash_r(offs_t offset);
|
||||
void flash_w(offs_t offset, uint16_t data);
|
||||
|
||||
void simpbowl_map(address_map &map);
|
||||
|
||||
@ -455,7 +455,7 @@ INPUT_PORTS_END
|
||||
|
||||
/* Simpsons Bowling */
|
||||
|
||||
READ16_MEMBER(simpbowl_state::flash_r)
|
||||
uint16_t simpbowl_state::flash_r(offs_t offset)
|
||||
{
|
||||
if (offset == 4) // set odd address
|
||||
{
|
||||
@ -477,7 +477,7 @@ READ16_MEMBER(simpbowl_state::flash_r)
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(simpbowl_state::flash_w)
|
||||
void simpbowl_state::flash_w(offs_t offset, uint16_t data)
|
||||
{
|
||||
int chip;
|
||||
|
||||
@ -534,7 +534,7 @@ INPUT_PORTS_END
|
||||
|
||||
/* Beat the Champ */
|
||||
|
||||
WRITE16_MEMBER(konamigv_state::btc_trackball_w)
|
||||
void konamigv_state::btc_trackball_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
// osd_printf_debug( "w %08x %08x %08x %08x\n", m_maincpu->pc(), offset, data, mem_mask );
|
||||
|
||||
@ -580,7 +580,7 @@ INPUT_PORTS_END
|
||||
|
||||
/* Tokimeki Memorial games - have a mouse and printer and who knows what else */
|
||||
|
||||
READ16_MEMBER(konamigv_state::tokimeki_serial_r)
|
||||
uint16_t konamigv_state::tokimeki_serial_r()
|
||||
{
|
||||
// bits checked: 0x80 and 0x20 for periodic status (800b6968 and 800b69e0 in tmoshs)
|
||||
// 0x08 for reading the serial device (8005e624)
|
||||
@ -588,7 +588,7 @@ READ16_MEMBER(konamigv_state::tokimeki_serial_r)
|
||||
return 0xffff;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(konamigv_state::tokimeki_serial_w)
|
||||
void konamigv_state::tokimeki_serial_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
/*
|
||||
serial EEPROM-like device here: when mem_mask == 0x000000ff only,
|
||||
|
@ -297,19 +297,19 @@ public:
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(ata_int);
|
||||
|
||||
DECLARE_READ16_MEMBER(konami_io0_r);
|
||||
DECLARE_WRITE16_MEMBER(konami_io0_w);
|
||||
DECLARE_READ16_MEMBER(konami_sio_r);
|
||||
DECLARE_WRITE16_MEMBER(konami_sio_w);
|
||||
DECLARE_READ16_MEMBER(konami_io1_r);
|
||||
DECLARE_WRITE16_MEMBER(konami_io1_w);
|
||||
DECLARE_WRITE16_MEMBER(konami_eeprom_w);
|
||||
uint16_t konami_io0_r(offs_t offset);
|
||||
void konami_io0_w(offs_t offset, uint16_t data);
|
||||
uint16_t konami_sio_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void konami_sio_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t konami_io1_r(offs_t offset);
|
||||
void konami_io1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void konami_eeprom_w(uint16_t data);
|
||||
|
||||
void init_totlvice();
|
||||
void init_btltryst();
|
||||
void init_hellngt();
|
||||
|
||||
DECLARE_WRITE16_MEMBER(konami_atapi_unk_w)
|
||||
void konami_atapi_unk_w(uint16_t data)
|
||||
{
|
||||
// 8000 = /Reset
|
||||
// 4000 = C000 ... DOIO DMA ... 4000
|
||||
@ -324,12 +324,12 @@ public:
|
||||
}
|
||||
}
|
||||
|
||||
DECLARE_READ16_MEMBER(konami_ide_r)
|
||||
uint16_t konami_ide_r(offs_t offset, uint16_t mem_mask = ~0)
|
||||
{
|
||||
return swapendian_int16(m_ata->cs0_r(offset, mem_mask));
|
||||
}
|
||||
|
||||
DECLARE_WRITE16_MEMBER(konami_ide_w)
|
||||
void konami_ide_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0)
|
||||
{
|
||||
m_ata->cs0_w(offset, swapendian_int16(data), mem_mask);
|
||||
}
|
||||
@ -436,7 +436,7 @@ WRITE_LINE_MEMBER( konamim2_state::ata_int )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
READ16_MEMBER( konamim2_state::konami_io0_r )
|
||||
uint16_t konamim2_state::konami_io0_r(offs_t offset)
|
||||
{
|
||||
// printf("IO R: %08X\n", offset);
|
||||
|
||||
@ -500,7 +500,7 @@ READ16_MEMBER( konamim2_state::konami_io0_r )
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( konamim2_state::konami_io0_w )
|
||||
void konamim2_state::konami_io0_w(offs_t offset, uint16_t data)
|
||||
{
|
||||
// 9: 0000, 0xFFF
|
||||
// printf("IO W: %08x %08x\n", offset, data);
|
||||
@ -531,7 +531,7 @@ WRITE16_MEMBER( konamim2_state::konami_io0_w )
|
||||
7: |........ ........| Unknown
|
||||
*/
|
||||
|
||||
READ16_MEMBER( konamim2_state::konami_io1_r )
|
||||
uint16_t konamim2_state::konami_io1_r(offs_t offset)
|
||||
{
|
||||
uint16_t data = 0;
|
||||
|
||||
@ -590,7 +590,7 @@ READ16_MEMBER( konamim2_state::konami_io1_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( konamim2_state::konami_io1_w )
|
||||
void konamim2_state::konami_io1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
// 0x0200 = ADC?
|
||||
// 0x0800 = Coin counter 1
|
||||
@ -635,7 +635,7 @@ WRITE16_MEMBER( konamim2_state::konami_io1_w )
|
||||
7: |xxxxxxxx xxxxxxxx| Register R/W
|
||||
*/
|
||||
|
||||
READ16_MEMBER( konamim2_state::konami_sio_r )
|
||||
uint16_t konamim2_state::konami_sio_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
uint16_t data = 0;
|
||||
|
||||
@ -651,7 +651,7 @@ READ16_MEMBER( konamim2_state::konami_sio_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( konamim2_state::konami_sio_w )
|
||||
void konamim2_state::konami_sio_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -664,7 +664,7 @@ WRITE16_MEMBER( konamim2_state::konami_sio_w )
|
||||
}
|
||||
|
||||
// TODO: Use output port
|
||||
WRITE16_MEMBER( konamim2_state::konami_eeprom_w )
|
||||
void konamim2_state::konami_eeprom_w(uint16_t data)
|
||||
{
|
||||
// 3 = CS
|
||||
// 2 = CLK
|
||||
|
@ -47,11 +47,10 @@ private:
|
||||
// screen updates
|
||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
void konblands_palette(palette_device &palette) const;
|
||||
DECLARE_READ8_MEMBER(ldp_r);
|
||||
DECLARE_WRITE8_MEMBER(ldp_w);
|
||||
DECLARE_WRITE8_MEMBER(nmi_enable_w);
|
||||
DECLARE_WRITE8_MEMBER(irq_enable_w);
|
||||
DECLARE_WRITE8_MEMBER(firq_enable_w);
|
||||
uint8_t ldp_r();
|
||||
void nmi_enable_w(uint8_t data);
|
||||
void irq_enable_w(uint8_t data);
|
||||
void firq_enable_w(uint8_t data);
|
||||
INTERRUPT_GEN_MEMBER(vblank_irq);
|
||||
INTERRUPT_GEN_MEMBER(timer_irq);
|
||||
DECLARE_WRITE_LINE_MEMBER(ld_command_strobe_cb);
|
||||
@ -122,27 +121,22 @@ uint32_t konblands_state::screen_update(screen_device &screen, bitmap_rgb32 &bit
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ8_MEMBER(konblands_state::ldp_r)
|
||||
uint8_t konblands_state::ldp_r()
|
||||
{
|
||||
return m_laserdisc->status_r();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konblands_state::ldp_w)
|
||||
{
|
||||
m_laserdisc->data_w(data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konblands_state::nmi_enable_w)
|
||||
void konblands_state::nmi_enable_w(uint8_t data)
|
||||
{
|
||||
m_nmi_enable = bool(BIT(data,0));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konblands_state::irq_enable_w)
|
||||
void konblands_state::irq_enable_w(uint8_t data)
|
||||
{
|
||||
m_irq_enable = bool(BIT(data,0));
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konblands_state::firq_enable_w)
|
||||
void konblands_state::firq_enable_w(uint8_t data)
|
||||
{
|
||||
m_firq_enable = bool(BIT(data,0));
|
||||
}
|
||||
@ -150,7 +144,7 @@ WRITE8_MEMBER(konblands_state::firq_enable_w)
|
||||
void konblands_state::konblands_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x0000).portr("DSW1").nopw(); // sn latch
|
||||
map(0x0800, 0x0800).portr("DSW2").w(FUNC(konblands_state::ldp_w));
|
||||
map(0x0800, 0x0800).portr("DSW2").w(m_laserdisc, FUNC(pioneer_ldv1000_device::data_w));
|
||||
map(0x1000, 0x1000).nopw().r(FUNC(konblands_state::ldp_r)); // led
|
||||
map(0x1001, 0x1001).nopw(); // coin counter 2
|
||||
map(0x1002, 0x1002).nopw(); // coin counter 1
|
||||
@ -170,7 +164,7 @@ void konblands_state::konblands_map(address_map &map)
|
||||
void konblands_state::konblandsh_map(address_map &map)
|
||||
{
|
||||
map(0x0000, 0x0000).r(FUNC(konblands_state::ldp_r));
|
||||
map(0x0400, 0x0400).w(FUNC(konblands_state::ldp_w));
|
||||
map(0x0400, 0x0400).w(m_laserdisc, FUNC(pioneer_ldv1000_device::data_w));
|
||||
map(0x0802, 0x0802).nopw(); // led
|
||||
map(0x0803, 0x0803).nopw(); // enable overlay transparency
|
||||
map(0x0806, 0x0806).nopr().w(FUNC(konblands_state::irq_enable_w));
|
||||
|
@ -97,19 +97,19 @@ public:
|
||||
}
|
||||
|
||||
private:
|
||||
DECLARE_READ32_MEMBER(mcu2_r);
|
||||
DECLARE_READ32_MEMBER(ifu2_r);
|
||||
DECLARE_READ32_MEMBER(ctrl0_r);
|
||||
DECLARE_READ32_MEMBER(ctrl1_r);
|
||||
DECLARE_READ32_MEMBER(ctrl2_r);
|
||||
DECLARE_READ32_MEMBER(ctrl3_r);
|
||||
DECLARE_WRITE32_MEMBER(eeprom_w);
|
||||
DECLARE_READ32_MEMBER(sound_data_r);
|
||||
DECLARE_WRITE32_MEMBER(sound_data_w);
|
||||
uint32_t mcu2_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
uint32_t ifu2_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
uint32_t ctrl0_r();
|
||||
uint32_t ctrl1_r();
|
||||
uint32_t ctrl2_r();
|
||||
uint32_t ctrl3_r();
|
||||
void eeprom_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
uint32_t sound_data_r();
|
||||
void sound_data_w(uint32_t data);
|
||||
|
||||
DECLARE_READ16_MEMBER(ifu_unk_r);
|
||||
DECLARE_READ16_MEMBER(ifu_dpram_r);
|
||||
DECLARE_WRITE16_MEMBER(ifu_dpram_w);
|
||||
uint16_t ifu_unk_r();
|
||||
uint16_t ifu_dpram_r(offs_t offset);
|
||||
void ifu_dpram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(gcu_interrupt);
|
||||
INTERRUPT_GEN_MEMBER(vbl_interrupt);
|
||||
@ -137,7 +137,7 @@ uint32_t konendev_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
|
||||
return m_gcu->draw(screen, bitmap, cliprect);
|
||||
}
|
||||
|
||||
READ32_MEMBER(konendev_state::mcu2_r)
|
||||
uint32_t konendev_state::mcu2_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
uint32_t r = 0;
|
||||
|
||||
@ -165,7 +165,7 @@ READ32_MEMBER(konendev_state::mcu2_r)
|
||||
return r;
|
||||
}
|
||||
|
||||
READ32_MEMBER(konendev_state::ifu2_r)
|
||||
uint32_t konendev_state::ifu2_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
uint32_t r = 0;
|
||||
|
||||
@ -177,27 +177,27 @@ READ32_MEMBER(konendev_state::ifu2_r)
|
||||
return r;
|
||||
}
|
||||
|
||||
READ32_MEMBER(konendev_state::ctrl0_r) // doors, switches
|
||||
uint32_t konendev_state::ctrl0_r() // doors, switches
|
||||
{
|
||||
return ioport("IN1")->read();
|
||||
}
|
||||
|
||||
READ32_MEMBER(konendev_state::ctrl1_r) // hard meter access, hopper
|
||||
uint32_t konendev_state::ctrl1_r() // hard meter access, hopper
|
||||
{
|
||||
return ioport("IN2")->read();
|
||||
}
|
||||
|
||||
READ32_MEMBER(konendev_state::ctrl2_r) // main door optic
|
||||
uint32_t konendev_state::ctrl2_r() // main door optic
|
||||
{
|
||||
return ioport("IN3")->read();
|
||||
}
|
||||
|
||||
READ32_MEMBER(konendev_state::ctrl3_r) // buttons
|
||||
uint32_t konendev_state::ctrl3_r() // buttons
|
||||
{
|
||||
return ioport("IN0")->read();
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(konendev_state::eeprom_w)
|
||||
void konendev_state::eeprom_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
@ -207,12 +207,12 @@ WRITE32_MEMBER(konendev_state::eeprom_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ32_MEMBER(konendev_state::sound_data_r)
|
||||
uint32_t konendev_state::sound_data_r()
|
||||
{
|
||||
return 0xffffffff;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(konendev_state::sound_data_w)
|
||||
void konendev_state::sound_data_w(uint32_t data)
|
||||
{
|
||||
}
|
||||
|
||||
@ -237,17 +237,17 @@ void konendev_state::konendev_map(address_map &map)
|
||||
map(0x7ff00000, 0x7fffffff).rom().region("program", 0);
|
||||
}
|
||||
|
||||
READ16_MEMBER(konendev_state::ifu_unk_r)
|
||||
uint16_t konendev_state::ifu_unk_r()
|
||||
{
|
||||
return 0xc3c3; // H8 program crashes immediately if it doesn't see
|
||||
}
|
||||
|
||||
READ16_MEMBER(konendev_state::ifu_dpram_r)
|
||||
uint16_t konendev_state::ifu_dpram_r(offs_t offset)
|
||||
{
|
||||
return m_dpram_base[offset];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(konendev_state::ifu_dpram_w)
|
||||
void konendev_state::ifu_dpram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_dpram_base[offset]);
|
||||
}
|
||||
|
@ -40,7 +40,6 @@ public:
|
||||
void konin(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(picu_b_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(picu_r3_w);
|
||||
|
||||
void konin_io(address_map &map);
|
||||
@ -53,11 +52,6 @@ private:
|
||||
required_device<pit8253_device> m_iopit;
|
||||
};
|
||||
|
||||
WRITE8_MEMBER(konin_state::picu_b_w)
|
||||
{
|
||||
m_picu->b_w(data);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(konin_state::picu_r3_w)
|
||||
{
|
||||
m_picu->r_w(4, !state);
|
||||
@ -79,7 +73,7 @@ void konin_state::konin_io(address_map &map)
|
||||
{
|
||||
map.unmap_value_high();
|
||||
map.global_mask(0xff);
|
||||
map(0x24, 0x24).w(FUNC(konin_state::picu_b_w));
|
||||
map(0x24, 0x24).w(m_picu, FUNC(i8214_device::b_w));
|
||||
map(0x80, 0x83).lrw8(
|
||||
NAME([this](offs_t offset) { return m_ioppi->read(offset^3); }),
|
||||
NAME([this](offs_t offset, u8 data) { m_ioppi->write(offset^3, data); }));
|
||||
|
@ -102,12 +102,12 @@ private:
|
||||
void mario_nvram_init(nvram_device &nvram, void *base, size_t size);
|
||||
DECLARE_MACHINE_START(shuriboy);
|
||||
|
||||
DECLARE_READ8_MEMBER(vram_r);
|
||||
DECLARE_WRITE8_MEMBER(vram_w);
|
||||
DECLARE_WRITE8_MEMBER(bankswitch_w);
|
||||
DECLARE_WRITE8_MEMBER(control2_w);
|
||||
DECLARE_WRITE8_MEMBER(medalcnt_w);
|
||||
DECLARE_WRITE8_MEMBER(lamps_w);
|
||||
uint8_t vram_r(offs_t offset);
|
||||
void vram_w(offs_t offset, uint8_t data);
|
||||
void bankswitch_w(uint8_t data);
|
||||
void control2_w(uint8_t data);
|
||||
void medalcnt_w(uint8_t data);
|
||||
void lamps_w(uint8_t data);
|
||||
|
||||
uint32_t screen_update_konmedal(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
uint32_t screen_update_shuriboy(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
@ -117,15 +117,15 @@ private:
|
||||
WRITE_LINE_MEMBER(vbl_ack_w) { m_maincpu->set_input_line(0, CLEAR_LINE); }
|
||||
WRITE_LINE_MEMBER(nmi_ack_w) { m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE); }
|
||||
void ccu_int_time_w(uint8_t data) { m_ccu_int_time = data; }
|
||||
WRITE8_MEMBER(k056832_w) { m_k056832->write(offset ^ 1, data); }
|
||||
WRITE8_MEMBER(k056832_b_w) { m_k056832->b_w(offset ^ 1, data); }
|
||||
void k056832_w(offs_t offset, uint8_t data) { m_k056832->write(offset ^ 1, data); }
|
||||
void k056832_b_w(offs_t offset, uint8_t data) { m_k056832->b_w(offset ^ 1, data); }
|
||||
|
||||
K052109_CB_MEMBER(shuriboy_tile_callback);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(shuri_scanline);
|
||||
DECLARE_WRITE8_MEMBER(shuri_bank_w);
|
||||
DECLARE_READ8_MEMBER(shuri_irq_r);
|
||||
DECLARE_WRITE8_MEMBER(shuri_irq_w);
|
||||
DECLARE_WRITE8_MEMBER(mario_scrollhack_w);
|
||||
void shuri_bank_w(uint8_t data);
|
||||
uint8_t shuri_irq_r();
|
||||
void shuri_irq_w(uint8_t data);
|
||||
void mario_scrollhack_w(uint8_t data);
|
||||
|
||||
void ddboy_main(address_map &map);
|
||||
void medal_main(address_map &map);
|
||||
@ -155,7 +155,7 @@ private:
|
||||
int m_layer_order[4];
|
||||
};
|
||||
|
||||
WRITE8_MEMBER(konmedal_state::control2_w)
|
||||
void konmedal_state::control2_w(uint8_t data)
|
||||
{
|
||||
/* CN3
|
||||
---- ---x uPD7759 /ST (TMNT-based boards)
|
||||
@ -177,7 +177,7 @@ WRITE8_MEMBER(konmedal_state::control2_w)
|
||||
machine().bookkeeping().coin_lockout_w(1, (data & 0x20) ? 0 : 1);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konmedal_state::medalcnt_w)
|
||||
void konmedal_state::medalcnt_w(uint8_t data)
|
||||
{
|
||||
/* CN5
|
||||
---- ---x Medal counter +1 (medal in)
|
||||
@ -188,14 +188,14 @@ WRITE8_MEMBER(konmedal_state::medalcnt_w)
|
||||
machine().bookkeeping().coin_lockout_w(2, (data & 4) ? 0 : 1);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konmedal_state::lamps_w)
|
||||
void konmedal_state::lamps_w(uint8_t data)
|
||||
{
|
||||
// CN6
|
||||
for (int i = 0; i < 8; i++)
|
||||
m_lamps[i] = BIT(data, i);
|
||||
}
|
||||
|
||||
READ8_MEMBER(konmedal_state::vram_r)
|
||||
uint8_t konmedal_state::vram_r(offs_t offset)
|
||||
{
|
||||
if (!(m_control2 & 0x80))
|
||||
{
|
||||
@ -216,7 +216,7 @@ READ8_MEMBER(konmedal_state::vram_r)
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konmedal_state::vram_w)
|
||||
void konmedal_state::vram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
// there are (very few) writes above F000 in some screens.
|
||||
// bug? debug? this? who knows.
|
||||
@ -354,7 +354,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(konmedal_state::konmedal_scanline)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konmedal_state::bankswitch_w)
|
||||
void konmedal_state::bankswitch_w(uint8_t data)
|
||||
{
|
||||
//printf("ROM bank %x (full %02x)\n", data>>4, data);
|
||||
membank("bank1")->set_entry(data>>4);
|
||||
@ -762,18 +762,18 @@ K052109_CB_MEMBER(konmedal_state::shuriboy_tile_callback)
|
||||
*color = m_layer_colorbase[layer] + ((*color >> 5) & 7);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konmedal_state::shuri_bank_w)
|
||||
void konmedal_state::shuri_bank_w(uint8_t data)
|
||||
{
|
||||
m_k052109->set_rmrd_line((data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
|
||||
membank("bank1")->set_entry(data&0x3);
|
||||
}
|
||||
|
||||
READ8_MEMBER(konmedal_state::shuri_irq_r)
|
||||
uint8_t konmedal_state::shuri_irq_r()
|
||||
{
|
||||
return m_shuri_irq;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konmedal_state::shuri_irq_w)
|
||||
void konmedal_state::shuri_irq_w(uint8_t data)
|
||||
{
|
||||
if ((m_shuri_irq & 0x4) && !(data & 0x4))
|
||||
{
|
||||
@ -803,7 +803,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(konmedal_state::shuri_scanline)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(konmedal_state::mario_scrollhack_w)
|
||||
void konmedal_state::mario_scrollhack_w(uint8_t data)
|
||||
{
|
||||
// Mario Roulette enable X and Y scroll in the same time for both layers, which is currently not supported by emulated K052109.
|
||||
// here we hacky disable Y scroll for layer A and X scroll for layer B.
|
||||
|
@ -57,7 +57,7 @@ private:
|
||||
K056832_CB_MEMBER(tile_callback);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(scanline);
|
||||
|
||||
DECLARE_WRITE16_MEMBER(control_w)
|
||||
void control_w(uint16_t data)
|
||||
{
|
||||
m_control = data & 0xff;
|
||||
|
||||
@ -71,9 +71,9 @@ private:
|
||||
m_maincpu->set_input_line(M68K_IRQ_4, CLEAR_LINE);
|
||||
}
|
||||
}
|
||||
DECLARE_WRITE16_MEMBER(control2_w) { m_control2 = data & 0xff; }
|
||||
void control2_w(uint16_t data) { m_control2 = data & 0xff; }
|
||||
|
||||
DECLARE_READ16_MEMBER(vrom_r)
|
||||
uint16_t vrom_r(offs_t offset)
|
||||
{
|
||||
if (m_control2 & 0x10)
|
||||
{
|
||||
@ -83,7 +83,7 @@ private:
|
||||
return m_k056832->piratesh_rom_r(offset);
|
||||
}
|
||||
|
||||
DECLARE_READ16_MEMBER(vrom_koropens_r)
|
||||
uint16_t vrom_koropens_r(offs_t offset)
|
||||
{
|
||||
if (m_control2 & 0x10)
|
||||
{
|
||||
|
@ -54,7 +54,7 @@ private:
|
||||
uint8_t m_control;
|
||||
|
||||
// member functions
|
||||
DECLARE_WRITE8_MEMBER(control_w);
|
||||
void control_w(uint8_t data);
|
||||
|
||||
void kontest_io(address_map &map);
|
||||
void kontest_map(address_map &map);
|
||||
@ -160,7 +160,7 @@ uint32_t kontest_state::screen_update( screen_device &screen, bitmap_rgb32 &bitm
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
WRITE8_MEMBER(kontest_state::control_w)
|
||||
void kontest_state::control_w(uint8_t data)
|
||||
{
|
||||
// d3: irq mask
|
||||
// d2: ? (reset during 1st grid test and color test)
|
||||
|
@ -145,15 +145,15 @@ public:
|
||||
private:
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
DECLARE_WRITE_LINE_MEMBER(keyb_interrupt);
|
||||
DECLARE_WRITE8_MEMBER(sn74259_w) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset & 0x07, offset & 0x08 ? 1 : 0); }
|
||||
DECLARE_WRITE8_MEMBER(ap5_w) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
DECLARE_READ8_MEMBER(ap5_r) { LOGIO("%s() %02x = %02x\n", FUNCNAME, offset, 1); return 1; }
|
||||
DECLARE_WRITE8_MEMBER(wkb_w) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
DECLARE_WRITE8_MEMBER(sn74299_w) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
DECLARE_READ8_MEMBER(sn74299_r) { LOGIO("%s() %02x = %02x\n", FUNCNAME, offset, 1); return 1; }
|
||||
DECLARE_WRITE8_MEMBER(txen_w) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
DECLARE_WRITE8_MEMBER(kbd_reset_w) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
DECLARE_WRITE8_MEMBER(dreq_w) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
void sn74259_w(offs_t offset, uint8_t data) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset & 0x07, offset & 0x08 ? 1 : 0); }
|
||||
void ap5_w(offs_t offset, uint8_t data) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
uint8_t ap5_r(offs_t offset) { LOGIO("%s() %02x = %02x\n", FUNCNAME, offset, 1); return 1; }
|
||||
void wkb_w(offs_t offset, uint8_t data) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
void sn74299_w(offs_t offset, uint8_t data) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
uint8_t sn74299_r(offs_t offset) { LOGIO("%s() %02x = %02x\n", FUNCNAME, offset, 1); return 1; }
|
||||
void txen_w(offs_t offset, uint8_t data) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
void kbd_reset_w(offs_t offset, uint8_t data) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
void dreq_w(offs_t offset, uint8_t data) { LOGIO("%s %02x = %02x\n", FUNCNAME, offset, data); }
|
||||
void kron180_iomap(address_map &map);
|
||||
void kron180_mem(address_map &map);
|
||||
|
||||
|
@ -55,12 +55,12 @@ private:
|
||||
required_device<address_map_bank_device> m_1m_bank;
|
||||
required_shared_ptr<uint16_t> m_mainram;
|
||||
|
||||
DECLARE_WRITE16_MEMBER(ctrl_w);
|
||||
void ctrl_w(uint16_t data);
|
||||
|
||||
void k2000_palette(palette_device &palette) const;
|
||||
};
|
||||
|
||||
WRITE16_MEMBER(k2000_state::ctrl_w)
|
||||
void k2000_state::ctrl_w(uint16_t data)
|
||||
{
|
||||
data &= 0xff;
|
||||
logerror("%02x to ctrl_w\n", data);
|
||||
|
@ -511,17 +511,17 @@ public:
|
||||
|
||||
private:
|
||||
|
||||
DECLARE_READ16_MEMBER( control_r );
|
||||
DECLARE_WRITE16_MEMBER( control_w );
|
||||
DECLARE_WRITE16_MEMBER( atapi_reset_w );
|
||||
DECLARE_WRITE16_MEMBER( security_w );
|
||||
DECLARE_READ16_MEMBER( security_r );
|
||||
DECLARE_READ16_MEMBER( ge765pwbba_r );
|
||||
DECLARE_WRITE16_MEMBER( ge765pwbba_w );
|
||||
DECLARE_READ16_MEMBER( gx700pwbf_io_r );
|
||||
DECLARE_WRITE16_MEMBER( gx700pwbf_io_w );
|
||||
DECLARE_WRITE16_MEMBER( gunmania_w );
|
||||
DECLARE_READ16_MEMBER( gunmania_r );
|
||||
uint16_t control_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void atapi_reset_w(uint16_t data);
|
||||
void security_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t security_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
uint16_t ge765pwbba_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void ge765pwbba_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t gx700pwbf_io_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void gx700pwbf_io_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void gunmania_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t gunmania_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
DECLARE_MACHINE_RESET( konami573 );
|
||||
DECLARE_WRITE_LINE_MEMBER( ata_interrupt );
|
||||
|
||||
@ -708,14 +708,14 @@ void ksys573_state::gbbchmp_map(address_map& map)
|
||||
map(0x1f640000, 0x1f640007).rw(m_duart, FUNC(mb89371_device::read), FUNC(mb89371_device::write)).umask32(0x00ff00ff);
|
||||
}
|
||||
|
||||
READ16_MEMBER( ksys573_state::control_r )
|
||||
uint16_t ksys573_state::control_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
verboselog( 2, "control_r( %08x, %08x ) %08x\n", offset, mem_mask, m_control );
|
||||
|
||||
return m_control;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( ksys573_state::control_w )
|
||||
void ksys573_state::control_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA( &m_control );
|
||||
|
||||
@ -753,7 +753,7 @@ WRITE_LINE_MEMBER( ksys573_state::ata_interrupt )
|
||||
m_psxirq->intin10( state );
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( ksys573_state::atapi_reset_w )
|
||||
void ksys573_state::atapi_reset_w(uint16_t data)
|
||||
{
|
||||
if( !( data & 1 ) )
|
||||
{
|
||||
@ -780,7 +780,7 @@ void ksys573_state::cdrom_dma_write( uint32_t *ram, uint32_t n_address, int32_t
|
||||
m_atapi_timer->adjust( m_maincpu->cycles_to_attotime( ( ATAPI_CYCLES_PER_SECTOR * ( n_size / 512 ) ) ) );
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( ksys573_state::security_w )
|
||||
void ksys573_state::security_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA( &m_n_security_control );
|
||||
|
||||
@ -789,7 +789,7 @@ WRITE16_MEMBER( ksys573_state::security_w )
|
||||
m_out1->write( data, mem_mask );
|
||||
}
|
||||
|
||||
READ16_MEMBER( ksys573_state::security_r )
|
||||
uint16_t ksys573_state::security_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
uint16_t data = m_n_security_control;
|
||||
verboselog( 2, "security_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
|
||||
@ -940,7 +940,7 @@ todo:
|
||||
|
||||
*/
|
||||
|
||||
READ16_MEMBER( ksys573_state::ge765pwbba_r )
|
||||
uint16_t ksys573_state::ge765pwbba_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
switch( offset )
|
||||
{
|
||||
@ -957,7 +957,7 @@ READ16_MEMBER( ksys573_state::ge765pwbba_r )
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( ksys573_state::ge765pwbba_w )
|
||||
void ksys573_state::ge765pwbba_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
switch( offset )
|
||||
{
|
||||
@ -993,7 +993,7 @@ Analogue I/O board
|
||||
|
||||
*/
|
||||
|
||||
READ16_MEMBER( ksys573_state::gx700pwbf_io_r )
|
||||
uint16_t ksys573_state::gx700pwbf_io_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
uint32_t data = 0;
|
||||
switch( offset )
|
||||
@ -1043,7 +1043,7 @@ void ksys573_state::gx700pwbf_output( int offset, uint8_t data )
|
||||
m_gx700pwbf_output_data[ offset ] = data;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( ksys573_state::gx700pwbf_io_w )
|
||||
void ksys573_state::gx700pwbf_io_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
verboselog( 2, "gx700pwbf_io_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
|
||||
|
||||
@ -2037,7 +2037,7 @@ void ksys573_state::init_pnchmn()
|
||||
|
||||
/* GunMania */
|
||||
|
||||
WRITE16_MEMBER( ksys573_state::gunmania_w )
|
||||
void ksys573_state::gunmania_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
char s[ 1024 ] = "";
|
||||
|
||||
@ -2142,7 +2142,7 @@ READ_LINE_MEMBER( ksys573_state::gunmania_cable_holder_sensor )
|
||||
return m_cable_holder_release;
|
||||
}
|
||||
|
||||
READ16_MEMBER( ksys573_state::gunmania_r )
|
||||
uint16_t ksys573_state::gunmania_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
uint32_t data = 0;
|
||||
|
||||
|
@ -422,11 +422,11 @@ private:
|
||||
|
||||
uint8_t m_adpcm_data;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(kurukuru_out_latch_w);
|
||||
DECLARE_WRITE8_MEMBER(kurukuru_bankswitch_w);
|
||||
DECLARE_WRITE8_MEMBER(kurukuru_adpcm_reset_w);
|
||||
DECLARE_READ8_MEMBER(kurukuru_adpcm_timer_irqack_r);
|
||||
DECLARE_WRITE8_MEMBER(kurukuru_adpcm_data_w);
|
||||
void kurukuru_out_latch_w(uint8_t data);
|
||||
void kurukuru_bankswitch_w(uint8_t data);
|
||||
void kurukuru_adpcm_reset_w(uint8_t data);
|
||||
uint8_t kurukuru_adpcm_timer_irqack_r();
|
||||
void kurukuru_adpcm_data_w(uint8_t data);
|
||||
void ym2149_aout_w(uint8_t data);
|
||||
void ym2149_bout_w(uint8_t data);
|
||||
|
||||
@ -470,7 +470,7 @@ WRITE_LINE_MEMBER(kurukuru_state::kurukuru_msm5205_vck)
|
||||
|
||||
// Main CPU
|
||||
|
||||
WRITE8_MEMBER(kurukuru_state::kurukuru_out_latch_w)
|
||||
void kurukuru_state::kurukuru_out_latch_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
00-0f is output latch (controls jamma output pins)
|
||||
@ -496,7 +496,7 @@ WRITE8_MEMBER(kurukuru_state::kurukuru_out_latch_w)
|
||||
logerror("kurukuru_out_latch_w %02X @ %04X\n", data, m_maincpu->pc());
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(kurukuru_state::kurukuru_bankswitch_w)
|
||||
void kurukuru_state::kurukuru_bankswitch_w(uint8_t data)
|
||||
{
|
||||
m_bank1->set_entry(7); // remove banked rom
|
||||
/*
|
||||
@ -580,7 +580,7 @@ void kurukuru_state::ppj_io(address_map &map)
|
||||
|
||||
// Audio CPU
|
||||
|
||||
WRITE8_MEMBER(kurukuru_state::kurukuru_adpcm_data_w)
|
||||
void kurukuru_state::kurukuru_adpcm_data_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
6-bit latch. only 4 connected...
|
||||
@ -589,7 +589,7 @@ WRITE8_MEMBER(kurukuru_state::kurukuru_adpcm_data_w)
|
||||
m_adpcm_data = data & 0xf;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(kurukuru_state::kurukuru_adpcm_reset_w)
|
||||
void kurukuru_state::kurukuru_adpcm_reset_w(uint8_t data)
|
||||
{
|
||||
/*
|
||||
6-bit latch. only 4 connected...
|
||||
@ -602,7 +602,7 @@ WRITE8_MEMBER(kurukuru_state::kurukuru_adpcm_reset_w)
|
||||
m_adpcm->reset_w(data & 1);
|
||||
}
|
||||
|
||||
READ8_MEMBER(kurukuru_state::kurukuru_adpcm_timer_irqack_r)
|
||||
uint8_t kurukuru_state::kurukuru_adpcm_timer_irqack_r()
|
||||
{
|
||||
if (!machine().side_effects_disabled())
|
||||
m_soundirq->rst30_w(0);
|
||||
|
@ -105,13 +105,13 @@ private:
|
||||
required_device<palette_device> m_palette;
|
||||
required_device_array<dac_byte_interface, 6> m_dac;
|
||||
|
||||
DECLARE_READ8_MEMBER(vram_r);
|
||||
DECLARE_WRITE8_MEMBER(vram_w);
|
||||
DECLARE_WRITE8_MEMBER(videoctrl_w);
|
||||
DECLARE_READ8_MEMBER(z1_r);
|
||||
DECLARE_READ8_MEMBER(track_lo_r);
|
||||
DECLARE_READ8_MEMBER(track_hi_r);
|
||||
DECLARE_WRITE8_MEMBER(out_w);
|
||||
uint8_t vram_r(offs_t offset);
|
||||
void vram_w(offs_t offset, uint8_t data);
|
||||
void videoctrl_w(offs_t offset, uint8_t data);
|
||||
uint8_t z1_r(offs_t offset);
|
||||
uint8_t track_lo_r();
|
||||
uint8_t track_hi_r();
|
||||
void out_w(uint8_t data);
|
||||
template<uint8_t Which> DECLARE_WRITE_LINE_MEMBER(pit_out_w);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(laserbas_scanline);
|
||||
MC6845_UPDATE_ROW(crtc_update_row);
|
||||
@ -175,17 +175,17 @@ MC6845_UPDATE_ROW( laserbas_state::crtc_update_row )
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(laserbas_state::vram_r)
|
||||
uint8_t laserbas_state::vram_r(offs_t offset)
|
||||
{
|
||||
return m_vram[offset+(m_vrambank?0x8000:0)];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(laserbas_state::vram_w)
|
||||
void laserbas_state::vram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_vram[offset+(m_vrambank?0x8000:0)] = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(laserbas_state::videoctrl_w)
|
||||
void laserbas_state::videoctrl_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if (!(offset&1))
|
||||
{
|
||||
@ -203,7 +203,7 @@ WRITE8_MEMBER(laserbas_state::videoctrl_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(laserbas_state::z1_r)
|
||||
uint8_t laserbas_state::z1_r(offs_t offset)
|
||||
{
|
||||
m_z1data = (m_z1data >> 10) | (uint64_t(offset & 0x03ff) << 30);
|
||||
|
||||
@ -223,7 +223,7 @@ READ8_MEMBER(laserbas_state::z1_r)
|
||||
return (bit7 << 7) | (bit6 << 6) | (bit5 << 5) | (bit4 << 4) | (bit3 << 3) | (bit2 << 2) | (bit1 << 1) | (bit0 << 0);
|
||||
}
|
||||
|
||||
READ8_MEMBER(laserbas_state::track_lo_r)
|
||||
uint8_t laserbas_state::track_lo_r()
|
||||
{
|
||||
uint8_t dx = ioport("TRACK_X")->read();
|
||||
uint8_t dy = ioport("TRACK_Y")->read();
|
||||
@ -235,13 +235,13 @@ READ8_MEMBER(laserbas_state::track_lo_r)
|
||||
return data;
|
||||
}
|
||||
|
||||
READ8_MEMBER(laserbas_state::track_hi_r)
|
||||
uint8_t laserbas_state::track_hi_r()
|
||||
{
|
||||
int data = ((ioport("TRACK_X")->read() & 0x10) >> 4) | ((ioport("TRACK_Y")->read() & 0x10) >> 3);
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(laserbas_state::out_w)
|
||||
void laserbas_state::out_w(uint8_t data)
|
||||
{
|
||||
/* sound related , maybe also lamps */
|
||||
}
|
||||
|
@ -59,11 +59,11 @@ private:
|
||||
uint8_t m_mux_data;
|
||||
uint8_t m_sound_flags;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(output_w);
|
||||
void output_w(offs_t offset, uint8_t data);
|
||||
|
||||
DECLARE_READ8_MEMBER(mux_0_r);
|
||||
DECLARE_WRITE8_MEMBER(mux_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_flags_w);
|
||||
uint8_t mux_0_r();
|
||||
void mux_w(uint8_t data);
|
||||
void sound_flags_w(uint8_t data);
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(irq_scanline);
|
||||
void lastbank_audio_io(address_map &map);
|
||||
@ -87,7 +87,7 @@ WRITE_LINE_MEMBER(lastbank_state::screen_vblank)
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(lastbank_state::mux_0_r)
|
||||
uint8_t lastbank_state::mux_0_r()
|
||||
{
|
||||
const char *const keynames[2][5] = {
|
||||
{"P1_KEY0", "P1_KEY1", "P1_KEY2", "P1_KEY3", "P1_KEY4"},
|
||||
@ -106,7 +106,7 @@ READ8_MEMBER(lastbank_state::mux_0_r)
|
||||
return res;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(lastbank_state::output_w)
|
||||
void lastbank_state::output_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -124,12 +124,12 @@ WRITE8_MEMBER(lastbank_state::output_w)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(lastbank_state::mux_w)
|
||||
void lastbank_state::mux_w(uint8_t data)
|
||||
{
|
||||
m_mux_data = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(lastbank_state::sound_flags_w)
|
||||
void lastbank_state::sound_flags_w(uint8_t data)
|
||||
{
|
||||
m_sound_flags = data;
|
||||
if (!BIT(data, 4))
|
||||
|
@ -88,23 +88,23 @@ public:
|
||||
|
||||
private:
|
||||
/* memory */
|
||||
DECLARE_WRITE16_MEMBER(hi_w);
|
||||
DECLARE_WRITE16_MEMBER(x_w);
|
||||
DECLARE_WRITE16_MEMBER(yw_w);
|
||||
DECLARE_WRITE16_MEMBER(h_w);
|
||||
DECLARE_WRITE16_MEMBER(sx_w);
|
||||
DECLARE_WRITE16_MEMBER(sy_w);
|
||||
DECLARE_WRITE16_MEMBER(sr_w);
|
||||
DECLARE_WRITE16_MEMBER(sd_w);
|
||||
DECLARE_WRITE16_MEMBER(blit_w);
|
||||
DECLARE_WRITE16_MEMBER(dest_w);
|
||||
DECLARE_READ16_MEMBER(c00000_r);
|
||||
DECLARE_READ16_MEMBER(c00002_r);
|
||||
DECLARE_READ16_MEMBER(c00004_r);
|
||||
DECLARE_READ16_MEMBER(c00006_r);
|
||||
DECLARE_WRITE16_MEMBER(c00006_w);
|
||||
DECLARE_READ16_MEMBER(sound_r);
|
||||
DECLARE_WRITE16_MEMBER(sound_w);
|
||||
void hi_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void x_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void yw_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void h_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void sx_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void sy_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void sr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void sd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void blit_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void dest_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t c00000_r();
|
||||
uint16_t c00002_r();
|
||||
uint16_t c00004_r();
|
||||
uint16_t c00006_r();
|
||||
void c00006_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t sound_r();
|
||||
void sound_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
void lastfght_map(address_map &map);
|
||||
@ -202,7 +202,7 @@ uint32_t lastfght_state::screen_update(screen_device &screen, bitmap_ind16 &bitm
|
||||
// Blitter (supports zooming)
|
||||
|
||||
// high byte of a 16 bit register
|
||||
WRITE16_MEMBER(lastfght_state::hi_w)
|
||||
void lastfght_state::hi_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
logerror("%06x: 600000.b = %02x\n", m_maincpu->pc(), data >> 8);
|
||||
@ -214,7 +214,7 @@ WRITE16_MEMBER(lastfght_state::hi_w)
|
||||
}
|
||||
|
||||
// screen x
|
||||
WRITE16_MEMBER(lastfght_state::x_w)
|
||||
void lastfght_state::x_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
logerror("%06x: 800008.b = %02x\n", m_maincpu->pc(), data >> 8);
|
||||
@ -226,7 +226,7 @@ WRITE16_MEMBER(lastfght_state::x_w)
|
||||
}
|
||||
|
||||
// screen y, screen width - 1
|
||||
WRITE16_MEMBER(lastfght_state::yw_w)
|
||||
void lastfght_state::yw_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
@ -241,7 +241,7 @@ WRITE16_MEMBER(lastfght_state::yw_w)
|
||||
}
|
||||
|
||||
// screen height - 1
|
||||
WRITE16_MEMBER(lastfght_state::h_w)
|
||||
void lastfght_state::h_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
@ -253,7 +253,7 @@ WRITE16_MEMBER(lastfght_state::h_w)
|
||||
}
|
||||
|
||||
// source delta x << 6, source x << 6
|
||||
WRITE16_MEMBER(lastfght_state::sx_w)
|
||||
void lastfght_state::sx_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
@ -268,7 +268,7 @@ WRITE16_MEMBER(lastfght_state::sx_w)
|
||||
}
|
||||
|
||||
// source y << 6, source y1 << 6
|
||||
WRITE16_MEMBER(lastfght_state::sy_w)
|
||||
void lastfght_state::sy_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
@ -283,7 +283,7 @@ WRITE16_MEMBER(lastfght_state::sy_w)
|
||||
}
|
||||
|
||||
// source rom (0x200000 bytes), source page (512x256 bytes)
|
||||
WRITE16_MEMBER(lastfght_state::sr_w)
|
||||
void lastfght_state::sr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
@ -298,7 +298,7 @@ WRITE16_MEMBER(lastfght_state::sr_w)
|
||||
}
|
||||
|
||||
// source x1 << 6, source delta y << 6
|
||||
WRITE16_MEMBER(lastfght_state::sd_w)
|
||||
void lastfght_state::sd_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
@ -313,7 +313,7 @@ WRITE16_MEMBER(lastfght_state::sd_w)
|
||||
}
|
||||
|
||||
// start blit
|
||||
WRITE16_MEMBER(lastfght_state::blit_w)
|
||||
void lastfght_state::blit_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
@ -350,13 +350,13 @@ WRITE16_MEMBER(lastfght_state::blit_w)
|
||||
}
|
||||
|
||||
// toggle framebuffer
|
||||
WRITE16_MEMBER(lastfght_state::dest_w)
|
||||
void lastfght_state::dest_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_dest ^= 1;
|
||||
}
|
||||
|
||||
READ16_MEMBER(lastfght_state::c00000_r)
|
||||
uint16_t lastfght_state::c00000_r()
|
||||
{
|
||||
// high byte:
|
||||
// bit 7 = blitter busy
|
||||
@ -365,19 +365,19 @@ READ16_MEMBER(lastfght_state::c00000_r)
|
||||
|
||||
}
|
||||
|
||||
READ16_MEMBER(lastfght_state::c00002_r)
|
||||
uint16_t lastfght_state::c00002_r()
|
||||
{
|
||||
// high byte:
|
||||
// mask 0x1c: from sound?
|
||||
return (machine().rand() & 0x1c00) | ioport("IN0")->read();
|
||||
}
|
||||
|
||||
READ16_MEMBER(lastfght_state::c00004_r)
|
||||
uint16_t lastfght_state::c00004_r()
|
||||
{
|
||||
return ioport("IN1")->read();
|
||||
}
|
||||
|
||||
READ16_MEMBER(lastfght_state::c00006_r)
|
||||
uint16_t lastfght_state::c00006_r()
|
||||
{
|
||||
// low byte:
|
||||
// bit 7 = protection?
|
||||
@ -385,20 +385,20 @@ READ16_MEMBER(lastfght_state::c00006_r)
|
||||
return ioport("IN2")->read();
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(lastfght_state::c00006_w)
|
||||
void lastfght_state::c00006_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_c00006);
|
||||
// popmessage("%04x", m_c00006);
|
||||
}
|
||||
|
||||
READ16_MEMBER(lastfght_state::sound_r)
|
||||
uint16_t lastfght_state::sound_r()
|
||||
{
|
||||
// low byte:
|
||||
// bit 3
|
||||
return 8;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(lastfght_state::sound_w)
|
||||
void lastfght_state::sound_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
logerror("%06x: sound_w msb = %02x\n", m_maincpu->pc(), data >> 8);
|
||||
|
@ -96,8 +96,8 @@ private:
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_fg_tile_info);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(bg_vram_w);
|
||||
DECLARE_WRITE8_MEMBER(fg_vram_w);
|
||||
void bg_vram_w(offs_t offset, u8 data);
|
||||
void fg_vram_w(offs_t offset, u8 data);
|
||||
|
||||
void init_palette(palette_device &palette) const;
|
||||
u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
@ -205,13 +205,13 @@ u32 lbeach_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, con
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(lbeach_state::bg_vram_w)
|
||||
void lbeach_state::bg_vram_w(offs_t offset, u8 data)
|
||||
{
|
||||
m_bg_vram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(lbeach_state::fg_vram_w)
|
||||
void lbeach_state::fg_vram_w(offs_t offset, u8 data)
|
||||
{
|
||||
m_fg_vram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
|
@ -64,21 +64,21 @@ private:
|
||||
required_device<speaker_sound_device> m_speaker;
|
||||
required_ioport_array<8> m_kbdlines;
|
||||
|
||||
DECLARE_READ8_MEMBER( key_r );
|
||||
DECLARE_WRITE8_MEMBER( speaker_w );
|
||||
DECLARE_WRITE8_MEMBER( bankswitch_w );
|
||||
uint8_t key_r(offs_t offset);
|
||||
void speaker_w(uint8_t data);
|
||||
void bankswitch_w(uint8_t data);
|
||||
void lcmate2_palette(palette_device &palette) const;
|
||||
void lcmate2_io(address_map &map);
|
||||
void lcmate2_mem(address_map &map);
|
||||
};
|
||||
|
||||
WRITE8_MEMBER( lcmate2_state::speaker_w )
|
||||
void lcmate2_state::speaker_w(uint8_t data)
|
||||
{
|
||||
m_speaker->level_w(BIT(data, 6));
|
||||
}
|
||||
|
||||
// offsets are FE,FD,FB,F7,EF,DF,BF,7F to scan a particular row, or 00 to check if any key pressed
|
||||
READ8_MEMBER( lcmate2_state::key_r )
|
||||
uint8_t lcmate2_state::key_r(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0xff;
|
||||
|
||||
@ -91,7 +91,7 @@ READ8_MEMBER( lcmate2_state::key_r )
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( lcmate2_state::bankswitch_w )
|
||||
void lcmate2_state::bankswitch_w(uint8_t data)
|
||||
{
|
||||
membank("rombank")->set_entry(data&0x0f);
|
||||
}
|
||||
|
@ -234,7 +234,7 @@ private:
|
||||
uint32_t screen_update_leapster(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load);
|
||||
|
||||
DECLARE_READ32_MEMBER(leapster_random_r)
|
||||
uint32_t leapster_random_r()
|
||||
{
|
||||
return machine().rand() | (machine().rand()<<16); // there is a loop checking that this is above a certain value
|
||||
}
|
||||
|
@ -94,8 +94,7 @@ protected:
|
||||
virtual void machine_start() override;
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(ldp_read);
|
||||
DECLARE_WRITE8_MEMBER(ldp_write);
|
||||
uint8_t ldp_read();
|
||||
uint32_t screen_update_lgp(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(vblank_callback_lgp);
|
||||
DECLARE_WRITE_LINE_MEMBER(ld_command_strobe_cb);
|
||||
@ -152,17 +151,11 @@ uint32_t lgp_state::screen_update_lgp(screen_device &screen, bitmap_rgb32 &bitma
|
||||
|
||||
/* MEMORY HANDLERS */
|
||||
/* Main Z80 R/W */
|
||||
READ8_MEMBER(lgp_state::ldp_read)
|
||||
uint8_t lgp_state::ldp_read()
|
||||
{
|
||||
return m_laserdisc->status_r();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(lgp_state::ldp_write)
|
||||
{
|
||||
m_laserdisc->data_w(data);
|
||||
}
|
||||
|
||||
|
||||
/* Sound Z80 R/W */
|
||||
|
||||
|
||||
@ -174,7 +167,7 @@ void lgp_state::main_program_map(address_map &map)
|
||||
map(0xe400, 0xe7ff).ram().share("tile_ctrl_ram");
|
||||
|
||||
// map(0xef00, 0xef00).portr("IN_TEST");
|
||||
map(0xef80, 0xef80).rw(FUNC(lgp_state::ldp_read), FUNC(lgp_state::ldp_write));
|
||||
map(0xef80, 0xef80).r(FUNC(lgp_state::ldp_read)).w(m_laserdisc, FUNC(pioneer_ldv1000_device::data_w));
|
||||
map(0xefb8, 0xefb8).nopr(); // watchdog
|
||||
map(0xefc0, 0xefc0).portr("DSWA"); /* Not tested */
|
||||
map(0xefc8, 0xefc8).portr("DSWB");
|
||||
|
@ -102,10 +102,10 @@ private:
|
||||
void fg_videoram_w(offs_t offset, u32 data, u32 mem_mask = ~0);
|
||||
void spriteram_buffer_w(u32 data);
|
||||
|
||||
DECLARE_READ32_MEMBER(dynabomb_speedup_r);
|
||||
DECLARE_READ32_MEMBER(legendoh_speedup_r);
|
||||
DECLARE_READ32_MEMBER(sb2003_speedup_r);
|
||||
DECLARE_READ32_MEMBER(spotty_speedup_r);
|
||||
u32 dynabomb_speedup_r();
|
||||
u32 legendoh_speedup_r();
|
||||
u32 sb2003_speedup_r();
|
||||
u32 spotty_speedup_r();
|
||||
|
||||
void qs1000_p1_w(u8 data);
|
||||
void qs1000_p2_w(u8 data);
|
||||
@ -1028,7 +1028,7 @@ ROM_END
|
||||
|
||||
|
||||
|
||||
READ32_MEMBER(limenko_state::dynabomb_speedup_r)
|
||||
u32 limenko_state::dynabomb_speedup_r()
|
||||
{
|
||||
if (m_maincpu->pc() == 0xc25b8)
|
||||
{
|
||||
@ -1038,7 +1038,7 @@ READ32_MEMBER(limenko_state::dynabomb_speedup_r)
|
||||
return m_mainram[0xe2784/4];
|
||||
}
|
||||
|
||||
READ32_MEMBER(limenko_state::legendoh_speedup_r)
|
||||
u32 limenko_state::legendoh_speedup_r()
|
||||
{
|
||||
if (m_maincpu->pc() == 0x23e32)
|
||||
{
|
||||
@ -1048,7 +1048,7 @@ READ32_MEMBER(limenko_state::legendoh_speedup_r)
|
||||
return m_mainram[0x32ab0/4];
|
||||
}
|
||||
|
||||
READ32_MEMBER(limenko_state::sb2003_speedup_r)
|
||||
u32 limenko_state::sb2003_speedup_r()
|
||||
{
|
||||
if (m_maincpu->pc() == 0x26da4)
|
||||
{
|
||||
@ -1058,7 +1058,7 @@ READ32_MEMBER(limenko_state::sb2003_speedup_r)
|
||||
return m_mainram[0x135800/4];
|
||||
}
|
||||
|
||||
READ32_MEMBER(limenko_state::spotty_speedup_r)
|
||||
u32 limenko_state::spotty_speedup_r()
|
||||
{
|
||||
if (m_maincpu->pc() == 0x8560)
|
||||
{
|
||||
@ -1079,21 +1079,21 @@ void limenko_state::init_common()
|
||||
|
||||
void limenko_state::init_dynabomb()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0xe2784, 0xe2787, read32_delegate(*this, FUNC(limenko_state::dynabomb_speedup_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0xe2784, 0xe2787, read32smo_delegate(*this, FUNC(limenko_state::dynabomb_speedup_r)));
|
||||
|
||||
init_common();
|
||||
}
|
||||
|
||||
void limenko_state::init_legendoh()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x32ab0, 0x32ab3, read32_delegate(*this, FUNC(limenko_state::legendoh_speedup_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x32ab0, 0x32ab3, read32smo_delegate(*this, FUNC(limenko_state::legendoh_speedup_r)));
|
||||
|
||||
init_common();
|
||||
}
|
||||
|
||||
void limenko_state::init_sb2003()
|
||||
{
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x135800, 0x135803, read32_delegate(*this, FUNC(limenko_state::sb2003_speedup_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x135800, 0x135803, read32smo_delegate(*this, FUNC(limenko_state::sb2003_speedup_r)));
|
||||
|
||||
init_common();
|
||||
}
|
||||
@ -1113,7 +1113,7 @@ void limenko_state::init_spotty()
|
||||
dst[x+2] = (src[x+1]&0x0f) >> 0;
|
||||
}
|
||||
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x6626c, 0x6626f, read32_delegate(*this, FUNC(limenko_state::spotty_speedup_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x6626c, 0x6626f, read32smo_delegate(*this, FUNC(limenko_state::spotty_speedup_r)));
|
||||
|
||||
m_spriteram_bit = 1;
|
||||
|
||||
|
@ -133,8 +133,8 @@ private:
|
||||
uint16_t m_sound_pointer_l,m_sound_pointer_r;
|
||||
int m_soundframe;
|
||||
|
||||
DECLARE_WRITE16_MEMBER(littlerb_l_sound_w);
|
||||
DECLARE_WRITE16_MEMBER(littlerb_r_sound_w);
|
||||
void littlerb_l_sound_w(uint16_t data);
|
||||
void littlerb_r_sound_w(uint16_t data);
|
||||
uint8_t sound_data_shift();
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(littlerb_sound_step_cb);
|
||||
@ -151,14 +151,14 @@ uint8_t littlerb_state::sound_data_shift()
|
||||
}
|
||||
|
||||
/* l is SFX, r is BGM (they doesn't seem to share the same data ROM) */
|
||||
WRITE16_MEMBER(littlerb_state::littlerb_l_sound_w)
|
||||
void littlerb_state::littlerb_l_sound_w(uint16_t data)
|
||||
{
|
||||
m_sound_index_l = (data >> sound_data_shift()) & 0xff;
|
||||
m_sound_pointer_l = 0;
|
||||
//popmessage("%04x %04x",m_sound_index_l,m_sound_index_r);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(littlerb_state::littlerb_r_sound_w)
|
||||
void littlerb_state::littlerb_r_sound_w(uint16_t data)
|
||||
{
|
||||
m_sound_index_r = (data >> sound_data_shift()) & 0xff;
|
||||
m_sound_pointer_r = 0;
|
||||
|
@ -84,7 +84,7 @@ private:
|
||||
DECLARE_WRITE_LINE_MEMBER(crtc_vsync);
|
||||
DECLARE_READ_LINE_MEMBER(cass_r);
|
||||
DECLARE_WRITE_LINE_MEMBER(cass_w);
|
||||
DECLARE_READ8_MEMBER(keyboard_r);
|
||||
uint8_t keyboard_r();
|
||||
MC6845_UPDATE_ROW(crtc_update_row);
|
||||
|
||||
void lola8a_io(address_map &map);
|
||||
@ -272,7 +272,7 @@ WRITE_LINE_MEMBER( lola8a_state::cass_w )
|
||||
m_cass->output(state ? -1.0 : +1.0);
|
||||
}
|
||||
|
||||
READ8_MEMBER(lola8a_state::keyboard_r)
|
||||
uint8_t lola8a_state::keyboard_r()
|
||||
{
|
||||
u8 data = 0xff, kbrow = m_portb & 15;
|
||||
|
||||
|
@ -136,23 +136,23 @@ protected:
|
||||
private:
|
||||
DECLARE_WRITE_LINE_MEMBER(flip_screen_x_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(flip_screen_y_w);
|
||||
DECLARE_WRITE8_MEMBER(looping_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(looping_colorram_w);
|
||||
void looping_videoram_w(offs_t offset, uint8_t data);
|
||||
void looping_colorram_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(level2_irq_set);
|
||||
DECLARE_WRITE_LINE_MEMBER(main_irq_ack_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(watchdog_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(looping_souint_clr);
|
||||
DECLARE_WRITE8_MEMBER(looping_soundlatch_w);
|
||||
void looping_soundlatch_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(ballon_enable_w);
|
||||
DECLARE_WRITE8_MEMBER(out_0_w);
|
||||
DECLARE_WRITE8_MEMBER(out_2_w);
|
||||
DECLARE_READ8_MEMBER(adc_r);
|
||||
DECLARE_WRITE8_MEMBER(adc_w);
|
||||
void out_0_w(uint8_t data);
|
||||
void out_2_w(uint8_t data);
|
||||
uint8_t adc_r();
|
||||
void adc_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(plr2_w);
|
||||
uint8_t cop_unk_r();
|
||||
DECLARE_READ_LINE_MEMBER(cop_serial_r);
|
||||
void cop_l_w(uint8_t data);
|
||||
DECLARE_READ8_MEMBER(protection_r);
|
||||
uint8_t protection_r();
|
||||
DECLARE_WRITE_LINE_MEMBER(looping_spcint);
|
||||
void looping_sound_sw(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(ay_enable_w);
|
||||
@ -279,17 +279,15 @@ WRITE_LINE_MEMBER(looping_state::flip_screen_y_w)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(looping_state::looping_videoram_w)
|
||||
void looping_state::looping_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(looping_state::looping_colorram_w)
|
||||
void looping_state::looping_colorram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
int i;
|
||||
|
||||
m_colorram[offset] = data;
|
||||
|
||||
/* odd bytes are column color attribute */
|
||||
@ -297,7 +295,7 @@ WRITE8_MEMBER(looping_state::looping_colorram_w)
|
||||
{
|
||||
/* mark the whole column dirty */
|
||||
offs_t offs = (offset/2);
|
||||
for (i = 0; i < 0x20; i++)
|
||||
for (int i = 0; i < 0x20; i++)
|
||||
m_bg_tilemap->mark_tile_dirty(i * 0x20 + offs);
|
||||
}
|
||||
|
||||
@ -418,7 +416,7 @@ WRITE_LINE_MEMBER(looping_state::looping_spcint)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(looping_state::looping_soundlatch_w)
|
||||
void looping_state::looping_soundlatch_w(uint8_t data)
|
||||
{
|
||||
m_soundlatch->write(data);
|
||||
m_audiocpu->set_input_line(INT_9980A_LEVEL2, ASSERT_LINE);
|
||||
@ -480,11 +478,11 @@ WRITE_LINE_MEMBER(looping_state::ballon_enable_w)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE8_MEMBER(looping_state::out_0_w){ osd_printf_debug("out0 = %02X\n", data); }
|
||||
WRITE8_MEMBER(looping_state::out_2_w){ osd_printf_debug("out2 = %02X\n", data); }
|
||||
void looping_state::out_0_w(uint8_t data) { osd_printf_debug("out0 = %02X\n", data); }
|
||||
void looping_state::out_2_w(uint8_t data) { osd_printf_debug("out2 = %02X\n", data); }
|
||||
|
||||
READ8_MEMBER(looping_state::adc_r){ osd_printf_debug("%04X:ADC read\n", m_maincpu->pc()); return 0xff; }
|
||||
WRITE8_MEMBER(looping_state::adc_w){ osd_printf_debug("%04X:ADC write = %02X\n", m_maincpu->pc(), data); }
|
||||
uint8_t looping_state::adc_r() { osd_printf_debug("%04X:ADC read\n", m_maincpu->pc()); return 0xff; }
|
||||
void looping_state::adc_w(uint8_t data) { osd_printf_debug("%04X:ADC write = %02X\n", m_maincpu->pc(), data); }
|
||||
|
||||
WRITE_LINE_MEMBER(looping_state::plr2_w)
|
||||
{
|
||||
@ -516,7 +514,7 @@ void looping_state::cop_l_w(uint8_t data)
|
||||
logerror("%02x ",data);
|
||||
}
|
||||
|
||||
READ8_MEMBER(looping_state::protection_r)
|
||||
uint8_t looping_state::protection_r()
|
||||
{
|
||||
// The code reads ($7002) ($7004) alternately
|
||||
// The result must change at least once every 10 reads
|
||||
@ -533,7 +531,7 @@ READ8_MEMBER(looping_state::protection_r)
|
||||
// it is trivial to bypass the protection.
|
||||
|
||||
// cop write alternately $02 $01 $08 $04 in port $102
|
||||
// cop write randomly fc (unfortunatly) but 61,67,b7,bf,db,e1,f3,fd,ff too and only these values
|
||||
// cop write randomly fc (unfortunately) but 61,67,b7,bf,db,e1,f3,fd,ff too and only these values
|
||||
|
||||
// missing something
|
||||
if(m_cop_port_l != 0xfc) return m_cop_port_l;
|
||||
@ -933,7 +931,7 @@ void looping_state::init_looping()
|
||||
rom[i] = bitswap<8>(rom[i], 0,1,2,3,4,5,6,7);
|
||||
|
||||
/* install protection handlers */
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x7000, 0x7007, read8_delegate(*this, FUNC(looping_state::protection_r)));
|
||||
m_maincpu->space(AS_PROGRAM).install_read_handler(0x7000, 0x7007, read8smo_delegate(*this, FUNC(looping_state::protection_r)));
|
||||
}
|
||||
|
||||
|
||||
|
@ -72,13 +72,13 @@ public:
|
||||
DECLARE_INPUT_CHANGED_MEMBER(ficha);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(io_r);
|
||||
DECLARE_WRITE8_MEMBER(io_w);
|
||||
uint8_t io_r(offs_t offset);
|
||||
void io_w(offs_t offset, uint8_t data);
|
||||
uint8_t port1_r();
|
||||
void port1_w(uint8_t data);
|
||||
uint8_t port2_r();
|
||||
void port2_w(uint8_t data);
|
||||
DECLARE_WRITE8_MEMBER(count_reset_w);
|
||||
void count_reset_w(uint8_t data);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(timer_r);
|
||||
void ltd3_map(address_map &map);
|
||||
void ltd4_map(address_map &map);
|
||||
@ -248,7 +248,7 @@ INPUT_CHANGED_MEMBER( ltd_state::ficha )
|
||||
}
|
||||
|
||||
// switches
|
||||
READ8_MEMBER( ltd_state::io_r )
|
||||
uint8_t ltd_state::io_r(offs_t offset)
|
||||
{
|
||||
if (offset==0)
|
||||
return ioport("X0")->read();
|
||||
@ -269,7 +269,7 @@ READ8_MEMBER( ltd_state::io_r )
|
||||
}
|
||||
|
||||
// Lamps only used by Zephy
|
||||
WRITE8_MEMBER( ltd_state::io_w )
|
||||
void ltd_state::io_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
offset >>= 10; // reduces offsets to 1 per bank
|
||||
}
|
||||
@ -361,7 +361,7 @@ void ltd_state::port2_w(uint8_t data)
|
||||
m_port2 = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( ltd_state::count_reset_w )
|
||||
void ltd_state::count_reset_w(uint8_t data)
|
||||
{
|
||||
m_counter = 0;
|
||||
}
|
||||
|
@ -126,15 +126,15 @@ private:
|
||||
int m_palette_count;
|
||||
uint8_t m_palette_ram[0x10000];
|
||||
|
||||
template<uint8_t Reel> DECLARE_WRITE8_MEMBER(reel_ram_w);
|
||||
template<uint8_t Reel> DECLARE_WRITE8_MEMBER(reel_attr_w);
|
||||
template<uint8_t Reel> void reel_ram_w(offs_t offset, uint8_t data);
|
||||
template<uint8_t Reel> void reel_attr_w(offs_t offset, uint8_t data);
|
||||
void output_w(uint8_t data);
|
||||
DECLARE_WRITE8_MEMBER(palette_offset_low_w);
|
||||
DECLARE_WRITE8_MEMBER(palette_offset_high_w);
|
||||
DECLARE_WRITE8_MEMBER(palette_w);
|
||||
DECLARE_WRITE8_MEMBER(lamps_a_w);
|
||||
DECLARE_WRITE8_MEMBER(lamps_b_w);
|
||||
DECLARE_WRITE8_MEMBER(counters_w);
|
||||
void palette_offset_low_w(uint8_t data);
|
||||
void palette_offset_high_w(uint8_t data);
|
||||
void palette_w(uint8_t data);
|
||||
void lamps_a_w(uint8_t data);
|
||||
void lamps_b_w(uint8_t data);
|
||||
void counters_w(uint8_t data);
|
||||
uint8_t test_r();
|
||||
template<uint8_t Reel> TILE_GET_INFO_MEMBER(get_reel_tile_info);
|
||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
@ -156,14 +156,14 @@ void luckgrln_state::machine_start()
|
||||
}
|
||||
|
||||
template<uint8_t Reel>
|
||||
WRITE8_MEMBER(luckgrln_state::reel_ram_w)
|
||||
void luckgrln_state::reel_ram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_reel_ram[Reel][offset] = data;
|
||||
m_reel_tilemap[Reel]->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
template<uint8_t Reel>
|
||||
WRITE8_MEMBER(luckgrln_state::reel_attr_w)
|
||||
void luckgrln_state::reel_attr_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_reel_attr[Reel][offset] = data;
|
||||
m_reel_tilemap[Reel]->mark_tile_dirty(offset);
|
||||
@ -354,17 +354,17 @@ void luckgrln_state::output_w(uint8_t data)
|
||||
|
||||
|
||||
|
||||
WRITE8_MEMBER(luckgrln_state::palette_offset_low_w)
|
||||
void luckgrln_state::palette_offset_low_w(uint8_t data)
|
||||
{
|
||||
m_palette_count = data<<1;
|
||||
}
|
||||
WRITE8_MEMBER(luckgrln_state::palette_offset_high_w)
|
||||
void luckgrln_state::palette_offset_high_w(uint8_t data)
|
||||
{
|
||||
m_palette_count = m_palette_count | data<<9;
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(luckgrln_state::palette_w)
|
||||
void luckgrln_state::palette_w(uint8_t data)
|
||||
{
|
||||
m_palette_ram[m_palette_count] = data;
|
||||
|
||||
@ -386,7 +386,7 @@ WRITE8_MEMBER(luckgrln_state::palette_w)
|
||||
}
|
||||
|
||||
/* Analyzing the lamps, the game should have a 12-buttons control layout */
|
||||
WRITE8_MEMBER(luckgrln_state::lamps_a_w)
|
||||
void luckgrln_state::lamps_a_w(uint8_t data)
|
||||
{
|
||||
/* LAMPS A:
|
||||
|
||||
@ -406,7 +406,7 @@ WRITE8_MEMBER(luckgrln_state::lamps_a_w)
|
||||
m_lamps[i] = BIT(data, i);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(luckgrln_state::lamps_b_w)
|
||||
void luckgrln_state::lamps_b_w(uint8_t data)
|
||||
{
|
||||
/* LAMPS B:
|
||||
|
||||
@ -423,7 +423,7 @@ WRITE8_MEMBER(luckgrln_state::lamps_b_w)
|
||||
m_lamps[i + 8] = BIT(data, i);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(luckgrln_state::counters_w)
|
||||
void luckgrln_state::counters_w(uint8_t data)
|
||||
{
|
||||
/* COUNTERS:
|
||||
|
||||
|
@ -305,10 +305,10 @@ public:
|
||||
void init_luckybald();
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(z180_trdr_w);
|
||||
DECLARE_WRITE8_MEMBER(port90_bitswap_w);
|
||||
DECLARE_READ8_MEMBER(ppi_bitswap_r);
|
||||
DECLARE_WRITE8_MEMBER(ppi_bitswap_w);
|
||||
void z180_trdr_w(uint8_t data);
|
||||
void port90_bitswap_w(uint8_t data);
|
||||
uint8_t ppi_bitswap_r(offs_t offset);
|
||||
void ppi_bitswap_w(offs_t offset, uint8_t data);
|
||||
void output_port_a_w(uint8_t data);
|
||||
void output_port_b_w(uint8_t data);
|
||||
uint8_t input_port_c_r();
|
||||
@ -381,23 +381,23 @@ M_MAP EQU 90H ; [A]= Bank to select (BIT6=MEM, BIT7=EN_NMI)
|
||||
/**************************************
|
||||
* R/W handlers *
|
||||
**************************************/
|
||||
WRITE8_MEMBER(luckybal_state::z180_trdr_w)
|
||||
void luckybal_state::z180_trdr_w(uint8_t data)
|
||||
{
|
||||
m_trdr = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(luckybal_state::port90_bitswap_w)
|
||||
void luckybal_state::port90_bitswap_w(uint8_t data)
|
||||
{
|
||||
data = bitswap<8>(data, 6, 7, 4, 5, 2, 3, 0, 1);
|
||||
membank("bank1")->set_entry(data & 0x3f);
|
||||
}
|
||||
|
||||
READ8_MEMBER(luckybal_state::ppi_bitswap_r)
|
||||
uint8_t luckybal_state::ppi_bitswap_r(offs_t offset)
|
||||
{
|
||||
return bitswap<8>(m_ppi->read(offset), 6, 7, 4, 5, 2, 3, 0, 1);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(luckybal_state::ppi_bitswap_w)
|
||||
void luckybal_state::ppi_bitswap_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_ppi->write(offset, bitswap<8>(data, 6, 7, 4, 5, 2, 3, 0, 1));
|
||||
}
|
||||
|
@ -116,10 +116,10 @@ public:
|
||||
void lwriter(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_READ16_MEMBER(bankedarea_r);
|
||||
DECLARE_WRITE16_MEMBER(bankedarea_w);
|
||||
DECLARE_WRITE8_MEMBER(led_out_w);
|
||||
DECLARE_WRITE8_MEMBER(fifo_out_w);
|
||||
uint16_t bankedarea_r(offs_t offset);
|
||||
void bankedarea_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void led_out_w(uint8_t data);
|
||||
void fifo_out_w(uint8_t data);
|
||||
uint8_t via_pa_r();
|
||||
void via_pa_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(via_ca2_w);
|
||||
@ -249,7 +249,7 @@ void lwriter_state::machine_reset()
|
||||
}
|
||||
|
||||
/* Overlay area */
|
||||
READ16_MEMBER(lwriter_state::bankedarea_r)
|
||||
uint16_t lwriter_state::bankedarea_r(offs_t offset)
|
||||
{
|
||||
if (m_overlay)
|
||||
{
|
||||
@ -264,7 +264,7 @@ READ16_MEMBER(lwriter_state::bankedarea_r)
|
||||
return 0xFFFF;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(lwriter_state::bankedarea_w)
|
||||
void lwriter_state::bankedarea_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (m_overlay)
|
||||
{
|
||||
@ -281,7 +281,7 @@ WRITE16_MEMBER(lwriter_state::bankedarea_w)
|
||||
}
|
||||
|
||||
/* 4 diagnostic LEDs, plus 4 i/o lines for the printer */
|
||||
WRITE8_MEMBER(lwriter_state::led_out_w)
|
||||
void lwriter_state::led_out_w(uint8_t data)
|
||||
{
|
||||
//popmessage("LED status: %02X\n", data&0xFF);
|
||||
logerror("LED status: %02X\n", data&0xFF);
|
||||
@ -289,7 +289,7 @@ WRITE8_MEMBER(lwriter_state::led_out_w)
|
||||
}
|
||||
|
||||
/* FIFO to printer, 64 bytes long */
|
||||
WRITE8_MEMBER(lwriter_state::fifo_out_w)
|
||||
void lwriter_state::fifo_out_w(uint8_t data)
|
||||
{
|
||||
/** TODO: actually emulate this */
|
||||
logerror("FIFO written with: %02X\n", data&0xFF);
|
||||
|
@ -86,14 +86,14 @@ private:
|
||||
required_shared_ptr<uint8_t> m_color_ram;
|
||||
required_device<samples_device> m_samples;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(m14_vram_w);
|
||||
DECLARE_WRITE8_MEMBER(m14_cram_w);
|
||||
DECLARE_READ8_MEMBER(m14_rng_r);
|
||||
DECLARE_WRITE8_MEMBER(output_w);
|
||||
DECLARE_WRITE8_MEMBER(ball_x_w);
|
||||
DECLARE_WRITE8_MEMBER(ball_y_w);
|
||||
DECLARE_WRITE8_MEMBER(paddle_x_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_w);
|
||||
void m14_vram_w(offs_t offset, uint8_t data);
|
||||
void m14_cram_w(offs_t offset, uint8_t data);
|
||||
uint8_t m14_rng_r();
|
||||
void output_w(uint8_t data);
|
||||
void ball_x_w(uint8_t data);
|
||||
void ball_y_w(uint8_t data);
|
||||
void paddle_x_w(uint8_t data);
|
||||
void sound_w(uint8_t data);
|
||||
|
||||
TILE_GET_INFO_MEMBER(m14_get_tile_info);
|
||||
void draw_ball_and_paddle(bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
@ -203,13 +203,13 @@ uint32_t m14_state::screen_update_m14(screen_device &screen, bitmap_ind16 &bitma
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(m14_state::m14_vram_w)
|
||||
void m14_state::m14_vram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_video_ram[offset] = data;
|
||||
m_m14_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m14_state::m14_cram_w)
|
||||
void m14_state::m14_cram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_color_ram[offset] = data;
|
||||
m_m14_tilemap->mark_tile_dirty(offset);
|
||||
@ -221,14 +221,14 @@ WRITE8_MEMBER(m14_state::m14_cram_w)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
READ8_MEMBER(m14_state::m14_rng_r)
|
||||
uint8_t m14_state::m14_rng_r()
|
||||
{
|
||||
/* graphic artifacts happens if this doesn't return random values. */
|
||||
/* guess directly tied to screen frame number */
|
||||
return (m_screen->frame_number() & 0x7f) | (ioport("IN1")->read() & 0x80);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m14_state::output_w)
|
||||
void m14_state::output_w(uint8_t data)
|
||||
{
|
||||
/* ---- x--- active after calling a winning hand */
|
||||
/* ---- --x- lamp? */
|
||||
@ -238,17 +238,17 @@ WRITE8_MEMBER(m14_state::output_w)
|
||||
//popmessage("%02x",data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m14_state::ball_x_w)
|
||||
void m14_state::ball_x_w(uint8_t data)
|
||||
{
|
||||
m_ballx = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m14_state::ball_y_w)
|
||||
void m14_state::ball_y_w(uint8_t data)
|
||||
{
|
||||
m_bally = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m14_state::paddle_x_w)
|
||||
void m14_state::paddle_x_w(uint8_t data)
|
||||
{
|
||||
m_paddlex = data;
|
||||
}
|
||||
@ -270,7 +270,7 @@ static const char *const m14_sample_names[] =
|
||||
nullptr
|
||||
};
|
||||
|
||||
WRITE8_MEMBER(m14_state::sound_w)
|
||||
void m14_state::sound_w(uint8_t data)
|
||||
{
|
||||
switch(data)
|
||||
{
|
||||
|
@ -123,8 +123,8 @@ private:
|
||||
|
||||
u8 pa_r();
|
||||
void pb_w(u8 data);
|
||||
DECLARE_READ8_MEMBER(kbcdata_r);
|
||||
DECLARE_WRITE8_MEMBER(kbcdata_w);
|
||||
u8 kbcdata_r();
|
||||
void kbcdata_w(u8 data);
|
||||
DECLARE_WRITE_LINE_MEMBER(kbcin_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(int_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(halt_i86_w);
|
||||
@ -407,14 +407,14 @@ void m24_state::pb_w(u8 data)
|
||||
m_pa = (m_pa & ~3) | (~data & 3);
|
||||
}
|
||||
|
||||
READ8_MEMBER(m24_state::kbcdata_r)
|
||||
u8 m24_state::kbcdata_r()
|
||||
{
|
||||
m_kbc->set_input_line(TMS7000_INT1_LINE, CLEAR_LINE);
|
||||
m_kbcibf = false;
|
||||
return m_kbcin;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m24_state::kbcdata_w)
|
||||
void m24_state::kbcdata_w(u8 data)
|
||||
{
|
||||
m_pa &= ~0x40;
|
||||
m_pic->ir1_w(1);
|
||||
|
@ -190,22 +190,22 @@ private:
|
||||
optional_device<samples_device> m_samples;
|
||||
required_device<generic_latch_8_device> m_soundlatch;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(m63_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(m63_colorram_w);
|
||||
DECLARE_WRITE8_MEMBER(m63_videoram2_w);
|
||||
void m63_videoram_w(offs_t offset, uint8_t data);
|
||||
void m63_colorram_w(offs_t offset, uint8_t data);
|
||||
void m63_videoram2_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(pal_bank_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(m63_flipscreen_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(fghtbskt_flipscreen_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(coin1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(coin2_w);
|
||||
DECLARE_WRITE8_MEMBER(snd_irq_w);
|
||||
DECLARE_WRITE8_MEMBER(snddata_w);
|
||||
void snd_irq_w(uint8_t data);
|
||||
void snddata_w(offs_t offset, uint8_t data);
|
||||
void p1_w(uint8_t data);
|
||||
void p2_w(uint8_t data);
|
||||
DECLARE_READ8_MEMBER(snd_status_r);
|
||||
uint8_t snd_status_r();
|
||||
DECLARE_READ_LINE_MEMBER(irq_r);
|
||||
DECLARE_READ8_MEMBER(snddata_r);
|
||||
DECLARE_WRITE8_MEMBER(fghtbskt_samples_w);
|
||||
uint8_t snddata_r(offs_t offset);
|
||||
void fghtbskt_samples_w(uint8_t data);
|
||||
SAMPLES_START_CB_MEMBER(fghtbskt_sh_start);
|
||||
DECLARE_WRITE_LINE_MEMBER(nmi_mask_w);
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
@ -280,19 +280,19 @@ void m63_state::m63_palette(palette_device &palette) const
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m63_state::m63_videoram_w)
|
||||
void m63_state::m63_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m63_state::m63_colorram_w)
|
||||
void m63_state::m63_colorram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_colorram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m63_state::m63_videoram2_w)
|
||||
void m63_state::m63_videoram2_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram2[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
@ -405,13 +405,13 @@ WRITE_LINE_MEMBER(m63_state::coin2_w)
|
||||
machine().bookkeeping().coin_counter_w(1, state);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m63_state::snd_irq_w)
|
||||
void m63_state::snd_irq_w(uint8_t data)
|
||||
{
|
||||
m_soundcpu->set_input_line(0, ASSERT_LINE);
|
||||
machine().scheduler().synchronize();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m63_state::snddata_w)
|
||||
void m63_state::snddata_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
if ((m_p2 & 0xf0) == 0xe0)
|
||||
m_ay1->address_w(offset);
|
||||
@ -439,7 +439,7 @@ void m63_state::p2_w(uint8_t data)
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(m63_state::snd_status_r)
|
||||
uint8_t m63_state::snd_status_r()
|
||||
{
|
||||
return m_sound_status;
|
||||
}
|
||||
@ -454,7 +454,7 @@ READ_LINE_MEMBER(m63_state::irq_r)
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ8_MEMBER(m63_state::snddata_r)
|
||||
uint8_t m63_state::snddata_r(offs_t offset)
|
||||
{
|
||||
switch (m_p2 & 0xf0)
|
||||
{
|
||||
@ -464,7 +464,7 @@ READ8_MEMBER(m63_state::snddata_r)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(m63_state::fghtbskt_samples_w)
|
||||
void m63_state::fghtbskt_samples_w(uint8_t data)
|
||||
{
|
||||
if (data & 1)
|
||||
m_samples->start_raw(0, m_samplebuf.get() + ((data & 0xf0) << 8), 0x2000, 8000);
|
||||
|
@ -57,7 +57,7 @@ protected:
|
||||
virtual void machine_start() override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(beep_w);
|
||||
void beep_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(latch_full_w);
|
||||
DECLARE_READ_LINE_MEMBER(mcu_t0_r);
|
||||
DECLARE_READ_LINE_MEMBER(mcu_t1_r);
|
||||
@ -96,7 +96,7 @@ private:
|
||||
emu_timer *m_hsync_off_timer;
|
||||
};
|
||||
|
||||
WRITE8_MEMBER(m79152pc_state::beep_w)
|
||||
void m79152pc_state::beep_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_beep->set_state(BIT(offset, 2));
|
||||
}
|
||||
|
@ -210,18 +210,18 @@ private:
|
||||
void vblank_irq();
|
||||
void mouse_callback();
|
||||
|
||||
DECLARE_READ16_MEMBER ( ram_r );
|
||||
DECLARE_WRITE16_MEMBER ( ram_w );
|
||||
DECLARE_READ16_MEMBER ( ram_600000_r );
|
||||
DECLARE_WRITE16_MEMBER ( ram_600000_w );
|
||||
DECLARE_READ16_MEMBER ( mac_via_r );
|
||||
DECLARE_WRITE16_MEMBER ( mac_via_w );
|
||||
DECLARE_READ16_MEMBER ( mac_autovector_r );
|
||||
DECLARE_WRITE16_MEMBER ( mac_autovector_w );
|
||||
DECLARE_READ16_MEMBER ( mac_iwm_r );
|
||||
DECLARE_WRITE16_MEMBER ( mac_iwm_w );
|
||||
DECLARE_READ16_MEMBER ( macplus_scsi_r );
|
||||
DECLARE_WRITE16_MEMBER ( macplus_scsi_w );
|
||||
uint16_t ram_r(offs_t offset);
|
||||
void ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t ram_600000_r(offs_t offset);
|
||||
void ram_600000_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~ 0);
|
||||
uint16_t mac_via_r(offs_t offset);
|
||||
void mac_via_w(offs_t offset, uint16_t data);
|
||||
uint16_t mac_autovector_r(offs_t offset);
|
||||
void mac_autovector_w(offs_t offset, uint16_t data);
|
||||
uint16_t mac_iwm_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void mac_iwm_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t macplus_scsi_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void macplus_scsi_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
DECLARE_WRITE_LINE_MEMBER(mac_scsi_irq);
|
||||
DECLARE_WRITE_LINE_MEMBER(set_scc_interrupt);
|
||||
|
||||
@ -294,7 +294,7 @@ void mac128_state::machine_reset()
|
||||
m_via->write_pb6(0);
|
||||
}
|
||||
|
||||
READ16_MEMBER(mac128_state::ram_r)
|
||||
uint16_t mac128_state::ram_r(offs_t offset)
|
||||
{
|
||||
if (m_overlay)
|
||||
{
|
||||
@ -304,7 +304,7 @@ READ16_MEMBER(mac128_state::ram_r)
|
||||
return m_ram_ptr[offset & m_ram_mask];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(mac128_state::ram_w)
|
||||
void mac128_state::ram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (!m_overlay)
|
||||
{
|
||||
@ -312,12 +312,12 @@ WRITE16_MEMBER(mac128_state::ram_w)
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER(mac128_state::ram_600000_r)
|
||||
uint16_t mac128_state::ram_600000_r(offs_t offset)
|
||||
{
|
||||
return m_ram_ptr[offset & m_ram_mask];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(mac128_state::ram_600000_w)
|
||||
void mac128_state::ram_600000_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_ram_ptr[offset & m_ram_mask]);
|
||||
}
|
||||
@ -439,7 +439,7 @@ WRITE_LINE_MEMBER(mac128_state::mac_scsi_irq)
|
||||
{
|
||||
}
|
||||
|
||||
READ16_MEMBER ( mac128_state::macplus_scsi_r )
|
||||
uint16_t mac128_state::macplus_scsi_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
int reg = (offset>>3) & 0xf;
|
||||
|
||||
@ -453,7 +453,7 @@ READ16_MEMBER ( mac128_state::macplus_scsi_r )
|
||||
return m_ncr5380->ncr5380_read_reg(reg)<<8;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER ( mac128_state::macplus_scsi_w )
|
||||
void mac128_state::macplus_scsi_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
int reg = (offset>>3) & 0xf;
|
||||
|
||||
@ -603,7 +603,7 @@ void mac128_state::scc_mouse_irq(int x, int y)
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER ( mac128_state::mac_iwm_r )
|
||||
uint16_t mac128_state::mac_iwm_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
/* The first time this is called is in a floppy test, which goes from
|
||||
* $400104 to $400126. After that, all access to the floppy goes through
|
||||
@ -623,7 +623,7 @@ READ16_MEMBER ( mac128_state::mac_iwm_r )
|
||||
return (result << 8) | result;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER ( mac128_state::mac_iwm_w )
|
||||
void mac128_state::mac_iwm_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
if (LOG_MAC_IWM)
|
||||
printf("mac_iwm_w: offset=0x%08x data=0x%04x mask %04x (PC=%x)\n", offset, data, mem_mask, m_maincpu->pc());
|
||||
@ -640,7 +640,7 @@ WRITE_LINE_MEMBER(mac128_state::mac_via_irq)
|
||||
set_via_interrupt(state);
|
||||
}
|
||||
|
||||
READ16_MEMBER ( mac128_state::mac_via_r )
|
||||
uint16_t mac128_state::mac_via_r(offs_t offset)
|
||||
{
|
||||
uint16_t data;
|
||||
|
||||
@ -656,7 +656,7 @@ READ16_MEMBER ( mac128_state::mac_via_r )
|
||||
return (data & 0xff) | (data << 8);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER ( mac128_state::mac_via_w )
|
||||
void mac128_state::mac_via_w(offs_t offset, uint16_t data)
|
||||
{
|
||||
offset >>= 8;
|
||||
offset &= 0x0f;
|
||||
@ -669,7 +669,7 @@ WRITE16_MEMBER ( mac128_state::mac_via_w )
|
||||
m_maincpu->adjust_icount(m_via_cycles);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER ( mac128_state::mac_autovector_w )
|
||||
void mac128_state::mac_autovector_w(offs_t offset, uint16_t data)
|
||||
{
|
||||
if (LOG_GENERAL)
|
||||
logerror("mac_autovector_w: offset=0x%08x data=0x%04x\n", offset, data);
|
||||
@ -679,7 +679,7 @@ WRITE16_MEMBER ( mac128_state::mac_autovector_w )
|
||||
/* Not yet implemented */
|
||||
}
|
||||
|
||||
READ16_MEMBER ( mac128_state::mac_autovector_r )
|
||||
uint16_t mac128_state::mac_autovector_r(offs_t offset)
|
||||
{
|
||||
if (LOG_GENERAL)
|
||||
logerror("mac_autovector_r: offset=0x%08x\n", offset);
|
||||
|
@ -94,10 +94,10 @@ private:
|
||||
uint8_t m_cart_bank;
|
||||
std::unique_ptr<uint8_t[]> m_ram1;
|
||||
required_shared_ptr<uint8_t> m_ram2;
|
||||
DECLARE_WRITE8_MEMBER(rambank_w);
|
||||
DECLARE_READ8_MEMBER(macs_input_r);
|
||||
DECLARE_WRITE8_MEMBER(macs_rom_bank_w);
|
||||
DECLARE_WRITE8_MEMBER(macs_output_w);
|
||||
void rambank_w(uint8_t data);
|
||||
uint8_t macs_input_r(offs_t offset);
|
||||
void macs_rom_bank_w(uint8_t data);
|
||||
void macs_output_w(offs_t offset, uint8_t data);
|
||||
uint8_t dma_offset();
|
||||
|
||||
uint32_t screen_update_macs(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
@ -130,12 +130,12 @@ void macs_state::macs_mem(address_map &map)
|
||||
map(0xf800, 0xffff).bankrw("rambank2"); /* common /backup ram ?*/
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(macs_state::rambank_w)
|
||||
void macs_state::rambank_w(uint8_t data)
|
||||
{
|
||||
m_rambank[0]->set_entry(2 + (data & 1));
|
||||
}
|
||||
|
||||
READ8_MEMBER(macs_state::macs_input_r)
|
||||
uint8_t macs_state::macs_input_r(offs_t offset)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
@ -168,12 +168,12 @@ READ8_MEMBER(macs_state::macs_input_r)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(macs_state::macs_rom_bank_w)
|
||||
void macs_state::macs_rom_bank_w(uint8_t data)
|
||||
{
|
||||
m_rombank[1]->set_entry(m_cart_bank * 0x100 + data);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(macs_state::macs_output_w)
|
||||
void macs_state::macs_output_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
|
@ -172,13 +172,13 @@ protected:
|
||||
virtual void video_start() override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE16_MEMBER(layer0_videoram_w);
|
||||
DECLARE_WRITE16_MEMBER(layer1_videoram_w);
|
||||
DECLARE_WRITE16_MEMBER(layer2_videoram_w);
|
||||
DECLARE_READ16_MEMBER(magic102_r);
|
||||
DECLARE_READ16_MEMBER(hotslot_copro_r);
|
||||
DECLARE_WRITE16_MEMBER(hotslot_copro_w);
|
||||
DECLARE_WRITE16_MEMBER(magic10_out_w);
|
||||
void layer0_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void layer1_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void layer2_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t magic102_r();
|
||||
uint16_t hotslot_copro_r();
|
||||
void hotslot_copro_w(uint16_t data);
|
||||
void magic10_out_w(uint16_t data);
|
||||
TILE_GET_INFO_MEMBER(get_layer0_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_layer1_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_layer2_tile_info);
|
||||
@ -209,19 +209,19 @@ private:
|
||||
* Video Hardware *
|
||||
***************************/
|
||||
|
||||
WRITE16_MEMBER(magic10_state::layer0_videoram_w)
|
||||
void magic10_state::layer0_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_layer0_videoram[offset]);
|
||||
m_layer0_tilemap->mark_tile_dirty(offset >> 1);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(magic10_state::layer1_videoram_w)
|
||||
void magic10_state::layer1_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_layer1_videoram[offset]);
|
||||
m_layer1_tilemap->mark_tile_dirty(offset >> 1);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(magic10_state::layer2_videoram_w)
|
||||
void magic10_state::layer2_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_layer2_videoram[offset]);
|
||||
m_layer2_tilemap->mark_tile_dirty(offset >> 1);
|
||||
@ -286,23 +286,23 @@ uint32_t magic10_state::screen_update_magic10(screen_device &screen, bitmap_ind1
|
||||
* R/W Handlers *
|
||||
***************************/
|
||||
|
||||
READ16_MEMBER(magic10_state::magic102_r)
|
||||
uint16_t magic10_state::magic102_r()
|
||||
{
|
||||
m_magic102_ret ^= 0x20;
|
||||
return m_magic102_ret;
|
||||
}
|
||||
|
||||
READ16_MEMBER(magic10_state::hotslot_copro_r)
|
||||
uint16_t magic10_state::hotslot_copro_r()
|
||||
{
|
||||
return 0x80;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(magic10_state::hotslot_copro_w)
|
||||
void magic10_state::hotslot_copro_w(uint16_t data)
|
||||
{
|
||||
logerror("Writing to copro: %d \n", data);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(magic10_state::magic10_out_w)
|
||||
void magic10_state::magic10_out_w(uint16_t data)
|
||||
{
|
||||
/*
|
||||
----------------------------------------------
|
||||
|
@ -431,9 +431,9 @@ private:
|
||||
required_shared_ptr<uint16_t> m_magicram;
|
||||
required_shared_ptr<uint16_t> m_magicramb;
|
||||
required_shared_ptr<uint16_t> m_pcab_vregs;
|
||||
DECLARE_READ16_MEMBER(test_r);
|
||||
DECLARE_READ16_MEMBER(philips_66470_r);
|
||||
DECLARE_WRITE16_MEMBER(philips_66470_w);
|
||||
uint16_t test_r();
|
||||
uint16_t philips_66470_r(offs_t offset);
|
||||
void philips_66470_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
virtual void machine_reset() override;
|
||||
virtual void video_start() override;
|
||||
uint32_t screen_update_magicard(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
@ -713,12 +713,12 @@ uint32_t magicard_state::screen_update_magicard(screen_device &screen, bitmap_rg
|
||||
* R/W Handlers *
|
||||
*************************/
|
||||
|
||||
READ16_MEMBER(magicard_state::test_r)
|
||||
uint16_t magicard_state::test_r()
|
||||
{
|
||||
return machine().rand();
|
||||
}
|
||||
|
||||
READ16_MEMBER(magicard_state::philips_66470_r)
|
||||
uint16_t magicard_state::philips_66470_r(offs_t offset)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
@ -737,7 +737,7 @@ READ16_MEMBER(magicard_state::philips_66470_r)
|
||||
return m_pcab_vregs[offset];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(magicard_state::philips_66470_w)
|
||||
void magicard_state::philips_66470_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_pcab_vregs[offset]);
|
||||
|
||||
|
@ -483,10 +483,10 @@ private:
|
||||
required_device<dac_bit_interface> m_dac;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(magicfly_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(magicfly_colorram_w);
|
||||
DECLARE_READ8_MEMBER(mux_port_r);
|
||||
DECLARE_WRITE8_MEMBER(mux_port_w);
|
||||
void magicfly_videoram_w(offs_t offset, uint8_t data);
|
||||
void magicfly_colorram_w(offs_t offset, uint8_t data);
|
||||
uint8_t mux_port_r();
|
||||
void mux_port_w(uint8_t data);
|
||||
TILE_GET_INFO_MEMBER(get_magicfly_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_7mezzo_tile_info);
|
||||
void magicfly_palette(palette_device &palette) const;
|
||||
@ -502,13 +502,13 @@ private:
|
||||
*********************************************/
|
||||
|
||||
|
||||
WRITE8_MEMBER(magicfly_state::magicfly_videoram_w)
|
||||
void magicfly_state::magicfly_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(magicfly_state::magicfly_colorram_w)
|
||||
void magicfly_state::magicfly_colorram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_colorram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
@ -643,7 +643,7 @@ void magicfly_state::bchance_palette(palette_device &palette) const
|
||||
**************************************************/
|
||||
|
||||
|
||||
READ8_MEMBER(magicfly_state::mux_port_r)
|
||||
uint8_t magicfly_state::mux_port_r()
|
||||
{
|
||||
switch( m_input_selector )
|
||||
{
|
||||
@ -656,7 +656,7 @@ READ8_MEMBER(magicfly_state::mux_port_r)
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(magicfly_state::mux_port_w)
|
||||
void magicfly_state::mux_port_w(uint8_t data)
|
||||
{
|
||||
/* - bits -
|
||||
7654 3210
|
||||
|
@ -210,24 +210,24 @@ private:
|
||||
} m_zr36120;
|
||||
|
||||
|
||||
DECLARE_READ32_MEMBER( zr36120_r );
|
||||
DECLARE_WRITE32_MEMBER( zr36120_w );
|
||||
uint32_t zr36120_r(offs_t offset);
|
||||
void zr36120_w(offs_t offset, uint32_t data);
|
||||
|
||||
DECLARE_READ32_MEMBER( f0_r );
|
||||
DECLARE_WRITE32_MEMBER( f0_w );
|
||||
uint32_t f0_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
void f0_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
DECLARE_READ32_MEMBER( unk_r );
|
||||
DECLARE_READ32_MEMBER( unk2_r );
|
||||
uint32_t unk_r();
|
||||
uint32_t unk2_r();
|
||||
|
||||
DECLARE_WRITE32_MEMBER( serial_w );
|
||||
void serial_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
DECLARE_READ32_MEMBER( adsp_idma_data_r );
|
||||
DECLARE_WRITE32_MEMBER( adsp_idma_data_w );
|
||||
DECLARE_WRITE32_MEMBER( adsp_idma_addr_w );
|
||||
uint32_t adsp_idma_data_r(offs_t offset, uint32_t mem_mask = ~0);
|
||||
void adsp_idma_data_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
void adsp_idma_addr_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
|
||||
|
||||
DECLARE_READ32_MEMBER( adsp_status_r );
|
||||
DECLARE_READ16_MEMBER( adsp_control_r );
|
||||
DECLARE_WRITE16_MEMBER( adsp_control_w );
|
||||
uint32_t adsp_status_r();
|
||||
uint16_t adsp_control_r(offs_t offset);
|
||||
void adsp_control_w(offs_t offset, uint16_t data);
|
||||
|
||||
void zr36120_reset();
|
||||
|
||||
@ -482,7 +482,7 @@ void magictg_state::zr36120_pci_w(int function, int reg, uint32_t data, uint32_t
|
||||
}
|
||||
}
|
||||
|
||||
READ32_MEMBER( magictg_state::zr36120_r )
|
||||
uint32_t magictg_state::zr36120_r(offs_t offset)
|
||||
{
|
||||
uint32_t res = 0;
|
||||
|
||||
@ -505,7 +505,7 @@ READ32_MEMBER( magictg_state::zr36120_r )
|
||||
return res;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( magictg_state::zr36120_w )
|
||||
void magictg_state::zr36120_w(offs_t offset, uint32_t data)
|
||||
{
|
||||
offset <<= 2;
|
||||
|
||||
@ -545,18 +545,18 @@ WRITE32_MEMBER( magictg_state::zr36120_w )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
READ32_MEMBER( magictg_state::unk_r )
|
||||
uint32_t magictg_state::unk_r()
|
||||
{
|
||||
/* Will not boot otherwise */
|
||||
return 0x6000;
|
||||
}
|
||||
|
||||
READ32_MEMBER( magictg_state::unk2_r )
|
||||
uint32_t magictg_state::unk2_r()
|
||||
{
|
||||
return 0xffffffff;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( magictg_state::serial_w )
|
||||
void magictg_state::serial_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
if (offset == 0)
|
||||
{
|
||||
@ -565,7 +565,7 @@ WRITE32_MEMBER( magictg_state::serial_w )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( magictg_state::f0_w )
|
||||
void magictg_state::f0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
int ch;
|
||||
|
||||
@ -617,8 +617,8 @@ WRITE32_MEMBER( magictg_state::f0_w )
|
||||
|
||||
while (m_dma_ch[ch].count > 3)
|
||||
{
|
||||
uint32_t src_dword = swapendian_int32(space.read_dword(src_addr));
|
||||
space.write_dword(dst_addr, src_dword);
|
||||
uint32_t src_dword = swapendian_int32(m_mips->space(AS_PROGRAM).read_dword(src_addr));
|
||||
m_mips->space(AS_PROGRAM).write_dword(dst_addr, src_dword);
|
||||
src_addr += 4;
|
||||
dst_addr += 4;
|
||||
m_dma_ch[ch].count -=4;
|
||||
@ -627,12 +627,12 @@ WRITE32_MEMBER( magictg_state::f0_w )
|
||||
// FIXME!
|
||||
if (m_dma_ch[ch].count & 3)
|
||||
{
|
||||
uint32_t src_dword = swapendian_int32(space.read_dword(src_addr));
|
||||
uint32_t dst_dword = space.read_dword(dst_addr);
|
||||
uint32_t src_dword = swapendian_int32(m_mips->space(AS_PROGRAM).read_dword(src_addr));
|
||||
uint32_t dst_dword = m_mips->space(AS_PROGRAM).read_dword(dst_addr);
|
||||
uint32_t mask = 0xffffffff >> ((m_dma_ch[ch].count & 3) << 3);
|
||||
|
||||
dst_dword = (dst_dword & ~mask) | (src_dword & mask);
|
||||
space.write_dword(dst_addr, dst_dword);
|
||||
m_mips->space(AS_PROGRAM).write_dword(dst_addr, dst_dword);
|
||||
m_dma_ch[ch].count = 0;
|
||||
}
|
||||
}
|
||||
@ -654,7 +654,7 @@ WRITE32_MEMBER( magictg_state::f0_w )
|
||||
}
|
||||
}
|
||||
|
||||
READ32_MEMBER( magictg_state::f0_r )
|
||||
uint32_t magictg_state::f0_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
int ch;
|
||||
uint32_t val = 0;
|
||||
@ -700,7 +700,7 @@ READ32_MEMBER( magictg_state::f0_r )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE32_MEMBER( magictg_state::adsp_idma_data_w )
|
||||
void magictg_state::adsp_idma_data_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
if (ACCESSING_BITS_16_31)
|
||||
m_adsp->idma_addr_w(data >> 16);
|
||||
@ -708,7 +708,7 @@ WRITE32_MEMBER( magictg_state::adsp_idma_data_w )
|
||||
m_adsp->idma_addr_w(data & 0xffff);
|
||||
}
|
||||
|
||||
READ32_MEMBER( magictg_state::adsp_idma_data_r )
|
||||
uint32_t magictg_state::adsp_idma_data_r(offs_t offset, uint32_t mem_mask)
|
||||
{
|
||||
// TODO: Set /IACK appropriately
|
||||
if (ACCESSING_BITS_0_15)
|
||||
@ -722,7 +722,7 @@ READ32_MEMBER( magictg_state::adsp_idma_data_r )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE32_MEMBER( magictg_state::adsp_idma_addr_w )
|
||||
void magictg_state::adsp_idma_addr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
|
||||
{
|
||||
// TODO: Set /IACK appropriately
|
||||
if (ACCESSING_BITS_16_31)
|
||||
@ -734,13 +734,13 @@ WRITE32_MEMBER( magictg_state::adsp_idma_addr_w )
|
||||
fatalerror("????\n");
|
||||
}
|
||||
|
||||
READ32_MEMBER( magictg_state::adsp_status_r )
|
||||
uint32_t magictg_state::adsp_status_r()
|
||||
{
|
||||
// ADSP_IACK = Bit 2
|
||||
return (0 << 2) | (machine().rand() & 1);
|
||||
}
|
||||
|
||||
READ16_MEMBER( magictg_state::adsp_control_r )
|
||||
uint16_t magictg_state::adsp_control_r(offs_t offset)
|
||||
{
|
||||
uint16_t res = 0;
|
||||
|
||||
@ -758,7 +758,7 @@ READ16_MEMBER( magictg_state::adsp_control_r )
|
||||
return res;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( magictg_state::adsp_control_w )
|
||||
void magictg_state::adsp_control_w(offs_t offset, uint16_t data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
|
@ -35,11 +35,11 @@ protected:
|
||||
virtual void machine_start() override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(beep_w);
|
||||
DECLARE_READ8_MEMBER(sysctl_r);
|
||||
DECLARE_WRITE8_MEMBER(sysctl_w);
|
||||
DECLARE_READ16_MEMBER(irqstat_r);
|
||||
DECLARE_WRITE16_MEMBER(port50_w);
|
||||
void beep_w(u8 data);
|
||||
u8 sysctl_r(offs_t offset);
|
||||
void sysctl_w(offs_t offset, u8 data);
|
||||
u16 irqstat_r();
|
||||
void port50_w(u16 data);
|
||||
DECLARE_WRITE_LINE_MEMBER(rtcirq_w);
|
||||
|
||||
void check_irq();
|
||||
@ -176,7 +176,7 @@ void magnum_state::machine_reset()
|
||||
m_keybirq = false;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(magnum_state::beep_w)
|
||||
void magnum_state::beep_w(u8 data)
|
||||
{
|
||||
if (data & ~1) logerror("beep_w unmapped bits %02x\n", data);
|
||||
m_beep->set_state(BIT(data, 0));
|
||||
@ -188,7 +188,7 @@ void magnum_state::magnum_map(address_map &map)
|
||||
map(0xe0000, 0xfffff).rom().region("bios", 0);
|
||||
}
|
||||
|
||||
READ8_MEMBER(magnum_state::sysctl_r)
|
||||
u8 magnum_state::sysctl_r(offs_t offset)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
@ -205,7 +205,7 @@ READ8_MEMBER(magnum_state::sysctl_r)
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(magnum_state::sysctl_w)
|
||||
void magnum_state::sysctl_w(offs_t offset, u8 data)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
@ -239,7 +239,7 @@ WRITE8_MEMBER(magnum_state::sysctl_w)
|
||||
* 15- CRTC?
|
||||
*/
|
||||
|
||||
READ16_MEMBER(magnum_state::irqstat_r)
|
||||
u16 magnum_state::irqstat_r()
|
||||
{
|
||||
u16 ret = m_wake ? 0 : 0x400;
|
||||
ret |= m_rtcirq ? 0x40 : 0;
|
||||
@ -248,7 +248,7 @@ READ16_MEMBER(magnum_state::irqstat_r)
|
||||
return ret;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(magnum_state::port50_w)
|
||||
void magnum_state::port50_w(u16 data)
|
||||
{
|
||||
}
|
||||
|
||||
|
@ -102,8 +102,8 @@ private:
|
||||
required_memory_bank m_rombank;
|
||||
required_ioport m_in0;
|
||||
|
||||
DECLARE_READ8_MEMBER(magtouch_io_r);
|
||||
DECLARE_WRITE8_MEMBER(magtouch_io_w);
|
||||
uint8_t magtouch_io_r(offs_t offset);
|
||||
void magtouch_io_w(offs_t offset, uint8_t data);
|
||||
void dma8237_1_dack_w(uint8_t data);
|
||||
virtual void machine_start() override;
|
||||
static void magtouch_sb_conf(device_t *device);
|
||||
@ -117,7 +117,7 @@ private:
|
||||
*
|
||||
*************************************/
|
||||
|
||||
READ8_MEMBER(magtouch_state::magtouch_io_r)
|
||||
uint8_t magtouch_state::magtouch_io_r(offs_t offset)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
@ -128,7 +128,7 @@ READ8_MEMBER(magtouch_state::magtouch_io_r)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(magtouch_state::magtouch_io_w)
|
||||
void magtouch_state::magtouch_io_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch(offset)
|
||||
{
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user