mirror of
https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
Removed distinction between *_gettotalcycles() and *_gettotalcycles64().
All functions now return 64-bit results. Updated all call sites appropriately.
This commit is contained in:
parent
acd05b666f
commit
dbf80b011c
@ -603,7 +603,7 @@ static void hyperstone_set_trap_entry(int which)
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static UINT32 compute_tr(void)
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{
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UINT64 cycles_since_base = activecpu_gettotalcycles64() - hyperstone.tr_base_cycles;
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UINT64 cycles_since_base = activecpu_gettotalcycles() - hyperstone.tr_base_cycles;
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UINT64 clocks_since_base = cycles_since_base >> hyperstone.clock_scale;
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return hyperstone.tr_base_value + (clocks_since_base / hyperstone.tr_clocks_per_tick);
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}
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@ -619,12 +619,12 @@ static void update_timer_prescale(void)
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hyperstone.clock_cycles_6 = 6 << hyperstone.clock_scale;
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hyperstone.tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2;
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hyperstone.tr_base_value = prevtr;
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hyperstone.tr_base_cycles = activecpu_gettotalcycles64();
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hyperstone.tr_base_cycles = activecpu_gettotalcycles();
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}
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static void adjust_timer_interrupt(void)
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{
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UINT64 cycles_since_base = activecpu_gettotalcycles64() - hyperstone.tr_base_cycles;
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UINT64 cycles_since_base = activecpu_gettotalcycles() - hyperstone.tr_base_cycles;
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UINT64 clocks_since_base = cycles_since_base >> hyperstone.clock_scale;
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UINT64 cycles_until_next_clock = cycles_since_base - (clocks_since_base << hyperstone.clock_scale);
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int cpunum = cpu_getactivecpu();
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@ -799,7 +799,7 @@ INLINE void set_global_register(UINT8 code, UINT32 val)
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*/
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case TR_REGISTER:
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hyperstone.tr_base_value = val;
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hyperstone.tr_base_cycles = activecpu_gettotalcycles64();
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hyperstone.tr_base_cycles = activecpu_gettotalcycles();
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adjust_timer_interrupt();
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break;
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@ -229,7 +229,7 @@ struct _mips3drc_data
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UINT32 abs32mask[4];
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/* C functions */
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x86code * activecpu_gettotalcycles64;
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x86code * activecpu_gettotalcycles;
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x86code * mips3com_update_cycle_counting;
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x86code * mips3com_tlbr;
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x86code * mips3com_tlbwi;
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@ -441,7 +441,7 @@ static void mips3drc_init(void)
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mips3.drcdata->abs32mask[0] = 0x7fffffff;
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/* get pointers to C functions */
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mips3.drcdata->activecpu_gettotalcycles64 = (x86code *)activecpu_gettotalcycles64;
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mips3.drcdata->activecpu_gettotalcycles = (x86code *)activecpu_gettotalcycles;
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mips3.drcdata->mips3com_update_cycle_counting = (x86code *)mips3com_update_cycle_counting;
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mips3.drcdata->mips3com_tlbr = (x86code *)mips3com_tlbr;
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mips3.drcdata->mips3com_tlbwi = (x86code *)mips3com_tlbwi;
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@ -3049,7 +3049,7 @@ static int compile_set_cop0_reg(drc_core *drc, compiler_state *compiler, const o
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case COP0_Count:
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emit_flush_cycles_before_instruction(drc, compiler, desc, 1);
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emit_mov_m32_r32(DRCTOP, CPR0ADDR(COP0_Count), REG_EAX); // mov [Count],eax
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emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles64)); // call activecpu_gettotalcycles64
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emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles)); // call activecpu_gettotalcycles
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emit_mov_r32_m32(DRCTOP, REG_EDX, CPR0ADDR(COP0_Count)); // mov edx,[Count]
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emit_sub_r64_r64(DRCTOP, REG_RAX, REG_RDX); // sub rax,rdx
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emit_sub_r64_r64(DRCTOP, REG_RAX, REG_RDX); // sub rax,rdx
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@ -3099,7 +3099,7 @@ static int compile_get_cop0_reg(drc_core *drc, compiler_state *compiler, const o
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case COP0_Count:
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compiler->cycles += MIPS3_COUNT_READ_CYCLES;
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emit_flush_cycles_before_instruction(drc, compiler, desc, MIPS3_COUNT_READ_CYCLES);
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emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles64)); // call activecpu_gettotalcycles64
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emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles)); // call activecpu_gettotalcycles
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emit_sub_r64_m64(DRCTOP, REG_RAX, MDRC(&mips3.core->count_zero_time)); // sub rax,[count_zero_time]
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emit_shr_r64_imm(DRCTOP, REG_RAX, 1); // shr rax,1
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emit_movsxd_r64_r32(DRCTOP, REG_RAX, REG_EAX); // movsxd rax,eax
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@ -3112,7 +3112,7 @@ static int compile_get_cop0_reg(drc_core *drc, compiler_state *compiler, const o
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case COP0_Random:
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emit_flush_cycles_before_instruction(drc, compiler, desc, 1);
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emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles64)); // call activecpu_gettotalcycles64
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emit_call_m64(DRCTOP, MDRC(&mips3.drcdata->activecpu_gettotalcycles)); // call activecpu_gettotalcycles
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emit_mov_r32_m32(DRCTOP, REG_ECX, CPR0ADDR(COP0_Wired)); // mov ecx,[Wired]
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emit_mov_r32_imm(DRCTOP, REG_R8D, 48); // mov r8d,48
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emit_and_r32_imm(DRCTOP, REG_ECX, 0x3f); // and ecx,0x3f
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@ -3594,7 +3594,7 @@ static UINT32 recompile_set_cop0_reg(drc_core *drc, UINT8 reg)
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emit_mov_m32_r32(DRCTOP, ICOUNTADDR, REG_EBP); // mov [icount],ebp
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emit_sub_r32_imm(DRCTOP, REG_ESP, 8); // sub esp,8
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emit_push_r32(DRCTOP, REG_EAX); // push eax
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emit_call(DRCTOP, (x86code *)activecpu_gettotalcycles64); // call activecpu_gettotalcycles64
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emit_call(DRCTOP, (x86code *)activecpu_gettotalcycles); // call activecpu_gettotalcycles
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emit_pop_r32(DRCTOP, REG_EBX); // pop ebx
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emit_add_r32_imm(DRCTOP, REG_ESP, 8); // add esp,8
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emit_sub_r32_r32(DRCTOP, REG_EAX, REG_EBX); // sub eax,ebx
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@ -3647,7 +3647,7 @@ static UINT32 recompile_get_cop0_reg(drc_core *drc, UINT8 reg)
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resolve_link(DRCTOP, &link1); // notneg:
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emit_mov_m32_r32(DRCTOP, ICOUNTADDR, REG_EBP); // mov [icount],ebp
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emit_sub_r32_imm(DRCTOP, REG_ESP, 12); // sub esp,12
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emit_call(DRCTOP, (x86code *)activecpu_gettotalcycles64); // call activecpu_gettotalcycles64
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emit_call(DRCTOP, (x86code *)activecpu_gettotalcycles); // call activecpu_gettotalcycles
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emit_add_r32_imm(DRCTOP, REG_ESP, 12); // add esp,12
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emit_sub_r32_m32(DRCTOP, REG_EAX, MABS(LO(&mips3.core->count_zero_time))); // sub eax,[mips3.core->count_zero_time+0]
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emit_sbb_r32_m32(DRCTOP, REG_EDX, MABS(HI(&mips3.core->count_zero_time))); // sbb edx,[mips3.core->count_zero_time+4]
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@ -479,7 +479,7 @@ INLINE UINT64 get_cop0_reg(int idx)
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mips3.core.icount -= MIPS3_COUNT_READ_CYCLES;
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else
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mips3.core.icount = 0;
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return (UINT32)((activecpu_gettotalcycles64() - mips3.core.count_zero_time) / 2);
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return (UINT32)((activecpu_gettotalcycles() - mips3.core.count_zero_time) / 2);
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}
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else if (idx == COP0_Cause)
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{
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@ -495,7 +495,7 @@ INLINE UINT64 get_cop0_reg(int idx)
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int wired = mips3.core.cpr[0][COP0_Wired] & 0x3f;
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int range = 48 - wired;
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if (range > 0)
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return ((activecpu_gettotalcycles64() - mips3.core.count_zero_time) % range + wired) & 0x3f;
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return ((activecpu_gettotalcycles() - mips3.core.count_zero_time) % range + wired) & 0x3f;
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else
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return 47;
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}
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@ -535,7 +535,7 @@ INLINE void set_cop0_reg(int idx, UINT64 val)
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case COP0_Count:
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mips3.core.cpr[0][idx] = val;
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mips3.core.count_zero_time = activecpu_gettotalcycles64() - ((UINT64)(UINT32)val * 2);
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mips3.core.count_zero_time = activecpu_gettotalcycles() - ((UINT64)(UINT32)val * 2);
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mips3com_update_cycle_counting(&mips3.core);
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break;
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@ -144,7 +144,7 @@ void mips3com_reset(mips3_state *mips)
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mips->cpr[0][COP0_Count] = 0;
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mips->cpr[0][COP0_Config] = compute_config_register(mips);
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mips->cpr[0][COP0_PRId] = compute_prid_register(mips);
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mips->count_zero_time = activecpu_gettotalcycles64();
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mips->count_zero_time = activecpu_gettotalcycles();
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/* recompute the TLB table */
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mips3com_recompute_tlb_table(mips);
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@ -181,7 +181,7 @@ void mips3com_update_cycle_counting(mips3_state *mips)
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/* modify the timer to go off */
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if ((mips->cpr[0][COP0_Status] & SR_IMEX5) && mips->cpr[0][COP0_Compare] != 0xffffffff)
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{
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UINT32 count = (activecpu_gettotalcycles64() - mips->count_zero_time) / 2;
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UINT32 count = (activecpu_gettotalcycles() - mips->count_zero_time) / 2;
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UINT32 compare = mips->cpr[0][COP0_Compare];
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UINT32 cyclesleft = compare - count;
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attotime newtime = ATTOTIME_IN_CYCLES(((INT64)cyclesleft * 2), cpu_getactivecpu());
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@ -362,7 +362,7 @@ void mips3com_tlbwr(mips3_state *mips)
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/* "random" is based off of the current cycle counting through the non-wired pages */
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if (unwired > 0)
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index = ((activecpu_gettotalcycles64() - mips->count_zero_time) % unwired + wired) & 0x3f;
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index = ((activecpu_gettotalcycles() - mips->count_zero_time) % unwired + wired) & 0x3f;
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/* use the common handler to write to this index */
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tlb_write_common(mips, index);
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@ -559,7 +559,7 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info)
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case CPUINFO_INT_REGISTER + MIPS3_SR: info->i = mips->cpr[0][COP0_Status]; break;
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case CPUINFO_INT_REGISTER + MIPS3_EPC: info->i = mips->cpr[0][COP0_EPC]; break;
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case CPUINFO_INT_REGISTER + MIPS3_CAUSE: info->i = mips->cpr[0][COP0_Cause]; break;
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case CPUINFO_INT_REGISTER + MIPS3_COUNT: info->i = ((activecpu_gettotalcycles64() - mips->count_zero_time) / 2); break;
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case CPUINFO_INT_REGISTER + MIPS3_COUNT: info->i = ((activecpu_gettotalcycles() - mips->count_zero_time) / 2); break;
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case CPUINFO_INT_REGISTER + MIPS3_COMPARE: info->i = mips->cpr[0][COP0_Compare]; break;
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case CPUINFO_INT_REGISTER + MIPS3_INDEX: info->i = mips->cpr[0][COP0_Index]; break;
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case CPUINFO_INT_REGISTER + MIPS3_RANDOM: info->i = mips->cpr[0][COP0_Random]; break;
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@ -631,7 +631,7 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info)
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case CPUINFO_STR_REGISTER + MIPS3_SR: sprintf(info->s, "SR: %08X", (UINT32)mips->cpr[0][COP0_Status]); break;
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case CPUINFO_STR_REGISTER + MIPS3_EPC: sprintf(info->s, "EPC:%08X", (UINT32)mips->cpr[0][COP0_EPC]); break;
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case CPUINFO_STR_REGISTER + MIPS3_CAUSE: sprintf(info->s, "Cause:%08X", (UINT32)mips->cpr[0][COP0_Cause]); break;
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case CPUINFO_STR_REGISTER + MIPS3_COUNT: sprintf(info->s, "Count:%08X", (UINT32)((activecpu_gettotalcycles64() - mips->count_zero_time) / 2)); break;
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case CPUINFO_STR_REGISTER + MIPS3_COUNT: sprintf(info->s, "Count:%08X", (UINT32)((activecpu_gettotalcycles() - mips->count_zero_time) / 2)); break;
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case CPUINFO_STR_REGISTER + MIPS3_COMPARE: sprintf(info->s, "Compare:%08X", (UINT32)mips->cpr[0][COP0_Compare]); break;
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case CPUINFO_STR_REGISTER + MIPS3_INDEX: sprintf(info->s, "Index:%08X", (UINT32)mips->cpr[0][COP0_Index]); break;
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case CPUINFO_STR_REGISTER + MIPS3_RANDOM: sprintf(info->s, "Random:%08X", (UINT32)mips->cpr[0][COP0_Random]); break;
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@ -141,7 +141,7 @@ typedef struct
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UINT16 frc;
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UINT16 ocra, ocrb, icr;
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UINT32 frc_base;
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UINT64 frc_base;
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int frt_input;
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int internal_irq_level;
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@ -2396,7 +2396,7 @@ static void sh2_set_context(void *src)
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static void sh2_timer_resync(void)
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{
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int divider = div_tab[(sh2.m[5] >> 8) & 3];
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UINT32 cur_time = cpunum_gettotalcycles(sh2.cpu_number);
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UINT64 cur_time = cpunum_gettotalcycles(sh2.cpu_number);
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if(divider)
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sh2.frc += (cur_time - sh2.frc_base) >> divider;
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@ -792,21 +792,7 @@ int cycles_currently_ran(void)
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*
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*************************************/
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/*--------------------------------------------------------------
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IMPORTANT: this value wraps around in a relatively short
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time. For example, for a 6MHz CPU, it will wrap around in
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2^32/6000000 = 716 seconds = 12 minutes.
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Make sure you don't do comparisons between values returned
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by this function, but only use the difference (which will
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be correct regardless of wraparound).
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Alternatively, use the new 64-bit variants instead.
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--------------------------------------------------------------*/
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UINT32 activecpu_gettotalcycles(void)
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UINT64 activecpu_gettotalcycles(void)
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{
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VERIFY_ACTIVECPU(activecpu_gettotalcycles);
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if (activecpu == cpu_getexecutingcpu())
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@ -815,7 +801,7 @@ UINT32 activecpu_gettotalcycles(void)
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return cpu[activecpu].totalcycles;
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}
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UINT32 cpunum_gettotalcycles(int cpunum)
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UINT64 cpunum_gettotalcycles(int cpunum)
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{
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VERIFY_CPUNUM(cpunum_gettotalcycles);
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if (cpunum == cpu_getexecutingcpu())
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@ -825,25 +811,6 @@ UINT32 cpunum_gettotalcycles(int cpunum)
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}
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UINT64 activecpu_gettotalcycles64(void)
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{
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VERIFY_ACTIVECPU(activecpu_gettotalcycles64);
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if (activecpu == cpu_getexecutingcpu())
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return cpu[activecpu].totalcycles + cycles_currently_ran();
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else
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return cpu[activecpu].totalcycles;
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}
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UINT64 cpunum_gettotalcycles64(int cpunum)
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{
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VERIFY_CPUNUM(cpunum_gettotalcycles64);
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if (cpunum == cpu_getexecutingcpu())
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return cpu[cpunum].totalcycles + cycles_currently_ran();
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else
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return cpu[cpunum].totalcycles;
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}
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/*************************************
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*
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@ -343,12 +343,10 @@ void cpu_boost_interleave(attotime timeslice_time, attotime boost_duration);
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int cycles_currently_ran(void);
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/* Returns the total number of CPU cycles */
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UINT32 activecpu_gettotalcycles(void);
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UINT64 activecpu_gettotalcycles64(void);
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UINT64 activecpu_gettotalcycles(void);
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/* Returns the total number of CPU cycles for a given CPU */
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UINT32 cpunum_gettotalcycles(int cpunum);
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UINT64 cpunum_gettotalcycles64(int cpunum);
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UINT64 cpunum_gettotalcycles(int cpunum);
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/* Safely eats cycles so we don't cross a timeslice boundary */
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void activecpu_eat_cycles(int cycles);
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@ -311,7 +311,7 @@ struct _dcs_state
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UINT16 input_data;
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UINT16 output_data;
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UINT16 output_control;
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UINT32 output_control_cycles;
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UINT64 output_control_cycles;
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UINT8 last_output_full;
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UINT8 last_input_empty;
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void (*output_full_cb)(int);
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@ -1686,7 +1686,7 @@ static void update_timer_count(void)
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return;
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/* count cycles */
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elapsed_cycles = cpunum_gettotalcycles64(dcs.cpunum) - dcs.timer_start_cycles;
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elapsed_cycles = cpunum_gettotalcycles(dcs.cpunum) - dcs.timer_start_cycles;
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elapsed_clocks = elapsed_cycles / dcs.timer_scale;
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/* if we haven't counted past the initial count yet, just do that */
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@ -1712,7 +1712,7 @@ static TIMER_CALLBACK( internal_timer_callback )
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/* we do this to avoid drifting */
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dcs.timers_fired++;
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target_cycles = dcs.timer_start_cycles + dcs.timer_scale * (dcs.timer_start_count + 1 + dcs.timers_fired * (dcs.timer_period + 1));
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target_cycles -= cpunum_gettotalcycles64(dcs.cpunum);
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target_cycles -= cpunum_gettotalcycles(dcs.cpunum);
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/* set the next timer, but only if it's for a reasonable number */
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if (!dcs.timer_ignore && (dcs.timer_period > 10 || dcs.timer_scale > 1))
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@ -1728,7 +1728,7 @@ static void reset_timer(void)
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return;
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/* compute the time until the first firing */
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dcs.timer_start_cycles = cpunum_gettotalcycles64(dcs.cpunum);
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dcs.timer_start_cycles = cpunum_gettotalcycles(dcs.cpunum);
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dcs.timers_fired = 0;
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/* if this is the first timer, check the IRQ routine for the DRAM refresh stub */
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@ -29,20 +29,7 @@ static const int gyruss_timer[10] =
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READ8_HANDLER( gyruss_portA_r )
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{
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/* need to protect from totalcycles overflow */
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static int last_totalcycles = 0;
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/* number of Z80 clock cycles to count */
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static int clock;
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int current_totalcycles;
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current_totalcycles = activecpu_gettotalcycles();
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clock = (clock + (current_totalcycles-last_totalcycles)) % 10240;
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last_totalcycles = current_totalcycles;
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return gyruss_timer[clock/1024];
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return gyruss_timer[(activecpu_gettotalcycles()/1024) % 10];
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}
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@ -40,7 +40,7 @@ static UINT8 *rombase;
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static UINT32 romsize;
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static UINT16 *comram;
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static UINT32 last_bio_cycles;
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static UINT64 last_bio_cycles;
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|
||||
@ -309,7 +309,7 @@ WRITE16_HANDLER( hdsnd68k_320com_w )
|
||||
|
||||
READ16_HANDLER( hdsnddsp_get_bio )
|
||||
{
|
||||
UINT32 cycles_since_last_bio = activecpu_gettotalcycles() - last_bio_cycles;
|
||||
UINT64 cycles_since_last_bio = activecpu_gettotalcycles() - last_bio_cycles;
|
||||
INT32 cycles_until_bio = CYCLES_PER_BIO - cycles_since_last_bio;
|
||||
|
||||
/* if we're not at the next BIO yet, advance us there */
|
||||
|
@ -47,20 +47,7 @@ static const int scramble_timer[10] =
|
||||
|
||||
READ8_HANDLER( scramble_portB_r )
|
||||
{
|
||||
/* need to protect from totalcycles overflow */
|
||||
static int last_totalcycles = 0;
|
||||
|
||||
/* number of Z80 clock cycles to count */
|
||||
static int clock;
|
||||
|
||||
int current_totalcycles;
|
||||
|
||||
current_totalcycles = activecpu_gettotalcycles();
|
||||
clock = (clock + (current_totalcycles-last_totalcycles)) % 5120;
|
||||
|
||||
last_totalcycles = current_totalcycles;
|
||||
|
||||
return scramble_timer[clock/512];
|
||||
return scramble_timer[(activecpu_gettotalcycles()/512) % 10];
|
||||
}
|
||||
|
||||
|
||||
@ -89,20 +76,7 @@ static const int frogger_timer[10] =
|
||||
|
||||
READ8_HANDLER( frogger_portB_r )
|
||||
{
|
||||
/* need to protect from totalcycles overflow */
|
||||
static int last_totalcycles = 0;
|
||||
|
||||
/* number of Z80 clock cycles to count */
|
||||
static int clock;
|
||||
|
||||
int current_totalcycles;
|
||||
|
||||
current_totalcycles = activecpu_gettotalcycles();
|
||||
clock = (clock + (current_totalcycles-last_totalcycles)) % 5120;
|
||||
|
||||
last_totalcycles = current_totalcycles;
|
||||
|
||||
return frogger_timer[clock/512];
|
||||
return frogger_timer[(activecpu_gettotalcycles()/512) % 10];
|
||||
}
|
||||
|
||||
|
||||
|
@ -66,7 +66,7 @@ static READ8_HANDLER( timeplt_portB_r )
|
||||
{
|
||||
0x00, 0x10, 0x20, 0x30, 0x40, 0x90, 0xa0, 0xb0, 0xa0, 0xd0
|
||||
};
|
||||
return timeplt_timer[(activecpu_gettotalcycles64() / 512) % 10];
|
||||
return timeplt_timer[(activecpu_gettotalcycles() / 512) % 10];
|
||||
}
|
||||
|
||||
|
||||
|
@ -23,7 +23,7 @@ static int SN76496_latch;
|
||||
|
||||
READ8_HANDLER( trackfld_sh_timer_r )
|
||||
{
|
||||
int clock = activecpu_gettotalcycles() / TIMER_RATE;
|
||||
UINT32 clock = activecpu_gettotalcycles() / TIMER_RATE;
|
||||
|
||||
return clock & 0xF;
|
||||
}
|
||||
@ -56,7 +56,7 @@ WRITE8_HANDLER( trackfld_sound_w )
|
||||
|
||||
READ8_HANDLER( hyperspt_sh_timer_r )
|
||||
{
|
||||
int clock = activecpu_gettotalcycles() / TIMER_RATE;
|
||||
UINT32 clock = activecpu_gettotalcycles() / TIMER_RATE;
|
||||
|
||||
return (clock & 0x3) | (VLM5030_BSY()? 0x04 : 0);
|
||||
}
|
||||
|
@ -168,7 +168,7 @@ static INPUT_PORTS_START( 1942 )
|
||||
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START_TAG("DSWA")
|
||||
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:8,7,6")
|
||||
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:8,7,6")
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( 4C_1C ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
|
||||
@ -177,22 +177,22 @@ static INPUT_PORTS_START( 1942 )
|
||||
PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) )
|
||||
PORT_DIPSETTING( 0x05, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
|
||||
PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:5")
|
||||
PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWA:5")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Cocktail ) )
|
||||
PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4,3")
|
||||
PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWA:4,3")
|
||||
PORT_DIPSETTING( 0x30, "20K 80K 80K+" )
|
||||
PORT_DIPSETTING( 0x20, "20K 100K 100K+" )
|
||||
PORT_DIPSETTING( 0x10, "30K 80K 80K+" )
|
||||
PORT_DIPSETTING( 0x00, "30K 100K 100K+" )
|
||||
PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:2,1")
|
||||
PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWA:2,1")
|
||||
PORT_DIPSETTING( 0x80, "1" )
|
||||
PORT_DIPSETTING( 0x40, "2" )
|
||||
PORT_DIPSETTING( 0xc0, "3" )
|
||||
PORT_DIPSETTING( 0x00, "5" )
|
||||
|
||||
PORT_START_TAG("DSWB")
|
||||
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:8,7,6")
|
||||
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWB:8,7,6")
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( 4C_1C ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
|
||||
@ -201,16 +201,16 @@ static INPUT_PORTS_START( 1942 )
|
||||
PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) )
|
||||
PORT_DIPSETTING( 0x05, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
|
||||
PORT_SERVICE_DIPLOC( 0x08, IP_ACTIVE_LOW, "SW2:5" )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:4")
|
||||
PORT_SERVICE_DIPLOC(0x08, IP_ACTIVE_LOW, "SWB:5" )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWB:4")
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,2")
|
||||
PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWB:3,2")
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
|
||||
PORT_DIPSETTING( 0x60, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x20, "Difficult" )
|
||||
PORT_DIPSETTING( 0x00, "Very Difficult" )
|
||||
PORT_DIPNAME( 0x80, 0x80, "Freeze" ) PORT_DIPLOCATION("SW2:1")
|
||||
PORT_DIPNAME( 0x80, 0x80, "Screen Stop" ) PORT_DIPLOCATION("SWB:1")
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
@ -120,8 +120,8 @@ static INPUT_PORTS_START( 1943 )
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
|
||||
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
|
||||
PORT_START_TAG("DSW0")
|
||||
PORT_DIPNAME( 0x0f, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
|
||||
PORT_START_TAG("DSWA")
|
||||
PORT_DIPNAME( 0x0f, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:5,6,7,8")
|
||||
PORT_DIPSETTING( 0x0f, "1 (Easy)" )
|
||||
PORT_DIPSETTING( 0x0e, "2" )
|
||||
PORT_DIPSETTING( 0x0d, "3" )
|
||||
@ -138,19 +138,19 @@ static INPUT_PORTS_START( 1943 )
|
||||
PORT_DIPSETTING( 0x02, "14" )
|
||||
PORT_DIPSETTING( 0x01, "15" )
|
||||
PORT_DIPSETTING( 0x00, "16 (Difficult)" )
|
||||
PORT_DIPNAME( 0x10, 0x10, "2 Player Game" ) PORT_DIPLOCATION("SW1:4")
|
||||
PORT_DIPNAME( 0x10, 0x10, "2 Player Game" ) PORT_DIPLOCATION("SWA:4")
|
||||
PORT_DIPSETTING( 0x00, "1 Credit/2 Players" )
|
||||
PORT_DIPSETTING( 0x10, "2 Credits/2 Players" )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:3")
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ))
|
||||
PORT_DIPNAME( 0x40, 0x40, "Freeze" ) PORT_DIPLOCATION("SW1:2")
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWA:3")
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Upright ))
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ))
|
||||
PORT_DIPNAME( 0x40, 0x40, "Screen Stop" ) PORT_DIPLOCATION("SWA:2")
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ))
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_SERVICE_DIPLOC( 0x80, IP_ACTIVE_LOW, "SW1:1" )
|
||||
PORT_SERVICE_DIPLOC(0x80, IP_ACTIVE_LOW, "SWA:1" )
|
||||
|
||||
PORT_START_TAG("DSW1")
|
||||
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:6,7,8")
|
||||
PORT_START_TAG("DSWB")
|
||||
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWB:6,7,8")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ))
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
|
||||
@ -159,7 +159,7 @@ static INPUT_PORTS_START( 1943 )
|
||||
PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x03, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:3,4,5")
|
||||
PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWB:3,4,5")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ))
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
|
||||
@ -168,10 +168,10 @@ static INPUT_PORTS_START( 1943 )
|
||||
PORT_DIPSETTING( 0x28, DEF_STR( 1C_3C ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x18, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:2")
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SWB:2")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:1")
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWB:1")
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
@ -540,12 +540,12 @@ static READ32_HANDLER( gpu_jump_r )
|
||||
|
||||
static UINT32 *main_speedup;
|
||||
static int main_speedup_hits;
|
||||
static UINT32 main_speedup_last_cycles;
|
||||
static UINT32 main_speedup_max_cycles;
|
||||
static UINT64 main_speedup_last_cycles;
|
||||
static UINT64 main_speedup_max_cycles;
|
||||
|
||||
static READ32_HANDLER( cojagr3k_main_speedup_r )
|
||||
{
|
||||
UINT32 curcycles = activecpu_gettotalcycles();
|
||||
UINT64 curcycles = activecpu_gettotalcycles();
|
||||
|
||||
/* if it's been less than main_speedup_max_cycles cycles since the last time */
|
||||
if (curcycles - main_speedup_last_cycles < main_speedup_max_cycles)
|
||||
@ -620,7 +620,7 @@ static READ32_HANDLER( main_gpu_wait_r )
|
||||
|
||||
static WRITE32_HANDLER( area51_main_speedup_w )
|
||||
{
|
||||
UINT32 curcycles = activecpu_gettotalcycles();
|
||||
UINT64 curcycles = activecpu_gettotalcycles();
|
||||
|
||||
/* store the data */
|
||||
COMBINE_DATA(main_speedup);
|
||||
@ -654,7 +654,7 @@ static WRITE32_HANDLER( area51_main_speedup_w )
|
||||
|
||||
static WRITE32_HANDLER( area51mx_main_speedup_w )
|
||||
{
|
||||
UINT32 curcycles = activecpu_gettotalcycles();
|
||||
UINT64 curcycles = activecpu_gettotalcycles();
|
||||
|
||||
/* store the data */
|
||||
COMBINE_DATA(&main_speedup[offset]);
|
||||
|
@ -1114,7 +1114,7 @@ static emu_timer *m_p_timer_root[ 3 ];
|
||||
static UINT16 m_p_n_root_count[ 3 ];
|
||||
static UINT16 m_p_n_root_mode[ 3 ];
|
||||
static UINT16 m_p_n_root_target[ 3 ];
|
||||
static UINT32 m_p_n_root_start[ 3 ];
|
||||
static UINT64 m_p_n_root_start[ 3 ];
|
||||
|
||||
#define RC_STOP ( 0x01 )
|
||||
#define RC_RESET ( 0x04 ) /* guess */
|
||||
@ -1125,7 +1125,7 @@ static UINT32 m_p_n_root_start[ 3 ];
|
||||
#define RC_CLC ( 0x100 )
|
||||
#define RC_DIV ( 0x200 )
|
||||
|
||||
static UINT32 psxcpu_gettotalcycles( void )
|
||||
static UINT64 psxcpu_gettotalcycles( void )
|
||||
{
|
||||
/* TODO: should return the start of the current tick. */
|
||||
return cpunum_gettotalcycles(0) * 2;
|
||||
@ -1157,7 +1157,7 @@ static UINT16 root_current( int n_counter )
|
||||
}
|
||||
else
|
||||
{
|
||||
UINT32 n_current;
|
||||
UINT64 n_current;
|
||||
n_current = psxcpu_gettotalcycles() - m_p_n_root_start[ n_counter ];
|
||||
n_current /= root_divider( n_counter );
|
||||
n_current += m_p_n_root_count[ n_counter ];
|
||||
|
@ -132,7 +132,7 @@
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static UINT32 cycles_at_vsync;
|
||||
static UINT64 cycles_at_vsync;
|
||||
static UINT8 main_sense_state;
|
||||
static UINT8 sound_sense_state;
|
||||
static UINT8 coin1_state;
|
||||
|
@ -190,11 +190,11 @@ static UINT8 *palette_ram;
|
||||
static UINT8 *io_port;
|
||||
|
||||
/* Coin, Door, Hopper and EEPROM States */
|
||||
static UINT32 last_cycles;
|
||||
static UINT64 last_cycles;
|
||||
static UINT8 coin_state = 0;
|
||||
static UINT32 last_door;
|
||||
static UINT64 last_door;
|
||||
static UINT8 door_open = 0;
|
||||
static UINT32 last_coin_out;
|
||||
static UINT64 last_coin_out;
|
||||
static UINT8 coin_out_state = 0;
|
||||
static int sda_dir = 0;
|
||||
|
||||
@ -522,7 +522,7 @@ static READ8_HANDLER( peplus_input_bank_a_r )
|
||||
UINT8 bank_a = 0x50; // Turn Off Low Battery and Hopper Full Statuses
|
||||
UINT8 coin_optics = 0x00;
|
||||
UINT8 coin_out = 0x00;
|
||||
UINT32 curr_cycles = activecpu_gettotalcycles();
|
||||
UINT64 curr_cycles = activecpu_gettotalcycles();
|
||||
|
||||
UINT8 sda = 0;
|
||||
if(!sda_dir)
|
||||
|
@ -106,7 +106,7 @@ static UINT32 bsmt_data_bank;
|
||||
static UINT32 bsmt_data_offset;
|
||||
|
||||
static UINT32 *speedup_data;
|
||||
static UINT32 last_cycles;
|
||||
static UINT64 last_cycles;
|
||||
static UINT32 loop_count;
|
||||
|
||||
static offs_t speedup_pc;
|
||||
@ -243,7 +243,7 @@ static WRITE32_HANDLER( speedup_w )
|
||||
/* see if the PC matches */
|
||||
if ((activecpu_get_previouspc() & 0x1fffffff) == speedup_pc)
|
||||
{
|
||||
UINT32 curr_cycles = activecpu_gettotalcycles();
|
||||
UINT64 curr_cycles = activecpu_gettotalcycles();
|
||||
|
||||
/* if less than 50 cycles from the last time, count it */
|
||||
if (curr_cycles - last_cycles < 50)
|
||||
|
@ -36,14 +36,14 @@ if it was a small shared buffer. The order of operations is:
|
||||
*/
|
||||
READ8_HANDLER( docastle_shared0_r )
|
||||
{
|
||||
if (offset == 8) logerror("CPU #0 shared0r clock = %d\n",activecpu_gettotalcycles());
|
||||
if (offset == 8) logerror("CPU #0 shared0r clock = %d\n",(UINT32)activecpu_gettotalcycles());
|
||||
return buffer0[offset];
|
||||
}
|
||||
|
||||
|
||||
READ8_HANDLER( docastle_shared1_r )
|
||||
{
|
||||
if (offset == 8) logerror("CPU #1 shared1r clock = %d\n",activecpu_gettotalcycles());
|
||||
if (offset == 8) logerror("CPU #1 shared1r clock = %d\n",(UINT32)activecpu_gettotalcycles());
|
||||
return buffer1[offset];
|
||||
}
|
||||
|
||||
@ -51,7 +51,7 @@ READ8_HANDLER( docastle_shared1_r )
|
||||
WRITE8_HANDLER( docastle_shared0_w )
|
||||
{
|
||||
if (offset == 8) logerror("CPU #1 shared0w %02x %02x %02x %02x %02x %02x %02x %02x %02x clock = %d\n",
|
||||
buffer0[0],buffer0[1],buffer0[2],buffer0[3],buffer0[4],buffer0[5],buffer0[6],buffer0[7],data,activecpu_gettotalcycles());
|
||||
buffer0[0],buffer0[1],buffer0[2],buffer0[3],buffer0[4],buffer0[5],buffer0[6],buffer0[7],data,(UINT32)activecpu_gettotalcycles());
|
||||
|
||||
buffer0[offset] = data;
|
||||
|
||||
@ -68,7 +68,7 @@ WRITE8_HANDLER( docastle_shared1_w )
|
||||
if (offset == 8)
|
||||
{
|
||||
logerror("CPU #0 shared1w %02x %02x %02x %02x %02x %02x %02x %02x %02x clock = %d\n",
|
||||
buffer1[0],buffer1[1],buffer1[2],buffer1[3],buffer1[4],buffer1[5],buffer1[6],buffer1[7],data,activecpu_gettotalcycles());
|
||||
buffer1[0],buffer1[1],buffer1[2],buffer1[3],buffer1[4],buffer1[5],buffer1[6],buffer1[7],data,(UINT32)activecpu_gettotalcycles());
|
||||
|
||||
/* freeze execution of the master CPU until the slave has used the shared memory */
|
||||
cpu_spinuntil_trigger(500);
|
||||
|
@ -471,7 +471,7 @@ static emu_timer *m_p_timer_root[ 3 ];
|
||||
static UINT16 m_p_n_root_count[ 3 ];
|
||||
static UINT16 m_p_n_root_mode[ 3 ];
|
||||
static UINT16 m_p_n_root_target[ 3 ];
|
||||
static UINT32 m_p_n_root_start[ 3 ];
|
||||
static UINT64 m_p_n_root_start[ 3 ];
|
||||
|
||||
#define RC_STOP ( 0x01 )
|
||||
#define RC_RESET ( 0x04 ) /* guess */
|
||||
@ -482,7 +482,7 @@ static UINT32 m_p_n_root_start[ 3 ];
|
||||
#define RC_CLC ( 0x100 )
|
||||
#define RC_DIV ( 0x200 )
|
||||
|
||||
static UINT32 psxcpu_gettotalcycles( void )
|
||||
static UINT64 psxcpu_gettotalcycles( void )
|
||||
{
|
||||
/* TODO: should return the start of the current tick. */
|
||||
return cpunum_gettotalcycles(0) * 2;
|
||||
@ -514,7 +514,7 @@ static UINT16 root_current( int n_counter )
|
||||
}
|
||||
else
|
||||
{
|
||||
UINT32 n_current;
|
||||
UINT64 n_current;
|
||||
n_current = psxcpu_gettotalcycles() - m_p_n_root_start[ n_counter ];
|
||||
n_current /= root_divider( n_counter );
|
||||
n_current += m_p_n_root_count[ n_counter ];
|
||||
|
@ -26,8 +26,8 @@ struct player_gfx {
|
||||
static struct player_gfx p0gfx;
|
||||
static struct player_gfx p1gfx;
|
||||
|
||||
static UINT32 frame_cycles;
|
||||
static UINT32 paddle_cycles;
|
||||
static UINT64 frame_cycles;
|
||||
static UINT64 paddle_cycles;
|
||||
|
||||
static int horzP0;
|
||||
static int horzP1;
|
||||
@ -1648,7 +1648,7 @@ static WRITE8_HANDLER( GRP1_w )
|
||||
|
||||
static READ8_HANDLER( INPT_r )
|
||||
{
|
||||
UINT32 elapsed = activecpu_gettotalcycles() - paddle_cycles;
|
||||
UINT64 elapsed = activecpu_gettotalcycles() - paddle_cycles;
|
||||
int input = TIA_INPUT_PORT_ALWAYS_ON;
|
||||
|
||||
if ( tia_read_input_port )
|
||||
|
Loading…
Reference in New Issue
Block a user