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Removed mame_find_cpu_index(). Use cputag_get_cpu() instead.

Browse Source 
Updated all drivers calling this to the newer function, and
generally simplified their code as a result.
This commit is contained in:
Aaron Giles 2008-12-06 07:25:48 +00:00
parent d8e17c4e86
commit f57ab32404
33 changed files with 183 additions and 200 deletions
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21
src/emu/machine/ldpr8210.c
View File

@ -86,7 +86,7 @@ struct _pioneer_pia
typedef struct _simutrek_data simutrek_data;
struct _simutrek_data
{
int cpunum; /* CPU index of the 8748 */
const device_config *cpu; /* 8748 CPU device */
UINT8 audio_squelch; /* audio squelch value */
UINT8 data; /* parallel data for simutrek */
UINT8 data_ready; /* ready flag for simutrek data */
@ -107,7 +107,7 @@ struct _ldplayer_data
attotime firstbittime; /* time of first bit in command */
/* low-level emulation data */
int cpunum; /* CPU index of the 8049 */
const device_config *cpu; /* 8049 CPU device */
attotime slowtrg; /* time of the last SLOW TRG */
pioneer_pia pia; /* PIA state */
UINT8 vsync; /* live VSYNC state */
@ -272,7 +272,7 @@ INLINE void update_video_squelch(laserdisc_state *ld)
INLINE void update_audio_squelch(laserdisc_state *ld)
{
ldplayer_data *player = ld->player;
if (player->simutrek.cpunum == -1)
if (player->simutrek.cpu == NULL)
ldcore_set_audio_squelch(ld, (player->port1 & 0x40) || !(player->pia.portb & 0x01), (player->port1 & 0x40) || !(player->pia.portb & 0x02));
else
ldcore_set_audio_squelch(ld, player->simutrek.audio_squelch, player->simutrek.audio_squelch);
@ -360,11 +360,11 @@ static void pr8210_init(laserdisc_state *ld)
player->slowtrg = curtime;
/* find our CPU */
player->cpunum = mame_find_cpu_index(ld->device->machine, device_build_tag(tempstring, ld->device->tag, "pr8210"));
player->cpu = cputag_get_cpu(ld->device->machine, device_build_tag(tempstring, ld->device->tag, "pr8210"));
astring_free(tempstring);
/* we don't have the Simutrek player overrides */
player->simutrek.cpunum = -1;
player->simutrek.cpu = NULL;
player->simutrek.audio_squelch = FALSE;
}
@ -798,7 +798,7 @@ static WRITE8_HANDLER( pr8210_port1_w )
if (!(data & 0x01) && (prev & 0x01))
{
/* special override for the Simutrek, which takes over control of this is some situations */
if (player->simutrek.cpunum == -1 || !player->simutrek.controlthis)
if (player->simutrek.cpu == NULL || !player->simutrek.controlthis)
{
if (LOG_SIMUTREK)
printf("%3d:JUMP TRG\n", video_screen_get_vpos(ld->screen));
@ -857,7 +857,8 @@ static WRITE8_HANDLER( pr8210_port2_w )
player->slowtrg = timer_get_time(space->machine);
/* bit 6 when low triggers an IRQ on the MCU */
cpu_set_input_line(space->machine->cpu[player->cpunum], MCS48_INPUT_IRQ, (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
if (player->cpu != NULL)
cpu_set_input_line(player->cpu, MCS48_INPUT_IRQ, (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
/* standby LED is set accordingl to bit 4 */
output_set_value("pr8210_standby", (data & 0x10) != 0);
@ -1095,7 +1096,7 @@ static void simutrek_init(laserdisc_state *ld)
player->simutrek.data_ready = 1;
/* find the Simutrek CPU */
player->simutrek.cpunum = mame_find_cpu_index(ld->device->machine, device_build_tag(tempstring, ld->device->tag, "simutrek"));
player->simutrek.cpu = cputag_get_cpu(ld->device->machine, device_build_tag(tempstring, ld->device->tag, "simutrek"));
astring_free(tempstring);
}
@ -1109,7 +1110,7 @@ static TIMER_CALLBACK( irq_off )
{
laserdisc_state *ld = ptr;
ldplayer_data *player = ld->player;
cpu_set_input_line(ld->device->machine->cpu[player->simutrek.cpunum], MCS48_INPUT_IRQ, CLEAR_LINE);
cpu_set_input_line(player->simutrek.cpu, MCS48_INPUT_IRQ, CLEAR_LINE);
if (LOG_SIMUTREK)
printf("%3d:**** Simutrek IRQ clear\n", video_screen_get_vpos(ld->screen));
}
@ -1132,7 +1133,7 @@ static void simutrek_vsync(laserdisc_state *ld, const vbi_metadata *vbi, int fie
{
if (LOG_SIMUTREK)
printf("%3d:VSYNC IRQ\n", video_screen_get_vpos(ld->screen));
cpu_set_input_line(ld->device->machine->cpu[player->simutrek.cpunum], MCS48_INPUT_IRQ, ASSERT_LINE);
cpu_set_input_line(player->simutrek.cpu, MCS48_INPUT_IRQ, ASSERT_LINE);
timer_set(ld->device->machine, video_screen_get_scan_period(ld->screen), ld, 0, irq_off);
}
}

6
src/emu/machine/ldv1000.c
View File

@ -53,7 +53,7 @@
struct _ldplayer_data
{
/* low-level emulation data */
int cpunum; /* CPU index of the Z80 */
const device_config *cpu; /* CPU index of the Z80 */
const device_config *ctc; /* CTC device */
const device_config *multitimer; /* multi-jump timer device */
@ -247,7 +247,7 @@ static void ldv1000_init(laserdisc_state *ld)
memset(player, 0, sizeof(*player));
/* find our devices */
player->cpunum = mame_find_cpu_index(ld->device->machine, device_build_tag(tempstring, ld->device->tag, "ldv1000"));
player->cpu = cputag_get_cpu(ld->device->machine, device_build_tag(tempstring, ld->device->tag, "ldv1000"));
player->ctc = devtag_get_device(ld->device->machine, Z80CTC, device_build_tag(tempstring, ld->device->tag, "ldvctc"));
player->multitimer = devtag_get_device(ld->device->machine, TIMER, device_build_tag(tempstring, ld->device->tag, "multitimer"));
timer_device_set_ptr(player->multitimer, ld);
@ -437,7 +437,7 @@ static TIMER_DEVICE_CALLBACK( multijump_timer )
static void ctc_interrupt(const device_config *device, int state)
{
laserdisc_state *ld = find_ldv1000(device->machine);
cpu_set_input_line(device->machine->cpu[ld->player->cpunum], 0, state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(ld->player->cpu, 0, state ? ASSERT_LINE : CLEAR_LINE);
}

8
src/emu/machine/ldvp931.c
View File

@ -48,7 +48,7 @@
struct _ldplayer_data
{
/* low-level emulation data */
int cpunum; /* CPU index of the 8049 */
const device_config *cpu; /* CPU index of the 8049 */
const device_config *tracktimer; /* timer device */
vp931_data_ready_func data_ready_cb; /* data ready callback */
@ -230,7 +230,7 @@ static void vp931_init(laserdisc_state *ld)
player->data_ready_cb = cbsave;
/* find our devices */
player->cpunum = mame_find_cpu_index(ld->device->machine, device_build_tag(tempstring, ld->device->tag, "vp931"));
player->cpu = cputag_get_cpu(ld->device->machine, device_build_tag(tempstring, ld->device->tag, "vp931"));
player->tracktimer = devtag_get_device(ld->device->machine, TIMER, device_build_tag(tempstring, ld->device->tag, "tracktimer"));
timer_device_set_ptr(player->tracktimer, ld);
astring_free(tempstring);
@ -350,7 +350,7 @@ static TIMER_CALLBACK( vbi_data_fetch )
/* at the start of each line, signal an interrupt and use a timer to turn it off */
if (which == 0)
{
cpu_set_input_line(machine->cpu[player->cpunum], MCS48_INPUT_IRQ, ASSERT_LINE);
cpu_set_input_line(player->cpu, MCS48_INPUT_IRQ, ASSERT_LINE);
timer_set(machine, ATTOTIME_IN_NSEC(5580), ld, 0, irq_off);
}
@ -406,7 +406,7 @@ static TIMER_CALLBACK( deferred_data_w )
static TIMER_CALLBACK( irq_off )
{
laserdisc_state *ld = ptr;
cpu_set_input_line(machine->cpu[ld->player->cpunum], MCS48_INPUT_IRQ, CLEAR_LINE);
cpu_set_input_line(ld->player->cpu, MCS48_INPUT_IRQ, CLEAR_LINE);
}

10
src/emu/machine/z80ctc.c
View File

@ -465,17 +465,17 @@ static DEVICE_START( z80ctc )
const z80ctc_interface *intf = device->static_config;
astring *tempstring = astring_alloc();
z80ctc *ctc = get_safe_token(device);
int cpunum = -1;
const device_config *cpu = NULL;
int ch;
if (intf->cpu != NULL)
{
cpunum = mame_find_cpu_index(device->machine, device_inherit_tag(tempstring, device->tag, intf->cpu));
if (cpunum == -1)
cpu = cputag_get_cpu(device->machine, device_inherit_tag(tempstring, device->tag, intf->cpu));
if (cpu == NULL)
fatalerror("Z80CTC:Unable to find CPU %s\n", device_inherit_tag(tempstring, device->tag, intf->cpu));
}
if (cpunum != -1)
ctc->clock = device->machine->config->cpu[cpunum].clock;
if (cpu != NULL)
ctc->clock = cpu_get_clock(cpu);
else
ctc->clock = intf->baseclock;
ctc->period16 = attotime_mul(ATTOTIME_IN_HZ(ctc->clock), 16);

10
src/emu/machine/z80sio.c
View File

@ -786,17 +786,17 @@ static DEVICE_START( z80sio )
const z80sio_interface *intf = device->static_config;
astring *tempstring = astring_alloc();
z80sio *sio = get_safe_token(device);
const device_config *cpu = NULL;
void *ptr = (void *)device;
int cpunum = -1;
if (intf->cpu != NULL)
{
cpunum = mame_find_cpu_index(device->machine, device_inherit_tag(tempstring, device->tag, intf->cpu));
if (cpunum == -1)
cpu = cputag_get_cpu(device->machine, device_inherit_tag(tempstring, device->tag, intf->cpu));
if (cpu == NULL)
fatalerror("Z80SIO:Unable to find CPU %s\n", device_inherit_tag(tempstring, device->tag, intf->cpu));
}
if (cpunum != -1)
sio->clock = device->machine->config->cpu[cpunum].clock;
if (cpu != NULL)
sio->clock = cpu_get_clock(cpu);
else
sio->clock = intf->baseclock;

17
src/emu/mame.c
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@ -1254,23 +1254,6 @@ static void logfile_callback(running_machine *machine, const char *buffer)
}
/*-------------------------------------------------
mame_find_cpu_index - return the index of the
given CPU, or -1 if not found
-------------------------------------------------*/
int mame_find_cpu_index(running_machine *machine, const char *tag)
{
int cpunum;
for (cpunum = 0; cpunum < MAX_CPU; cpunum++)
if (machine->config->cpu[cpunum].tag && strcmp(machine->config->cpu[cpunum].tag, tag) == 0)
return cpunum;
return -1;
}
/*-------------------------------------------------
mame_rand - standardized random numbers
-------------------------------------------------*/

3
src/emu/mame.h
View File

@ -360,9 +360,6 @@ void mame_parse_ini_files(core_options *options, const game_driver *driver);
/* standardized random number generator */
UINT32 mame_rand(running_machine *machine);
/* return the index of the given CPU, or -1 if not found */
int mame_find_cpu_index(running_machine *machine, const char *tag);
/* retrieve the base system time */
void mame_get_base_datetime(running_machine *machine, mame_system_time *systime);

8
src/emu/romload.c
View File

@ -1170,10 +1170,10 @@ static void process_disk_entries(running_machine *machine, rom_load_data *romdat
static UINT32 normalize_flags_for_cpu(running_machine *machine, UINT32 startflags, const char *rgntag)
{
int cpunum = mame_find_cpu_index(machine, rgntag);
if (cpunum >= 0)
const device_config *device = cputag_get_cpu(machine, rgntag);
if (device != NULL)
{
int cputype = machine->config->cpu[cpunum].type;
int cputype = ((const cpu_config *)device->inline_config)->type;
int buswidth;
/* set the endianness */
@ -1223,7 +1223,7 @@ static void process_region_list(running_machine *machine, rom_load_data *romdata
assert(ROMENTRY_ISREGION(region));
/* if this is a CPU region, override with the CPU width and endianness */
if (mame_find_cpu_index(machine, astring_c(regiontag)) >= 0)
if (cputag_get_cpu(machine, astring_c(regiontag)) != NULL)
regionflags = normalize_flags_for_cpu(machine, regionflags, astring_c(regiontag));
/* remember the base and length */

10
src/mame/audio/atarijsa.c
View File

@ -49,7 +49,7 @@ static UINT8 *bank_source_data;
static UINT8 speech_data;
static UINT8 last_ctl;
static int cpu_num;
static const device_config *jsacpu;
static const char *test_port;
static UINT16 test_mask;
@ -110,8 +110,8 @@ void atarijsa_init(running_machine *machine, const char *testport, int testmask)
UINT8 *rgn;
/* copy in the parameters */
cpu_num = mame_find_cpu_index(machine, "jsa");
assert_always(cpu_num != -1, "Could not find JSA CPU!");
jsacpu = cputag_get_cpu(machine, "jsa");
assert_always(jsacpu != NULL, "Could not find JSA CPU!");
test_port = testport;
test_mask = testmask;
@ -145,7 +145,7 @@ void atarijsa_init(running_machine *machine, const char *testport, int testmask)
/* install POKEY memory handlers */
if (has_pokey)
memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[cpu_num], ADDRESS_SPACE_PROGRAM), 0x2c00, 0x2c0f, 0, 0, pokey1_r, pokey1_w);
memory_install_readwrite8_handler(cpu_get_address_space(jsacpu, ADDRESS_SPACE_PROGRAM), 0x2c00, 0x2c0f, 0, 0, pokey1_r, pokey1_w);
init_save_state(machine);
atarijsa_reset();
@ -178,7 +178,7 @@ void atarijsa_init(running_machine *machine, const char *testport, int testmask)
void atarijsa_reset(void)
{
/* reset the sound I/O system */
atarigen_sound_io_reset(cpu_num);
atarigen_sound_io_reset(jsacpu);
/* reset the static states */
speech_data = 0;

28
src/mame/audio/cage.c
View File

@ -34,7 +34,7 @@
*
*************************************/
static int cage_cpu;
static const device_config *cage_cpu;
static attotime cage_cpu_h1_clock_period;
static UINT8 cpu_to_cage_ready;
@ -161,8 +161,8 @@ void cage_init(running_machine *machine, offs_t speedup)
memory_set_bankptr(machine, 10, memory_region(machine, "cageboot"));
memory_set_bankptr(machine, 11, memory_region(machine, "cage"));
cage_cpu = mame_find_cpu_index(machine, "cage");
cage_cpu_clock_period = ATTOTIME_IN_HZ(cpu_get_clock(machine->cpu[cage_cpu]));
cage_cpu = cputag_get_cpu(machine, "cage");
cage_cpu_clock_period = ATTOTIME_IN_HZ(cpu_get_clock(cage_cpu));
cage_cpu_h1_clock_period = attotime_mul(cage_cpu_clock_period, 2);
dma_timer = timer_alloc(machine, dma_timer_callback, NULL);
@ -170,7 +170,7 @@ void cage_init(running_machine *machine, offs_t speedup)
timer[1] = timer_alloc(machine, cage_timer_callback, NULL);
if (speedup)
speedup_ram = memory_install_write32_handler(cpu_get_address_space(machine->cpu[cage_cpu], ADDRESS_SPACE_PROGRAM), speedup, speedup, 0, 0, speedup_w);
speedup_ram = memory_install_write32_handler(cpu_get_address_space(cage_cpu, ADDRESS_SPACE_PROGRAM), speedup, speedup, 0, 0, speedup_w);
state_save_register_global(machine, cpu_to_cage_ready);
state_save_register_global(machine, cage_to_cpu_ready);
@ -194,7 +194,7 @@ void cage_reset_w(int state)
{
if (state)
cage_control_w(Machine, 0);
cpu_set_input_line(Machine->cpu[cage_cpu], INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(cage_cpu, INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -223,7 +223,7 @@ static TIMER_CALLBACK( dma_timer_callback )
tms32031_io_regs[DMA_SOURCE_ADDR] = param;
/* set the interrupt */
cpu_set_input_line(machine->cpu[cage_cpu], TMS32031_DINT, ASSERT_LINE);
cpu_set_input_line(cage_cpu, TMS32031_DINT, ASSERT_LINE);
dma_enabled = 0;
}
@ -292,7 +292,7 @@ static TIMER_CALLBACK( cage_timer_callback )
int which = param;
/* set the interrupt */
cpu_set_input_line(machine->cpu[cage_cpu], TMS32031_TINT0 + which, ASSERT_LINE);
cpu_set_input_line(cage_cpu, TMS32031_TINT0 + which, ASSERT_LINE);
cage_timer_enabled[which] = 0;
update_timer(which);
}
@ -461,12 +461,12 @@ static void update_control_lines(running_machine *machine)
}
/* set the IOF input lines */
cpu_push_context(machine->cpu[cage_cpu]);
val = cpu_get_reg(machine->activecpu, TMS32031_IOF);
cpu_push_context(cage_cpu);
val = cpu_get_reg(cage_cpu, TMS32031_IOF);
val &= ~0x88;
if (cpu_to_cage_ready) val |= 0x08;
if (cage_to_cpu_ready) val |= 0x80;
cpu_set_reg(machine->activecpu, TMS32031_IOF, val);
cpu_set_reg(cage_cpu, TMS32031_IOF, val);
cpu_pop_context();
}
@ -477,7 +477,7 @@ static READ32_HANDLER( cage_from_main_r )
logerror("%06X:CAGE read command = %04X\n", cpu_get_pc(space->cpu), cage_from_main);
cpu_to_cage_ready = 0;
update_control_lines(space->machine);
cpu_set_input_line(space->machine->cpu[cage_cpu], TMS32031_IRQ0, CLEAR_LINE);
cpu_set_input_line(cage_cpu, TMS32031_IRQ0, CLEAR_LINE);
return cage_from_main;
}
@ -525,7 +525,7 @@ static TIMER_CALLBACK( deferred_cage_w )
cage_from_main = param;
cpu_to_cage_ready = 1;
update_control_lines(machine);
cpu_set_input_line(machine->cpu[cage_cpu], TMS32031_IRQ0, ASSERT_LINE);
cpu_set_input_line(cage_cpu, TMS32031_IRQ0, ASSERT_LINE);
}
@ -557,7 +557,7 @@ void cage_control_w(running_machine *machine, UINT16 data)
/* CPU is reset if both control lines are 0 */
if (!(cage_control & 3))
{
cpu_set_input_line(machine->cpu[cage_cpu], INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(cage_cpu, INPUT_LINE_RESET, ASSERT_LINE);
dma_enabled = 0;
dma_timer_enabled = 0;
@ -574,7 +574,7 @@ void cage_control_w(running_machine *machine, UINT16 data)
cage_to_cpu_ready = 0;
}
else
cpu_set_input_line(machine->cpu[cage_cpu], INPUT_LINE_RESET, CLEAR_LINE);
cpu_set_input_line(cage_cpu, INPUT_LINE_RESET, CLEAR_LINE);
/* update the control state */
update_control_lines(machine);

6
src/mame/audio/mario.c
View File

@ -256,7 +256,7 @@ static void set_ea(const address_space *space, int ea)
static SOUND_START( mario )
{
mario_state *state = machine->driver_data;
int audiocpu = mame_find_cpu_index(machine, "audio");
const device_config *audiocpu = cputag_get_cpu(machine, "audio");
#if USE_8039
UINT8 *SND = memory_region(machine, "audio");
@ -264,10 +264,10 @@ static SOUND_START( mario )
#endif
state->eabank = 0;
if (audiocpu != -1 && machine->config->cpu[audiocpu].type != CPU_Z80)
if (audiocpu != NULL && ((const cpu_class_header *)audiocpu->classtoken)->cputype != CPU_Z80)
{
state->eabank = 1;
memory_install_read8_handler(cpu_get_address_space(machine->cpu[audiocpu], ADDRESS_SPACE_PROGRAM), 0x000, 0x7ff, 0, 0, SMH_BANK1);
memory_install_read8_handler(cpu_get_address_space(audiocpu, ADDRESS_SPACE_PROGRAM), 0x000, 0x7ff, 0, 0, SMH_BANK1);
memory_configure_bank(machine, 1, 0, 1, memory_region(machine, "audio"), 0);
memory_configure_bank(machine, 1, 1, 1, memory_region(machine, "audio") + 0x1000, 0x800);
}

11
src/mame/audio/namco54.c
View File

@ -110,24 +110,25 @@ ADDRESS_MAP_END
static TIMER_CALLBACK( namco_54xx_irq_clear )
{
cpu_set_input_line(machine->cpu[param], 0, CLEAR_LINE);
const device_config *device = ptr;
cpu_set_input_line(device, 0, CLEAR_LINE);
}
void namco_54xx_write(UINT8 data)
{
int cpunum = mame_find_cpu_index(Machine, CPUTAG_54XX);
const device_config *device = cputag_get_cpu(Machine, CPUTAG_54XX);
if (cpunum == -1)
if (device == NULL)
return;
timer_call_after_resynch(Machine, NULL, data, namco_54xx_latch_callback);
cpu_set_input_line(Machine->cpu[cpunum], 0, ASSERT_LINE);
cpu_set_input_line(device, 0, ASSERT_LINE);
// The execution time of one instruction is ~4us, so we must make sure to
// give the cpu time to poll the /IRQ input before we clear it.
// The input clock to the 06XX interface chip is 64H, that is
// 18432000/6/64 = 48kHz, so it makes sense for the irq line to be
// asserted for one clock cycle ~= 21us.
timer_set(Machine, ATTOTIME_IN_USEC(21), NULL, cpunum, namco_54xx_irq_clear);
timer_set(Machine, ATTOTIME_IN_USEC(21), (void *)device, 0, namco_54xx_irq_clear);
}

10
src/mame/audio/segasnd.c
View File

@ -82,7 +82,7 @@ typedef struct _usb_state usb_state;
struct _usb_state
{
sound_stream * stream; /* output stream */
UINT8 cpunum; /* CPU index of the 8035 */
const device_config *cpu; /* CPU index of the 8035 */
UINT8 in_latch; /* input latch */
UINT8 out_latch; /* output latch */
UINT8 last_p2_value; /* current P2 output value */
@ -314,7 +314,7 @@ static TIMER_CALLBACK( increment_t1_clock )
void sega_usb_reset(UINT8 t1_clock_mask)
{
/* halt the USB CPU at reset time */
cpu_set_input_line(Machine->cpu[usb.cpunum], INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(usb.cpu, INPUT_LINE_RESET, ASSERT_LINE);
/* start the clock timer */
timer_pulse(Machine, attotime_mul(ATTOTIME_IN_HZ(USB_2MHZ_CLOCK), 256), NULL, 0, increment_t1_clock);
@ -346,7 +346,7 @@ static TIMER_CALLBACK( delayed_usb_data_w )
int data = param;
/* look for rising/falling edges of bit 7 to control the RESET line */
cpu_set_input_line(machine->cpu[usb.cpunum], INPUT_LINE_RESET, (data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(usb.cpu, INPUT_LINE_RESET, (data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
/* if the CLEAR line is set, the low 7 bits of the input are ignored */
if ((usb.last_p2_value & 0x40) == 0)
@ -646,8 +646,8 @@ static void *usb_start(int clock, const custom_sound_interface *config)
int tchan, tgroup;
/* find the CPU we are associated with */
usb.cpunum = mame_find_cpu_index(Machine, "usb");
assert(usb.cpunum != (UINT8)-1);
usb.cpu = cputag_get_cpu(Machine, "usb");
assert(usb.cpu != NULL);
/* allocate work RAM */
usb.work_ram = auto_malloc(0x400);

8
src/mame/audio/seibu.c
View File

@ -279,7 +279,7 @@ WRITE8_HANDLER( seibu_adpcm_ctl_2_w )
/***************************************************************************/
static int sound_cpu;
static const device_config *sound_cpu;
enum
{
@ -318,9 +318,9 @@ static void update_irq_lines(running_machine *machine, int param)
}
if ((irq1 & irq2) == 0xff) /* no IRQs pending */
cpu_set_input_line(machine->cpu[sound_cpu],0,CLEAR_LINE);
cpu_set_input_line(sound_cpu,0,CLEAR_LINE);
else /* IRQ pending */
cpu_set_input_line_and_vector(machine->cpu[sound_cpu],0,ASSERT_LINE,irq1 & irq2);
cpu_set_input_line_and_vector(sound_cpu,0,ASSERT_LINE,irq1 & irq2);
}
WRITE8_HANDLER( seibu_irq_clear_w )
@ -360,7 +360,7 @@ MACHINE_RESET( seibu_sound )
int romlength = memory_region_length(machine, "audio");
UINT8 *rom = memory_region(machine, "audio");
sound_cpu=mame_find_cpu_index(machine, "audio");
sound_cpu=cputag_get_cpu(machine, "audio");
update_irq_lines(machine, VECTOR_INIT);
if (romlength > 0x10000)
memory_configure_bank(machine, 1, 0, (romlength - 0x10000) / 0x8000, rom + 0x10000, 0x8000);

10
src/mame/audio/t5182.c
View File

@ -166,7 +166,7 @@ static int irqstate;
static TIMER_CALLBACK( setirq_callback )
{
int cpunum;
const device_config *cpu;
switch(param)
{
@ -191,15 +191,15 @@ static TIMER_CALLBACK( setirq_callback )
break;
}
cpunum = mame_find_cpu_index(machine, CPUTAG_T5182);
cpu = cputag_get_cpu(machine, CPUTAG_T5182);
if (cpunum == -1)
if (cpu == NULL)
return;
if (irqstate == 0) /* no IRQs pending */
cpu_set_input_line(machine->cpu[cpunum],0,CLEAR_LINE);
cpu_set_input_line(cpu,0,CLEAR_LINE);
else /* IRQ pending */
cpu_set_input_line(machine->cpu[cpunum],0,ASSERT_LINE);
cpu_set_input_line(cpu,0,ASSERT_LINE);
}

2
src/mame/drivers/atarisy1.c
View File

@ -170,7 +170,7 @@ static MACHINE_RESET( atarisy1 )
atarigen_eeprom_reset();
atarigen_slapstic_reset();
atarigen_interrupt_reset(update_interrupts);
atarigen_sound_io_reset(1);
atarigen_sound_io_reset(machine->cpu[1]);
/* reset the joystick parameters */
joystick_value = 0;

4
src/mame/drivers/atarisy2.c
View File

@ -261,7 +261,7 @@ static MACHINE_RESET( atarisy2 )
atarigen_eeprom_reset();
slapstic_reset();
atarigen_interrupt_reset(update_interrupts);
atarigen_sound_io_reset(1);
atarigen_sound_io_reset(machine->cpu[1]);
atarigen_scanline_timer_reset(machine->primary_screen, scanline_update, 64);
memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), atarisy2_direct_handler);
@ -629,7 +629,7 @@ static WRITE8_HANDLER( sound_reset_w )
return;
/* a large number of signals are reset when this happens */
atarigen_sound_io_reset(1);
atarigen_sound_io_reset(space->machine->cpu[1]);
sndti_reset(SOUND_YM2151, 0);
mixer_w(space, 0, 0);
tms5220_data = 0;

4
src/mame/drivers/badlands.c
View File

@ -145,7 +145,7 @@ static MACHINE_RESET( badlands )
atarigen_interrupt_reset(update_interrupts);
atarigen_scanline_timer_reset(machine->primary_screen, scanline_update, 32);
atarigen_sound_io_reset(1);
atarigen_sound_io_reset(machine->cpu[1]);
memcpy(bank_base, &bank_source_data[0x0000], 0x1000);
}
@ -628,7 +628,7 @@ static MACHINE_RESET( badlandb )
atarigen_interrupt_reset(update_interrupts_bootleg);
atarigen_scanline_timer_reset(machine->primary_screen, scanline_update_bootleg, 32);
// atarigen_sound_io_reset(1);
// atarigen_sound_io_reset(machine->cpu[1]);
// memcpy(bank_base, &bank_source_data[0x0000], 0x1000);
}

6
src/mame/drivers/champbas.c
View File

@ -171,14 +171,14 @@ static WRITE8_HANDLER( champbas_mcu_switch_w )
static WRITE8_HANDLER( champbas_mcu_halt_w )
{
int cpunum = mame_find_cpu_index(space->machine, CPUTAG_MCU);
const device_config *cpu = cputag_get_cpu(space->machine, CPUTAG_MCU);
// MCU not present/not used in champbas
if (cpunum == -1)
if (cpu == NULL)
return;
data &= 1;
cpu_set_input_line(space->machine->cpu[cpunum], INPUT_LINE_HALT, data ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(cpu, INPUT_LINE_HALT, data ? ASSERT_LINE : CLEAR_LINE);
}

2
src/mame/drivers/cyberbal.c
View File

@ -47,7 +47,7 @@ static MACHINE_RESET( cyberbal )
atarigen_slapstic_reset();
atarigen_interrupt_reset(update_interrupts);
atarigen_scanline_timer_reset(machine->primary_screen, cyberbal_scanline_update, 8);
atarigen_sound_io_reset(1);
atarigen_sound_io_reset(machine->cpu[1]);
cyberbal_sound_reset(machine);

9
src/mame/drivers/ddragon.c
View File

@ -100,7 +100,8 @@ static emu_timer *scanline_timer;
/* private globals */
static UINT8 dd_sub_cpu_busy;
static UINT8 sprite_irq, sound_irq, ym_irq, snd_cpu;
static UINT8 sprite_irq, sound_irq, ym_irq;
static const device_config *snd_cpu;
static UINT32 adpcm_pos[2], adpcm_end[2];
static UINT8 adpcm_idle[2];
static int adpcm_data[2];
@ -182,7 +183,7 @@ static MACHINE_START( ddragon )
scanline_timer = timer_alloc(machine, ddragon_scanline_callback, NULL);
/* determine the sound CPU index */
snd_cpu = mame_find_cpu_index(machine, "sound");
snd_cpu = cputag_get_cpu(machine, "sound");
/* register for save states */
state_save_register_global(machine, dd_sub_cpu_busy);
@ -331,7 +332,7 @@ static WRITE8_HANDLER( ddragon_interrupt_w )
case 3: /* 380e - SND irq */
soundlatch_w(space, 0, data);
cpu_set_input_line(space->machine->cpu[snd_cpu], sound_irq, (sound_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
cpu_set_input_line(snd_cpu, sound_irq, (sound_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
break;
case 4: /* 380f - ? */
@ -355,7 +356,7 @@ static WRITE8_HANDLER( ddragon2_sub_irq_w )
static void irq_handler(running_machine *machine, int irq)
{
cpu_set_input_line(machine->cpu[snd_cpu], ym_irq , irq ? ASSERT_LINE : CLEAR_LINE );
cpu_set_input_line(snd_cpu, ym_irq , irq ? ASSERT_LINE : CLEAR_LINE );
}

2
src/mame/drivers/gauntlet.c
View File

@ -173,7 +173,7 @@ static MACHINE_RESET( gauntlet )
atarigen_slapstic_reset();
atarigen_interrupt_reset(update_interrupts);
atarigen_scanline_timer_reset(machine->primary_screen, scanline_update, 32);
atarigen_sound_io_reset(1);
atarigen_sound_io_reset(machine->cpu[1]);
}

16
src/mame/drivers/m72.c
View File

@ -321,20 +321,20 @@ static READ8_HANDLER( m72_snd_cpu_sample_r )
INLINE DRIVER_INIT( loht_mcu )
{
int cpunum = mame_find_cpu_index(machine, "main");
int sndnum = mame_find_cpu_index(machine, "sound");
const device_config *cpu = cputag_get_cpu(machine, "main");
const device_config *sndcpu = cputag_get_cpu(machine, "sound");
protection_ram = auto_malloc(0x10000);
memory_install_read16_handler(cpu_get_address_space(machine->cpu[cpunum], ADDRESS_SPACE_PROGRAM), 0xb0000, 0xbffff, 0, 0, SMH_BANK1);
memory_install_write16_handler(cpu_get_address_space(machine->cpu[cpunum], ADDRESS_SPACE_PROGRAM), 0xb0000, 0xb0fff, 0, 0, m72_main_mcu_w);
memory_install_read16_handler(cpu_get_address_space(cpu, ADDRESS_SPACE_PROGRAM), 0xb0000, 0xbffff, 0, 0, SMH_BANK1);
memory_install_write16_handler(cpu_get_address_space(cpu, ADDRESS_SPACE_PROGRAM), 0xb0000, 0xb0fff, 0, 0, m72_main_mcu_w);
memory_set_bankptr(machine, 1, protection_ram);
//memory_install_write16_handler(cpu_get_address_space(machine->cpu[cpunum], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, loht_sample_trigger_w);
memory_install_write16_handler(cpu_get_address_space(machine->cpu[cpunum], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, m72_main_mcu_sound_w);
//memory_install_write16_handler(cpu_get_address_space(cpu, ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, loht_sample_trigger_w);
memory_install_write16_handler(cpu_get_address_space(cpu, ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, m72_main_mcu_sound_w);
/* sound cpu */
memory_install_write8_handler(cpu_get_address_space(machine->cpu[sndnum], ADDRESS_SPACE_IO), 0x82, 0x82, 0xff, 0, m72_snd_cpu_sample_w);
memory_install_read8_handler (cpu_get_address_space(machine->cpu[sndnum], ADDRESS_SPACE_IO), 0x84, 0x84, 0xff, 0, m72_snd_cpu_sample_r);
memory_install_write8_handler(cpu_get_address_space(sndcpu, ADDRESS_SPACE_IO), 0x82, 0x82, 0xff, 0, m72_snd_cpu_sample_w);
memory_install_read8_handler (cpu_get_address_space(sndcpu, ADDRESS_SPACE_IO), 0x84, 0x84, 0xff, 0, m72_snd_cpu_sample_r);
#if 0
/* running the mcu at twice the speed, the following

90
src/mame/drivers/megadriv.c
View File

@ -98,8 +98,8 @@ static int megadrive_irq6_pending = 0;
static int megadrive_irq4_pending = 0;
/* 32x! */
static int _32x_master_cpu_number;
static int _32x_slave_cpu_number;
static const device_config *_32x_master_cpu;
static const device_config *_32x_slave_cpu;
static int _32x_is_connected;
static int sh2_are_running;
@ -132,12 +132,12 @@ static UINT16 *_32x_display_dram, *_32x_access_dram;
static UINT16* _32x_palette;
static UINT16* _32x_palette_lookup;
/* SegaCD! */
static int _segacd_68k_cpu_number;
static const device_config *_segacd_68k_cpu;
/* SVP (virtua racing) */
static int _svp_cpu_number;
static const device_config *_svp_cpu;
static int _genesis_snd_z80_cpu_number;
static const device_config *_genesis_snd_z80_cpu;
int segac2_bg_pal_lookup[4];
int segac2_sp_pal_lookup[4];
@ -2734,8 +2734,8 @@ static WRITE16_HANDLER( _32x_68k_a15100_w )
if (data & 0x02)
{
cpu_set_input_line(space->machine->cpu[_32x_master_cpu_number], INPUT_LINE_RESET, CLEAR_LINE);
cpu_set_input_line(space->machine->cpu[_32x_slave_cpu_number], INPUT_LINE_RESET, CLEAR_LINE);
cpu_set_input_line(_32x_master_cpu, INPUT_LINE_RESET, CLEAR_LINE);
cpu_set_input_line(_32x_slave_cpu, INPUT_LINE_RESET, CLEAR_LINE);
}
if (data & 0x01)
@ -2805,12 +2805,12 @@ static WRITE16_HANDLER( _32x_68k_a15102_w )
if (data&0x1)
{
if (sh2_master_cmdint_enable) cpu_set_input_line(space->machine->cpu[_32x_master_cpu_number],SH2_CINT_IRQ_LEVEL,ASSERT_LINE);
if (sh2_master_cmdint_enable) cpu_set_input_line(_32x_master_cpu,SH2_CINT_IRQ_LEVEL,ASSERT_LINE);
}
if (data&0x2)
{
if (sh2_slave_cmdint_enable) cpu_set_input_line(space->machine->cpu[_32x_slave_cpu_number],SH2_CINT_IRQ_LEVEL,ASSERT_LINE);
if (sh2_slave_cmdint_enable) cpu_set_input_line(_32x_slave_cpu,SH2_CINT_IRQ_LEVEL,ASSERT_LINE);
}
}
}
@ -3228,40 +3228,40 @@ static WRITE16_HANDLER( _32x_sh2_common_4002_w )
// VRES (md reset button interrupt) clear
/**********************************************************************************************/
static WRITE16_HANDLER( _32x_sh2_master_4014_w ){cpu_set_input_line(space->machine->cpu[_32x_master_cpu_number],SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_slave_4014_w ) { cpu_set_input_line(space->machine->cpu[_32x_slave_cpu_number], SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_master_4014_w ){cpu_set_input_line(_32x_master_cpu,SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_slave_4014_w ) { cpu_set_input_line(_32x_slave_cpu, SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
/**********************************************************************************************/
// SH2 side 4016
// VINT (vertical interrupt) clear
/**********************************************************************************************/
static WRITE16_HANDLER( _32x_sh2_master_4016_w ){cpu_set_input_line(space->machine->cpu[_32x_master_cpu_number],SH2_VINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_slave_4016_w ) { cpu_set_input_line(space->machine->cpu[_32x_slave_cpu_number], SH2_VINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_master_4016_w ){cpu_set_input_line(_32x_master_cpu,SH2_VINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_slave_4016_w ) { cpu_set_input_line(_32x_slave_cpu, SH2_VINT_IRQ_LEVEL,CLEAR_LINE);}
/**********************************************************************************************/
// SH2 side 4018
// HINT (horizontal interrupt) clear
/**********************************************************************************************/
static WRITE16_HANDLER( _32x_sh2_master_4018_w ){ cpu_set_input_line(space->machine->cpu[_32x_master_cpu_number],SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_slave_4018_w ) { cpu_set_input_line(space->machine->cpu[_32x_slave_cpu_number], SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_master_4018_w ){ cpu_set_input_line(_32x_master_cpu,SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_slave_4018_w ) { cpu_set_input_line(_32x_slave_cpu, SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
/**********************************************************************************************/
// SH2 side 401A
// HINT (control register interrupt) clear
/**********************************************************************************************/
static WRITE16_HANDLER( _32x_sh2_master_401a_w ){ cpu_set_input_line(space->machine->cpu[_32x_master_cpu_number],SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_slave_401a_w ) { cpu_set_input_line(space->machine->cpu[_32x_slave_cpu_number], SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_master_401a_w ){ cpu_set_input_line(_32x_master_cpu,SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_slave_401a_w ) { cpu_set_input_line(_32x_slave_cpu, SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
/**********************************************************************************************/
// SH2 side 401C
// PINT (PWM timer interrupt) clear
/**********************************************************************************************/
static WRITE16_HANDLER( _32x_sh2_master_401c_w ){ cpu_set_input_line(space->machine->cpu[_32x_master_cpu_number],SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_slave_401c_w ) { cpu_set_input_line(space->machine->cpu[_32x_slave_cpu_number], SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_master_401c_w ){ cpu_set_input_line(_32x_master_cpu,SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
static WRITE16_HANDLER( _32x_sh2_slave_401c_w ) { cpu_set_input_line(_32x_slave_cpu, SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
/**********************************************************************************************/
// SH2 side 401E
@ -5925,8 +5925,8 @@ static TIMER_CALLBACK( scanline_timer_callback )
// 32x interrupt!
if (_32x_is_connected)
{
if (sh2_master_vint_enable) cpu_set_input_line(machine->cpu[_32x_master_cpu_number],SH2_VINT_IRQ_LEVEL,ASSERT_LINE);
if (sh2_slave_vint_enable) cpu_set_input_line(machine->cpu[_32x_slave_cpu_number],SH2_VINT_IRQ_LEVEL,ASSERT_LINE);
if (sh2_master_vint_enable) cpu_set_input_line(_32x_master_cpu,SH2_VINT_IRQ_LEVEL,ASSERT_LINE);
if (sh2_slave_vint_enable) cpu_set_input_line(_32x_slave_cpu,SH2_VINT_IRQ_LEVEL,ASSERT_LINE);
}
}
@ -6094,20 +6094,20 @@ MACHINE_RESET( megadriv )
/* if any of these extra CPUs exist, pause them until we actually turn them on */
if (_32x_master_cpu_number != -1)
if (_32x_master_cpu != NULL)
{
cpu_set_input_line(machine->cpu[_32x_master_cpu_number], INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(_32x_master_cpu, INPUT_LINE_RESET, ASSERT_LINE);
}
if (_32x_slave_cpu_number != -1)
if (_32x_slave_cpu != NULL)
{
cpu_set_input_line(machine->cpu[_32x_slave_cpu_number], INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(_32x_slave_cpu, INPUT_LINE_RESET, ASSERT_LINE);
}
if (_segacd_68k_cpu_number != -1 )
if (_segacd_68k_cpu != NULL )
{
cpu_set_input_line(machine->cpu[_segacd_68k_cpu_number], INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(machine->cpu[_segacd_68k_cpu_number], INPUT_LINE_HALT, ASSERT_LINE);
cpu_set_input_line(_segacd_68k_cpu, INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(_segacd_68k_cpu, INPUT_LINE_HALT, ASSERT_LINE);
}
}
@ -6429,10 +6429,10 @@ static int megadriv_tas_callback(const device_config *device)
static void megadriv_init_common(running_machine *machine)
{
/* Look to see if this system has the standard Sound Z80 */
_genesis_snd_z80_cpu_number = mame_find_cpu_index(machine, "genesis_snd_z80");
if (_genesis_snd_z80_cpu_number != -1)
_genesis_snd_z80_cpu = cputag_get_cpu(machine, "genesis_snd_z80");
if (_genesis_snd_z80_cpu != NULL)
{
printf("GENESIS Sound Z80 cpu found %d\n", _genesis_snd_z80_cpu_number );
printf("GENESIS Sound Z80 cpu found %d\n", cpu_get_index(_genesis_snd_z80_cpu) );
genesis_has_z80 = 1;
}
else
@ -6441,20 +6441,20 @@ static void megadriv_init_common(running_machine *machine)
}
/* Look to see if this system has the 32x Master SH2 */
_32x_master_cpu_number = mame_find_cpu_index(machine, "32x_master_sh2");
if (_32x_master_cpu_number != -1)
_32x_master_cpu = cputag_get_cpu(machine, "32x_master_sh2");
if (_32x_master_cpu != NULL)
{
printf("32x MASTER SH2 cpu found %d\n", _32x_master_cpu_number );
printf("32x MASTER SH2 cpu found %d\n", cpu_get_index(_32x_master_cpu) );
}
/* Look to see if this system has the 32x Slave SH2 */
_32x_slave_cpu_number = mame_find_cpu_index(machine, "32x_slave_sh2");
if (_32x_slave_cpu_number != -1)
_32x_slave_cpu = cputag_get_cpu(machine, "32x_slave_sh2");
if (_32x_slave_cpu != NULL)
{
printf("32x SLAVE SH2 cpu found %d\n", _32x_slave_cpu_number );
printf("32x SLAVE SH2 cpu found %d\n", cpu_get_index(_32x_slave_cpu) );
}
if ((_32x_master_cpu_number != -1) && (_32x_slave_cpu_number != -1))
if ((_32x_master_cpu != NULL) && (_32x_slave_cpu != NULL))
{
_32x_is_connected = 1;
}
@ -6463,16 +6463,16 @@ static void megadriv_init_common(running_machine *machine)
_32x_is_connected = 0;
}
_segacd_68k_cpu_number = mame_find_cpu_index(machine, "segacd_68k");
if (_segacd_68k_cpu_number != -1)
_segacd_68k_cpu = cputag_get_cpu(machine, "segacd_68k");
if (_segacd_68k_cpu != NULL)
{
printf("Sega CD secondary 68k cpu found %d\n", _segacd_68k_cpu_number );
printf("Sega CD secondary 68k cpu found %d\n", cpu_get_index(_segacd_68k_cpu) );
}
_svp_cpu_number = mame_find_cpu_index(machine, "svp");
if (_svp_cpu_number != -1)
_svp_cpu = cputag_get_cpu(machine, "svp");
if (_svp_cpu != NULL)
{
printf("SVP (cpu) found %d\n", _svp_cpu_number );
printf("SVP (cpu) found %d\n", cpu_get_index(_svp_cpu) );
}
@ -6524,7 +6524,7 @@ static void megadriv_init_common(running_machine *machine)
}
/* if we have an SVP cpu then do some extra initilization for it */
if (_svp_cpu_number != -1)
if (_svp_cpu != NULL)
{
svp_init(machine);
}

2
src/mame/drivers/segahang.c
View File

@ -102,7 +102,7 @@ static void hangon_generic_init(void)
static TIMER_CALLBACK( suspend_i8751 )
{
cpu_suspend(machine->cpu[mame_find_cpu_index(machine, "mcu")], SUSPEND_REASON_DISABLE, 1);
cputag_suspend(machine, "mcu", SUSPEND_REASON_DISABLE, 1);
}

2
src/mame/drivers/segas16a.c
View File

@ -230,7 +230,7 @@ static void system16a_generic_init(running_machine *machine)
static TIMER_CALLBACK( suspend_i8751 )
{
cpu_suspend(machine->cpu[mame_find_cpu_index(machine, "mcu")], SUSPEND_REASON_DISABLE, 1);
cputag_suspend(machine, "mcu", SUSPEND_REASON_DISABLE, 1);
}

2
src/mame/drivers/segas16b.c
View File

@ -1070,7 +1070,7 @@ static void system16b_generic_init(running_machine *machine, int _rom_board)
disable_screen_blanking = 0;
/* see if we have a sound CPU and a UPD7759 chip */
has_sound_cpu = (mame_find_cpu_index(machine, "sound") != -1);
has_sound_cpu = (cputag_get_cpu(machine, "sound") != NULL);
}

2
src/mame/drivers/segas24.c
View File

@ -710,7 +710,7 @@ static void reset_reset(running_machine *machine)
static void resetcontrol_w(const address_space *space, UINT8 data)
{
resetcontrol = data;
logerror("Reset control %02x ('%s':%x)\n", resetcontrol, space->cpu, cpu_get_pc(space->cpu));
logerror("Reset control %02x ('%s':%x)\n", resetcontrol, space->cpu->tag, cpu_get_pc(space->cpu));
reset_reset(space->machine);
}

6
src/mame/drivers/vegas.c
View File

@ -537,9 +537,9 @@ static MACHINE_START( vegas )
timer[3] = timer_alloc(machine, nile_timer_callback, NULL);
/* identify our sound board */
if (mame_find_cpu_index(machine, "dsio") != -1)
if (cputag_get_cpu(machine, "dsio") != NULL)
dcs_idma_cs = 6;
else if (mame_find_cpu_index(machine, "denver") != -1)
else if (cputag_get_cpu(machine, "denver") != NULL)
dcs_idma_cs = 7;
else
dcs_idma_cs = 0;
@ -586,7 +586,7 @@ static MACHINE_RESET( vegas )
memset(pci_3dfx_regs, 0, sizeof(pci_3dfx_regs));
/* reset the DCS system if we have one */
if (mame_find_cpu_index(machine, "dcs2") != -1 || mame_find_cpu_index(machine, "dsio") != -1 || mame_find_cpu_index(machine, "denver") != -1)
if (cputag_get_cpu(machine, "dcs2") != NULL || cputag_get_cpu(machine, "dsio") != NULL || cputag_get_cpu(machine, "denver") != NULL)
{
dcs_reset_w(1);
dcs_reset_w(0);

12
src/mame/machine/asic65.c
View File

@ -31,7 +31,7 @@ static struct _asic65_t
UINT8 last_bank;
/* ROM-based interface states */
UINT8 cpunum;
const device_config *cpu;
UINT8 tfull;
UINT8 _68full;
UINT8 cmd;
@ -132,7 +132,7 @@ void asic65_config(running_machine *machine, int asictype)
asic65.type = asictype;
asic65.yorigin = 0x1800;
if (asic65.type == ASIC65_ROMBASED)
asic65.cpunum = mame_find_cpu_index(machine, "asic65");
asic65.cpu = cputag_get_cpu(machine, "asic65");
}
@ -149,12 +149,12 @@ void asic65_reset(running_machine *machine, int state)
/* rom-based means reset and clear states */
if (asic65.type == ASIC65_ROMBASED)
cpu_set_input_line(machine->cpu[asic65.cpunum], INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(asic65.cpu, INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
/* otherwise, do it manually */
else
{
cpu_suspend(machine->cpu[mame_find_cpu_index(machine, "asic65")], SUSPEND_REASON_DISABLE, 1);
cputag_suspend(machine, "asic65", SUSPEND_REASON_DISABLE, 1);
/* if reset is being signalled, clear everything */
if (state && !asic65.reset_state)
@ -185,7 +185,7 @@ static TIMER_CALLBACK( m68k_asic65_deferred_w )
asic65.tfull = 1;
asic65.cmd = param >> 16;
asic65.tdata = param;
cpu_set_input_line(machine->cpu[asic65.cpunum], 0, ASSERT_LINE);
cpu_set_input_line(asic65.cpu, 0, ASSERT_LINE);
}
@ -482,7 +482,7 @@ static WRITE16_HANDLER( asic65_68k_w )
static READ16_HANDLER( asic65_68k_r )
{
asic65.tfull = 0;
cpu_set_input_line(space->machine->cpu[asic65.cpunum], 0, CLEAR_LINE);
cpu_set_input_line(asic65.cpu, 0, CLEAR_LINE);
return asic65.tdata;
}

21
src/mame/machine/atarigen.c
View File

@ -77,7 +77,7 @@ static offs_t atarigen_slapstic_last_address;
static offs_t atarigen_slapstic_base;
static offs_t atarigen_slapstic_mirror;
static UINT8 sound_cpu_num;
static const device_config * sound_cpu;
static UINT8 atarigen_cpu_to_sound;
static UINT8 atarigen_sound_to_cpu;
static UINT8 timed_int;
@ -617,10 +617,10 @@ READ16_HANDLER( atarigen_slapstic_r )
atarigen_sound_io_reset: Resets the state of the sound I/O.
---------------------------------------------------------------*/
void atarigen_sound_io_reset(int cpu_num)
void atarigen_sound_io_reset(const device_config *device)
{
/* remember which CPU is the sound CPU */
sound_cpu_num = cpu_num;
sound_cpu = device;
/* reset the internal interrupts states */
timed_int = ym2151_int = 0;
@ -770,7 +770,7 @@ WRITE8_HANDLER( atarigen_6502_sound_w )
READ8_HANDLER( atarigen_6502_sound_r )
{
atarigen_cpu_to_sound_ready = 0;
cpu_set_input_line(space->machine->cpu[sound_cpu_num], INPUT_LINE_NMI, CLEAR_LINE);
cpu_set_input_line(sound_cpu, INPUT_LINE_NMI, CLEAR_LINE);
return atarigen_cpu_to_sound;
}
@ -785,9 +785,9 @@ READ8_HANDLER( atarigen_6502_sound_r )
static void update_6502_irq(running_machine *machine)
{
if (timed_int || ym2151_int)
cpu_set_input_line(machine->cpu[sound_cpu_num], M6502_IRQ_LINE, ASSERT_LINE);
cpu_set_input_line(sound_cpu, M6502_IRQ_LINE, ASSERT_LINE);
else
cpu_set_input_line(machine->cpu[sound_cpu_num], M6502_IRQ_LINE, CLEAR_LINE);
cpu_set_input_line(sound_cpu, M6502_IRQ_LINE, CLEAR_LINE);
}
@ -798,13 +798,13 @@ static void update_6502_irq(running_machine *machine)
static TIMER_CALLBACK( delayed_sound_reset )
{
const address_space *space = cpu_get_address_space(machine->cpu[sound_cpu_num], ADDRESS_SPACE_PROGRAM);
const address_space *space = cpu_get_address_space(sound_cpu, ADDRESS_SPACE_PROGRAM);
/* unhalt and reset the sound CPU */
if (param == 0)
{
cpu_set_input_line(machine->cpu[sound_cpu_num], INPUT_LINE_HALT, CLEAR_LINE);
cpu_set_input_line(machine->cpu[sound_cpu_num], INPUT_LINE_RESET, PULSE_LINE);
cpu_set_input_line(sound_cpu, INPUT_LINE_HALT, CLEAR_LINE);
cpu_set_input_line(sound_cpu, INPUT_LINE_RESET, PULSE_LINE);
}
/* reset the sound write state */
@ -831,7 +831,7 @@ static TIMER_CALLBACK( delayed_sound_w )
/* set up the states and signal an NMI to the sound CPU */
atarigen_cpu_to_sound = param;
atarigen_cpu_to_sound_ready = 1;
cpu_set_input_line(machine->cpu[sound_cpu_num], INPUT_LINE_NMI, ASSERT_LINE);
cpu_set_input_line(sound_cpu, INPUT_LINE_NMI, ASSERT_LINE);
/* allocate a high frequency timer until a response is generated */
/* the main CPU is *very* sensistive to the timing of the response */
@ -1670,7 +1670,6 @@ void atarigen_init_save_state(running_machine *machine)
state_save_register_global(machine, atarigen_slapstic_last_pc);
state_save_register_global(machine, atarigen_slapstic_last_address);
state_save_register_global(machine, sound_cpu_num);
state_save_register_global(machine, atarigen_cpu_to_sound);
state_save_register_global(machine, atarigen_sound_to_cpu);
state_save_register_global(machine, timed_int);

2
src/mame/machine/atarigen.h
View File

@ -145,7 +145,7 @@ READ16_HANDLER( atarigen_slapstic_r );
SOUND I/O
---------------------------------------------------------------*/
void atarigen_sound_io_reset(int cpu_num);
void atarigen_sound_io_reset(const device_config *device);
INTERRUPT_GEN( atarigen_6502_irq_gen );
READ8_HANDLER( atarigen_6502_irq_ack_r );

33
src/mame/machine/namco50.c
View File

@ -254,68 +254,69 @@ ADDRESS_MAP_END
static TIMER_CALLBACK( namco_50xx_irq_clear )
{
cpu_set_input_line(machine->cpu[param], 0, CLEAR_LINE);
const device_config *cpu = ptr;
cpu_set_input_line(cpu, 0, CLEAR_LINE);
}
static void namco_50xx_irq_set(running_machine *machine, int cpunum)
static void namco_50xx_irq_set(const device_config *cpu)
{
cpu_set_input_line(machine->cpu[cpunum], 0, ASSERT_LINE);
cpu_set_input_line(cpu, 0, ASSERT_LINE);
// The execution time of one instruction is ~4us, so we must make sure to
// give the cpu time to poll the /IRQ input before we clear it.
// The input clock to the 06XX interface chip is 64H, that is
// 18432000/6/64 = 48kHz, so it makes sense for the irq line to be
// asserted for one clock cycle ~= 21us.
timer_set(machine, ATTOTIME_IN_USEC(21), NULL, cpunum, namco_50xx_irq_clear);
timer_set(cpu->machine, ATTOTIME_IN_USEC(21), (void *)cpu, 0, namco_50xx_irq_clear);
}
void namco_50xx_write(running_machine *machine, UINT8 data)
{
int cpunum = mame_find_cpu_index(machine, CPUTAG_50XX);
const device_config *cpu = cputag_get_cpu(machine, CPUTAG_50XX);
if (cpunum == -1)
if (cpu == NULL)
return;
timer_call_after_resynch(machine, NULL, data, namco_50xx_latch_callback);
namco_50xx_irq_set(machine, cpunum);
namco_50xx_irq_set(cpu);
}
void namco_50xx_2_write(running_machine *machine, UINT8 data)
{
int cpunum = mame_find_cpu_index(machine, CPUTAG_50XX_2);
const device_config *cpu = cputag_get_cpu(machine, CPUTAG_50XX_2);
if (cpunum == -1)
if (cpu == NULL)
return;
timer_call_after_resynch(machine, NULL, data, namco_50xx_2_latch_callback);
namco_50xx_irq_set(machine, cpunum);
namco_50xx_irq_set(cpu);
}
void namco_50xx_read_request(running_machine *machine)
{
int cpunum = mame_find_cpu_index(machine, CPUTAG_50XX);
const device_config *cpu = cputag_get_cpu(machine, CPUTAG_50XX);
if (cpunum == -1)
if (cpu == NULL)
return;
timer_call_after_resynch(machine, NULL, 0, namco_50xx_readrequest_callback);
namco_50xx_irq_set(machine, cpunum);
namco_50xx_irq_set(cpu);
}
void namco_50xx_2_read_request(running_machine *machine)
{
int cpunum = mame_find_cpu_index(machine, CPUTAG_50XX_2);
const device_config *cpu = cputag_get_cpu(machine, CPUTAG_50XX_2);
if (cpunum == -1)
if (cpu == NULL)
return;
timer_call_after_resynch(machine, NULL, 0, namco_50xx_2_readrequest_callback);
namco_50xx_irq_set(machine, cpunum);
namco_50xx_irq_set(cpu);
}