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m72.cpp: Overhaul V30/8751 comms using DPRAM and GENERIC_LATCH_8 (nw)

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This commit is contained in:
AJR 2018-08-02 14:50:06 -04:00
parent a4d28396bf
commit f8a26df4ad
2 changed files with 52 additions and 81 deletions
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123
src/mame/drivers/m72.cpp
View File

@ -226,7 +226,7 @@ TIMER_CALLBACK_MEMBER(m72_state::synch_callback)
void m72_state::machine_reset()
{
m_mcu_sample_addr = 0;
m_mcu_snd_cmd_latch = 0;
//m_mcu_snd_cmd_latch = 0;
m_scanline_timer->adjust(m_screen->time_until_pos(0));
machine().scheduler().synchronize(timer_expired_delegate(FUNC(m72_state::synch_callback),this));
@ -306,76 +306,45 @@ The protection device does
TIMER_CALLBACK_MEMBER(m72_state::delayed_ram16_w)
{
uint16_t val = ((uint32_t) param) & 0xffff;
uint16_t offset = (((uint32_t) param) >> 16) & 0xffff;
uint16_t *ram = (uint16_t *)ptr;
uint16_t val = param & 0xffff;
uint16_t offset = (param >> 16) & 0x07ff;
uint16_t mem_mask = (BIT(param, 28) ? 0xff00 : 0x0000) | (BIT(param, 27) ? 0x00ff : 0x0000);
ram[offset] = val;
logerror("MB8421/MB8431 left_w(0x%03x, 0x%04x, 0x%04x)\n", offset, val, mem_mask);
m_dpram->left_w(machine().dummy_space(), offset, val, mem_mask);
}
WRITE16_MEMBER(m72_state::main_mcu_sound_w)
TIMER_CALLBACK_MEMBER(m72_state::delayed_ram8_w)
{
if (data & 0xfff0)
logerror("sound_w: %04x %04x\n", mem_mask, data);
uint8_t val = param & 0xff;
uint16_t offset = (param >> 9) & 0x07ff;
if (ACCESSING_BITS_0_7)
{
m_mcu_snd_cmd_latch = data;
m_mcu->set_input_line(1, ASSERT_LINE);
}
if (BIT(param, 8))
m_dpram->right_w(machine().dummy_space(), offset, val << 8, 0xff00);
else
m_dpram->right_w(machine().dummy_space(), offset, val, 0x00ff);
}
WRITE16_MEMBER(m72_state::main_mcu_w)
{
uint16_t val = m_protection_ram[offset];
COMBINE_DATA(&val);
/* 0x07fe is used for synchronization as well.
* This address however will not trigger an interrupt
*/
if (offset == 0x0fff/2 && ACCESSING_BITS_8_15)
{
m_protection_ram[offset] = val;
m_mcu->set_input_line(0, ASSERT_LINE);
/* Line driven, most likely by write line */
//machine().scheduler().timer_set(m_mcu->cycles_to_attotime(2), FUNC(mcu_irq0_clear));
//machine().scheduler().timer_set(m_mcu->cycles_to_attotime(0), FUNC(mcu_irq0_raise));
}
else
machine().scheduler().synchronize( timer_expired_delegate(FUNC(m72_state::delayed_ram16_w),this), (offset<<16) | val, m_protection_ram.get());
machine().scheduler().synchronize(timer_expired_delegate(FUNC(m72_state::delayed_ram16_w), this), offset << 16 | data | (mem_mask & 0x0180) << 20);
}
WRITE8_MEMBER(m72_state::mcu_data_w)
{
uint16_t val;
if (offset&1) val = (m_protection_ram[offset/2] & 0x00ff) | (data << 8);
else val = (m_protection_ram[offset/2] & 0xff00) | (data&0xff);
machine().scheduler().synchronize( timer_expired_delegate(FUNC(m72_state::delayed_ram16_w),this), ((offset >>1 ) << 16) | val, m_protection_ram.get());
machine().scheduler().synchronize(timer_expired_delegate(FUNC(m72_state::delayed_ram8_w), this), offset << 8 | uint32_t(data));
}
READ8_MEMBER(m72_state::mcu_data_r)
{
uint8_t ret;
if (offset == 0x0fff || offset == 0x0ffe)
{
m_mcu->set_input_line(0, CLEAR_LINE);
}
if (offset&1) ret = (m_protection_ram[offset/2] & 0xff00)>>8;
else ret = (m_protection_ram[offset/2] & 0x00ff);
return ret;
return (m_dpram->right_r(space, offset >> 1) >> (BIT(offset, 0) ? 8 : 0)) & 0xff;
}
INTERRUPT_GEN_MEMBER(m72_state::mcu_int)
{
//m_mcu_snd_cmd_latch |= 0x11; /* 0x10 is special as well - FIXME */
m_mcu_snd_cmd_latch = 0x11;// | (machine().rand() & 1); /* 0x10 is special as well - FIXME */
//m_mcu_snd_cmd_latch = 0x11;// | (machine().rand() & 1); /* 0x10 is special as well - FIXME */
device.execute().set_input_line(1, ASSERT_LINE);
}
@ -386,17 +355,6 @@ READ8_MEMBER(m72_state::mcu_sample_r)
return sample;
}
WRITE8_MEMBER(m72_state::mcu_ack_w)
{
m_mcu->set_input_line(1, CLEAR_LINE);
m_mcu_snd_cmd_latch = 0;
}
READ8_MEMBER(m72_state::mcu_snd_r)
{
return m_mcu_snd_cmd_latch;
}
WRITE8_MEMBER(m72_state::mcu_port1_w)
{
m_mcu_sample_latch = data;
@ -427,24 +385,11 @@ READ8_MEMBER(m72_state::snd_cpu_sample_r)
void m72_state::init_m72_8751()
{
address_space &program = m_maincpu->space(AS_PROGRAM);
address_space &io = m_maincpu->space(AS_IO);
address_space &sndio = m_soundcpu->space(AS_IO);
m_protection_ram = std::make_unique<uint16_t[]>(0x10000/2);
program.install_read_bank(0xb0000, 0xbffff, "bank1");
program.install_write_handler(0xb0000, 0xb0fff, write16_delegate(FUNC(m72_state::main_mcu_w),this));
membank("bank1")->configure_entry(0, m_protection_ram.get());
save_pointer(NAME(m_protection_ram), 0x10000/2);
save_item(NAME(m_mcu_sample_latch));
save_item(NAME(m_mcu_sample_addr));
save_item(NAME(m_mcu_snd_cmd_latch));
//io.install_write_handler(0xc0, 0xc1, write16_delegate(FUNC(m72_state::loht_sample_trigger_w),this));
io.install_write_handler(0xc0, 0xc1, write16_delegate(FUNC(m72_state::main_mcu_sound_w),this));
/* sound cpu */
address_space &sndio = m_soundcpu->space(AS_IO);
sndio.install_write_handler(0x82, 0x82, write8_delegate(FUNC(dac_byte_interface::data_w),(dac_byte_interface *)m_dac));
sndio.install_read_handler (0x84, 0x84, read8_delegate(FUNC(m72_state::snd_cpu_sample_r),this));
@ -883,11 +828,18 @@ void m72_state::rtype_map(address_map &map)
map(0x40000, 0x43fff).ram(); /* work RAM */
}
void m72_state::m72_protected_map(address_map &map)
{
m72_map(map);
map(0xb0000, 0xb0fff).r(m_dpram, FUNC(mb8421_mb8431_16_device::left_r)).w(FUNC(m72_state::main_mcu_w));
}
void m72_state::xmultiplm72_map(address_map &map)
{
m72_cpu1_common_map(map);
map(0x00000, 0x7ffff).rom();
map(0x80000, 0x83fff).ram(); /* work RAM */
map(0xb0000, 0xb0fff).r(m_dpram, FUNC(mb8421_mb8431_16_device::left_r)).w(FUNC(m72_state::main_mcu_w));
}
void m72_state::dbreedm72_map(address_map &map)
@ -1004,6 +956,12 @@ void m72_state::m72_portmap(address_map &map)
/* { 0xc0, 0xc0 trigger sample, filled by init_ function */
}
void m72_state::m72_protected_portmap(address_map &map)
{
m72_portmap(map);
map(0xc0, 0xc0).w("mculatch", FUNC(generic_latch_8_device::write));
}
void m72_state::m84_portmap(address_map &map)
{
map(0x00, 0x01).portr("IN0");
@ -1138,7 +1096,7 @@ void m72_state::mcu_io_map(address_map &map)
/* External access */
map(0x0000, 0x0000).rw(FUNC(m72_state::mcu_sample_r), FUNC(m72_state::mcu_low_w));
map(0x0001, 0x0001).w(FUNC(m72_state::mcu_high_w));
map(0x0002, 0x0002).rw(FUNC(m72_state::mcu_snd_r), FUNC(m72_state::mcu_ack_w));
map(0x0002, 0x0002).rw("mculatch", FUNC(generic_latch_8_device::read), FUNC(generic_latch_8_device::acknowledge_w));
/* shared at b0000 - b0fff on the main cpu */
map(0xc000, 0xcfff).rw(FUNC(m72_state::mcu_data_r), FUNC(m72_state::mcu_data_w));
}
@ -1915,12 +1873,23 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START(m72_state::m72_8751)
m72_base(config);
MCFG_DEVICE_MODIFY("maincpu")
MCFG_DEVICE_PROGRAM_MAP(m72_protected_map)
MCFG_DEVICE_IO_MAP(m72_protected_portmap)
MCFG_DEVICE_ADD("mcu",I8751, XTAL(8'000'000)) /* Uses its own XTAL */
MB8421_MB8431_16BIT(config, m_dpram);
//m_dpram->intl_callback().set("upd71059c", FUNC(pic8259_device::ir3_w)); // not actually used?
m_dpram->intr_callback().set_inputline("mcu", MCS51_INT0_LINE);
MCFG_GENERIC_LATCH_8_ADD("mculatch")
MCFG_GENERIC_LATCH_DATA_PENDING_CB(INPUTLINE("mcu", MCS51_INT1_LINE))
MCFG_GENERIC_LATCH_SEPARATE_ACKNOWLEDGE(true)
MCFG_DEVICE_ADD("mcu", I8751, XTAL(8'000'000)) /* Uses its own XTAL */
MCFG_DEVICE_IO_MAP(mcu_io_map)
MCFG_MCS51_PORT_P1_OUT_CB(WRITE8(*this, m72_state, mcu_port1_w))
MCFG_MCS51_PORT_P3_OUT_CB(WRITE8(*this, m72_state, mcu_port3_w))
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", m72_state, mcu_int)
//MCFG_DEVICE_VBLANK_INT_DRIVER("screen", m72_state, mcu_int)
MACHINE_CONFIG_END

10
src/mame/includes/m72.h
View File

@ -12,6 +12,7 @@
#include "audio/m72.h"
#include "sound/dac.h"
#include "machine/mb8421.h"
#include "machine/pic8259.h"
#include "machine/upd4701.h"
#include "emupal.h"
@ -37,6 +38,7 @@ public:
m_maincpu(*this, "maincpu"),
m_soundcpu(*this, "soundcpu"),
m_mcu(*this, "mcu"),
m_dpram(*this, "dpram"),
m_dac(*this, "dac"),
m_audio(*this, "m72"),
m_gfxdecode(*this, "gfxdecode"),
@ -90,6 +92,7 @@ private:
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_soundcpu;
optional_device<cpu_device> m_mcu;
optional_device<mb8421_mb8431_16_device> m_dpram;
optional_device<dac_byte_interface> m_dac;
optional_device<m72_audio_device> m_audio;
required_device<gfxdecode_device> m_gfxdecode;
@ -131,7 +134,6 @@ private:
uint16_t m_m82_tmcontrol;
// m72_i8751 specific
uint8_t m_mcu_snd_cmd_latch;
uint8_t m_mcu_sample_latch;
uint32_t m_mcu_sample_addr;
@ -151,8 +153,6 @@ private:
DECLARE_WRITE8_MEMBER(mcu_data_w);
DECLARE_READ8_MEMBER(mcu_data_r);
DECLARE_READ8_MEMBER(mcu_sample_r);
DECLARE_WRITE8_MEMBER(mcu_ack_w);
DECLARE_READ8_MEMBER(mcu_snd_r);
DECLARE_WRITE8_MEMBER(mcu_port1_w);
DECLARE_WRITE8_MEMBER(mcu_port3_w);
DECLARE_WRITE8_MEMBER(mcu_low_w);
@ -208,7 +208,7 @@ private:
TIMER_CALLBACK_MEMBER(scanline_interrupt);
TIMER_CALLBACK_MEMBER(kengo_scanline_interrupt);
TIMER_CALLBACK_MEMBER(delayed_ram16_w);
TIMER_CALLBACK_MEMBER(delayed_ram8_w);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
uint32_t screen_update_m81(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@ -229,7 +229,9 @@ private:
void kengo_map(address_map &map);
void m72_cpu1_common_map(address_map &map);
void m72_map(address_map &map);
void m72_protected_map(address_map &map);
void m72_portmap(address_map &map);
void m72_protected_portmap(address_map &map);
void m81_cpu1_common_map(address_map &map);
void m81_portmap(address_map &map);
void m82_map(address_map &map);