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i8089: fix small bugs (nw)

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isbc: put fdc by default on 215 board as most real machines would (nw)
This commit is contained in:
cracyc 2014-01-10 23:13:30 +00:00
parent 15b8b419d7
commit f9047310cc
7 changed files with 76 additions and 17 deletions
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16
src/emu/bus/isbx/isbc_218a.c
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@ -106,7 +106,8 @@ void isbc_218a_device::device_start()
void isbc_218a_device::device_reset()
{
m_fdc->reset();
m_reset = false;
m_motor = false;
}
@ -151,7 +152,7 @@ UINT8 isbc_218a_device::mcs1_r(address_space &space, offs_t offset)
switch (offset)
{
case 4: data = m_reset; break;
case 4: data = m_motor; break;
}
return data;
@ -166,11 +167,14 @@ void isbc_218a_device::mcs1_w(address_space &space, offs_t offset, UINT8 data)
{
switch (offset)
{
case 2: m_floppy0->get_device()->mon_w(data & 1); break;
case 4:
if(!(data & 1) && m_reset)
case 2:
if((data & 1) && m_reset)
m_fdc->soft_reset();
m_reset = (data & 1) ? true : false;
m_reset = (data & 1) ? false : true;
break;
case 4:
m_motor = data & 1;
m_floppy0->get_device()->mon_w(!(data & 1));
break;
case 6: m_fdc->tc_w(data & 1); break;
}

2
src/emu/bus/isbx/isbc_218a.h
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@ -59,7 +59,7 @@ private:
void fdc_irq(bool state);
void fdc_drq(bool state);
bool m_reset;
bool m_reset, m_motor;
};

2
src/emu/cpu/i8089/i8089_channel.c
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@ -698,7 +698,7 @@ void i8089_channel::attention()
lpd(PP, CP, m_r[CP].w + 2);
movp_pm(TP, PP, m_r[PP].w);
movbi_mi(CP, (INT8) 0xff, 1);
movbi_mi(CP, (INT8) 0xff, m_r[CP].w + 1);
m_r[TP].t = 1;
m_r[PSW].w |= 1 << 2;

14
src/emu/cpu/i8089/i8089_ops.c
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@ -112,6 +112,7 @@ void i8089_channel::clr(int m, int b, int o)
void i8089_channel::dec_r(int r)
{
m_icount += 3;
set_reg(r, m_r[r].w - 1);
}
@ -173,7 +174,8 @@ void i8089_channel::jnbt(int m, int b, INT16 d, int o)
void i8089_channel::jnz_r(int r, INT16 d)
{
if(m_r[r].w)
m_icount += 5;
if(m_r[r].w & 0xffff)
set_reg(TP, m_r[TP].w + d);
}
@ -191,7 +193,7 @@ void i8089_channel::jnzb(int m, INT16 d, int o)
void i8089_channel::jz_r(int r, INT16 d)
{
if(!m_r[r].w)
if(!(m_r[r].w & 0xffff))
set_reg(TP, m_r[TP].w + d);
}
@ -230,7 +232,7 @@ void i8089_channel::mov_mr(int m, int r, int o)
void i8089_channel::mov_rm(int r, int m, int o)
{
set_reg(r, LWR(m, o));
set_reg(r, (INT32)LWR(m, o), 1);
}
void i8089_channel::mov_mm(int m1, int m2, int o1, int o2)
@ -286,7 +288,7 @@ void i8089_channel::movi_mi(int m, INT16 i, int o)
void i8089_channel::movp_mp(int m, int p, int o)
{
m_iop->write_word(m_r[m].t, o, m_r[p].w & 0xffff);
m_iop->write_byte(m_r[m].t, o + 2, (m_r[p].w >> 12 & 0xf0) | (m_r[p].t << 3));
m_iop->write_byte(m_r[m].t, o + 2, ((m_r[p].w >> 12) & 0xf0) | (m_r[p].t << 3));
}
// move memory to pointer (restore)
@ -295,7 +297,7 @@ void i8089_channel::movp_pm(int p, int m, int o)
UINT16 offset = m_iop->read_word(m_r[m].t, o);
UINT16 segment = m_iop->read_byte(m_r[m].t, o + 2);
set_reg(p, ((segment << 4) + offset) & 0xfffff, segment >> 3 & 0x01);
set_reg(p, (((segment & 0xf0) << 12) + offset) & 0xfffff, segment >> 3 & 0x01);
}
// no operation
@ -315,7 +317,7 @@ void i8089_channel::not_m(int m, int o)
void i8089_channel::not_rm(int r, int m, int o)
{
set_reg(r, ~LWR(m, o));
set_reg(r, ~(INT32)LWR(m, o));
}
void i8089_channel::notb_m(int m, int o)

2
src/mess/drivers/isbc.c
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@ -341,7 +341,7 @@ static MACHINE_CONFIG_START( isbc286, isbc_state )
MCFG_RS232_OUT_DCD_HANDLER(DEVWRITELINE("uart8274", z80dart_device, dcda_w))
MCFG_RS232_OUT_CTS_HANDLER(DEVWRITELINE("uart8274", z80dart_device, ctsa_w))
MCFG_ISBX_SLOT_ADD("sbx1", 0, isbx_cards, "fdc_218a")
MCFG_ISBX_SLOT_ADD("sbx1", 0, isbx_cards, NULL)
MCFG_ISBX_SLOT_MINTR0_CALLBACK(DEVWRITELINE("pic_1", pic8259_device, ir3_w))
MCFG_ISBX_SLOT_MINTR1_CALLBACK(DEVWRITELINE("pic_1", pic8259_device, ir4_w))
MCFG_ISBX_SLOT_ADD("sbx2", 0, isbx_cards, NULL)

47
src/mess/machine/isbc_215g.c
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@ -11,6 +11,8 @@ isbc_215g_device::isbc_215g_device(const machine_config &mconfig, const char *ta
m_dmac(*this, "u84"),
m_hdd0(*this, "drive0"),
m_hdd1(*this, "drive1"),
m_sbx1(*this, "sbx1"),
m_sbx2(*this, "sbx2"),
m_out_irq_func(*this)
{
}
@ -84,6 +86,9 @@ READ16_MEMBER(isbc_215g_device::io_r)
// e: drive req
// f: index latch
data |= (!m_idfound) << 6;
data |= (m_sbx1->get_card_device() ? 0 : 1) << 8;
data |= m_isbx_irq[0] << 9;
data |= m_isbx_irq[1] << 10;
data |= m_index << 15;
break;
case 0x04:
@ -96,6 +101,9 @@ READ16_MEMBER(isbc_215g_device::io_r)
// 5: vendor bit 0
// 6: track 0/busy
// 7: wp
data |= m_sbx2->get_card_device() ? 0 : 1;
data |= m_isbx_irq[2] << 1;
data |= m_isbx_irq[3] << 2;
data |= (!m_cyl[m_drive]) ? 0 : 0x40;
break;
case 0x08:
@ -177,7 +185,7 @@ WRITE16_MEMBER(isbc_215g_device::io_w)
case 0x0c:
//unit select
// 0: step/wr
// 1: sbx 1 opt 0/1
// 1: sbx 1 opt 0/1 (sbx2?)
// 2: sbx 2 opt 0/1
// 3: unit select 0
// 4: unit select 1
@ -185,6 +193,11 @@ WRITE16_MEMBER(isbc_215g_device::io_w)
// 6: format
// 7: format wr gate
m_drive = (data >> 3) & 1; // st406 two drives only
if(((data >> 1) & 1) != m_fdctc)
{
m_fdctc = !m_fdctc;
m_sbx2->opt0_w(m_fdctc);
}
break;
case 0x10:
//pit ch 0
@ -255,6 +268,26 @@ static ADDRESS_MAP_START(isbc_215g_io, AS_IO, 16, isbc_215g_device)
AM_RANGE(0xc0e0, 0xc0ef) AM_DEVREADWRITE8("sbx2", isbx_slot_device, mcs1_r, mcs1_w, 0x00ff)
ADDRESS_MAP_END
WRITE_LINE_MEMBER(isbc_215g_device::isbx_irq_00_w)
{
m_isbx_irq[0] = state ? true : false;
}
WRITE_LINE_MEMBER(isbc_215g_device::isbx_irq_01_w)
{
m_isbx_irq[1] = state ? true : false;
}
WRITE_LINE_MEMBER(isbc_215g_device::isbx_irq_10_w)
{
m_isbx_irq[2] = state ? true : false;
}
WRITE_LINE_MEMBER(isbc_215g_device::isbx_irq_11_w)
{
m_isbx_irq[3] = state ? true : false;
}
static MACHINE_CONFIG_FRAGMENT( isbc_215g )
MCFG_CPU_ADD("u84", I8089, XTAL_15MHz / 3)
MCFG_CPU_PROGRAM_MAP(isbc_215g_mem)
@ -265,7 +298,11 @@ static MACHINE_CONFIG_FRAGMENT( isbc_215g )
MCFG_HARDDISK_ADD("drive1")
MCFG_ISBX_SLOT_ADD("sbx1", 0, isbx_cards, NULL)
MCFG_ISBX_SLOT_ADD("sbx2", 0, isbx_cards, NULL)
MCFG_ISBX_SLOT_MINTR0_CALLBACK(WRITELINE(isbc_215g_device, isbx_irq_00_w))
MCFG_ISBX_SLOT_MINTR1_CALLBACK(WRITELINE(isbc_215g_device, isbx_irq_01_w))
MCFG_ISBX_SLOT_ADD("sbx2", 0, isbx_cards, "fdc_218a")
MCFG_ISBX_SLOT_MINTR0_CALLBACK(WRITELINE(isbc_215g_device, isbx_irq_10_w))
MCFG_ISBX_SLOT_MINTR1_CALLBACK(WRITELINE(isbc_215g_device, isbx_irq_11_w))
MACHINE_CONFIG_END
machine_config_constructor isbc_215g_device::device_mconfig_additions() const
@ -294,6 +331,10 @@ void isbc_215g_device::device_reset()
m_geom[1] = hard_disk_get_info(m_hdd1->get_hard_disk_file());
else
m_geom[1] = 0;
m_reset = false;
m_fdctc = false;
m_isbx_irq[0] = m_isbx_irq[1] = m_isbx_irq[2] = m_isbx_irq[3] = false;
}
void isbc_215g_device::device_start()
@ -306,7 +347,9 @@ void isbc_215g_device::device_start()
m_drive = 0;
m_head = 0;
m_stepdir = false;
m_out_irq_func.resolve_safe();
}
WRITE8_MEMBER(isbc_215g_device::write)

10
src/mess/machine/isbc_215g.h
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@ -22,6 +22,11 @@ public:
DECLARE_READ16_MEMBER(mem_r);
DECLARE_WRITE16_MEMBER(mem_w);
DECLARE_WRITE_LINE_MEMBER(isbx_irq_00_w);
DECLARE_WRITE_LINE_MEMBER(isbx_irq_01_w);
DECLARE_WRITE_LINE_MEMBER(isbx_irq_10_w);
DECLARE_WRITE_LINE_MEMBER(isbx_irq_11_w);
static void static_set_wakeup_addr(device_t &device, UINT32 wakeup) { downcast<isbc_215g_device &>(device).m_wakeup = wakeup; }
static void static_set_maincpu_tag(device_t &device, const char *maincpu_tag) { downcast<isbc_215g_device &>(device).m_maincpu_tag = maincpu_tag; }
template<class _Object> static devcb2_base &static_set_irq_callback(device_t &device, _Object object) { return downcast<isbc_215g_device &>(device).m_out_irq_func.set_callback(object); }
@ -37,6 +42,9 @@ private:
required_device<i8089_device> m_dmac;
required_device<harddisk_image_device> m_hdd0;
required_device<harddisk_image_device> m_hdd1;
required_device<isbx_slot_device> m_sbx1;
required_device<isbx_slot_device> m_sbx2;
devcb2_write_line m_out_irq_func;
int m_reset;
@ -47,6 +55,8 @@ private:
UINT8 m_idcompare[4], m_drive, m_head;
bool m_idfound, m_index, m_stepdir, m_wrgate, m_rdgate, m_amsrch;
bool m_isbx_irq[4], m_fdctc;
const struct hard_disk_info* m_geom[2];
};