mirror of
https://github.com/holub/mame
synced 2025-05-24 14:56:21 +03:00
Experiments in PCI land [O. Galibert]
This commit is contained in:
Olivier Galibert
parent
749dbb5f4a
commit
f975ef079a
@ -991,19 +991,19 @@ endif
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#-------------------------------------------------
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#
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#@src/emu/bus/pci/pci.h,BUSES += PCI
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#@src/emu/bus/lpci/pci.h,BUSES += LPCI
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#-------------------------------------------------
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ifneq ($(filter PCI,$(BUSES)),)
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OBJDIRS += $(BUSOBJ)/pci
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BUSOBJS += $(BUSOBJ)/pci/pci.o
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BUSOBJS += $(BUSOBJ)/pci/cirrus.o
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BUSOBJS += $(BUSOBJ)/pci/i82371ab.o
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BUSOBJS += $(BUSOBJ)/pci/i82371sb.o
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BUSOBJS += $(BUSOBJ)/pci/i82439tx.o
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BUSOBJS += $(BUSOBJ)/pci/northbridge.o
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BUSOBJS += $(BUSOBJ)/pci/southbridge.o
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BUSOBJS += $(BUSOBJ)/pci/mpc105.o
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ifneq ($(filter LPCI,$(BUSES)),)
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OBJDIRS += $(BUSOBJ)/lpci
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BUSOBJS += $(BUSOBJ)/lpci/pci.o
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BUSOBJS += $(BUSOBJ)/lpci/cirrus.o
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BUSOBJS += $(BUSOBJ)/lpci/i82371ab.o
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BUSOBJS += $(BUSOBJ)/lpci/i82371sb.o
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BUSOBJS += $(BUSOBJ)/lpci/i82439tx.o
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BUSOBJS += $(BUSOBJ)/lpci/northbridge.o
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BUSOBJS += $(BUSOBJ)/lpci/southbridge.o
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BUSOBJS += $(BUSOBJ)/lpci/mpc105.o
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endif
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#-------------------------------------------------
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@ -9,7 +9,7 @@
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#ifndef CIRRUS_H
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#define CIRRUS_H
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#include "bus/pci/pci.h"
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#include "bus/lpci/pci.h"
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// ======================> cirrus_device
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119
src/emu/machine/i6300esb.c
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119
src/emu/machine/i6300esb.c
Normal file
@ -0,0 +1,119 @@
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#include "i6300esb.h"
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const device_type I6300ESB_WATCHDOG = &device_creator<i6300esb_watchdog_device>;
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const device_type I6300ESB_LPC = &device_creator<i6300esb_lpc_device>;
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DEVICE_ADDRESS_MAP_START(map, 32, i6300esb_watchdog_device)
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ADDRESS_MAP_END
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i6300esb_watchdog_device::i6300esb_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: pci_device(mconfig, I6300ESB_WATCHDOG, "i6300ESB southbridge watchdog", tag, owner, clock, "i6300esb_watchdog", __FILE__)
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{
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}
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void i6300esb_watchdog_device::device_start()
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{
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pci_device::device_start();
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add_map(16, M_MEM, FUNC(i6300esb_watchdog_device::map));
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}
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void i6300esb_watchdog_device::device_reset()
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{
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pci_device::device_reset();
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}
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DEVICE_ADDRESS_MAP_START(config_map, 32, i6300esb_lpc_device)
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AM_RANGE(0x58, 0x5b) AM_READWRITE (gpio_base_r, gpio_base_w)
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AM_RANGE(0x5c, 0x5f) AM_READWRITE8 (gpio_cntl_r, gpio_cntl_w, 0x000000ff)
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AM_RANGE(0xe4, 0xe7) AM_READWRITE16(gen1_dec_r, gen1_dec_w, 0x0000ffff)
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AM_RANGE(0xe4, 0xe7) AM_READWRITE16(lpc_en_r, lpc_en_w, 0xffff0000)
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AM_RANGE(0xe8, 0xeb) AM_READWRITE (fwh_sel1_r, fwh_sel1_w)
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AM_INHERIT_FROM(pci_device::config_map)
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ADDRESS_MAP_END
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i6300esb_lpc_device::i6300esb_lpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: pci_device(mconfig, I6300ESB_LPC, "i6300ESB southbridge ISA/LPC bridge", tag, owner, clock, "i6300esb_lpc", __FILE__)
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{
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}
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void i6300esb_lpc_device::device_start()
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{
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pci_device::device_start();
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}
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void i6300esb_lpc_device::device_reset()
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{
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pci_device::device_reset();
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gpio_base = 0;
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gpio_cntl = 0x00;
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gen1_dec = 0x0000;
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lpc_en = 0x0000;
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fwh_sel1 = 0x00112233;
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}
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READ32_MEMBER (i6300esb_lpc_device::gpio_base_r)
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{
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return gpio_base | 1;
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}
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WRITE32_MEMBER(i6300esb_lpc_device::gpio_base_w)
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{
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COMBINE_DATA(&gpio_base);
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gpio_base &= 0x0000ffc0;
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logerror("%s: gpio_base = %08x\n", tag(), gpio_base);
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}
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READ8_MEMBER (i6300esb_lpc_device::gpio_cntl_r)
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{
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return gpio_cntl;
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}
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WRITE8_MEMBER (i6300esb_lpc_device::gpio_cntl_w)
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{
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COMBINE_DATA(&gpio_cntl);
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logerror("%s: gpio_cntl = %02x\n", tag(), gpio_cntl);
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}
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READ16_MEMBER (i6300esb_lpc_device::gen1_dec_r)
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{
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return gen1_dec;
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}
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WRITE16_MEMBER(i6300esb_lpc_device::gen1_dec_w)
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{
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COMBINE_DATA(&gen1_dec);
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logerror("%s: gen1_dec = %04x\n", tag(), gen1_dec);
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}
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READ16_MEMBER (i6300esb_lpc_device::lpc_en_r)
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{
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return lpc_en;
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}
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WRITE16_MEMBER(i6300esb_lpc_device::lpc_en_w)
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{
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COMBINE_DATA(&lpc_en);
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logerror("%s: lpc_en = %04x\n", tag(), lpc_en);
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}
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READ32_MEMBER (i6300esb_lpc_device::fwh_sel1_r)
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{
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return fwh_sel1;
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}
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WRITE32_MEMBER(i6300esb_lpc_device::fwh_sel1_w)
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{
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COMBINE_DATA(&fwh_sel1);
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logerror("%s: fwh_sel1 = %08x\n", tag(), fwh_sel1);
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}
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void i6300esb_lpc_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
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UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space)
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{
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memory_space->install_rom(0xfff00000, 0xffffffff, m_region->base());
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memory_space->install_rom(0x000f0000, 0x000fffff, m_region->base()+0xf0000);
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}
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60
src/emu/machine/i6300esb.h
Normal file
60
src/emu/machine/i6300esb.h
Normal file
@ -0,0 +1,60 @@
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// Intel i6300ESB southbridge
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#ifndef I6300ESB_H
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#define I6300ESB_H
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#include "pci.h"
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#define MCFG_I6300ESB_LPC_ADD(_tag) \
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MCFG_PCI_DEVICE_ADD(_tag, I6300ESB_LPC, 0x808625a1, 0x02, 0x060100, 0x00000000)
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#define MCFG_I6300ESB_WATCHDOG_ADD(_tag, _subdevice_id) \
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MCFG_PCI_DEVICE_ADD(_tag, I6300ESB_WATCHDOG, 0x808625ab, 0x02, 0x088000, _subdevice_id)
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class i6300esb_lpc_device : public pci_device {
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public:
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i6300esb_lpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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virtual void map_extra(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
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UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space);
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virtual DECLARE_ADDRESS_MAP(config_map, 32);
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protected:
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virtual void device_start();
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virtual void device_reset();
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private:
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UINT32 gpio_base, fwh_sel1;
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UINT16 gen1_dec, lpc_en;
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UINT8 gpio_cntl;
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DECLARE_READ32_MEMBER (gpio_base_r); // 58
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DECLARE_WRITE32_MEMBER(gpio_base_w);
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DECLARE_READ8_MEMBER (gpio_cntl_r); // 5c
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DECLARE_WRITE8_MEMBER (gpio_cntl_w);
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DECLARE_READ16_MEMBER (gen1_dec_r); // e4
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DECLARE_WRITE16_MEMBER(gen1_dec_w);
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DECLARE_READ16_MEMBER (lpc_en_r); // e6
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DECLARE_WRITE16_MEMBER(lpc_en_w);
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DECLARE_READ32_MEMBER (fwh_sel1_r); // e8
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DECLARE_WRITE32_MEMBER(fwh_sel1_w);
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};
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class i6300esb_watchdog_device : public pci_device {
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public:
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i6300esb_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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protected:
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virtual void device_start();
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virtual void device_reset();
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private:
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DECLARE_ADDRESS_MAP(map, 32);
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};
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extern const device_type I6300ESB_LPC;
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extern const device_type I6300ESB_WATCHDOG;
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#endif
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30
src/emu/machine/i82541.c
Normal file
30
src/emu/machine/i82541.c
Normal file
@ -0,0 +1,30 @@
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#include "i82541.h"
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const device_type I82541 = &device_creator<i82541_device>;
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DEVICE_ADDRESS_MAP_START(registers_map, 32, i82541_device)
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ADDRESS_MAP_END
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DEVICE_ADDRESS_MAP_START(flash_map, 32, i82541_device)
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ADDRESS_MAP_END
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DEVICE_ADDRESS_MAP_START(registers_io_map, 32, i82541_device)
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ADDRESS_MAP_END
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i82541_device::i82541_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: pci_device(mconfig, I82541, "I82541 ethernet controller", tag, owner, clock, "i82541", __FILE__)
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{
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}
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void i82541_device::device_start()
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{
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pci_device::device_start();
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add_map(128*1024, M_MEM, FUNC(i82541_device::registers_map));
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add_map(128*1024, M_MEM, FUNC(i82541_device::flash_map));
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add_map(32, M_IO, FUNC(i82541_device::registers_io_map));
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}
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void i82541_device::device_reset()
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{
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pci_device::device_reset();
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}
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27
src/emu/machine/i82541.h
Normal file
27
src/emu/machine/i82541.h
Normal file
@ -0,0 +1,27 @@
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// Intel I82541 ethernet controller
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#ifndef I82541_H
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#define I82541_H
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#include "pci.h"
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#define MCFG_I82541PI_ADD(_tag, _subdevice_id) \
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MCFG_PCI_DEVICE_ADD(_tag, I82541, 0x8086107c, 0x05, 0x020000, _subdevice_id)
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class i82541_device : public pci_device {
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public:
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i82541_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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protected:
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virtual void device_start();
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virtual void device_reset();
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private:
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DECLARE_ADDRESS_MAP(registers_map, 32);
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DECLARE_ADDRESS_MAP(flash_map, 32);
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DECLARE_ADDRESS_MAP(registers_io_map, 32);
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};
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extern const device_type I82541;
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#endif
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71
src/emu/machine/i82875p.c
Normal file
71
src/emu/machine/i82875p.c
Normal file
@ -0,0 +1,71 @@
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#include "i82875p.h"
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const device_type I82875P_HOST = &device_creator<i82875p_host_device>;
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const device_type I82875P_AGP = &device_creator<i82875p_agp_device>;
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DEVICE_ADDRESS_MAP_START(agp_translation_map, 32, i82875p_host_device)
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ADDRESS_MAP_END
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i82875p_host_device::i82875p_host_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: pci_host_device(mconfig, I82875P_HOST, "i82875p northbridge", tag, owner, clock, "i82875p_host", __FILE__)
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{
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}
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void i82875p_host_device::set_cpu_tag(const char *_cpu_tag)
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{
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cpu_tag = _cpu_tag;
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}
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void i82875p_host_device::set_ram_size(int _ram_size)
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{
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ram_size = _ram_size;
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}
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void i82875p_host_device::device_start()
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{
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pci_host_device::device_start();
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cpu = machine().device<cpu_device>(cpu_tag);
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memory_space = &cpu->space(AS_PROGRAM);
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io_space = &cpu->space(AS_IO);
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memory_window_start = 0;
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memory_window_end = 0xffffffff;
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memory_offset = 0;
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io_window_start = 0;
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io_window_end = 0xffff;
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io_offset = 0;
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ram.resize(ram_size/4);
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// Resizeable with the apsize register
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add_map(256*1024*1024, M_MEM, FUNC(i82875p_host_device::agp_translation_map));
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}
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void i82875p_host_device::device_reset()
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{
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pci_host_device::device_reset();
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}
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void i82875p_host_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
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UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space)
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{
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io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map);
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}
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i82875p_agp_device::i82875p_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: agp_bridge_device(mconfig, I82875P_AGP, "i82875p AGP bridge", tag, owner, clock, "i82875p_agp", __FILE__)
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{
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}
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void i82875p_agp_device::device_start()
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{
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agp_bridge_device::device_start();
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}
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void i82875p_agp_device::device_reset()
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{
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agp_bridge_device::device_reset();
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}
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52
src/emu/machine/i82875p.h
Normal file
52
src/emu/machine/i82875p.h
Normal file
@ -0,0 +1,52 @@
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// Intel i82875p northbridge
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#ifndef I82875P_H
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#define I82875P_H
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#include "pci.h"
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#define MCFG_I82875P_HOST_ADD(_tag, _subdevice_id, _cpu_tag, _ram_size) \
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MCFG_PCI_HOST_ADD(_tag, I82875P_HOST, 0x80862578, 0x02, _subdevice_id) \
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downcast<i82875p_host_device *>(device)->set_cpu_tag(_cpu_tag); \
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downcast<i82875p_host_device *>(device)->set_ram_size(_ram_size);
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#define MCFG_I82875P_AGP_ADD(_tag) \
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MCFG_AGP_BRIDGE_ADD(_tag, I82875P_AGP, 0x80862579, 0x02)
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class i82875p_host_device : public pci_host_device {
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public:
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i82875p_host_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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void set_cpu_tag(const char *tag);
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void set_ram_size(int ram_size);
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virtual void map_extra(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
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UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space);
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protected:
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virtual void device_start();
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virtual void device_reset();
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private:
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DECLARE_ADDRESS_MAP(agp_translation_map, 32);
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const char *cpu_tag;
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int ram_size;
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cpu_device *cpu;
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dynamic_array<UINT32> ram;
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};
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class i82875p_agp_device : public agp_bridge_device {
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public:
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i82875p_agp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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protected:
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virtual void device_start();
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virtual void device_reset();
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};
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extern const device_type I82875P_HOST;
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extern const device_type I82875P_AGP;
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#endif
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289
src/emu/machine/lpci.c
Normal file
289
src/emu/machine/lpci.c
Normal file
@ -0,0 +1,289 @@
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/***************************************************************************
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machine/lpci.c
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Legacy PCI bus
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The PCI bus is a 32-bit bus introduced by Intel, so it is little endian
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Control word:
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bit 31: Enable bit
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bits 30-24: Reserved
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bits 23-16: PCI bus number
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bits 15-11: PCI device number
|
||||
bits 10- 8: PCI function number
|
||||
bits 7- 0: Offset address
|
||||
|
||||
Standard PCI registers:
|
||||
0x00 2 Vendor ID
|
||||
0x02 2 Device ID
|
||||
0x04 2 PCI Command
|
||||
0x06 2 PCI Status
|
||||
0x08 1 Revision ID
|
||||
0x09 1 Programming Interface
|
||||
0x0A 1 Subclass Code
|
||||
0x0B 1 Class Code
|
||||
|
||||
Class Code/Subclass Code/Programming Interface
|
||||
0x00XXXX Pre-PCI 2.0 devices
|
||||
0x000000 Non-VGA device
|
||||
0x000101 VGA device
|
||||
0x01XXXX Storage Controller
|
||||
0x010000 SCSI
|
||||
0x0101XX IDE
|
||||
0x0102XX Floppy
|
||||
0x0103XX IPI
|
||||
0x0104XX RAID
|
||||
0x0180XX Other
|
||||
0x02XXXX Network Card
|
||||
0x020000 Ethernet
|
||||
0x020100 Tokenring
|
||||
0x020200 FDDI
|
||||
0x020300 ATM
|
||||
0x028000 Other
|
||||
0x03XXXX Display Controller
|
||||
0x030000 VGA
|
||||
0x030001 8514 Compatible
|
||||
0x030100 XGA
|
||||
0x038000 Other
|
||||
0x04XXXX Multimedia
|
||||
0x040000 Video
|
||||
0x040100 Audio
|
||||
0x048000 Other
|
||||
0x05XXXX Memory Controller
|
||||
0x050000 RAM
|
||||
0x050100 Flash
|
||||
0x058000 Other
|
||||
0x06XXXX Bridge
|
||||
0x060000 Host/PCI
|
||||
0x060100 PCI/ISA
|
||||
0x060200 PCI/EISA
|
||||
0x060300 PCI/Micro Channel
|
||||
0x060400 PCI/PCI
|
||||
0x060500 PCI/PCMCIA
|
||||
0x060600 PCI/NuBus
|
||||
0x060700 PCI/CardBus
|
||||
0x068000 Other
|
||||
|
||||
Information on PCI vendors can be found at http://www.pcidatabase.com/
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "machine/lpci.h"
|
||||
|
||||
#define LOG_PCI 0
|
||||
|
||||
//**************************************************************************
|
||||
// GLOBAL VARIABLES
|
||||
//**************************************************************************
|
||||
|
||||
const device_type PCI_BUS_LEGACY = &device_creator<pci_bus_legacy_device>;
|
||||
|
||||
//**************************************************************************
|
||||
// LIVE DEVICE
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// pci_bus_legacy_device - constructor
|
||||
//-------------------------------------------------
|
||||
pci_bus_legacy_device::pci_bus_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
|
||||
device_t(mconfig, PCI_BUS_LEGACY, "PCI Bus Legacy", tag, owner, clock, "pci_bus_legacy", __FILE__),
|
||||
m_father(NULL)
|
||||
{
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++) {
|
||||
m_devtag[i]= NULL;
|
||||
m_read_callback[i] = NULL;
|
||||
m_write_callback[i] = NULL;
|
||||
}
|
||||
m_siblings_count = 0;
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
INLINE FUNCTIONS
|
||||
***************************************************************************/
|
||||
|
||||
READ32_MEMBER( pci_bus_legacy_device::read )
|
||||
{
|
||||
UINT32 result = 0xffffffff;
|
||||
int function, reg;
|
||||
|
||||
offset %= 2;
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
result = m_address;
|
||||
break;
|
||||
|
||||
case 1:
|
||||
if (m_devicenum != -1)
|
||||
{
|
||||
pci_read_func read = m_busnumaddr->m_read_callback[m_devicenum];
|
||||
if (read != NULL)
|
||||
{
|
||||
function = (m_address >> 8) & 0x07;
|
||||
reg = (m_address >> 0) & 0xfc;
|
||||
result = (*read)(m_busnumaddr, m_busnumaddr->m_device[m_devicenum], function, reg, mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if (LOG_PCI)
|
||||
logerror("read('%s'): offset=%d result=0x%08X\n", tag(), offset, result);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
|
||||
pci_bus_legacy_device *pci_bus_legacy_device::pci_search_bustree(int busnum, int devicenum, pci_bus_legacy_device *pcibus)
|
||||
{
|
||||
int a;
|
||||
pci_bus_legacy_device *ret;
|
||||
|
||||
if (pcibus->m_busnum == busnum)
|
||||
{
|
||||
return pcibus;
|
||||
}
|
||||
for (a = 0; a < pcibus->m_siblings_count; a++)
|
||||
{
|
||||
ret = pci_search_bustree(busnum, devicenum, pcibus->m_siblings[a]);
|
||||
if (ret != NULL)
|
||||
return ret;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
||||
|
||||
WRITE32_MEMBER( pci_bus_legacy_device::write )
|
||||
{
|
||||
offset %= 2;
|
||||
|
||||
if (LOG_PCI)
|
||||
logerror("write('%s'): offset=%d data=0x%08X\n", tag(), offset, data);
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
m_address = data;
|
||||
|
||||
/* lookup current device */
|
||||
if (m_address & 0x80000000)
|
||||
{
|
||||
int busnum = (m_address >> 16) & 0xff;
|
||||
int devicenum = (m_address >> 11) & 0x1f;
|
||||
m_busnumaddr = pci_search_bustree(busnum, devicenum, this);
|
||||
if (m_busnumaddr != NULL)
|
||||
{
|
||||
m_busnumber = busnum;
|
||||
m_devicenum = devicenum;
|
||||
}
|
||||
else
|
||||
m_devicenum = -1;
|
||||
if (LOG_PCI)
|
||||
logerror(" bus:%d device:%d\n", busnum, devicenum);
|
||||
}
|
||||
break;
|
||||
|
||||
case 1:
|
||||
if (m_devicenum != -1)
|
||||
{
|
||||
pci_write_func write = m_busnumaddr->m_write_callback[m_devicenum];
|
||||
if (write != NULL)
|
||||
{
|
||||
int function = (m_address >> 8) & 0x07;
|
||||
int reg = (m_address >> 0) & 0xfc;
|
||||
(*write)(m_busnumaddr, m_busnumaddr->m_device[m_devicenum], function, reg, data, mem_mask);
|
||||
}
|
||||
if (LOG_PCI)
|
||||
logerror(" function:%d register:%d\n", (m_address >> 8) & 0x07, (m_address >> 0) & 0xfc);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
READ64_MEMBER(pci_bus_legacy_device::read_64be)
|
||||
{
|
||||
UINT64 result = 0;
|
||||
mem_mask = FLIPENDIAN_INT64(mem_mask);
|
||||
if (ACCESSING_BITS_0_31)
|
||||
result |= (UINT64)read(space, offset * 2 + 0, mem_mask >> 0) << 0;
|
||||
if (ACCESSING_BITS_32_63)
|
||||
result |= (UINT64)read(space, offset * 2 + 1, mem_mask >> 32) << 32;
|
||||
return FLIPENDIAN_INT64(result);
|
||||
}
|
||||
|
||||
WRITE64_MEMBER(pci_bus_legacy_device::write_64be)
|
||||
{
|
||||
data = FLIPENDIAN_INT64(data);
|
||||
mem_mask = FLIPENDIAN_INT64(mem_mask);
|
||||
if (ACCESSING_BITS_0_31)
|
||||
write(space, offset * 2 + 0, data >> 0, mem_mask >> 0);
|
||||
if (ACCESSING_BITS_32_63)
|
||||
write(space, offset * 2 + 1, data >> 32, mem_mask >> 32);
|
||||
}
|
||||
|
||||
|
||||
void pci_bus_legacy_device::add_sibling(pci_bus_legacy_device *sibling, int busnum)
|
||||
{
|
||||
m_siblings[m_siblings_count] = sibling;
|
||||
m_siblings_busnum[m_siblings_count] = busnum;
|
||||
m_siblings_count++;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_post_load - handle updating after a
|
||||
// restore
|
||||
//-------------------------------------------------
|
||||
|
||||
void pci_bus_legacy_device::device_post_load()
|
||||
{
|
||||
if (m_devicenum != -1)
|
||||
{
|
||||
m_busnumaddr = pci_search_bustree(m_busnumber, m_devicenum, this);
|
||||
}
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void pci_bus_legacy_device::device_start()
|
||||
{
|
||||
/* store a pointer back to the device */
|
||||
m_devicenum = -1;
|
||||
|
||||
/* find all our devices */
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++)
|
||||
if (m_devtag[i] != NULL)
|
||||
m_device[i] = machine().device(m_devtag[i]);
|
||||
|
||||
if (m_father != NULL) {
|
||||
pci_bus_legacy_device *father = machine().device<pci_bus_legacy_device>(m_father);
|
||||
if (father)
|
||||
father->add_sibling(this, m_busnum);
|
||||
}
|
||||
|
||||
/* register pci states */
|
||||
save_item(NAME(m_address));
|
||||
save_item(NAME(m_devicenum));
|
||||
save_item(NAME(m_busnum));
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_reset - device-specific reset
|
||||
//-------------------------------------------------
|
||||
|
||||
void pci_bus_legacy_device::device_reset()
|
||||
{
|
||||
/* reset the drive state */
|
||||
m_devicenum = -1;
|
||||
m_address = 0;
|
||||
}
|
||||
81
src/emu/machine/lpci.h
Normal file
81
src/emu/machine/lpci.h
Normal file
@ -0,0 +1,81 @@
|
||||
/***************************************************************************
|
||||
|
||||
machine/lpci.h
|
||||
|
||||
Legacy PCI bus
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef LPCI_H
|
||||
#define LPCI_H
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
typedef UINT32 (*pci_read_func)(device_t *pcibus, device_t *device, int function, int reg, UINT32 mem_mask);
|
||||
typedef void (*pci_write_func)(device_t *pcibus, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask);
|
||||
|
||||
// ======================> pci_bus_legacy_device
|
||||
|
||||
class pci_bus_legacy_device : public device_t
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
pci_bus_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
DECLARE_READ32_MEMBER( read );
|
||||
DECLARE_WRITE32_MEMBER( write );
|
||||
|
||||
DECLARE_READ64_MEMBER( read_64be );
|
||||
DECLARE_WRITE64_MEMBER( write_64be );
|
||||
|
||||
void set_busnum(int busnum) { m_busnum = busnum; }
|
||||
void set_father(const char *father) { m_father = father; }
|
||||
void set_device(int num, const char *tag, pci_read_func read_func, pci_write_func write_func) {
|
||||
m_devtag[num] = tag; m_read_callback[num] = read_func; m_write_callback[num] = write_func; }
|
||||
|
||||
pci_bus_legacy_device *pci_search_bustree(int busnum, int devicenum, pci_bus_legacy_device *pcibus);
|
||||
void add_sibling(pci_bus_legacy_device *sibling, int busnum);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
virtual void device_post_load();
|
||||
|
||||
private:
|
||||
UINT8 m_busnum;
|
||||
const char * m_devtag[32];
|
||||
pci_read_func m_read_callback[32];
|
||||
pci_write_func m_write_callback[32];
|
||||
const char * m_father;
|
||||
device_t * m_device[32];
|
||||
pci_bus_legacy_device * m_siblings[8];
|
||||
UINT8 m_siblings_busnum[8];
|
||||
int m_siblings_count;
|
||||
|
||||
offs_t m_address;
|
||||
INT8 m_devicenum; // device number we are addressing
|
||||
INT8 m_busnumber; // pci bus number we are addressing
|
||||
pci_bus_legacy_device * m_busnumaddr; // pci bus we are addressing
|
||||
};
|
||||
|
||||
// device type definition
|
||||
extern const device_type PCI_BUS_LEGACY;
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
DEVICE CONFIGURATION MACROS
|
||||
***************************************************************************/
|
||||
|
||||
#define MCFG_PCI_BUS_LEGACY_ADD(_tag, _busnum) \
|
||||
MCFG_DEVICE_ADD(_tag, PCI_BUS_LEGACY, 0) \
|
||||
downcast<pci_bus_legacy_device *>(device)->set_busnum(_busnum);
|
||||
#define MCFG_PCI_BUS_LEGACY_DEVICE(_devnum, _devtag, _configread, _configwrite) \
|
||||
downcast<pci_bus_legacy_device *>(device)->set_device(_devnum, _devtag,_configread,_configwrite);
|
||||
#define MCFG_PCI_BUS_LEGACY_SIBLING(_father_tag) \
|
||||
downcast<pci_bus_legacy_device *>(device)->set_father(_father_tag);
|
||||
|
||||
|
||||
#endif /* PCI_H */
|
||||
@ -1219,6 +1219,15 @@ ifneq ($(filter PCF8593,$(MACHINES)),)
|
||||
MACHINEOBJS += $(MACHINEOBJ)/pcf8593.o
|
||||
endif
|
||||
|
||||
#-------------------------------------------------
|
||||
#
|
||||
#@src/emu/machine/lpci.h,MACHINES += LPCI
|
||||
#-------------------------------------------------
|
||||
|
||||
ifneq ($(filter LPCI,$(MACHINES)),)
|
||||
MACHINEOBJS += $(MACHINEOBJ)/lpci.o
|
||||
endif
|
||||
|
||||
#-------------------------------------------------
|
||||
#
|
||||
#@src/emu/machine/pci.h,MACHINES += PCI
|
||||
@ -1226,6 +1235,13 @@ endif
|
||||
|
||||
ifneq ($(filter PCI,$(MACHINES)),)
|
||||
MACHINEOBJS += $(MACHINEOBJ)/pci.o
|
||||
MACHINEOBJS += $(MACHINEOBJ)/pci-usb.o
|
||||
MACHINEOBJS += $(MACHINEOBJ)/pci-sata.o
|
||||
MACHINEOBJS += $(MACHINEOBJ)/pci-apic.o
|
||||
MACHINEOBJS += $(MACHINEOBJ)/pci-smbus.o
|
||||
MACHINEOBJS += $(MACHINEOBJ)/i82541.o
|
||||
MACHINEOBJS += $(MACHINEOBJ)/i82875p.o
|
||||
MACHINEOBJS += $(MACHINEOBJ)/i6300esb.o
|
||||
endif
|
||||
|
||||
#-------------------------------------------------
|
||||
|
||||
18
src/emu/machine/pci-apic.c
Normal file
18
src/emu/machine/pci-apic.c
Normal file
@ -0,0 +1,18 @@
|
||||
#include "pci-apic.h"
|
||||
|
||||
const device_type APIC = &device_creator<apic_device>;
|
||||
|
||||
apic_device::apic_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: pci_device(mconfig, APIC, "I/O Advanced Programmable Interrupt Controller", tag, owner, clock, "apic", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
void apic_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
}
|
||||
|
||||
void apic_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
}
|
||||
20
src/emu/machine/pci-apic.h
Normal file
20
src/emu/machine/pci-apic.h
Normal file
@ -0,0 +1,20 @@
|
||||
#ifndef PCI_APIC_H
|
||||
#define PCI_APIC_H
|
||||
|
||||
#include "pci.h"
|
||||
|
||||
#define MCFG_APIC_ADD(_tag, _main_id, _revision, _subdevice_id) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, APIC, _main_id, _revision, 0x0c0320, _subdevice_id)
|
||||
|
||||
class apic_device : public pci_device {
|
||||
public:
|
||||
apic_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
};
|
||||
|
||||
extern const device_type APIC;
|
||||
|
||||
#endif
|
||||
44
src/emu/machine/pci-sata.c
Normal file
44
src/emu/machine/pci-sata.c
Normal file
@ -0,0 +1,44 @@
|
||||
#include "pci-sata.h"
|
||||
|
||||
const device_type SATA = &device_creator<sata_device>;
|
||||
|
||||
sata_device::sata_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: pci_device(mconfig, SATA, "SATA AHCI interface", tag, owner, clock, "sata", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(primary_command_map, 32, sata_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(primary_control_map, 32, sata_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(secondary_command_map, 32, sata_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(secondary_control_map, 32, sata_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(bus_master_map, 32, sata_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(ide_command_posting_map, 32, sata_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
void sata_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
|
||||
add_map(8, M_IO, FUNC(sata_device::primary_command_map));
|
||||
add_map(4, M_IO, FUNC(sata_device::primary_control_map));
|
||||
add_map(8, M_IO, FUNC(sata_device::secondary_command_map));
|
||||
add_map(4, M_IO, FUNC(sata_device::secondary_control_map));
|
||||
add_map(16, M_IO, FUNC(sata_device::bus_master_map));
|
||||
add_map(1024, M_MEM, FUNC(sata_device::ide_command_posting_map));
|
||||
}
|
||||
|
||||
void sata_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
}
|
||||
28
src/emu/machine/pci-sata.h
Normal file
28
src/emu/machine/pci-sata.h
Normal file
@ -0,0 +1,28 @@
|
||||
#ifndef PCI_SATA_H
|
||||
#define PCI_SATA_H
|
||||
|
||||
#include "pci.h"
|
||||
|
||||
#define MCFG_SATA_ADD(_tag, _main_id, _revision, _subdevice_id) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, SATA, _main_id, _revision, 0x01018a, _subdevice_id)
|
||||
|
||||
class sata_device : public pci_device {
|
||||
public:
|
||||
sata_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
private:
|
||||
DECLARE_ADDRESS_MAP(primary_command_map, 32);
|
||||
DECLARE_ADDRESS_MAP(primary_control_map, 32);
|
||||
DECLARE_ADDRESS_MAP(secondary_command_map, 32);
|
||||
DECLARE_ADDRESS_MAP(secondary_control_map, 32);
|
||||
DECLARE_ADDRESS_MAP(bus_master_map, 32);
|
||||
DECLARE_ADDRESS_MAP(ide_command_posting_map, 32);
|
||||
};
|
||||
|
||||
extern const device_type SATA;
|
||||
|
||||
#endif
|
||||
22
src/emu/machine/pci-smbus.c
Normal file
22
src/emu/machine/pci-smbus.c
Normal file
@ -0,0 +1,22 @@
|
||||
#include "pci-smbus.h"
|
||||
|
||||
const device_type SMBUS = &device_creator<smbus_device>;
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(map, 32, smbus_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
smbus_device::smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: pci_device(mconfig, SMBUS, "SMBUS interface", tag, owner, clock, "smbus", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
void smbus_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
add_map(32, M_IO, FUNC(smbus_device::map));
|
||||
}
|
||||
|
||||
void smbus_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
}
|
||||
23
src/emu/machine/pci-smbus.h
Normal file
23
src/emu/machine/pci-smbus.h
Normal file
@ -0,0 +1,23 @@
|
||||
#ifndef PCI_SMBUS_H
|
||||
#define PCI_SMBUS_H
|
||||
|
||||
#include "pci.h"
|
||||
|
||||
#define MCFG_SMBUS_ADD(_tag, _main_id, _revision, _subdevice_id) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, SMBUS, _main_id, _revision, 0x0c0500, _subdevice_id)
|
||||
|
||||
class smbus_device : public pci_device {
|
||||
public:
|
||||
smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
private:
|
||||
DECLARE_ADDRESS_MAP(map, 32);
|
||||
};
|
||||
|
||||
extern const device_type SMBUS;
|
||||
|
||||
#endif
|
||||
42
src/emu/machine/pci-usb.c
Normal file
42
src/emu/machine/pci-usb.c
Normal file
@ -0,0 +1,42 @@
|
||||
#include "pci-usb.h"
|
||||
|
||||
const device_type USB_UHCI = &device_creator<usb_uhci_device>;
|
||||
const device_type USB_EHCI = &device_creator<usb_ehci_device>;
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(map, 32, usb_uhci_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
usb_uhci_device::usb_uhci_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: pci_device(mconfig, USB_UHCI, "USB 1.1 UHCI interface", tag, owner, clock, "usb_uhci", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
void usb_uhci_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
add_map(32, M_IO, FUNC(usb_uhci_device::map));
|
||||
}
|
||||
|
||||
void usb_uhci_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
}
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(map, 32, usb_ehci_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
usb_ehci_device::usb_ehci_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: pci_device(mconfig, USB_EHCI, "USB 2.0 EHCI interface", tag, owner, clock, "usb_ehci", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
void usb_ehci_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
add_map(1024, M_MEM, FUNC(usb_ehci_device::map));
|
||||
}
|
||||
|
||||
void usb_ehci_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
}
|
||||
39
src/emu/machine/pci-usb.h
Normal file
39
src/emu/machine/pci-usb.h
Normal file
@ -0,0 +1,39 @@
|
||||
#ifndef PCI_USB_H
|
||||
#define PCI_USB_H
|
||||
|
||||
#include "pci.h"
|
||||
|
||||
#define MCFG_USB_UHCI_ADD(_tag, _main_id, _revision, _subdevice_id) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, USB_UHCI, _main_id, _revision, 0x0c0300, _subdevice_id)
|
||||
|
||||
#define MCFG_USB_EHCI_ADD(_tag, _main_id, _revision, _subdevice_id) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, USB_EHCI, _main_id, _revision, 0x0c0320, _subdevice_id)
|
||||
|
||||
class usb_uhci_device : public pci_device {
|
||||
public:
|
||||
usb_uhci_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
private:
|
||||
DECLARE_ADDRESS_MAP(map, 32);
|
||||
};
|
||||
|
||||
class usb_ehci_device : public pci_device {
|
||||
public:
|
||||
usb_ehci_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
private:
|
||||
DECLARE_ADDRESS_MAP(map, 32);
|
||||
};
|
||||
|
||||
extern const device_type USB_UHCI;
|
||||
extern const device_type USB_EHCI;
|
||||
|
||||
#endif
|
||||
@ -1,289 +1,291 @@
|
||||
/***************************************************************************
|
||||
#include "pci.h"
|
||||
|
||||
machine/pci.c
|
||||
const device_type PCI_ROOT = &device_creator<pci_root_device>;
|
||||
const device_type PCI_BRIDGE = &device_creator<pci_bridge_device>;
|
||||
|
||||
PCI bus
|
||||
DEVICE_ADDRESS_MAP_START(config_map, 32, pci_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
The PCI bus is a 32-bit bus introduced by Intel, so it is little endian
|
||||
|
||||
Control word:
|
||||
bit 31: Enable bit
|
||||
bits 30-24: Reserved
|
||||
bits 23-16: PCI bus number
|
||||
bits 15-11: PCI device number
|
||||
bits 10- 8: PCI function number
|
||||
bits 7- 0: Offset address
|
||||
|
||||
Standard PCI registers:
|
||||
0x00 2 Vendor ID
|
||||
0x02 2 Device ID
|
||||
0x04 2 PCI Command
|
||||
0x06 2 PCI Status
|
||||
0x08 1 Revision ID
|
||||
0x09 1 Programming Interface
|
||||
0x0A 1 Subclass Code
|
||||
0x0B 1 Class Code
|
||||
|
||||
Class Code/Subclass Code/Programming Interface
|
||||
0x00XXXX Pre-PCI 2.0 devices
|
||||
0x000000 Non-VGA device
|
||||
0x000101 VGA device
|
||||
0x01XXXX Storage Controller
|
||||
0x010000 SCSI
|
||||
0x0101XX IDE
|
||||
0x0102XX Floppy
|
||||
0x0103XX IPI
|
||||
0x0104XX RAID
|
||||
0x0180XX Other
|
||||
0x02XXXX Network Card
|
||||
0x020000 Ethernet
|
||||
0x020100 Tokenring
|
||||
0x020200 FDDI
|
||||
0x020300 ATM
|
||||
0x028000 Other
|
||||
0x03XXXX Display Controller
|
||||
0x030000 VGA
|
||||
0x030001 8514 Compatible
|
||||
0x030100 XGA
|
||||
0x038000 Other
|
||||
0x04XXXX Multimedia
|
||||
0x040000 Video
|
||||
0x040100 Audio
|
||||
0x048000 Other
|
||||
0x05XXXX Memory Controller
|
||||
0x050000 RAM
|
||||
0x050100 Flash
|
||||
0x058000 Other
|
||||
0x06XXXX Bridge
|
||||
0x060000 Host/PCI
|
||||
0x060100 PCI/ISA
|
||||
0x060200 PCI/EISA
|
||||
0x060300 PCI/Micro Channel
|
||||
0x060400 PCI/PCI
|
||||
0x060500 PCI/PCMCIA
|
||||
0x060600 PCI/NuBus
|
||||
0x060700 PCI/CardBus
|
||||
0x068000 Other
|
||||
|
||||
Information on PCI vendors can be found at http://www.pcidatabase.com/
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "machine/pci.h"
|
||||
|
||||
#define LOG_PCI 0
|
||||
|
||||
//**************************************************************************
|
||||
// GLOBAL VARIABLES
|
||||
//**************************************************************************
|
||||
|
||||
const device_type PCI_BUS_LEGACY = &device_creator<pci_bus_legacy_device>;
|
||||
|
||||
//**************************************************************************
|
||||
// LIVE DEVICE
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// pci_bus_legacy_device - constructor
|
||||
//-------------------------------------------------
|
||||
pci_bus_legacy_device::pci_bus_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
|
||||
device_t(mconfig, PCI_BUS_LEGACY, "PCI Bus Legacy", tag, owner, clock, "pci_bus_legacy", __FILE__),
|
||||
m_father(NULL)
|
||||
pci_device::pci_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
|
||||
: device_t(mconfig, type, name, tag, owner, clock, shortname, source)
|
||||
{
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++) {
|
||||
m_devtag[i]= NULL;
|
||||
m_read_callback[i] = NULL;
|
||||
m_write_callback[i] = NULL;
|
||||
main_id = 0xffffffff;
|
||||
revision = 0x00;
|
||||
pclass = 0xffffff;
|
||||
subdevice_id = 0xffffffff;
|
||||
}
|
||||
|
||||
void pci_device::set_ids(UINT32 _main_id, UINT8 _revision, UINT32 _pclass, UINT32 _subdevice_id)
|
||||
{
|
||||
main_id = _main_id;
|
||||
revision = _revision;
|
||||
pclass = _pclass;
|
||||
subdevice_id = _subdevice_id;
|
||||
}
|
||||
|
||||
void pci_device::device_start()
|
||||
{
|
||||
}
|
||||
|
||||
void pci_device::device_reset()
|
||||
{
|
||||
}
|
||||
|
||||
void pci_device::scan_sub_devices(pci_device **devices, dynamic_array<pci_device *> &all, dynamic_array<pci_device *> &bridges, device_t *root)
|
||||
{
|
||||
}
|
||||
|
||||
void pci_device::reset_all_mappings()
|
||||
{
|
||||
}
|
||||
|
||||
void pci_device::map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
|
||||
UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space)
|
||||
{
|
||||
map_extra(memory_window_start, memory_window_end, memory_offset, memory_space,
|
||||
io_window_start, io_window_end, io_offset, io_space);
|
||||
}
|
||||
|
||||
void pci_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
|
||||
UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space)
|
||||
{
|
||||
}
|
||||
|
||||
void pci_device::map_config(UINT8 device, address_space *config_space)
|
||||
{
|
||||
config_space->install_device(device << 12, (device << 12) | 0xfff, *this, &pci_device::config_map);
|
||||
}
|
||||
|
||||
void pci_device::add_map(UINT64 size, int flags, address_map_delegate &map)
|
||||
{
|
||||
logerror("Device %s (%s) has 0x%llx bytes of %s named %s\n", tag(), name(), size, flags & M_IO ? "io" : "memory", map.name());
|
||||
}
|
||||
|
||||
agp_device::agp_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
|
||||
: pci_device(mconfig, type, name, tag, owner, clock, shortname, source)
|
||||
{
|
||||
}
|
||||
|
||||
void agp_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
}
|
||||
|
||||
void agp_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
}
|
||||
|
||||
|
||||
|
||||
pci_bridge_device::pci_bridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: pci_device(mconfig, PCI_BRIDGE, "PCI-PCI Bridge", tag, owner, clock, "pci_bridge", __FILE__),
|
||||
device_memory_interface(mconfig, *this),
|
||||
configure_space_config("configuration_space", ENDIANNESS_LITTLE, 32, 20)
|
||||
{
|
||||
}
|
||||
|
||||
pci_bridge_device::pci_bridge_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
|
||||
: pci_device(mconfig, type, name, tag, owner, clock, shortname, source),
|
||||
device_memory_interface(mconfig, *this),
|
||||
configure_space_config("configuration_space", ENDIANNESS_LITTLE, 32, 20)
|
||||
{
|
||||
}
|
||||
|
||||
const address_space_config *pci_bridge_device::memory_space_config(address_spacenum spacenum) const
|
||||
{
|
||||
return spacenum == AS_PROGRAM ? &configure_space_config : NULL;
|
||||
}
|
||||
|
||||
device_t *pci_bridge_device::bus_root()
|
||||
{
|
||||
return this;
|
||||
}
|
||||
|
||||
void pci_bridge_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
|
||||
for(int i=0; i<32*8; i++)
|
||||
sub_devices[i] = NULL;
|
||||
|
||||
for(device_t *d = bus_root()->first_subdevice(); d != NULL; d = d->next()) {
|
||||
if(d == this)
|
||||
continue;
|
||||
const char *t = d->tag();
|
||||
int l = strlen(t);
|
||||
if(l <= 4 || t[l-5] != ':' || t[l-2] != '.')
|
||||
continue;
|
||||
int id = strtol(t+l-4, 0, 16);
|
||||
int fct = t[l-1] - '0';
|
||||
sub_devices[(id << 3) | fct] = downcast<pci_device *>(d);
|
||||
}
|
||||
m_siblings_count = 0;
|
||||
for(int i=0; i<32*8; i++)
|
||||
if(sub_devices[i]) {
|
||||
all_devices.append(sub_devices[i]);
|
||||
pci_bridge_device *bridge = dynamic_cast<pci_bridge_device *>(sub_devices[i]);
|
||||
if(bridge)
|
||||
all_bridges.append(bridge);
|
||||
}
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
INLINE FUNCTIONS
|
||||
***************************************************************************/
|
||||
|
||||
READ32_MEMBER( pci_bus_legacy_device::read )
|
||||
void pci_bridge_device::device_reset()
|
||||
{
|
||||
UINT32 result = 0xffffffff;
|
||||
int function, reg;
|
||||
|
||||
offset %= 2;
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
result = m_address;
|
||||
break;
|
||||
|
||||
case 1:
|
||||
if (m_devicenum != -1)
|
||||
{
|
||||
pci_read_func read = m_busnumaddr->m_read_callback[m_devicenum];
|
||||
if (read != NULL)
|
||||
{
|
||||
function = (m_address >> 8) & 0x07;
|
||||
reg = (m_address >> 0) & 0xfc;
|
||||
result = (*read)(m_busnumaddr, m_busnumaddr->m_device[m_devicenum], function, reg, mem_mask);
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if (LOG_PCI)
|
||||
logerror("read('%s'): offset=%d result=0x%08X\n", tag(), offset, result);
|
||||
|
||||
return result;
|
||||
pci_device::device_reset();
|
||||
regenerate_config_mapping();
|
||||
}
|
||||
|
||||
|
||||
|
||||
pci_bus_legacy_device *pci_bus_legacy_device::pci_search_bustree(int busnum, int devicenum, pci_bus_legacy_device *pcibus)
|
||||
void pci_bridge_device::reset_all_mappings()
|
||||
{
|
||||
int a;
|
||||
pci_bus_legacy_device *ret;
|
||||
|
||||
if (pcibus->m_busnum == busnum)
|
||||
{
|
||||
return pcibus;
|
||||
}
|
||||
for (a = 0; a < pcibus->m_siblings_count; a++)
|
||||
{
|
||||
ret = pci_search_bustree(busnum, devicenum, pcibus->m_siblings[a]);
|
||||
if (ret != NULL)
|
||||
return ret;
|
||||
}
|
||||
return NULL;
|
||||
for(int i=0; i != all_devices.count(); i++)
|
||||
all_devices[i]->reset_all_mappings();
|
||||
}
|
||||
|
||||
|
||||
|
||||
WRITE32_MEMBER( pci_bus_legacy_device::write )
|
||||
void pci_bridge_device::map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
|
||||
UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space)
|
||||
{
|
||||
offset %= 2;
|
||||
for(int i = all_devices.count()-1; i>=0; i--)
|
||||
all_devices[i]->map_device(memory_window_start, memory_window_end, memory_offset, memory_space,
|
||||
io_window_start, io_window_end, io_offset, io_space);
|
||||
|
||||
if (LOG_PCI)
|
||||
logerror("write('%s'): offset=%d data=0x%08X\n", tag(), offset, data);
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
m_address = data;
|
||||
|
||||
/* lookup current device */
|
||||
if (m_address & 0x80000000)
|
||||
{
|
||||
int busnum = (m_address >> 16) & 0xff;
|
||||
int devicenum = (m_address >> 11) & 0x1f;
|
||||
m_busnumaddr = pci_search_bustree(busnum, devicenum, this);
|
||||
if (m_busnumaddr != NULL)
|
||||
{
|
||||
m_busnumber = busnum;
|
||||
m_devicenum = devicenum;
|
||||
}
|
||||
else
|
||||
m_devicenum = -1;
|
||||
if (LOG_PCI)
|
||||
logerror(" bus:%d device:%d\n", busnum, devicenum);
|
||||
}
|
||||
break;
|
||||
|
||||
case 1:
|
||||
if (m_devicenum != -1)
|
||||
{
|
||||
pci_write_func write = m_busnumaddr->m_write_callback[m_devicenum];
|
||||
if (write != NULL)
|
||||
{
|
||||
int function = (m_address >> 8) & 0x07;
|
||||
int reg = (m_address >> 0) & 0xfc;
|
||||
(*write)(m_busnumaddr, m_busnumaddr->m_device[m_devicenum], function, reg, data, mem_mask);
|
||||
}
|
||||
if (LOG_PCI)
|
||||
logerror(" function:%d register:%d\n", (m_address >> 8) & 0x07, (m_address >> 0) & 0xfc);
|
||||
}
|
||||
break;
|
||||
}
|
||||
map_extra(memory_window_start, memory_window_end, memory_offset, memory_space,
|
||||
io_window_start, io_window_end, io_offset, io_space);
|
||||
}
|
||||
|
||||
|
||||
|
||||
READ64_MEMBER(pci_bus_legacy_device::read_64be)
|
||||
void pci_bridge_device::regenerate_config_mapping()
|
||||
{
|
||||
UINT64 result = 0;
|
||||
mem_mask = FLIPENDIAN_INT64(mem_mask);
|
||||
if (ACCESSING_BITS_0_31)
|
||||
result |= (UINT64)read(space, offset * 2 + 0, mem_mask >> 0) << 0;
|
||||
if (ACCESSING_BITS_32_63)
|
||||
result |= (UINT64)read(space, offset * 2 + 1, mem_mask >> 32) << 32;
|
||||
return FLIPENDIAN_INT64(result);
|
||||
address_space *config_space = &space(AS_PROGRAM);
|
||||
config_space->unmap_readwrite(0x00000, 0xfffff);
|
||||
for(int i=0; i<32*8; i++)
|
||||
if(sub_devices[i])
|
||||
sub_devices[i]->map_config(i, config_space);
|
||||
}
|
||||
|
||||
WRITE64_MEMBER(pci_bus_legacy_device::write_64be)
|
||||
|
||||
agp_bridge_device::agp_bridge_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
|
||||
: pci_bridge_device(mconfig, type, name, tag, owner, clock, shortname, source)
|
||||
{
|
||||
data = FLIPENDIAN_INT64(data);
|
||||
mem_mask = FLIPENDIAN_INT64(mem_mask);
|
||||
if (ACCESSING_BITS_0_31)
|
||||
write(space, offset * 2 + 0, data >> 0, mem_mask >> 0);
|
||||
if (ACCESSING_BITS_32_63)
|
||||
write(space, offset * 2 + 1, data >> 32, mem_mask >> 32);
|
||||
}
|
||||
|
||||
|
||||
void pci_bus_legacy_device::add_sibling(pci_bus_legacy_device *sibling, int busnum)
|
||||
void agp_bridge_device::device_start()
|
||||
{
|
||||
m_siblings[m_siblings_count] = sibling;
|
||||
m_siblings_busnum[m_siblings_count] = busnum;
|
||||
m_siblings_count++;
|
||||
pci_bridge_device::device_start();
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_post_load - handle updating after a
|
||||
// restore
|
||||
//-------------------------------------------------
|
||||
|
||||
void pci_bus_legacy_device::device_post_load()
|
||||
void agp_bridge_device::device_reset()
|
||||
{
|
||||
if (m_devicenum != -1)
|
||||
{
|
||||
m_busnumaddr = pci_search_bustree(m_busnumber, m_devicenum, this);
|
||||
}
|
||||
pci_bridge_device::device_reset();
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void pci_bus_legacy_device::device_start()
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(io_configuration_access_map, 32, pci_host_device)
|
||||
AM_RANGE(0xcf8, 0xcfb) AM_READWRITE(config_address_r, config_address_w)
|
||||
AM_RANGE(0xcfc, 0xcff) AM_READWRITE(config_data_r, config_data_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
pci_host_device::pci_host_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
|
||||
: pci_bridge_device(mconfig, type, name, tag, owner, clock, shortname, source)
|
||||
{
|
||||
/* store a pointer back to the device */
|
||||
m_devicenum = -1;
|
||||
|
||||
/* find all our devices */
|
||||
for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++)
|
||||
if (m_devtag[i] != NULL)
|
||||
m_device[i] = machine().device(m_devtag[i]);
|
||||
|
||||
if (m_father != NULL) {
|
||||
pci_bus_legacy_device *father = machine().device<pci_bus_legacy_device>(m_father);
|
||||
if (father)
|
||||
father->add_sibling(this, m_busnum);
|
||||
}
|
||||
|
||||
/* register pci states */
|
||||
save_item(NAME(m_address));
|
||||
save_item(NAME(m_devicenum));
|
||||
save_item(NAME(m_busnum));
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_reset - device-specific reset
|
||||
//-------------------------------------------------
|
||||
|
||||
void pci_bus_legacy_device::device_reset()
|
||||
device_t *pci_host_device::bus_root()
|
||||
{
|
||||
return owner();
|
||||
}
|
||||
|
||||
void pci_host_device::device_start()
|
||||
{
|
||||
pci_bridge_device::device_start();
|
||||
|
||||
memory_window_start = memory_window_end = memory_offset = 0;
|
||||
io_window_start = io_window_end = io_offset = 0;
|
||||
}
|
||||
|
||||
void pci_host_device::device_reset()
|
||||
{
|
||||
pci_bridge_device::device_reset();
|
||||
for(int i=0; i != all_devices.count(); i++)
|
||||
all_devices[i]->reset_all_mappings();
|
||||
regenerate_mapping();
|
||||
|
||||
config_address = 0;
|
||||
}
|
||||
|
||||
void pci_host_device::regenerate_mapping()
|
||||
{
|
||||
memory_space->unmap_readwrite(memory_window_start, memory_window_end);
|
||||
io_space->unmap_readwrite(io_window_start, io_window_end);
|
||||
|
||||
map_device(memory_window_start, memory_window_end, memory_offset, memory_space,
|
||||
io_window_start, io_window_end, io_offset, io_space);
|
||||
}
|
||||
|
||||
void pci_host_device::regenerate_config_mapping()
|
||||
{
|
||||
pci_bridge_device::regenerate_config_mapping();
|
||||
map_config(0, &space(AS_PROGRAM));
|
||||
}
|
||||
|
||||
READ32_MEMBER(pci_host_device::config_address_r)
|
||||
{
|
||||
return config_address;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pci_host_device::config_address_w)
|
||||
{
|
||||
COMBINE_DATA(&config_address);
|
||||
}
|
||||
|
||||
READ32_MEMBER(pci_host_device::config_data_r)
|
||||
{
|
||||
return config_address & 0x80000000 ? config_read((config_address >> 16) & 0xff, (config_address >> 8) & 0xff, config_address & 0xfc, mem_mask) : 0xffffffff;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(pci_host_device::config_data_w)
|
||||
{
|
||||
if(config_address & 0x80000000)
|
||||
config_write((config_address >> 16) & 0xff, (config_address >> 8) & 0xff, config_address & 0xfc, data, mem_mask);
|
||||
}
|
||||
|
||||
UINT32 pci_host_device::config_read(UINT8 bus, UINT8 device, UINT16 reg, UINT32 mem_mask)
|
||||
{
|
||||
UINT32 data = 0xffffffff;
|
||||
if(!bus) {
|
||||
if(sub_devices[device]) {
|
||||
data = space(AS_PROGRAM).read_dword((device << 12) | reg, mem_mask);
|
||||
logerror("config_read %02x:%02x.%x:%02x %08x @ %08x\n", bus, device >> 3, device & 7, reg, data, mem_mask);
|
||||
}
|
||||
} else
|
||||
abort();
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
void pci_host_device::config_write(UINT8 bus, UINT8 device, UINT16 reg, UINT32 data, UINT32 mem_mask)
|
||||
{
|
||||
if(!bus) {
|
||||
if(sub_devices[device]) {
|
||||
space(AS_PROGRAM).write_dword((device << 12) | reg, data, mem_mask);
|
||||
logerror("config_write %02x:%02x.%x:%02x %08x @ %08x\n", bus, device >> 3, device & 7, reg, data, mem_mask);
|
||||
}
|
||||
} else
|
||||
abort();
|
||||
}
|
||||
|
||||
|
||||
pci_root_device::pci_root_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: device_t(mconfig, PCI_ROOT,"PCI virtual root", tag, owner, clock, "pci_root", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
void pci_root_device::device_start()
|
||||
{
|
||||
}
|
||||
|
||||
void pci_root_device::device_reset()
|
||||
{
|
||||
/* reset the drive state */
|
||||
m_devicenum = -1;
|
||||
m_address = 0;
|
||||
}
|
||||
|
||||
@ -1,81 +1,152 @@
|
||||
/***************************************************************************
|
||||
|
||||
machine/pci.h
|
||||
|
||||
PCI bus
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef PCI_H
|
||||
#define PCI_H
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
#include "emu.h"
|
||||
|
||||
typedef UINT32 (*pci_read_func)(device_t *pcibus, device_t *device, int function, int reg, UINT32 mem_mask);
|
||||
typedef void (*pci_write_func)(device_t *pcibus, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask);
|
||||
#define MCFG_PCI_ROOT_ADD(_tag) \
|
||||
MCFG_DEVICE_ADD(_tag, PCI_ROOT, 0)
|
||||
|
||||
// ======================> pci_bus_legacy_device
|
||||
#define MCFG_PCI_DEVICE_ADD(_tag, _type, _main_id, _revision, _pclass, _subdevice_id) \
|
||||
MCFG_DEVICE_ADD(_tag, _type, 0) \
|
||||
downcast<pci_device *>(device)->set_ids(_main_id, _revision, _pclass, _subdevice_id);
|
||||
|
||||
class pci_bus_legacy_device : public device_t
|
||||
{
|
||||
#define MCFG_AGP_DEVICE_ADD(_tag, _type, _main_id, _revision, _subdevice_id) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, _type, _main_id, _revision, 0x030000, _subdevice_id)
|
||||
|
||||
#define MCFG_PCI_HOST_ADD(_tag, _type, _main_id, _revision, _subdevice_id) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, _type, _main_id, _revision, 0x060000, _subdevice_id)
|
||||
|
||||
#define MCFG_PCI_BRIDGE_ADD(_tag, _main_id, _revision) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, PCI_BRIDGE, _main_id, _revision, 0x060400, 0x00000000)
|
||||
|
||||
#define MCFG_AGP_BRIDGE_ADD(_tag, _type, _main_id, _revision) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, _type, _main_id, _revision, 0x060400, 0x00000000)
|
||||
|
||||
class pci_device : public device_t {
|
||||
public:
|
||||
// construction/destruction
|
||||
pci_bus_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
pci_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
||||
|
||||
DECLARE_READ32_MEMBER( read );
|
||||
DECLARE_WRITE32_MEMBER( write );
|
||||
void set_ids(UINT32 main_id, UINT8 revision, UINT32 pclass, UINT32 subdevice_id);
|
||||
|
||||
DECLARE_READ64_MEMBER( read_64be );
|
||||
DECLARE_WRITE64_MEMBER( write_64be );
|
||||
virtual void reset_all_mappings();
|
||||
virtual void map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
|
||||
UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space);
|
||||
virtual void map_extra(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
|
||||
UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space);
|
||||
|
||||
void set_busnum(int busnum) { m_busnum = busnum; }
|
||||
void set_father(const char *father) { m_father = father; }
|
||||
void set_device(int num, const char *tag, pci_read_func read_func, pci_write_func write_func) {
|
||||
m_devtag[num] = tag; m_read_callback[num] = read_func; m_write_callback[num] = write_func; }
|
||||
void map_config(UINT8 device, address_space *config_space);
|
||||
|
||||
pci_bus_legacy_device *pci_search_bustree(int busnum, int devicenum, pci_bus_legacy_device *pcibus);
|
||||
void add_sibling(pci_bus_legacy_device *sibling, int busnum);
|
||||
virtual DECLARE_ADDRESS_MAP(config_map, 32);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
enum {
|
||||
M_MEM = 0,
|
||||
M_IO = 1,
|
||||
M_64D = 2,
|
||||
M_64A = 4,
|
||||
M_PREF = 8
|
||||
};
|
||||
|
||||
UINT32 main_id, subdevice_id;
|
||||
UINT32 pclass;
|
||||
UINT8 revision;
|
||||
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
virtual void device_post_load();
|
||||
|
||||
private:
|
||||
UINT8 m_busnum;
|
||||
const char * m_devtag[32];
|
||||
pci_read_func m_read_callback[32];
|
||||
pci_write_func m_write_callback[32];
|
||||
const char * m_father;
|
||||
device_t * m_device[32];
|
||||
pci_bus_legacy_device * m_siblings[8];
|
||||
UINT8 m_siblings_busnum[8];
|
||||
int m_siblings_count;
|
||||
static void scan_sub_devices(pci_device **devices, dynamic_array<pci_device *> &all, dynamic_array<pci_device *> &bridges, device_t *root);
|
||||
|
||||
offs_t m_address;
|
||||
INT8 m_devicenum; // device number we are addressing
|
||||
INT8 m_busnumber; // pci bus number we are addressing
|
||||
pci_bus_legacy_device * m_busnumaddr; // pci bus we are addressing
|
||||
void add_map(UINT64 size, int flags, address_map_delegate &map);
|
||||
template <typename T> void add_map(UINT64 size, int flags, void (T::*map)(address_map &map, device_t &device), const char *name) {
|
||||
address_map_delegate delegate(map, name, static_cast<T *>(this));
|
||||
add_map(size, flags, delegate);
|
||||
}
|
||||
};
|
||||
|
||||
// device type definition
|
||||
extern const device_type PCI_BUS_LEGACY;
|
||||
class agp_device : public pci_device {
|
||||
public:
|
||||
agp_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
};
|
||||
|
||||
/***************************************************************************
|
||||
DEVICE CONFIGURATION MACROS
|
||||
***************************************************************************/
|
||||
class pci_bridge_device : public pci_device, public device_memory_interface {
|
||||
public:
|
||||
pci_bridge_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
pci_bridge_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
||||
|
||||
#define MCFG_PCI_BUS_LEGACY_ADD(_tag, _busnum) \
|
||||
MCFG_DEVICE_ADD(_tag, PCI_BUS_LEGACY, 0) \
|
||||
downcast<pci_bus_legacy_device *>(device)->set_busnum(_busnum);
|
||||
#define MCFG_PCI_BUS_LEGACY_DEVICE(_devnum, _devtag, _configread, _configwrite) \
|
||||
downcast<pci_bus_legacy_device *>(device)->set_device(_devnum, _devtag,_configread,_configwrite);
|
||||
#define MCFG_PCI_BUS_LEGACY_SIBLING(_father_tag) \
|
||||
downcast<pci_bus_legacy_device *>(device)->set_father(_father_tag);
|
||||
virtual void map_device(UINT64 memory_window_start, UINT64 memory_window_end, UINT64 memory_offset, address_space *memory_space,
|
||||
UINT64 io_window_start, UINT64 io_window_end, UINT64 io_offset, address_space *io_space);
|
||||
virtual void reset_all_mappings();
|
||||
|
||||
protected:
|
||||
pci_device *sub_devices[32*8];
|
||||
dynamic_array<pci_device *> all_devices;
|
||||
dynamic_array<pci_device *> all_bridges;
|
||||
|
||||
#endif /* PCI_H */
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum) const;
|
||||
|
||||
virtual device_t *bus_root();
|
||||
virtual void regenerate_config_mapping();
|
||||
|
||||
private:
|
||||
address_space_config configure_space_config;
|
||||
};
|
||||
|
||||
class agp_bridge_device : public pci_bridge_device {
|
||||
public:
|
||||
agp_bridge_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
};
|
||||
|
||||
class pci_host_device : public pci_bridge_device {
|
||||
public:
|
||||
DECLARE_ADDRESS_MAP(io_configuration_access_map, 32);
|
||||
|
||||
pci_host_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
||||
|
||||
protected:
|
||||
address_space *memory_space, *io_space;
|
||||
|
||||
UINT64 memory_window_start, memory_window_end, memory_offset;
|
||||
UINT64 io_window_start, io_window_end, io_offset;
|
||||
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
virtual device_t *bus_root();
|
||||
|
||||
UINT32 config_address;
|
||||
|
||||
DECLARE_READ32_MEMBER(config_address_r);
|
||||
DECLARE_WRITE32_MEMBER(config_address_w);
|
||||
DECLARE_READ32_MEMBER(config_data_r);
|
||||
DECLARE_WRITE32_MEMBER(config_data_w);
|
||||
|
||||
UINT32 config_read(UINT8 bus, UINT8 device, UINT16 reg, UINT32 mem_mask);
|
||||
void config_write(UINT8 bus, UINT8 device, UINT16 reg, UINT32 data, UINT32 mem_mask);
|
||||
|
||||
void regenerate_mapping();
|
||||
virtual void regenerate_config_mapping();
|
||||
};
|
||||
|
||||
class pci_root_device : public device_t {
|
||||
public:
|
||||
pci_root_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
};
|
||||
|
||||
extern const device_type PCI_ROOT;
|
||||
extern const device_type PCI_BRIDGE;
|
||||
|
||||
#endif
|
||||
|
||||
34
src/emu/sound/pci-ac97.c
Normal file
34
src/emu/sound/pci-ac97.c
Normal file
@ -0,0 +1,34 @@
|
||||
#include "pci-ac97.h"
|
||||
|
||||
const device_type AC97 = &device_creator<ac97_device>;
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(native_audio_mixer_map, 32, ac97_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(native_audio_bus_mastering_map, 32, ac97_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(mixer_map, 32, ac97_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(bus_mastering_map, 32, ac97_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
ac97_device::ac97_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: pci_device(mconfig, AC97, "AC97 audio", tag, owner, clock, "ac97", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
void ac97_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
add_map(256, M_IO, FUNC(ac97_device::native_audio_mixer_map));
|
||||
add_map(64, M_IO, FUNC(ac97_device::native_audio_bus_mastering_map));
|
||||
add_map(512, M_MEM, FUNC(ac97_device::mixer_map));
|
||||
add_map(256, M_MEM, FUNC(ac97_device::bus_mastering_map));
|
||||
}
|
||||
|
||||
void ac97_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
}
|
||||
26
src/emu/sound/pci-ac97.h
Normal file
26
src/emu/sound/pci-ac97.h
Normal file
@ -0,0 +1,26 @@
|
||||
#ifndef PCI_AC97_H
|
||||
#define PCI_AC97_H
|
||||
|
||||
#include "machine/pci.h"
|
||||
|
||||
#define MCFG_AC97_ADD(_tag, _main_id, _revision, _subdevice_id) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, AC97, _main_id, _revision, 0x040300, _subdevice_id)
|
||||
|
||||
class ac97_device : public pci_device {
|
||||
public:
|
||||
ac97_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
private:
|
||||
DECLARE_ADDRESS_MAP(native_audio_mixer_map, 32);
|
||||
DECLARE_ADDRESS_MAP(native_audio_bus_mastering_map, 32);
|
||||
DECLARE_ADDRESS_MAP(mixer_map, 32);
|
||||
DECLARE_ADDRESS_MAP(bus_mastering_map, 32);
|
||||
};
|
||||
|
||||
extern const device_type AC97;
|
||||
|
||||
#endif
|
||||
22
src/emu/sound/sb0400.c
Normal file
22
src/emu/sound/sb0400.c
Normal file
@ -0,0 +1,22 @@
|
||||
#include "sb0400.h"
|
||||
|
||||
const device_type SB0400 = &device_creator<sb0400_device>;
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(map, 32, sb0400_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
sb0400_device::sb0400_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: pci_device(mconfig, SB0400, "Creative Labs SB0400 Audigy2 Value", tag, owner, clock, "sb0400", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
void sb0400_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
add_map(64, M_IO, FUNC(sb0400_device::map));
|
||||
}
|
||||
|
||||
void sb0400_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
}
|
||||
25
src/emu/sound/sb0400.h
Normal file
25
src/emu/sound/sb0400.h
Normal file
@ -0,0 +1,25 @@
|
||||
// Creative labs SB0400 Audigy2 Value
|
||||
|
||||
#ifndef SB0400_H
|
||||
#define SB0400_H
|
||||
|
||||
#include "machine/pci.h"
|
||||
|
||||
#define MCFG_SB0400_ADD(_tag, _subdevice_id) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, SB0400, 0x11020008, 0x00, 0x040100, _subdevice_id)
|
||||
|
||||
class sb0400_device : public pci_device {
|
||||
public:
|
||||
sb0400_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
private:
|
||||
DECLARE_ADDRESS_MAP(map, 32);
|
||||
};
|
||||
|
||||
extern const device_type SB0400;
|
||||
|
||||
#endif
|
||||
@ -69,6 +69,17 @@ $(SOUNDOBJ)/discrete.o: $(SOUNDSRC)/discrete.c \
|
||||
$(SOUNDSRC)/disc_wav.inc
|
||||
|
||||
|
||||
#-------------------------------------------------
|
||||
# AC97
|
||||
#@src/emu/sound/pic-ac97.h,SOUNDS += AC97
|
||||
#-------------------------------------------------
|
||||
|
||||
ifneq ($(filter AC97,$(SOUNDS)),)
|
||||
SOUNDOBJS += $(SOUNDOBJ)/pci-ac97.o
|
||||
endif
|
||||
|
||||
|
||||
|
||||
#-------------------------------------------------
|
||||
# Apple custom sound chips
|
||||
#@src/emu/sound/asc.h,SOUNDS += ASC
|
||||
@ -123,6 +134,14 @@ endif
|
||||
|
||||
|
||||
#-------------------------------------------------
|
||||
#-------------------------------------------------
|
||||
# AC97
|
||||
#@src/emu/sound/pic-ac97.h,SOUNDS += AC97
|
||||
#-------------------------------------------------
|
||||
|
||||
ifneq ($(filter AC97,$(SOUNDS)),)
|
||||
SOUNDOBJS += $(SOUNDOBJ)/pci-ac97.o
|
||||
endif
|
||||
# CEM 3394 analog synthesizer chip
|
||||
#@src/emu/sound/cem3394.h,SOUNDS += CEM3394
|
||||
#-------------------------------------------------
|
||||
@ -133,6 +152,17 @@ endif
|
||||
|
||||
|
||||
|
||||
#-------------------------------------------------
|
||||
# Creative Labs SB0400 Audigy2 Value
|
||||
#@src/emu/sound/sb0400.h,SOUNDS += AC97
|
||||
#-------------------------------------------------
|
||||
|
||||
ifneq ($(filter SB0400,$(SOUNDS)),)
|
||||
SOUNDOBJS += $(SOUNDOBJ)/sb0400.o
|
||||
endif
|
||||
|
||||
|
||||
|
||||
#-------------------------------------------------
|
||||
# Data East custom sound chips
|
||||
#@src/emu/sound/bsmt2000.h,SOUNDS += BSMT2000
|
||||
|
||||
30
src/emu/video/gf6800gt.c
Normal file
30
src/emu/video/gf6800gt.c
Normal file
@ -0,0 +1,30 @@
|
||||
#include "gf6800gt.h"
|
||||
|
||||
const device_type GEFORCE_6800GT = &device_creator<geforce_6800gt_device>;
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(map1, 32, geforce_6800gt_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(map2, 32, geforce_6800gt_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(map3, 32, geforce_6800gt_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
geforce_6800gt_device::geforce_6800gt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: pci_device(mconfig, GEFORCE_6800GT, "NVidia GeForce 6800GT", tag, owner, clock, "geforce_6800gt", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
void geforce_6800gt_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
add_map( 16*1024*1024, M_MEM, FUNC(geforce_6800gt_device::map1));
|
||||
add_map(256*1024*1024, M_MEM, FUNC(geforce_6800gt_device::map2));
|
||||
add_map( 16*1024*1024, M_MEM, FUNC(geforce_6800gt_device::map3));
|
||||
}
|
||||
|
||||
void geforce_6800gt_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
}
|
||||
25
src/emu/video/gf6800gt.h
Normal file
25
src/emu/video/gf6800gt.h
Normal file
@ -0,0 +1,25 @@
|
||||
#ifndef GF6800GT_H
|
||||
#define GF6800GT_H
|
||||
|
||||
#include "machine/pci.h"
|
||||
|
||||
#define MCFG_GEFORCE_6800GT_ADD(_tag, _subdevice_id) \
|
||||
MCFG_AGP_DEVICE_ADD(_tag, GEFORCE_6800GT, 0x10de00f9, 0xa1, _subdevice_id)
|
||||
|
||||
class geforce_6800gt_device : public pci_device {
|
||||
public:
|
||||
geforce_6800gt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
private:
|
||||
DECLARE_ADDRESS_MAP(map1, 32);
|
||||
DECLARE_ADDRESS_MAP(map2, 32);
|
||||
DECLARE_ADDRESS_MAP(map3, 32);
|
||||
};
|
||||
|
||||
extern const device_type GEFORCE_6800GT;
|
||||
|
||||
#endif
|
||||
@ -172,6 +172,15 @@ ifneq ($(filter GF4500,$(VIDEOS)),)
|
||||
VIDEOOBJS+= $(VIDEOOBJ)/gf4500.o
|
||||
endif
|
||||
|
||||
#-------------------------------------------------
|
||||
#
|
||||
#@src/emu/video/gf6800gt.h,VIDEOS += GF6800GT
|
||||
#-------------------------------------------------
|
||||
|
||||
ifneq ($(filter GF6800GT,$(VIDEOS)),)
|
||||
VIDEOOBJS+= $(VIDEOOBJ)/gf6800gt.o
|
||||
endif
|
||||
|
||||
#-------------------------------------------------
|
||||
#
|
||||
#@src/emu/video/h63484.h,VIDEOS += H63484
|
||||
|
||||
@ -121,7 +121,7 @@ something wrong in the disk geometry reported by calchase.chd (20,255,63) since
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
#include "video/pc_vga.h"
|
||||
|
||||
@ -358,7 +358,7 @@ Thanks to Alex, Mr Mudkips, and Philip Burke for this info.
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pic8259.h"
|
||||
#include "machine/pit8253.h"
|
||||
#include "machine/idectrl.h"
|
||||
|
||||
@ -313,7 +313,7 @@
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/powerpc/ppc.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/ataintf.h"
|
||||
#include "machine/idehd.h"
|
||||
#include "machine/jvshost.h"
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
#include "video/pc_vga.h"
|
||||
|
||||
@ -71,7 +71,7 @@ Notes:
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
#include "video/voodoo.h"
|
||||
|
||||
@ -64,7 +64,7 @@
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
|
||||
@ -32,7 +32,7 @@ Additional CD-ROM games: "99 Bottles of Beer"
|
||||
#include "machine/cr589.h"
|
||||
//#include "machine/i82371sb.h"
|
||||
//#include "machine/i82439tx.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "video/pc_vga.h"
|
||||
|
||||
@ -221,12 +221,20 @@ Sega 2005
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "video/pc_vga.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/i82875p.h"
|
||||
#include "machine/i6300esb.h"
|
||||
#include "machine/pci-usb.h"
|
||||
#include "machine/pci-apic.h"
|
||||
#include "machine/pci-sata.h"
|
||||
#include "machine/pci-smbus.h"
|
||||
#include "machine/i82541.h"
|
||||
#include "machine/segabb.h"
|
||||
#include "sound/pci-ac97.h"
|
||||
#include "sound/sb0400.h"
|
||||
#include "video/gf6800gt.h"
|
||||
|
||||
class lindbergh_state : public pcat_base_state
|
||||
class lindbergh_state : public driver_device
|
||||
{
|
||||
public:
|
||||
lindbergh_state(const machine_config &mconfig, device_type type, const char *tag);
|
||||
@ -235,24 +243,26 @@ public:
|
||||
virtual void machine_reset();
|
||||
};
|
||||
|
||||
#if 0
|
||||
static ADDRESS_MAP_START(lindbergh_map, AS_PROGRAM, 32, lindbergh_state)
|
||||
AM_RANGE(0x00000000, 0x0009ffff) AM_RAM
|
||||
AM_RANGE(0x000a0000, 0x000bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff)
|
||||
AM_RANGE(0x000c0000, 0x000cffff) AM_ROM AM_REGION("vid_bios", 0)
|
||||
// AM_RANGE(0x000a0000, 0x000bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff)
|
||||
// AM_RANGE(0x000c0000, 0x000cffff) AM_ROM AM_REGION("vid_bios", 0)
|
||||
// 0xd0000 - 0xdffff tested, wants 0x414d ("AM") in there
|
||||
AM_RANGE(0x000f0000, 0x000fffff) AM_ROM AM_REGION("mb_bios", 0xf0000)
|
||||
AM_RANGE(0xfd000000, 0xfd3fffff) AM_ROM AM_REGION("jvs_bios", 0) /* Hack to see the data */
|
||||
// AM_RANGE(0xfd000000, 0xfd3fffff) AM_ROM AM_REGION("jvs_bios", 0) /* Hack to see the data */
|
||||
AM_RANGE(0xfff00000, 0xffffffff) AM_ROM AM_REGION("mb_bios", 0) /* System BIOS */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(lindbergh_io, AS_IO, 32, lindbergh_state)
|
||||
AM_IMPORT_FROM(pcat32_io_common)
|
||||
// AM_IMPORT_FROM(pcat32_io_common)
|
||||
|
||||
AM_RANGE(0x00e8, 0x00ef) AM_NOP
|
||||
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
// AM_RANGE(0x00e8, 0x00ef) AM_NOP
|
||||
// AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)
|
||||
ADDRESS_MAP_END
|
||||
#endif
|
||||
|
||||
lindbergh_state::lindbergh_state(const machine_config &mconfig, device_type type, const char *tag) : pcat_base_state(mconfig, type, tag)
|
||||
lindbergh_state::lindbergh_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag)
|
||||
{
|
||||
}
|
||||
|
||||
@ -267,18 +277,37 @@ void lindbergh_state::machine_reset()
|
||||
static MACHINE_CONFIG_START(lindbergh, lindbergh_state)
|
||||
// MCFG_CPU_ADD("maincpu", PENTIUM, 2800000000U) /* Actually Celeron D at 2,8 GHz */
|
||||
MCFG_CPU_ADD("maincpu", PENTIUM4, 28000000U*5) /* Actually Celeron D at 2,8 GHz */
|
||||
MCFG_CPU_PROGRAM_MAP(lindbergh_map)
|
||||
MCFG_CPU_IO_MAP(lindbergh_io)
|
||||
MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259_1", pic8259_device, inta_cb)
|
||||
// MCFG_CPU_PROGRAM_MAP(lindbergh_map)
|
||||
// MCFG_CPU_IO_MAP(lindbergh_io)
|
||||
// MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259_1", pic8259_device, inta_cb)
|
||||
|
||||
MCFG_FRAGMENT_ADD( pcat_common )
|
||||
MCFG_FRAGMENT_ADD( pcvideo_vga )
|
||||
// MCFG_FRAGMENT_ADD( pcat_common )
|
||||
// MCFG_FRAGMENT_ADD( pcvideo_vga )
|
||||
|
||||
MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
// MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
|
||||
|
||||
MCFG_PCI_ROOT_ADD( ":pci")
|
||||
MCFG_I82875P_HOST_ADD( ":pci:00.0", 0x103382c0, ":maincpu", 512*1024*1024)
|
||||
MCFG_I82875P_AGP_ADD( ":pci:01.0")
|
||||
MCFG_GEFORCE_6800GT_ADD( ":pci:01.0:00.0", 0x10de0204)
|
||||
MCFG_PCI_BRIDGE_ADD( ":pci:1c.0", 0x808625ae, 0x02)
|
||||
MCFG_I82541PI_ADD( ":pci:1c.0:00.0", 0x103382c0)
|
||||
MCFG_USB_UHCI_ADD( ":pci:1d.0", 0x808625a9, 0x02, 0x103382c0)
|
||||
MCFG_USB_UHCI_ADD( ":pci:1d.1", 0x808625aa, 0x02, 0x103382c0)
|
||||
MCFG_I6300ESB_WATCHDOG_ADD( ":pci:1d.4", 0x103382c0)
|
||||
MCFG_APIC_ADD( ":pci:1d.5", 0x808625ac, 0x02, 0x103382c0)
|
||||
MCFG_USB_EHCI_ADD( ":pci:1d.7", 0x808625ad, 0x02, 0x103382c0)
|
||||
MCFG_PCI_BRIDGE_ADD( ":pci:1e.0", 0x8086244e, 0x0a)
|
||||
MCFG_SB0400_ADD( ":pci:1e.0:02.0", 0x11021101)
|
||||
MCFG_SEGA_LINDBERGH_BASEBOARD_ADD(":pci:1e.0:03.0")
|
||||
MCFG_I6300ESB_LPC_ADD( ":pci:1f.0")
|
||||
MCFG_SATA_ADD( ":pci:1f.2", 0x808625a3, 0x02, 0x103382c0)
|
||||
MCFG_SMBUS_ADD( ":pci:1f.3", 0x808625a4, 0x02, 0x103382c0)
|
||||
MCFG_AC97_ADD( ":pci:1f.5", 0x808625a6, 0x02, 0x103382c0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
ROM_START(lindbios)
|
||||
ROM_REGION32_LE(0x100000, "mb_bios", 0) // location 3j7
|
||||
ROM_REGION32_LE(0x100000, ":pci:1f.0", 0) // PC bios, location 3j7
|
||||
ROM_SYSTEM_BIOS(0, "bios0", "6.0.0010 alternate version")
|
||||
ROMX_LOAD("6.0.0010a.bin", 0x00000, 0x100000, CRC(10dd9b76) SHA1(1fdf1f921bc395846a7c3180fbdbc4ca287a9670), ROM_BIOS(1) )
|
||||
ROM_SYSTEM_BIOS(1, "bios1", "6.0.0009")
|
||||
@ -287,11 +316,11 @@ ROM_START(lindbios)
|
||||
ROMX_LOAD("6.0.0010.bin", 0x00000, 0x100000, CRC(ea2bf888) SHA1(c9c5b6f0d4f4f36620939b15dd2f128a74347e37), ROM_BIOS(3) )
|
||||
|
||||
|
||||
ROM_REGION(0x400000, "jvs_bios", 0)
|
||||
ROM_REGION(0x400000, ":pci:1e.0:03.0", 0) // Baseboard MPC firmware
|
||||
ROM_LOAD("fpr-24370b.ic6", 0x000000, 0x400000, CRC(c3b021a4) SHA1(1b6938a50fe0e4ae813864649eb103838c399ac0))
|
||||
|
||||
ROM_REGION(0x10000, "vid_bios", 0)
|
||||
ROM_REGION32_LE(0x10000, ":pci:01.0:00.0", 0) // Geforce bios extension (custom or standard?)
|
||||
ROM_LOAD("vid_bios.u504", 0x00000, 0x10000, CRC(f78d14d7) SHA1(f129787e487984edd23bf344f2e9500c85052275))
|
||||
ROM_END
|
||||
|
||||
GAME(1999, lindbios, 0, lindbergh, at_keyboard, driver_device, 0, ROT0, "Sega Lindbergh", "Sega Lindbergh Bios", GAME_IS_SKELETON)
|
||||
GAME(1999, lindbios, 0, lindbergh, 0, driver_device, 0, ROT0, "Sega Lindbergh", "Sega Lindbergh Bios", GAME_IS_SKELETON)
|
||||
|
||||
@ -118,7 +118,7 @@ Medium size chip with heat sink on it
|
||||
#include "cpu/adsp2100/adsp2100.h"
|
||||
#include "sound/dmadac.h"
|
||||
#include "video/voodoo.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
|
||||
|
||||
/* TODO: Two 3Dfx Voodoo chipsets are used in SLI configuration */
|
||||
|
||||
@ -66,7 +66,7 @@
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
|
||||
@ -24,7 +24,7 @@
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
|
||||
@ -13,7 +13,7 @@ TODO:
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
|
||||
@ -19,7 +19,7 @@
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
|
||||
@ -26,7 +26,7 @@ processor speed is 533MHz <- likely to be a Celeron or a Pentium III class CPU -
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
|
||||
@ -46,7 +46,7 @@
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
|
||||
@ -27,7 +27,7 @@ clocks 50MHz (near 3DFX) and 14.31818MHz (near RAMDAC)
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#if ENABLE_VGA
|
||||
|
||||
@ -283,7 +283,7 @@ An additional control PCB is used for Mocap Golf for the golf club sensor. It co
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/powerpc/ppc.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/ataintf.h"
|
||||
#include "machine/idehd.h"
|
||||
#include "machine/timekpr.h"
|
||||
|
||||
@ -14,7 +14,7 @@ TODO: VIA KT133a chipset support, GeForce 2MX video support, lots of things ;-)
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
|
||||
@ -40,7 +40,7 @@ MX29F1610MC 16M FlashROM (x7)
|
||||
|
||||
#include "emu.h"
|
||||
#include "cpu/i386/i386.h"
|
||||
#include "machine/pci.h"
|
||||
#include "machine/lpci.h"
|
||||
#include "machine/pcshare.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
|
||||
30
src/mame/machine/segabb.c
Normal file
30
src/mame/machine/segabb.c
Normal file
@ -0,0 +1,30 @@
|
||||
#include "segabb.h"
|
||||
|
||||
const device_type SEGA_LINDBERGH_BASEBOARD = &device_creator<sega_lindbergh_baseboard_device>;
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(map1, 32, sega_lindbergh_baseboard_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(map2, 32, sega_lindbergh_baseboard_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START(map3, 32, sega_lindbergh_baseboard_device)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
sega_lindbergh_baseboard_device::sega_lindbergh_baseboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
|
||||
: pci_device(mconfig, SEGA_LINDBERGH_BASEBOARD, "SEGA Lindbergh baseboard", tag, owner, clock, "sega_lindbergh_baseboard", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
void sega_lindbergh_baseboard_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
add_map( 128*1024, M_MEM, FUNC(sega_lindbergh_baseboard_device::map1));
|
||||
add_map( 1024*1024, M_MEM, FUNC(sega_lindbergh_baseboard_device::map2));
|
||||
add_map(2*1024*1024, M_MEM, FUNC(sega_lindbergh_baseboard_device::map3));
|
||||
}
|
||||
|
||||
void sega_lindbergh_baseboard_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
}
|
||||
27
src/mame/machine/segabb.h
Normal file
27
src/mame/machine/segabb.h
Normal file
@ -0,0 +1,27 @@
|
||||
// Lindbergh Sega baseboard
|
||||
|
||||
#ifndef SEGABB_H
|
||||
#define SEGABB_H
|
||||
|
||||
#include "machine/pci.h"
|
||||
|
||||
#define MCFG_SEGA_LINDBERGH_BASEBOARD_ADD(_tag) \
|
||||
MCFG_PCI_DEVICE_ADD(_tag, SEGA_LINDBERGH_BASEBOARD, 0x105718c1, 0x10, 0x068000, 0x11db067b)
|
||||
|
||||
class sega_lindbergh_baseboard_device : public pci_device {
|
||||
public:
|
||||
sega_lindbergh_baseboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
private:
|
||||
DECLARE_ADDRESS_MAP(map1, 32);
|
||||
DECLARE_ADDRESS_MAP(map2, 32);
|
||||
DECLARE_ADDRESS_MAP(map3, 32);
|
||||
};
|
||||
|
||||
extern const device_type SEGA_LINDBERGH_BASEBOARD;
|
||||
|
||||
#endif
|
||||
@ -271,6 +271,8 @@ SOUNDS += T6721A
|
||||
SOUNDS += MOS7360
|
||||
#SOUNDS += ESQPUMP
|
||||
#SOUNDS += VRC6
|
||||
SOUNDS += SB0400
|
||||
SOUNDS += AC97
|
||||
|
||||
#-------------------------------------------------
|
||||
# specify available video cores
|
||||
@ -290,6 +292,7 @@ VIDEOS += DM9368
|
||||
#VIDEOS += EF9340_1
|
||||
#VIDEOS += EF9345
|
||||
#VIDEOS += GF4500
|
||||
VIDEOS += GF6800GT
|
||||
VIDEOS += EPIC12
|
||||
VIDEOS += FIXFREQ
|
||||
VIDEOS += H63484
|
||||
@ -436,6 +439,7 @@ MACHINES += LDV1000
|
||||
MACHINES += LDVP931
|
||||
#MACHINES += LH5810
|
||||
MACHINES += LINFLASH
|
||||
MACHINES += LPCI
|
||||
#MACHINES += LSI53C810
|
||||
#MACHINES += M68307
|
||||
#MACHINES += M68340
|
||||
@ -607,6 +611,7 @@ BUSES += GENERIC
|
||||
BUSES += ISA
|
||||
#BUSES += ISBX
|
||||
#BUSES += KC
|
||||
#BUSES += LPCI
|
||||
#BUSES += MACPDS
|
||||
#BUSES += MIDI
|
||||
#BUSES += MEGADRIVE
|
||||
@ -617,7 +622,6 @@ BUSES += NEOGEO
|
||||
#BUSES += O2
|
||||
#BUSES += ORICEXT
|
||||
#BUSES += PCE
|
||||
#BUSES += PCI
|
||||
#BUSES += PC_JOY
|
||||
#BUSES += PC_KBD
|
||||
#BUSES += PET
|
||||
@ -1697,7 +1701,7 @@ $(MAMEOBJ)/sega.a: \
|
||||
$(DRIVERS)/hikaru.o \
|
||||
$(DRIVERS)/hshavoc.o \
|
||||
$(DRIVERS)/kopunch.o $(VIDEO)/kopunch.o \
|
||||
$(DRIVERS)/lindbergh.o \
|
||||
$(DRIVERS)/lindbergh.o $(MACHINE)/segabb.o \
|
||||
$(MACHINE)/megadriv.o \
|
||||
$(DRIVERS)/megadrvb.o \
|
||||
$(DRIVERS)/megaplay.o \
|
||||
|
||||
@ -12,17 +12,17 @@
|
||||
|
||||
/* Components */
|
||||
#include "video/pc_vga.h"
|
||||
#include "bus/pci/cirrus.h"
|
||||
#include "bus/lpci/cirrus.h"
|
||||
#include "cpu/powerpc/ppc.h"
|
||||
#include "sound/3812intf.h"
|
||||
#include "machine/ins8250.h"
|
||||
#include "machine/pic8259.h"
|
||||
#include "machine/mc146818.h"
|
||||
#include "bus/pci/pci.h"
|
||||
#include "bus/lpci/pci.h"
|
||||
#include "machine/am9517a.h"
|
||||
#include "machine/pckeybrd.h"
|
||||
#include "machine/idectrl.h"
|
||||
#include "bus/pci/mpc105.h"
|
||||
#include "bus/lpci/mpc105.h"
|
||||
#include "machine/intelfsh.h"
|
||||
#include "bus/scsi/scsi.h"
|
||||
#include "machine/53c810.h"
|
||||
|
||||
@ -17,9 +17,9 @@
|
||||
#include "machine/ins8250.h"
|
||||
#include "machine/mc146818.h"
|
||||
#include "machine/pic8259.h"
|
||||
#include "bus/pci/i82371ab.h"
|
||||
#include "bus/pci/i82371sb.h"
|
||||
#include "bus/pci/i82439tx.h"
|
||||
#include "bus/lpci/i82371ab.h"
|
||||
#include "bus/lpci/i82371sb.h"
|
||||
#include "bus/lpci/i82439tx.h"
|
||||
#include "machine/cs8221.h"
|
||||
#include "machine/pit8253.h"
|
||||
#include "machine/wd7600.h"
|
||||
@ -29,7 +29,7 @@
|
||||
|
||||
#include "imagedev/harddriv.h"
|
||||
#include "machine/am9517a.h"
|
||||
#include "bus/pci/pci.h"
|
||||
#include "bus/lpci/pci.h"
|
||||
|
||||
#include "sound/dac.h"
|
||||
#include "sound/speaker.h"
|
||||
|
||||
@ -93,7 +93,7 @@
|
||||
|
||||
/* Components */
|
||||
#include "video/pc_vga.h"
|
||||
#include "bus/pci/cirrus.h"
|
||||
#include "bus/lpci/cirrus.h"
|
||||
#include "cpu/powerpc/ppc.h"
|
||||
#include "machine/ins8250.h"
|
||||
#include "machine/upd765.h"
|
||||
@ -101,7 +101,7 @@
|
||||
#include "machine/pic8259.h"
|
||||
#include "machine/am9517a.h"
|
||||
#include "machine/ataintf.h"
|
||||
#include "bus/pci/pci.h"
|
||||
#include "bus/lpci/pci.h"
|
||||
#include "machine/intelfsh.h"
|
||||
#include "machine/53c810.h"
|
||||
#include "machine/ram.h"
|
||||
|
||||
@ -425,6 +425,7 @@ MACHINES += LDV1000
|
||||
MACHINES += LDVP931
|
||||
MACHINES += LH5810
|
||||
MACHINES += LINFLASH
|
||||
#MACHINES += LPCI
|
||||
MACHINES += LSI53C810
|
||||
MACHINES += M68307
|
||||
MACHINES += M68340
|
||||
@ -478,7 +479,6 @@ MACHINES += PC_FDC
|
||||
MACHINES += PC_LPT
|
||||
MACHINES += PCCARD
|
||||
MACHINES += PCF8593
|
||||
#MACHINES += PCI
|
||||
MACHINES += PCKEYBRD
|
||||
MACHINES += PIC8259
|
||||
MACHINES += PIT8253
|
||||
@ -599,6 +599,7 @@ BUSES += IQ151
|
||||
BUSES += ISA
|
||||
BUSES += ISBX
|
||||
BUSES += KC
|
||||
BUSES += LPCI
|
||||
BUSES += MACPDS
|
||||
BUSES += MIDI
|
||||
BUSES += MEGADRIVE
|
||||
@ -609,7 +610,6 @@ BUSES += NUBUS
|
||||
BUSES += O2
|
||||
BUSES += ORICEXT
|
||||
BUSES += PCE
|
||||
BUSES += PCI
|
||||
BUSES += PC_JOY
|
||||
BUSES += PC_KBD
|
||||
BUSES += PET
|
||||
|
||||
Loading…
Reference in New Issue
Block a user